blob: 041c091a2619ab131fd44b60dafc0a577d59743f [file] [log] [blame]
Chia-I Wu82f50aa2014-08-05 10:43:03 +08001/*
2 * XGL
3 *
4 * Copyright (C) 2014 LunarG, Inc.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included
14 * in all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
23 */
24
25#include "dispatch_tables.h"
26#include "gpu.h"
27#include "obj.h"
28
29/**
30 * Return true if an (not so) arbitrary pointer casted to intel_base points to
31 * a valid intel_base. This assumes at least the first sizeof(void*) bytes of
32 * the address are accessible, and they does not happen to be our magic
33 * values.
34 */
35bool intel_base_is_valid(const struct intel_base *base)
36{
37 if (base->dispatch != &intel_normal_dispatch_table &&
38 base->dispatch != &intel_debug_dispatch_table)
39 return false;
40
41 return !intel_gpu_is_valid((const struct intel_gpu *) base);
42}
43
Chia-I Wu26f0bd02014-08-07 10:38:40 +080044XGL_RESULT intel_base_get_info(struct intel_base *base, int type,
45 XGL_SIZE *size, XGL_VOID *data)
46{
47 XGL_RESULT ret = XGL_SUCCESS;
48 XGL_SIZE s;
49
50 switch (type) {
51 case XGL_INFO_TYPE_MEMORY_REQUIREMENTS:
52 s = sizeof(XGL_MEMORY_REQUIREMENTS);
53 memset(data, 0, s);
54 *size = s;
55 break;
56 default:
57 ret = XGL_ERROR_INVALID_VALUE;
58 break;
59 }
60
61 return ret;
62}
63
Chia-I Wu1f8fc7c2014-08-07 11:09:11 +080064static bool base_dbg_copy_create_info(struct intel_base_dbg *dbg,
65 const void *create_info)
66{
67 const union {
68 const void *ptr;
69 const struct {
70 XGL_STRUCTURE_TYPE struct_type;
71 XGL_VOID *next;
72 } *header;
73 } info = { .ptr = create_info };
74 XGL_SIZE shallow_copy = 0;
75
76 if (!create_info)
77 return true;
78
79 switch (info.header->struct_type) {
80 case XGL_STRUCTURE_TYPE_DEVICE_CREATE_INFO:
81 assert(dbg->type == XGL_DBG_OBJECT_DEVICE);
82 break;
83 case XGL_STRUCTURE_TYPE_MEMORY_ALLOC_INFO:
84 assert(dbg->type == XGL_DBG_OBJECT_GPU_MEMORY);
85 shallow_copy = sizeof(XGL_MEMORY_ALLOC_INFO);
86 break;
87 case XGL_STRUCTURE_TYPE_EVENT_CREATE_INFO:
88 assert(dbg->type == XGL_DBG_OBJECT_EVENT);
89 shallow_copy = sizeof(XGL_EVENT_CREATE_INFO);
90 break;
91 case XGL_STRUCTURE_TYPE_FENCE_CREATE_INFO:
92 assert(dbg->type == XGL_DBG_OBJECT_FENCE);
93 shallow_copy = sizeof(XGL_FENCE_CREATE_INFO);
94 break;
Courtney Goeltzenleuchter850d12c2014-08-07 18:13:10 -060095 case XGL_STRUCTURE_TYPE_QUERY_POOL_CREATE_INFO:
96 assert(dbg->type == XGL_DBG_OBJECT_QUERY_POOL);
97 shallow_copy = sizeof(XGL_QUERY_POOL_CREATE_INFO);
98 break;
Chia-I Wufeb441f2014-08-08 21:27:38 +080099 case XGL_STRUCTURE_TYPE_IMAGE_CREATE_INFO:
100 assert(dbg->type == XGL_DBG_OBJECT_IMAGE);
101 shallow_copy = sizeof(XGL_IMAGE_CREATE_INFO);
102 break;
Chia-I Wu1f8fc7c2014-08-07 11:09:11 +0800103 default:
104 return false;
105 break;
106 }
107
108 if (shallow_copy) {
109 assert(!info.header->next);
110
111 dbg->create_info = icd_alloc(shallow_copy, 0, XGL_SYSTEM_ALLOC_DEBUG);
112 if (!dbg->create_info)
113 return false;
114
115 memcpy(dbg->create_info, create_info, shallow_copy);
116 } else if (info.header->struct_type ==
117 XGL_STRUCTURE_TYPE_DEVICE_CREATE_INFO) {
118 const XGL_DEVICE_CREATE_INFO *src = info.ptr;
119 XGL_DEVICE_CREATE_INFO *dst;
120 uint8_t *d;
121 XGL_SIZE size;
122 XGL_UINT i;
123
124 size = sizeof(*src);
125 size += sizeof(src->pRequestedQueues[0]) * src->queueRecordCount;
126 size += sizeof(src->ppEnabledExtensionNames[0]) * src->extensionCount;
127 for (i = 0; i < src->extensionCount; i++) {
128 size += 1 +
129 strlen((const char *) src->ppEnabledExtensionNames[i]);
130 }
131
Chia-I Wu98dcfab2014-08-07 12:07:52 +0800132 dst = icd_alloc(size, 0, XGL_SYSTEM_ALLOC_DEBUG);
Chia-I Wu1f8fc7c2014-08-07 11:09:11 +0800133 if (!dst)
134 return false;
135
136 memcpy(dst, src, sizeof(*src));
137
138 d = (uint8_t *) dst;
139 d += sizeof(*src);
140
141 size = sizeof(src->pRequestedQueues[0]) * src->queueRecordCount;
142 memcpy(d, src->pRequestedQueues, size);
143 dst->pRequestedQueues = (const XGL_DEVICE_QUEUE_CREATE_INFO *) d;
144 d += size;
145
146 size = sizeof(src->ppEnabledExtensionNames[0]) * src->extensionCount;
147 dst->ppEnabledExtensionNames = (const XGL_CHAR * const *) d;
148
149 for (i = 0; i < src->extensionCount; i++) {
150 const XGL_SIZE len =
151 strlen((const char *) src->ppEnabledExtensionNames[i]);
152
153 memcpy(d + size, src->ppEnabledExtensionNames[i], len + 1);
154 ((const XGL_CHAR **) d)[i] = (const XGL_CHAR *) (d + size);
155
156 size += len + 1;
157 }
158 }
159
160 return true;
161}
162
Chia-I Wu82f50aa2014-08-05 10:43:03 +0800163/**
Chia-I Wubbf2c932014-08-07 12:20:08 +0800164 * Create an intel_base_dbg. When dbg_size is non-zero, a buffer of that
Chia-I Wu660caf82014-08-07 10:54:26 +0800165 * size is allocated and zeroed.
Chia-I Wu82f50aa2014-08-05 10:43:03 +0800166 */
Chia-I Wu660caf82014-08-07 10:54:26 +0800167struct intel_base_dbg *intel_base_dbg_create(XGL_DBG_OBJECT_TYPE type,
168 const void *create_info,
Chia-I Wubbf2c932014-08-07 12:20:08 +0800169 XGL_SIZE dbg_size)
Chia-I Wu82f50aa2014-08-05 10:43:03 +0800170{
Chia-I Wu660caf82014-08-07 10:54:26 +0800171 struct intel_base_dbg *dbg;
172
Chia-I Wubbf2c932014-08-07 12:20:08 +0800173 if (!dbg_size)
174 dbg_size = sizeof(*dbg);
Chia-I Wu660caf82014-08-07 10:54:26 +0800175
Chia-I Wubbf2c932014-08-07 12:20:08 +0800176 assert(dbg_size >= sizeof(*dbg));
Chia-I Wu660caf82014-08-07 10:54:26 +0800177
Chia-I Wubbf2c932014-08-07 12:20:08 +0800178 dbg = icd_alloc(dbg_size, 0, XGL_SYSTEM_ALLOC_DEBUG);
Chia-I Wu660caf82014-08-07 10:54:26 +0800179 if (!dbg)
180 return NULL;
181
Chia-I Wubbf2c932014-08-07 12:20:08 +0800182 memset(dbg, 0, dbg_size);
Chia-I Wu660caf82014-08-07 10:54:26 +0800183
Chia-I Wu82f50aa2014-08-05 10:43:03 +0800184 dbg->alloc_id = icd_get_allocator_id();
185 dbg->type = type;
186
Chia-I Wu1f8fc7c2014-08-07 11:09:11 +0800187 if (!base_dbg_copy_create_info(dbg, create_info)) {
188 icd_free(dbg);
189 return NULL;
Chia-I Wu82f50aa2014-08-05 10:43:03 +0800190 }
191
Chia-I Wu82f50aa2014-08-05 10:43:03 +0800192 return dbg;
193}
194
195void intel_base_dbg_destroy(struct intel_base_dbg *dbg)
196{
Chia-I Wu660caf82014-08-07 10:54:26 +0800197 if (dbg->tag)
198 icd_free(dbg->tag);
199
200 if (dbg->create_info)
201 icd_free(dbg->create_info);
202
Chia-I Wu82f50aa2014-08-05 10:43:03 +0800203 icd_free(dbg);
204}
Chia-I Wu53fc6aa2014-08-06 14:22:51 +0800205
Chia-I Wubbf2c932014-08-07 12:20:08 +0800206/**
207 * Create an intel_base. obj_size and dbg_size specify the real sizes of the
208 * object and the debug metadata. Memories are zeroed.
209 */
210struct intel_base *intel_base_create(XGL_SIZE obj_size, bool debug,
211 XGL_DBG_OBJECT_TYPE type,
212 const void *create_info,
213 XGL_SIZE dbg_size)
214{
215 struct intel_base *base;
216
217 if (!obj_size)
218 obj_size = sizeof(*base);
219
220 assert(obj_size >= sizeof(*base));
221
222 base = icd_alloc(obj_size, 0, XGL_SYSTEM_ALLOC_API_OBJECT);
223 if (!base)
224 return NULL;
225
226 memset(base, 0, obj_size);
227
228 if (debug) {
229 base->dispatch = &intel_debug_dispatch_table;
230 base->dbg = intel_base_dbg_create(type, create_info, dbg_size);
231 if (!base->dbg) {
232 icd_free(base);
233 return NULL;
234 }
235 }
236 else {
237 base->dispatch = &intel_normal_dispatch_table;
238 }
239 base->get_info = intel_base_get_info;
240
241 return base;
242}
243
244void intel_base_destroy(struct intel_base *base)
245{
246 if (base->dbg)
247 intel_base_dbg_destroy(base->dbg);
248 icd_free(base);
249}
250
Chia-I Wu53fc6aa2014-08-06 14:22:51 +0800251XGL_RESULT XGLAPI intelDestroyObject(
252 XGL_OBJECT object)
253{
254 struct intel_obj *obj = intel_obj(object);
255
256 obj->destroy(obj);
257
258 return XGL_SUCCESS;
259}
260
261XGL_RESULT XGLAPI intelGetObjectInfo(
262 XGL_BASE_OBJECT object,
263 XGL_OBJECT_INFO_TYPE infoType,
264 XGL_SIZE* pDataSize,
265 XGL_VOID* pData)
266{
267 struct intel_base *base = intel_base(object);
Chia-I Wu53fc6aa2014-08-06 14:22:51 +0800268
Chia-I Wu26f0bd02014-08-07 10:38:40 +0800269 return base->get_info(base, infoType, pDataSize, pData);
Chia-I Wu53fc6aa2014-08-06 14:22:51 +0800270}
271
272XGL_RESULT XGLAPI intelBindObjectMemory(
273 XGL_OBJECT object,
274 XGL_GPU_MEMORY mem,
275 XGL_GPU_SIZE offset)
276{
277 struct intel_obj *obj = intel_obj(object);
278
279 obj->mem = mem;
280 obj->offset = offset;
281
282 return XGL_SUCCESS;
283}