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Logan Chien969aea62018-12-05 18:40:57 +08001/* ===-------- intrin.h ---------------------------------------------------===
2 *
Logan Chiendf4f7662019-09-04 16:45:23 -07003 * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 * See https://llvm.org/LICENSE.txt for license information.
5 * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
Logan Chien969aea62018-12-05 18:40:57 +08006 *
7 *===-----------------------------------------------------------------------===
8 */
9
10/* Only include this if we're compiling for the windows platform. */
11#ifndef _MSC_VER
12#include_next <intrin.h>
13#else
14
15#ifndef __INTRIN_H
16#define __INTRIN_H
17
18/* First include the standard intrinsics. */
19#if defined(__i386__) || defined(__x86_64__)
20#include <x86intrin.h>
21#endif
22
23#if defined(__arm__)
24#include <armintr.h>
25#endif
26
27#if defined(__aarch64__)
28#include <arm64intr.h>
29#endif
30
31/* For the definition of jmp_buf. */
32#if __STDC_HOSTED__
33#include <setjmp.h>
34#endif
35
36/* Define the default attributes for the functions in this file. */
37#define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__))
38
Sasha Smundak746b0222020-02-25 09:19:04 -080039#if __x86_64__
40#define __LPTRINT_TYPE__ __int64
41#else
42#define __LPTRINT_TYPE__ long
43#endif
44
Logan Chien969aea62018-12-05 18:40:57 +080045#ifdef __cplusplus
46extern "C" {
47#endif
48
49#if defined(__MMX__)
50/* And the random ones that aren't in those files. */
51__m64 _m_from_float(float);
52float _m_to_float(__m64);
53#endif
54
55/* Other assorted instruction intrinsics. */
56void __addfsbyte(unsigned long, unsigned char);
57void __addfsdword(unsigned long, unsigned long);
58void __addfsword(unsigned long, unsigned short);
59void __code_seg(const char *);
60static __inline__
61void __cpuid(int[4], int);
62static __inline__
63void __cpuidex(int[4], int, int);
64static __inline__
65__int64 __emul(int, int);
66static __inline__
67unsigned __int64 __emulu(unsigned int, unsigned int);
68unsigned int __getcallerseflags(void);
69static __inline__
70void __halt(void);
71unsigned char __inbyte(unsigned short);
72void __inbytestring(unsigned short, unsigned char *, unsigned long);
73void __incfsbyte(unsigned long);
74void __incfsdword(unsigned long);
75void __incfsword(unsigned long);
76unsigned long __indword(unsigned short);
77void __indwordstring(unsigned short, unsigned long *, unsigned long);
78void __int2c(void);
79void __invlpg(void *);
80unsigned short __inword(unsigned short);
81void __inwordstring(unsigned short, unsigned short *, unsigned long);
82void __lidt(void *);
83unsigned __int64 __ll_lshift(unsigned __int64, int);
84__int64 __ll_rshift(__int64, int);
Logan Chien969aea62018-12-05 18:40:57 +080085static __inline__
86void __movsb(unsigned char *, unsigned char const *, size_t);
87static __inline__
88void __movsd(unsigned long *, unsigned long const *, size_t);
89static __inline__
90void __movsw(unsigned short *, unsigned short const *, size_t);
91static __inline__
92void __nop(void);
93void __nvreg_restore_fence(void);
94void __nvreg_save_fence(void);
95void __outbyte(unsigned short, unsigned char);
96void __outbytestring(unsigned short, unsigned char *, unsigned long);
97void __outdword(unsigned short, unsigned long);
98void __outdwordstring(unsigned short, unsigned long *, unsigned long);
99void __outword(unsigned short, unsigned short);
100void __outwordstring(unsigned short, unsigned short *, unsigned long);
101unsigned long __readcr0(void);
102unsigned long __readcr2(void);
Sasha Smundak746b0222020-02-25 09:19:04 -0800103unsigned __LPTRINT_TYPE__ __readcr3(void);
Logan Chien969aea62018-12-05 18:40:57 +0800104unsigned long __readcr4(void);
105unsigned long __readcr8(void);
106unsigned int __readdr(unsigned int);
107#ifdef __i386__
108static __inline__
109unsigned char __readfsbyte(unsigned long);
110static __inline__
Logan Chien969aea62018-12-05 18:40:57 +0800111unsigned short __readfsword(unsigned long);
Pirama Arumuga Nainar494f6452021-12-02 10:42:14 -0800112static __inline__
113unsigned long __readfsdword(unsigned long);
114static __inline__
115unsigned __int64 __readfsqword(unsigned long);
Logan Chien969aea62018-12-05 18:40:57 +0800116#endif
117static __inline__
118unsigned __int64 __readmsr(unsigned long);
119unsigned __int64 __readpmc(unsigned long);
120unsigned long __segmentlimit(unsigned long);
121void __sidt(void *);
122static __inline__
123void __stosb(unsigned char *, unsigned char, size_t);
124static __inline__
125void __stosd(unsigned long *, unsigned long, size_t);
126static __inline__
127void __stosw(unsigned short *, unsigned short, size_t);
128void __svm_clgi(void);
129void __svm_invlpga(void *, int);
130void __svm_skinit(int);
131void __svm_stgi(void);
132void __svm_vmload(size_t);
133void __svm_vmrun(size_t);
134void __svm_vmsave(size_t);
135void __ud2(void);
136unsigned __int64 __ull_rshift(unsigned __int64, int);
137void __vmx_off(void);
138void __vmx_vmptrst(unsigned __int64 *);
139void __wbinvd(void);
140void __writecr0(unsigned int);
141static __inline__
Sasha Smundak746b0222020-02-25 09:19:04 -0800142void __writecr3(unsigned __INTPTR_TYPE__);
Logan Chien969aea62018-12-05 18:40:57 +0800143void __writecr4(unsigned int);
144void __writecr8(unsigned int);
145void __writedr(unsigned int, unsigned int);
146void __writefsbyte(unsigned long, unsigned char);
147void __writefsdword(unsigned long, unsigned long);
148void __writefsqword(unsigned long, unsigned __int64);
149void __writefsword(unsigned long, unsigned short);
150void __writemsr(unsigned long, unsigned __int64);
151static __inline__
152void *_AddressOfReturnAddress(void);
153static __inline__
154unsigned char _BitScanForward(unsigned long *_Index, unsigned long _Mask);
155static __inline__
156unsigned char _BitScanReverse(unsigned long *_Index, unsigned long _Mask);
157unsigned char _bittest(long const *, long);
158unsigned char _bittestandcomplement(long *, long);
159unsigned char _bittestandreset(long *, long);
160unsigned char _bittestandset(long *, long);
161void __cdecl _disable(void);
162void __cdecl _enable(void);
163long _InterlockedAddLargeStatistic(__int64 volatile *_Addend, long _Value);
164unsigned char _interlockedbittestandreset(long volatile *, long);
165unsigned char _interlockedbittestandset(long volatile *, long);
166void *_InterlockedCompareExchangePointer_HLEAcquire(void *volatile *, void *,
167 void *);
168void *_InterlockedCompareExchangePointer_HLERelease(void *volatile *, void *,
169 void *);
170long _InterlockedExchangeAdd_HLEAcquire(long volatile *, long);
171long _InterlockedExchangeAdd_HLERelease(long volatile *, long);
172__int64 _InterlockedExchangeAdd64_HLEAcquire(__int64 volatile *, __int64);
173__int64 _InterlockedExchangeAdd64_HLERelease(__int64 volatile *, __int64);
Logan Chien969aea62018-12-05 18:40:57 +0800174static __inline__ void
175__attribute__((__deprecated__("use other intrinsics or C++11 atomics instead")))
176_ReadBarrier(void);
177static __inline__ void
178__attribute__((__deprecated__("use other intrinsics or C++11 atomics instead")))
179_ReadWriteBarrier(void);
180unsigned int _rorx_u32(unsigned int, const unsigned int);
181int _sarx_i32(int, unsigned int);
182#if __STDC_HOSTED__
183int __cdecl _setjmp(jmp_buf);
184#endif
185unsigned int _shlx_u32(unsigned int, unsigned int);
186unsigned int _shrx_u32(unsigned int, unsigned int);
187void _Store_HLERelease(long volatile *, long);
188void _Store64_HLERelease(__int64 volatile *, __int64);
189void _StorePointer_HLERelease(void *volatile *, void *);
190static __inline__ void
191__attribute__((__deprecated__("use other intrinsics or C++11 atomics instead")))
192_WriteBarrier(void);
193unsigned __int32 xbegin(void);
194void _xend(void);
Logan Chien969aea62018-12-05 18:40:57 +0800195
196/* These additional intrinsics are turned on in x64/amd64/x86_64 mode. */
197#ifdef __x86_64__
198void __addgsbyte(unsigned long, unsigned char);
199void __addgsdword(unsigned long, unsigned long);
200void __addgsqword(unsigned long, unsigned __int64);
201void __addgsword(unsigned long, unsigned short);
202static __inline__
203void __faststorefence(void);
204void __incgsbyte(unsigned long);
205void __incgsdword(unsigned long);
206void __incgsqword(unsigned long);
207void __incgsword(unsigned long);
Logan Chien969aea62018-12-05 18:40:57 +0800208static __inline__
209void __movsq(unsigned long long *, unsigned long long const *, size_t);
210static __inline__
211unsigned char __readgsbyte(unsigned long);
212static __inline__
213unsigned long __readgsdword(unsigned long);
214static __inline__
215unsigned __int64 __readgsqword(unsigned long);
216unsigned short __readgsword(unsigned long);
217unsigned __int64 __shiftleft128(unsigned __int64 _LowPart,
218 unsigned __int64 _HighPart,
219 unsigned char _Shift);
220unsigned __int64 __shiftright128(unsigned __int64 _LowPart,
221 unsigned __int64 _HighPart,
222 unsigned char _Shift);
223static __inline__
224void __stosq(unsigned __int64 *, unsigned __int64, size_t);
225unsigned char __vmx_on(unsigned __int64 *);
226unsigned char __vmx_vmclear(unsigned __int64 *);
227unsigned char __vmx_vmlaunch(void);
228unsigned char __vmx_vmptrld(unsigned __int64 *);
229unsigned char __vmx_vmread(size_t, size_t *);
230unsigned char __vmx_vmresume(void);
231unsigned char __vmx_vmwrite(size_t, size_t);
232void __writegsbyte(unsigned long, unsigned char);
233void __writegsdword(unsigned long, unsigned long);
234void __writegsqword(unsigned long, unsigned __int64);
235void __writegsword(unsigned long, unsigned short);
236unsigned char _bittest64(__int64 const *, __int64);
237unsigned char _bittestandcomplement64(__int64 *, __int64);
238unsigned char _bittestandreset64(__int64 *, __int64);
239unsigned char _bittestandset64(__int64 *, __int64);
240long _InterlockedAnd_np(long volatile *_Value, long _Mask);
241short _InterlockedAnd16_np(short volatile *_Value, short _Mask);
242__int64 _InterlockedAnd64_np(__int64 volatile *_Value, __int64 _Mask);
243char _InterlockedAnd8_np(char volatile *_Value, char _Mask);
244unsigned char _interlockedbittestandreset64(__int64 volatile *, __int64);
245unsigned char _interlockedbittestandset64(__int64 volatile *, __int64);
246long _InterlockedCompareExchange_np(long volatile *_Destination, long _Exchange,
247 long _Comparand);
Logan Chien969aea62018-12-05 18:40:57 +0800248unsigned char _InterlockedCompareExchange128_np(__int64 volatile *_Destination,
249 __int64 _ExchangeHigh,
250 __int64 _ExchangeLow,
251 __int64 *_ComparandResult);
252short _InterlockedCompareExchange16_np(short volatile *_Destination,
253 short _Exchange, short _Comparand);
254__int64 _InterlockedCompareExchange64_np(__int64 volatile *_Destination,
255 __int64 _Exchange, __int64 _Comparand);
256void *_InterlockedCompareExchangePointer_np(void *volatile *_Destination,
257 void *_Exchange, void *_Comparand);
258long _InterlockedOr_np(long volatile *_Value, long _Mask);
259short _InterlockedOr16_np(short volatile *_Value, short _Mask);
260__int64 _InterlockedOr64_np(__int64 volatile *_Value, __int64 _Mask);
261char _InterlockedOr8_np(char volatile *_Value, char _Mask);
262long _InterlockedXor_np(long volatile *_Value, long _Mask);
263short _InterlockedXor16_np(short volatile *_Value, short _Mask);
264__int64 _InterlockedXor64_np(__int64 volatile *_Value, __int64 _Mask);
265char _InterlockedXor8_np(char volatile *_Value, char _Mask);
266unsigned __int64 _rorx_u64(unsigned __int64, const unsigned int);
267__int64 _sarx_i64(__int64, unsigned int);
268unsigned __int64 _shlx_u64(unsigned __int64, unsigned int);
269unsigned __int64 _shrx_u64(unsigned __int64, unsigned int);
270static __inline__
271__int64 __mulh(__int64, __int64);
272static __inline__
273unsigned __int64 __umulh(unsigned __int64, unsigned __int64);
274static __inline__
275__int64 _mul128(__int64, __int64, __int64*);
276static __inline__
277unsigned __int64 _umul128(unsigned __int64,
278 unsigned __int64,
279 unsigned __int64*);
280
281#endif /* __x86_64__ */
282
283#if defined(__x86_64__) || defined(__arm__) || defined(__aarch64__)
284
285static __inline__
286unsigned char _BitScanForward64(unsigned long *_Index, unsigned __int64 _Mask);
287static __inline__
288unsigned char _BitScanReverse64(unsigned long *_Index, unsigned __int64 _Mask);
289
Sasha Smundak0fc590b2020-10-07 08:11:59 -0700290#endif
291
292#if defined(__i386__) || defined(__x86_64__) || defined(__arm__) || defined(__aarch64__)
Logan Chien969aea62018-12-05 18:40:57 +0800293static __inline__
294__int64 _InterlockedDecrement64(__int64 volatile *_Addend);
295static __inline__
296__int64 _InterlockedExchange64(__int64 volatile *_Target, __int64 _Value);
297static __inline__
298__int64 _InterlockedExchangeAdd64(__int64 volatile *_Addend, __int64 _Value);
299static __inline__
300__int64 _InterlockedExchangeSub64(__int64 volatile *_Subend, __int64 _Value);
301static __inline__
302__int64 _InterlockedIncrement64(__int64 volatile *_Addend);
303static __inline__
304__int64 _InterlockedOr64(__int64 volatile *_Value, __int64 _Mask);
305static __inline__
306__int64 _InterlockedXor64(__int64 volatile *_Value, __int64 _Mask);
307static __inline__
308__int64 _InterlockedAnd64(__int64 volatile *_Value, __int64 _Mask);
309
310#endif
311
312/*----------------------------------------------------------------------------*\
313|* Interlocked Exchange Add
314\*----------------------------------------------------------------------------*/
315#if defined(__arm__) || defined(__aarch64__)
316char _InterlockedExchangeAdd8_acq(char volatile *_Addend, char _Value);
317char _InterlockedExchangeAdd8_nf(char volatile *_Addend, char _Value);
318char _InterlockedExchangeAdd8_rel(char volatile *_Addend, char _Value);
319short _InterlockedExchangeAdd16_acq(short volatile *_Addend, short _Value);
320short _InterlockedExchangeAdd16_nf(short volatile *_Addend, short _Value);
321short _InterlockedExchangeAdd16_rel(short volatile *_Addend, short _Value);
322long _InterlockedExchangeAdd_acq(long volatile *_Addend, long _Value);
323long _InterlockedExchangeAdd_nf(long volatile *_Addend, long _Value);
324long _InterlockedExchangeAdd_rel(long volatile *_Addend, long _Value);
325__int64 _InterlockedExchangeAdd64_acq(__int64 volatile *_Addend, __int64 _Value);
326__int64 _InterlockedExchangeAdd64_nf(__int64 volatile *_Addend, __int64 _Value);
327__int64 _InterlockedExchangeAdd64_rel(__int64 volatile *_Addend, __int64 _Value);
328#endif
329/*----------------------------------------------------------------------------*\
330|* Interlocked Increment
331\*----------------------------------------------------------------------------*/
332#if defined(__arm__) || defined(__aarch64__)
333short _InterlockedIncrement16_acq(short volatile *_Value);
334short _InterlockedIncrement16_nf(short volatile *_Value);
335short _InterlockedIncrement16_rel(short volatile *_Value);
336long _InterlockedIncrement_acq(long volatile *_Value);
337long _InterlockedIncrement_nf(long volatile *_Value);
338long _InterlockedIncrement_rel(long volatile *_Value);
339__int64 _InterlockedIncrement64_acq(__int64 volatile *_Value);
340__int64 _InterlockedIncrement64_nf(__int64 volatile *_Value);
341__int64 _InterlockedIncrement64_rel(__int64 volatile *_Value);
342#endif
343/*----------------------------------------------------------------------------*\
344|* Interlocked Decrement
345\*----------------------------------------------------------------------------*/
346#if defined(__arm__) || defined(__aarch64__)
347short _InterlockedDecrement16_acq(short volatile *_Value);
348short _InterlockedDecrement16_nf(short volatile *_Value);
349short _InterlockedDecrement16_rel(short volatile *_Value);
350long _InterlockedDecrement_acq(long volatile *_Value);
351long _InterlockedDecrement_nf(long volatile *_Value);
352long _InterlockedDecrement_rel(long volatile *_Value);
353__int64 _InterlockedDecrement64_acq(__int64 volatile *_Value);
354__int64 _InterlockedDecrement64_nf(__int64 volatile *_Value);
355__int64 _InterlockedDecrement64_rel(__int64 volatile *_Value);
356#endif
357/*----------------------------------------------------------------------------*\
358|* Interlocked And
359\*----------------------------------------------------------------------------*/
360#if defined(__arm__) || defined(__aarch64__)
361char _InterlockedAnd8_acq(char volatile *_Value, char _Mask);
362char _InterlockedAnd8_nf(char volatile *_Value, char _Mask);
363char _InterlockedAnd8_rel(char volatile *_Value, char _Mask);
364short _InterlockedAnd16_acq(short volatile *_Value, short _Mask);
365short _InterlockedAnd16_nf(short volatile *_Value, short _Mask);
366short _InterlockedAnd16_rel(short volatile *_Value, short _Mask);
367long _InterlockedAnd_acq(long volatile *_Value, long _Mask);
368long _InterlockedAnd_nf(long volatile *_Value, long _Mask);
369long _InterlockedAnd_rel(long volatile *_Value, long _Mask);
370__int64 _InterlockedAnd64_acq(__int64 volatile *_Value, __int64 _Mask);
371__int64 _InterlockedAnd64_nf(__int64 volatile *_Value, __int64 _Mask);
372__int64 _InterlockedAnd64_rel(__int64 volatile *_Value, __int64 _Mask);
373#endif
374/*----------------------------------------------------------------------------*\
375|* Bit Counting and Testing
376\*----------------------------------------------------------------------------*/
377#if defined(__arm__) || defined(__aarch64__)
378unsigned char _interlockedbittestandset_acq(long volatile *_BitBase,
379 long _BitPos);
380unsigned char _interlockedbittestandset_nf(long volatile *_BitBase,
381 long _BitPos);
382unsigned char _interlockedbittestandset_rel(long volatile *_BitBase,
383 long _BitPos);
384unsigned char _interlockedbittestandreset_acq(long volatile *_BitBase,
385 long _BitPos);
386unsigned char _interlockedbittestandreset_nf(long volatile *_BitBase,
387 long _BitPos);
388unsigned char _interlockedbittestandreset_rel(long volatile *_BitBase,
389 long _BitPos);
390#endif
391/*----------------------------------------------------------------------------*\
392|* Interlocked Or
393\*----------------------------------------------------------------------------*/
394#if defined(__arm__) || defined(__aarch64__)
395char _InterlockedOr8_acq(char volatile *_Value, char _Mask);
396char _InterlockedOr8_nf(char volatile *_Value, char _Mask);
397char _InterlockedOr8_rel(char volatile *_Value, char _Mask);
398short _InterlockedOr16_acq(short volatile *_Value, short _Mask);
399short _InterlockedOr16_nf(short volatile *_Value, short _Mask);
400short _InterlockedOr16_rel(short volatile *_Value, short _Mask);
401long _InterlockedOr_acq(long volatile *_Value, long _Mask);
402long _InterlockedOr_nf(long volatile *_Value, long _Mask);
403long _InterlockedOr_rel(long volatile *_Value, long _Mask);
404__int64 _InterlockedOr64_acq(__int64 volatile *_Value, __int64 _Mask);
405__int64 _InterlockedOr64_nf(__int64 volatile *_Value, __int64 _Mask);
406__int64 _InterlockedOr64_rel(__int64 volatile *_Value, __int64 _Mask);
407#endif
408/*----------------------------------------------------------------------------*\
409|* Interlocked Xor
410\*----------------------------------------------------------------------------*/
411#if defined(__arm__) || defined(__aarch64__)
412char _InterlockedXor8_acq(char volatile *_Value, char _Mask);
413char _InterlockedXor8_nf(char volatile *_Value, char _Mask);
414char _InterlockedXor8_rel(char volatile *_Value, char _Mask);
415short _InterlockedXor16_acq(short volatile *_Value, short _Mask);
416short _InterlockedXor16_nf(short volatile *_Value, short _Mask);
417short _InterlockedXor16_rel(short volatile *_Value, short _Mask);
418long _InterlockedXor_acq(long volatile *_Value, long _Mask);
419long _InterlockedXor_nf(long volatile *_Value, long _Mask);
420long _InterlockedXor_rel(long volatile *_Value, long _Mask);
421__int64 _InterlockedXor64_acq(__int64 volatile *_Value, __int64 _Mask);
422__int64 _InterlockedXor64_nf(__int64 volatile *_Value, __int64 _Mask);
423__int64 _InterlockedXor64_rel(__int64 volatile *_Value, __int64 _Mask);
424#endif
425/*----------------------------------------------------------------------------*\
426|* Interlocked Exchange
427\*----------------------------------------------------------------------------*/
428#if defined(__arm__) || defined(__aarch64__)
429char _InterlockedExchange8_acq(char volatile *_Target, char _Value);
430char _InterlockedExchange8_nf(char volatile *_Target, char _Value);
431char _InterlockedExchange8_rel(char volatile *_Target, char _Value);
432short _InterlockedExchange16_acq(short volatile *_Target, short _Value);
433short _InterlockedExchange16_nf(short volatile *_Target, short _Value);
434short _InterlockedExchange16_rel(short volatile *_Target, short _Value);
435long _InterlockedExchange_acq(long volatile *_Target, long _Value);
436long _InterlockedExchange_nf(long volatile *_Target, long _Value);
437long _InterlockedExchange_rel(long volatile *_Target, long _Value);
438__int64 _InterlockedExchange64_acq(__int64 volatile *_Target, __int64 _Value);
439__int64 _InterlockedExchange64_nf(__int64 volatile *_Target, __int64 _Value);
440__int64 _InterlockedExchange64_rel(__int64 volatile *_Target, __int64 _Value);
441#endif
442/*----------------------------------------------------------------------------*\
443|* Interlocked Compare Exchange
444\*----------------------------------------------------------------------------*/
445#if defined(__arm__) || defined(__aarch64__)
446char _InterlockedCompareExchange8_acq(char volatile *_Destination,
447 char _Exchange, char _Comparand);
448char _InterlockedCompareExchange8_nf(char volatile *_Destination,
449 char _Exchange, char _Comparand);
450char _InterlockedCompareExchange8_rel(char volatile *_Destination,
451 char _Exchange, char _Comparand);
452short _InterlockedCompareExchange16_acq(short volatile *_Destination,
453 short _Exchange, short _Comparand);
454short _InterlockedCompareExchange16_nf(short volatile *_Destination,
455 short _Exchange, short _Comparand);
456short _InterlockedCompareExchange16_rel(short volatile *_Destination,
457 short _Exchange, short _Comparand);
458long _InterlockedCompareExchange_acq(long volatile *_Destination,
459 long _Exchange, long _Comparand);
460long _InterlockedCompareExchange_nf(long volatile *_Destination,
461 long _Exchange, long _Comparand);
462long _InterlockedCompareExchange_rel(long volatile *_Destination,
463 long _Exchange, long _Comparand);
464__int64 _InterlockedCompareExchange64_acq(__int64 volatile *_Destination,
465 __int64 _Exchange, __int64 _Comparand);
466__int64 _InterlockedCompareExchange64_nf(__int64 volatile *_Destination,
467 __int64 _Exchange, __int64 _Comparand);
468__int64 _InterlockedCompareExchange64_rel(__int64 volatile *_Destination,
469 __int64 _Exchange, __int64 _Comparand);
470#endif
Pirama Arumuga Nainar986b8802021-06-03 16:00:34 -0700471#if defined(__x86_64__) || defined(__aarch64__)
472unsigned char _InterlockedCompareExchange128(__int64 volatile *_Destination,
473 __int64 _ExchangeHigh,
474 __int64 _ExchangeLow,
475 __int64 *_ComparandResult);
476#endif
477#if defined(__aarch64__)
478unsigned char _InterlockedCompareExchange128_acq(__int64 volatile *_Destination,
479 __int64 _ExchangeHigh,
480 __int64 _ExchangeLow,
481 __int64 *_ComparandResult);
482unsigned char _InterlockedCompareExchange128_nf(__int64 volatile *_Destination,
483 __int64 _ExchangeHigh,
484 __int64 _ExchangeLow,
485 __int64 *_ComparandResult);
486unsigned char _InterlockedCompareExchange128_rel(__int64 volatile *_Destination,
487 __int64 _ExchangeHigh,
488 __int64 _ExchangeLow,
489 __int64 *_ComparandResult);
490#endif
Logan Chien969aea62018-12-05 18:40:57 +0800491
492/*----------------------------------------------------------------------------*\
493|* movs, stos
494\*----------------------------------------------------------------------------*/
495#if defined(__i386__) || defined(__x86_64__)
496static __inline__ void __DEFAULT_FN_ATTRS
497__movsb(unsigned char *__dst, unsigned char const *__src, size_t __n) {
Pirama Arumuga Nainar494f6452021-12-02 10:42:14 -0800498#if defined(__x86_64__)
499 __asm__ __volatile__("rep movsb"
500 : "+D"(__dst), "+S"(__src), "+c"(__n)
501 :
502 : "memory");
503#else
504 __asm__ __volatile__("xchg %%esi, %1\nrep movsb\nxchg %%esi, %1"
505 : "+D"(__dst), "+r"(__src), "+c"(__n)
506 :
507 : "memory");
508#endif
Logan Chien969aea62018-12-05 18:40:57 +0800509}
510static __inline__ void __DEFAULT_FN_ATTRS
511__movsd(unsigned long *__dst, unsigned long const *__src, size_t __n) {
Pirama Arumuga Nainar494f6452021-12-02 10:42:14 -0800512#if defined(__x86_64__)
513 __asm__ __volatile__("rep movsl"
514 : "+D"(__dst), "+S"(__src), "+c"(__n)
515 :
516 : "memory");
517#else
518 __asm__ __volatile__("xchg %%esi, %1\nrep movsl\nxchg %%esi, %1"
519 : "+D"(__dst), "+r"(__src), "+c"(__n)
520 :
521 : "memory");
522#endif
Logan Chien969aea62018-12-05 18:40:57 +0800523}
524static __inline__ void __DEFAULT_FN_ATTRS
525__movsw(unsigned short *__dst, unsigned short const *__src, size_t __n) {
Pirama Arumuga Nainar494f6452021-12-02 10:42:14 -0800526#if defined(__x86_64__)
527 __asm__ __volatile__("rep movsw"
528 : "+D"(__dst), "+S"(__src), "+c"(__n)
529 :
530 : "memory");
531#else
532 __asm__ __volatile__("xchg %%esi, %1\nrep movsw\nxchg %%esi, %1"
533 : "+D"(__dst), "+r"(__src), "+c"(__n)
534 :
535 : "memory");
536#endif
Logan Chien969aea62018-12-05 18:40:57 +0800537}
538static __inline__ void __DEFAULT_FN_ATTRS
539__stosd(unsigned long *__dst, unsigned long __x, size_t __n) {
Pirama Arumuga Nainar494f6452021-12-02 10:42:14 -0800540 __asm__ __volatile__("rep stosl"
541 : "+D"(__dst), "+c"(__n)
542 : "a"(__x)
Logan Chien969aea62018-12-05 18:40:57 +0800543 : "memory");
544}
545static __inline__ void __DEFAULT_FN_ATTRS
546__stosw(unsigned short *__dst, unsigned short __x, size_t __n) {
Pirama Arumuga Nainar494f6452021-12-02 10:42:14 -0800547 __asm__ __volatile__("rep stosw"
548 : "+D"(__dst), "+c"(__n)
549 : "a"(__x)
Logan Chien969aea62018-12-05 18:40:57 +0800550 : "memory");
551}
552#endif
553#ifdef __x86_64__
554static __inline__ void __DEFAULT_FN_ATTRS
555__movsq(unsigned long long *__dst, unsigned long long const *__src, size_t __n) {
Pirama Arumuga Nainar494f6452021-12-02 10:42:14 -0800556 __asm__ __volatile__("rep movsq"
557 : "+D"(__dst), "+S"(__src), "+c"(__n)
558 :
559 : "memory");
Logan Chien969aea62018-12-05 18:40:57 +0800560}
561static __inline__ void __DEFAULT_FN_ATTRS
562__stosq(unsigned __int64 *__dst, unsigned __int64 __x, size_t __n) {
563 __asm__ __volatile__("rep stosq" : "+D"(__dst), "+c"(__n) : "a"(__x)
564 : "memory");
565}
566#endif
567
568/*----------------------------------------------------------------------------*\
569|* Misc
570\*----------------------------------------------------------------------------*/
571#if defined(__i386__) || defined(__x86_64__)
Pirama Arumuga Nainar7e1f8392021-08-16 17:30:48 -0700572#if defined(__i386__)
573#define __cpuid_count(__leaf, __count, __eax, __ebx, __ecx, __edx) \
574 __asm("cpuid" \
575 : "=a"(__eax), "=b"(__ebx), "=c"(__ecx), "=d"(__edx) \
576 : "0"(__leaf), "2"(__count))
577#else
578/* x86-64 uses %rbx as the base register, so preserve it. */
579#define __cpuid_count(__leaf, __count, __eax, __ebx, __ecx, __edx) \
580 __asm("xchgq %%rbx,%q1\n" \
581 "cpuid\n" \
582 "xchgq %%rbx,%q1" \
583 : "=a"(__eax), "=r"(__ebx), "=c"(__ecx), "=d"(__edx) \
584 : "0"(__leaf), "2"(__count))
585#endif
586static __inline__ void __DEFAULT_FN_ATTRS __cpuid(int __info[4], int __level) {
587 __cpuid_count(__level, 0, __info[0], __info[1], __info[2], __info[3]);
Logan Chien969aea62018-12-05 18:40:57 +0800588}
Pirama Arumuga Nainar7e1f8392021-08-16 17:30:48 -0700589static __inline__ void __DEFAULT_FN_ATTRS __cpuidex(int __info[4], int __level,
590 int __ecx) {
591 __cpuid_count(__level, __ecx, __info[0], __info[1], __info[2], __info[3]);
Logan Chien969aea62018-12-05 18:40:57 +0800592}
Pirama Arumuga Nainar7e1f8392021-08-16 17:30:48 -0700593static __inline__ void __DEFAULT_FN_ATTRS __halt(void) {
594 __asm__ volatile("hlt");
Logan Chien969aea62018-12-05 18:40:57 +0800595}
Logan Chiendbcf4122019-03-21 10:50:25 +0800596#endif
597
598#if defined(__i386__) || defined(__x86_64__) || defined(__aarch64__)
Pirama Arumuga Nainar7e1f8392021-08-16 17:30:48 -0700599static __inline__ void __DEFAULT_FN_ATTRS __nop(void) {
600 __asm__ volatile("nop");
Logan Chien969aea62018-12-05 18:40:57 +0800601}
602#endif
603
604/*----------------------------------------------------------------------------*\
605|* MS AArch64 specific
606\*----------------------------------------------------------------------------*/
607#if defined(__aarch64__)
608unsigned __int64 __getReg(int);
609long _InterlockedAdd(long volatile *Addend, long Value);
Logan Chiendbcf4122019-03-21 10:50:25 +0800610__int64 _ReadStatusReg(int);
611void _WriteStatusReg(int, __int64);
612
613unsigned short __cdecl _byteswap_ushort(unsigned short val);
614unsigned long __cdecl _byteswap_ulong (unsigned long val);
615unsigned __int64 __cdecl _byteswap_uint64(unsigned __int64 val);
Pirama Arumuga Nainar494f6452021-12-02 10:42:14 -0800616
617__int64 __mulh(__int64 __a, __int64 __b);
618unsigned __int64 __umulh(unsigned __int64 __a, unsigned __int64 __b);
Logan Chien969aea62018-12-05 18:40:57 +0800619#endif
620
621/*----------------------------------------------------------------------------*\
622|* Privileged intrinsics
623\*----------------------------------------------------------------------------*/
624#if defined(__i386__) || defined(__x86_64__)
625static __inline__ unsigned __int64 __DEFAULT_FN_ATTRS
626__readmsr(unsigned long __register) {
627 // Loads the contents of a 64-bit model specific register (MSR) specified in
628 // the ECX register into registers EDX:EAX. The EDX register is loaded with
629 // the high-order 32 bits of the MSR and the EAX register is loaded with the
630 // low-order 32 bits. If less than 64 bits are implemented in the MSR being
631 // read, the values returned to EDX:EAX in unimplemented bit locations are
632 // undefined.
633 unsigned long __edx;
634 unsigned long __eax;
635 __asm__ ("rdmsr" : "=d"(__edx), "=a"(__eax) : "c"(__register));
636 return (((unsigned __int64)__edx) << 32) | (unsigned __int64)__eax;
637}
Sasha Smundak746b0222020-02-25 09:19:04 -0800638#endif
Logan Chien969aea62018-12-05 18:40:57 +0800639
Sasha Smundak746b0222020-02-25 09:19:04 -0800640static __inline__ unsigned __LPTRINT_TYPE__ __DEFAULT_FN_ATTRS
Logan Chien969aea62018-12-05 18:40:57 +0800641__readcr3(void) {
Sasha Smundak746b0222020-02-25 09:19:04 -0800642 unsigned __LPTRINT_TYPE__ __cr3_val;
643 __asm__ __volatile__ ("mov %%cr3, %0" : "=r"(__cr3_val) : : "memory");
Logan Chien969aea62018-12-05 18:40:57 +0800644 return __cr3_val;
645}
646
647static __inline__ void __DEFAULT_FN_ATTRS
Sasha Smundak746b0222020-02-25 09:19:04 -0800648__writecr3(unsigned __INTPTR_TYPE__ __cr3_val) {
649 __asm__ ("mov %0, %%cr3" : : "r"(__cr3_val) : "memory");
Logan Chien969aea62018-12-05 18:40:57 +0800650}
Logan Chien969aea62018-12-05 18:40:57 +0800651
652#ifdef __cplusplus
653}
654#endif
655
Sasha Smundak746b0222020-02-25 09:19:04 -0800656#undef __LPTRINT_TYPE__
657
Logan Chien969aea62018-12-05 18:40:57 +0800658#undef __DEFAULT_FN_ATTRS
659
660#endif /* __INTRIN_H */
661#endif /* _MSC_VER */