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Logan Chien969aea62018-12-05 18:40:57 +08001/* ===-------- intrin.h ---------------------------------------------------===
2 *
Logan Chiendf4f7662019-09-04 16:45:23 -07003 * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 * See https://llvm.org/LICENSE.txt for license information.
5 * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
Logan Chien969aea62018-12-05 18:40:57 +08006 *
7 *===-----------------------------------------------------------------------===
8 */
9
10/* Only include this if we're compiling for the windows platform. */
11#ifndef _MSC_VER
12#include_next <intrin.h>
13#else
14
15#ifndef __INTRIN_H
16#define __INTRIN_H
17
18/* First include the standard intrinsics. */
19#if defined(__i386__) || defined(__x86_64__)
20#include <x86intrin.h>
21#endif
22
23#if defined(__arm__)
24#include <armintr.h>
25#endif
26
27#if defined(__aarch64__)
28#include <arm64intr.h>
29#endif
30
31/* For the definition of jmp_buf. */
32#if __STDC_HOSTED__
33#include <setjmp.h>
34#endif
35
36/* Define the default attributes for the functions in this file. */
37#define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__))
38
Sasha Smundak746b0222020-02-25 09:19:04 -080039#if __x86_64__
40#define __LPTRINT_TYPE__ __int64
41#else
42#define __LPTRINT_TYPE__ long
43#endif
44
Logan Chien969aea62018-12-05 18:40:57 +080045#ifdef __cplusplus
46extern "C" {
47#endif
48
49#if defined(__MMX__)
50/* And the random ones that aren't in those files. */
51__m64 _m_from_float(float);
52float _m_to_float(__m64);
53#endif
54
55/* Other assorted instruction intrinsics. */
56void __addfsbyte(unsigned long, unsigned char);
57void __addfsdword(unsigned long, unsigned long);
58void __addfsword(unsigned long, unsigned short);
59void __code_seg(const char *);
Logan Chien969aea62018-12-05 18:40:57 +080060void __cpuid(int[4], int);
Logan Chien969aea62018-12-05 18:40:57 +080061void __cpuidex(int[4], int, int);
Logan Chien969aea62018-12-05 18:40:57 +080062__int64 __emul(int, int);
Logan Chien969aea62018-12-05 18:40:57 +080063unsigned __int64 __emulu(unsigned int, unsigned int);
64unsigned int __getcallerseflags(void);
Logan Chien969aea62018-12-05 18:40:57 +080065void __halt(void);
66unsigned char __inbyte(unsigned short);
67void __inbytestring(unsigned short, unsigned char *, unsigned long);
68void __incfsbyte(unsigned long);
69void __incfsdword(unsigned long);
70void __incfsword(unsigned long);
71unsigned long __indword(unsigned short);
72void __indwordstring(unsigned short, unsigned long *, unsigned long);
73void __int2c(void);
74void __invlpg(void *);
75unsigned short __inword(unsigned short);
76void __inwordstring(unsigned short, unsigned short *, unsigned long);
77void __lidt(void *);
78unsigned __int64 __ll_lshift(unsigned __int64, int);
79__int64 __ll_rshift(__int64, int);
Logan Chien969aea62018-12-05 18:40:57 +080080void __movsb(unsigned char *, unsigned char const *, size_t);
Logan Chien969aea62018-12-05 18:40:57 +080081void __movsd(unsigned long *, unsigned long const *, size_t);
Logan Chien969aea62018-12-05 18:40:57 +080082void __movsw(unsigned short *, unsigned short const *, size_t);
Logan Chien969aea62018-12-05 18:40:57 +080083void __nop(void);
84void __nvreg_restore_fence(void);
85void __nvreg_save_fence(void);
86void __outbyte(unsigned short, unsigned char);
87void __outbytestring(unsigned short, unsigned char *, unsigned long);
88void __outdword(unsigned short, unsigned long);
89void __outdwordstring(unsigned short, unsigned long *, unsigned long);
90void __outword(unsigned short, unsigned short);
91void __outwordstring(unsigned short, unsigned short *, unsigned long);
92unsigned long __readcr0(void);
93unsigned long __readcr2(void);
Sasha Smundak746b0222020-02-25 09:19:04 -080094unsigned __LPTRINT_TYPE__ __readcr3(void);
Logan Chien969aea62018-12-05 18:40:57 +080095unsigned long __readcr4(void);
96unsigned long __readcr8(void);
97unsigned int __readdr(unsigned int);
98#ifdef __i386__
Logan Chien969aea62018-12-05 18:40:57 +080099unsigned char __readfsbyte(unsigned long);
Logan Chien969aea62018-12-05 18:40:57 +0800100unsigned short __readfsword(unsigned long);
Pirama Arumuga Nainar494f6452021-12-02 10:42:14 -0800101unsigned long __readfsdword(unsigned long);
Pirama Arumuga Nainar494f6452021-12-02 10:42:14 -0800102unsigned __int64 __readfsqword(unsigned long);
Logan Chien969aea62018-12-05 18:40:57 +0800103#endif
Logan Chien969aea62018-12-05 18:40:57 +0800104unsigned __int64 __readmsr(unsigned long);
105unsigned __int64 __readpmc(unsigned long);
106unsigned long __segmentlimit(unsigned long);
107void __sidt(void *);
Logan Chien969aea62018-12-05 18:40:57 +0800108void __stosb(unsigned char *, unsigned char, size_t);
Logan Chien969aea62018-12-05 18:40:57 +0800109void __stosd(unsigned long *, unsigned long, size_t);
Logan Chien969aea62018-12-05 18:40:57 +0800110void __stosw(unsigned short *, unsigned short, size_t);
111void __svm_clgi(void);
112void __svm_invlpga(void *, int);
113void __svm_skinit(int);
114void __svm_stgi(void);
115void __svm_vmload(size_t);
116void __svm_vmrun(size_t);
117void __svm_vmsave(size_t);
118void __ud2(void);
119unsigned __int64 __ull_rshift(unsigned __int64, int);
120void __vmx_off(void);
121void __vmx_vmptrst(unsigned __int64 *);
122void __wbinvd(void);
123void __writecr0(unsigned int);
Sasha Smundak746b0222020-02-25 09:19:04 -0800124void __writecr3(unsigned __INTPTR_TYPE__);
Logan Chien969aea62018-12-05 18:40:57 +0800125void __writecr4(unsigned int);
126void __writecr8(unsigned int);
127void __writedr(unsigned int, unsigned int);
128void __writefsbyte(unsigned long, unsigned char);
129void __writefsdword(unsigned long, unsigned long);
130void __writefsqword(unsigned long, unsigned __int64);
131void __writefsword(unsigned long, unsigned short);
132void __writemsr(unsigned long, unsigned __int64);
Logan Chien969aea62018-12-05 18:40:57 +0800133void *_AddressOfReturnAddress(void);
Logan Chien969aea62018-12-05 18:40:57 +0800134unsigned char _BitScanForward(unsigned long *_Index, unsigned long _Mask);
Logan Chien969aea62018-12-05 18:40:57 +0800135unsigned char _BitScanReverse(unsigned long *_Index, unsigned long _Mask);
136unsigned char _bittest(long const *, long);
137unsigned char _bittestandcomplement(long *, long);
138unsigned char _bittestandreset(long *, long);
139unsigned char _bittestandset(long *, long);
140void __cdecl _disable(void);
141void __cdecl _enable(void);
142long _InterlockedAddLargeStatistic(__int64 volatile *_Addend, long _Value);
143unsigned char _interlockedbittestandreset(long volatile *, long);
144unsigned char _interlockedbittestandset(long volatile *, long);
145void *_InterlockedCompareExchangePointer_HLEAcquire(void *volatile *, void *,
146 void *);
147void *_InterlockedCompareExchangePointer_HLERelease(void *volatile *, void *,
148 void *);
149long _InterlockedExchangeAdd_HLEAcquire(long volatile *, long);
150long _InterlockedExchangeAdd_HLERelease(long volatile *, long);
151__int64 _InterlockedExchangeAdd64_HLEAcquire(__int64 volatile *, __int64);
152__int64 _InterlockedExchangeAdd64_HLERelease(__int64 volatile *, __int64);
Pirama Arumuga Nainarec8c89d2022-02-23 09:26:16 -0800153void _ReadBarrier(void);
154void _ReadWriteBarrier(void);
Logan Chien969aea62018-12-05 18:40:57 +0800155unsigned int _rorx_u32(unsigned int, const unsigned int);
156int _sarx_i32(int, unsigned int);
157#if __STDC_HOSTED__
158int __cdecl _setjmp(jmp_buf);
159#endif
160unsigned int _shlx_u32(unsigned int, unsigned int);
161unsigned int _shrx_u32(unsigned int, unsigned int);
162void _Store_HLERelease(long volatile *, long);
163void _Store64_HLERelease(__int64 volatile *, __int64);
164void _StorePointer_HLERelease(void *volatile *, void *);
Pirama Arumuga Nainarec8c89d2022-02-23 09:26:16 -0800165void _WriteBarrier(void);
Logan Chien969aea62018-12-05 18:40:57 +0800166unsigned __int32 xbegin(void);
167void _xend(void);
Logan Chien969aea62018-12-05 18:40:57 +0800168
169/* These additional intrinsics are turned on in x64/amd64/x86_64 mode. */
170#ifdef __x86_64__
171void __addgsbyte(unsigned long, unsigned char);
172void __addgsdword(unsigned long, unsigned long);
173void __addgsqword(unsigned long, unsigned __int64);
174void __addgsword(unsigned long, unsigned short);
Logan Chien969aea62018-12-05 18:40:57 +0800175void __faststorefence(void);
176void __incgsbyte(unsigned long);
177void __incgsdword(unsigned long);
178void __incgsqword(unsigned long);
179void __incgsword(unsigned long);
Logan Chien969aea62018-12-05 18:40:57 +0800180void __movsq(unsigned long long *, unsigned long long const *, size_t);
Logan Chien969aea62018-12-05 18:40:57 +0800181unsigned char __readgsbyte(unsigned long);
Logan Chien969aea62018-12-05 18:40:57 +0800182unsigned long __readgsdword(unsigned long);
Logan Chien969aea62018-12-05 18:40:57 +0800183unsigned __int64 __readgsqword(unsigned long);
184unsigned short __readgsword(unsigned long);
185unsigned __int64 __shiftleft128(unsigned __int64 _LowPart,
186 unsigned __int64 _HighPart,
187 unsigned char _Shift);
188unsigned __int64 __shiftright128(unsigned __int64 _LowPart,
189 unsigned __int64 _HighPart,
190 unsigned char _Shift);
Logan Chien969aea62018-12-05 18:40:57 +0800191void __stosq(unsigned __int64 *, unsigned __int64, size_t);
192unsigned char __vmx_on(unsigned __int64 *);
193unsigned char __vmx_vmclear(unsigned __int64 *);
194unsigned char __vmx_vmlaunch(void);
195unsigned char __vmx_vmptrld(unsigned __int64 *);
196unsigned char __vmx_vmread(size_t, size_t *);
197unsigned char __vmx_vmresume(void);
198unsigned char __vmx_vmwrite(size_t, size_t);
199void __writegsbyte(unsigned long, unsigned char);
200void __writegsdword(unsigned long, unsigned long);
201void __writegsqword(unsigned long, unsigned __int64);
202void __writegsword(unsigned long, unsigned short);
203unsigned char _bittest64(__int64 const *, __int64);
204unsigned char _bittestandcomplement64(__int64 *, __int64);
205unsigned char _bittestandreset64(__int64 *, __int64);
206unsigned char _bittestandset64(__int64 *, __int64);
207long _InterlockedAnd_np(long volatile *_Value, long _Mask);
208short _InterlockedAnd16_np(short volatile *_Value, short _Mask);
209__int64 _InterlockedAnd64_np(__int64 volatile *_Value, __int64 _Mask);
210char _InterlockedAnd8_np(char volatile *_Value, char _Mask);
211unsigned char _interlockedbittestandreset64(__int64 volatile *, __int64);
212unsigned char _interlockedbittestandset64(__int64 volatile *, __int64);
213long _InterlockedCompareExchange_np(long volatile *_Destination, long _Exchange,
214 long _Comparand);
Logan Chien969aea62018-12-05 18:40:57 +0800215unsigned char _InterlockedCompareExchange128_np(__int64 volatile *_Destination,
216 __int64 _ExchangeHigh,
217 __int64 _ExchangeLow,
218 __int64 *_ComparandResult);
219short _InterlockedCompareExchange16_np(short volatile *_Destination,
220 short _Exchange, short _Comparand);
221__int64 _InterlockedCompareExchange64_np(__int64 volatile *_Destination,
222 __int64 _Exchange, __int64 _Comparand);
223void *_InterlockedCompareExchangePointer_np(void *volatile *_Destination,
224 void *_Exchange, void *_Comparand);
225long _InterlockedOr_np(long volatile *_Value, long _Mask);
226short _InterlockedOr16_np(short volatile *_Value, short _Mask);
227__int64 _InterlockedOr64_np(__int64 volatile *_Value, __int64 _Mask);
228char _InterlockedOr8_np(char volatile *_Value, char _Mask);
229long _InterlockedXor_np(long volatile *_Value, long _Mask);
230short _InterlockedXor16_np(short volatile *_Value, short _Mask);
231__int64 _InterlockedXor64_np(__int64 volatile *_Value, __int64 _Mask);
232char _InterlockedXor8_np(char volatile *_Value, char _Mask);
233unsigned __int64 _rorx_u64(unsigned __int64, const unsigned int);
234__int64 _sarx_i64(__int64, unsigned int);
235unsigned __int64 _shlx_u64(unsigned __int64, unsigned int);
236unsigned __int64 _shrx_u64(unsigned __int64, unsigned int);
Logan Chien969aea62018-12-05 18:40:57 +0800237__int64 __mulh(__int64, __int64);
Logan Chien969aea62018-12-05 18:40:57 +0800238unsigned __int64 __umulh(unsigned __int64, unsigned __int64);
Logan Chien969aea62018-12-05 18:40:57 +0800239__int64 _mul128(__int64, __int64, __int64*);
Logan Chien969aea62018-12-05 18:40:57 +0800240unsigned __int64 _umul128(unsigned __int64,
241 unsigned __int64,
242 unsigned __int64*);
243
244#endif /* __x86_64__ */
245
246#if defined(__x86_64__) || defined(__arm__) || defined(__aarch64__)
247
Logan Chien969aea62018-12-05 18:40:57 +0800248unsigned char _BitScanForward64(unsigned long *_Index, unsigned __int64 _Mask);
Logan Chien969aea62018-12-05 18:40:57 +0800249unsigned char _BitScanReverse64(unsigned long *_Index, unsigned __int64 _Mask);
250
Sasha Smundak0fc590b2020-10-07 08:11:59 -0700251#endif
252
253#if defined(__i386__) || defined(__x86_64__) || defined(__arm__) || defined(__aarch64__)
Logan Chien969aea62018-12-05 18:40:57 +0800254__int64 _InterlockedDecrement64(__int64 volatile *_Addend);
Logan Chien969aea62018-12-05 18:40:57 +0800255__int64 _InterlockedExchange64(__int64 volatile *_Target, __int64 _Value);
Logan Chien969aea62018-12-05 18:40:57 +0800256__int64 _InterlockedExchangeAdd64(__int64 volatile *_Addend, __int64 _Value);
Logan Chien969aea62018-12-05 18:40:57 +0800257__int64 _InterlockedExchangeSub64(__int64 volatile *_Subend, __int64 _Value);
Logan Chien969aea62018-12-05 18:40:57 +0800258__int64 _InterlockedIncrement64(__int64 volatile *_Addend);
Logan Chien969aea62018-12-05 18:40:57 +0800259__int64 _InterlockedOr64(__int64 volatile *_Value, __int64 _Mask);
Logan Chien969aea62018-12-05 18:40:57 +0800260__int64 _InterlockedXor64(__int64 volatile *_Value, __int64 _Mask);
Logan Chien969aea62018-12-05 18:40:57 +0800261__int64 _InterlockedAnd64(__int64 volatile *_Value, __int64 _Mask);
262
263#endif
264
265/*----------------------------------------------------------------------------*\
266|* Interlocked Exchange Add
267\*----------------------------------------------------------------------------*/
268#if defined(__arm__) || defined(__aarch64__)
269char _InterlockedExchangeAdd8_acq(char volatile *_Addend, char _Value);
270char _InterlockedExchangeAdd8_nf(char volatile *_Addend, char _Value);
271char _InterlockedExchangeAdd8_rel(char volatile *_Addend, char _Value);
272short _InterlockedExchangeAdd16_acq(short volatile *_Addend, short _Value);
273short _InterlockedExchangeAdd16_nf(short volatile *_Addend, short _Value);
274short _InterlockedExchangeAdd16_rel(short volatile *_Addend, short _Value);
275long _InterlockedExchangeAdd_acq(long volatile *_Addend, long _Value);
276long _InterlockedExchangeAdd_nf(long volatile *_Addend, long _Value);
277long _InterlockedExchangeAdd_rel(long volatile *_Addend, long _Value);
278__int64 _InterlockedExchangeAdd64_acq(__int64 volatile *_Addend, __int64 _Value);
279__int64 _InterlockedExchangeAdd64_nf(__int64 volatile *_Addend, __int64 _Value);
280__int64 _InterlockedExchangeAdd64_rel(__int64 volatile *_Addend, __int64 _Value);
281#endif
282/*----------------------------------------------------------------------------*\
283|* Interlocked Increment
284\*----------------------------------------------------------------------------*/
285#if defined(__arm__) || defined(__aarch64__)
286short _InterlockedIncrement16_acq(short volatile *_Value);
287short _InterlockedIncrement16_nf(short volatile *_Value);
288short _InterlockedIncrement16_rel(short volatile *_Value);
289long _InterlockedIncrement_acq(long volatile *_Value);
290long _InterlockedIncrement_nf(long volatile *_Value);
291long _InterlockedIncrement_rel(long volatile *_Value);
292__int64 _InterlockedIncrement64_acq(__int64 volatile *_Value);
293__int64 _InterlockedIncrement64_nf(__int64 volatile *_Value);
294__int64 _InterlockedIncrement64_rel(__int64 volatile *_Value);
295#endif
296/*----------------------------------------------------------------------------*\
297|* Interlocked Decrement
298\*----------------------------------------------------------------------------*/
299#if defined(__arm__) || defined(__aarch64__)
300short _InterlockedDecrement16_acq(short volatile *_Value);
301short _InterlockedDecrement16_nf(short volatile *_Value);
302short _InterlockedDecrement16_rel(short volatile *_Value);
303long _InterlockedDecrement_acq(long volatile *_Value);
304long _InterlockedDecrement_nf(long volatile *_Value);
305long _InterlockedDecrement_rel(long volatile *_Value);
306__int64 _InterlockedDecrement64_acq(__int64 volatile *_Value);
307__int64 _InterlockedDecrement64_nf(__int64 volatile *_Value);
308__int64 _InterlockedDecrement64_rel(__int64 volatile *_Value);
309#endif
310/*----------------------------------------------------------------------------*\
311|* Interlocked And
312\*----------------------------------------------------------------------------*/
313#if defined(__arm__) || defined(__aarch64__)
314char _InterlockedAnd8_acq(char volatile *_Value, char _Mask);
315char _InterlockedAnd8_nf(char volatile *_Value, char _Mask);
316char _InterlockedAnd8_rel(char volatile *_Value, char _Mask);
317short _InterlockedAnd16_acq(short volatile *_Value, short _Mask);
318short _InterlockedAnd16_nf(short volatile *_Value, short _Mask);
319short _InterlockedAnd16_rel(short volatile *_Value, short _Mask);
320long _InterlockedAnd_acq(long volatile *_Value, long _Mask);
321long _InterlockedAnd_nf(long volatile *_Value, long _Mask);
322long _InterlockedAnd_rel(long volatile *_Value, long _Mask);
323__int64 _InterlockedAnd64_acq(__int64 volatile *_Value, __int64 _Mask);
324__int64 _InterlockedAnd64_nf(__int64 volatile *_Value, __int64 _Mask);
325__int64 _InterlockedAnd64_rel(__int64 volatile *_Value, __int64 _Mask);
326#endif
327/*----------------------------------------------------------------------------*\
328|* Bit Counting and Testing
329\*----------------------------------------------------------------------------*/
330#if defined(__arm__) || defined(__aarch64__)
331unsigned char _interlockedbittestandset_acq(long volatile *_BitBase,
332 long _BitPos);
333unsigned char _interlockedbittestandset_nf(long volatile *_BitBase,
334 long _BitPos);
335unsigned char _interlockedbittestandset_rel(long volatile *_BitBase,
336 long _BitPos);
337unsigned char _interlockedbittestandreset_acq(long volatile *_BitBase,
338 long _BitPos);
339unsigned char _interlockedbittestandreset_nf(long volatile *_BitBase,
340 long _BitPos);
341unsigned char _interlockedbittestandreset_rel(long volatile *_BitBase,
342 long _BitPos);
343#endif
344/*----------------------------------------------------------------------------*\
345|* Interlocked Or
346\*----------------------------------------------------------------------------*/
347#if defined(__arm__) || defined(__aarch64__)
348char _InterlockedOr8_acq(char volatile *_Value, char _Mask);
349char _InterlockedOr8_nf(char volatile *_Value, char _Mask);
350char _InterlockedOr8_rel(char volatile *_Value, char _Mask);
351short _InterlockedOr16_acq(short volatile *_Value, short _Mask);
352short _InterlockedOr16_nf(short volatile *_Value, short _Mask);
353short _InterlockedOr16_rel(short volatile *_Value, short _Mask);
354long _InterlockedOr_acq(long volatile *_Value, long _Mask);
355long _InterlockedOr_nf(long volatile *_Value, long _Mask);
356long _InterlockedOr_rel(long volatile *_Value, long _Mask);
357__int64 _InterlockedOr64_acq(__int64 volatile *_Value, __int64 _Mask);
358__int64 _InterlockedOr64_nf(__int64 volatile *_Value, __int64 _Mask);
359__int64 _InterlockedOr64_rel(__int64 volatile *_Value, __int64 _Mask);
360#endif
361/*----------------------------------------------------------------------------*\
362|* Interlocked Xor
363\*----------------------------------------------------------------------------*/
364#if defined(__arm__) || defined(__aarch64__)
365char _InterlockedXor8_acq(char volatile *_Value, char _Mask);
366char _InterlockedXor8_nf(char volatile *_Value, char _Mask);
367char _InterlockedXor8_rel(char volatile *_Value, char _Mask);
368short _InterlockedXor16_acq(short volatile *_Value, short _Mask);
369short _InterlockedXor16_nf(short volatile *_Value, short _Mask);
370short _InterlockedXor16_rel(short volatile *_Value, short _Mask);
371long _InterlockedXor_acq(long volatile *_Value, long _Mask);
372long _InterlockedXor_nf(long volatile *_Value, long _Mask);
373long _InterlockedXor_rel(long volatile *_Value, long _Mask);
374__int64 _InterlockedXor64_acq(__int64 volatile *_Value, __int64 _Mask);
375__int64 _InterlockedXor64_nf(__int64 volatile *_Value, __int64 _Mask);
376__int64 _InterlockedXor64_rel(__int64 volatile *_Value, __int64 _Mask);
377#endif
378/*----------------------------------------------------------------------------*\
379|* Interlocked Exchange
380\*----------------------------------------------------------------------------*/
381#if defined(__arm__) || defined(__aarch64__)
382char _InterlockedExchange8_acq(char volatile *_Target, char _Value);
383char _InterlockedExchange8_nf(char volatile *_Target, char _Value);
384char _InterlockedExchange8_rel(char volatile *_Target, char _Value);
385short _InterlockedExchange16_acq(short volatile *_Target, short _Value);
386short _InterlockedExchange16_nf(short volatile *_Target, short _Value);
387short _InterlockedExchange16_rel(short volatile *_Target, short _Value);
388long _InterlockedExchange_acq(long volatile *_Target, long _Value);
389long _InterlockedExchange_nf(long volatile *_Target, long _Value);
390long _InterlockedExchange_rel(long volatile *_Target, long _Value);
391__int64 _InterlockedExchange64_acq(__int64 volatile *_Target, __int64 _Value);
392__int64 _InterlockedExchange64_nf(__int64 volatile *_Target, __int64 _Value);
393__int64 _InterlockedExchange64_rel(__int64 volatile *_Target, __int64 _Value);
394#endif
395/*----------------------------------------------------------------------------*\
396|* Interlocked Compare Exchange
397\*----------------------------------------------------------------------------*/
398#if defined(__arm__) || defined(__aarch64__)
399char _InterlockedCompareExchange8_acq(char volatile *_Destination,
400 char _Exchange, char _Comparand);
401char _InterlockedCompareExchange8_nf(char volatile *_Destination,
402 char _Exchange, char _Comparand);
403char _InterlockedCompareExchange8_rel(char volatile *_Destination,
404 char _Exchange, char _Comparand);
405short _InterlockedCompareExchange16_acq(short volatile *_Destination,
406 short _Exchange, short _Comparand);
407short _InterlockedCompareExchange16_nf(short volatile *_Destination,
408 short _Exchange, short _Comparand);
409short _InterlockedCompareExchange16_rel(short volatile *_Destination,
410 short _Exchange, short _Comparand);
411long _InterlockedCompareExchange_acq(long volatile *_Destination,
412 long _Exchange, long _Comparand);
413long _InterlockedCompareExchange_nf(long volatile *_Destination,
414 long _Exchange, long _Comparand);
415long _InterlockedCompareExchange_rel(long volatile *_Destination,
416 long _Exchange, long _Comparand);
417__int64 _InterlockedCompareExchange64_acq(__int64 volatile *_Destination,
418 __int64 _Exchange, __int64 _Comparand);
419__int64 _InterlockedCompareExchange64_nf(__int64 volatile *_Destination,
420 __int64 _Exchange, __int64 _Comparand);
421__int64 _InterlockedCompareExchange64_rel(__int64 volatile *_Destination,
422 __int64 _Exchange, __int64 _Comparand);
423#endif
Pirama Arumuga Nainar986b8802021-06-03 16:00:34 -0700424#if defined(__x86_64__) || defined(__aarch64__)
425unsigned char _InterlockedCompareExchange128(__int64 volatile *_Destination,
426 __int64 _ExchangeHigh,
427 __int64 _ExchangeLow,
428 __int64 *_ComparandResult);
429#endif
430#if defined(__aarch64__)
431unsigned char _InterlockedCompareExchange128_acq(__int64 volatile *_Destination,
432 __int64 _ExchangeHigh,
433 __int64 _ExchangeLow,
434 __int64 *_ComparandResult);
435unsigned char _InterlockedCompareExchange128_nf(__int64 volatile *_Destination,
436 __int64 _ExchangeHigh,
437 __int64 _ExchangeLow,
438 __int64 *_ComparandResult);
439unsigned char _InterlockedCompareExchange128_rel(__int64 volatile *_Destination,
440 __int64 _ExchangeHigh,
441 __int64 _ExchangeLow,
442 __int64 *_ComparandResult);
443#endif
Logan Chien969aea62018-12-05 18:40:57 +0800444
445/*----------------------------------------------------------------------------*\
446|* movs, stos
447\*----------------------------------------------------------------------------*/
448#if defined(__i386__) || defined(__x86_64__)
Pirama Arumuga Nainarec8c89d2022-02-23 09:26:16 -0800449static __inline__ void __DEFAULT_FN_ATTRS __movsb(unsigned char *__dst,
450 unsigned char const *__src,
451 size_t __n) {
Pirama Arumuga Nainar494f6452021-12-02 10:42:14 -0800452#if defined(__x86_64__)
453 __asm__ __volatile__("rep movsb"
454 : "+D"(__dst), "+S"(__src), "+c"(__n)
455 :
456 : "memory");
457#else
Pirama Arumuga Nainarec8c89d2022-02-23 09:26:16 -0800458 __asm__ __volatile__("xchg {%%esi, %1|%1, esi}\n"
459 "rep movsb\n"
460 "xchg {%%esi, %1|%1, esi}"
Pirama Arumuga Nainar494f6452021-12-02 10:42:14 -0800461 : "+D"(__dst), "+r"(__src), "+c"(__n)
462 :
463 : "memory");
464#endif
Logan Chien969aea62018-12-05 18:40:57 +0800465}
Pirama Arumuga Nainarec8c89d2022-02-23 09:26:16 -0800466static __inline__ void __DEFAULT_FN_ATTRS __movsd(unsigned long *__dst,
467 unsigned long const *__src,
468 size_t __n) {
Pirama Arumuga Nainar494f6452021-12-02 10:42:14 -0800469#if defined(__x86_64__)
Pirama Arumuga Nainarec8c89d2022-02-23 09:26:16 -0800470 __asm__ __volatile__("rep movs{l|d}"
Pirama Arumuga Nainar494f6452021-12-02 10:42:14 -0800471 : "+D"(__dst), "+S"(__src), "+c"(__n)
472 :
473 : "memory");
474#else
Pirama Arumuga Nainarec8c89d2022-02-23 09:26:16 -0800475 __asm__ __volatile__("xchg {%%esi, %1|%1, esi}\n"
476 "rep movs{l|d}\n"
477 "xchg {%%esi, %1|%1, esi}"
Pirama Arumuga Nainar494f6452021-12-02 10:42:14 -0800478 : "+D"(__dst), "+r"(__src), "+c"(__n)
479 :
480 : "memory");
481#endif
Logan Chien969aea62018-12-05 18:40:57 +0800482}
Pirama Arumuga Nainarec8c89d2022-02-23 09:26:16 -0800483static __inline__ void __DEFAULT_FN_ATTRS __movsw(unsigned short *__dst,
484 unsigned short const *__src,
485 size_t __n) {
Pirama Arumuga Nainar494f6452021-12-02 10:42:14 -0800486#if defined(__x86_64__)
487 __asm__ __volatile__("rep movsw"
488 : "+D"(__dst), "+S"(__src), "+c"(__n)
489 :
490 : "memory");
491#else
Pirama Arumuga Nainarec8c89d2022-02-23 09:26:16 -0800492 __asm__ __volatile__("xchg {%%esi, %1|%1, esi}\n"
493 "rep movsw\n"
494 "xchg {%%esi, %1|%1, esi}"
Pirama Arumuga Nainar494f6452021-12-02 10:42:14 -0800495 : "+D"(__dst), "+r"(__src), "+c"(__n)
496 :
497 : "memory");
498#endif
Logan Chien969aea62018-12-05 18:40:57 +0800499}
Pirama Arumuga Nainarec8c89d2022-02-23 09:26:16 -0800500static __inline__ void __DEFAULT_FN_ATTRS __stosd(unsigned long *__dst,
501 unsigned long __x,
502 size_t __n) {
503 __asm__ __volatile__("rep stos{l|d}"
Pirama Arumuga Nainar494f6452021-12-02 10:42:14 -0800504 : "+D"(__dst), "+c"(__n)
505 : "a"(__x)
Logan Chien969aea62018-12-05 18:40:57 +0800506 : "memory");
507}
Pirama Arumuga Nainarec8c89d2022-02-23 09:26:16 -0800508static __inline__ void __DEFAULT_FN_ATTRS __stosw(unsigned short *__dst,
509 unsigned short __x,
510 size_t __n) {
Pirama Arumuga Nainar494f6452021-12-02 10:42:14 -0800511 __asm__ __volatile__("rep stosw"
512 : "+D"(__dst), "+c"(__n)
513 : "a"(__x)
Logan Chien969aea62018-12-05 18:40:57 +0800514 : "memory");
515}
516#endif
517#ifdef __x86_64__
Pirama Arumuga Nainarec8c89d2022-02-23 09:26:16 -0800518static __inline__ void __DEFAULT_FN_ATTRS __movsq(
519 unsigned long long *__dst, unsigned long long const *__src, size_t __n) {
Pirama Arumuga Nainar494f6452021-12-02 10:42:14 -0800520 __asm__ __volatile__("rep movsq"
521 : "+D"(__dst), "+S"(__src), "+c"(__n)
522 :
523 : "memory");
Logan Chien969aea62018-12-05 18:40:57 +0800524}
Pirama Arumuga Nainarec8c89d2022-02-23 09:26:16 -0800525static __inline__ void __DEFAULT_FN_ATTRS __stosq(unsigned __int64 *__dst,
526 unsigned __int64 __x,
527 size_t __n) {
Logan Chien969aea62018-12-05 18:40:57 +0800528 __asm__ __volatile__("rep stosq" : "+D"(__dst), "+c"(__n) : "a"(__x)
529 : "memory");
530}
531#endif
532
533/*----------------------------------------------------------------------------*\
534|* Misc
535\*----------------------------------------------------------------------------*/
536#if defined(__i386__) || defined(__x86_64__)
Pirama Arumuga Nainar7e1f8392021-08-16 17:30:48 -0700537#if defined(__i386__)
538#define __cpuid_count(__leaf, __count, __eax, __ebx, __ecx, __edx) \
539 __asm("cpuid" \
540 : "=a"(__eax), "=b"(__ebx), "=c"(__ecx), "=d"(__edx) \
541 : "0"(__leaf), "2"(__count))
542#else
543/* x86-64 uses %rbx as the base register, so preserve it. */
544#define __cpuid_count(__leaf, __count, __eax, __ebx, __ecx, __edx) \
Pirama Arumuga Nainarec8c89d2022-02-23 09:26:16 -0800545 __asm("xchg{q} {%%rbx, %q1|%q1, rbx}\n" \
Pirama Arumuga Nainar7e1f8392021-08-16 17:30:48 -0700546 "cpuid\n" \
Pirama Arumuga Nainarec8c89d2022-02-23 09:26:16 -0800547 "xchg{q} {%%rbx, %q1|%q1, rbx}" \
Pirama Arumuga Nainar7e1f8392021-08-16 17:30:48 -0700548 : "=a"(__eax), "=r"(__ebx), "=c"(__ecx), "=d"(__edx) \
549 : "0"(__leaf), "2"(__count))
550#endif
551static __inline__ void __DEFAULT_FN_ATTRS __cpuid(int __info[4], int __level) {
552 __cpuid_count(__level, 0, __info[0], __info[1], __info[2], __info[3]);
Logan Chien969aea62018-12-05 18:40:57 +0800553}
Pirama Arumuga Nainar7e1f8392021-08-16 17:30:48 -0700554static __inline__ void __DEFAULT_FN_ATTRS __cpuidex(int __info[4], int __level,
555 int __ecx) {
556 __cpuid_count(__level, __ecx, __info[0], __info[1], __info[2], __info[3]);
Logan Chien969aea62018-12-05 18:40:57 +0800557}
Pirama Arumuga Nainar7e1f8392021-08-16 17:30:48 -0700558static __inline__ void __DEFAULT_FN_ATTRS __halt(void) {
559 __asm__ volatile("hlt");
Logan Chien969aea62018-12-05 18:40:57 +0800560}
Logan Chiendbcf4122019-03-21 10:50:25 +0800561#endif
562
563#if defined(__i386__) || defined(__x86_64__) || defined(__aarch64__)
Pirama Arumuga Nainar7e1f8392021-08-16 17:30:48 -0700564static __inline__ void __DEFAULT_FN_ATTRS __nop(void) {
565 __asm__ volatile("nop");
Logan Chien969aea62018-12-05 18:40:57 +0800566}
567#endif
568
569/*----------------------------------------------------------------------------*\
570|* MS AArch64 specific
571\*----------------------------------------------------------------------------*/
572#if defined(__aarch64__)
573unsigned __int64 __getReg(int);
574long _InterlockedAdd(long volatile *Addend, long Value);
Logan Chiendbcf4122019-03-21 10:50:25 +0800575__int64 _ReadStatusReg(int);
576void _WriteStatusReg(int, __int64);
577
578unsigned short __cdecl _byteswap_ushort(unsigned short val);
579unsigned long __cdecl _byteswap_ulong (unsigned long val);
580unsigned __int64 __cdecl _byteswap_uint64(unsigned __int64 val);
Pirama Arumuga Nainar494f6452021-12-02 10:42:14 -0800581
582__int64 __mulh(__int64 __a, __int64 __b);
583unsigned __int64 __umulh(unsigned __int64 __a, unsigned __int64 __b);
Logan Chien969aea62018-12-05 18:40:57 +0800584#endif
585
586/*----------------------------------------------------------------------------*\
587|* Privileged intrinsics
588\*----------------------------------------------------------------------------*/
589#if defined(__i386__) || defined(__x86_64__)
590static __inline__ unsigned __int64 __DEFAULT_FN_ATTRS
591__readmsr(unsigned long __register) {
592 // Loads the contents of a 64-bit model specific register (MSR) specified in
593 // the ECX register into registers EDX:EAX. The EDX register is loaded with
594 // the high-order 32 bits of the MSR and the EAX register is loaded with the
595 // low-order 32 bits. If less than 64 bits are implemented in the MSR being
596 // read, the values returned to EDX:EAX in unimplemented bit locations are
597 // undefined.
598 unsigned long __edx;
599 unsigned long __eax;
600 __asm__ ("rdmsr" : "=d"(__edx), "=a"(__eax) : "c"(__register));
601 return (((unsigned __int64)__edx) << 32) | (unsigned __int64)__eax;
602}
Sasha Smundak746b0222020-02-25 09:19:04 -0800603#endif
Logan Chien969aea62018-12-05 18:40:57 +0800604
Pirama Arumuga Nainarec8c89d2022-02-23 09:26:16 -0800605static __inline__ unsigned __LPTRINT_TYPE__ __DEFAULT_FN_ATTRS __readcr3(void) {
Sasha Smundak746b0222020-02-25 09:19:04 -0800606 unsigned __LPTRINT_TYPE__ __cr3_val;
Pirama Arumuga Nainarec8c89d2022-02-23 09:26:16 -0800607 __asm__ __volatile__(
608 "mov {%%cr3, %0|%0, cr3}"
609 : "=r"(__cr3_val)
610 :
611 : "memory");
Logan Chien969aea62018-12-05 18:40:57 +0800612 return __cr3_val;
613}
614
615static __inline__ void __DEFAULT_FN_ATTRS
Sasha Smundak746b0222020-02-25 09:19:04 -0800616__writecr3(unsigned __INTPTR_TYPE__ __cr3_val) {
Pirama Arumuga Nainarec8c89d2022-02-23 09:26:16 -0800617 __asm__ ("mov {%0, %%cr3|cr3, %0}" : : "r"(__cr3_val) : "memory");
Logan Chien969aea62018-12-05 18:40:57 +0800618}
Logan Chien969aea62018-12-05 18:40:57 +0800619
620#ifdef __cplusplus
621}
622#endif
623
Sasha Smundak746b0222020-02-25 09:19:04 -0800624#undef __LPTRINT_TYPE__
625
Logan Chien969aea62018-12-05 18:40:57 +0800626#undef __DEFAULT_FN_ATTRS
627
628#endif /* __INTRIN_H */
629#endif /* _MSC_VER */