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gerrit-public.fairphone.software / platform / vendor / opensource / audio-kernel / 12dcf64d6fdfaf595ef01fb30837192091030160 / . / asoc / kona.c
blob: be944d3e2ffa4b41022f6cb9d9181d569feee0e6 [file] [log] [blame]
Meng Wang688a8672019-01-29 13:43:33 +0800[diff] [blame]1// SPDX-License-Identifier: GPL-2.0-only
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]2/*
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800[diff] [blame]3 * Copyright (c) 2016-2019, The Linux Foundation. All rights reserved.
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]4 */
5
6#include <linux/clk.h>
7#include <linux/delay.h>
8#include <linux/gpio.h>
9#include <linux/of_gpio.h>
10#include <linux/platform_device.h>
11#include <linux/slab.h>
12#include <linux/io.h>
13#include <linux/module.h>
14#include <linux/input.h>
15#include <linux/of_device.h>
Karthikeyan Mani5eb13422018-11-05 13:49:17 -0800[diff] [blame]16#include <linux/soc/qcom/fsa4480-i2c.h>
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]17#include <sound/core.h>
18#include <sound/soc.h>
19#include <sound/soc-dapm.h>
20#include <sound/pcm.h>
21#include <sound/pcm_params.h>
22#include <sound/info.h>
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]23#include <soc/snd_event.h>
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]24#include <dsp/audio_notifier.h>
Karthikeyan Mani7eef68e2018-12-13 17:45:02 -0800[diff] [blame]25#include <soc/swr-common.h>
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]26#include <dsp/q6afe-v2.h>
27#include <dsp/q6core.h>
28#include "device_event.h"
29#include "msm-pcm-routing-v2.h"
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]30#include "asoc/msm-cdc-pinctrl.h"
31#include "asoc/wcd-mbhc-v2.h"
Karthikeyan Mani5eb13422018-11-05 13:49:17 -0800[diff] [blame]32#include "codecs/wcd938x/wcd938x-mbhc.h"
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]33#include "codecs/wsa881x.h"
Karthikeyan Mani5eb13422018-11-05 13:49:17 -0800[diff] [blame]34#include "codecs/wcd938x/wcd938x.h"
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]35#include "codecs/bolero/bolero-cdc.h"
36#include <dt-bindings/sound/audio-codec-port-types.h>
37#include "codecs/bolero/wsa-macro.h"
Vatsal Bucha82b30ba2019-04-17 12:43:54 +0530[diff] [blame]38#include "kona-port-config.h"
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]39
40#define DRV_NAME "kona-asoc-snd"
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]41#define __CHIPSET__ "KONA "
42#define MSM_DAILINK_NAME(name) (__CHIPSET__#name)
43
44#define SAMPLING_RATE_8KHZ 8000
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]45#define SAMPLING_RATE_11P025KHZ 11025
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]46#define SAMPLING_RATE_16KHZ 16000
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]47#define SAMPLING_RATE_22P05KHZ 22050
48#define SAMPLING_RATE_32KHZ 32000
49#define SAMPLING_RATE_44P1KHZ 44100
50#define SAMPLING_RATE_48KHZ 48000
51#define SAMPLING_RATE_88P2KHZ 88200
52#define SAMPLING_RATE_96KHZ 96000
53#define SAMPLING_RATE_176P4KHZ 176400
54#define SAMPLING_RATE_192KHZ 192000
55#define SAMPLING_RATE_352P8KHZ 352800
56#define SAMPLING_RATE_384KHZ 384000
57
Karthikeyan Mani5eb13422018-11-05 13:49:17 -0800[diff] [blame]58#define WCD9XXX_MBHC_DEF_RLOADS 5
59#define WCD9XXX_MBHC_DEF_BUTTONS 8
60#define CODEC_EXT_CLK_RATE 9600000
61#define ADSP_STATE_READY_TIMEOUT_MS 3000
62#define DEV_NAME_STR_LEN 32
63#define WCD_MBHC_HS_V_MAX 1600
64
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]65#define TDM_CHANNEL_MAX 8
66#define DEV_NAME_STR_LEN 32
67
68#define MSM_LL_QOS_VALUE 300 /* time in us to ensure LPM doesn't go in C3/C4 */
69
70#define ADSP_STATE_READY_TIMEOUT_MS 3000
71
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]72#define WSA8810_NAME_1 "wsa881x.20170211"
73#define WSA8810_NAME_2 "wsa881x.20170212"
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]74#define WCN_CDC_SLIM_RX_CH_MAX 2
75#define WCN_CDC_SLIM_TX_CH_MAX 2
Vatsal Bucha82b30ba2019-04-17 12:43:54 +0530[diff] [blame]76#define WCN_CDC_SLIM_TX_CH_MAX_LITO 3
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]77
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]78enum {
79 TDM_0 = 0,
80 TDM_1,
81 TDM_2,
82 TDM_3,
83 TDM_4,
84 TDM_5,
85 TDM_6,
86 TDM_7,
87 TDM_PORT_MAX,
88};
89
90enum {
91 TDM_PRI = 0,
92 TDM_SEC,
93 TDM_TERT,
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame^]94 TDM_QUAT,
95 TDM_QUIN,
96 TDM_SEN,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]97 TDM_INTERFACE_MAX,
98};
99
100enum {
101 PRIM_AUX_PCM = 0,
102 SEC_AUX_PCM,
103 TERT_AUX_PCM,
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame^]104 QUAT_AUX_PCM,
105 QUIN_AUX_PCM,
106 SEN_AUX_PCM,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]107 AUX_PCM_MAX,
108};
109
110enum {
111 PRIM_MI2S = 0,
112 SEC_MI2S,
113 TERT_MI2S,
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame^]114 QUAT_MI2S,
115 QUIN_MI2S,
116 SEN_MI2S,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]117 MI2S_MAX,
118};
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]119
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]120enum {
121 WSA_CDC_DMA_RX_0 = 0,
122 WSA_CDC_DMA_RX_1,
123 RX_CDC_DMA_RX_0,
124 RX_CDC_DMA_RX_1,
125 RX_CDC_DMA_RX_2,
126 RX_CDC_DMA_RX_3,
127 RX_CDC_DMA_RX_5,
128 CDC_DMA_RX_MAX,
129};
130
131enum {
132 WSA_CDC_DMA_TX_0 = 0,
133 WSA_CDC_DMA_TX_1,
134 WSA_CDC_DMA_TX_2,
135 TX_CDC_DMA_TX_0,
136 TX_CDC_DMA_TX_3,
137 TX_CDC_DMA_TX_4,
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800[diff] [blame]138 VA_CDC_DMA_TX_0,
139 VA_CDC_DMA_TX_1,
140 VA_CDC_DMA_TX_2,
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]141 CDC_DMA_TX_MAX,
142};
143
Banajit Goswami83a370d2019-03-05 16:15:21 -0800[diff] [blame]144enum {
145 SLIM_RX_7 = 0,
146 SLIM_RX_MAX,
147};
148enum {
149 SLIM_TX_7 = 0,
Vatsal Bucha82b30ba2019-04-17 12:43:54 +0530[diff] [blame]150 SLIM_TX_8,
Banajit Goswami83a370d2019-03-05 16:15:21 -0800[diff] [blame]151 SLIM_TX_MAX,
152};
153
Meng Wange8e53822019-03-18 10:49:50 +0800[diff] [blame]154enum {
155 AFE_LOOPBACK_TX_IDX = 0,
156 AFE_LOOPBACK_TX_IDX_MAX,
157};
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]158struct msm_asoc_mach_data {
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]159 struct snd_info_entry *codec_root;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]160 int usbc_en2_gpio; /* used by gpio driver API */
161 struct device_node *dmic01_gpio_p; /* used by pinctrl API */
162 struct device_node *dmic23_gpio_p; /* used by pinctrl API */
163 struct device_node *dmic45_gpio_p; /* used by pinctrl API */
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame^]164 struct device_node *mi2s_gpio_p[MI2S_MAX]; /* used by pinctrl API */
165 atomic_t mi2s_gpio_ref_count[MI2S_MAX]; /* used by pinctrl API */
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]166 struct device_node *us_euro_gpio_p; /* used by pinctrl API */
167 struct pinctrl *usbc_en2_gpio_p; /* used by pinctrl API */
168 struct device_node *hph_en1_gpio_p; /* used by pinctrl API */
169 struct device_node *hph_en0_gpio_p; /* used by pinctrl API */
170 bool is_afe_config_done;
Karthikeyan Mani5eb13422018-11-05 13:49:17 -0800[diff] [blame]171 struct device_node *fsa_handle;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]172};
173
174struct tdm_port {
175 u32 mode;
176 u32 channel;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]177};
178
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]179enum {
180 EXT_DISP_RX_IDX_DP = 0,
181 EXT_DISP_RX_IDX_MAX,
182};
183
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]184struct msm_wsa881x_dev_info {
185 struct device_node *of_node;
186 u32 index;
187};
188
189struct aux_codec_dev_info {
190 struct device_node *of_node;
191 u32 index;
192};
193
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]194struct dev_config {
195 u32 sample_rate;
196 u32 bit_format;
197 u32 channels;
198};
199
Banajit Goswami83a370d2019-03-05 16:15:21 -0800[diff] [blame]200/* Default configuration of slimbus channels */
201static struct dev_config slim_rx_cfg[] = {
202 [SLIM_RX_7] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
203};
204
205static struct dev_config slim_tx_cfg[] = {
206 [SLIM_TX_7] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
Vatsal Bucha82b30ba2019-04-17 12:43:54 +0530[diff] [blame]207 [SLIM_TX_8] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
Banajit Goswami83a370d2019-03-05 16:15:21 -0800[diff] [blame]208};
209
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]210/* Default configuration of external display BE */
211static struct dev_config ext_disp_rx_cfg[] = {
212 [EXT_DISP_RX_IDX_DP] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
213};
214
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]215static struct dev_config usb_rx_cfg = {
216 .sample_rate = SAMPLING_RATE_48KHZ,
217 .bit_format = SNDRV_PCM_FORMAT_S16_LE,
218 .channels = 2,
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]219};
220
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]221static struct dev_config usb_tx_cfg = {
222 .sample_rate = SAMPLING_RATE_48KHZ,
223 .bit_format = SNDRV_PCM_FORMAT_S16_LE,
224 .channels = 1,
225};
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]226
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]227static struct dev_config proxy_rx_cfg = {
228 .sample_rate = SAMPLING_RATE_48KHZ,
229 .bit_format = SNDRV_PCM_FORMAT_S16_LE,
230 .channels = 2,
231};
232
233static struct afe_clk_set mi2s_clk[MI2S_MAX] = {
234 {
235 AFE_API_VERSION_I2S_CONFIG,
236 Q6AFE_LPASS_CLK_ID_PRI_MI2S_IBIT,
237 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
238 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
239 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
240 0,
241 },
242 {
243 AFE_API_VERSION_I2S_CONFIG,
244 Q6AFE_LPASS_CLK_ID_SEC_MI2S_IBIT,
245 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
246 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
247 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
248 0,
249 },
250 {
251 AFE_API_VERSION_I2S_CONFIG,
252 Q6AFE_LPASS_CLK_ID_TER_MI2S_IBIT,
253 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
254 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
255 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
256 0,
257 },
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame^]258 {
259 AFE_API_VERSION_I2S_CONFIG,
260 Q6AFE_LPASS_CLK_ID_QUAD_MI2S_IBIT,
261 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
262 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
263 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
264 0,
265 },
266 {
267 AFE_API_VERSION_I2S_CONFIG,
268 Q6AFE_LPASS_CLK_ID_QUI_MI2S_IBIT,
269 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
270 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
271 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
272 0,
273 },
274 {
275 AFE_API_VERSION_I2S_CONFIG,
276 Q6AFE_LPASS_CLK_ID_SEN_MI2S_IBIT,
277 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
278 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
279 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
280 0,
281 },
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]282};
283
284struct mi2s_conf {
285 struct mutex lock;
286 u32 ref_cnt;
287 u32 msm_is_mi2s_master;
288};
289
290static u32 mi2s_ebit_clk[MI2S_MAX] = {
291 Q6AFE_LPASS_CLK_ID_PRI_MI2S_EBIT,
292 Q6AFE_LPASS_CLK_ID_SEC_MI2S_EBIT,
293 Q6AFE_LPASS_CLK_ID_TER_MI2S_EBIT,
294};
295
296static struct mi2s_conf mi2s_intf_conf[MI2S_MAX];
297
298/* Default configuration of TDM channels */
299static struct dev_config tdm_rx_cfg[TDM_INTERFACE_MAX][TDM_PORT_MAX] = {
300 { /* PRI TDM */
301 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
302 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
303 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
304 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
305 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
306 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
307 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
308 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
309 },
310 { /* SEC TDM */
311 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
312 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
313 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
314 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
315 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
316 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
317 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
318 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
319 },
320 { /* TERT TDM */
321 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
322 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
323 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
324 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
325 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
326 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
327 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
328 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
329 },
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame^]330 { /* QUAT TDM */
331 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
332 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
333 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
334 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
335 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
336 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
337 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
338 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
339 },
340 { /* QUIN TDM */
341 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
342 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
343 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
344 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
345 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
346 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
347 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
348 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
349 },
350 { /* SEN TDM */
351 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
352 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
353 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
354 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
355 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
356 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
357 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
358 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
359 },
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]360};
361
362static struct dev_config tdm_tx_cfg[TDM_INTERFACE_MAX][TDM_PORT_MAX] = {
363 { /* PRI TDM */
364 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
365 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
366 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
367 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
368 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
369 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
370 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
371 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
372 },
373 { /* SEC TDM */
374 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
375 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
376 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
377 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
378 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
379 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
380 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
381 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
382 },
383 { /* TERT TDM */
384 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
385 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
386 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
387 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
388 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
389 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
390 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
391 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
392 },
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame^]393 { /* QUAT TDM */
394 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
395 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
396 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
397 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
398 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
399 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
400 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
401 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
402 },
403 { /* QUIN TDM */
404 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
405 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
406 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
407 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
408 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
409 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
410 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
411 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
412 },
413 { /* SEN TDM */
414 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
415 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
416 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
417 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
418 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
419 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
420 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
421 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
422 },
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]423};
424
425/* Default configuration of AUX PCM channels */
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]426static struct dev_config aux_pcm_rx_cfg[] = {
427 [PRIM_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]428 [SEC_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
429 [TERT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame^]430 [QUAT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
431 [QUIN_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
432 [SEN_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]433};
434
435static struct dev_config aux_pcm_tx_cfg[] = {
436 [PRIM_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]437 [SEC_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
438 [TERT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame^]439 [QUAT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
440 [QUIN_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
441 [SEN_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]442};
443
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]444/* Default configuration of MI2S channels */
445static struct dev_config mi2s_rx_cfg[] = {
446 [PRIM_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
447 [SEC_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
448 [TERT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame^]449 [QUAT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
450 [QUIN_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
451 [SEN_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]452};
453
454static struct dev_config mi2s_tx_cfg[] = {
455 [PRIM_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
456 [SEC_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
457 [TERT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame^]458 [QUAT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
459 [QUIN_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
460 [SEN_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]461};
462
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]463/* Default configuration of Codec DMA Interface RX */
464static struct dev_config cdc_dma_rx_cfg[] = {
465 [WSA_CDC_DMA_RX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
466 [WSA_CDC_DMA_RX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
467 [RX_CDC_DMA_RX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
468 [RX_CDC_DMA_RX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
469 [RX_CDC_DMA_RX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
470 [RX_CDC_DMA_RX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
471 [RX_CDC_DMA_RX_5] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
472};
473
474/* Default configuration of Codec DMA Interface TX */
475static struct dev_config cdc_dma_tx_cfg[] = {
476 [WSA_CDC_DMA_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
477 [WSA_CDC_DMA_TX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
478 [WSA_CDC_DMA_TX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
479 [TX_CDC_DMA_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
480 [TX_CDC_DMA_TX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
481 [TX_CDC_DMA_TX_4] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800[diff] [blame]482 [VA_CDC_DMA_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 8},
483 [VA_CDC_DMA_TX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 8},
484 [VA_CDC_DMA_TX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 8},
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]485};
486
Meng Wange8e53822019-03-18 10:49:50 +0800[diff] [blame]487static struct dev_config afe_loopback_tx_cfg[] = {
488 [AFE_LOOPBACK_TX_IDX] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
489};
490
Meng Wangd1db67c2019-04-17 12:41:34 +0800[diff] [blame]491static int msm_vi_feed_tx_ch = 2;
492static const char *const vi_feed_ch_text[] = {"One", "Two"};
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]493static char const *bit_format_text[] = {"S16_LE", "S24_LE", "S24_3LE",
494 "S32_LE"};
495static char const *ch_text[] = {"Two", "Three", "Four", "Five",
496 "Six", "Seven", "Eight"};
497static char const *usb_sample_rate_text[] = {"KHZ_8", "KHZ_11P025",
498 "KHZ_16", "KHZ_22P05",
499 "KHZ_32", "KHZ_44P1", "KHZ_48",
500 "KHZ_88P2", "KHZ_96", "KHZ_176P4",
501 "KHZ_192", "KHZ_352P8", "KHZ_384"};
502static const char *const usb_ch_text[] = {"One", "Two", "Three", "Four",
503 "Five", "Six", "Seven",
504 "Eight"};
505static char const *tdm_sample_rate_text[] = {"KHZ_8", "KHZ_16", "KHZ_32",
506 "KHZ_48", "KHZ_176P4",
507 "KHZ_352P8"};
508static char const *tdm_bit_format_text[] = {"S16_LE", "S24_LE", "S32_LE"};
509static char const *tdm_ch_text[] = {"One", "Two", "Three", "Four",
510 "Five", "Six", "Seven", "Eight"};
511static const char *const auxpcm_rate_text[] = {"KHZ_8", "KHZ_16"};
512static char const *mi2s_rate_text[] = {"KHZ_8", "KHZ_11P025", "KHZ_16",
513 "KHZ_22P05", "KHZ_32", "KHZ_44P1",
514 "KHZ_48", "KHZ_96", "KHZ_192"};
515static const char *const mi2s_ch_text[] = {"One", "Two", "Three", "Four",
516 "Five", "Six", "Seven",
517 "Eight"};
518
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]519static const char *const cdc_dma_rx_ch_text[] = {"One", "Two"};
520static const char *const cdc_dma_tx_ch_text[] = {"One", "Two", "Three", "Four",
521 "Five", "Six", "Seven",
522 "Eight"};
523static char const *cdc_dma_sample_rate_text[] = {"KHZ_8", "KHZ_11P025",
524 "KHZ_16", "KHZ_22P05",
525 "KHZ_32", "KHZ_44P1", "KHZ_48",
526 "KHZ_88P2", "KHZ_96",
527 "KHZ_176P4", "KHZ_192",
528 "KHZ_352P8", "KHZ_384"};
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]529static char const *ext_disp_bit_format_text[] = {"S16_LE", "S24_LE",
530 "S24_3LE"};
531static char const *ext_disp_sample_rate_text[] = {"KHZ_48", "KHZ_96",
532 "KHZ_192", "KHZ_32", "KHZ_44P1",
533 "KHZ_88P2", "KHZ_176P4"};
Banajit Goswami83a370d2019-03-05 16:15:21 -0800[diff] [blame]534static char const *bt_sample_rate_text[] = {"KHZ_8", "KHZ_16",
535 "KHZ_44P1", "KHZ_48",
536 "KHZ_88P2", "KHZ_96"};
537static char const *bt_sample_rate_rx_text[] = {"KHZ_8", "KHZ_16",
538 "KHZ_44P1", "KHZ_48",
539 "KHZ_88P2", "KHZ_96"};
540static char const *bt_sample_rate_tx_text[] = {"KHZ_8", "KHZ_16",
541 "KHZ_44P1", "KHZ_48",
542 "KHZ_88P2", "KHZ_96"};
Meng Wange8e53822019-03-18 10:49:50 +0800[diff] [blame]543static const char *const afe_loopback_tx_ch_text[] = {"One", "Two"};
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]544
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]545static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_sample_rate, usb_sample_rate_text);
546static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_sample_rate, usb_sample_rate_text);
547static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_format, bit_format_text);
548static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_format, bit_format_text);
549static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_chs, usb_ch_text);
550static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_chs, usb_ch_text);
Meng Wangd1db67c2019-04-17 12:41:34 +0800[diff] [blame]551static SOC_ENUM_SINGLE_EXT_DECL(vi_feed_tx_chs, vi_feed_ch_text);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]552static SOC_ENUM_SINGLE_EXT_DECL(proxy_rx_chs, ch_text);
553static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_sample_rate, tdm_sample_rate_text);
554static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_sample_rate, tdm_sample_rate_text);
555static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_format, tdm_bit_format_text);
556static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_format, tdm_bit_format_text);
557static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_chs, tdm_ch_text);
558static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_chs, tdm_ch_text);
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]559static SOC_ENUM_SINGLE_EXT_DECL(prim_aux_pcm_rx_sample_rate, auxpcm_rate_text);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]560static SOC_ENUM_SINGLE_EXT_DECL(sec_aux_pcm_rx_sample_rate, auxpcm_rate_text);
561static SOC_ENUM_SINGLE_EXT_DECL(tert_aux_pcm_rx_sample_rate, auxpcm_rate_text);
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame^]562static SOC_ENUM_SINGLE_EXT_DECL(quat_aux_pcm_rx_sample_rate, auxpcm_rate_text);
563static SOC_ENUM_SINGLE_EXT_DECL(quin_aux_pcm_rx_sample_rate, auxpcm_rate_text);
564static SOC_ENUM_SINGLE_EXT_DECL(sen_aux_pcm_rx_sample_rate, auxpcm_rate_text);
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]565static SOC_ENUM_SINGLE_EXT_DECL(prim_aux_pcm_tx_sample_rate, auxpcm_rate_text);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]566static SOC_ENUM_SINGLE_EXT_DECL(sec_aux_pcm_tx_sample_rate, auxpcm_rate_text);
567static SOC_ENUM_SINGLE_EXT_DECL(tert_aux_pcm_tx_sample_rate, auxpcm_rate_text);
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame^]568static SOC_ENUM_SINGLE_EXT_DECL(quat_aux_pcm_tx_sample_rate, auxpcm_rate_text);
569static SOC_ENUM_SINGLE_EXT_DECL(quin_aux_pcm_tx_sample_rate, auxpcm_rate_text);
570static SOC_ENUM_SINGLE_EXT_DECL(sen_aux_pcm_tx_sample_rate, auxpcm_rate_text);
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]571static SOC_ENUM_SINGLE_EXT_DECL(aux_pcm_rx_format, bit_format_text);
572static SOC_ENUM_SINGLE_EXT_DECL(aux_pcm_tx_format, bit_format_text);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]573static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_rx_sample_rate, mi2s_rate_text);
574static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_rx_sample_rate, mi2s_rate_text);
575static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_rx_sample_rate, mi2s_rate_text);
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame^]576static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_rx_sample_rate, mi2s_rate_text);
577static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_rx_sample_rate, mi2s_rate_text);
578static SOC_ENUM_SINGLE_EXT_DECL(sen_mi2s_rx_sample_rate, mi2s_rate_text);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]579static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_tx_sample_rate, mi2s_rate_text);
580static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_tx_sample_rate, mi2s_rate_text);
581static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_tx_sample_rate, mi2s_rate_text);
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame^]582static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_tx_sample_rate, mi2s_rate_text);
583static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_tx_sample_rate, mi2s_rate_text);
584static SOC_ENUM_SINGLE_EXT_DECL(sen_mi2s_tx_sample_rate, mi2s_rate_text);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]585static SOC_ENUM_SINGLE_EXT_DECL(mi2s_rx_format, bit_format_text);
586static SOC_ENUM_SINGLE_EXT_DECL(mi2s_tx_format, bit_format_text);
587static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_rx_chs, mi2s_ch_text);
588static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_rx_chs, mi2s_ch_text);
589static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_rx_chs, mi2s_ch_text);
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame^]590static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_rx_chs, mi2s_ch_text);
591static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_rx_chs, mi2s_ch_text);
592static SOC_ENUM_SINGLE_EXT_DECL(sen_mi2s_rx_chs, mi2s_ch_text);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]593static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_tx_chs, mi2s_ch_text);
594static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_tx_chs, mi2s_ch_text);
595static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_tx_chs, mi2s_ch_text);
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame^]596static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_tx_chs, mi2s_ch_text);
597static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_tx_chs, mi2s_ch_text);
598static SOC_ENUM_SINGLE_EXT_DECL(sen_mi2s_tx_chs, mi2s_ch_text);
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]599static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_chs, cdc_dma_rx_ch_text);
600static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_chs, cdc_dma_rx_ch_text);
601static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_chs, cdc_dma_rx_ch_text);
602static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_chs, cdc_dma_rx_ch_text);
603static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_chs, cdc_dma_rx_ch_text);
604static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_chs, cdc_dma_rx_ch_text);
605static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_chs, cdc_dma_rx_ch_text);
606static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_0_chs, cdc_dma_tx_ch_text);
607static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_chs, cdc_dma_tx_ch_text);
608static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_chs, cdc_dma_tx_ch_text);
609static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_chs, cdc_dma_tx_ch_text);
610static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_chs, cdc_dma_tx_ch_text);
611static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_chs, cdc_dma_tx_ch_text);
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800[diff] [blame]612static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_0_chs, cdc_dma_tx_ch_text);
613static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_1_chs, cdc_dma_tx_ch_text);
614static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_2_chs, cdc_dma_tx_ch_text);
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]615static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_format, bit_format_text);
616static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_format, bit_format_text);
617static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_format, bit_format_text);
618static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_format, bit_format_text);
619static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_format, bit_format_text);
620static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_format, bit_format_text);
621static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_format, bit_format_text);
622static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_format, bit_format_text);
623static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_format, bit_format_text);
624static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_format, bit_format_text);
625static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_format, bit_format_text);
626static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_format, bit_format_text);
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800[diff] [blame]627static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_0_format, bit_format_text);
628static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_1_format, bit_format_text);
629static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_2_format, bit_format_text);
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]630static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_sample_rate,
631 cdc_dma_sample_rate_text);
632static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_sample_rate,
633 cdc_dma_sample_rate_text);
634static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_sample_rate,
635 cdc_dma_sample_rate_text);
636static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_sample_rate,
637 cdc_dma_sample_rate_text);
638static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_sample_rate,
639 cdc_dma_sample_rate_text);
640static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_sample_rate,
641 cdc_dma_sample_rate_text);
642static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_sample_rate,
643 cdc_dma_sample_rate_text);
644static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_0_sample_rate,
645 cdc_dma_sample_rate_text);
646static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_sample_rate,
647 cdc_dma_sample_rate_text);
648static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_sample_rate,
649 cdc_dma_sample_rate_text);
650static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_sample_rate,
651 cdc_dma_sample_rate_text);
652static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_sample_rate,
653 cdc_dma_sample_rate_text);
654static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_sample_rate,
655 cdc_dma_sample_rate_text);
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800[diff] [blame]656static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_0_sample_rate,
657 cdc_dma_sample_rate_text);
658static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_1_sample_rate,
659 cdc_dma_sample_rate_text);
660static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_2_sample_rate,
661 cdc_dma_sample_rate_text);
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]662static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_chs, ch_text);
663static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_format, ext_disp_bit_format_text);
664static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_sample_rate,
665 ext_disp_sample_rate_text);
Banajit Goswami83a370d2019-03-05 16:15:21 -0800[diff] [blame]666static SOC_ENUM_SINGLE_EXT_DECL(bt_sample_rate, bt_sample_rate_text);
667static SOC_ENUM_SINGLE_EXT_DECL(bt_sample_rate_rx, bt_sample_rate_rx_text);
668static SOC_ENUM_SINGLE_EXT_DECL(bt_sample_rate_tx, bt_sample_rate_tx_text);
Meng Wange8e53822019-03-18 10:49:50 +0800[diff] [blame]669static SOC_ENUM_SINGLE_EXT_DECL(afe_loopback_tx_chs, afe_loopback_tx_ch_text);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]670
671static bool is_initial_boot;
672static bool codec_reg_done;
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]673static struct snd_soc_aux_dev *msm_aux_dev;
674static struct snd_soc_codec_conf *msm_codec_conf;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]675static struct snd_soc_card snd_soc_card_kona_msm;
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]676static int dmic_0_1_gpio_cnt;
677static int dmic_2_3_gpio_cnt;
678static int dmic_4_5_gpio_cnt;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]679
Karthikeyan Mani5eb13422018-11-05 13:49:17 -0800[diff] [blame]680static void *def_wcd_mbhc_cal(void);
681
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]682/*
683 * Need to report LINEIN
684 * if R/L channel impedance is larger than 5K ohm
685 */
686static struct wcd_mbhc_config wcd_mbhc_cfg = {
687 .read_fw_bin = false,
688 .calibration = NULL,
689 .detect_extn_cable = true,
690 .mono_stero_detection = false,
691 .swap_gnd_mic = NULL,
692 .hs_ext_micbias = true,
693 .key_code[0] = KEY_MEDIA,
694 .key_code[1] = KEY_VOICECOMMAND,
695 .key_code[2] = KEY_VOLUMEUP,
696 .key_code[3] = KEY_VOLUMEDOWN,
697 .key_code[4] = 0,
698 .key_code[5] = 0,
699 .key_code[6] = 0,
700 .key_code[7] = 0,
701 .linein_th = 5000,
702 .moisture_en = true,
703 .mbhc_micbias = MIC_BIAS_2,
704 .anc_micbias = MIC_BIAS_2,
705 .enable_anc_mic_detect = false,
706};
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]707
708static inline int param_is_mask(int p)
709{
710 return (p >= SNDRV_PCM_HW_PARAM_FIRST_MASK) &&
711 (p <= SNDRV_PCM_HW_PARAM_LAST_MASK);
712}
713
714static inline struct snd_mask *param_to_mask(struct snd_pcm_hw_params *p,
715 int n)
716{
717 return &(p->masks[n - SNDRV_PCM_HW_PARAM_FIRST_MASK]);
718}
719
720static void param_set_mask(struct snd_pcm_hw_params *p, int n,
721 unsigned int bit)
722{
723 if (bit >= SNDRV_MASK_MAX)
724 return;
725 if (param_is_mask(n)) {
726 struct snd_mask *m = param_to_mask(p, n);
727
728 m->bits[0] = 0;
729 m->bits[1] = 0;
730 m->bits[bit >> 5] |= (1 << (bit & 31));
731 }
732}
733
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]734static int usb_audio_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
735 struct snd_ctl_elem_value *ucontrol)
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]736{
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]737 int sample_rate_val = 0;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]738
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]739 switch (usb_rx_cfg.sample_rate) {
740 case SAMPLING_RATE_384KHZ:
741 sample_rate_val = 12;
742 break;
743 case SAMPLING_RATE_352P8KHZ:
744 sample_rate_val = 11;
745 break;
746 case SAMPLING_RATE_192KHZ:
747 sample_rate_val = 10;
748 break;
749 case SAMPLING_RATE_176P4KHZ:
750 sample_rate_val = 9;
751 break;
752 case SAMPLING_RATE_96KHZ:
753 sample_rate_val = 8;
754 break;
755 case SAMPLING_RATE_88P2KHZ:
756 sample_rate_val = 7;
757 break;
758 case SAMPLING_RATE_48KHZ:
759 sample_rate_val = 6;
760 break;
761 case SAMPLING_RATE_44P1KHZ:
762 sample_rate_val = 5;
763 break;
764 case SAMPLING_RATE_32KHZ:
765 sample_rate_val = 4;
766 break;
767 case SAMPLING_RATE_22P05KHZ:
768 sample_rate_val = 3;
769 break;
770 case SAMPLING_RATE_16KHZ:
771 sample_rate_val = 2;
772 break;
773 case SAMPLING_RATE_11P025KHZ:
774 sample_rate_val = 1;
775 break;
776 case SAMPLING_RATE_8KHZ:
777 default:
778 sample_rate_val = 0;
779 break;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]780 }
781
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]782 ucontrol->value.integer.value[0] = sample_rate_val;
783 pr_debug("%s: usb_audio_rx_sample_rate = %d\n", __func__,
784 usb_rx_cfg.sample_rate);
785 return 0;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]786}
787
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]788static int usb_audio_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
789 struct snd_ctl_elem_value *ucontrol)
790{
791 switch (ucontrol->value.integer.value[0]) {
792 case 12:
793 usb_rx_cfg.sample_rate = SAMPLING_RATE_384KHZ;
794 break;
795 case 11:
796 usb_rx_cfg.sample_rate = SAMPLING_RATE_352P8KHZ;
797 break;
798 case 10:
799 usb_rx_cfg.sample_rate = SAMPLING_RATE_192KHZ;
800 break;
801 case 9:
802 usb_rx_cfg.sample_rate = SAMPLING_RATE_176P4KHZ;
803 break;
804 case 8:
805 usb_rx_cfg.sample_rate = SAMPLING_RATE_96KHZ;
806 break;
807 case 7:
808 usb_rx_cfg.sample_rate = SAMPLING_RATE_88P2KHZ;
809 break;
810 case 6:
811 usb_rx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
812 break;
813 case 5:
814 usb_rx_cfg.sample_rate = SAMPLING_RATE_44P1KHZ;
815 break;
816 case 4:
817 usb_rx_cfg.sample_rate = SAMPLING_RATE_32KHZ;
818 break;
819 case 3:
820 usb_rx_cfg.sample_rate = SAMPLING_RATE_22P05KHZ;
821 break;
822 case 2:
823 usb_rx_cfg.sample_rate = SAMPLING_RATE_16KHZ;
824 break;
825 case 1:
826 usb_rx_cfg.sample_rate = SAMPLING_RATE_11P025KHZ;
827 break;
828 case 0:
829 usb_rx_cfg.sample_rate = SAMPLING_RATE_8KHZ;
830 break;
831 default:
832 usb_rx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
833 break;
834 }
835
836 pr_debug("%s: control value = %ld, usb_audio_rx_sample_rate = %d\n",
837 __func__, ucontrol->value.integer.value[0],
838 usb_rx_cfg.sample_rate);
839 return 0;
840}
841
842static int usb_audio_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
843 struct snd_ctl_elem_value *ucontrol)
844{
845 int sample_rate_val = 0;
846
847 switch (usb_tx_cfg.sample_rate) {
848 case SAMPLING_RATE_384KHZ:
849 sample_rate_val = 12;
850 break;
851 case SAMPLING_RATE_352P8KHZ:
852 sample_rate_val = 11;
853 break;
854 case SAMPLING_RATE_192KHZ:
855 sample_rate_val = 10;
856 break;
857 case SAMPLING_RATE_176P4KHZ:
858 sample_rate_val = 9;
859 break;
860 case SAMPLING_RATE_96KHZ:
861 sample_rate_val = 8;
862 break;
863 case SAMPLING_RATE_88P2KHZ:
864 sample_rate_val = 7;
865 break;
866 case SAMPLING_RATE_48KHZ:
867 sample_rate_val = 6;
868 break;
869 case SAMPLING_RATE_44P1KHZ:
870 sample_rate_val = 5;
871 break;
872 case SAMPLING_RATE_32KHZ:
873 sample_rate_val = 4;
874 break;
875 case SAMPLING_RATE_22P05KHZ:
876 sample_rate_val = 3;
877 break;
878 case SAMPLING_RATE_16KHZ:
879 sample_rate_val = 2;
880 break;
881 case SAMPLING_RATE_11P025KHZ:
882 sample_rate_val = 1;
883 break;
884 case SAMPLING_RATE_8KHZ:
885 sample_rate_val = 0;
886 break;
887 default:
888 sample_rate_val = 6;
889 break;
890 }
891
892 ucontrol->value.integer.value[0] = sample_rate_val;
893 pr_debug("%s: usb_audio_tx_sample_rate = %d\n", __func__,
894 usb_tx_cfg.sample_rate);
895 return 0;
896}
897
898static int usb_audio_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
899 struct snd_ctl_elem_value *ucontrol)
900{
901 switch (ucontrol->value.integer.value[0]) {
902 case 12:
903 usb_tx_cfg.sample_rate = SAMPLING_RATE_384KHZ;
904 break;
905 case 11:
906 usb_tx_cfg.sample_rate = SAMPLING_RATE_352P8KHZ;
907 break;
908 case 10:
909 usb_tx_cfg.sample_rate = SAMPLING_RATE_192KHZ;
910 break;
911 case 9:
912 usb_tx_cfg.sample_rate = SAMPLING_RATE_176P4KHZ;
913 break;
914 case 8:
915 usb_tx_cfg.sample_rate = SAMPLING_RATE_96KHZ;
916 break;
917 case 7:
918 usb_tx_cfg.sample_rate = SAMPLING_RATE_88P2KHZ;
919 break;
920 case 6:
921 usb_tx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
922 break;
923 case 5:
924 usb_tx_cfg.sample_rate = SAMPLING_RATE_44P1KHZ;
925 break;
926 case 4:
927 usb_tx_cfg.sample_rate = SAMPLING_RATE_32KHZ;
928 break;
929 case 3:
930 usb_tx_cfg.sample_rate = SAMPLING_RATE_22P05KHZ;
931 break;
932 case 2:
933 usb_tx_cfg.sample_rate = SAMPLING_RATE_16KHZ;
934 break;
935 case 1:
936 usb_tx_cfg.sample_rate = SAMPLING_RATE_11P025KHZ;
937 break;
938 case 0:
939 usb_tx_cfg.sample_rate = SAMPLING_RATE_8KHZ;
940 break;
941 default:
942 usb_tx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
943 break;
944 }
945
946 pr_debug("%s: control value = %ld, usb_audio_tx_sample_rate = %d\n",
947 __func__, ucontrol->value.integer.value[0],
948 usb_tx_cfg.sample_rate);
949 return 0;
950}
Meng Wange8e53822019-03-18 10:49:50 +0800[diff] [blame]951static int afe_loopback_tx_ch_get(struct snd_kcontrol *kcontrol,
952 struct snd_ctl_elem_value *ucontrol)
953{
954 pr_debug("%s: afe_loopback_tx_ch = %d\n", __func__,
955 afe_loopback_tx_cfg[0].channels);
956 ucontrol->value.enumerated.item[0] =
957 afe_loopback_tx_cfg[0].channels - 1;
958
959 return 0;
960}
961
962static int afe_loopback_tx_ch_put(struct snd_kcontrol *kcontrol,
963 struct snd_ctl_elem_value *ucontrol)
964{
965 afe_loopback_tx_cfg[0].channels =
966 ucontrol->value.enumerated.item[0] + 1;
967 pr_debug("%s: afe_loopback_tx_ch = %d\n", __func__,
968 afe_loopback_tx_cfg[0].channels);
969
970 return 1;
971}
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]972
973static int usb_audio_rx_format_get(struct snd_kcontrol *kcontrol,
974 struct snd_ctl_elem_value *ucontrol)
975{
976 switch (usb_rx_cfg.bit_format) {
977 case SNDRV_PCM_FORMAT_S32_LE:
978 ucontrol->value.integer.value[0] = 3;
979 break;
980 case SNDRV_PCM_FORMAT_S24_3LE:
981 ucontrol->value.integer.value[0] = 2;
982 break;
983 case SNDRV_PCM_FORMAT_S24_LE:
984 ucontrol->value.integer.value[0] = 1;
985 break;
986 case SNDRV_PCM_FORMAT_S16_LE:
987 default:
988 ucontrol->value.integer.value[0] = 0;
989 break;
990 }
991
992 pr_debug("%s: usb_audio_rx_format = %d, ucontrol value = %ld\n",
993 __func__, usb_rx_cfg.bit_format,
994 ucontrol->value.integer.value[0]);
995 return 0;
996}
997
998static int usb_audio_rx_format_put(struct snd_kcontrol *kcontrol,
999 struct snd_ctl_elem_value *ucontrol)
1000{
1001 int rc = 0;
1002
1003 switch (ucontrol->value.integer.value[0]) {
1004 case 3:
1005 usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S32_LE;
1006 break;
1007 case 2:
1008 usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_3LE;
1009 break;
1010 case 1:
1011 usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_LE;
1012 break;
1013 case 0:
1014 default:
1015 usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S16_LE;
1016 break;
1017 }
1018 pr_debug("%s: usb_audio_rx_format = %d, ucontrol value = %ld\n",
1019 __func__, usb_rx_cfg.bit_format,
1020 ucontrol->value.integer.value[0]);
1021
1022 return rc;
1023}
1024
1025static int usb_audio_tx_format_get(struct snd_kcontrol *kcontrol,
1026 struct snd_ctl_elem_value *ucontrol)
1027{
1028 switch (usb_tx_cfg.bit_format) {
1029 case SNDRV_PCM_FORMAT_S32_LE:
1030 ucontrol->value.integer.value[0] = 3;
1031 break;
1032 case SNDRV_PCM_FORMAT_S24_3LE:
1033 ucontrol->value.integer.value[0] = 2;
1034 break;
1035 case SNDRV_PCM_FORMAT_S24_LE:
1036 ucontrol->value.integer.value[0] = 1;
1037 break;
1038 case SNDRV_PCM_FORMAT_S16_LE:
1039 default:
1040 ucontrol->value.integer.value[0] = 0;
1041 break;
1042 }
1043
1044 pr_debug("%s: usb_audio_tx_format = %d, ucontrol value = %ld\n",
1045 __func__, usb_tx_cfg.bit_format,
1046 ucontrol->value.integer.value[0]);
1047 return 0;
1048}
1049
1050static int usb_audio_tx_format_put(struct snd_kcontrol *kcontrol,
1051 struct snd_ctl_elem_value *ucontrol)
1052{
1053 int rc = 0;
1054
1055 switch (ucontrol->value.integer.value[0]) {
1056 case 3:
1057 usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S32_LE;
1058 break;
1059 case 2:
1060 usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_3LE;
1061 break;
1062 case 1:
1063 usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_LE;
1064 break;
1065 case 0:
1066 default:
1067 usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S16_LE;
1068 break;
1069 }
1070 pr_debug("%s: usb_audio_tx_format = %d, ucontrol value = %ld\n",
1071 __func__, usb_tx_cfg.bit_format,
1072 ucontrol->value.integer.value[0]);
1073
1074 return rc;
1075}
1076
1077static int usb_audio_rx_ch_get(struct snd_kcontrol *kcontrol,
1078 struct snd_ctl_elem_value *ucontrol)
1079{
1080 pr_debug("%s: usb_audio_rx_ch = %d\n", __func__,
1081 usb_rx_cfg.channels);
1082 ucontrol->value.integer.value[0] = usb_rx_cfg.channels - 1;
1083 return 0;
1084}
1085
1086static int usb_audio_rx_ch_put(struct snd_kcontrol *kcontrol,
1087 struct snd_ctl_elem_value *ucontrol)
1088{
1089 usb_rx_cfg.channels = ucontrol->value.integer.value[0] + 1;
1090
1091 pr_debug("%s: usb_audio_rx_ch = %d\n", __func__, usb_rx_cfg.channels);
1092 return 1;
1093}
1094
1095static int usb_audio_tx_ch_get(struct snd_kcontrol *kcontrol,
1096 struct snd_ctl_elem_value *ucontrol)
1097{
1098 pr_debug("%s: usb_audio_tx_ch = %d\n", __func__,
1099 usb_tx_cfg.channels);
1100 ucontrol->value.integer.value[0] = usb_tx_cfg.channels - 1;
1101 return 0;
1102}
1103
1104static int usb_audio_tx_ch_put(struct snd_kcontrol *kcontrol,
1105 struct snd_ctl_elem_value *ucontrol)
1106{
1107 usb_tx_cfg.channels = ucontrol->value.integer.value[0] + 1;
1108
1109 pr_debug("%s: usb_audio_tx_ch = %d\n", __func__, usb_tx_cfg.channels);
1110 return 1;
1111}
1112
Meng Wangd1db67c2019-04-17 12:41:34 +0800[diff] [blame]1113static int msm_vi_feed_tx_ch_get(struct snd_kcontrol *kcontrol,
1114 struct snd_ctl_elem_value *ucontrol)
1115{
1116 ucontrol->value.integer.value[0] = msm_vi_feed_tx_ch - 1;
1117 pr_debug("%s: msm_vi_feed_tx_ch = %ld\n", __func__,
1118 ucontrol->value.integer.value[0]);
1119 return 0;
1120}
1121
1122static int msm_vi_feed_tx_ch_put(struct snd_kcontrol *kcontrol,
1123 struct snd_ctl_elem_value *ucontrol)
1124{
1125 msm_vi_feed_tx_ch = ucontrol->value.integer.value[0] + 1;
1126 pr_debug("%s: msm_vi_feed_tx_ch = %d\n", __func__, msm_vi_feed_tx_ch);
1127 return 1;
1128}
1129
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]1130static int ext_disp_get_port_idx(struct snd_kcontrol *kcontrol)
1131{
1132 int idx = 0;
1133
1134 if (strnstr(kcontrol->id.name, "Display Port RX",
1135 sizeof("Display Port RX"))) {
1136 idx = EXT_DISP_RX_IDX_DP;
1137 } else {
1138 pr_err("%s: unsupported BE: %s\n",
1139 __func__, kcontrol->id.name);
1140 idx = -EINVAL;
1141 }
1142
1143 return idx;
1144}
1145
1146static int ext_disp_rx_format_get(struct snd_kcontrol *kcontrol,
1147 struct snd_ctl_elem_value *ucontrol)
1148{
1149 int idx = ext_disp_get_port_idx(kcontrol);
1150
1151 if (idx < 0)
1152 return idx;
1153
1154 switch (ext_disp_rx_cfg[idx].bit_format) {
1155 case SNDRV_PCM_FORMAT_S24_3LE:
1156 ucontrol->value.integer.value[0] = 2;
1157 break;
1158 case SNDRV_PCM_FORMAT_S24_LE:
1159 ucontrol->value.integer.value[0] = 1;
1160 break;
1161 case SNDRV_PCM_FORMAT_S16_LE:
1162 default:
1163 ucontrol->value.integer.value[0] = 0;
1164 break;
1165 }
1166
1167 pr_debug("%s: ext_disp_rx[%d].format = %d, ucontrol value = %ld\n",
1168 __func__, idx, ext_disp_rx_cfg[idx].bit_format,
1169 ucontrol->value.integer.value[0]);
1170 return 0;
1171}
1172
1173static int ext_disp_rx_format_put(struct snd_kcontrol *kcontrol,
1174 struct snd_ctl_elem_value *ucontrol)
1175{
1176 int idx = ext_disp_get_port_idx(kcontrol);
1177
1178 if (idx < 0)
1179 return idx;
1180
1181 switch (ucontrol->value.integer.value[0]) {
1182 case 2:
1183 ext_disp_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
1184 break;
1185 case 1:
1186 ext_disp_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S24_LE;
1187 break;
1188 case 0:
1189 default:
1190 ext_disp_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S16_LE;
1191 break;
1192 }
1193 pr_debug("%s: ext_disp_rx[%d].format = %d, ucontrol value = %ld\n",
1194 __func__, idx, ext_disp_rx_cfg[idx].bit_format,
1195 ucontrol->value.integer.value[0]);
1196
1197 return 0;
1198}
1199
1200static int ext_disp_rx_ch_get(struct snd_kcontrol *kcontrol,
1201 struct snd_ctl_elem_value *ucontrol)
1202{
1203 int idx = ext_disp_get_port_idx(kcontrol);
1204
1205 if (idx < 0)
1206 return idx;
1207
1208 ucontrol->value.integer.value[0] =
1209 ext_disp_rx_cfg[idx].channels - 2;
1210
1211 pr_debug("%s: ext_disp_rx[%d].ch = %d\n", __func__,
1212 idx, ext_disp_rx_cfg[idx].channels);
1213
1214 return 0;
1215}
1216
1217static int ext_disp_rx_ch_put(struct snd_kcontrol *kcontrol,
1218 struct snd_ctl_elem_value *ucontrol)
1219{
1220 int idx = ext_disp_get_port_idx(kcontrol);
1221
1222 if (idx < 0)
1223 return idx;
1224
1225 ext_disp_rx_cfg[idx].channels =
1226 ucontrol->value.integer.value[0] + 2;
1227
1228 pr_debug("%s: ext_disp_rx[%d].ch = %d\n", __func__,
1229 idx, ext_disp_rx_cfg[idx].channels);
1230 return 1;
1231}
1232
1233static int ext_disp_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
1234 struct snd_ctl_elem_value *ucontrol)
1235{
1236 int sample_rate_val;
1237 int idx = ext_disp_get_port_idx(kcontrol);
1238
1239 if (idx < 0)
1240 return idx;
1241
1242 switch (ext_disp_rx_cfg[idx].sample_rate) {
1243 case SAMPLING_RATE_176P4KHZ:
1244 sample_rate_val = 6;
1245 break;
1246
1247 case SAMPLING_RATE_88P2KHZ:
1248 sample_rate_val = 5;
1249 break;
1250
1251 case SAMPLING_RATE_44P1KHZ:
1252 sample_rate_val = 4;
1253 break;
1254
1255 case SAMPLING_RATE_32KHZ:
1256 sample_rate_val = 3;
1257 break;
1258
1259 case SAMPLING_RATE_192KHZ:
1260 sample_rate_val = 2;
1261 break;
1262
1263 case SAMPLING_RATE_96KHZ:
1264 sample_rate_val = 1;
1265 break;
1266
1267 case SAMPLING_RATE_48KHZ:
1268 default:
1269 sample_rate_val = 0;
1270 break;
1271 }
1272
1273 ucontrol->value.integer.value[0] = sample_rate_val;
1274 pr_debug("%s: ext_disp_rx[%d].sample_rate = %d\n", __func__,
1275 idx, ext_disp_rx_cfg[idx].sample_rate);
1276
1277 return 0;
1278}
1279
1280static int ext_disp_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
1281 struct snd_ctl_elem_value *ucontrol)
1282{
1283 int idx = ext_disp_get_port_idx(kcontrol);
1284
1285 if (idx < 0)
1286 return idx;
1287
1288 switch (ucontrol->value.integer.value[0]) {
1289 case 6:
1290 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_176P4KHZ;
1291 break;
1292 case 5:
1293 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_88P2KHZ;
1294 break;
1295 case 4:
1296 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_44P1KHZ;
1297 break;
1298 case 3:
1299 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_32KHZ;
1300 break;
1301 case 2:
1302 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_192KHZ;
1303 break;
1304 case 1:
1305 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_96KHZ;
1306 break;
1307 case 0:
1308 default:
1309 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_48KHZ;
1310 break;
1311 }
1312
1313 pr_debug("%s: control value = %ld, ext_disp_rx[%d].sample_rate = %d\n",
1314 __func__, ucontrol->value.integer.value[0], idx,
1315 ext_disp_rx_cfg[idx].sample_rate);
1316 return 0;
1317}
1318
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]1319static int proxy_rx_ch_get(struct snd_kcontrol *kcontrol,
1320 struct snd_ctl_elem_value *ucontrol)
1321{
1322 pr_debug("%s: proxy_rx channels = %d\n",
1323 __func__, proxy_rx_cfg.channels);
1324 ucontrol->value.integer.value[0] = proxy_rx_cfg.channels - 2;
1325
1326 return 0;
1327}
1328
1329static int proxy_rx_ch_put(struct snd_kcontrol *kcontrol,
1330 struct snd_ctl_elem_value *ucontrol)
1331{
1332 proxy_rx_cfg.channels = ucontrol->value.integer.value[0] + 2;
1333 pr_debug("%s: proxy_rx channels = %d\n",
1334 __func__, proxy_rx_cfg.channels);
1335
1336 return 1;
1337}
1338
1339static int tdm_get_port_idx(struct snd_kcontrol *kcontrol,
1340 struct tdm_port *port)
1341{
1342 if (port) {
1343 if (strnstr(kcontrol->id.name, "PRI",
1344 sizeof(kcontrol->id.name))) {
1345 port->mode = TDM_PRI;
1346 } else if (strnstr(kcontrol->id.name, "SEC",
1347 sizeof(kcontrol->id.name))) {
1348 port->mode = TDM_SEC;
1349 } else if (strnstr(kcontrol->id.name, "TERT",
1350 sizeof(kcontrol->id.name))) {
1351 port->mode = TDM_TERT;
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame^]1352 } else if (strnstr(kcontrol->id.name, "QUAT",
1353 sizeof(kcontrol->id.name))) {
1354 port->mode = TDM_QUAT;
1355 } else if (strnstr(kcontrol->id.name, "QUIN",
1356 sizeof(kcontrol->id.name))) {
1357 port->mode = TDM_QUIN;
1358 } else if (strnstr(kcontrol->id.name, "SEN",
1359 sizeof(kcontrol->id.name))) {
1360 port->mode = TDM_SEN;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]1361 } else {
1362 pr_err("%s: unsupported mode in: %s\n",
1363 __func__, kcontrol->id.name);
1364 return -EINVAL;
1365 }
1366
1367 if (strnstr(kcontrol->id.name, "RX_0",
1368 sizeof(kcontrol->id.name)) ||
1369 strnstr(kcontrol->id.name, "TX_0",
1370 sizeof(kcontrol->id.name))) {
1371 port->channel = TDM_0;
1372 } else if (strnstr(kcontrol->id.name, "RX_1",
1373 sizeof(kcontrol->id.name)) ||
1374 strnstr(kcontrol->id.name, "TX_1",
1375 sizeof(kcontrol->id.name))) {
1376 port->channel = TDM_1;
1377 } else if (strnstr(kcontrol->id.name, "RX_2",
1378 sizeof(kcontrol->id.name)) ||
1379 strnstr(kcontrol->id.name, "TX_2",
1380 sizeof(kcontrol->id.name))) {
1381 port->channel = TDM_2;
1382 } else if (strnstr(kcontrol->id.name, "RX_3",
1383 sizeof(kcontrol->id.name)) ||
1384 strnstr(kcontrol->id.name, "TX_3",
1385 sizeof(kcontrol->id.name))) {
1386 port->channel = TDM_3;
1387 } else if (strnstr(kcontrol->id.name, "RX_4",
1388 sizeof(kcontrol->id.name)) ||
1389 strnstr(kcontrol->id.name, "TX_4",
1390 sizeof(kcontrol->id.name))) {
1391 port->channel = TDM_4;
1392 } else if (strnstr(kcontrol->id.name, "RX_5",
1393 sizeof(kcontrol->id.name)) ||
1394 strnstr(kcontrol->id.name, "TX_5",
1395 sizeof(kcontrol->id.name))) {
1396 port->channel = TDM_5;
1397 } else if (strnstr(kcontrol->id.name, "RX_6",
1398 sizeof(kcontrol->id.name)) ||
1399 strnstr(kcontrol->id.name, "TX_6",
1400 sizeof(kcontrol->id.name))) {
1401 port->channel = TDM_6;
1402 } else if (strnstr(kcontrol->id.name, "RX_7",
1403 sizeof(kcontrol->id.name)) ||
1404 strnstr(kcontrol->id.name, "TX_7",
1405 sizeof(kcontrol->id.name))) {
1406 port->channel = TDM_7;
1407 } else {
1408 pr_err("%s: unsupported channel in: %s\n",
1409 __func__, kcontrol->id.name);
1410 return -EINVAL;
1411 }
1412 } else {
1413 return -EINVAL;
1414 }
1415 return 0;
1416}
1417
1418static int tdm_get_sample_rate(int value)
1419{
1420 int sample_rate = 0;
1421
1422 switch (value) {
1423 case 0:
1424 sample_rate = SAMPLING_RATE_8KHZ;
1425 break;
1426 case 1:
1427 sample_rate = SAMPLING_RATE_16KHZ;
1428 break;
1429 case 2:
1430 sample_rate = SAMPLING_RATE_32KHZ;
1431 break;
1432 case 3:
1433 sample_rate = SAMPLING_RATE_48KHZ;
1434 break;
1435 case 4:
1436 sample_rate = SAMPLING_RATE_176P4KHZ;
1437 break;
1438 case 5:
1439 sample_rate = SAMPLING_RATE_352P8KHZ;
1440 break;
1441 default:
1442 sample_rate = SAMPLING_RATE_48KHZ;
1443 break;
1444 }
1445 return sample_rate;
1446}
1447
1448static int tdm_get_sample_rate_val(int sample_rate)
1449{
1450 int sample_rate_val = 0;
1451
1452 switch (sample_rate) {
1453 case SAMPLING_RATE_8KHZ:
1454 sample_rate_val = 0;
1455 break;
1456 case SAMPLING_RATE_16KHZ:
1457 sample_rate_val = 1;
1458 break;
1459 case SAMPLING_RATE_32KHZ:
1460 sample_rate_val = 2;
1461 break;
1462 case SAMPLING_RATE_48KHZ:
1463 sample_rate_val = 3;
1464 break;
1465 case SAMPLING_RATE_176P4KHZ:
1466 sample_rate_val = 4;
1467 break;
1468 case SAMPLING_RATE_352P8KHZ:
1469 sample_rate_val = 5;
1470 break;
1471 default:
1472 sample_rate_val = 3;
1473 break;
1474 }
1475 return sample_rate_val;
1476}
1477
1478static int tdm_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
1479 struct snd_ctl_elem_value *ucontrol)
1480{
1481 struct tdm_port port;
1482 int ret = tdm_get_port_idx(kcontrol, &port);
1483
1484 if (ret) {
1485 pr_err("%s: unsupported control: %s\n",
1486 __func__, kcontrol->id.name);
1487 } else {
1488 ucontrol->value.enumerated.item[0] = tdm_get_sample_rate_val(
1489 tdm_rx_cfg[port.mode][port.channel].sample_rate);
1490
1491 pr_debug("%s: tdm_rx_sample_rate = %d, item = %d\n", __func__,
1492 tdm_rx_cfg[port.mode][port.channel].sample_rate,
1493 ucontrol->value.enumerated.item[0]);
1494 }
1495 return ret;
1496}
1497
1498static int tdm_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
1499 struct snd_ctl_elem_value *ucontrol)
1500{
1501 struct tdm_port port;
1502 int ret = tdm_get_port_idx(kcontrol, &port);
1503
1504 if (ret) {
1505 pr_err("%s: unsupported control: %s\n",
1506 __func__, kcontrol->id.name);
1507 } else {
1508 tdm_rx_cfg[port.mode][port.channel].sample_rate =
1509 tdm_get_sample_rate(ucontrol->value.enumerated.item[0]);
1510
1511 pr_debug("%s: tdm_rx_sample_rate = %d, item = %d\n", __func__,
1512 tdm_rx_cfg[port.mode][port.channel].sample_rate,
1513 ucontrol->value.enumerated.item[0]);
1514 }
1515 return ret;
1516}
1517
1518static int tdm_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
1519 struct snd_ctl_elem_value *ucontrol)
1520{
1521 struct tdm_port port;
1522 int ret = tdm_get_port_idx(kcontrol, &port);
1523
1524 if (ret) {
1525 pr_err("%s: unsupported control: %s\n",
1526 __func__, kcontrol->id.name);
1527 } else {
1528 ucontrol->value.enumerated.item[0] = tdm_get_sample_rate_val(
1529 tdm_tx_cfg[port.mode][port.channel].sample_rate);
1530
1531 pr_debug("%s: tdm_tx_sample_rate = %d, item = %d\n", __func__,
1532 tdm_tx_cfg[port.mode][port.channel].sample_rate,
1533 ucontrol->value.enumerated.item[0]);
1534 }
1535 return ret;
1536}
1537
1538static int tdm_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
1539 struct snd_ctl_elem_value *ucontrol)
1540{
1541 struct tdm_port port;
1542 int ret = tdm_get_port_idx(kcontrol, &port);
1543
1544 if (ret) {
1545 pr_err("%s: unsupported control: %s\n",
1546 __func__, kcontrol->id.name);
1547 } else {
1548 tdm_tx_cfg[port.mode][port.channel].sample_rate =
1549 tdm_get_sample_rate(ucontrol->value.enumerated.item[0]);
1550
1551 pr_debug("%s: tdm_tx_sample_rate = %d, item = %d\n", __func__,
1552 tdm_tx_cfg[port.mode][port.channel].sample_rate,
1553 ucontrol->value.enumerated.item[0]);
1554 }
1555 return ret;
1556}
1557
1558static int tdm_get_format(int value)
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]1559{
1560 int format = 0;
1561
1562 switch (value) {
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]1563 case 0:
1564 format = SNDRV_PCM_FORMAT_S16_LE;
1565 break;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]1566 case 1:
1567 format = SNDRV_PCM_FORMAT_S24_LE;
1568 break;
1569 case 2:
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]1570 format = SNDRV_PCM_FORMAT_S32_LE;
1571 break;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]1572 default:
1573 format = SNDRV_PCM_FORMAT_S16_LE;
1574 break;
1575 }
1576 return format;
1577}
1578
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]1579static int tdm_get_format_val(int format)
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]1580{
1581 int value = 0;
1582
1583 switch (format) {
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]1584 case SNDRV_PCM_FORMAT_S16_LE:
1585 value = 0;
1586 break;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]1587 case SNDRV_PCM_FORMAT_S24_LE:
1588 value = 1;
1589 break;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]1590 case SNDRV_PCM_FORMAT_S32_LE:
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]1591 value = 2;
1592 break;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]1593 default:
1594 value = 0;
1595 break;
1596 }
1597 return value;
1598}
1599
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]1600static int tdm_rx_format_get(struct snd_kcontrol *kcontrol,
1601 struct snd_ctl_elem_value *ucontrol)
1602{
1603 struct tdm_port port;
1604 int ret = tdm_get_port_idx(kcontrol, &port);
1605
1606 if (ret) {
1607 pr_err("%s: unsupported control: %s\n",
1608 __func__, kcontrol->id.name);
1609 } else {
1610 ucontrol->value.enumerated.item[0] = tdm_get_format_val(
1611 tdm_rx_cfg[port.mode][port.channel].bit_format);
1612
1613 pr_debug("%s: tdm_rx_bit_format = %d, item = %d\n", __func__,
1614 tdm_rx_cfg[port.mode][port.channel].bit_format,
1615 ucontrol->value.enumerated.item[0]);
1616 }
1617 return ret;
1618}
1619
1620static int tdm_rx_format_put(struct snd_kcontrol *kcontrol,
1621 struct snd_ctl_elem_value *ucontrol)
1622{
1623 struct tdm_port port;
1624 int ret = tdm_get_port_idx(kcontrol, &port);
1625
1626 if (ret) {
1627 pr_err("%s: unsupported control: %s\n",
1628 __func__, kcontrol->id.name);
1629 } else {
1630 tdm_rx_cfg[port.mode][port.channel].bit_format =
1631 tdm_get_format(ucontrol->value.enumerated.item[0]);
1632
1633 pr_debug("%s: tdm_rx_bit_format = %d, item = %d\n", __func__,
1634 tdm_rx_cfg[port.mode][port.channel].bit_format,
1635 ucontrol->value.enumerated.item[0]);
1636 }
1637 return ret;
1638}
1639
1640static int tdm_tx_format_get(struct snd_kcontrol *kcontrol,
1641 struct snd_ctl_elem_value *ucontrol)
1642{
1643 struct tdm_port port;
1644 int ret = tdm_get_port_idx(kcontrol, &port);
1645
1646 if (ret) {
1647 pr_err("%s: unsupported control: %s\n",
1648 __func__, kcontrol->id.name);
1649 } else {
1650 ucontrol->value.enumerated.item[0] = tdm_get_format_val(
1651 tdm_tx_cfg[port.mode][port.channel].bit_format);
1652
1653 pr_debug("%s: tdm_tx_bit_format = %d, item = %d\n", __func__,
1654 tdm_tx_cfg[port.mode][port.channel].bit_format,
1655 ucontrol->value.enumerated.item[0]);
1656 }
1657 return ret;
1658}
1659
1660static int tdm_tx_format_put(struct snd_kcontrol *kcontrol,
1661 struct snd_ctl_elem_value *ucontrol)
1662{
1663 struct tdm_port port;
1664 int ret = tdm_get_port_idx(kcontrol, &port);
1665
1666 if (ret) {
1667 pr_err("%s: unsupported control: %s\n",
1668 __func__, kcontrol->id.name);
1669 } else {
1670 tdm_tx_cfg[port.mode][port.channel].bit_format =
1671 tdm_get_format(ucontrol->value.enumerated.item[0]);
1672
1673 pr_debug("%s: tdm_tx_bit_format = %d, item = %d\n", __func__,
1674 tdm_tx_cfg[port.mode][port.channel].bit_format,
1675 ucontrol->value.enumerated.item[0]);
1676 }
1677 return ret;
1678}
1679
1680static int tdm_rx_ch_get(struct snd_kcontrol *kcontrol,
1681 struct snd_ctl_elem_value *ucontrol)
1682{
1683 struct tdm_port port;
1684 int ret = tdm_get_port_idx(kcontrol, &port);
1685
1686 if (ret) {
1687 pr_err("%s: unsupported control: %s\n",
1688 __func__, kcontrol->id.name);
1689 } else {
1690
1691 ucontrol->value.enumerated.item[0] =
1692 tdm_rx_cfg[port.mode][port.channel].channels - 1;
1693
1694 pr_debug("%s: tdm_rx_ch = %d, item = %d\n", __func__,
1695 tdm_rx_cfg[port.mode][port.channel].channels - 1,
1696 ucontrol->value.enumerated.item[0]);
1697 }
1698 return ret;
1699}
1700
1701static int tdm_rx_ch_put(struct snd_kcontrol *kcontrol,
1702 struct snd_ctl_elem_value *ucontrol)
1703{
1704 struct tdm_port port;
1705 int ret = tdm_get_port_idx(kcontrol, &port);
1706
1707 if (ret) {
1708 pr_err("%s: unsupported control: %s\n",
1709 __func__, kcontrol->id.name);
1710 } else {
1711 tdm_rx_cfg[port.mode][port.channel].channels =
1712 ucontrol->value.enumerated.item[0] + 1;
1713
1714 pr_debug("%s: tdm_rx_ch = %d, item = %d\n", __func__,
1715 tdm_rx_cfg[port.mode][port.channel].channels,
1716 ucontrol->value.enumerated.item[0] + 1);
1717 }
1718 return ret;
1719}
1720
1721static int tdm_tx_ch_get(struct snd_kcontrol *kcontrol,
1722 struct snd_ctl_elem_value *ucontrol)
1723{
1724 struct tdm_port port;
1725 int ret = tdm_get_port_idx(kcontrol, &port);
1726
1727 if (ret) {
1728 pr_err("%s: unsupported control: %s\n",
1729 __func__, kcontrol->id.name);
1730 } else {
1731 ucontrol->value.enumerated.item[0] =
1732 tdm_tx_cfg[port.mode][port.channel].channels - 1;
1733
1734 pr_debug("%s: tdm_tx_ch = %d, item = %d\n", __func__,
1735 tdm_tx_cfg[port.mode][port.channel].channels - 1,
1736 ucontrol->value.enumerated.item[0]);
1737 }
1738 return ret;
1739}
1740
1741static int tdm_tx_ch_put(struct snd_kcontrol *kcontrol,
1742 struct snd_ctl_elem_value *ucontrol)
1743{
1744 struct tdm_port port;
1745 int ret = tdm_get_port_idx(kcontrol, &port);
1746
1747 if (ret) {
1748 pr_err("%s: unsupported control: %s\n",
1749 __func__, kcontrol->id.name);
1750 } else {
1751 tdm_tx_cfg[port.mode][port.channel].channels =
1752 ucontrol->value.enumerated.item[0] + 1;
1753
1754 pr_debug("%s: tdm_tx_ch = %d, item = %d\n", __func__,
1755 tdm_tx_cfg[port.mode][port.channel].channels,
1756 ucontrol->value.enumerated.item[0] + 1);
1757 }
1758 return ret;
1759}
1760
1761static int aux_pcm_get_port_idx(struct snd_kcontrol *kcontrol)
1762{
1763 int idx = 0;
1764
1765 if (strnstr(kcontrol->id.name, "PRIM_AUX_PCM",
1766 sizeof("PRIM_AUX_PCM"))) {
1767 idx = PRIM_AUX_PCM;
1768 } else if (strnstr(kcontrol->id.name, "SEC_AUX_PCM",
1769 sizeof("SEC_AUX_PCM"))) {
1770 idx = SEC_AUX_PCM;
1771 } else if (strnstr(kcontrol->id.name, "TERT_AUX_PCM",
1772 sizeof("TERT_AUX_PCM"))) {
1773 idx = TERT_AUX_PCM;
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame^]1774 } else if (strnstr(kcontrol->id.name, "QUAT_AUX_PCM",
1775 sizeof("QUAT_AUX_PCM"))) {
1776 idx = QUAT_AUX_PCM;
1777 } else if (strnstr(kcontrol->id.name, "QUIN_AUX_PCM",
1778 sizeof("QUIN_AUX_PCM"))) {
1779 idx = QUIN_AUX_PCM;
1780 } else if (strnstr(kcontrol->id.name, "SEN_AUX_PCM",
1781 sizeof("SEN_AUX_PCM"))) {
1782 idx = SEN_AUX_PCM;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]1783 } else {
1784 pr_err("%s: unsupported port: %s\n",
1785 __func__, kcontrol->id.name);
1786 idx = -EINVAL;
1787 }
1788
1789 return idx;
1790}
1791
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]1792static int aux_pcm_get_sample_rate(int value)
1793{
1794 int sample_rate = 0;
1795
1796 switch (value) {
1797 case 1:
1798 sample_rate = SAMPLING_RATE_16KHZ;
1799 break;
1800 case 0:
1801 default:
1802 sample_rate = SAMPLING_RATE_8KHZ;
1803 break;
1804 }
1805 return sample_rate;
1806}
1807
1808static int aux_pcm_get_sample_rate_val(int sample_rate)
1809{
1810 int sample_rate_val = 0;
1811
1812 switch (sample_rate) {
1813 case SAMPLING_RATE_16KHZ:
1814 sample_rate_val = 1;
1815 break;
1816 case SAMPLING_RATE_8KHZ:
1817 default:
1818 sample_rate_val = 0;
1819 break;
1820 }
1821 return sample_rate_val;
1822}
1823
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]1824static int mi2s_auxpcm_get_format(int value)
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]1825{
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]1826 int format = 0;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]1827
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]1828 switch (value) {
1829 case 0:
1830 format = SNDRV_PCM_FORMAT_S16_LE;
1831 break;
1832 case 1:
1833 format = SNDRV_PCM_FORMAT_S24_LE;
1834 break;
1835 case 2:
1836 format = SNDRV_PCM_FORMAT_S24_3LE;
1837 break;
1838 case 3:
1839 format = SNDRV_PCM_FORMAT_S32_LE;
1840 break;
1841 default:
1842 format = SNDRV_PCM_FORMAT_S16_LE;
1843 break;
1844 }
1845 return format;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]1846}
1847
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]1848static int mi2s_auxpcm_get_format_value(int format)
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]1849{
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]1850 int value = 0;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]1851
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]1852 switch (format) {
1853 case SNDRV_PCM_FORMAT_S16_LE:
1854 value = 0;
1855 break;
1856 case SNDRV_PCM_FORMAT_S24_LE:
1857 value = 1;
1858 break;
1859 case SNDRV_PCM_FORMAT_S24_3LE:
1860 value = 2;
1861 break;
1862 case SNDRV_PCM_FORMAT_S32_LE:
1863 value = 3;
1864 break;
1865 default:
1866 value = 0;
1867 break;
1868 }
1869 return value;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]1870}
1871
1872static int aux_pcm_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
1873 struct snd_ctl_elem_value *ucontrol)
1874{
1875 int idx = aux_pcm_get_port_idx(kcontrol);
1876
1877 if (idx < 0)
1878 return idx;
1879
1880 ucontrol->value.enumerated.item[0] =
1881 aux_pcm_get_sample_rate_val(aux_pcm_rx_cfg[idx].sample_rate);
1882
1883 pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
1884 idx, aux_pcm_rx_cfg[idx].sample_rate,
1885 ucontrol->value.enumerated.item[0]);
1886
1887 return 0;
1888}
1889
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]1890static int aux_pcm_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]1891 struct snd_ctl_elem_value *ucontrol)
1892{
1893 int idx = aux_pcm_get_port_idx(kcontrol);
1894
1895 if (idx < 0)
1896 return idx;
1897
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]1898 aux_pcm_rx_cfg[idx].sample_rate =
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]1899 aux_pcm_get_sample_rate(ucontrol->value.enumerated.item[0]);
1900
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]1901 pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
1902 idx, aux_pcm_rx_cfg[idx].sample_rate,
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]1903 ucontrol->value.enumerated.item[0]);
1904
1905 return 0;
1906}
1907
1908static int aux_pcm_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
1909 struct snd_ctl_elem_value *ucontrol)
1910{
1911 int idx = aux_pcm_get_port_idx(kcontrol);
1912
1913 if (idx < 0)
1914 return idx;
1915
1916 ucontrol->value.enumerated.item[0] =
1917 aux_pcm_get_sample_rate_val(aux_pcm_tx_cfg[idx].sample_rate);
1918
1919 pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
1920 idx, aux_pcm_tx_cfg[idx].sample_rate,
1921 ucontrol->value.enumerated.item[0]);
1922
1923 return 0;
1924}
1925
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]1926static int aux_pcm_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
1927 struct snd_ctl_elem_value *ucontrol)
1928{
1929 int idx = aux_pcm_get_port_idx(kcontrol);
1930
1931 if (idx < 0)
1932 return idx;
1933
1934 aux_pcm_tx_cfg[idx].sample_rate =
1935 aux_pcm_get_sample_rate(ucontrol->value.enumerated.item[0]);
1936
1937 pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
1938 idx, aux_pcm_tx_cfg[idx].sample_rate,
1939 ucontrol->value.enumerated.item[0]);
1940
1941 return 0;
1942}
1943
1944static int msm_aux_pcm_rx_format_get(struct snd_kcontrol *kcontrol,
1945 struct snd_ctl_elem_value *ucontrol)
1946{
1947 int idx = aux_pcm_get_port_idx(kcontrol);
1948
1949 if (idx < 0)
1950 return idx;
1951
1952 ucontrol->value.enumerated.item[0] =
1953 mi2s_auxpcm_get_format_value(aux_pcm_rx_cfg[idx].bit_format);
1954
1955 pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
1956 idx, aux_pcm_rx_cfg[idx].bit_format,
1957 ucontrol->value.enumerated.item[0]);
1958
1959 return 0;
1960}
1961
1962static int msm_aux_pcm_rx_format_put(struct snd_kcontrol *kcontrol,
1963 struct snd_ctl_elem_value *ucontrol)
1964{
1965 int idx = aux_pcm_get_port_idx(kcontrol);
1966
1967 if (idx < 0)
1968 return idx;
1969
1970 aux_pcm_rx_cfg[idx].bit_format =
1971 mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
1972
1973 pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
1974 idx, aux_pcm_rx_cfg[idx].bit_format,
1975 ucontrol->value.enumerated.item[0]);
1976
1977 return 0;
1978}
1979
1980static int msm_aux_pcm_tx_format_get(struct snd_kcontrol *kcontrol,
1981 struct snd_ctl_elem_value *ucontrol)
1982{
1983 int idx = aux_pcm_get_port_idx(kcontrol);
1984
1985 if (idx < 0)
1986 return idx;
1987
1988 ucontrol->value.enumerated.item[0] =
1989 mi2s_auxpcm_get_format_value(aux_pcm_tx_cfg[idx].bit_format);
1990
1991 pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
1992 idx, aux_pcm_tx_cfg[idx].bit_format,
1993 ucontrol->value.enumerated.item[0]);
1994
1995 return 0;
1996}
1997
1998static int msm_aux_pcm_tx_format_put(struct snd_kcontrol *kcontrol,
1999 struct snd_ctl_elem_value *ucontrol)
2000{
2001 int idx = aux_pcm_get_port_idx(kcontrol);
2002
2003 if (idx < 0)
2004 return idx;
2005
2006 aux_pcm_tx_cfg[idx].bit_format =
2007 mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
2008
2009 pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
2010 idx, aux_pcm_tx_cfg[idx].bit_format,
2011 ucontrol->value.enumerated.item[0]);
2012
2013 return 0;
2014}
2015
2016static int mi2s_get_port_idx(struct snd_kcontrol *kcontrol)
2017{
2018 int idx = 0;
2019
2020 if (strnstr(kcontrol->id.name, "PRIM_MI2S_RX",
2021 sizeof("PRIM_MI2S_RX"))) {
2022 idx = PRIM_MI2S;
2023 } else if (strnstr(kcontrol->id.name, "SEC_MI2S_RX",
2024 sizeof("SEC_MI2S_RX"))) {
2025 idx = SEC_MI2S;
2026 } else if (strnstr(kcontrol->id.name, "TERT_MI2S_RX",
2027 sizeof("TERT_MI2S_RX"))) {
2028 idx = TERT_MI2S;
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame^]2029 } else if (strnstr(kcontrol->id.name, "QUAT_MI2S_RX",
2030 sizeof("QUAT_MI2S_RX"))) {
2031 idx = QUAT_MI2S;
2032 } else if (strnstr(kcontrol->id.name, "QUIN_MI2S_RX",
2033 sizeof("QUIN_MI2S_RX"))) {
2034 idx = QUIN_MI2S;
2035 } else if (strnstr(kcontrol->id.name, "SEN_MI2S_RX",
2036 sizeof("SEN_MI2S_RX"))) {
2037 idx = SEN_MI2S;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]2038 } else if (strnstr(kcontrol->id.name, "PRIM_MI2S_TX",
2039 sizeof("PRIM_MI2S_TX"))) {
2040 idx = PRIM_MI2S;
2041 } else if (strnstr(kcontrol->id.name, "SEC_MI2S_TX",
2042 sizeof("SEC_MI2S_TX"))) {
2043 idx = SEC_MI2S;
2044 } else if (strnstr(kcontrol->id.name, "TERT_MI2S_TX",
2045 sizeof("TERT_MI2S_TX"))) {
2046 idx = TERT_MI2S;
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame^]2047 } else if (strnstr(kcontrol->id.name, "QUAT_MI2S_TX",
2048 sizeof("QUAT_MI2S_TX"))) {
2049 idx = QUAT_MI2S;
2050 } else if (strnstr(kcontrol->id.name, "QUIN_MI2S_TX",
2051 sizeof("QUIN_MI2S_TX"))) {
2052 idx = QUIN_MI2S;
2053 } else if (strnstr(kcontrol->id.name, "SEN_MI2S_TX",
2054 sizeof("SEN_MI2S_TX"))) {
2055 idx = SEN_MI2S;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]2056 } else {
2057 pr_err("%s: unsupported channel: %s\n",
2058 __func__, kcontrol->id.name);
2059 idx = -EINVAL;
2060 }
2061
2062 return idx;
2063}
2064
2065static int mi2s_get_sample_rate(int value)
2066{
2067 int sample_rate = 0;
2068
2069 switch (value) {
2070 case 0:
2071 sample_rate = SAMPLING_RATE_8KHZ;
2072 break;
2073 case 1:
2074 sample_rate = SAMPLING_RATE_11P025KHZ;
2075 break;
2076 case 2:
2077 sample_rate = SAMPLING_RATE_16KHZ;
2078 break;
2079 case 3:
2080 sample_rate = SAMPLING_RATE_22P05KHZ;
2081 break;
2082 case 4:
2083 sample_rate = SAMPLING_RATE_32KHZ;
2084 break;
2085 case 5:
2086 sample_rate = SAMPLING_RATE_44P1KHZ;
2087 break;
2088 case 6:
2089 sample_rate = SAMPLING_RATE_48KHZ;
2090 break;
2091 case 7:
2092 sample_rate = SAMPLING_RATE_96KHZ;
2093 break;
2094 case 8:
2095 sample_rate = SAMPLING_RATE_192KHZ;
2096 break;
2097 default:
2098 sample_rate = SAMPLING_RATE_48KHZ;
2099 break;
2100 }
2101 return sample_rate;
2102}
2103
2104static int mi2s_get_sample_rate_val(int sample_rate)
2105{
2106 int sample_rate_val = 0;
2107
2108 switch (sample_rate) {
2109 case SAMPLING_RATE_8KHZ:
2110 sample_rate_val = 0;
2111 break;
2112 case SAMPLING_RATE_11P025KHZ:
2113 sample_rate_val = 1;
2114 break;
2115 case SAMPLING_RATE_16KHZ:
2116 sample_rate_val = 2;
2117 break;
2118 case SAMPLING_RATE_22P05KHZ:
2119 sample_rate_val = 3;
2120 break;
2121 case SAMPLING_RATE_32KHZ:
2122 sample_rate_val = 4;
2123 break;
2124 case SAMPLING_RATE_44P1KHZ:
2125 sample_rate_val = 5;
2126 break;
2127 case SAMPLING_RATE_48KHZ:
2128 sample_rate_val = 6;
2129 break;
2130 case SAMPLING_RATE_96KHZ:
2131 sample_rate_val = 7;
2132 break;
2133 case SAMPLING_RATE_192KHZ:
2134 sample_rate_val = 8;
2135 break;
2136 default:
2137 sample_rate_val = 6;
2138 break;
2139 }
2140 return sample_rate_val;
2141}
2142
2143static int mi2s_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
2144 struct snd_ctl_elem_value *ucontrol)
2145{
2146 int idx = mi2s_get_port_idx(kcontrol);
2147
2148 if (idx < 0)
2149 return idx;
2150
2151 ucontrol->value.enumerated.item[0] =
2152 mi2s_get_sample_rate_val(mi2s_rx_cfg[idx].sample_rate);
2153
2154 pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
2155 idx, mi2s_rx_cfg[idx].sample_rate,
2156 ucontrol->value.enumerated.item[0]);
2157
2158 return 0;
2159}
2160
2161static int mi2s_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
2162 struct snd_ctl_elem_value *ucontrol)
2163{
2164 int idx = mi2s_get_port_idx(kcontrol);
2165
2166 if (idx < 0)
2167 return idx;
2168
2169 mi2s_rx_cfg[idx].sample_rate =
2170 mi2s_get_sample_rate(ucontrol->value.enumerated.item[0]);
2171
2172 pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
2173 idx, mi2s_rx_cfg[idx].sample_rate,
2174 ucontrol->value.enumerated.item[0]);
2175
2176 return 0;
2177}
2178
2179static int mi2s_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
2180 struct snd_ctl_elem_value *ucontrol)
2181{
2182 int idx = mi2s_get_port_idx(kcontrol);
2183
2184 if (idx < 0)
2185 return idx;
2186
2187 ucontrol->value.enumerated.item[0] =
2188 mi2s_get_sample_rate_val(mi2s_tx_cfg[idx].sample_rate);
2189
2190 pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
2191 idx, mi2s_tx_cfg[idx].sample_rate,
2192 ucontrol->value.enumerated.item[0]);
2193
2194 return 0;
2195}
2196
2197static int mi2s_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
2198 struct snd_ctl_elem_value *ucontrol)
2199{
2200 int idx = mi2s_get_port_idx(kcontrol);
2201
2202 if (idx < 0)
2203 return idx;
2204
2205 mi2s_tx_cfg[idx].sample_rate =
2206 mi2s_get_sample_rate(ucontrol->value.enumerated.item[0]);
2207
2208 pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
2209 idx, mi2s_tx_cfg[idx].sample_rate,
2210 ucontrol->value.enumerated.item[0]);
2211
2212 return 0;
2213}
2214
2215static int msm_mi2s_rx_format_get(struct snd_kcontrol *kcontrol,
2216 struct snd_ctl_elem_value *ucontrol)
2217{
2218 int idx = mi2s_get_port_idx(kcontrol);
2219
2220 if (idx < 0)
2221 return idx;
2222
2223 ucontrol->value.enumerated.item[0] =
2224 mi2s_auxpcm_get_format_value(mi2s_rx_cfg[idx].bit_format);
2225
2226 pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
2227 idx, mi2s_rx_cfg[idx].bit_format,
2228 ucontrol->value.enumerated.item[0]);
2229
2230 return 0;
2231}
2232
2233static int msm_mi2s_rx_format_put(struct snd_kcontrol *kcontrol,
2234 struct snd_ctl_elem_value *ucontrol)
2235{
2236 int idx = mi2s_get_port_idx(kcontrol);
2237
2238 if (idx < 0)
2239 return idx;
2240
2241 mi2s_rx_cfg[idx].bit_format =
2242 mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
2243
2244 pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
2245 idx, mi2s_rx_cfg[idx].bit_format,
2246 ucontrol->value.enumerated.item[0]);
2247
2248 return 0;
2249}
2250
2251static int msm_mi2s_tx_format_get(struct snd_kcontrol *kcontrol,
2252 struct snd_ctl_elem_value *ucontrol)
2253{
2254 int idx = mi2s_get_port_idx(kcontrol);
2255
2256 if (idx < 0)
2257 return idx;
2258
2259 ucontrol->value.enumerated.item[0] =
2260 mi2s_auxpcm_get_format_value(mi2s_tx_cfg[idx].bit_format);
2261
2262 pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
2263 idx, mi2s_tx_cfg[idx].bit_format,
2264 ucontrol->value.enumerated.item[0]);
2265
2266 return 0;
2267}
2268
2269static int msm_mi2s_tx_format_put(struct snd_kcontrol *kcontrol,
2270 struct snd_ctl_elem_value *ucontrol)
2271{
2272 int idx = mi2s_get_port_idx(kcontrol);
2273
2274 if (idx < 0)
2275 return idx;
2276
2277 mi2s_tx_cfg[idx].bit_format =
2278 mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
2279
2280 pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
2281 idx, mi2s_tx_cfg[idx].bit_format,
2282 ucontrol->value.enumerated.item[0]);
2283
2284 return 0;
2285}
2286static int msm_mi2s_rx_ch_get(struct snd_kcontrol *kcontrol,
2287 struct snd_ctl_elem_value *ucontrol)
2288{
2289 int idx = mi2s_get_port_idx(kcontrol);
2290
2291 if (idx < 0)
2292 return idx;
2293
2294 pr_debug("%s: msm_mi2s_[%d]_rx_ch = %d\n", __func__,
2295 idx, mi2s_rx_cfg[idx].channels);
2296 ucontrol->value.enumerated.item[0] = mi2s_rx_cfg[idx].channels - 1;
2297
2298 return 0;
2299}
2300
2301static int msm_mi2s_rx_ch_put(struct snd_kcontrol *kcontrol,
2302 struct snd_ctl_elem_value *ucontrol)
2303{
2304 int idx = mi2s_get_port_idx(kcontrol);
2305
2306 if (idx < 0)
2307 return idx;
2308
2309 mi2s_rx_cfg[idx].channels = ucontrol->value.enumerated.item[0] + 1;
2310 pr_debug("%s: msm_mi2s_[%d]_rx_ch = %d\n", __func__,
2311 idx, mi2s_rx_cfg[idx].channels);
2312
2313 return 1;
2314}
2315
2316static int msm_mi2s_tx_ch_get(struct snd_kcontrol *kcontrol,
2317 struct snd_ctl_elem_value *ucontrol)
2318{
2319 int idx = mi2s_get_port_idx(kcontrol);
2320
2321 if (idx < 0)
2322 return idx;
2323
2324 pr_debug("%s: msm_mi2s_[%d]_tx_ch = %d\n", __func__,
2325 idx, mi2s_tx_cfg[idx].channels);
2326 ucontrol->value.enumerated.item[0] = mi2s_tx_cfg[idx].channels - 1;
2327
2328 return 0;
2329}
2330
2331static int msm_mi2s_tx_ch_put(struct snd_kcontrol *kcontrol,
2332 struct snd_ctl_elem_value *ucontrol)
2333{
2334 int idx = mi2s_get_port_idx(kcontrol);
2335
2336 if (idx < 0)
2337 return idx;
2338
2339 mi2s_tx_cfg[idx].channels = ucontrol->value.enumerated.item[0] + 1;
2340 pr_debug("%s: msm_mi2s_[%d]_tx_ch = %d\n", __func__,
2341 idx, mi2s_tx_cfg[idx].channels);
2342
2343 return 1;
2344}
2345
2346static int msm_get_port_id(int be_id)
2347{
2348 int afe_port_id = 0;
2349
2350 switch (be_id) {
2351 case MSM_BACKEND_DAI_PRI_MI2S_RX:
2352 afe_port_id = AFE_PORT_ID_PRIMARY_MI2S_RX;
2353 break;
2354 case MSM_BACKEND_DAI_PRI_MI2S_TX:
2355 afe_port_id = AFE_PORT_ID_PRIMARY_MI2S_TX;
2356 break;
2357 case MSM_BACKEND_DAI_SECONDARY_MI2S_RX:
2358 afe_port_id = AFE_PORT_ID_SECONDARY_MI2S_RX;
2359 break;
2360 case MSM_BACKEND_DAI_SECONDARY_MI2S_TX:
2361 afe_port_id = AFE_PORT_ID_SECONDARY_MI2S_TX;
2362 break;
2363 case MSM_BACKEND_DAI_TERTIARY_MI2S_RX:
2364 afe_port_id = AFE_PORT_ID_TERTIARY_MI2S_RX;
2365 break;
2366 case MSM_BACKEND_DAI_TERTIARY_MI2S_TX:
2367 afe_port_id = AFE_PORT_ID_TERTIARY_MI2S_TX;
2368 break;
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame^]2369 case MSM_BACKEND_DAI_QUATERNARY_MI2S_RX:
2370 afe_port_id = AFE_PORT_ID_QUATERNARY_MI2S_RX;
2371 break;
2372 case MSM_BACKEND_DAI_QUATERNARY_MI2S_TX:
2373 afe_port_id = AFE_PORT_ID_QUATERNARY_MI2S_TX;
2374 break;
2375 case MSM_BACKEND_DAI_QUINARY_MI2S_RX:
2376 afe_port_id = AFE_PORT_ID_QUINARY_MI2S_RX;
2377 break;
2378 case MSM_BACKEND_DAI_QUINARY_MI2S_TX:
2379 afe_port_id = AFE_PORT_ID_QUINARY_MI2S_TX;
2380 break;
2381 case MSM_BACKEND_DAI_SENARY_MI2S_RX:
2382 afe_port_id = AFE_PORT_ID_SENARY_MI2S_RX;
2383 break;
2384 case MSM_BACKEND_DAI_SENARY_MI2S_TX:
2385 afe_port_id = AFE_PORT_ID_SENARY_MI2S_TX;
2386 break;
Xiaoyu Yeffbdc9f2019-05-17 15:02:39 -0700[diff] [blame]2387 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_0:
2388 afe_port_id = AFE_PORT_ID_VA_CODEC_DMA_TX_0;
2389 break;
2390 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_1:
2391 afe_port_id = AFE_PORT_ID_VA_CODEC_DMA_TX_1;
2392 break;
2393 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_2:
2394 afe_port_id = AFE_PORT_ID_VA_CODEC_DMA_TX_2;
2395 break;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]2396 default:
2397 pr_err("%s: Invalid BE id: %d\n", __func__, be_id);
2398 afe_port_id = -EINVAL;
2399 }
2400
2401 return afe_port_id;
2402}
2403
2404static u32 get_mi2s_bits_per_sample(u32 bit_format)
2405{
2406 u32 bit_per_sample = 0;
2407
2408 switch (bit_format) {
2409 case SNDRV_PCM_FORMAT_S32_LE:
2410 case SNDRV_PCM_FORMAT_S24_3LE:
2411 case SNDRV_PCM_FORMAT_S24_LE:
2412 bit_per_sample = 32;
2413 break;
2414 case SNDRV_PCM_FORMAT_S16_LE:
2415 default:
2416 bit_per_sample = 16;
2417 break;
2418 }
2419
2420 return bit_per_sample;
2421}
2422
2423static void update_mi2s_clk_val(int dai_id, int stream)
2424{
2425 u32 bit_per_sample = 0;
2426
2427 if (stream == SNDRV_PCM_STREAM_PLAYBACK) {
2428 bit_per_sample =
2429 get_mi2s_bits_per_sample(mi2s_rx_cfg[dai_id].bit_format);
2430 mi2s_clk[dai_id].clk_freq_in_hz =
2431 mi2s_rx_cfg[dai_id].sample_rate * 2 * bit_per_sample;
2432 } else {
2433 bit_per_sample =
2434 get_mi2s_bits_per_sample(mi2s_tx_cfg[dai_id].bit_format);
2435 mi2s_clk[dai_id].clk_freq_in_hz =
2436 mi2s_tx_cfg[dai_id].sample_rate * 2 * bit_per_sample;
2437 }
2438}
2439
2440static int msm_mi2s_set_sclk(struct snd_pcm_substream *substream, bool enable)
2441{
2442 int ret = 0;
2443 struct snd_soc_pcm_runtime *rtd = substream->private_data;
2444 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
2445 int port_id = 0;
2446 int index = cpu_dai->id;
2447
2448 port_id = msm_get_port_id(rtd->dai_link->id);
2449 if (port_id < 0) {
2450 dev_err(rtd->card->dev, "%s: Invalid port_id\n", __func__);
2451 ret = port_id;
2452 goto err;
2453 }
2454
2455 if (enable) {
2456 update_mi2s_clk_val(index, substream->stream);
2457 dev_dbg(rtd->card->dev, "%s: clock rate %ul\n", __func__,
2458 mi2s_clk[index].clk_freq_in_hz);
2459 }
2460
2461 mi2s_clk[index].enable = enable;
2462 ret = afe_set_lpass_clock_v2(port_id,
2463 &mi2s_clk[index]);
2464 if (ret < 0) {
2465 dev_err(rtd->card->dev,
2466 "%s: afe lpass clock failed for port 0x%x , err:%d\n",
2467 __func__, port_id, ret);
2468 goto err;
2469 }
2470
2471err:
2472 return ret;
2473}
2474
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]2475static int cdc_dma_get_port_idx(struct snd_kcontrol *kcontrol)
2476{
2477 int idx = 0;
2478
2479 if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_RX_0",
2480 sizeof("WSA_CDC_DMA_RX_0")))
2481 idx = WSA_CDC_DMA_RX_0;
2482 else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_RX_1",
2483 sizeof("WSA_CDC_DMA_RX_0")))
2484 idx = WSA_CDC_DMA_RX_1;
2485 else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_0",
2486 sizeof("RX_CDC_DMA_RX_0")))
2487 idx = RX_CDC_DMA_RX_0;
2488 else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_1",
2489 sizeof("RX_CDC_DMA_RX_1")))
2490 idx = RX_CDC_DMA_RX_1;
2491 else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_2",
2492 sizeof("RX_CDC_DMA_RX_2")))
2493 idx = RX_CDC_DMA_RX_2;
2494 else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_3",
2495 sizeof("RX_CDC_DMA_RX_3")))
2496 idx = RX_CDC_DMA_RX_3;
2497 else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_5",
2498 sizeof("RX_CDC_DMA_RX_5")))
2499 idx = RX_CDC_DMA_RX_5;
2500 else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_0",
2501 sizeof("WSA_CDC_DMA_TX_0")))
2502 idx = WSA_CDC_DMA_TX_0;
2503 else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_1",
2504 sizeof("WSA_CDC_DMA_TX_1")))
2505 idx = WSA_CDC_DMA_TX_1;
2506 else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_2",
2507 sizeof("WSA_CDC_DMA_TX_2")))
2508 idx = WSA_CDC_DMA_TX_2;
2509 else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_0",
2510 sizeof("TX_CDC_DMA_TX_0")))
2511 idx = TX_CDC_DMA_TX_0;
2512 else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_3",
2513 sizeof("TX_CDC_DMA_TX_3")))
2514 idx = TX_CDC_DMA_TX_3;
2515 else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_4",
2516 sizeof("TX_CDC_DMA_TX_4")))
2517 idx = TX_CDC_DMA_TX_4;
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800[diff] [blame]2518 else if (strnstr(kcontrol->id.name, "VA_CDC_DMA_TX_0",
2519 sizeof("VA_CDC_DMA_TX_0")))
2520 idx = VA_CDC_DMA_TX_0;
2521 else if (strnstr(kcontrol->id.name, "VA_CDC_DMA_TX_1",
2522 sizeof("VA_CDC_DMA_TX_1")))
2523 idx = VA_CDC_DMA_TX_1;
2524 else if (strnstr(kcontrol->id.name, "VA_CDC_DMA_TX_2",
2525 sizeof("VA_CDC_DMA_TX_2")))
2526 idx = VA_CDC_DMA_TX_2;
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]2527 else {
2528 pr_err("%s: unsupported channel: %s\n",
2529 __func__, kcontrol->id.name);
2530 return -EINVAL;
2531 }
2532
2533 return idx;
2534}
2535
2536static int cdc_dma_rx_ch_get(struct snd_kcontrol *kcontrol,
2537 struct snd_ctl_elem_value *ucontrol)
2538{
2539 int ch_num = cdc_dma_get_port_idx(kcontrol);
2540
Vignesh Kulothungan9e17da02019-03-21 12:15:59 -0700[diff] [blame]2541 if (ch_num < 0 || ch_num >= CDC_DMA_RX_MAX) {
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]2542 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
2543 return ch_num;
2544 }
2545
2546 pr_debug("%s: cdc_dma_rx_ch = %d\n", __func__,
2547 cdc_dma_rx_cfg[ch_num].channels - 1);
2548 ucontrol->value.integer.value[0] = cdc_dma_rx_cfg[ch_num].channels - 1;
2549 return 0;
2550}
2551
2552static int cdc_dma_rx_ch_put(struct snd_kcontrol *kcontrol,
2553 struct snd_ctl_elem_value *ucontrol)
2554{
2555 int ch_num = cdc_dma_get_port_idx(kcontrol);
2556
Vignesh Kulothungan9e17da02019-03-21 12:15:59 -0700[diff] [blame]2557 if (ch_num < 0 || ch_num >= CDC_DMA_RX_MAX) {
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]2558 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
2559 return ch_num;
2560 }
2561
2562 cdc_dma_rx_cfg[ch_num].channels = ucontrol->value.integer.value[0] + 1;
2563
2564 pr_debug("%s: cdc_dma_rx_ch = %d\n", __func__,
2565 cdc_dma_rx_cfg[ch_num].channels);
2566 return 1;
2567}
2568
2569static int cdc_dma_rx_format_get(struct snd_kcontrol *kcontrol,
2570 struct snd_ctl_elem_value *ucontrol)
2571{
2572 int ch_num = cdc_dma_get_port_idx(kcontrol);
2573
Vignesh Kulothungan9e17da02019-03-21 12:15:59 -0700[diff] [blame]2574 if (ch_num < 0 || ch_num >= CDC_DMA_RX_MAX) {
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]2575 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
2576 return ch_num;
2577 }
2578
2579 switch (cdc_dma_rx_cfg[ch_num].bit_format) {
2580 case SNDRV_PCM_FORMAT_S32_LE:
2581 ucontrol->value.integer.value[0] = 3;
2582 break;
2583 case SNDRV_PCM_FORMAT_S24_3LE:
2584 ucontrol->value.integer.value[0] = 2;
2585 break;
2586 case SNDRV_PCM_FORMAT_S24_LE:
2587 ucontrol->value.integer.value[0] = 1;
2588 break;
2589 case SNDRV_PCM_FORMAT_S16_LE:
2590 default:
2591 ucontrol->value.integer.value[0] = 0;
2592 break;
2593 }
2594
2595 pr_debug("%s: cdc_dma_rx_format = %d, ucontrol value = %ld\n",
2596 __func__, cdc_dma_rx_cfg[ch_num].bit_format,
2597 ucontrol->value.integer.value[0]);
2598 return 0;
2599}
2600
2601static int cdc_dma_rx_format_put(struct snd_kcontrol *kcontrol,
2602 struct snd_ctl_elem_value *ucontrol)
2603{
2604 int rc = 0;
2605 int ch_num = cdc_dma_get_port_idx(kcontrol);
2606
Vignesh Kulothungan9e17da02019-03-21 12:15:59 -0700[diff] [blame]2607 if (ch_num < 0 || ch_num >= CDC_DMA_RX_MAX) {
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]2608 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
2609 return ch_num;
2610 }
2611
2612 switch (ucontrol->value.integer.value[0]) {
2613 case 3:
2614 cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S32_LE;
2615 break;
2616 case 2:
2617 cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
2618 break;
2619 case 1:
2620 cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_LE;
2621 break;
2622 case 0:
2623 default:
2624 cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S16_LE;
2625 break;
2626 }
2627 pr_debug("%s: cdc_dma_rx_format = %d, ucontrol value = %ld\n",
2628 __func__, cdc_dma_rx_cfg[ch_num].bit_format,
2629 ucontrol->value.integer.value[0]);
2630
2631 return rc;
2632}
2633
2634
2635static int cdc_dma_get_sample_rate_val(int sample_rate)
2636{
2637 int sample_rate_val = 0;
2638
2639 switch (sample_rate) {
2640 case SAMPLING_RATE_8KHZ:
2641 sample_rate_val = 0;
2642 break;
2643 case SAMPLING_RATE_11P025KHZ:
2644 sample_rate_val = 1;
2645 break;
2646 case SAMPLING_RATE_16KHZ:
2647 sample_rate_val = 2;
2648 break;
2649 case SAMPLING_RATE_22P05KHZ:
2650 sample_rate_val = 3;
2651 break;
2652 case SAMPLING_RATE_32KHZ:
2653 sample_rate_val = 4;
2654 break;
2655 case SAMPLING_RATE_44P1KHZ:
2656 sample_rate_val = 5;
2657 break;
2658 case SAMPLING_RATE_48KHZ:
2659 sample_rate_val = 6;
2660 break;
2661 case SAMPLING_RATE_88P2KHZ:
2662 sample_rate_val = 7;
2663 break;
2664 case SAMPLING_RATE_96KHZ:
2665 sample_rate_val = 8;
2666 break;
2667 case SAMPLING_RATE_176P4KHZ:
2668 sample_rate_val = 9;
2669 break;
2670 case SAMPLING_RATE_192KHZ:
2671 sample_rate_val = 10;
2672 break;
2673 case SAMPLING_RATE_352P8KHZ:
2674 sample_rate_val = 11;
2675 break;
2676 case SAMPLING_RATE_384KHZ:
2677 sample_rate_val = 12;
2678 break;
2679 default:
2680 sample_rate_val = 6;
2681 break;
2682 }
2683 return sample_rate_val;
2684}
2685
2686static int cdc_dma_get_sample_rate(int value)
2687{
2688 int sample_rate = 0;
2689
2690 switch (value) {
2691 case 0:
2692 sample_rate = SAMPLING_RATE_8KHZ;
2693 break;
2694 case 1:
2695 sample_rate = SAMPLING_RATE_11P025KHZ;
2696 break;
2697 case 2:
2698 sample_rate = SAMPLING_RATE_16KHZ;
2699 break;
2700 case 3:
2701 sample_rate = SAMPLING_RATE_22P05KHZ;
2702 break;
2703 case 4:
2704 sample_rate = SAMPLING_RATE_32KHZ;
2705 break;
2706 case 5:
2707 sample_rate = SAMPLING_RATE_44P1KHZ;
2708 break;
2709 case 6:
2710 sample_rate = SAMPLING_RATE_48KHZ;
2711 break;
2712 case 7:
2713 sample_rate = SAMPLING_RATE_88P2KHZ;
2714 break;
2715 case 8:
2716 sample_rate = SAMPLING_RATE_96KHZ;
2717 break;
2718 case 9:
2719 sample_rate = SAMPLING_RATE_176P4KHZ;
2720 break;
2721 case 10:
2722 sample_rate = SAMPLING_RATE_192KHZ;
2723 break;
2724 case 11:
2725 sample_rate = SAMPLING_RATE_352P8KHZ;
2726 break;
2727 case 12:
2728 sample_rate = SAMPLING_RATE_384KHZ;
2729 break;
2730 default:
2731 sample_rate = SAMPLING_RATE_48KHZ;
2732 break;
2733 }
2734 return sample_rate;
2735}
2736
2737static int cdc_dma_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
2738 struct snd_ctl_elem_value *ucontrol)
2739{
2740 int ch_num = cdc_dma_get_port_idx(kcontrol);
2741
Vignesh Kulothungan9e17da02019-03-21 12:15:59 -0700[diff] [blame]2742 if (ch_num < 0 || ch_num >= CDC_DMA_RX_MAX) {
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]2743 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
2744 return ch_num;
2745 }
2746
2747 ucontrol->value.enumerated.item[0] =
2748 cdc_dma_get_sample_rate_val(cdc_dma_rx_cfg[ch_num].sample_rate);
2749
2750 pr_debug("%s: cdc_dma_rx_sample_rate = %d\n", __func__,
2751 cdc_dma_rx_cfg[ch_num].sample_rate);
2752 return 0;
2753}
2754
2755static int cdc_dma_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
2756 struct snd_ctl_elem_value *ucontrol)
2757{
2758 int ch_num = cdc_dma_get_port_idx(kcontrol);
2759
Vignesh Kulothungan9e17da02019-03-21 12:15:59 -0700[diff] [blame]2760 if (ch_num < 0 || ch_num >= CDC_DMA_RX_MAX) {
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]2761 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
2762 return ch_num;
2763 }
2764
2765 cdc_dma_rx_cfg[ch_num].sample_rate =
2766 cdc_dma_get_sample_rate(ucontrol->value.enumerated.item[0]);
2767
2768
2769 pr_debug("%s: control value = %d, cdc_dma_rx_sample_rate = %d\n",
2770 __func__, ucontrol->value.enumerated.item[0],
2771 cdc_dma_rx_cfg[ch_num].sample_rate);
2772 return 0;
2773}
2774
2775static int cdc_dma_tx_ch_get(struct snd_kcontrol *kcontrol,
2776 struct snd_ctl_elem_value *ucontrol)
2777{
2778 int ch_num = cdc_dma_get_port_idx(kcontrol);
2779
2780 if (ch_num < 0) {
2781 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
2782 return ch_num;
2783 }
2784
2785 pr_debug("%s: cdc_dma_tx_ch = %d\n", __func__,
2786 cdc_dma_tx_cfg[ch_num].channels);
2787 ucontrol->value.integer.value[0] = cdc_dma_tx_cfg[ch_num].channels - 1;
2788 return 0;
2789}
2790
2791static int cdc_dma_tx_ch_put(struct snd_kcontrol *kcontrol,
2792 struct snd_ctl_elem_value *ucontrol)
2793{
2794 int ch_num = cdc_dma_get_port_idx(kcontrol);
2795
2796 if (ch_num < 0) {
2797 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
2798 return ch_num;
2799 }
2800
2801 cdc_dma_tx_cfg[ch_num].channels = ucontrol->value.integer.value[0] + 1;
2802
2803 pr_debug("%s: cdc_dma_tx_ch = %d\n", __func__,
2804 cdc_dma_tx_cfg[ch_num].channels);
2805 return 1;
2806}
2807
2808static int cdc_dma_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
2809 struct snd_ctl_elem_value *ucontrol)
2810{
2811 int sample_rate_val;
2812 int ch_num = cdc_dma_get_port_idx(kcontrol);
2813
2814 if (ch_num < 0) {
2815 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
2816 return ch_num;
2817 }
2818
2819 switch (cdc_dma_tx_cfg[ch_num].sample_rate) {
2820 case SAMPLING_RATE_384KHZ:
2821 sample_rate_val = 12;
2822 break;
2823 case SAMPLING_RATE_352P8KHZ:
2824 sample_rate_val = 11;
2825 break;
2826 case SAMPLING_RATE_192KHZ:
2827 sample_rate_val = 10;
2828 break;
2829 case SAMPLING_RATE_176P4KHZ:
2830 sample_rate_val = 9;
2831 break;
2832 case SAMPLING_RATE_96KHZ:
2833 sample_rate_val = 8;
2834 break;
2835 case SAMPLING_RATE_88P2KHZ:
2836 sample_rate_val = 7;
2837 break;
2838 case SAMPLING_RATE_48KHZ:
2839 sample_rate_val = 6;
2840 break;
2841 case SAMPLING_RATE_44P1KHZ:
2842 sample_rate_val = 5;
2843 break;
2844 case SAMPLING_RATE_32KHZ:
2845 sample_rate_val = 4;
2846 break;
2847 case SAMPLING_RATE_22P05KHZ:
2848 sample_rate_val = 3;
2849 break;
2850 case SAMPLING_RATE_16KHZ:
2851 sample_rate_val = 2;
2852 break;
2853 case SAMPLING_RATE_11P025KHZ:
2854 sample_rate_val = 1;
2855 break;
2856 case SAMPLING_RATE_8KHZ:
2857 sample_rate_val = 0;
2858 break;
2859 default:
2860 sample_rate_val = 6;
2861 break;
2862 }
2863
2864 ucontrol->value.integer.value[0] = sample_rate_val;
2865 pr_debug("%s: cdc_dma_tx_sample_rate = %d\n", __func__,
2866 cdc_dma_tx_cfg[ch_num].sample_rate);
2867 return 0;
2868}
2869
2870static int cdc_dma_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
2871 struct snd_ctl_elem_value *ucontrol)
2872{
2873 int ch_num = cdc_dma_get_port_idx(kcontrol);
2874
2875 if (ch_num < 0) {
2876 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
2877 return ch_num;
2878 }
2879
2880 switch (ucontrol->value.integer.value[0]) {
2881 case 12:
2882 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_384KHZ;
2883 break;
2884 case 11:
2885 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_352P8KHZ;
2886 break;
2887 case 10:
2888 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_192KHZ;
2889 break;
2890 case 9:
2891 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_176P4KHZ;
2892 break;
2893 case 8:
2894 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_96KHZ;
2895 break;
2896 case 7:
2897 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_88P2KHZ;
2898 break;
2899 case 6:
2900 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_48KHZ;
2901 break;
2902 case 5:
2903 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_44P1KHZ;
2904 break;
2905 case 4:
2906 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_32KHZ;
2907 break;
2908 case 3:
2909 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_22P05KHZ;
2910 break;
2911 case 2:
2912 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_16KHZ;
2913 break;
2914 case 1:
2915 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_11P025KHZ;
2916 break;
2917 case 0:
2918 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_8KHZ;
2919 break;
2920 default:
2921 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_48KHZ;
2922 break;
2923 }
2924
2925 pr_debug("%s: control value = %ld, cdc_dma_tx_sample_rate = %d\n",
2926 __func__, ucontrol->value.integer.value[0],
2927 cdc_dma_tx_cfg[ch_num].sample_rate);
2928 return 0;
2929}
2930
2931static int cdc_dma_tx_format_get(struct snd_kcontrol *kcontrol,
2932 struct snd_ctl_elem_value *ucontrol)
2933{
2934 int ch_num = cdc_dma_get_port_idx(kcontrol);
2935
2936 if (ch_num < 0) {
2937 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
2938 return ch_num;
2939 }
2940
2941 switch (cdc_dma_tx_cfg[ch_num].bit_format) {
2942 case SNDRV_PCM_FORMAT_S32_LE:
2943 ucontrol->value.integer.value[0] = 3;
2944 break;
2945 case SNDRV_PCM_FORMAT_S24_3LE:
2946 ucontrol->value.integer.value[0] = 2;
2947 break;
2948 case SNDRV_PCM_FORMAT_S24_LE:
2949 ucontrol->value.integer.value[0] = 1;
2950 break;
2951 case SNDRV_PCM_FORMAT_S16_LE:
2952 default:
2953 ucontrol->value.integer.value[0] = 0;
2954 break;
2955 }
2956
2957 pr_debug("%s: cdc_dma_tx_format = %d, ucontrol value = %ld\n",
2958 __func__, cdc_dma_tx_cfg[ch_num].bit_format,
2959 ucontrol->value.integer.value[0]);
2960 return 0;
2961}
2962
2963static int cdc_dma_tx_format_put(struct snd_kcontrol *kcontrol,
2964 struct snd_ctl_elem_value *ucontrol)
2965{
2966 int rc = 0;
2967 int ch_num = cdc_dma_get_port_idx(kcontrol);
2968
2969 if (ch_num < 0) {
2970 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
2971 return ch_num;
2972 }
2973
2974 switch (ucontrol->value.integer.value[0]) {
2975 case 3:
2976 cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S32_LE;
2977 break;
2978 case 2:
2979 cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
2980 break;
2981 case 1:
2982 cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_LE;
2983 break;
2984 case 0:
2985 default:
2986 cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S16_LE;
2987 break;
2988 }
2989 pr_debug("%s: cdc_dma_tx_format = %d, ucontrol value = %ld\n",
2990 __func__, cdc_dma_tx_cfg[ch_num].bit_format,
2991 ucontrol->value.integer.value[0]);
2992
2993 return rc;
2994}
2995
2996static int msm_cdc_dma_get_idx_from_beid(int32_t be_id)
2997{
2998 int idx = 0;
2999
3000 switch (be_id) {
3001 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
3002 idx = WSA_CDC_DMA_RX_0;
3003 break;
3004 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
3005 idx = WSA_CDC_DMA_TX_0;
3006 break;
3007 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
3008 idx = WSA_CDC_DMA_RX_1;
3009 break;
3010 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
3011 idx = WSA_CDC_DMA_TX_1;
3012 break;
3013 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
3014 idx = WSA_CDC_DMA_TX_2;
3015 break;
3016 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
3017 idx = RX_CDC_DMA_RX_0;
3018 break;
3019 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
3020 idx = RX_CDC_DMA_RX_1;
3021 break;
3022 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
3023 idx = RX_CDC_DMA_RX_2;
3024 break;
3025 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_3:
3026 idx = RX_CDC_DMA_RX_3;
3027 break;
3028 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_5:
3029 idx = RX_CDC_DMA_RX_5;
3030 break;
3031 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
3032 idx = TX_CDC_DMA_TX_0;
3033 break;
3034 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
3035 idx = TX_CDC_DMA_TX_3;
3036 break;
3037 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
3038 idx = TX_CDC_DMA_TX_4;
3039 break;
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800[diff] [blame]3040 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_0:
3041 idx = VA_CDC_DMA_TX_0;
3042 break;
3043 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_1:
3044 idx = VA_CDC_DMA_TX_1;
3045 break;
3046 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_2:
3047 idx = VA_CDC_DMA_TX_2;
3048 break;
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]3049 default:
3050 idx = RX_CDC_DMA_RX_0;
3051 break;
3052 }
3053
3054 return idx;
3055}
3056
Banajit Goswami83a370d2019-03-05 16:15:21 -0800[diff] [blame]3057static int msm_bt_sample_rate_get(struct snd_kcontrol *kcontrol,
3058 struct snd_ctl_elem_value *ucontrol)
3059{
3060 /*
3061 * Slimbus_7_Rx/Tx sample rate values should always be in sync (same)
3062 * when used for BT_SCO use case. Return either Rx or Tx sample rate
3063 * value.
3064 */
3065 switch (slim_rx_cfg[SLIM_RX_7].sample_rate) {
3066 case SAMPLING_RATE_96KHZ:
3067 ucontrol->value.integer.value[0] = 5;
3068 break;
3069 case SAMPLING_RATE_88P2KHZ:
3070 ucontrol->value.integer.value[0] = 4;
3071 break;
3072 case SAMPLING_RATE_48KHZ:
3073 ucontrol->value.integer.value[0] = 3;
3074 break;
3075 case SAMPLING_RATE_44P1KHZ:
3076 ucontrol->value.integer.value[0] = 2;
3077 break;
3078 case SAMPLING_RATE_16KHZ:
3079 ucontrol->value.integer.value[0] = 1;
3080 break;
3081 case SAMPLING_RATE_8KHZ:
3082 default:
3083 ucontrol->value.integer.value[0] = 0;
3084 break;
3085 }
3086 pr_debug("%s: sample rate = %d\n", __func__,
3087 slim_rx_cfg[SLIM_RX_7].sample_rate);
3088
3089 return 0;
3090}
3091
3092static int msm_bt_sample_rate_put(struct snd_kcontrol *kcontrol,
3093 struct snd_ctl_elem_value *ucontrol)
3094{
3095 switch (ucontrol->value.integer.value[0]) {
3096 case 1:
3097 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_16KHZ;
3098 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_16KHZ;
3099 break;
3100 case 2:
3101 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
3102 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
3103 break;
3104 case 3:
3105 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_48KHZ;
3106 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_48KHZ;
3107 break;
3108 case 4:
3109 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
3110 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
3111 break;
3112 case 5:
3113 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_96KHZ;
3114 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_96KHZ;
3115 break;
3116 case 0:
3117 default:
3118 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_8KHZ;
3119 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_8KHZ;
3120 break;
3121 }
3122 pr_debug("%s: sample rates: slim7_rx = %d, slim7_tx = %d, value = %d\n",
3123 __func__,
3124 slim_rx_cfg[SLIM_RX_7].sample_rate,
3125 slim_tx_cfg[SLIM_TX_7].sample_rate,
3126 ucontrol->value.enumerated.item[0]);
3127
3128 return 0;
3129}
3130
3131static int msm_bt_sample_rate_rx_get(struct snd_kcontrol *kcontrol,
3132 struct snd_ctl_elem_value *ucontrol)
3133{
3134 switch (slim_rx_cfg[SLIM_RX_7].sample_rate) {
3135 case SAMPLING_RATE_96KHZ:
3136 ucontrol->value.integer.value[0] = 5;
3137 break;
3138 case SAMPLING_RATE_88P2KHZ:
3139 ucontrol->value.integer.value[0] = 4;
3140 break;
3141 case SAMPLING_RATE_48KHZ:
3142 ucontrol->value.integer.value[0] = 3;
3143 break;
3144 case SAMPLING_RATE_44P1KHZ:
3145 ucontrol->value.integer.value[0] = 2;
3146 break;
3147 case SAMPLING_RATE_16KHZ:
3148 ucontrol->value.integer.value[0] = 1;
3149 break;
3150 case SAMPLING_RATE_8KHZ:
3151 default:
3152 ucontrol->value.integer.value[0] = 0;
3153 break;
3154 }
3155 pr_debug("%s: sample rate rx = %d\n", __func__,
3156 slim_rx_cfg[SLIM_RX_7].sample_rate);
3157
3158 return 0;
3159}
3160
3161static int msm_bt_sample_rate_rx_put(struct snd_kcontrol *kcontrol,
3162 struct snd_ctl_elem_value *ucontrol)
3163{
3164 switch (ucontrol->value.integer.value[0]) {
3165 case 1:
3166 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_16KHZ;
3167 break;
3168 case 2:
3169 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
3170 break;
3171 case 3:
3172 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_48KHZ;
3173 break;
3174 case 4:
3175 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
3176 break;
3177 case 5:
3178 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_96KHZ;
3179 break;
3180 case 0:
3181 default:
3182 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_8KHZ;
3183 break;
3184 }
3185 pr_debug("%s: sample rate: slim7_rx = %d, value = %d\n",
3186 __func__,
3187 slim_rx_cfg[SLIM_RX_7].sample_rate,
3188 ucontrol->value.enumerated.item[0]);
3189
3190 return 0;
3191}
3192
3193static int msm_bt_sample_rate_tx_get(struct snd_kcontrol *kcontrol,
3194 struct snd_ctl_elem_value *ucontrol)
3195{
3196 switch (slim_tx_cfg[SLIM_TX_7].sample_rate) {
3197 case SAMPLING_RATE_96KHZ:
3198 ucontrol->value.integer.value[0] = 5;
3199 break;
3200 case SAMPLING_RATE_88P2KHZ:
3201 ucontrol->value.integer.value[0] = 4;
3202 break;
3203 case SAMPLING_RATE_48KHZ:
3204 ucontrol->value.integer.value[0] = 3;
3205 break;
3206 case SAMPLING_RATE_44P1KHZ:
3207 ucontrol->value.integer.value[0] = 2;
3208 break;
3209 case SAMPLING_RATE_16KHZ:
3210 ucontrol->value.integer.value[0] = 1;
3211 break;
3212 case SAMPLING_RATE_8KHZ:
3213 default:
3214 ucontrol->value.integer.value[0] = 0;
3215 break;
3216 }
3217 pr_debug("%s: sample rate tx = %d\n", __func__,
3218 slim_tx_cfg[SLIM_TX_7].sample_rate);
3219
3220 return 0;
3221}
3222
3223static int msm_bt_sample_rate_tx_put(struct snd_kcontrol *kcontrol,
3224 struct snd_ctl_elem_value *ucontrol)
3225{
3226 switch (ucontrol->value.integer.value[0]) {
3227 case 1:
3228 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_16KHZ;
3229 break;
3230 case 2:
3231 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
3232 break;
3233 case 3:
3234 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_48KHZ;
3235 break;
3236 case 4:
3237 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
3238 break;
3239 case 5:
3240 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_96KHZ;
3241 break;
3242 case 0:
3243 default:
3244 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_8KHZ;
3245 break;
3246 }
3247 pr_debug("%s: sample rate: slim7_tx = %d, value = %d\n",
3248 __func__,
3249 slim_tx_cfg[SLIM_TX_7].sample_rate,
3250 ucontrol->value.enumerated.item[0]);
3251
3252 return 0;
3253}
3254
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]3255static const struct snd_kcontrol_new msm_int_snd_controls[] = {
3256 SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 Channels", wsa_cdc_dma_rx_0_chs,
3257 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3258 SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 Channels", wsa_cdc_dma_rx_1_chs,
3259 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3260 SOC_ENUM_EXT("RX_CDC_DMA_RX_0 Channels", rx_cdc_dma_rx_0_chs,
3261 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3262 SOC_ENUM_EXT("RX_CDC_DMA_RX_1 Channels", rx_cdc_dma_rx_1_chs,
3263 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3264 SOC_ENUM_EXT("RX_CDC_DMA_RX_2 Channels", rx_cdc_dma_rx_2_chs,
3265 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3266 SOC_ENUM_EXT("RX_CDC_DMA_RX_3 Channels", rx_cdc_dma_rx_3_chs,
3267 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3268 SOC_ENUM_EXT("RX_CDC_DMA_RX_5 Channels", rx_cdc_dma_rx_5_chs,
3269 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3270 SOC_ENUM_EXT("WSA_CDC_DMA_TX_0 Channels", wsa_cdc_dma_tx_0_chs,
3271 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3272 SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 Channels", wsa_cdc_dma_tx_1_chs,
3273 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3274 SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 Channels", wsa_cdc_dma_tx_2_chs,
3275 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3276 SOC_ENUM_EXT("TX_CDC_DMA_TX_0 Channels", tx_cdc_dma_tx_0_chs,
3277 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3278 SOC_ENUM_EXT("TX_CDC_DMA_TX_3 Channels", tx_cdc_dma_tx_3_chs,
3279 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3280 SOC_ENUM_EXT("TX_CDC_DMA_TX_4 Channels", tx_cdc_dma_tx_4_chs,
3281 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800[diff] [blame]3282 SOC_ENUM_EXT("VA_CDC_DMA_TX_0 Channels", va_cdc_dma_tx_0_chs,
3283 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3284 SOC_ENUM_EXT("VA_CDC_DMA_TX_1 Channels", va_cdc_dma_tx_1_chs,
3285 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3286 SOC_ENUM_EXT("VA_CDC_DMA_TX_2 Channels", va_cdc_dma_tx_2_chs,
3287 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]3288 SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 Format", wsa_cdc_dma_rx_0_format,
3289 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3290 SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 Format", wsa_cdc_dma_rx_1_format,
3291 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3292 SOC_ENUM_EXT("RX_CDC_DMA_RX_0 Format", rx_cdc_dma_rx_0_format,
3293 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3294 SOC_ENUM_EXT("RX_CDC_DMA_RX_1 Format", rx_cdc_dma_rx_1_format,
3295 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3296 SOC_ENUM_EXT("RX_CDC_DMA_RX_2 Format", rx_cdc_dma_rx_2_format,
3297 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3298 SOC_ENUM_EXT("RX_CDC_DMA_RX_3 Format", rx_cdc_dma_rx_3_format,
3299 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3300 SOC_ENUM_EXT("RX_CDC_DMA_RX_5 Format", rx_cdc_dma_rx_5_format,
3301 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3302 SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 Format", wsa_cdc_dma_tx_1_format,
3303 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
3304 SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 Format", wsa_cdc_dma_tx_2_format,
3305 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
3306 SOC_ENUM_EXT("TX_CDC_DMA_TX_0 Format", tx_cdc_dma_tx_0_format,
3307 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
3308 SOC_ENUM_EXT("TX_CDC_DMA_TX_3 Format", tx_cdc_dma_tx_3_format,
3309 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
3310 SOC_ENUM_EXT("TX_CDC_DMA_TX_4 Format", tx_cdc_dma_tx_4_format,
3311 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800[diff] [blame]3312 SOC_ENUM_EXT("VA_CDC_DMA_TX_0 Format", va_cdc_dma_tx_0_format,
3313 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
3314 SOC_ENUM_EXT("VA_CDC_DMA_TX_1 Format", va_cdc_dma_tx_1_format,
3315 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
3316 SOC_ENUM_EXT("VA_CDC_DMA_TX_2 Format", va_cdc_dma_tx_2_format,
3317 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]3318 SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 SampleRate",
3319 wsa_cdc_dma_rx_0_sample_rate,
3320 cdc_dma_rx_sample_rate_get,
3321 cdc_dma_rx_sample_rate_put),
3322 SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 SampleRate",
3323 wsa_cdc_dma_rx_1_sample_rate,
3324 cdc_dma_rx_sample_rate_get,
3325 cdc_dma_rx_sample_rate_put),
3326 SOC_ENUM_EXT("RX_CDC_DMA_RX_0 SampleRate",
3327 rx_cdc_dma_rx_0_sample_rate,
3328 cdc_dma_rx_sample_rate_get,
3329 cdc_dma_rx_sample_rate_put),
3330 SOC_ENUM_EXT("RX_CDC_DMA_RX_1 SampleRate",
3331 rx_cdc_dma_rx_1_sample_rate,
3332 cdc_dma_rx_sample_rate_get,
3333 cdc_dma_rx_sample_rate_put),
3334 SOC_ENUM_EXT("RX_CDC_DMA_RX_2 SampleRate",
3335 rx_cdc_dma_rx_2_sample_rate,
3336 cdc_dma_rx_sample_rate_get,
3337 cdc_dma_rx_sample_rate_put),
3338 SOC_ENUM_EXT("RX_CDC_DMA_RX_3 SampleRate",
3339 rx_cdc_dma_rx_3_sample_rate,
3340 cdc_dma_rx_sample_rate_get,
3341 cdc_dma_rx_sample_rate_put),
3342 SOC_ENUM_EXT("RX_CDC_DMA_RX_5 SampleRate",
3343 rx_cdc_dma_rx_5_sample_rate,
3344 cdc_dma_rx_sample_rate_get,
3345 cdc_dma_rx_sample_rate_put),
3346 SOC_ENUM_EXT("WSA_CDC_DMA_TX_0 SampleRate",
3347 wsa_cdc_dma_tx_0_sample_rate,
3348 cdc_dma_tx_sample_rate_get,
3349 cdc_dma_tx_sample_rate_put),
3350 SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 SampleRate",
3351 wsa_cdc_dma_tx_1_sample_rate,
3352 cdc_dma_tx_sample_rate_get,
3353 cdc_dma_tx_sample_rate_put),
3354 SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 SampleRate",
3355 wsa_cdc_dma_tx_2_sample_rate,
3356 cdc_dma_tx_sample_rate_get,
3357 cdc_dma_tx_sample_rate_put),
3358 SOC_ENUM_EXT("TX_CDC_DMA_TX_0 SampleRate",
3359 tx_cdc_dma_tx_0_sample_rate,
3360 cdc_dma_tx_sample_rate_get,
3361 cdc_dma_tx_sample_rate_put),
3362 SOC_ENUM_EXT("TX_CDC_DMA_TX_3 SampleRate",
3363 tx_cdc_dma_tx_3_sample_rate,
3364 cdc_dma_tx_sample_rate_get,
3365 cdc_dma_tx_sample_rate_put),
3366 SOC_ENUM_EXT("TX_CDC_DMA_TX_4 SampleRate",
3367 tx_cdc_dma_tx_4_sample_rate,
3368 cdc_dma_tx_sample_rate_get,
3369 cdc_dma_tx_sample_rate_put),
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800[diff] [blame]3370 SOC_ENUM_EXT("VA_CDC_DMA_TX_0 SampleRate",
3371 va_cdc_dma_tx_0_sample_rate,
3372 cdc_dma_tx_sample_rate_get,
3373 cdc_dma_tx_sample_rate_put),
3374 SOC_ENUM_EXT("VA_CDC_DMA_TX_1 SampleRate",
3375 va_cdc_dma_tx_1_sample_rate,
3376 cdc_dma_tx_sample_rate_get,
3377 cdc_dma_tx_sample_rate_put),
3378 SOC_ENUM_EXT("VA_CDC_DMA_TX_2 SampleRate",
3379 va_cdc_dma_tx_2_sample_rate,
3380 cdc_dma_tx_sample_rate_get,
3381 cdc_dma_tx_sample_rate_put),
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]3382};
3383
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]3384static const struct snd_kcontrol_new msm_common_snd_controls[] = {
3385 SOC_ENUM_EXT("USB_AUDIO_RX SampleRate", usb_rx_sample_rate,
3386 usb_audio_rx_sample_rate_get,
3387 usb_audio_rx_sample_rate_put),
3388 SOC_ENUM_EXT("USB_AUDIO_TX SampleRate", usb_tx_sample_rate,
3389 usb_audio_tx_sample_rate_get,
3390 usb_audio_tx_sample_rate_put),
3391 SOC_ENUM_EXT("PRI_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3392 tdm_rx_sample_rate_get,
3393 tdm_rx_sample_rate_put),
3394 SOC_ENUM_EXT("SEC_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3395 tdm_rx_sample_rate_get,
3396 tdm_rx_sample_rate_put),
3397 SOC_ENUM_EXT("TERT_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3398 tdm_rx_sample_rate_get,
3399 tdm_rx_sample_rate_put),
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame^]3400 SOC_ENUM_EXT("QUAT_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3401 tdm_rx_sample_rate_get,
3402 tdm_rx_sample_rate_put),
3403 SOC_ENUM_EXT("QUIN_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3404 tdm_rx_sample_rate_get,
3405 tdm_rx_sample_rate_put),
3406 SOC_ENUM_EXT("SEN_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3407 tdm_rx_sample_rate_get,
3408 tdm_rx_sample_rate_put),
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]3409 SOC_ENUM_EXT("PRI_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3410 tdm_tx_sample_rate_get,
3411 tdm_tx_sample_rate_put),
3412 SOC_ENUM_EXT("SEC_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3413 tdm_tx_sample_rate_get,
3414 tdm_tx_sample_rate_put),
3415 SOC_ENUM_EXT("TERT_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3416 tdm_tx_sample_rate_get,
3417 tdm_tx_sample_rate_put),
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame^]3418 SOC_ENUM_EXT("QUAT_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3419 tdm_tx_sample_rate_get,
3420 tdm_tx_sample_rate_put),
3421 SOC_ENUM_EXT("QUIN_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3422 tdm_tx_sample_rate_get,
3423 tdm_tx_sample_rate_put),
3424 SOC_ENUM_EXT("SEN_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3425 tdm_tx_sample_rate_get,
3426 tdm_tx_sample_rate_put),
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]3427 SOC_ENUM_EXT("PRIM_AUX_PCM_RX SampleRate", prim_aux_pcm_rx_sample_rate,
3428 aux_pcm_rx_sample_rate_get,
3429 aux_pcm_rx_sample_rate_put),
3430 SOC_ENUM_EXT("SEC_AUX_PCM_RX SampleRate", sec_aux_pcm_rx_sample_rate,
3431 aux_pcm_rx_sample_rate_get,
3432 aux_pcm_rx_sample_rate_put),
3433 SOC_ENUM_EXT("TERT_AUX_PCM_RX SampleRate", tert_aux_pcm_rx_sample_rate,
3434 aux_pcm_rx_sample_rate_get,
3435 aux_pcm_rx_sample_rate_put),
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame^]3436 SOC_ENUM_EXT("QUAT_AUX_PCM_RX SampleRate", quat_aux_pcm_rx_sample_rate,
3437 aux_pcm_rx_sample_rate_get,
3438 aux_pcm_rx_sample_rate_put),
3439 SOC_ENUM_EXT("QUIN_AUX_PCM_RX SampleRate", quin_aux_pcm_rx_sample_rate,
3440 aux_pcm_rx_sample_rate_get,
3441 aux_pcm_rx_sample_rate_put),
3442 SOC_ENUM_EXT("SEN_AUX_PCM_RX SampleRate", sen_aux_pcm_rx_sample_rate,
3443 aux_pcm_rx_sample_rate_get,
3444 aux_pcm_rx_sample_rate_put),
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]3445 SOC_ENUM_EXT("PRIM_AUX_PCM_TX SampleRate", prim_aux_pcm_tx_sample_rate,
3446 aux_pcm_tx_sample_rate_get,
3447 aux_pcm_tx_sample_rate_put),
3448 SOC_ENUM_EXT("SEC_AUX_PCM_TX SampleRate", sec_aux_pcm_tx_sample_rate,
3449 aux_pcm_tx_sample_rate_get,
3450 aux_pcm_tx_sample_rate_put),
3451 SOC_ENUM_EXT("TERT_AUX_PCM_TX SampleRate", tert_aux_pcm_tx_sample_rate,
3452 aux_pcm_tx_sample_rate_get,
3453 aux_pcm_tx_sample_rate_put),
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame^]3454 SOC_ENUM_EXT("QUAT_AUX_PCM_TX SampleRate", quat_aux_pcm_tx_sample_rate,
3455 aux_pcm_tx_sample_rate_get,
3456 aux_pcm_tx_sample_rate_put),
3457 SOC_ENUM_EXT("QUIN_AUX_PCM_TX SampleRate", quin_aux_pcm_tx_sample_rate,
3458 aux_pcm_tx_sample_rate_get,
3459 aux_pcm_tx_sample_rate_put),
3460 SOC_ENUM_EXT("SEN_AUX_PCM_TX SampleRate", sen_aux_pcm_tx_sample_rate,
3461 aux_pcm_tx_sample_rate_get,
3462 aux_pcm_tx_sample_rate_put),
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]3463 SOC_ENUM_EXT("PRIM_MI2S_RX SampleRate", prim_mi2s_rx_sample_rate,
3464 mi2s_rx_sample_rate_get,
3465 mi2s_rx_sample_rate_put),
3466 SOC_ENUM_EXT("SEC_MI2S_RX SampleRate", sec_mi2s_rx_sample_rate,
3467 mi2s_rx_sample_rate_get,
3468 mi2s_rx_sample_rate_put),
3469 SOC_ENUM_EXT("TERT_MI2S_RX SampleRate", tert_mi2s_rx_sample_rate,
3470 mi2s_rx_sample_rate_get,
3471 mi2s_rx_sample_rate_put),
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame^]3472 SOC_ENUM_EXT("QUAT_MI2S_RX SampleRate", quat_mi2s_rx_sample_rate,
3473 mi2s_rx_sample_rate_get,
3474 mi2s_rx_sample_rate_put),
3475 SOC_ENUM_EXT("QUIN_MI2S_RX SampleRate", quin_mi2s_rx_sample_rate,
3476 mi2s_rx_sample_rate_get,
3477 mi2s_rx_sample_rate_put),
3478 SOC_ENUM_EXT("SEN_MI2S_RX SampleRate", sen_mi2s_rx_sample_rate,
3479 mi2s_rx_sample_rate_get,
3480 mi2s_rx_sample_rate_put),
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]3481 SOC_ENUM_EXT("PRIM_MI2S_TX SampleRate", prim_mi2s_tx_sample_rate,
3482 mi2s_tx_sample_rate_get,
3483 mi2s_tx_sample_rate_put),
3484 SOC_ENUM_EXT("SEC_MI2S_TX SampleRate", sec_mi2s_tx_sample_rate,
3485 mi2s_tx_sample_rate_get,
3486 mi2s_tx_sample_rate_put),
3487 SOC_ENUM_EXT("TERT_MI2S_TX SampleRate", tert_mi2s_tx_sample_rate,
3488 mi2s_tx_sample_rate_get,
3489 mi2s_tx_sample_rate_put),
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame^]3490 SOC_ENUM_EXT("QUAT_MI2S_TX SampleRate", quat_mi2s_tx_sample_rate,
3491 mi2s_tx_sample_rate_get,
3492 mi2s_tx_sample_rate_put),
3493 SOC_ENUM_EXT("QUIN_MI2S_TX SampleRate", quin_mi2s_tx_sample_rate,
3494 mi2s_tx_sample_rate_get,
3495 mi2s_tx_sample_rate_put),
3496 SOC_ENUM_EXT("SEN_MI2S_TX SampleRate", sen_mi2s_tx_sample_rate,
3497 mi2s_tx_sample_rate_get,
3498 mi2s_tx_sample_rate_put),
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]3499 SOC_ENUM_EXT("USB_AUDIO_RX Format", usb_rx_format,
3500 usb_audio_rx_format_get, usb_audio_rx_format_put),
3501 SOC_ENUM_EXT("USB_AUDIO_TX Format", usb_tx_format,
3502 usb_audio_tx_format_get, usb_audio_tx_format_put),
3503 SOC_ENUM_EXT("PRI_TDM_RX_0 Format", tdm_rx_format,
3504 tdm_rx_format_get,
3505 tdm_rx_format_put),
3506 SOC_ENUM_EXT("SEC_TDM_RX_0 Format", tdm_rx_format,
3507 tdm_rx_format_get,
3508 tdm_rx_format_put),
3509 SOC_ENUM_EXT("TERT_TDM_RX_0 Format", tdm_rx_format,
3510 tdm_rx_format_get,
3511 tdm_rx_format_put),
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame^]3512 SOC_ENUM_EXT("QUAT_TDM_RX_0 Format", tdm_rx_format,
3513 tdm_rx_format_get,
3514 tdm_rx_format_put),
3515 SOC_ENUM_EXT("QUIN_TDM_RX_0 Format", tdm_rx_format,
3516 tdm_rx_format_get,
3517 tdm_rx_format_put),
3518 SOC_ENUM_EXT("SEN_TDM_RX_0 Format", tdm_rx_format,
3519 tdm_rx_format_get,
3520 tdm_rx_format_put),
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]3521 SOC_ENUM_EXT("PRI_TDM_TX_0 Format", tdm_tx_format,
3522 tdm_tx_format_get,
3523 tdm_tx_format_put),
3524 SOC_ENUM_EXT("SEC_TDM_TX_0 Format", tdm_tx_format,
3525 tdm_tx_format_get,
3526 tdm_tx_format_put),
3527 SOC_ENUM_EXT("TERT_TDM_TX_0 Format", tdm_tx_format,
3528 tdm_tx_format_get,
3529 tdm_tx_format_put),
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame^]3530 SOC_ENUM_EXT("QUAT_TDM_TX_0 Format", tdm_tx_format,
3531 tdm_tx_format_get,
3532 tdm_tx_format_put),
3533 SOC_ENUM_EXT("QUIN_TDM_TX_0 Format", tdm_tx_format,
3534 tdm_tx_format_get,
3535 tdm_tx_format_put),
3536 SOC_ENUM_EXT("SEN_TDM_TX_0 Format", tdm_tx_format,
3537 tdm_tx_format_get,
3538 tdm_tx_format_put),
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]3539 SOC_ENUM_EXT("PRIM_AUX_PCM_RX Format", aux_pcm_rx_format,
3540 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3541 SOC_ENUM_EXT("SEC_AUX_PCM_RX Format", aux_pcm_rx_format,
3542 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3543 SOC_ENUM_EXT("TERT_AUX_PCM_RX Format", aux_pcm_rx_format,
3544 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame^]3545 SOC_ENUM_EXT("QUAT_AUX_PCM_RX Format", aux_pcm_rx_format,
3546 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3547 SOC_ENUM_EXT("QUIN_AUX_PCM_RX Format", aux_pcm_rx_format,
3548 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3549 SOC_ENUM_EXT("SEN_AUX_PCM_RX Format", aux_pcm_rx_format,
3550 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]3551 SOC_ENUM_EXT("PRIM_AUX_PCM_TX Format", aux_pcm_tx_format,
3552 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3553 SOC_ENUM_EXT("SEC_AUX_PCM_TX Format", aux_pcm_tx_format,
3554 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3555 SOC_ENUM_EXT("TERT_AUX_PCM_TX Format", aux_pcm_tx_format,
3556 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame^]3557 SOC_ENUM_EXT("QUAT_AUX_PCM_TX Format", aux_pcm_tx_format,
3558 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3559 SOC_ENUM_EXT("QUIN_AUX_PCM_TX Format", aux_pcm_tx_format,
3560 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3561 SOC_ENUM_EXT("SEN_AUX_PCM_TX Format", aux_pcm_tx_format,
3562 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]3563 SOC_ENUM_EXT("PRIM_MI2S_RX Format", mi2s_rx_format,
3564 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
3565 SOC_ENUM_EXT("SEC_MI2S_RX Format", mi2s_rx_format,
3566 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
3567 SOC_ENUM_EXT("TERT_MI2S_RX Format", mi2s_rx_format,
3568 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame^]3569 SOC_ENUM_EXT("QUAT_MI2S_RX Format", mi2s_rx_format,
3570 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
3571 SOC_ENUM_EXT("QUIN_MI2S_RX Format", mi2s_rx_format,
3572 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
3573 SOC_ENUM_EXT("SEN_MI2S_RX Format", mi2s_rx_format,
3574 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]3575 SOC_ENUM_EXT("PRIM_MI2S_TX Format", mi2s_tx_format,
3576 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
3577 SOC_ENUM_EXT("SEC_MI2S_TX Format", mi2s_tx_format,
3578 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
3579 SOC_ENUM_EXT("TERT_MI2S_TX Format", mi2s_tx_format,
3580 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame^]3581 SOC_ENUM_EXT("QUAT_MI2S_TX Format", mi2s_tx_format,
3582 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
3583 SOC_ENUM_EXT("QUIN_MI2S_TX Format", mi2s_tx_format,
3584 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
3585 SOC_ENUM_EXT("SEN_MI2S_TX Format", mi2s_tx_format,
3586 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]3587 SOC_ENUM_EXT("USB_AUDIO_RX Channels", usb_rx_chs,
3588 usb_audio_rx_ch_get, usb_audio_rx_ch_put),
3589 SOC_ENUM_EXT("USB_AUDIO_TX Channels", usb_tx_chs,
3590 usb_audio_tx_ch_get, usb_audio_tx_ch_put),
3591 SOC_ENUM_EXT("PROXY_RX Channels", proxy_rx_chs,
3592 proxy_rx_ch_get, proxy_rx_ch_put),
3593 SOC_ENUM_EXT("PRI_TDM_RX_0 Channels", tdm_rx_chs,
3594 tdm_rx_ch_get,
3595 tdm_rx_ch_put),
3596 SOC_ENUM_EXT("SEC_TDM_RX_0 Channels", tdm_rx_chs,
3597 tdm_rx_ch_get,
3598 tdm_rx_ch_put),
3599 SOC_ENUM_EXT("TERT_TDM_RX_0 Channels", tdm_rx_chs,
3600 tdm_rx_ch_get,
3601 tdm_rx_ch_put),
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame^]3602 SOC_ENUM_EXT("QUAT_TDM_RX_0 Channels", tdm_rx_chs,
3603 tdm_rx_ch_get,
3604 tdm_rx_ch_put),
3605 SOC_ENUM_EXT("QUIN_TDM_RX_0 Channels", tdm_rx_chs,
3606 tdm_rx_ch_get,
3607 tdm_rx_ch_put),
3608 SOC_ENUM_EXT("SEN_TDM_RX_0 Channels", tdm_rx_chs,
3609 tdm_rx_ch_get,
3610 tdm_rx_ch_put),
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]3611 SOC_ENUM_EXT("PRI_TDM_TX_0 Channels", tdm_tx_chs,
3612 tdm_tx_ch_get,
3613 tdm_tx_ch_put),
3614 SOC_ENUM_EXT("SEC_TDM_TX_0 Channels", tdm_tx_chs,
3615 tdm_tx_ch_get,
3616 tdm_tx_ch_put),
3617 SOC_ENUM_EXT("TERT_TDM_TX_0 Channels", tdm_tx_chs,
3618 tdm_tx_ch_get,
3619 tdm_tx_ch_put),
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame^]3620 SOC_ENUM_EXT("QUAT_TDM_TX_0 Channels", tdm_tx_chs,
3621 tdm_tx_ch_get,
3622 tdm_tx_ch_put),
3623 SOC_ENUM_EXT("QUIN_TDM_TX_0 Channels", tdm_tx_chs,
3624 tdm_tx_ch_get,
3625 tdm_tx_ch_put),
3626 SOC_ENUM_EXT("SEN_TDM_TX_0 Channels", tdm_tx_chs,
3627 tdm_tx_ch_get,
3628 tdm_tx_ch_put),
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]3629 SOC_ENUM_EXT("PRIM_MI2S_RX Channels", prim_mi2s_rx_chs,
3630 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
3631 SOC_ENUM_EXT("SEC_MI2S_RX Channels", sec_mi2s_rx_chs,
3632 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
3633 SOC_ENUM_EXT("TERT_MI2S_RX Channels", tert_mi2s_rx_chs,
3634 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame^]3635 SOC_ENUM_EXT("QUAT_MI2S_RX Channels", quat_mi2s_rx_chs,
3636 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
3637 SOC_ENUM_EXT("QUIN_MI2S_RX Channels", quin_mi2s_rx_chs,
3638 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
3639 SOC_ENUM_EXT("SEN_MI2S_RX Channels", sen_mi2s_rx_chs,
3640 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]3641 SOC_ENUM_EXT("PRIM_MI2S_TX Channels", prim_mi2s_tx_chs,
3642 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
3643 SOC_ENUM_EXT("SEC_MI2S_TX Channels", sec_mi2s_tx_chs,
3644 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
3645 SOC_ENUM_EXT("TERT_MI2S_TX Channels", tert_mi2s_tx_chs,
3646 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame^]3647 SOC_ENUM_EXT("QUAT_MI2S_TX Channels", quat_mi2s_tx_chs,
3648 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
3649 SOC_ENUM_EXT("QUIN_MI2S_TX Channels", quin_mi2s_tx_chs,
3650 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
3651 SOC_ENUM_EXT("SEN_MI2S_TX Channels", sen_mi2s_tx_chs,
3652 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
Banajit Goswamib4347d52019-02-28 20:11:49 -0800[diff] [blame]3653 SOC_ENUM_EXT("Display Port RX Channels", ext_disp_rx_chs,
3654 ext_disp_rx_ch_get, ext_disp_rx_ch_put),
3655 SOC_ENUM_EXT("Display Port RX Bit Format", ext_disp_rx_format,
3656 ext_disp_rx_format_get, ext_disp_rx_format_put),
3657 SOC_ENUM_EXT("Display Port RX SampleRate", ext_disp_rx_sample_rate,
3658 ext_disp_rx_sample_rate_get,
3659 ext_disp_rx_sample_rate_put),
Banajit Goswami83a370d2019-03-05 16:15:21 -0800[diff] [blame]3660 SOC_ENUM_EXT("BT SampleRate", bt_sample_rate,
3661 msm_bt_sample_rate_get,
3662 msm_bt_sample_rate_put),
3663 SOC_ENUM_EXT("BT SampleRate RX", bt_sample_rate_rx,
3664 msm_bt_sample_rate_rx_get,
3665 msm_bt_sample_rate_rx_put),
3666 SOC_ENUM_EXT("BT SampleRate TX", bt_sample_rate_tx,
3667 msm_bt_sample_rate_tx_get,
3668 msm_bt_sample_rate_tx_put),
Meng Wange8e53822019-03-18 10:49:50 +0800[diff] [blame]3669 SOC_ENUM_EXT("AFE_LOOPBACK_TX Channels", afe_loopback_tx_chs,
3670 afe_loopback_tx_ch_get, afe_loopback_tx_ch_put),
Meng Wangd1db67c2019-04-17 12:41:34 +0800[diff] [blame]3671 SOC_ENUM_EXT("VI_FEED_TX Channels", vi_feed_tx_chs,
3672 msm_vi_feed_tx_ch_get, msm_vi_feed_tx_ch_put),
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]3673};
3674
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]3675static const struct snd_kcontrol_new msm_snd_controls[] = {
3676 SOC_ENUM_EXT("PRIM_AUX_PCM_RX Format", aux_pcm_rx_format,
3677 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3678 SOC_ENUM_EXT("PRIM_AUX_PCM_TX Format", aux_pcm_tx_format,
3679 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3680 SOC_ENUM_EXT("PRIM_AUX_PCM_RX SampleRate", prim_aux_pcm_rx_sample_rate,
3681 aux_pcm_rx_sample_rate_get,
3682 aux_pcm_rx_sample_rate_put),
3683 SOC_ENUM_EXT("PRIM_AUX_PCM_TX SampleRate", prim_aux_pcm_tx_sample_rate,
3684 aux_pcm_tx_sample_rate_get,
3685 aux_pcm_tx_sample_rate_put),
3686};
3687
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]3688static int msm_ext_disp_get_idx_from_beid(int32_t be_id)
3689{
3690 int idx;
3691
3692 switch (be_id) {
3693 case MSM_BACKEND_DAI_DISPLAY_PORT_RX:
3694 idx = EXT_DISP_RX_IDX_DP;
3695 break;
3696 default:
3697 pr_err("%s: Incorrect ext_disp BE id %d\n", __func__, be_id);
3698 idx = -EINVAL;
3699 break;
3700 }
3701
3702 return idx;
3703}
3704
Xiaoyu Yeffbdc9f2019-05-17 15:02:39 -0700[diff] [blame]3705static int kona_send_island_va_config(int32_t be_id)
3706{
3707 int rc = 0;
3708 int port_id = 0xFFFF;
3709
3710 port_id = msm_get_port_id(be_id);
3711 if (port_id < 0) {
3712 pr_err("%s: Invalid island interface, be_id: %d\n",
3713 __func__, be_id);
3714 rc = -EINVAL;
3715 } else {
3716 /*
3717 * send island mode config
3718 * This should be the first configuration
3719 */
3720 rc = afe_send_port_island_mode(port_id);
3721 if (rc)
3722 pr_err("%s: afe send island mode failed %d\n",
3723 __func__, rc);
3724 }
3725
3726 return rc;
3727}
3728
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]3729static int msm_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
3730 struct snd_pcm_hw_params *params)
3731{
3732 struct snd_soc_dai_link *dai_link = rtd->dai_link;
3733 struct snd_interval *rate = hw_param_interval(params,
3734 SNDRV_PCM_HW_PARAM_RATE);
3735 struct snd_interval *channels = hw_param_interval(params,
3736 SNDRV_PCM_HW_PARAM_CHANNELS);
Meng Wange8e53822019-03-18 10:49:50 +0800[diff] [blame]3737 int idx = 0, rc = 0;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]3738
3739 pr_debug("%s: format = %d, rate = %d\n",
3740 __func__, params_format(params), params_rate(params));
3741
3742 switch (dai_link->id) {
3743 case MSM_BACKEND_DAI_USB_RX:
3744 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3745 usb_rx_cfg.bit_format);
3746 rate->min = rate->max = usb_rx_cfg.sample_rate;
3747 channels->min = channels->max = usb_rx_cfg.channels;
3748 break;
3749
3750 case MSM_BACKEND_DAI_USB_TX:
3751 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3752 usb_tx_cfg.bit_format);
3753 rate->min = rate->max = usb_tx_cfg.sample_rate;
3754 channels->min = channels->max = usb_tx_cfg.channels;
3755 break;
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]3756
3757 case MSM_BACKEND_DAI_DISPLAY_PORT_RX:
3758 idx = msm_ext_disp_get_idx_from_beid(dai_link->id);
3759 if (idx < 0) {
3760 pr_err("%s: Incorrect ext disp idx %d\n",
3761 __func__, idx);
3762 rc = idx;
3763 goto done;
3764 }
3765
3766 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3767 ext_disp_rx_cfg[idx].bit_format);
3768 rate->min = rate->max = ext_disp_rx_cfg[idx].sample_rate;
3769 channels->min = channels->max = ext_disp_rx_cfg[idx].channels;
3770 break;
3771
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]3772 case MSM_BACKEND_DAI_AFE_PCM_RX:
3773 channels->min = channels->max = proxy_rx_cfg.channels;
3774 rate->min = rate->max = SAMPLING_RATE_48KHZ;
3775 break;
3776
3777 case MSM_BACKEND_DAI_PRI_TDM_RX_0:
3778 channels->min = channels->max =
3779 tdm_rx_cfg[TDM_PRI][TDM_0].channels;
3780 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3781 tdm_rx_cfg[TDM_PRI][TDM_0].bit_format);
3782 rate->min = rate->max = tdm_rx_cfg[TDM_PRI][TDM_0].sample_rate;
3783 break;
3784
3785 case MSM_BACKEND_DAI_PRI_TDM_TX_0:
3786 channels->min = channels->max =
3787 tdm_tx_cfg[TDM_PRI][TDM_0].channels;
3788 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3789 tdm_tx_cfg[TDM_PRI][TDM_0].bit_format);
3790 rate->min = rate->max = tdm_tx_cfg[TDM_PRI][TDM_0].sample_rate;
3791 break;
3792
3793 case MSM_BACKEND_DAI_SEC_TDM_RX_0:
3794 channels->min = channels->max =
3795 tdm_rx_cfg[TDM_SEC][TDM_0].channels;
3796 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3797 tdm_rx_cfg[TDM_SEC][TDM_0].bit_format);
3798 rate->min = rate->max = tdm_rx_cfg[TDM_SEC][TDM_0].sample_rate;
3799 break;
3800
3801 case MSM_BACKEND_DAI_SEC_TDM_TX_0:
3802 channels->min = channels->max =
3803 tdm_tx_cfg[TDM_SEC][TDM_0].channels;
3804 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3805 tdm_tx_cfg[TDM_SEC][TDM_0].bit_format);
3806 rate->min = rate->max = tdm_tx_cfg[TDM_SEC][TDM_0].sample_rate;
3807 break;
3808
3809 case MSM_BACKEND_DAI_TERT_TDM_RX_0:
3810 channels->min = channels->max =
3811 tdm_rx_cfg[TDM_TERT][TDM_0].channels;
3812 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3813 tdm_rx_cfg[TDM_TERT][TDM_0].bit_format);
3814 rate->min = rate->max = tdm_rx_cfg[TDM_TERT][TDM_0].sample_rate;
3815 break;
3816
3817 case MSM_BACKEND_DAI_TERT_TDM_TX_0:
3818 channels->min = channels->max =
3819 tdm_tx_cfg[TDM_TERT][TDM_0].channels;
3820 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3821 tdm_tx_cfg[TDM_TERT][TDM_0].bit_format);
3822 rate->min = rate->max = tdm_tx_cfg[TDM_TERT][TDM_0].sample_rate;
3823 break;
3824
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame^]3825 case MSM_BACKEND_DAI_QUAT_TDM_RX_0:
3826 channels->min = channels->max =
3827 tdm_rx_cfg[TDM_QUAT][TDM_0].channels;
3828 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3829 tdm_rx_cfg[TDM_QUAT][TDM_0].bit_format);
3830 rate->min = rate->max = tdm_rx_cfg[TDM_QUAT][TDM_0].sample_rate;
3831 break;
3832
3833 case MSM_BACKEND_DAI_QUAT_TDM_TX_0:
3834 channels->min = channels->max =
3835 tdm_tx_cfg[TDM_QUAT][TDM_0].channels;
3836 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3837 tdm_tx_cfg[TDM_QUAT][TDM_0].bit_format);
3838 rate->min = rate->max = tdm_tx_cfg[TDM_QUAT][TDM_0].sample_rate;
3839 break;
3840
3841 case MSM_BACKEND_DAI_QUIN_TDM_RX_0:
3842 channels->min = channels->max =
3843 tdm_rx_cfg[TDM_QUIN][TDM_0].channels;
3844 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3845 tdm_rx_cfg[TDM_QUIN][TDM_0].bit_format);
3846 rate->min = rate->max = tdm_rx_cfg[TDM_QUIN][TDM_0].sample_rate;
3847 break;
3848
3849 case MSM_BACKEND_DAI_QUIN_TDM_TX_0:
3850 channels->min = channels->max =
3851 tdm_tx_cfg[TDM_QUIN][TDM_0].channels;
3852 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3853 tdm_tx_cfg[TDM_QUIN][TDM_0].bit_format);
3854 rate->min = rate->max = tdm_tx_cfg[TDM_QUIN][TDM_0].sample_rate;
3855 break;
3856
3857 case MSM_BACKEND_DAI_SEN_TDM_RX_0:
3858 channels->min = channels->max =
3859 tdm_rx_cfg[TDM_SEN][TDM_0].channels;
3860 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3861 tdm_rx_cfg[TDM_SEN][TDM_0].bit_format);
3862 rate->min = rate->max = tdm_rx_cfg[TDM_SEN][TDM_0].sample_rate;
3863 break;
3864
3865 case MSM_BACKEND_DAI_SEN_TDM_TX_0:
3866 channels->min = channels->max =
3867 tdm_tx_cfg[TDM_SEN][TDM_0].channels;
3868 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3869 tdm_tx_cfg[TDM_SEN][TDM_0].bit_format);
3870 rate->min = rate->max = tdm_tx_cfg[TDM_SEN][TDM_0].sample_rate;
3871 break;
3872
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]3873 case MSM_BACKEND_DAI_AUXPCM_RX:
3874 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3875 aux_pcm_rx_cfg[PRIM_AUX_PCM].bit_format);
3876 rate->min = rate->max =
3877 aux_pcm_rx_cfg[PRIM_AUX_PCM].sample_rate;
3878 channels->min = channels->max =
3879 aux_pcm_rx_cfg[PRIM_AUX_PCM].channels;
3880 break;
3881
3882 case MSM_BACKEND_DAI_AUXPCM_TX:
3883 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3884 aux_pcm_tx_cfg[PRIM_AUX_PCM].bit_format);
3885 rate->min = rate->max =
3886 aux_pcm_tx_cfg[PRIM_AUX_PCM].sample_rate;
3887 channels->min = channels->max =
3888 aux_pcm_tx_cfg[PRIM_AUX_PCM].channels;
3889 break;
3890
3891 case MSM_BACKEND_DAI_SEC_AUXPCM_RX:
3892 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3893 aux_pcm_rx_cfg[SEC_AUX_PCM].bit_format);
3894 rate->min = rate->max =
3895 aux_pcm_rx_cfg[SEC_AUX_PCM].sample_rate;
3896 channels->min = channels->max =
3897 aux_pcm_rx_cfg[SEC_AUX_PCM].channels;
3898 break;
3899
3900 case MSM_BACKEND_DAI_SEC_AUXPCM_TX:
3901 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3902 aux_pcm_tx_cfg[SEC_AUX_PCM].bit_format);
3903 rate->min = rate->max =
3904 aux_pcm_tx_cfg[SEC_AUX_PCM].sample_rate;
3905 channels->min = channels->max =
3906 aux_pcm_tx_cfg[SEC_AUX_PCM].channels;
3907 break;
3908
3909 case MSM_BACKEND_DAI_TERT_AUXPCM_RX:
3910 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3911 aux_pcm_rx_cfg[TERT_AUX_PCM].bit_format);
3912 rate->min = rate->max =
3913 aux_pcm_rx_cfg[TERT_AUX_PCM].sample_rate;
3914 channels->min = channels->max =
3915 aux_pcm_rx_cfg[TERT_AUX_PCM].channels;
3916 break;
3917
3918 case MSM_BACKEND_DAI_TERT_AUXPCM_TX:
3919 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3920 aux_pcm_tx_cfg[TERT_AUX_PCM].bit_format);
3921 rate->min = rate->max =
3922 aux_pcm_tx_cfg[TERT_AUX_PCM].sample_rate;
3923 channels->min = channels->max =
3924 aux_pcm_tx_cfg[TERT_AUX_PCM].channels;
3925 break;
3926
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame^]3927 case MSM_BACKEND_DAI_QUAT_AUXPCM_RX:
3928 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3929 aux_pcm_rx_cfg[QUAT_AUX_PCM].bit_format);
3930 rate->min = rate->max =
3931 aux_pcm_rx_cfg[QUAT_AUX_PCM].sample_rate;
3932 channels->min = channels->max =
3933 aux_pcm_rx_cfg[QUAT_AUX_PCM].channels;
3934 break;
3935
3936 case MSM_BACKEND_DAI_QUAT_AUXPCM_TX:
3937 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3938 aux_pcm_tx_cfg[QUAT_AUX_PCM].bit_format);
3939 rate->min = rate->max =
3940 aux_pcm_tx_cfg[QUAT_AUX_PCM].sample_rate;
3941 channels->min = channels->max =
3942 aux_pcm_tx_cfg[QUAT_AUX_PCM].channels;
3943 break;
3944
3945 case MSM_BACKEND_DAI_QUIN_AUXPCM_RX:
3946 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3947 aux_pcm_rx_cfg[QUIN_AUX_PCM].bit_format);
3948 rate->min = rate->max =
3949 aux_pcm_rx_cfg[QUIN_AUX_PCM].sample_rate;
3950 channels->min = channels->max =
3951 aux_pcm_rx_cfg[QUIN_AUX_PCM].channels;
3952 break;
3953
3954 case MSM_BACKEND_DAI_QUIN_AUXPCM_TX:
3955 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3956 aux_pcm_tx_cfg[QUIN_AUX_PCM].bit_format);
3957 rate->min = rate->max =
3958 aux_pcm_tx_cfg[QUIN_AUX_PCM].sample_rate;
3959 channels->min = channels->max =
3960 aux_pcm_tx_cfg[QUIN_AUX_PCM].channels;
3961 break;
3962
3963 case MSM_BACKEND_DAI_SEN_AUXPCM_RX:
3964 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3965 aux_pcm_rx_cfg[SEN_AUX_PCM].bit_format);
3966 rate->min = rate->max =
3967 aux_pcm_rx_cfg[SEN_AUX_PCM].sample_rate;
3968 channels->min = channels->max =
3969 aux_pcm_rx_cfg[SEN_AUX_PCM].channels;
3970 break;
3971
3972 case MSM_BACKEND_DAI_SEN_AUXPCM_TX:
3973 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3974 aux_pcm_tx_cfg[SEN_AUX_PCM].bit_format);
3975 rate->min = rate->max =
3976 aux_pcm_tx_cfg[SEN_AUX_PCM].sample_rate;
3977 channels->min = channels->max =
3978 aux_pcm_tx_cfg[SEN_AUX_PCM].channels;
3979 break;
3980
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]3981 case MSM_BACKEND_DAI_PRI_MI2S_RX:
3982 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3983 mi2s_rx_cfg[PRIM_MI2S].bit_format);
3984 rate->min = rate->max = mi2s_rx_cfg[PRIM_MI2S].sample_rate;
3985 channels->min = channels->max =
3986 mi2s_rx_cfg[PRIM_MI2S].channels;
3987 break;
3988
3989 case MSM_BACKEND_DAI_PRI_MI2S_TX:
3990 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3991 mi2s_tx_cfg[PRIM_MI2S].bit_format);
3992 rate->min = rate->max = mi2s_tx_cfg[PRIM_MI2S].sample_rate;
3993 channels->min = channels->max =
3994 mi2s_tx_cfg[PRIM_MI2S].channels;
3995 break;
3996
3997 case MSM_BACKEND_DAI_SECONDARY_MI2S_RX:
3998 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3999 mi2s_rx_cfg[SEC_MI2S].bit_format);
4000 rate->min = rate->max = mi2s_rx_cfg[SEC_MI2S].sample_rate;
4001 channels->min = channels->max =
4002 mi2s_rx_cfg[SEC_MI2S].channels;
4003 break;
4004
4005 case MSM_BACKEND_DAI_SECONDARY_MI2S_TX:
4006 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4007 mi2s_tx_cfg[SEC_MI2S].bit_format);
4008 rate->min = rate->max = mi2s_tx_cfg[SEC_MI2S].sample_rate;
4009 channels->min = channels->max =
4010 mi2s_tx_cfg[SEC_MI2S].channels;
4011 break;
4012
4013 case MSM_BACKEND_DAI_TERTIARY_MI2S_RX:
4014 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4015 mi2s_rx_cfg[TERT_MI2S].bit_format);
4016 rate->min = rate->max = mi2s_rx_cfg[TERT_MI2S].sample_rate;
4017 channels->min = channels->max =
4018 mi2s_rx_cfg[TERT_MI2S].channels;
4019 break;
4020
4021 case MSM_BACKEND_DAI_TERTIARY_MI2S_TX:
4022 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4023 mi2s_tx_cfg[TERT_MI2S].bit_format);
4024 rate->min = rate->max = mi2s_tx_cfg[TERT_MI2S].sample_rate;
4025 channels->min = channels->max =
4026 mi2s_tx_cfg[TERT_MI2S].channels;
4027 break;
4028
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame^]4029 case MSM_BACKEND_DAI_QUATERNARY_MI2S_RX:
4030 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4031 mi2s_rx_cfg[QUAT_MI2S].bit_format);
4032 rate->min = rate->max = mi2s_rx_cfg[QUAT_MI2S].sample_rate;
4033 channels->min = channels->max =
4034 mi2s_rx_cfg[QUAT_MI2S].channels;
4035 break;
4036
4037 case MSM_BACKEND_DAI_QUATERNARY_MI2S_TX:
4038 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4039 mi2s_tx_cfg[QUAT_MI2S].bit_format);
4040 rate->min = rate->max = mi2s_tx_cfg[QUAT_MI2S].sample_rate;
4041 channels->min = channels->max =
4042 mi2s_tx_cfg[QUAT_MI2S].channels;
4043 break;
4044
4045 case MSM_BACKEND_DAI_QUINARY_MI2S_RX:
4046 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4047 mi2s_rx_cfg[QUIN_MI2S].bit_format);
4048 rate->min = rate->max = mi2s_rx_cfg[QUIN_MI2S].sample_rate;
4049 channels->min = channels->max =
4050 mi2s_rx_cfg[QUIN_MI2S].channels;
4051 break;
4052
4053 case MSM_BACKEND_DAI_QUINARY_MI2S_TX:
4054 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4055 mi2s_tx_cfg[QUIN_MI2S].bit_format);
4056 rate->min = rate->max = mi2s_tx_cfg[QUIN_MI2S].sample_rate;
4057 channels->min = channels->max =
4058 mi2s_tx_cfg[QUIN_MI2S].channels;
4059 break;
4060
4061 case MSM_BACKEND_DAI_SENARY_MI2S_RX:
4062 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4063 mi2s_rx_cfg[SEN_MI2S].bit_format);
4064 rate->min = rate->max = mi2s_rx_cfg[SEN_MI2S].sample_rate;
4065 channels->min = channels->max =
4066 mi2s_rx_cfg[SEN_MI2S].channels;
4067 break;
4068
4069 case MSM_BACKEND_DAI_SENARY_MI2S_TX:
4070 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4071 mi2s_tx_cfg[SEN_MI2S].bit_format);
4072 rate->min = rate->max = mi2s_tx_cfg[SEN_MI2S].sample_rate;
4073 channels->min = channels->max =
4074 mi2s_tx_cfg[SEN_MI2S].channels;
4075 break;
4076
Meng Wang574f4942019-02-18 12:59:41 +0800[diff] [blame]4077 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
4078 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
4079 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
4080 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
4081 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
4082 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_3:
4083 idx = msm_cdc_dma_get_idx_from_beid(dai_link->id);
4084 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4085 cdc_dma_rx_cfg[idx].bit_format);
4086 rate->min = rate->max = cdc_dma_rx_cfg[idx].sample_rate;
4087 channels->min = channels->max = cdc_dma_rx_cfg[idx].channels;
4088 break;
4089
4090 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
4091 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
4092 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
4093 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
4094 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800[diff] [blame]4095 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_0:
4096 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_1:
4097 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_2:
4098 idx = msm_cdc_dma_get_idx_from_beid(dai_link->id);
4099 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
Meng Wang574f4942019-02-18 12:59:41 +0800[diff] [blame]4100 cdc_dma_tx_cfg[idx].bit_format);
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800[diff] [blame]4101 rate->min = rate->max = cdc_dma_tx_cfg[idx].sample_rate;
4102 channels->min = channels->max = cdc_dma_tx_cfg[idx].channels;
4103 break;
4104
Meng Wang574f4942019-02-18 12:59:41 +0800[diff] [blame]4105 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
4106 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4107 SNDRV_PCM_FORMAT_S32_LE);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4108 rate->min = rate->max = SAMPLING_RATE_8KHZ;
Meng Wang574f4942019-02-18 12:59:41 +0800[diff] [blame]4109 channels->min = channels->max = msm_vi_feed_tx_ch;
4110 break;
4111
Banajit Goswami83a370d2019-03-05 16:15:21 -0800[diff] [blame]4112 case MSM_BACKEND_DAI_SLIMBUS_7_RX:
4113 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4114 slim_rx_cfg[SLIM_RX_7].bit_format);
4115 rate->min = rate->max = slim_rx_cfg[SLIM_RX_7].sample_rate;
4116 channels->min = channels->max =
4117 slim_rx_cfg[SLIM_RX_7].channels;
4118 break;
4119
4120 case MSM_BACKEND_DAI_SLIMBUS_7_TX:
4121 rate->min = rate->max = slim_tx_cfg[SLIM_TX_7].sample_rate;
4122 channels->min = channels->max =
4123 slim_tx_cfg[SLIM_TX_7].channels;
4124 break;
4125
Vatsal Bucha82b30ba2019-04-17 12:43:54 +0530[diff] [blame]4126 case MSM_BACKEND_DAI_SLIMBUS_8_TX:
4127 rate->min = rate->max = slim_tx_cfg[SLIM_TX_8].sample_rate;
4128 channels->min = channels->max =
4129 slim_tx_cfg[SLIM_TX_8].channels;
4130 break;
4131
Meng Wange8e53822019-03-18 10:49:50 +0800[diff] [blame]4132 case MSM_BACKEND_DAI_AFE_LOOPBACK_TX:
4133 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4134 afe_loopback_tx_cfg[idx].bit_format);
4135 rate->min = rate->max = afe_loopback_tx_cfg[idx].sample_rate;
4136 channels->min = channels->max =
4137 afe_loopback_tx_cfg[idx].channels;
4138 break;
4139
Meng Wang574f4942019-02-18 12:59:41 +0800[diff] [blame]4140 default:
4141 rate->min = rate->max = SAMPLING_RATE_48KHZ;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4142 break;
4143 }
4144
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]4145done:
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4146 return rc;
4147}
4148
Karthikeyan Mani5eb13422018-11-05 13:49:17 -0800[diff] [blame]4149static bool msm_usbc_swap_gnd_mic(struct snd_soc_component *component, bool active)
4150{
4151 struct snd_soc_card *card = component->card;
4152 struct msm_asoc_mach_data *pdata =
4153 snd_soc_card_get_drvdata(card);
4154
4155 if (!pdata->fsa_handle)
4156 return false;
4157
4158 return fsa4480_switch_event(pdata->fsa_handle, FSA_MIC_GND_SWAP);
4159}
4160
4161static bool msm_swap_gnd_mic(struct snd_soc_component *component, bool active)
4162{
4163 int value = 0;
4164 bool ret = false;
4165 struct snd_soc_card *card;
4166 struct msm_asoc_mach_data *pdata;
4167
4168 if (!component) {
4169 pr_err("%s component is NULL\n", __func__);
4170 return false;
4171 }
4172 card = component->card;
4173 pdata = snd_soc_card_get_drvdata(card);
4174
4175 if (!pdata)
4176 return false;
4177
4178 if (wcd_mbhc_cfg.enable_usbc_analog)
4179 return msm_usbc_swap_gnd_mic(component, active);
4180
4181 /* if usbc is not defined, swap using us_euro_gpio_p */
4182 if (pdata->us_euro_gpio_p) {
4183 value = msm_cdc_pinctrl_get_state(
4184 pdata->us_euro_gpio_p);
4185 if (value)
4186 msm_cdc_pinctrl_select_sleep_state(
4187 pdata->us_euro_gpio_p);
4188 else
4189 msm_cdc_pinctrl_select_active_state(
4190 pdata->us_euro_gpio_p);
4191 dev_dbg(component->dev, "%s: swap select switch %d to %d\n",
4192 __func__, value, !value);
4193 ret = true;
4194 }
4195
4196 return ret;
4197}
4198
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4199static int kona_tdm_snd_hw_params(struct snd_pcm_substream *substream,
4200 struct snd_pcm_hw_params *params)
4201{
4202 struct snd_soc_pcm_runtime *rtd = substream->private_data;
4203 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
4204 int ret = 0;
4205 int slot_width = 32;
4206 int channels, slots;
4207 unsigned int slot_mask, rate, clk_freq;
4208 unsigned int slot_offset[8] = {0, 4, 8, 12, 16, 20, 24, 28};
4209
4210 pr_debug("%s: dai id = 0x%x\n", __func__, cpu_dai->id);
4211
4212 /* currently only supporting TDM_RX_0 and TDM_TX_0 */
4213 switch (cpu_dai->id) {
4214 case AFE_PORT_ID_PRIMARY_TDM_RX:
4215 slots = tdm_rx_cfg[TDM_PRI][TDM_0].channels;
4216 break;
4217 case AFE_PORT_ID_SECONDARY_TDM_RX:
4218 slots = tdm_rx_cfg[TDM_SEC][TDM_0].channels;
4219 break;
4220 case AFE_PORT_ID_TERTIARY_TDM_RX:
4221 slots = tdm_rx_cfg[TDM_TERT][TDM_0].channels;
4222 break;
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame^]4223 case AFE_PORT_ID_QUATERNARY_TDM_RX:
4224 slots = tdm_rx_cfg[TDM_QUAT][TDM_0].channels;
4225 break;
4226 case AFE_PORT_ID_QUINARY_TDM_RX:
4227 slots = tdm_rx_cfg[TDM_QUIN][TDM_0].channels;
4228 break;
4229 case AFE_PORT_ID_SENARY_TDM_RX:
4230 slots = tdm_rx_cfg[TDM_SEN][TDM_0].channels;
4231 break;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4232 case AFE_PORT_ID_PRIMARY_TDM_TX:
4233 slots = tdm_tx_cfg[TDM_PRI][TDM_0].channels;
4234 break;
4235 case AFE_PORT_ID_SECONDARY_TDM_TX:
4236 slots = tdm_tx_cfg[TDM_SEC][TDM_0].channels;
4237 break;
4238 case AFE_PORT_ID_TERTIARY_TDM_TX:
4239 slots = tdm_tx_cfg[TDM_TERT][TDM_0].channels;
4240 break;
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame^]4241 case AFE_PORT_ID_QUATERNARY_TDM_TX:
4242 slots = tdm_tx_cfg[TDM_QUAT][TDM_0].channels;
4243 break;
4244 case AFE_PORT_ID_QUINARY_TDM_TX:
4245 slots = tdm_tx_cfg[TDM_QUIN][TDM_0].channels;
4246 break;
4247 case AFE_PORT_ID_SENARY_TDM_TX:
4248 slots = tdm_tx_cfg[TDM_SEN][TDM_0].channels;
4249 break;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4250
4251 default:
4252 pr_err("%s: dai id 0x%x not supported\n",
4253 __func__, cpu_dai->id);
4254 return -EINVAL;
4255 }
4256
4257 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
4258 /*2 slot config - bits 0 and 1 set for the first two slots */
4259 slot_mask = 0x0000FFFF >> (16 - slots);
4260 channels = slots;
4261
4262 pr_debug("%s: tdm rx slot_width %d slots %d\n",
4263 __func__, slot_width, slots);
4264
4265 ret = snd_soc_dai_set_tdm_slot(cpu_dai, 0, slot_mask,
4266 slots, slot_width);
4267 if (ret < 0) {
4268 pr_err("%s: failed to set tdm rx slot, err:%d\n",
4269 __func__, ret);
4270 goto end;
4271 }
4272
4273 ret = snd_soc_dai_set_channel_map(cpu_dai,
4274 0, NULL, channels, slot_offset);
4275 if (ret < 0) {
4276 pr_err("%s: failed to set tdm rx channel map, err:%d\n",
4277 __func__, ret);
4278 goto end;
4279 }
4280 } else if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
4281 /*2 slot config - bits 0 and 1 set for the first two slots */
4282 slot_mask = 0x0000FFFF >> (16 - slots);
4283 channels = slots;
4284
4285 pr_debug("%s: tdm tx slot_width %d slots %d\n",
4286 __func__, slot_width, slots);
4287
4288 ret = snd_soc_dai_set_tdm_slot(cpu_dai, slot_mask, 0,
4289 slots, slot_width);
4290 if (ret < 0) {
4291 pr_err("%s: failed to set tdm tx slot, err:%d\n",
4292 __func__, ret);
4293 goto end;
4294 }
4295
4296 ret = snd_soc_dai_set_channel_map(cpu_dai,
4297 channels, slot_offset, 0, NULL);
4298 if (ret < 0) {
4299 pr_err("%s: failed to set tdm tx channel map, err:%d\n",
4300 __func__, ret);
4301 goto end;
4302 }
4303 } else {
4304 ret = -EINVAL;
4305 pr_err("%s: invalid use case, err:%d\n",
4306 __func__, ret);
4307 goto end;
4308 }
4309
4310 rate = params_rate(params);
4311 clk_freq = rate * slot_width * slots;
4312 ret = snd_soc_dai_set_sysclk(cpu_dai, 0, clk_freq, SND_SOC_CLOCK_OUT);
4313 if (ret < 0)
4314 pr_err("%s: failed to set tdm clk, err:%d\n",
4315 __func__, ret);
4316
4317end:
4318 return ret;
4319}
4320
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame^]4321static int msm_get_tdm_mode(u32 port_id)
4322{
4323 int tdm_mode;
4324
4325 switch (port_id) {
4326 case AFE_PORT_ID_PRIMARY_TDM_RX:
4327 case AFE_PORT_ID_PRIMARY_TDM_TX:
4328 tdm_mode = TDM_PRI;
4329 break;
4330 case AFE_PORT_ID_SECONDARY_TDM_RX:
4331 case AFE_PORT_ID_SECONDARY_TDM_TX:
4332 tdm_mode = TDM_SEC;
4333 break;
4334 case AFE_PORT_ID_TERTIARY_TDM_RX:
4335 case AFE_PORT_ID_TERTIARY_TDM_TX:
4336 tdm_mode = TDM_TERT;
4337 break;
4338 case AFE_PORT_ID_QUATERNARY_TDM_RX:
4339 case AFE_PORT_ID_QUATERNARY_TDM_TX:
4340 tdm_mode = TDM_QUAT;
4341 break;
4342 case AFE_PORT_ID_QUINARY_TDM_RX:
4343 case AFE_PORT_ID_QUINARY_TDM_TX:
4344 tdm_mode = TDM_QUIN;
4345 break;
4346 case AFE_PORT_ID_SENARY_TDM_RX:
4347 case AFE_PORT_ID_SENARY_TDM_TX:
4348 tdm_mode = TDM_SEN;
4349 break;
4350 default:
4351 pr_err("%s: Invalid port id: %d\n", __func__, port_id);
4352 tdm_mode = -EINVAL;
4353 }
4354 return tdm_mode;
4355}
4356
4357static int kona_tdm_snd_startup(struct snd_pcm_substream *substream)
4358{
4359 int ret = 0;
4360 struct snd_soc_pcm_runtime *rtd = substream->private_data;
4361 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
4362 struct snd_soc_card *card = rtd->card;
4363 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
4364 int tdm_mode = msm_get_tdm_mode(cpu_dai->id);
4365
4366 if (tdm_mode >= TDM_INTERFACE_MAX || tdm_mode < 0) {
4367 ret = -EINVAL;
4368 pr_err("%s: Invalid TDM interface %d\n",
4369 __func__, ret);
4370 return ret;
4371 }
4372
4373 if (pdata->mi2s_gpio_p[tdm_mode]) {
4374 if (atomic_read(&(pdata->mi2s_gpio_ref_count[tdm_mode]))
4375 == 0) {
4376 ret = msm_cdc_pinctrl_select_active_state(
4377 pdata->mi2s_gpio_p[tdm_mode]);
4378 if (ret) {
4379 pr_err("%s: TDM GPIO pinctrl set active failed with %d\n",
4380 __func__, ret);
4381 goto done;
4382 }
4383 }
4384 atomic_inc(&(pdata->mi2s_gpio_ref_count[tdm_mode]));
4385 }
4386
4387done:
4388 return ret;
4389}
4390
4391static void kona_tdm_snd_shutdown(struct snd_pcm_substream *substream)
4392{
4393 int ret = 0;
4394 struct snd_soc_pcm_runtime *rtd = substream->private_data;
4395 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
4396 struct snd_soc_card *card = rtd->card;
4397 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
4398 int tdm_mode = msm_get_tdm_mode(cpu_dai->id);
4399
4400 if (tdm_mode >= TDM_INTERFACE_MAX || tdm_mode < 0) {
4401 ret = -EINVAL;
4402 pr_err("%s: Invalid TDM interface %d\n",
4403 __func__, ret);
4404 return;
4405 }
4406
4407 if (pdata->mi2s_gpio_p[tdm_mode]) {
4408 atomic_dec(&(pdata->mi2s_gpio_ref_count[tdm_mode]));
4409 if (atomic_read(&(pdata->mi2s_gpio_ref_count[tdm_mode]))
4410 == 0) {
4411 ret = msm_cdc_pinctrl_select_sleep_state(
4412 pdata->mi2s_gpio_p[tdm_mode]);
4413 if (ret)
4414 pr_err("%s: TDM GPIO pinctrl set sleep failed with %d\n",
4415 __func__, ret);
4416 }
4417 }
4418}
4419
4420static int kona_aux_snd_startup(struct snd_pcm_substream *substream)
4421{
4422 int ret = 0;
4423 struct snd_soc_pcm_runtime *rtd = substream->private_data;
4424 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
4425 struct snd_soc_card *card = rtd->card;
4426 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
4427 u32 aux_mode = cpu_dai->id - 1;
4428
4429 if (aux_mode >= AUX_PCM_MAX) {
4430 ret = -EINVAL;
4431 pr_err("%s: Invalid AUX interface %d\n",
4432 __func__, ret);
4433 return ret;
4434 }
4435
4436 if (pdata->mi2s_gpio_p[aux_mode]) {
4437 if (atomic_read(&(pdata->mi2s_gpio_ref_count[aux_mode]))
4438 == 0) {
4439 ret = msm_cdc_pinctrl_select_active_state(
4440 pdata->mi2s_gpio_p[aux_mode]);
4441 if (ret) {
4442 pr_err("%s: AUX GPIO pinctrl set active failed with %d\n",
4443 __func__, ret);
4444 goto done;
4445 }
4446 }
4447 atomic_inc(&(pdata->mi2s_gpio_ref_count[aux_mode]));
4448 }
4449
4450done:
4451 return ret;
4452}
4453
4454static void kona_aux_snd_shutdown(struct snd_pcm_substream *substream)
4455{
4456 int ret = 0;
4457 struct snd_soc_pcm_runtime *rtd = substream->private_data;
4458 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
4459 struct snd_soc_card *card = rtd->card;
4460 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
4461 u32 aux_mode = cpu_dai->id - 1;
4462
4463 if (aux_mode >= AUX_PCM_MAX) {
4464 pr_err("%s: Invalid AUX interface %d\n",
4465 __func__, ret);
4466 return;
4467 }
4468
4469 if (pdata->mi2s_gpio_p[aux_mode]) {
4470 atomic_dec(&(pdata->mi2s_gpio_ref_count[aux_mode]));
4471 if (atomic_read(&(pdata->mi2s_gpio_ref_count[aux_mode]))
4472 == 0) {
4473 ret = msm_cdc_pinctrl_select_sleep_state(
4474 pdata->mi2s_gpio_p[aux_mode]);
4475 if (ret)
4476 pr_err("%s: AUX GPIO pinctrl set sleep failed with %d\n",
4477 __func__, ret);
4478 }
4479 }
4480}
4481
Xiaoyu Yeffbdc9f2019-05-17 15:02:39 -0700[diff] [blame]4482static int msm_snd_cdc_dma_startup(struct snd_pcm_substream *substream)
4483{
4484 int ret = 0;
4485 struct snd_soc_pcm_runtime *rtd = substream->private_data;
4486 struct snd_soc_dai_link *dai_link = rtd->dai_link;
4487
4488 switch (dai_link->id) {
4489 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_0:
4490 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_1:
4491 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_2:
4492 ret = kona_send_island_va_config(dai_link->id);
4493 if (ret)
4494 pr_err("%s: send island va cfg failed, err: %d\n",
4495 __func__, ret);
4496 break;
4497 }
4498
4499 return ret;
4500}
4501
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]4502static int msm_snd_cdc_dma_hw_params(struct snd_pcm_substream *substream,
4503 struct snd_pcm_hw_params *params)
4504{
4505 struct snd_soc_pcm_runtime *rtd = substream->private_data;
4506 struct snd_soc_dai *codec_dai = rtd->codec_dai;
4507 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
4508 struct snd_soc_dai_link *dai_link = rtd->dai_link;
4509
4510 int ret = 0;
4511 u32 rx_ch_cdc_dma, tx_ch_cdc_dma;
4512 u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
4513 u32 user_set_tx_ch = 0;
4514 u32 user_set_rx_ch = 0;
4515 u32 ch_id;
4516
4517 ret = snd_soc_dai_get_channel_map(codec_dai,
4518 &tx_ch_cnt, &tx_ch_cdc_dma, &rx_ch_cnt,
4519 &rx_ch_cdc_dma);
4520 if (ret < 0) {
4521 pr_err("%s: failed to get codec chan map, err:%d\n",
4522 __func__, ret);
4523 goto err;
4524 }
4525
4526 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
4527 switch (dai_link->id) {
4528 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
4529 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
4530 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
4531 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
4532 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
4533 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_3:
4534 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_4:
4535 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_5:
4536 {
4537 ch_id = msm_cdc_dma_get_idx_from_beid(dai_link->id);
4538 pr_debug("%s: id %d rx_ch=%d\n", __func__,
4539 ch_id, cdc_dma_rx_cfg[ch_id].channels);
4540 user_set_rx_ch = cdc_dma_rx_cfg[ch_id].channels;
4541 ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
4542 user_set_rx_ch, &rx_ch_cdc_dma);
4543 if (ret < 0) {
4544 pr_err("%s: failed to set cpu chan map, err:%d\n",
4545 __func__, ret);
4546 goto err;
4547 }
4548
4549 }
4550 break;
4551 }
4552 } else {
4553 switch (dai_link->id) {
4554 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
4555 {
4556 user_set_tx_ch = msm_vi_feed_tx_ch;
4557 }
4558 break;
4559 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
4560 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
4561 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
4562 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
4563 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800[diff] [blame]4564 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_0:
4565 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_1:
4566 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_2:
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]4567 {
4568 ch_id = msm_cdc_dma_get_idx_from_beid(dai_link->id);
4569 pr_debug("%s: id %d tx_ch=%d\n", __func__,
4570 ch_id, cdc_dma_tx_cfg[ch_id].channels);
4571 user_set_tx_ch = cdc_dma_tx_cfg[ch_id].channels;
4572 }
4573 break;
4574 }
4575
4576 ret = snd_soc_dai_set_channel_map(cpu_dai, user_set_tx_ch,
4577 &tx_ch_cdc_dma, 0, 0);
4578 if (ret < 0) {
4579 pr_err("%s: failed to set cpu chan map, err:%d\n",
4580 __func__, ret);
4581 goto err;
4582 }
4583 }
4584
4585err:
4586 return ret;
4587}
4588
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4589static int msm_fe_qos_prepare(struct snd_pcm_substream *substream)
4590{
4591 cpumask_t mask;
4592
4593 if (pm_qos_request_active(&substream->latency_pm_qos_req))
4594 pm_qos_remove_request(&substream->latency_pm_qos_req);
4595
4596 cpumask_clear(&mask);
4597 cpumask_set_cpu(1, &mask); /* affine to core 1 */
4598 cpumask_set_cpu(2, &mask); /* affine to core 2 */
4599 cpumask_copy(&substream->latency_pm_qos_req.cpus_affine, &mask);
4600
4601 substream->latency_pm_qos_req.type = PM_QOS_REQ_AFFINE_CORES;
4602
4603 pm_qos_add_request(&substream->latency_pm_qos_req,
4604 PM_QOS_CPU_DMA_LATENCY,
4605 MSM_LL_QOS_VALUE);
4606 return 0;
4607}
4608
4609static int msm_mi2s_snd_startup(struct snd_pcm_substream *substream)
4610{
4611 int ret = 0;
4612 struct snd_soc_pcm_runtime *rtd = substream->private_data;
4613 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
4614 int index = cpu_dai->id;
4615 unsigned int fmt = SND_SOC_DAIFMT_CBS_CFS;
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame^]4616 struct snd_soc_card *card = rtd->card;
4617 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4618
4619 dev_dbg(rtd->card->dev,
4620 "%s: substream = %s stream = %d, dai name %s, dai ID %d\n",
4621 __func__, substream->name, substream->stream,
4622 cpu_dai->name, cpu_dai->id);
4623
4624 if (index < PRIM_MI2S || index >= MI2S_MAX) {
4625 ret = -EINVAL;
4626 dev_err(rtd->card->dev,
4627 "%s: CPU DAI id (%d) out of range\n",
4628 __func__, cpu_dai->id);
4629 goto err;
4630 }
4631 /*
4632 * Mutex protection in case the same MI2S
4633 * interface using for both TX and RX so
4634 * that the same clock won't be enable twice.
4635 */
4636 mutex_lock(&mi2s_intf_conf[index].lock);
4637 if (++mi2s_intf_conf[index].ref_cnt == 1) {
4638 /* Check if msm needs to provide the clock to the interface */
4639 if (!mi2s_intf_conf[index].msm_is_mi2s_master) {
4640 mi2s_clk[index].clk_id = mi2s_ebit_clk[index];
4641 fmt = SND_SOC_DAIFMT_CBM_CFM;
4642 }
4643 ret = msm_mi2s_set_sclk(substream, true);
4644 if (ret < 0) {
4645 dev_err(rtd->card->dev,
4646 "%s: afe lpass clock failed to enable MI2S clock, err:%d\n",
4647 __func__, ret);
4648 goto clean_up;
4649 }
4650
4651 ret = snd_soc_dai_set_fmt(cpu_dai, fmt);
4652 if (ret < 0) {
4653 pr_err("%s: set fmt cpu dai failed for MI2S (%d), err:%d\n",
4654 __func__, index, ret);
4655 goto clk_off;
4656 }
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame^]4657 if (pdata->mi2s_gpio_p[index]) {
4658 if (atomic_read(&(pdata->mi2s_gpio_ref_count[index]))
4659 == 0) {
4660 ret = msm_cdc_pinctrl_select_active_state(
4661 pdata->mi2s_gpio_p[index]);
4662 if (ret) {
4663 pr_err("%s: MI2S GPIO pinctrl set active failed with %d\n",
4664 __func__, ret);
4665 goto clk_off;
4666 }
4667 }
4668 atomic_inc(&(pdata->mi2s_gpio_ref_count[index]));
4669 }
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4670 }
4671clk_off:
4672 if (ret < 0)
4673 msm_mi2s_set_sclk(substream, false);
4674clean_up:
4675 if (ret < 0)
4676 mi2s_intf_conf[index].ref_cnt--;
4677 mutex_unlock(&mi2s_intf_conf[index].lock);
4678err:
4679 return ret;
4680}
4681
4682static void msm_mi2s_snd_shutdown(struct snd_pcm_substream *substream)
4683{
4684 int ret = 0;
4685 struct snd_soc_pcm_runtime *rtd = substream->private_data;
4686 int index = rtd->cpu_dai->id;
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame^]4687 struct snd_soc_card *card = rtd->card;
4688 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4689
4690 pr_debug("%s(): substream = %s stream = %d\n", __func__,
4691 substream->name, substream->stream);
4692 if (index < PRIM_MI2S || index >= MI2S_MAX) {
4693 pr_err("%s:invalid MI2S DAI(%d)\n", __func__, index);
4694 return;
4695 }
4696
4697 mutex_lock(&mi2s_intf_conf[index].lock);
4698 if (--mi2s_intf_conf[index].ref_cnt == 0) {
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame^]4699 if (pdata->mi2s_gpio_p[index]) {
4700 atomic_dec(&(pdata->mi2s_gpio_ref_count[index]));
4701 if (atomic_read(&(pdata->mi2s_gpio_ref_count[index]))
4702 == 0) {
4703 ret = msm_cdc_pinctrl_select_sleep_state(
4704 pdata->mi2s_gpio_p[index]);
4705 if (ret)
4706 pr_err("%s: MI2S GPIO pinctrl set sleep failed with %d\n",
4707 __func__, ret);
4708 }
4709 }
4710
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4711 ret = msm_mi2s_set_sclk(substream, false);
4712 if (ret < 0)
4713 pr_err("%s:clock disable failed for MI2S (%d); ret=%d\n",
4714 __func__, index, ret);
4715 }
4716 mutex_unlock(&mi2s_intf_conf[index].lock);
4717}
4718
Vatsal Bucha82b30ba2019-04-17 12:43:54 +0530[diff] [blame]4719static int msm_wcn_hw_params_lito(struct snd_pcm_substream *substream,
4720 struct snd_pcm_hw_params *params)
4721{
4722 struct snd_soc_pcm_runtime *rtd = substream->private_data;
4723 struct snd_soc_dai *codec_dai = rtd->codec_dai;
4724 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
4725 struct snd_soc_dai_link *dai_link = rtd->dai_link;
4726 u32 rx_ch[WCN_CDC_SLIM_RX_CH_MAX], tx_ch[WCN_CDC_SLIM_TX_CH_MAX_LITO];
4727 u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
4728 int ret = 0;
4729
4730 dev_dbg(rtd->dev, "%s: %s_tx_dai_id_%d\n", __func__,
4731 codec_dai->name, codec_dai->id);
4732 ret = snd_soc_dai_get_channel_map(codec_dai,
4733 &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
4734 if (ret) {
4735 dev_err(rtd->dev,
4736 "%s: failed to get BTFM codec chan map\n, err:%d\n",
4737 __func__, ret);
4738 goto err;
4739 }
4740
4741 dev_dbg(rtd->dev, "%s: tx_ch_cnt(%d) BE id %d\n",
4742 __func__, tx_ch_cnt, dai_link->id);
4743
4744 ret = snd_soc_dai_set_channel_map(cpu_dai,
4745 tx_ch_cnt, tx_ch, rx_ch_cnt, rx_ch);
4746 if (ret)
4747 dev_err(rtd->dev, "%s: failed to set cpu chan map, err:%d\n",
4748 __func__, ret);
4749
4750err:
4751 return ret;
4752}
4753
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]4754static int msm_wcn_hw_params(struct snd_pcm_substream *substream,
4755 struct snd_pcm_hw_params *params)
4756{
4757 struct snd_soc_pcm_runtime *rtd = substream->private_data;
4758 struct snd_soc_dai *codec_dai = rtd->codec_dai;
4759 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
4760 struct snd_soc_dai_link *dai_link = rtd->dai_link;
4761 u32 rx_ch[WCN_CDC_SLIM_RX_CH_MAX], tx_ch[WCN_CDC_SLIM_TX_CH_MAX];
4762 u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
4763 int ret = 0;
4764
4765 dev_dbg(rtd->dev, "%s: %s_tx_dai_id_%d\n", __func__,
4766 codec_dai->name, codec_dai->id);
4767 ret = snd_soc_dai_get_channel_map(codec_dai,
4768 &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
4769 if (ret) {
4770 dev_err(rtd->dev,
4771 "%s: failed to get BTFM codec chan map\n, err:%d\n",
4772 __func__, ret);
4773 goto err;
4774 }
4775
4776 dev_dbg(rtd->dev, "%s: tx_ch_cnt(%d) BE id %d\n",
4777 __func__, tx_ch_cnt, dai_link->id);
4778
4779 ret = snd_soc_dai_set_channel_map(cpu_dai,
4780 tx_ch_cnt, tx_ch, rx_ch_cnt, rx_ch);
4781 if (ret)
4782 dev_err(rtd->dev, "%s: failed to set cpu chan map, err:%d\n",
4783 __func__, ret);
4784
4785err:
4786 return ret;
4787}
4788
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame^]4789static struct snd_soc_ops kona_aux_be_ops = {
4790 .startup = kona_aux_snd_startup,
4791 .shutdown = kona_aux_snd_shutdown
4792};
4793
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4794static struct snd_soc_ops kona_tdm_be_ops = {
4795 .hw_params = kona_tdm_snd_hw_params,
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame^]4796 .startup = kona_tdm_snd_startup,
4797 .shutdown = kona_tdm_snd_shutdown
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4798};
4799
4800static struct snd_soc_ops msm_mi2s_be_ops = {
4801 .startup = msm_mi2s_snd_startup,
4802 .shutdown = msm_mi2s_snd_shutdown,
4803};
4804
4805static struct snd_soc_ops msm_fe_qos_ops = {
4806 .prepare = msm_fe_qos_prepare,
4807};
4808
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]4809static struct snd_soc_ops msm_cdc_dma_be_ops = {
Xiaoyu Yeffbdc9f2019-05-17 15:02:39 -0700[diff] [blame]4810 .startup = msm_snd_cdc_dma_startup,
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]4811 .hw_params = msm_snd_cdc_dma_hw_params,
4812};
4813
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]4814static struct snd_soc_ops msm_wcn_ops = {
4815 .hw_params = msm_wcn_hw_params,
4816};
4817
Vatsal Bucha82b30ba2019-04-17 12:43:54 +0530[diff] [blame]4818static struct snd_soc_ops msm_wcn_ops_lito = {
4819 .hw_params = msm_wcn_hw_params_lito,
4820};
4821
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]4822static int msm_dmic_event(struct snd_soc_dapm_widget *w,
4823 struct snd_kcontrol *kcontrol, int event)
4824{
4825 struct msm_asoc_mach_data *pdata = NULL;
4826 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
4827 int ret = 0;
4828 u32 dmic_idx;
4829 int *dmic_gpio_cnt;
4830 struct device_node *dmic_gpio;
4831 char *wname;
4832
4833 wname = strpbrk(w->name, "012345");
4834 if (!wname) {
4835 dev_err(component->dev, "%s: widget not found\n", __func__);
4836 return -EINVAL;
4837 }
4838
4839 ret = kstrtouint(wname, 10, &dmic_idx);
4840 if (ret < 0) {
4841 dev_err(component->dev, "%s: Invalid DMIC line on the codec\n",
4842 __func__);
4843 return -EINVAL;
4844 }
4845
4846 pdata = snd_soc_card_get_drvdata(component->card);
4847
4848 switch (dmic_idx) {
4849 case 0:
4850 case 1:
4851 dmic_gpio_cnt = &dmic_0_1_gpio_cnt;
4852 dmic_gpio = pdata->dmic01_gpio_p;
4853 break;
4854 case 2:
4855 case 3:
4856 dmic_gpio_cnt = &dmic_2_3_gpio_cnt;
4857 dmic_gpio = pdata->dmic23_gpio_p;
4858 break;
4859 case 4:
4860 case 5:
4861 dmic_gpio_cnt = &dmic_4_5_gpio_cnt;
4862 dmic_gpio = pdata->dmic45_gpio_p;
4863 break;
4864 default:
4865 dev_err(component->dev, "%s: Invalid DMIC Selection\n",
4866 __func__);
4867 return -EINVAL;
4868 }
4869
4870 dev_dbg(component->dev, "%s: event %d DMIC%d dmic_gpio_cnt %d\n",
4871 __func__, event, dmic_idx, *dmic_gpio_cnt);
4872
4873 switch (event) {
4874 case SND_SOC_DAPM_PRE_PMU:
4875 (*dmic_gpio_cnt)++;
4876 if (*dmic_gpio_cnt == 1) {
4877 ret = msm_cdc_pinctrl_select_active_state(
4878 dmic_gpio);
4879 if (ret < 0) {
4880 pr_err("%s: gpio set cannot be activated %sd",
4881 __func__, "dmic_gpio");
4882 return ret;
4883 }
4884 }
4885
4886 break;
4887 case SND_SOC_DAPM_POST_PMD:
4888 (*dmic_gpio_cnt)--;
4889 if (*dmic_gpio_cnt == 0) {
4890 ret = msm_cdc_pinctrl_select_sleep_state(
4891 dmic_gpio);
4892 if (ret < 0) {
4893 pr_err("%s: gpio set cannot be de-activated %sd",
4894 __func__, "dmic_gpio");
4895 return ret;
4896 }
4897 }
4898 break;
4899 default:
4900 pr_err("%s: invalid DAPM event %d\n", __func__, event);
4901 return -EINVAL;
4902 }
4903 return 0;
4904}
4905
4906static const struct snd_soc_dapm_widget msm_int_dapm_widgets[] = {
4907 SND_SOC_DAPM_MIC("Analog Mic1", NULL),
4908 SND_SOC_DAPM_MIC("Analog Mic2", NULL),
4909 SND_SOC_DAPM_MIC("Analog Mic3", NULL),
4910 SND_SOC_DAPM_MIC("Analog Mic4", NULL),
Karthikeyan Mani1a111b92019-02-12 21:35:31 -0800[diff] [blame]4911 SND_SOC_DAPM_MIC("Analog Mic5", NULL),
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]4912 SND_SOC_DAPM_MIC("Digital Mic0", msm_dmic_event),
4913 SND_SOC_DAPM_MIC("Digital Mic1", msm_dmic_event),
4914 SND_SOC_DAPM_MIC("Digital Mic2", msm_dmic_event),
4915 SND_SOC_DAPM_MIC("Digital Mic3", msm_dmic_event),
4916 SND_SOC_DAPM_MIC("Digital Mic4", msm_dmic_event),
4917 SND_SOC_DAPM_MIC("Digital Mic5", msm_dmic_event),
4918};
4919
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]4920static int msm_wcn_init(struct snd_soc_pcm_runtime *rtd)
4921{
4922 unsigned int rx_ch[WCN_CDC_SLIM_RX_CH_MAX] = {157, 158};
4923 unsigned int tx_ch[WCN_CDC_SLIM_TX_CH_MAX] = {159, 160};
4924 struct snd_soc_dai *codec_dai = rtd->codec_dai;
4925
4926 return snd_soc_dai_set_channel_map(codec_dai, ARRAY_SIZE(tx_ch),
4927 tx_ch, ARRAY_SIZE(rx_ch), rx_ch);
4928}
4929
Vatsal Bucha82b30ba2019-04-17 12:43:54 +0530[diff] [blame]4930static int msm_wcn_init_lito(struct snd_soc_pcm_runtime *rtd)
4931{
4932 unsigned int rx_ch[WCN_CDC_SLIM_RX_CH_MAX] = {157, 158};
4933 unsigned int tx_ch[WCN_CDC_SLIM_TX_CH_MAX_LITO] = {159, 160, 161};
4934 struct snd_soc_dai *codec_dai = rtd->codec_dai;
4935
4936 return snd_soc_dai_set_channel_map(codec_dai, ARRAY_SIZE(tx_ch),
4937 tx_ch, ARRAY_SIZE(rx_ch), rx_ch);
4938}
4939
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]4940static int msm_int_audrx_init(struct snd_soc_pcm_runtime *rtd)
4941{
4942 int ret = -EINVAL;
4943 struct snd_soc_component *component;
4944 struct snd_soc_dapm_context *dapm;
4945 struct snd_card *card;
4946 struct snd_info_entry *entry;
4947 struct snd_soc_component *aux_comp;
4948 struct msm_asoc_mach_data *pdata =
4949 snd_soc_card_get_drvdata(rtd->card);
4950
4951 component = snd_soc_rtdcom_lookup(rtd, "bolero_codec");
4952 if (!component) {
4953 pr_err("%s: could not find component for bolero_codec\n",
4954 __func__);
4955 return ret;
4956 }
4957
4958 dapm = snd_soc_component_get_dapm(component);
4959
4960 ret = snd_soc_add_component_controls(component, msm_int_snd_controls,
4961 ARRAY_SIZE(msm_int_snd_controls));
4962 if (ret < 0) {
4963 pr_err("%s: add_component_controls failed: %d\n",
4964 __func__, ret);
4965 return ret;
4966 }
4967 ret = snd_soc_add_component_controls(component, msm_common_snd_controls,
4968 ARRAY_SIZE(msm_common_snd_controls));
4969 if (ret < 0) {
4970 pr_err("%s: add common snd controls failed: %d\n",
4971 __func__, ret);
4972 return ret;
4973 }
4974
4975 snd_soc_dapm_new_controls(dapm, msm_int_dapm_widgets,
4976 ARRAY_SIZE(msm_int_dapm_widgets));
4977
4978 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic0");
4979 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic1");
4980 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic2");
4981 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic3");
Sudheer Papothi3fc2d772019-05-11 14:11:29 +0530[diff] [blame]4982 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic4");
4983 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic5");
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]4984
4985 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic1");
4986 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic2");
4987 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic3");
4988 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic4");
Karthikeyan Mani1a111b92019-02-12 21:35:31 -0800[diff] [blame]4989 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic5");
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]4990
4991 snd_soc_dapm_ignore_suspend(dapm, "WSA_SPK1 OUT");
4992 snd_soc_dapm_ignore_suspend(dapm, "WSA_SPK2 OUT");
4993 snd_soc_dapm_ignore_suspend(dapm, "WSA AIF VI");
4994 snd_soc_dapm_ignore_suspend(dapm, "VIINPUT_WSA");
4995
4996 snd_soc_dapm_sync(dapm);
4997
4998 /*
4999 * Send speaker configuration only for WSA8810.
5000 * Default configuration is for WSA8815.
5001 */
5002 dev_dbg(component->dev, "%s: Number of aux devices: %d\n",
5003 __func__, rtd->card->num_aux_devs);
5004 if (rtd->card->num_aux_devs &&
5005 !list_empty(&rtd->card->component_dev_list)) {
5006 aux_comp = list_first_entry(
5007 &rtd->card->component_dev_list,
5008 struct snd_soc_component,
5009 card_aux_list);
5010 if (!strcmp(aux_comp->name, WSA8810_NAME_1) ||
5011 !strcmp(aux_comp->name, WSA8810_NAME_2)) {
5012 wsa_macro_set_spkr_mode(component,
5013 WSA_MACRO_SPKR_MODE_1);
5014 wsa_macro_set_spkr_gain_offset(component,
5015 WSA_MACRO_GAIN_OFFSET_M1P5_DB);
5016 }
Karthikeyan Mani7eef68e2018-12-13 17:45:02 -0800[diff] [blame]5017 bolero_set_port_map(component, ARRAY_SIZE(sm_port_map),
5018 sm_port_map);
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]5019 }
5020 card = rtd->card->snd_card;
5021 if (!pdata->codec_root) {
5022 entry = snd_info_create_subdir(card->module, "codecs",
5023 card->proc_root);
5024 if (!entry) {
5025 pr_debug("%s: Cannot create codecs module entry\n",
5026 __func__);
5027 ret = 0;
5028 goto err;
5029 }
5030 pdata->codec_root = entry;
5031 }
5032 bolero_info_create_codec_entry(pdata->codec_root, component);
Karthikeyan Mani664bd4a2019-02-21 13:30:34 -0800[diff] [blame]5033 bolero_register_wake_irq(component, false);
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]5034 codec_reg_done = true;
5035 return 0;
5036err:
5037 return ret;
5038}
5039
Karthikeyan Mani5eb13422018-11-05 13:49:17 -0800[diff] [blame]5040static void *def_wcd_mbhc_cal(void)
5041{
5042 void *wcd_mbhc_cal;
5043 struct wcd_mbhc_btn_detect_cfg *btn_cfg;
5044 u16 *btn_high;
5045
5046 wcd_mbhc_cal = kzalloc(WCD_MBHC_CAL_SIZE(WCD_MBHC_DEF_BUTTONS,
5047 WCD9XXX_MBHC_DEF_RLOADS), GFP_KERNEL);
5048 if (!wcd_mbhc_cal)
5049 return NULL;
5050
5051 WCD_MBHC_CAL_PLUG_TYPE_PTR(wcd_mbhc_cal)->v_hs_max = WCD_MBHC_HS_V_MAX;
5052 WCD_MBHC_CAL_BTN_DET_PTR(wcd_mbhc_cal)->num_btn = WCD_MBHC_DEF_BUTTONS;
5053 btn_cfg = WCD_MBHC_CAL_BTN_DET_PTR(wcd_mbhc_cal);
5054 btn_high = ((void *)&btn_cfg->_v_btn_low) +
5055 (sizeof(btn_cfg->_v_btn_low[0]) * btn_cfg->num_btn);
5056
5057 btn_high[0] = 75;
5058 btn_high[1] = 150;
5059 btn_high[2] = 237;
5060 btn_high[3] = 500;
5061 btn_high[4] = 500;
5062 btn_high[5] = 500;
5063 btn_high[6] = 500;
5064 btn_high[7] = 500;
5065
5066 return wcd_mbhc_cal;
5067}
5068
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]5069/* Digital audio interface glue - connects codec <---> CPU */
5070static struct snd_soc_dai_link msm_common_dai_links[] = {
5071 /* FrontEnd DAI Links */
5072 {/* hw:x,0 */
5073 .name = MSM_DAILINK_NAME(Media1),
5074 .stream_name = "MultiMedia1",
5075 .cpu_dai_name = "MultiMedia1",
5076 .platform_name = "msm-pcm-dsp.0",
5077 .dynamic = 1,
5078 .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
5079 .dpcm_playback = 1,
5080 .dpcm_capture = 1,
5081 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5082 SND_SOC_DPCM_TRIGGER_POST},
5083 .codec_dai_name = "snd-soc-dummy-dai",
5084 .codec_name = "snd-soc-dummy",
5085 .ignore_suspend = 1,
5086 /* this dainlink has playback support */
5087 .ignore_pmdown_time = 1,
5088 .id = MSM_FRONTEND_DAI_MULTIMEDIA1
5089 },
5090 {/* hw:x,1 */
5091 .name = MSM_DAILINK_NAME(Media2),
5092 .stream_name = "MultiMedia2",
5093 .cpu_dai_name = "MultiMedia2",
5094 .platform_name = "msm-pcm-dsp.0",
5095 .dynamic = 1,
5096 .dpcm_playback = 1,
5097 .dpcm_capture = 1,
5098 .codec_dai_name = "snd-soc-dummy-dai",
5099 .codec_name = "snd-soc-dummy",
5100 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5101 SND_SOC_DPCM_TRIGGER_POST},
5102 .ignore_suspend = 1,
5103 /* this dainlink has playback support */
5104 .ignore_pmdown_time = 1,
5105 .id = MSM_FRONTEND_DAI_MULTIMEDIA2,
5106 },
5107 {/* hw:x,2 */
5108 .name = "VoiceMMode1",
5109 .stream_name = "VoiceMMode1",
5110 .cpu_dai_name = "VoiceMMode1",
5111 .platform_name = "msm-pcm-voice",
5112 .dynamic = 1,
5113 .dpcm_playback = 1,
5114 .dpcm_capture = 1,
5115 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5116 SND_SOC_DPCM_TRIGGER_POST},
5117 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5118 .ignore_suspend = 1,
5119 .ignore_pmdown_time = 1,
5120 .codec_dai_name = "snd-soc-dummy-dai",
5121 .codec_name = "snd-soc-dummy",
5122 .id = MSM_FRONTEND_DAI_VOICEMMODE1,
5123 },
5124 {/* hw:x,3 */
5125 .name = "MSM VoIP",
5126 .stream_name = "VoIP",
5127 .cpu_dai_name = "VoIP",
5128 .platform_name = "msm-voip-dsp",
5129 .dynamic = 1,
5130 .dpcm_playback = 1,
5131 .dpcm_capture = 1,
5132 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5133 SND_SOC_DPCM_TRIGGER_POST},
5134 .codec_dai_name = "snd-soc-dummy-dai",
5135 .codec_name = "snd-soc-dummy",
5136 .ignore_suspend = 1,
5137 /* this dainlink has playback support */
5138 .ignore_pmdown_time = 1,
5139 .id = MSM_FRONTEND_DAI_VOIP,
5140 },
5141 {/* hw:x,4 */
5142 .name = MSM_DAILINK_NAME(ULL),
5143 .stream_name = "MultiMedia3",
5144 .cpu_dai_name = "MultiMedia3",
5145 .platform_name = "msm-pcm-dsp.2",
5146 .dynamic = 1,
5147 .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
5148 .dpcm_playback = 1,
5149 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5150 SND_SOC_DPCM_TRIGGER_POST},
5151 .codec_dai_name = "snd-soc-dummy-dai",
5152 .codec_name = "snd-soc-dummy",
5153 .ignore_suspend = 1,
5154 /* this dainlink has playback support */
5155 .ignore_pmdown_time = 1,
5156 .id = MSM_FRONTEND_DAI_MULTIMEDIA3,
5157 },
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]5158 {/* hw:x,5 */
5159 .name = "MSM AFE-PCM RX",
5160 .stream_name = "AFE-PROXY RX",
5161 .cpu_dai_name = "msm-dai-q6-dev.241",
5162 .codec_name = "msm-stub-codec.1",
5163 .codec_dai_name = "msm-stub-rx",
5164 .platform_name = "msm-pcm-afe",
5165 .dpcm_playback = 1,
5166 .ignore_suspend = 1,
5167 /* this dainlink has playback support */
5168 .ignore_pmdown_time = 1,
5169 },
5170 {/* hw:x,6 */
5171 .name = "MSM AFE-PCM TX",
5172 .stream_name = "AFE-PROXY TX",
5173 .cpu_dai_name = "msm-dai-q6-dev.240",
5174 .codec_name = "msm-stub-codec.1",
5175 .codec_dai_name = "msm-stub-tx",
5176 .platform_name = "msm-pcm-afe",
5177 .dpcm_capture = 1,
5178 .ignore_suspend = 1,
5179 },
5180 {/* hw:x,7 */
5181 .name = MSM_DAILINK_NAME(Compress1),
5182 .stream_name = "Compress1",
5183 .cpu_dai_name = "MultiMedia4",
5184 .platform_name = "msm-compress-dsp",
5185 .dynamic = 1,
5186 .async_ops = ASYNC_DPCM_SND_SOC_HW_PARAMS,
5187 .dpcm_playback = 1,
5188 .dpcm_capture = 1,
5189 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5190 SND_SOC_DPCM_TRIGGER_POST},
5191 .codec_dai_name = "snd-soc-dummy-dai",
5192 .codec_name = "snd-soc-dummy",
5193 .ignore_suspend = 1,
5194 .ignore_pmdown_time = 1,
5195 /* this dainlink has playback support */
5196 .id = MSM_FRONTEND_DAI_MULTIMEDIA4,
5197 },
Meng Wang197cb302019-03-01 13:54:38 +0800[diff] [blame]5198 /* Hostless PCM purpose */
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]5199 {/* hw:x,8 */
5200 .name = "AUXPCM Hostless",
5201 .stream_name = "AUXPCM Hostless",
5202 .cpu_dai_name = "AUXPCM_HOSTLESS",
5203 .platform_name = "msm-pcm-hostless",
5204 .dynamic = 1,
5205 .dpcm_playback = 1,
5206 .dpcm_capture = 1,
5207 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5208 SND_SOC_DPCM_TRIGGER_POST},
5209 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5210 .ignore_suspend = 1,
5211 /* this dainlink has playback support */
5212 .ignore_pmdown_time = 1,
5213 .codec_dai_name = "snd-soc-dummy-dai",
5214 .codec_name = "snd-soc-dummy",
5215 },
5216 {/* hw:x,9 */
5217 .name = MSM_DAILINK_NAME(LowLatency),
5218 .stream_name = "MultiMedia5",
5219 .cpu_dai_name = "MultiMedia5",
5220 .platform_name = "msm-pcm-dsp.1",
5221 .dynamic = 1,
5222 .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
5223 .dpcm_playback = 1,
5224 .dpcm_capture = 1,
5225 .codec_dai_name = "snd-soc-dummy-dai",
5226 .codec_name = "snd-soc-dummy",
5227 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5228 SND_SOC_DPCM_TRIGGER_POST},
5229 .ignore_suspend = 1,
5230 /* this dainlink has playback support */
5231 .ignore_pmdown_time = 1,
5232 .id = MSM_FRONTEND_DAI_MULTIMEDIA5,
5233 .ops = &msm_fe_qos_ops,
5234 },
5235 {/* hw:x,10 */
5236 .name = "Listen 1 Audio Service",
5237 .stream_name = "Listen 1 Audio Service",
5238 .cpu_dai_name = "LSM1",
5239 .platform_name = "msm-lsm-client",
5240 .dynamic = 1,
5241 .dpcm_capture = 1,
5242 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
5243 SND_SOC_DPCM_TRIGGER_POST },
5244 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5245 .ignore_suspend = 1,
5246 .codec_dai_name = "snd-soc-dummy-dai",
5247 .codec_name = "snd-soc-dummy",
5248 .id = MSM_FRONTEND_DAI_LSM1,
5249 },
5250 /* Multiple Tunnel instances */
5251 {/* hw:x,11 */
5252 .name = MSM_DAILINK_NAME(Compress2),
5253 .stream_name = "Compress2",
5254 .cpu_dai_name = "MultiMedia7",
5255 .platform_name = "msm-compress-dsp",
5256 .dynamic = 1,
5257 .dpcm_playback = 1,
5258 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5259 SND_SOC_DPCM_TRIGGER_POST},
5260 .codec_dai_name = "snd-soc-dummy-dai",
5261 .codec_name = "snd-soc-dummy",
5262 .ignore_suspend = 1,
5263 .ignore_pmdown_time = 1,
5264 /* this dainlink has playback support */
5265 .id = MSM_FRONTEND_DAI_MULTIMEDIA7,
5266 },
5267 {/* hw:x,12 */
5268 .name = MSM_DAILINK_NAME(MultiMedia10),
5269 .stream_name = "MultiMedia10",
5270 .cpu_dai_name = "MultiMedia10",
5271 .platform_name = "msm-pcm-dsp.1",
5272 .dynamic = 1,
5273 .dpcm_playback = 1,
5274 .dpcm_capture = 1,
5275 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5276 SND_SOC_DPCM_TRIGGER_POST},
5277 .codec_dai_name = "snd-soc-dummy-dai",
5278 .codec_name = "snd-soc-dummy",
5279 .ignore_suspend = 1,
5280 .ignore_pmdown_time = 1,
5281 /* this dainlink has playback support */
5282 .id = MSM_FRONTEND_DAI_MULTIMEDIA10,
5283 },
5284 {/* hw:x,13 */
5285 .name = MSM_DAILINK_NAME(ULL_NOIRQ),
5286 .stream_name = "MM_NOIRQ",
5287 .cpu_dai_name = "MultiMedia8",
5288 .platform_name = "msm-pcm-dsp-noirq",
5289 .dynamic = 1,
5290 .dpcm_playback = 1,
5291 .dpcm_capture = 1,
5292 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5293 SND_SOC_DPCM_TRIGGER_POST},
5294 .codec_dai_name = "snd-soc-dummy-dai",
5295 .codec_name = "snd-soc-dummy",
5296 .ignore_suspend = 1,
5297 .ignore_pmdown_time = 1,
5298 /* this dainlink has playback support */
5299 .id = MSM_FRONTEND_DAI_MULTIMEDIA8,
5300 .ops = &msm_fe_qos_ops,
5301 },
5302 /* HDMI Hostless */
5303 {/* hw:x,14 */
5304 .name = "HDMI_RX_HOSTLESS",
5305 .stream_name = "HDMI_RX_HOSTLESS",
5306 .cpu_dai_name = "HDMI_HOSTLESS",
5307 .platform_name = "msm-pcm-hostless",
5308 .dynamic = 1,
5309 .dpcm_playback = 1,
5310 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5311 SND_SOC_DPCM_TRIGGER_POST},
5312 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5313 .ignore_suspend = 1,
5314 .ignore_pmdown_time = 1,
5315 .codec_dai_name = "snd-soc-dummy-dai",
5316 .codec_name = "snd-soc-dummy",
5317 },
5318 {/* hw:x,15 */
5319 .name = "VoiceMMode2",
5320 .stream_name = "VoiceMMode2",
5321 .cpu_dai_name = "VoiceMMode2",
5322 .platform_name = "msm-pcm-voice",
5323 .dynamic = 1,
5324 .dpcm_playback = 1,
5325 .dpcm_capture = 1,
5326 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5327 SND_SOC_DPCM_TRIGGER_POST},
5328 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5329 .ignore_suspend = 1,
5330 .ignore_pmdown_time = 1,
5331 .codec_dai_name = "snd-soc-dummy-dai",
5332 .codec_name = "snd-soc-dummy",
5333 .id = MSM_FRONTEND_DAI_VOICEMMODE2,
5334 },
5335 /* LSM FE */
5336 {/* hw:x,16 */
5337 .name = "Listen 2 Audio Service",
5338 .stream_name = "Listen 2 Audio Service",
5339 .cpu_dai_name = "LSM2",
5340 .platform_name = "msm-lsm-client",
5341 .dynamic = 1,
5342 .dpcm_capture = 1,
5343 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
5344 SND_SOC_DPCM_TRIGGER_POST },
5345 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5346 .ignore_suspend = 1,
5347 .codec_dai_name = "snd-soc-dummy-dai",
5348 .codec_name = "snd-soc-dummy",
5349 .id = MSM_FRONTEND_DAI_LSM2,
5350 },
5351 {/* hw:x,17 */
5352 .name = "Listen 3 Audio Service",
5353 .stream_name = "Listen 3 Audio Service",
5354 .cpu_dai_name = "LSM3",
5355 .platform_name = "msm-lsm-client",
5356 .dynamic = 1,
5357 .dpcm_capture = 1,
5358 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
5359 SND_SOC_DPCM_TRIGGER_POST },
5360 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5361 .ignore_suspend = 1,
5362 .codec_dai_name = "snd-soc-dummy-dai",
5363 .codec_name = "snd-soc-dummy",
5364 .id = MSM_FRONTEND_DAI_LSM3,
5365 },
5366 {/* hw:x,18 */
5367 .name = "Listen 4 Audio Service",
5368 .stream_name = "Listen 4 Audio Service",
5369 .cpu_dai_name = "LSM4",
5370 .platform_name = "msm-lsm-client",
5371 .dynamic = 1,
5372 .dpcm_capture = 1,
5373 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
5374 SND_SOC_DPCM_TRIGGER_POST },
5375 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5376 .ignore_suspend = 1,
5377 .codec_dai_name = "snd-soc-dummy-dai",
5378 .codec_name = "snd-soc-dummy",
5379 .id = MSM_FRONTEND_DAI_LSM4,
5380 },
5381 {/* hw:x,19 */
5382 .name = "Listen 5 Audio Service",
5383 .stream_name = "Listen 5 Audio Service",
5384 .cpu_dai_name = "LSM5",
5385 .platform_name = "msm-lsm-client",
5386 .dynamic = 1,
5387 .dpcm_capture = 1,
5388 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
5389 SND_SOC_DPCM_TRIGGER_POST },
5390 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5391 .ignore_suspend = 1,
5392 .codec_dai_name = "snd-soc-dummy-dai",
5393 .codec_name = "snd-soc-dummy",
5394 .id = MSM_FRONTEND_DAI_LSM5,
5395 },
5396 {/* hw:x,20 */
5397 .name = "Listen 6 Audio Service",
5398 .stream_name = "Listen 6 Audio Service",
5399 .cpu_dai_name = "LSM6",
5400 .platform_name = "msm-lsm-client",
5401 .dynamic = 1,
5402 .dpcm_capture = 1,
5403 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
5404 SND_SOC_DPCM_TRIGGER_POST },
5405 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5406 .ignore_suspend = 1,
5407 .codec_dai_name = "snd-soc-dummy-dai",
5408 .codec_name = "snd-soc-dummy",
5409 .id = MSM_FRONTEND_DAI_LSM6,
5410 },
5411 {/* hw:x,21 */
5412 .name = "Listen 7 Audio Service",
5413 .stream_name = "Listen 7 Audio Service",
5414 .cpu_dai_name = "LSM7",
5415 .platform_name = "msm-lsm-client",
5416 .dynamic = 1,
5417 .dpcm_capture = 1,
5418 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
5419 SND_SOC_DPCM_TRIGGER_POST },
5420 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5421 .ignore_suspend = 1,
5422 .codec_dai_name = "snd-soc-dummy-dai",
5423 .codec_name = "snd-soc-dummy",
5424 .id = MSM_FRONTEND_DAI_LSM7,
5425 },
5426 {/* hw:x,22 */
5427 .name = "Listen 8 Audio Service",
5428 .stream_name = "Listen 8 Audio Service",
5429 .cpu_dai_name = "LSM8",
5430 .platform_name = "msm-lsm-client",
5431 .dynamic = 1,
5432 .dpcm_capture = 1,
5433 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
5434 SND_SOC_DPCM_TRIGGER_POST },
5435 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5436 .ignore_suspend = 1,
5437 .codec_dai_name = "snd-soc-dummy-dai",
5438 .codec_name = "snd-soc-dummy",
5439 .id = MSM_FRONTEND_DAI_LSM8,
5440 },
5441 {/* hw:x,23 */
5442 .name = MSM_DAILINK_NAME(Media9),
5443 .stream_name = "MultiMedia9",
5444 .cpu_dai_name = "MultiMedia9",
5445 .platform_name = "msm-pcm-dsp.0",
5446 .dynamic = 1,
5447 .dpcm_playback = 1,
5448 .dpcm_capture = 1,
5449 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5450 SND_SOC_DPCM_TRIGGER_POST},
5451 .codec_dai_name = "snd-soc-dummy-dai",
5452 .codec_name = "snd-soc-dummy",
5453 .ignore_suspend = 1,
5454 /* this dainlink has playback support */
5455 .ignore_pmdown_time = 1,
5456 .id = MSM_FRONTEND_DAI_MULTIMEDIA9,
5457 },
5458 {/* hw:x,24 */
5459 .name = MSM_DAILINK_NAME(Compress4),
5460 .stream_name = "Compress4",
5461 .cpu_dai_name = "MultiMedia11",
5462 .platform_name = "msm-compress-dsp",
5463 .dynamic = 1,
5464 .dpcm_playback = 1,
5465 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5466 SND_SOC_DPCM_TRIGGER_POST},
5467 .codec_dai_name = "snd-soc-dummy-dai",
5468 .codec_name = "snd-soc-dummy",
5469 .ignore_suspend = 1,
5470 .ignore_pmdown_time = 1,
5471 /* this dainlink has playback support */
5472 .id = MSM_FRONTEND_DAI_MULTIMEDIA11,
5473 },
5474 {/* hw:x,25 */
5475 .name = MSM_DAILINK_NAME(Compress5),
5476 .stream_name = "Compress5",
5477 .cpu_dai_name = "MultiMedia12",
5478 .platform_name = "msm-compress-dsp",
5479 .dynamic = 1,
5480 .dpcm_playback = 1,
5481 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5482 SND_SOC_DPCM_TRIGGER_POST},
5483 .codec_dai_name = "snd-soc-dummy-dai",
5484 .codec_name = "snd-soc-dummy",
5485 .ignore_suspend = 1,
5486 .ignore_pmdown_time = 1,
5487 /* this dainlink has playback support */
5488 .id = MSM_FRONTEND_DAI_MULTIMEDIA12,
5489 },
5490 {/* hw:x,26 */
5491 .name = MSM_DAILINK_NAME(Compress6),
5492 .stream_name = "Compress6",
5493 .cpu_dai_name = "MultiMedia13",
5494 .platform_name = "msm-compress-dsp",
5495 .dynamic = 1,
5496 .dpcm_playback = 1,
5497 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5498 SND_SOC_DPCM_TRIGGER_POST},
5499 .codec_dai_name = "snd-soc-dummy-dai",
5500 .codec_name = "snd-soc-dummy",
5501 .ignore_suspend = 1,
5502 .ignore_pmdown_time = 1,
5503 /* this dainlink has playback support */
5504 .id = MSM_FRONTEND_DAI_MULTIMEDIA13,
5505 },
5506 {/* hw:x,27 */
5507 .name = MSM_DAILINK_NAME(Compress7),
5508 .stream_name = "Compress7",
5509 .cpu_dai_name = "MultiMedia14",
5510 .platform_name = "msm-compress-dsp",
5511 .dynamic = 1,
5512 .dpcm_playback = 1,
5513 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5514 SND_SOC_DPCM_TRIGGER_POST},
5515 .codec_dai_name = "snd-soc-dummy-dai",
5516 .codec_name = "snd-soc-dummy",
5517 .ignore_suspend = 1,
5518 .ignore_pmdown_time = 1,
5519 /* this dainlink has playback support */
5520 .id = MSM_FRONTEND_DAI_MULTIMEDIA14,
5521 },
5522 {/* hw:x,28 */
5523 .name = MSM_DAILINK_NAME(Compress8),
5524 .stream_name = "Compress8",
5525 .cpu_dai_name = "MultiMedia15",
5526 .platform_name = "msm-compress-dsp",
5527 .dynamic = 1,
5528 .dpcm_playback = 1,
5529 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5530 SND_SOC_DPCM_TRIGGER_POST},
5531 .codec_dai_name = "snd-soc-dummy-dai",
5532 .codec_name = "snd-soc-dummy",
5533 .ignore_suspend = 1,
5534 .ignore_pmdown_time = 1,
5535 /* this dainlink has playback support */
5536 .id = MSM_FRONTEND_DAI_MULTIMEDIA15,
5537 },
5538 {/* hw:x,29 */
5539 .name = MSM_DAILINK_NAME(ULL_NOIRQ_2),
5540 .stream_name = "MM_NOIRQ_2",
5541 .cpu_dai_name = "MultiMedia16",
5542 .platform_name = "msm-pcm-dsp-noirq",
5543 .dynamic = 1,
5544 .dpcm_playback = 1,
5545 .dpcm_capture = 1,
5546 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5547 SND_SOC_DPCM_TRIGGER_POST},
5548 .codec_dai_name = "snd-soc-dummy-dai",
5549 .codec_name = "snd-soc-dummy",
5550 .ignore_suspend = 1,
5551 .ignore_pmdown_time = 1,
5552 /* this dainlink has playback support */
5553 .id = MSM_FRONTEND_DAI_MULTIMEDIA16,
5554 },
5555 {/* hw:x,30 */
5556 .name = "CDC_DMA Hostless",
5557 .stream_name = "CDC_DMA Hostless",
5558 .cpu_dai_name = "CDC_DMA_HOSTLESS",
5559 .platform_name = "msm-pcm-hostless",
5560 .dynamic = 1,
5561 .dpcm_playback = 1,
5562 .dpcm_capture = 1,
5563 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5564 SND_SOC_DPCM_TRIGGER_POST},
5565 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5566 .ignore_suspend = 1,
5567 /* this dailink has playback support */
5568 .ignore_pmdown_time = 1,
5569 .codec_dai_name = "snd-soc-dummy-dai",
5570 .codec_name = "snd-soc-dummy",
5571 },
5572 {/* hw:x,31 */
5573 .name = "TX3_CDC_DMA Hostless",
5574 .stream_name = "TX3_CDC_DMA Hostless",
5575 .cpu_dai_name = "TX3_CDC_DMA_HOSTLESS",
5576 .platform_name = "msm-pcm-hostless",
5577 .dynamic = 1,
5578 .dpcm_capture = 1,
5579 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5580 SND_SOC_DPCM_TRIGGER_POST},
5581 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5582 .ignore_suspend = 1,
5583 .codec_dai_name = "snd-soc-dummy-dai",
5584 .codec_name = "snd-soc-dummy",
5585 },
Karthikeyan Manif0de7562019-03-04 16:39:41 -0800[diff] [blame]5586 {/* hw:x,32 */
5587 .name = "Tertiary MI2S TX_Hostless",
5588 .stream_name = "Tertiary MI2S_TX Hostless Capture",
5589 .cpu_dai_name = "TERT_MI2S_TX_HOSTLESS",
5590 .platform_name = "msm-pcm-hostless",
5591 .dynamic = 1,
5592 .dpcm_capture = 1,
5593 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5594 SND_SOC_DPCM_TRIGGER_POST},
5595 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5596 .ignore_suspend = 1,
5597 .ignore_pmdown_time = 1,
5598 .codec_dai_name = "snd-soc-dummy-dai",
5599 .codec_name = "snd-soc-dummy",
5600 },
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]5601};
5602
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]5603static struct snd_soc_dai_link msm_bolero_fe_dai_links[] = {
Karthikeyan Manif0de7562019-03-04 16:39:41 -0800[diff] [blame]5604 {/* hw:x,33 */
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]5605 .name = LPASS_BE_WSA_CDC_DMA_TX_0,
5606 .stream_name = "WSA CDC DMA0 Capture",
5607 .cpu_dai_name = "msm-dai-cdc-dma-dev.45057",
5608 .platform_name = "msm-pcm-hostless",
5609 .codec_name = "bolero_codec",
5610 .codec_dai_name = "wsa_macro_vifeedback",
5611 .id = MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0,
5612 .be_hw_params_fixup = msm_be_hw_params_fixup,
5613 .ignore_suspend = 1,
5614 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5615 .ops = &msm_cdc_dma_be_ops,
5616 },
5617};
5618
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]5619static struct snd_soc_dai_link msm_common_misc_fe_dai_links[] = {
Karthikeyan Manif0de7562019-03-04 16:39:41 -0800[diff] [blame]5620 {/* hw:x,34 */
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]5621 .name = MSM_DAILINK_NAME(ASM Loopback),
5622 .stream_name = "MultiMedia6",
5623 .cpu_dai_name = "MultiMedia6",
5624 .platform_name = "msm-pcm-loopback",
5625 .dynamic = 1,
5626 .dpcm_playback = 1,
5627 .dpcm_capture = 1,
5628 .codec_dai_name = "snd-soc-dummy-dai",
5629 .codec_name = "snd-soc-dummy",
5630 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5631 SND_SOC_DPCM_TRIGGER_POST},
5632 .ignore_suspend = 1,
5633 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5634 .ignore_pmdown_time = 1,
5635 .id = MSM_FRONTEND_DAI_MULTIMEDIA6,
5636 },
Karthikeyan Manif0de7562019-03-04 16:39:41 -0800[diff] [blame]5637 {/* hw:x,35 */
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]5638 .name = "USB Audio Hostless",
5639 .stream_name = "USB Audio Hostless",
5640 .cpu_dai_name = "USBAUDIO_HOSTLESS",
5641 .platform_name = "msm-pcm-hostless",
5642 .dynamic = 1,
5643 .dpcm_playback = 1,
5644 .dpcm_capture = 1,
5645 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5646 SND_SOC_DPCM_TRIGGER_POST},
5647 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5648 .ignore_suspend = 1,
5649 .ignore_pmdown_time = 1,
5650 .codec_dai_name = "snd-soc-dummy-dai",
5651 .codec_name = "snd-soc-dummy",
5652 },
Karthikeyan Manif0de7562019-03-04 16:39:41 -0800[diff] [blame]5653 {/* hw:x,36 */
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]5654 .name = "SLIMBUS_7 Hostless",
5655 .stream_name = "SLIMBUS_7 Hostless",
5656 .cpu_dai_name = "SLIMBUS7_HOSTLESS",
5657 .platform_name = "msm-pcm-hostless",
5658 .dynamic = 1,
5659 .dpcm_capture = 1,
5660 .dpcm_playback = 1,
5661 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5662 SND_SOC_DPCM_TRIGGER_POST},
5663 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5664 .ignore_suspend = 1,
5665 .ignore_pmdown_time = 1,
5666 .codec_dai_name = "snd-soc-dummy-dai",
5667 .codec_name = "snd-soc-dummy",
5668 },
Karthikeyan Manif0de7562019-03-04 16:39:41 -0800[diff] [blame]5669 {/* hw:x,37 */
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]5670 .name = "Compress Capture",
5671 .stream_name = "Compress9",
5672 .cpu_dai_name = "MultiMedia17",
5673 .platform_name = "msm-compress-dsp",
5674 .dynamic = 1,
5675 .dpcm_capture = 1,
5676 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5677 SND_SOC_DPCM_TRIGGER_POST},
5678 .codec_dai_name = "snd-soc-dummy-dai",
5679 .codec_name = "snd-soc-dummy",
5680 .ignore_suspend = 1,
5681 .ignore_pmdown_time = 1,
5682 .id = MSM_FRONTEND_DAI_MULTIMEDIA17,
5683 },
Vatsal Bucha82b30ba2019-04-17 12:43:54 +0530[diff] [blame]5684 {/* hw:x,38 */
5685 .name = "SLIMBUS_8 Hostless",
5686 .stream_name = "SLIMBUS_8 Hostless",
5687 .cpu_dai_name = "SLIMBUS8_HOSTLESS",
5688 .platform_name = "msm-pcm-hostless",
5689 .dynamic = 1,
5690 .dpcm_capture = 1,
5691 .dpcm_playback = 1,
5692 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5693 SND_SOC_DPCM_TRIGGER_POST},
5694 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5695 .ignore_suspend = 1,
5696 .ignore_pmdown_time = 1,
5697 .codec_dai_name = "snd-soc-dummy-dai",
5698 .codec_name = "snd-soc-dummy",
5699 },
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]5700};
5701
5702static struct snd_soc_dai_link msm_common_be_dai_links[] = {
5703 /* Backend AFE DAI Links */
5704 {
5705 .name = LPASS_BE_AFE_PCM_RX,
5706 .stream_name = "AFE Playback",
5707 .cpu_dai_name = "msm-dai-q6-dev.224",
5708 .platform_name = "msm-pcm-routing",
5709 .codec_name = "msm-stub-codec.1",
5710 .codec_dai_name = "msm-stub-rx",
5711 .no_pcm = 1,
5712 .dpcm_playback = 1,
5713 .id = MSM_BACKEND_DAI_AFE_PCM_RX,
5714 .be_hw_params_fixup = msm_be_hw_params_fixup,
5715 /* this dainlink has playback support */
5716 .ignore_pmdown_time = 1,
5717 .ignore_suspend = 1,
5718 },
5719 {
5720 .name = LPASS_BE_AFE_PCM_TX,
5721 .stream_name = "AFE Capture",
5722 .cpu_dai_name = "msm-dai-q6-dev.225",
5723 .platform_name = "msm-pcm-routing",
5724 .codec_name = "msm-stub-codec.1",
5725 .codec_dai_name = "msm-stub-tx",
5726 .no_pcm = 1,
5727 .dpcm_capture = 1,
5728 .id = MSM_BACKEND_DAI_AFE_PCM_TX,
5729 .be_hw_params_fixup = msm_be_hw_params_fixup,
5730 .ignore_suspend = 1,
5731 },
5732 /* Incall Record Uplink BACK END DAI Link */
5733 {
5734 .name = LPASS_BE_INCALL_RECORD_TX,
5735 .stream_name = "Voice Uplink Capture",
5736 .cpu_dai_name = "msm-dai-q6-dev.32772",
5737 .platform_name = "msm-pcm-routing",
5738 .codec_name = "msm-stub-codec.1",
5739 .codec_dai_name = "msm-stub-tx",
5740 .no_pcm = 1,
5741 .dpcm_capture = 1,
5742 .id = MSM_BACKEND_DAI_INCALL_RECORD_TX,
5743 .be_hw_params_fixup = msm_be_hw_params_fixup,
5744 .ignore_suspend = 1,
5745 },
5746 /* Incall Record Downlink BACK END DAI Link */
5747 {
5748 .name = LPASS_BE_INCALL_RECORD_RX,
5749 .stream_name = "Voice Downlink Capture",
5750 .cpu_dai_name = "msm-dai-q6-dev.32771",
5751 .platform_name = "msm-pcm-routing",
5752 .codec_name = "msm-stub-codec.1",
5753 .codec_dai_name = "msm-stub-tx",
5754 .no_pcm = 1,
5755 .dpcm_capture = 1,
5756 .id = MSM_BACKEND_DAI_INCALL_RECORD_RX,
5757 .be_hw_params_fixup = msm_be_hw_params_fixup,
5758 .ignore_suspend = 1,
5759 },
5760 /* Incall Music BACK END DAI Link */
5761 {
5762 .name = LPASS_BE_VOICE_PLAYBACK_TX,
5763 .stream_name = "Voice Farend Playback",
5764 .cpu_dai_name = "msm-dai-q6-dev.32773",
5765 .platform_name = "msm-pcm-routing",
5766 .codec_name = "msm-stub-codec.1",
5767 .codec_dai_name = "msm-stub-rx",
5768 .no_pcm = 1,
5769 .dpcm_playback = 1,
5770 .id = MSM_BACKEND_DAI_VOICE_PLAYBACK_TX,
5771 .be_hw_params_fixup = msm_be_hw_params_fixup,
5772 .ignore_suspend = 1,
5773 .ignore_pmdown_time = 1,
5774 },
5775 /* Incall Music 2 BACK END DAI Link */
5776 {
5777 .name = LPASS_BE_VOICE2_PLAYBACK_TX,
5778 .stream_name = "Voice2 Farend Playback",
5779 .cpu_dai_name = "msm-dai-q6-dev.32770",
5780 .platform_name = "msm-pcm-routing",
5781 .codec_name = "msm-stub-codec.1",
5782 .codec_dai_name = "msm-stub-rx",
5783 .no_pcm = 1,
5784 .dpcm_playback = 1,
5785 .id = MSM_BACKEND_DAI_VOICE2_PLAYBACK_TX,
5786 .be_hw_params_fixup = msm_be_hw_params_fixup,
5787 .ignore_suspend = 1,
5788 .ignore_pmdown_time = 1,
5789 },
5790 {
5791 .name = LPASS_BE_USB_AUDIO_RX,
5792 .stream_name = "USB Audio Playback",
5793 .cpu_dai_name = "msm-dai-q6-dev.28672",
5794 .platform_name = "msm-pcm-routing",
5795 .codec_name = "msm-stub-codec.1",
5796 .codec_dai_name = "msm-stub-rx",
5797 .no_pcm = 1,
5798 .dpcm_playback = 1,
5799 .id = MSM_BACKEND_DAI_USB_RX,
5800 .be_hw_params_fixup = msm_be_hw_params_fixup,
5801 .ignore_pmdown_time = 1,
5802 .ignore_suspend = 1,
5803 },
5804 {
5805 .name = LPASS_BE_USB_AUDIO_TX,
5806 .stream_name = "USB Audio Capture",
5807 .cpu_dai_name = "msm-dai-q6-dev.28673",
5808 .platform_name = "msm-pcm-routing",
5809 .codec_name = "msm-stub-codec.1",
5810 .codec_dai_name = "msm-stub-tx",
5811 .no_pcm = 1,
5812 .dpcm_capture = 1,
5813 .id = MSM_BACKEND_DAI_USB_TX,
5814 .be_hw_params_fixup = msm_be_hw_params_fixup,
5815 .ignore_suspend = 1,
5816 },
5817 {
5818 .name = LPASS_BE_PRI_TDM_RX_0,
5819 .stream_name = "Primary TDM0 Playback",
5820 .cpu_dai_name = "msm-dai-q6-tdm.36864",
5821 .platform_name = "msm-pcm-routing",
5822 .codec_name = "msm-stub-codec.1",
5823 .codec_dai_name = "msm-stub-rx",
5824 .no_pcm = 1,
5825 .dpcm_playback = 1,
5826 .id = MSM_BACKEND_DAI_PRI_TDM_RX_0,
5827 .be_hw_params_fixup = msm_be_hw_params_fixup,
5828 .ops = &kona_tdm_be_ops,
5829 .ignore_suspend = 1,
5830 .ignore_pmdown_time = 1,
5831 },
5832 {
5833 .name = LPASS_BE_PRI_TDM_TX_0,
5834 .stream_name = "Primary TDM0 Capture",
5835 .cpu_dai_name = "msm-dai-q6-tdm.36865",
5836 .platform_name = "msm-pcm-routing",
5837 .codec_name = "msm-stub-codec.1",
5838 .codec_dai_name = "msm-stub-tx",
5839 .no_pcm = 1,
5840 .dpcm_capture = 1,
5841 .id = MSM_BACKEND_DAI_PRI_TDM_TX_0,
5842 .be_hw_params_fixup = msm_be_hw_params_fixup,
5843 .ops = &kona_tdm_be_ops,
5844 .ignore_suspend = 1,
5845 },
5846 {
5847 .name = LPASS_BE_SEC_TDM_RX_0,
5848 .stream_name = "Secondary TDM0 Playback",
5849 .cpu_dai_name = "msm-dai-q6-tdm.36880",
5850 .platform_name = "msm-pcm-routing",
5851 .codec_name = "msm-stub-codec.1",
5852 .codec_dai_name = "msm-stub-rx",
5853 .no_pcm = 1,
5854 .dpcm_playback = 1,
5855 .id = MSM_BACKEND_DAI_SEC_TDM_RX_0,
5856 .be_hw_params_fixup = msm_be_hw_params_fixup,
5857 .ops = &kona_tdm_be_ops,
5858 .ignore_suspend = 1,
5859 .ignore_pmdown_time = 1,
5860 },
5861 {
5862 .name = LPASS_BE_SEC_TDM_TX_0,
5863 .stream_name = "Secondary TDM0 Capture",
5864 .cpu_dai_name = "msm-dai-q6-tdm.36881",
5865 .platform_name = "msm-pcm-routing",
5866 .codec_name = "msm-stub-codec.1",
5867 .codec_dai_name = "msm-stub-tx",
5868 .no_pcm = 1,
5869 .dpcm_capture = 1,
5870 .id = MSM_BACKEND_DAI_SEC_TDM_TX_0,
5871 .be_hw_params_fixup = msm_be_hw_params_fixup,
5872 .ops = &kona_tdm_be_ops,
5873 .ignore_suspend = 1,
5874 },
5875 {
5876 .name = LPASS_BE_TERT_TDM_RX_0,
5877 .stream_name = "Tertiary TDM0 Playback",
5878 .cpu_dai_name = "msm-dai-q6-tdm.36896",
5879 .platform_name = "msm-pcm-routing",
5880 .codec_name = "msm-stub-codec.1",
5881 .codec_dai_name = "msm-stub-rx",
5882 .no_pcm = 1,
5883 .dpcm_playback = 1,
5884 .id = MSM_BACKEND_DAI_TERT_TDM_RX_0,
5885 .be_hw_params_fixup = msm_be_hw_params_fixup,
5886 .ops = &kona_tdm_be_ops,
5887 .ignore_suspend = 1,
5888 .ignore_pmdown_time = 1,
5889 },
5890 {
5891 .name = LPASS_BE_TERT_TDM_TX_0,
5892 .stream_name = "Tertiary TDM0 Capture",
5893 .cpu_dai_name = "msm-dai-q6-tdm.36897",
5894 .platform_name = "msm-pcm-routing",
5895 .codec_name = "msm-stub-codec.1",
5896 .codec_dai_name = "msm-stub-tx",
5897 .no_pcm = 1,
5898 .dpcm_capture = 1,
5899 .id = MSM_BACKEND_DAI_TERT_TDM_TX_0,
5900 .be_hw_params_fixup = msm_be_hw_params_fixup,
5901 .ops = &kona_tdm_be_ops,
5902 .ignore_suspend = 1,
5903 },
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame^]5904 {
5905 .name = LPASS_BE_QUAT_TDM_RX_0,
5906 .stream_name = "Quaternary TDM0 Playback",
5907 .cpu_dai_name = "msm-dai-q6-tdm.36912",
5908 .platform_name = "msm-pcm-routing",
5909 .codec_name = "msm-stub-codec.1",
5910 .codec_dai_name = "msm-stub-rx",
5911 .no_pcm = 1,
5912 .dpcm_playback = 1,
5913 .id = MSM_BACKEND_DAI_QUAT_TDM_RX_0,
5914 .be_hw_params_fixup = msm_be_hw_params_fixup,
5915 .ops = &kona_tdm_be_ops,
5916 .ignore_suspend = 1,
5917 .ignore_pmdown_time = 1,
5918 },
5919 {
5920 .name = LPASS_BE_QUAT_TDM_TX_0,
5921 .stream_name = "Quaternary TDM0 Capture",
5922 .cpu_dai_name = "msm-dai-q6-tdm.36913",
5923 .platform_name = "msm-pcm-routing",
5924 .codec_name = "msm-stub-codec.1",
5925 .codec_dai_name = "msm-stub-tx",
5926 .no_pcm = 1,
5927 .dpcm_capture = 1,
5928 .id = MSM_BACKEND_DAI_QUAT_TDM_TX_0,
5929 .be_hw_params_fixup = msm_be_hw_params_fixup,
5930 .ops = &kona_tdm_be_ops,
5931 .ignore_suspend = 1,
5932 },
5933 {
5934 .name = LPASS_BE_QUIN_TDM_RX_0,
5935 .stream_name = "Quinary TDM0 Playback",
5936 .cpu_dai_name = "msm-dai-q6-tdm.36928",
5937 .platform_name = "msm-pcm-routing",
5938 .codec_name = "msm-stub-codec.1",
5939 .codec_dai_name = "msm-stub-rx",
5940 .no_pcm = 1,
5941 .dpcm_playback = 1,
5942 .id = MSM_BACKEND_DAI_QUIN_TDM_RX_0,
5943 .be_hw_params_fixup = msm_be_hw_params_fixup,
5944 .ops = &kona_tdm_be_ops,
5945 .ignore_suspend = 1,
5946 .ignore_pmdown_time = 1,
5947 },
5948 {
5949 .name = LPASS_BE_QUIN_TDM_TX_0,
5950 .stream_name = "Quinary TDM0 Capture",
5951 .cpu_dai_name = "msm-dai-q6-tdm.36929",
5952 .platform_name = "msm-pcm-routing",
5953 .codec_name = "msm-stub-codec.1",
5954 .codec_dai_name = "msm-stub-tx",
5955 .no_pcm = 1,
5956 .dpcm_capture = 1,
5957 .id = MSM_BACKEND_DAI_QUIN_TDM_TX_0,
5958 .be_hw_params_fixup = msm_be_hw_params_fixup,
5959 .ops = &kona_tdm_be_ops,
5960 .ignore_suspend = 1,
5961 },
5962 {
5963 .name = LPASS_BE_SEN_TDM_RX_0,
5964 .stream_name = "Senary TDM0 Playback",
5965 .cpu_dai_name = "msm-dai-q6-tdm.36944",
5966 .platform_name = "msm-pcm-routing",
5967 .codec_name = "msm-stub-codec.1",
5968 .codec_dai_name = "msm-stub-rx",
5969 .no_pcm = 1,
5970 .dpcm_playback = 1,
5971 .id = MSM_BACKEND_DAI_SEN_TDM_RX_0,
5972 .be_hw_params_fixup = msm_be_hw_params_fixup,
5973 .ops = &kona_tdm_be_ops,
5974 .ignore_suspend = 1,
5975 .ignore_pmdown_time = 1,
5976 },
5977 {
5978 .name = LPASS_BE_SEN_TDM_TX_0,
5979 .stream_name = "Senary TDM0 Capture",
5980 .cpu_dai_name = "msm-dai-q6-tdm.36945",
5981 .platform_name = "msm-pcm-routing",
5982 .codec_name = "msm-stub-codec.1",
5983 .codec_dai_name = "msm-stub-tx",
5984 .no_pcm = 1,
5985 .dpcm_capture = 1,
5986 .id = MSM_BACKEND_DAI_SEN_TDM_TX_0,
5987 .be_hw_params_fixup = msm_be_hw_params_fixup,
5988 .ops = &kona_tdm_be_ops,
5989 .ignore_suspend = 1,
5990 },
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]5991};
5992
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]5993static struct snd_soc_dai_link msm_wcn_be_dai_links[] = {
5994 {
5995 .name = LPASS_BE_SLIMBUS_7_RX,
5996 .stream_name = "Slimbus7 Playback",
5997 .cpu_dai_name = "msm-dai-q6-dev.16398",
5998 .platform_name = "msm-pcm-routing",
5999 .codec_name = "btfmslim_slave",
6000 /* BT codec driver determines capabilities based on
6001 * dai name, bt codecdai name should always contains
6002 * supported usecase information
6003 */
6004 .codec_dai_name = "btfm_bt_sco_a2dp_slim_rx",
6005 .no_pcm = 1,
6006 .dpcm_playback = 1,
6007 .id = MSM_BACKEND_DAI_SLIMBUS_7_RX,
6008 .be_hw_params_fixup = msm_be_hw_params_fixup,
6009 .init = &msm_wcn_init,
6010 .ops = &msm_wcn_ops,
6011 /* dai link has playback support */
6012 .ignore_pmdown_time = 1,
6013 .ignore_suspend = 1,
6014 },
6015 {
6016 .name = LPASS_BE_SLIMBUS_7_TX,
6017 .stream_name = "Slimbus7 Capture",
6018 .cpu_dai_name = "msm-dai-q6-dev.16399",
6019 .platform_name = "msm-pcm-routing",
6020 .codec_name = "btfmslim_slave",
6021 .codec_dai_name = "btfm_bt_sco_slim_tx",
6022 .no_pcm = 1,
6023 .dpcm_capture = 1,
6024 .id = MSM_BACKEND_DAI_SLIMBUS_7_TX,
6025 .be_hw_params_fixup = msm_be_hw_params_fixup,
6026 .ops = &msm_wcn_ops,
6027 .ignore_suspend = 1,
6028 },
6029};
6030
Vatsal Bucha82b30ba2019-04-17 12:43:54 +0530[diff] [blame]6031static struct snd_soc_dai_link msm_wcn_btfm_be_dai_links[] = {
6032 {
6033 .name = LPASS_BE_SLIMBUS_7_RX,
6034 .stream_name = "Slimbus7 Playback",
6035 .cpu_dai_name = "msm-dai-q6-dev.16398",
6036 .platform_name = "msm-pcm-routing",
6037 .codec_name = "btfmslim_slave",
6038 /* BT codec driver determines capabilities based on
6039 * dai name, bt codecdai name should always contains
6040 * supported usecase information
6041 */
6042 .codec_dai_name = "btfm_bt_sco_a2dp_slim_rx",
6043 .no_pcm = 1,
6044 .dpcm_playback = 1,
6045 .id = MSM_BACKEND_DAI_SLIMBUS_7_RX,
6046 .be_hw_params_fixup = msm_be_hw_params_fixup,
6047 .init = &msm_wcn_init_lito,
6048 .ops = &msm_wcn_ops_lito,
6049 /* dai link has playback support */
6050 .ignore_pmdown_time = 1,
6051 .ignore_suspend = 1,
6052 },
6053 {
6054 .name = LPASS_BE_SLIMBUS_7_TX,
6055 .stream_name = "Slimbus7 Capture",
6056 .cpu_dai_name = "msm-dai-q6-dev.16399",
6057 .platform_name = "msm-pcm-routing",
6058 .codec_name = "btfmslim_slave",
6059 .codec_dai_name = "btfm_bt_sco_slim_tx",
6060 .no_pcm = 1,
6061 .dpcm_capture = 1,
6062 .id = MSM_BACKEND_DAI_SLIMBUS_7_TX,
6063 .be_hw_params_fixup = msm_be_hw_params_fixup,
6064 .ops = &msm_wcn_ops_lito,
6065 .ignore_suspend = 1,
6066 },
6067 {
6068 .name = LPASS_BE_SLIMBUS_8_TX,
6069 .stream_name = "Slimbus8 Capture",
6070 .cpu_dai_name = "msm-dai-q6-dev.16401",
6071 .platform_name = "msm-pcm-routing",
6072 .codec_name = "btfmslim_slave",
6073 .codec_dai_name = "btfm_fm_slim_tx",
6074 .no_pcm = 1,
6075 .dpcm_capture = 1,
6076 .id = MSM_BACKEND_DAI_SLIMBUS_8_TX,
6077 .be_hw_params_fixup = msm_be_hw_params_fixup,
6078 .ops = &msm_wcn_ops_lito,
6079 .ignore_suspend = 1,
6080 },
6081};
6082
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]6083static struct snd_soc_dai_link ext_disp_be_dai_link[] = {
6084 /* DISP PORT BACK END DAI Link */
6085 {
6086 .name = LPASS_BE_DISPLAY_PORT,
6087 .stream_name = "Display Port Playback",
6088 .cpu_dai_name = "msm-dai-q6-dp.24608",
6089 .platform_name = "msm-pcm-routing",
6090 .codec_name = "msm-ext-disp-audio-codec-rx",
6091 .codec_dai_name = "msm_dp_audio_codec_rx_dai",
6092 .no_pcm = 1,
6093 .dpcm_playback = 1,
6094 .id = MSM_BACKEND_DAI_DISPLAY_PORT_RX,
6095 .be_hw_params_fixup = msm_be_hw_params_fixup,
6096 .ignore_pmdown_time = 1,
6097 .ignore_suspend = 1,
6098 },
6099 /* DISP PORT 1 BACK END DAI Link */
6100 {
6101 .name = LPASS_BE_DISPLAY_PORT1,
6102 .stream_name = "Display Port1 Playback",
6103 .cpu_dai_name = "msm-dai-q6-dp.24608",
6104 .platform_name = "msm-pcm-routing",
6105 .codec_name = "msm-ext-disp-audio-codec-rx",
6106 .codec_dai_name = "msm_dp_audio_codec_rx1_dai",
6107 .no_pcm = 1,
6108 .dpcm_playback = 1,
6109 .id = MSM_BACKEND_DAI_DISPLAY_PORT_RX_1,
6110 .be_hw_params_fixup = msm_be_hw_params_fixup,
6111 .ignore_pmdown_time = 1,
6112 .ignore_suspend = 1,
6113 },
6114};
6115
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]6116static struct snd_soc_dai_link msm_mi2s_be_dai_links[] = {
6117 {
6118 .name = LPASS_BE_PRI_MI2S_RX,
6119 .stream_name = "Primary MI2S Playback",
6120 .cpu_dai_name = "msm-dai-q6-mi2s.0",
6121 .platform_name = "msm-pcm-routing",
6122 .codec_name = "msm-stub-codec.1",
6123 .codec_dai_name = "msm-stub-rx",
6124 .no_pcm = 1,
6125 .dpcm_playback = 1,
6126 .id = MSM_BACKEND_DAI_PRI_MI2S_RX,
6127 .be_hw_params_fixup = msm_be_hw_params_fixup,
6128 .ops = &msm_mi2s_be_ops,
6129 .ignore_suspend = 1,
6130 .ignore_pmdown_time = 1,
6131 },
6132 {
6133 .name = LPASS_BE_PRI_MI2S_TX,
6134 .stream_name = "Primary MI2S Capture",
6135 .cpu_dai_name = "msm-dai-q6-mi2s.0",
6136 .platform_name = "msm-pcm-routing",
6137 .codec_name = "msm-stub-codec.1",
6138 .codec_dai_name = "msm-stub-tx",
6139 .no_pcm = 1,
6140 .dpcm_capture = 1,
6141 .id = MSM_BACKEND_DAI_PRI_MI2S_TX,
6142 .be_hw_params_fixup = msm_be_hw_params_fixup,
6143 .ops = &msm_mi2s_be_ops,
6144 .ignore_suspend = 1,
6145 },
6146 {
6147 .name = LPASS_BE_SEC_MI2S_RX,
6148 .stream_name = "Secondary MI2S Playback",
6149 .cpu_dai_name = "msm-dai-q6-mi2s.1",
6150 .platform_name = "msm-pcm-routing",
6151 .codec_name = "msm-stub-codec.1",
6152 .codec_dai_name = "msm-stub-rx",
6153 .no_pcm = 1,
6154 .dpcm_playback = 1,
6155 .id = MSM_BACKEND_DAI_SECONDARY_MI2S_RX,
6156 .be_hw_params_fixup = msm_be_hw_params_fixup,
6157 .ops = &msm_mi2s_be_ops,
6158 .ignore_suspend = 1,
6159 .ignore_pmdown_time = 1,
6160 },
6161 {
6162 .name = LPASS_BE_SEC_MI2S_TX,
6163 .stream_name = "Secondary MI2S Capture",
6164 .cpu_dai_name = "msm-dai-q6-mi2s.1",
6165 .platform_name = "msm-pcm-routing",
6166 .codec_name = "msm-stub-codec.1",
6167 .codec_dai_name = "msm-stub-tx",
6168 .no_pcm = 1,
6169 .dpcm_capture = 1,
6170 .id = MSM_BACKEND_DAI_SECONDARY_MI2S_TX,
6171 .be_hw_params_fixup = msm_be_hw_params_fixup,
6172 .ops = &msm_mi2s_be_ops,
6173 .ignore_suspend = 1,
6174 },
6175 {
6176 .name = LPASS_BE_TERT_MI2S_RX,
6177 .stream_name = "Tertiary MI2S Playback",
6178 .cpu_dai_name = "msm-dai-q6-mi2s.2",
6179 .platform_name = "msm-pcm-routing",
6180 .codec_name = "msm-stub-codec.1",
6181 .codec_dai_name = "msm-stub-rx",
6182 .no_pcm = 1,
6183 .dpcm_playback = 1,
6184 .id = MSM_BACKEND_DAI_TERTIARY_MI2S_RX,
6185 .be_hw_params_fixup = msm_be_hw_params_fixup,
6186 .ops = &msm_mi2s_be_ops,
6187 .ignore_suspend = 1,
6188 .ignore_pmdown_time = 1,
6189 },
6190 {
6191 .name = LPASS_BE_TERT_MI2S_TX,
6192 .stream_name = "Tertiary MI2S Capture",
6193 .cpu_dai_name = "msm-dai-q6-mi2s.2",
6194 .platform_name = "msm-pcm-routing",
6195 .codec_name = "msm-stub-codec.1",
6196 .codec_dai_name = "msm-stub-tx",
6197 .no_pcm = 1,
6198 .dpcm_capture = 1,
6199 .id = MSM_BACKEND_DAI_TERTIARY_MI2S_TX,
6200 .be_hw_params_fixup = msm_be_hw_params_fixup,
6201 .ops = &msm_mi2s_be_ops,
6202 .ignore_suspend = 1,
6203 },
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame^]6204 {
6205 .name = LPASS_BE_QUAT_MI2S_RX,
6206 .stream_name = "Quaternary MI2S Playback",
6207 .cpu_dai_name = "msm-dai-q6-mi2s.3",
6208 .platform_name = "msm-pcm-routing",
6209 .codec_name = "msm-stub-codec.1",
6210 .codec_dai_name = "msm-stub-rx",
6211 .no_pcm = 1,
6212 .dpcm_playback = 1,
6213 .id = MSM_BACKEND_DAI_QUATERNARY_MI2S_RX,
6214 .be_hw_params_fixup = msm_be_hw_params_fixup,
6215 .ops = &msm_mi2s_be_ops,
6216 .ignore_suspend = 1,
6217 .ignore_pmdown_time = 1,
6218 },
6219 {
6220 .name = LPASS_BE_QUAT_MI2S_TX,
6221 .stream_name = "Quaternary MI2S Capture",
6222 .cpu_dai_name = "msm-dai-q6-mi2s.3",
6223 .platform_name = "msm-pcm-routing",
6224 .codec_name = "msm-stub-codec.1",
6225 .codec_dai_name = "msm-stub-tx",
6226 .no_pcm = 1,
6227 .dpcm_capture = 1,
6228 .id = MSM_BACKEND_DAI_QUATERNARY_MI2S_TX,
6229 .be_hw_params_fixup = msm_be_hw_params_fixup,
6230 .ops = &msm_mi2s_be_ops,
6231 .ignore_suspend = 1,
6232 },
6233 {
6234 .name = LPASS_BE_QUIN_MI2S_RX,
6235 .stream_name = "Quinary MI2S Playback",
6236 .cpu_dai_name = "msm-dai-q6-mi2s.4",
6237 .platform_name = "msm-pcm-routing",
6238 .codec_name = "msm-stub-codec.1",
6239 .codec_dai_name = "msm-stub-rx",
6240 .no_pcm = 1,
6241 .dpcm_playback = 1,
6242 .id = MSM_BACKEND_DAI_QUINARY_MI2S_RX,
6243 .be_hw_params_fixup = msm_be_hw_params_fixup,
6244 .ops = &msm_mi2s_be_ops,
6245 .ignore_suspend = 1,
6246 .ignore_pmdown_time = 1,
6247 },
6248 {
6249 .name = LPASS_BE_QUIN_MI2S_TX,
6250 .stream_name = "Quinary MI2S Capture",
6251 .cpu_dai_name = "msm-dai-q6-mi2s.4",
6252 .platform_name = "msm-pcm-routing",
6253 .codec_name = "msm-stub-codec.1",
6254 .codec_dai_name = "msm-stub-tx",
6255 .no_pcm = 1,
6256 .dpcm_capture = 1,
6257 .id = MSM_BACKEND_DAI_QUINARY_MI2S_TX,
6258 .be_hw_params_fixup = msm_be_hw_params_fixup,
6259 .ops = &msm_mi2s_be_ops,
6260 .ignore_suspend = 1,
6261 },
6262 {
6263 .name = LPASS_BE_SENARY_MI2S_RX,
6264 .stream_name = "Senary MI2S Playback",
6265 .cpu_dai_name = "msm-dai-q6-mi2s.5",
6266 .platform_name = "msm-pcm-routing",
6267 .codec_name = "msm-stub-codec.1",
6268 .codec_dai_name = "msm-stub-rx",
6269 .no_pcm = 1,
6270 .dpcm_playback = 1,
6271 .id = MSM_BACKEND_DAI_SENARY_MI2S_RX,
6272 .be_hw_params_fixup = msm_be_hw_params_fixup,
6273 .ops = &msm_mi2s_be_ops,
6274 .ignore_suspend = 1,
6275 .ignore_pmdown_time = 1,
6276 },
6277 {
6278 .name = LPASS_BE_SENARY_MI2S_TX,
6279 .stream_name = "Senary MI2S Capture",
6280 .cpu_dai_name = "msm-dai-q6-mi2s.5",
6281 .platform_name = "msm-pcm-routing",
6282 .codec_name = "msm-stub-codec.1",
6283 .codec_dai_name = "msm-stub-tx",
6284 .no_pcm = 1,
6285 .dpcm_capture = 1,
6286 .id = MSM_BACKEND_DAI_SENARY_MI2S_TX,
6287 .be_hw_params_fixup = msm_be_hw_params_fixup,
6288 .ops = &msm_mi2s_be_ops,
6289 .ignore_suspend = 1,
6290 },
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]6291};
6292
6293static struct snd_soc_dai_link msm_auxpcm_be_dai_links[] = {
6294 /* Primary AUX PCM Backend DAI Links */
6295 {
6296 .name = LPASS_BE_AUXPCM_RX,
6297 .stream_name = "AUX PCM Playback",
6298 .cpu_dai_name = "msm-dai-q6-auxpcm.1",
6299 .platform_name = "msm-pcm-routing",
6300 .codec_name = "msm-stub-codec.1",
6301 .codec_dai_name = "msm-stub-rx",
6302 .no_pcm = 1,
6303 .dpcm_playback = 1,
6304 .id = MSM_BACKEND_DAI_AUXPCM_RX,
6305 .be_hw_params_fixup = msm_be_hw_params_fixup,
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame^]6306 .ops = &kona_aux_be_ops,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]6307 .ignore_pmdown_time = 1,
6308 .ignore_suspend = 1,
6309 },
6310 {
6311 .name = LPASS_BE_AUXPCM_TX,
6312 .stream_name = "AUX PCM Capture",
6313 .cpu_dai_name = "msm-dai-q6-auxpcm.1",
6314 .platform_name = "msm-pcm-routing",
6315 .codec_name = "msm-stub-codec.1",
6316 .codec_dai_name = "msm-stub-tx",
6317 .no_pcm = 1,
6318 .dpcm_capture = 1,
6319 .id = MSM_BACKEND_DAI_AUXPCM_TX,
6320 .be_hw_params_fixup = msm_be_hw_params_fixup,
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame^]6321 .ops = &kona_aux_be_ops,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]6322 .ignore_suspend = 1,
6323 },
6324 /* Secondary AUX PCM Backend DAI Links */
6325 {
6326 .name = LPASS_BE_SEC_AUXPCM_RX,
6327 .stream_name = "Sec AUX PCM Playback",
6328 .cpu_dai_name = "msm-dai-q6-auxpcm.2",
6329 .platform_name = "msm-pcm-routing",
6330 .codec_name = "msm-stub-codec.1",
6331 .codec_dai_name = "msm-stub-rx",
6332 .no_pcm = 1,
6333 .dpcm_playback = 1,
6334 .id = MSM_BACKEND_DAI_SEC_AUXPCM_RX,
6335 .be_hw_params_fixup = msm_be_hw_params_fixup,
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame^]6336 .ops = &kona_aux_be_ops,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]6337 .ignore_pmdown_time = 1,
6338 .ignore_suspend = 1,
6339 },
6340 {
6341 .name = LPASS_BE_SEC_AUXPCM_TX,
6342 .stream_name = "Sec AUX PCM Capture",
6343 .cpu_dai_name = "msm-dai-q6-auxpcm.2",
6344 .platform_name = "msm-pcm-routing",
6345 .codec_name = "msm-stub-codec.1",
6346 .codec_dai_name = "msm-stub-tx",
6347 .no_pcm = 1,
6348 .dpcm_capture = 1,
6349 .id = MSM_BACKEND_DAI_SEC_AUXPCM_TX,
6350 .be_hw_params_fixup = msm_be_hw_params_fixup,
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame^]6351 .ops = &kona_aux_be_ops,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]6352 .ignore_suspend = 1,
6353 },
6354 /* Tertiary AUX PCM Backend DAI Links */
6355 {
6356 .name = LPASS_BE_TERT_AUXPCM_RX,
6357 .stream_name = "Tert AUX PCM Playback",
6358 .cpu_dai_name = "msm-dai-q6-auxpcm.3",
6359 .platform_name = "msm-pcm-routing",
6360 .codec_name = "msm-stub-codec.1",
6361 .codec_dai_name = "msm-stub-rx",
6362 .no_pcm = 1,
6363 .dpcm_playback = 1,
6364 .id = MSM_BACKEND_DAI_TERT_AUXPCM_RX,
6365 .be_hw_params_fixup = msm_be_hw_params_fixup,
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame^]6366 .ops = &kona_aux_be_ops,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]6367 .ignore_suspend = 1,
6368 },
6369 {
6370 .name = LPASS_BE_TERT_AUXPCM_TX,
6371 .stream_name = "Tert AUX PCM Capture",
6372 .cpu_dai_name = "msm-dai-q6-auxpcm.3",
6373 .platform_name = "msm-pcm-routing",
6374 .codec_name = "msm-stub-codec.1",
6375 .codec_dai_name = "msm-stub-tx",
6376 .no_pcm = 1,
6377 .dpcm_capture = 1,
6378 .id = MSM_BACKEND_DAI_TERT_AUXPCM_TX,
6379 .be_hw_params_fixup = msm_be_hw_params_fixup,
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame^]6380 .ops = &kona_aux_be_ops,
6381 .ignore_suspend = 1,
6382 },
6383 /* Quaternary AUX PCM Backend DAI Links */
6384 {
6385 .name = LPASS_BE_QUAT_AUXPCM_RX,
6386 .stream_name = "Quat AUX PCM Playback",
6387 .cpu_dai_name = "msm-dai-q6-auxpcm.4",
6388 .platform_name = "msm-pcm-routing",
6389 .codec_name = "msm-stub-codec.1",
6390 .codec_dai_name = "msm-stub-rx",
6391 .no_pcm = 1,
6392 .dpcm_playback = 1,
6393 .id = MSM_BACKEND_DAI_QUAT_AUXPCM_RX,
6394 .be_hw_params_fixup = msm_be_hw_params_fixup,
6395 .ops = &kona_aux_be_ops,
6396 .ignore_suspend = 1,
6397 },
6398 {
6399 .name = LPASS_BE_QUAT_AUXPCM_TX,
6400 .stream_name = "Quat AUX PCM Capture",
6401 .cpu_dai_name = "msm-dai-q6-auxpcm.4",
6402 .platform_name = "msm-pcm-routing",
6403 .codec_name = "msm-stub-codec.1",
6404 .codec_dai_name = "msm-stub-tx",
6405 .no_pcm = 1,
6406 .dpcm_capture = 1,
6407 .id = MSM_BACKEND_DAI_QUAT_AUXPCM_TX,
6408 .be_hw_params_fixup = msm_be_hw_params_fixup,
6409 .ops = &kona_aux_be_ops,
6410 .ignore_suspend = 1,
6411 },
6412 /* Quinary AUX PCM Backend DAI Links */
6413 {
6414 .name = LPASS_BE_QUIN_AUXPCM_RX,
6415 .stream_name = "Quin AUX PCM Playback",
6416 .cpu_dai_name = "msm-dai-q6-auxpcm.5",
6417 .platform_name = "msm-pcm-routing",
6418 .codec_name = "msm-stub-codec.1",
6419 .codec_dai_name = "msm-stub-rx",
6420 .no_pcm = 1,
6421 .dpcm_playback = 1,
6422 .id = MSM_BACKEND_DAI_QUIN_AUXPCM_RX,
6423 .be_hw_params_fixup = msm_be_hw_params_fixup,
6424 .ops = &kona_aux_be_ops,
6425 .ignore_suspend = 1,
6426 },
6427 {
6428 .name = LPASS_BE_QUIN_AUXPCM_TX,
6429 .stream_name = "Quin AUX PCM Capture",
6430 .cpu_dai_name = "msm-dai-q6-auxpcm.5",
6431 .platform_name = "msm-pcm-routing",
6432 .codec_name = "msm-stub-codec.1",
6433 .codec_dai_name = "msm-stub-tx",
6434 .no_pcm = 1,
6435 .dpcm_capture = 1,
6436 .id = MSM_BACKEND_DAI_QUIN_AUXPCM_TX,
6437 .be_hw_params_fixup = msm_be_hw_params_fixup,
6438 .ops = &kona_aux_be_ops,
6439 .ignore_suspend = 1,
6440 },
6441 /* Senary AUX PCM Backend DAI Links */
6442 {
6443 .name = LPASS_BE_SEN_AUXPCM_RX,
6444 .stream_name = "Sen AUX PCM Playback",
6445 .cpu_dai_name = "msm-dai-q6-auxpcm.6",
6446 .platform_name = "msm-pcm-routing",
6447 .codec_name = "msm-stub-codec.1",
6448 .codec_dai_name = "msm-stub-rx",
6449 .no_pcm = 1,
6450 .dpcm_playback = 1,
6451 .id = MSM_BACKEND_DAI_SEN_AUXPCM_RX,
6452 .be_hw_params_fixup = msm_be_hw_params_fixup,
6453 .ops = &kona_aux_be_ops,
6454 .ignore_suspend = 1,
6455 },
6456 {
6457 .name = LPASS_BE_SEN_AUXPCM_TX,
6458 .stream_name = "Sen AUX PCM Capture",
6459 .cpu_dai_name = "msm-dai-q6-auxpcm.6",
6460 .platform_name = "msm-pcm-routing",
6461 .codec_name = "msm-stub-codec.1",
6462 .codec_dai_name = "msm-stub-tx",
6463 .no_pcm = 1,
6464 .dpcm_capture = 1,
6465 .id = MSM_BACKEND_DAI_SEN_AUXPCM_TX,
6466 .be_hw_params_fixup = msm_be_hw_params_fixup,
6467 .ops = &kona_aux_be_ops,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]6468 .ignore_suspend = 1,
6469 },
6470};
6471
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]6472static struct snd_soc_dai_link msm_wsa_cdc_dma_be_dai_links[] = {
6473 /* WSA CDC DMA Backend DAI Links */
6474 {
6475 .name = LPASS_BE_WSA_CDC_DMA_RX_0,
6476 .stream_name = "WSA CDC DMA0 Playback",
6477 .cpu_dai_name = "msm-dai-cdc-dma-dev.45056",
6478 .platform_name = "msm-pcm-routing",
6479 .codec_name = "bolero_codec",
6480 .codec_dai_name = "wsa_macro_rx1",
6481 .no_pcm = 1,
6482 .dpcm_playback = 1,
6483 .init = &msm_int_audrx_init,
6484 .id = MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0,
6485 .be_hw_params_fixup = msm_be_hw_params_fixup,
6486 .ignore_pmdown_time = 1,
6487 .ignore_suspend = 1,
6488 .ops = &msm_cdc_dma_be_ops,
6489 },
6490 {
6491 .name = LPASS_BE_WSA_CDC_DMA_RX_1,
6492 .stream_name = "WSA CDC DMA1 Playback",
6493 .cpu_dai_name = "msm-dai-cdc-dma-dev.45058",
6494 .platform_name = "msm-pcm-routing",
6495 .codec_name = "bolero_codec",
6496 .codec_dai_name = "wsa_macro_rx_mix",
6497 .no_pcm = 1,
6498 .dpcm_playback = 1,
6499 .id = MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1,
6500 .be_hw_params_fixup = msm_be_hw_params_fixup,
6501 .ignore_pmdown_time = 1,
6502 .ignore_suspend = 1,
6503 .ops = &msm_cdc_dma_be_ops,
6504 },
6505 {
6506 .name = LPASS_BE_WSA_CDC_DMA_TX_1,
6507 .stream_name = "WSA CDC DMA1 Capture",
6508 .cpu_dai_name = "msm-dai-cdc-dma-dev.45059",
6509 .platform_name = "msm-pcm-routing",
6510 .codec_name = "bolero_codec",
6511 .codec_dai_name = "wsa_macro_echo",
6512 .no_pcm = 1,
6513 .dpcm_capture = 1,
6514 .id = MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1,
6515 .be_hw_params_fixup = msm_be_hw_params_fixup,
6516 .ignore_suspend = 1,
6517 .ops = &msm_cdc_dma_be_ops,
6518 },
6519};
6520
6521static struct snd_soc_dai_link msm_rx_tx_cdc_dma_be_dai_links[] = {
6522 /* RX CDC DMA Backend DAI Links */
6523 {
6524 .name = LPASS_BE_RX_CDC_DMA_RX_0,
6525 .stream_name = "RX CDC DMA0 Playback",
6526 .cpu_dai_name = "msm-dai-cdc-dma-dev.45104",
6527 .platform_name = "msm-pcm-routing",
6528 .codec_name = "bolero_codec",
6529 .codec_dai_name = "rx_macro_rx1",
6530 .no_pcm = 1,
6531 .dpcm_playback = 1,
6532 .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_0,
6533 .be_hw_params_fixup = msm_be_hw_params_fixup,
6534 .ignore_pmdown_time = 1,
6535 .ignore_suspend = 1,
6536 .ops = &msm_cdc_dma_be_ops,
6537 },
6538 {
6539 .name = LPASS_BE_RX_CDC_DMA_RX_1,
6540 .stream_name = "RX CDC DMA1 Playback",
6541 .cpu_dai_name = "msm-dai-cdc-dma-dev.45106",
6542 .platform_name = "msm-pcm-routing",
6543 .codec_name = "bolero_codec",
6544 .codec_dai_name = "rx_macro_rx2",
6545 .no_pcm = 1,
6546 .dpcm_playback = 1,
6547 .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_1,
6548 .be_hw_params_fixup = msm_be_hw_params_fixup,
6549 .ignore_pmdown_time = 1,
6550 .ignore_suspend = 1,
6551 .ops = &msm_cdc_dma_be_ops,
6552 },
6553 {
6554 .name = LPASS_BE_RX_CDC_DMA_RX_2,
6555 .stream_name = "RX CDC DMA2 Playback",
6556 .cpu_dai_name = "msm-dai-cdc-dma-dev.45108",
6557 .platform_name = "msm-pcm-routing",
6558 .codec_name = "bolero_codec",
6559 .codec_dai_name = "rx_macro_rx3",
6560 .no_pcm = 1,
6561 .dpcm_playback = 1,
6562 .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_2,
6563 .be_hw_params_fixup = msm_be_hw_params_fixup,
6564 .ignore_pmdown_time = 1,
6565 .ignore_suspend = 1,
6566 .ops = &msm_cdc_dma_be_ops,
6567 },
6568 {
6569 .name = LPASS_BE_RX_CDC_DMA_RX_3,
6570 .stream_name = "RX CDC DMA3 Playback",
6571 .cpu_dai_name = "msm-dai-cdc-dma-dev.45110",
6572 .platform_name = "msm-pcm-routing",
6573 .codec_name = "bolero_codec",
6574 .codec_dai_name = "rx_macro_rx4",
6575 .no_pcm = 1,
6576 .dpcm_playback = 1,
6577 .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_3,
6578 .be_hw_params_fixup = msm_be_hw_params_fixup,
6579 .ignore_pmdown_time = 1,
6580 .ignore_suspend = 1,
6581 .ops = &msm_cdc_dma_be_ops,
6582 },
6583 /* TX CDC DMA Backend DAI Links */
6584 {
6585 .name = LPASS_BE_TX_CDC_DMA_TX_3,
6586 .stream_name = "TX CDC DMA3 Capture",
6587 .cpu_dai_name = "msm-dai-cdc-dma-dev.45111",
6588 .platform_name = "msm-pcm-routing",
6589 .codec_name = "bolero_codec",
6590 .codec_dai_name = "tx_macro_tx1",
6591 .no_pcm = 1,
6592 .dpcm_capture = 1,
6593 .id = MSM_BACKEND_DAI_TX_CDC_DMA_TX_3,
6594 .be_hw_params_fixup = msm_be_hw_params_fixup,
6595 .ignore_suspend = 1,
6596 .ops = &msm_cdc_dma_be_ops,
6597 },
6598 {
6599 .name = LPASS_BE_TX_CDC_DMA_TX_4,
6600 .stream_name = "TX CDC DMA4 Capture",
6601 .cpu_dai_name = "msm-dai-cdc-dma-dev.45113",
6602 .platform_name = "msm-pcm-routing",
6603 .codec_name = "bolero_codec",
6604 .codec_dai_name = "tx_macro_tx2",
6605 .no_pcm = 1,
6606 .dpcm_capture = 1,
6607 .id = MSM_BACKEND_DAI_TX_CDC_DMA_TX_4,
6608 .be_hw_params_fixup = msm_be_hw_params_fixup,
6609 .ignore_suspend = 1,
6610 .ops = &msm_cdc_dma_be_ops,
6611 },
6612};
6613
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800[diff] [blame]6614static struct snd_soc_dai_link msm_va_cdc_dma_be_dai_links[] = {
6615 {
6616 .name = LPASS_BE_VA_CDC_DMA_TX_0,
6617 .stream_name = "VA CDC DMA0 Capture",
6618 .cpu_dai_name = "msm-dai-cdc-dma-dev.45089",
6619 .platform_name = "msm-pcm-routing",
6620 .codec_name = "bolero_codec",
6621 .codec_dai_name = "va_macro_tx1",
6622 .no_pcm = 1,
6623 .dpcm_capture = 1,
6624 .id = MSM_BACKEND_DAI_VA_CDC_DMA_TX_0,
6625 .be_hw_params_fixup = msm_be_hw_params_fixup,
6626 .ignore_suspend = 1,
6627 .ops = &msm_cdc_dma_be_ops,
6628 },
6629 {
6630 .name = LPASS_BE_VA_CDC_DMA_TX_1,
6631 .stream_name = "VA CDC DMA1 Capture",
6632 .cpu_dai_name = "msm-dai-cdc-dma-dev.45091",
6633 .platform_name = "msm-pcm-routing",
6634 .codec_name = "bolero_codec",
6635 .codec_dai_name = "va_macro_tx2",
6636 .no_pcm = 1,
6637 .dpcm_capture = 1,
6638 .id = MSM_BACKEND_DAI_VA_CDC_DMA_TX_1,
6639 .be_hw_params_fixup = msm_be_hw_params_fixup,
6640 .ignore_suspend = 1,
6641 .ops = &msm_cdc_dma_be_ops,
6642 },
6643 {
6644 .name = LPASS_BE_VA_CDC_DMA_TX_2,
6645 .stream_name = "VA CDC DMA2 Capture",
6646 .cpu_dai_name = "msm-dai-cdc-dma-dev.45093",
6647 .platform_name = "msm-pcm-routing",
6648 .codec_name = "bolero_codec",
6649 .codec_dai_name = "va_macro_tx3",
6650 .no_pcm = 1,
6651 .dpcm_capture = 1,
6652 .id = MSM_BACKEND_DAI_VA_CDC_DMA_TX_2,
6653 .be_hw_params_fixup = msm_be_hw_params_fixup,
6654 .ignore_suspend = 1,
6655 .ops = &msm_cdc_dma_be_ops,
6656 },
6657};
6658
Meng Wange8e53822019-03-18 10:49:50 +0800[diff] [blame]6659static struct snd_soc_dai_link msm_afe_rxtx_lb_be_dai_link[] = {
6660 {
6661 .name = LPASS_BE_AFE_LOOPBACK_TX,
6662 .stream_name = "AFE Loopback Capture",
6663 .cpu_dai_name = "msm-dai-q6-dev.24577",
6664 .platform_name = "msm-pcm-routing",
6665 .codec_name = "msm-stub-codec.1",
6666 .codec_dai_name = "msm-stub-tx",
6667 .no_pcm = 1,
6668 .dpcm_capture = 1,
6669 .id = MSM_BACKEND_DAI_AFE_LOOPBACK_TX,
6670 .be_hw_params_fixup = msm_be_hw_params_fixup,
6671 .ignore_pmdown_time = 1,
6672 .ignore_suspend = 1,
6673 },
6674};
6675
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]6676static struct snd_soc_dai_link msm_kona_dai_links[
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]6677 ARRAY_SIZE(msm_common_dai_links) +
6678 ARRAY_SIZE(msm_bolero_fe_dai_links) +
6679 ARRAY_SIZE(msm_common_misc_fe_dai_links) +
6680 ARRAY_SIZE(msm_common_be_dai_links) +
6681 ARRAY_SIZE(msm_mi2s_be_dai_links) +
6682 ARRAY_SIZE(msm_auxpcm_be_dai_links) +
6683 ARRAY_SIZE(msm_wsa_cdc_dma_be_dai_links) +
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800[diff] [blame]6684 ARRAY_SIZE(msm_rx_tx_cdc_dma_be_dai_links) +
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]6685 ARRAY_SIZE(msm_va_cdc_dma_be_dai_links) +
6686 ARRAY_SIZE(ext_disp_be_dai_link) +
Meng Wange8e53822019-03-18 10:49:50 +0800[diff] [blame]6687 ARRAY_SIZE(msm_wcn_be_dai_links) +
Vatsal Bucha82b30ba2019-04-17 12:43:54 +0530[diff] [blame]6688 ARRAY_SIZE(msm_afe_rxtx_lb_be_dai_link) +
6689 ARRAY_SIZE(msm_wcn_btfm_be_dai_links)];
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]6690
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]6691static int msm_populate_dai_link_component_of_node(
6692 struct snd_soc_card *card)
6693{
6694 int i, index, ret = 0;
6695 struct device *cdev = card->dev;
6696 struct snd_soc_dai_link *dai_link = card->dai_link;
6697 struct device_node *np;
6698
6699 if (!cdev) {
6700 dev_err(cdev, "%s: Sound card device memory NULL\n", __func__);
6701 return -ENODEV;
6702 }
6703
6704 for (i = 0; i < card->num_links; i++) {
6705 if (dai_link[i].platform_of_node && dai_link[i].cpu_of_node)
6706 continue;
6707
6708 /* populate platform_of_node for snd card dai links */
6709 if (dai_link[i].platform_name &&
6710 !dai_link[i].platform_of_node) {
6711 index = of_property_match_string(cdev->of_node,
6712 "asoc-platform-names",
6713 dai_link[i].platform_name);
6714 if (index < 0) {
6715 dev_err(cdev, "%s: No match found for platform name: %s\n",
6716 __func__, dai_link[i].platform_name);
6717 ret = index;
6718 goto err;
6719 }
6720 np = of_parse_phandle(cdev->of_node, "asoc-platform",
6721 index);
6722 if (!np) {
6723 dev_err(cdev, "%s: retrieving phandle for platform %s, index %d failed\n",
6724 __func__, dai_link[i].platform_name,
6725 index);
6726 ret = -ENODEV;
6727 goto err;
6728 }
6729 dai_link[i].platform_of_node = np;
6730 dai_link[i].platform_name = NULL;
6731 }
6732
6733 /* populate cpu_of_node for snd card dai links */
6734 if (dai_link[i].cpu_dai_name && !dai_link[i].cpu_of_node) {
6735 index = of_property_match_string(cdev->of_node,
6736 "asoc-cpu-names",
6737 dai_link[i].cpu_dai_name);
6738 if (index >= 0) {
6739 np = of_parse_phandle(cdev->of_node, "asoc-cpu",
6740 index);
6741 if (!np) {
6742 dev_err(cdev, "%s: retrieving phandle for cpu dai %s failed\n",
6743 __func__,
6744 dai_link[i].cpu_dai_name);
6745 ret = -ENODEV;
6746 goto err;
6747 }
6748 dai_link[i].cpu_of_node = np;
6749 dai_link[i].cpu_dai_name = NULL;
6750 }
6751 }
6752
6753 /* populate codec_of_node for snd card dai links */
6754 if (dai_link[i].codec_name && !dai_link[i].codec_of_node) {
6755 index = of_property_match_string(cdev->of_node,
6756 "asoc-codec-names",
6757 dai_link[i].codec_name);
6758 if (index < 0)
6759 continue;
6760 np = of_parse_phandle(cdev->of_node, "asoc-codec",
6761 index);
6762 if (!np) {
6763 dev_err(cdev, "%s: retrieving phandle for codec %s failed\n",
6764 __func__, dai_link[i].codec_name);
6765 ret = -ENODEV;
6766 goto err;
6767 }
6768 dai_link[i].codec_of_node = np;
6769 dai_link[i].codec_name = NULL;
6770 }
6771 }
6772
6773err:
6774 return ret;
6775}
6776
6777static int msm_audrx_stub_init(struct snd_soc_pcm_runtime *rtd)
6778{
6779 int ret = -EINVAL;
6780 struct snd_soc_component *component = snd_soc_rtdcom_lookup(rtd, "msm-stub-codec");
6781
6782 if (!component) {
6783 pr_err("* %s: No match for msm-stub-codec component\n", __func__);
6784 return ret;
6785 }
6786
6787 ret = snd_soc_add_component_controls(component, msm_snd_controls,
6788 ARRAY_SIZE(msm_snd_controls));
6789 if (ret < 0) {
6790 dev_err(component->dev,
6791 "%s: add_codec_controls failed, err = %d\n",
6792 __func__, ret);
6793 return ret;
6794 }
6795
6796 return ret;
6797}
6798
6799static int msm_snd_stub_hw_params(struct snd_pcm_substream *substream,
6800 struct snd_pcm_hw_params *params)
6801{
6802 return 0;
6803}
6804
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]6805static struct snd_soc_ops msm_stub_be_ops = {
6806 .hw_params = msm_snd_stub_hw_params,
6807};
6808
6809struct snd_soc_card snd_soc_card_stub_msm = {
6810 .name = "kona-stub-snd-card",
6811};
6812
6813static struct snd_soc_dai_link msm_stub_fe_dai_links[] = {
6814 /* FrontEnd DAI Links */
6815 {
6816 .name = "MSMSTUB Media1",
6817 .stream_name = "MultiMedia1",
6818 .cpu_dai_name = "MultiMedia1",
6819 .platform_name = "msm-pcm-dsp.0",
6820 .dynamic = 1,
6821 .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
6822 .dpcm_playback = 1,
6823 .dpcm_capture = 1,
6824 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6825 SND_SOC_DPCM_TRIGGER_POST},
6826 .codec_dai_name = "snd-soc-dummy-dai",
6827 .codec_name = "snd-soc-dummy",
6828 .ignore_suspend = 1,
6829 /* this dainlink has playback support */
6830 .ignore_pmdown_time = 1,
6831 .id = MSM_FRONTEND_DAI_MULTIMEDIA1
6832 },
6833};
6834
6835static struct snd_soc_dai_link msm_stub_be_dai_links[] = {
6836 /* Backend DAI Links */
6837 {
6838 .name = LPASS_BE_AUXPCM_RX,
6839 .stream_name = "AUX PCM Playback",
6840 .cpu_dai_name = "msm-dai-q6-auxpcm.1",
6841 .platform_name = "msm-pcm-routing",
6842 .codec_name = "msm-stub-codec.1",
6843 .codec_dai_name = "msm-stub-rx",
6844 .no_pcm = 1,
6845 .dpcm_playback = 1,
6846 .id = MSM_BACKEND_DAI_AUXPCM_RX,
6847 .init = &msm_audrx_stub_init,
6848 .be_hw_params_fixup = msm_be_hw_params_fixup,
6849 .ignore_pmdown_time = 1,
6850 .ignore_suspend = 1,
6851 .ops = &msm_stub_be_ops,
6852 },
6853 {
6854 .name = LPASS_BE_AUXPCM_TX,
6855 .stream_name = "AUX PCM Capture",
6856 .cpu_dai_name = "msm-dai-q6-auxpcm.1",
6857 .platform_name = "msm-pcm-routing",
6858 .codec_name = "msm-stub-codec.1",
6859 .codec_dai_name = "msm-stub-tx",
6860 .no_pcm = 1,
6861 .dpcm_capture = 1,
6862 .id = MSM_BACKEND_DAI_AUXPCM_TX,
6863 .be_hw_params_fixup = msm_be_hw_params_fixup,
6864 .ignore_suspend = 1,
6865 .ops = &msm_stub_be_ops,
6866 },
6867};
6868
6869static struct snd_soc_dai_link msm_stub_dai_links[
6870 ARRAY_SIZE(msm_stub_fe_dai_links) +
6871 ARRAY_SIZE(msm_stub_be_dai_links)];
6872
6873static const struct of_device_id kona_asoc_machine_of_match[] = {
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]6874 { .compatible = "qcom,kona-asoc-snd",
6875 .data = "codec"},
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]6876 { .compatible = "qcom,kona-asoc-snd-stub",
6877 .data = "stub_codec"},
6878 {},
6879};
6880
6881static struct snd_soc_card *populate_snd_card_dailinks(struct device *dev)
6882{
6883 struct snd_soc_card *card = NULL;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]6884 struct snd_soc_dai_link *dailink = NULL;
6885 int len_1 = 0;
6886 int len_2 = 0;
6887 int total_links = 0;
6888 int rc = 0;
6889 u32 mi2s_audio_intf = 0;
6890 u32 auxpcm_audio_intf = 0;
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]6891 u32 val = 0;
Vatsal Bucha82b30ba2019-04-17 12:43:54 +0530[diff] [blame]6892 u32 wcn_btfm_intf = 0;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]6893 const struct of_device_id *match;
6894
6895 match = of_match_node(kona_asoc_machine_of_match, dev->of_node);
6896 if (!match) {
6897 dev_err(dev, "%s: No DT match found for sound card\n",
6898 __func__);
6899 return NULL;
6900 }
6901
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]6902 if (!strcmp(match->data, "codec")) {
6903 card = &snd_soc_card_kona_msm;
6904
6905 memcpy(msm_kona_dai_links + total_links,
6906 msm_common_dai_links,
6907 sizeof(msm_common_dai_links));
6908 total_links += ARRAY_SIZE(msm_common_dai_links);
6909
6910 memcpy(msm_kona_dai_links + total_links,
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]6911 msm_bolero_fe_dai_links,
6912 sizeof(msm_bolero_fe_dai_links));
6913 total_links +=
6914 ARRAY_SIZE(msm_bolero_fe_dai_links);
6915
6916 memcpy(msm_kona_dai_links + total_links,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]6917 msm_common_misc_fe_dai_links,
6918 sizeof(msm_common_misc_fe_dai_links));
6919 total_links += ARRAY_SIZE(msm_common_misc_fe_dai_links);
6920
6921 memcpy(msm_kona_dai_links + total_links,
6922 msm_common_be_dai_links,
6923 sizeof(msm_common_be_dai_links));
6924 total_links += ARRAY_SIZE(msm_common_be_dai_links);
6925
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]6926 memcpy(msm_kona_dai_links + total_links,
6927 msm_wsa_cdc_dma_be_dai_links,
6928 sizeof(msm_wsa_cdc_dma_be_dai_links));
6929 total_links +=
6930 ARRAY_SIZE(msm_wsa_cdc_dma_be_dai_links);
6931
6932 memcpy(msm_kona_dai_links + total_links,
6933 msm_rx_tx_cdc_dma_be_dai_links,
6934 sizeof(msm_rx_tx_cdc_dma_be_dai_links));
6935 total_links +=
6936 ARRAY_SIZE(msm_rx_tx_cdc_dma_be_dai_links);
6937
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800[diff] [blame]6938 memcpy(msm_kona_dai_links + total_links,
6939 msm_va_cdc_dma_be_dai_links,
6940 sizeof(msm_va_cdc_dma_be_dai_links));
6941 total_links +=
6942 ARRAY_SIZE(msm_va_cdc_dma_be_dai_links);
6943
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]6944 rc = of_property_read_u32(dev->of_node, "qcom,mi2s-audio-intf",
6945 &mi2s_audio_intf);
6946 if (rc) {
6947 dev_dbg(dev, "%s: No DT match MI2S audio interface\n",
6948 __func__);
6949 } else {
6950 if (mi2s_audio_intf) {
6951 memcpy(msm_kona_dai_links + total_links,
6952 msm_mi2s_be_dai_links,
6953 sizeof(msm_mi2s_be_dai_links));
6954 total_links +=
6955 ARRAY_SIZE(msm_mi2s_be_dai_links);
6956 }
6957 }
6958
6959 rc = of_property_read_u32(dev->of_node,
6960 "qcom,auxpcm-audio-intf",
6961 &auxpcm_audio_intf);
6962 if (rc) {
6963 dev_dbg(dev, "%s: No DT match Aux PCM interface\n",
6964 __func__);
6965 } else {
6966 if (auxpcm_audio_intf) {
6967 memcpy(msm_kona_dai_links + total_links,
6968 msm_auxpcm_be_dai_links,
6969 sizeof(msm_auxpcm_be_dai_links));
6970 total_links +=
6971 ARRAY_SIZE(msm_auxpcm_be_dai_links);
6972 }
6973 }
6974
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]6975 rc = of_property_read_u32(dev->of_node,
6976 "qcom,ext-disp-audio-rx", &val);
6977 if (!rc && val) {
6978 dev_dbg(dev, "%s(): ext disp audio support present\n",
6979 __func__);
6980 memcpy(msm_kona_dai_links + total_links,
6981 ext_disp_be_dai_link,
6982 sizeof(ext_disp_be_dai_link));
6983 total_links += ARRAY_SIZE(ext_disp_be_dai_link);
6984 }
6985
6986 rc = of_property_read_u32(dev->of_node, "qcom,wcn-bt", &val);
6987 if (!rc && val) {
6988 dev_dbg(dev, "%s(): WCN BT support present\n",
6989 __func__);
6990 memcpy(msm_kona_dai_links + total_links,
6991 msm_wcn_be_dai_links,
6992 sizeof(msm_wcn_be_dai_links));
6993 total_links += ARRAY_SIZE(msm_wcn_be_dai_links);
6994 }
6995
Meng Wange8e53822019-03-18 10:49:50 +0800[diff] [blame]6996 rc = of_property_read_u32(dev->of_node, "qcom,afe-rxtx-lb",
6997 &val);
6998 if (!rc && val) {
6999 memcpy(msm_kona_dai_links + total_links,
7000 msm_afe_rxtx_lb_be_dai_link,
7001 sizeof(msm_afe_rxtx_lb_be_dai_link));
7002 total_links +=
7003 ARRAY_SIZE(msm_afe_rxtx_lb_be_dai_link);
7004 }
Vatsal Bucha82b30ba2019-04-17 12:43:54 +0530[diff] [blame]7005
7006 rc = of_property_read_u32(dev->of_node, "qcom,wcn-btfm",
7007 &wcn_btfm_intf);
7008 if (rc) {
7009 dev_dbg(dev, "%s: No DT match wcn btfm interface\n",
7010 __func__);
7011 } else {
7012 if (wcn_btfm_intf) {
7013 memcpy(msm_kona_dai_links + total_links,
7014 msm_wcn_btfm_be_dai_links,
7015 sizeof(msm_wcn_btfm_be_dai_links));
7016 total_links +=
7017 ARRAY_SIZE(msm_wcn_btfm_be_dai_links);
7018 }
7019 }
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]7020 dailink = msm_kona_dai_links;
7021 } else if(!strcmp(match->data, "stub_codec")) {
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]7022 card = &snd_soc_card_stub_msm;
7023 len_1 = ARRAY_SIZE(msm_stub_fe_dai_links);
7024 len_2 = len_1 + ARRAY_SIZE(msm_stub_be_dai_links);
7025
7026 memcpy(msm_stub_dai_links,
7027 msm_stub_fe_dai_links,
7028 sizeof(msm_stub_fe_dai_links));
7029 memcpy(msm_stub_dai_links + len_1,
7030 msm_stub_be_dai_links,
7031 sizeof(msm_stub_be_dai_links));
7032
7033 dailink = msm_stub_dai_links;
7034 total_links = len_2;
7035 }
7036
7037 if (card) {
7038 card->dai_link = dailink;
7039 card->num_links = total_links;
7040 }
7041
7042 return card;
7043}
7044
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7045static int msm_wsa881x_init(struct snd_soc_component *component)
7046{
7047 u8 spkleft_ports[WSA881X_MAX_SWR_PORTS] = {0, 1, 2, 3};
7048 u8 spkright_ports[WSA881X_MAX_SWR_PORTS] = {0, 1, 2, 3};
7049 u8 spkleft_port_types[WSA881X_MAX_SWR_PORTS] = {SPKR_L, SPKR_L_COMP,
7050 SPKR_L_BOOST, SPKR_L_VI};
7051 u8 spkright_port_types[WSA881X_MAX_SWR_PORTS] = {SPKR_R, SPKR_R_COMP,
7052 SPKR_R_BOOST, SPKR_R_VI};
7053 unsigned int ch_rate[WSA881X_MAX_SWR_PORTS] = {2400, 600, 300, 1200};
7054 unsigned int ch_mask[WSA881X_MAX_SWR_PORTS] = {0x1, 0xF, 0x3, 0x3};
7055 struct msm_asoc_mach_data *pdata;
7056 struct snd_soc_dapm_context *dapm;
7057 struct snd_card *card;
7058 struct snd_info_entry *entry;
7059 int ret = 0;
7060
7061 if (!component) {
7062 pr_err("%s component is NULL\n", __func__);
7063 return -EINVAL;
7064 }
7065
7066 card = component->card->snd_card;
7067 dapm = snd_soc_component_get_dapm(component);
7068
7069 if (!strcmp(component->name_prefix, "SpkrLeft")) {
7070 dev_dbg(component->dev, "%s: setting left ch map to codec %s\n",
7071 __func__, component->name);
7072 wsa881x_set_channel_map(component, &spkleft_ports[0],
7073 WSA881X_MAX_SWR_PORTS, &ch_mask[0],
7074 &ch_rate[0], &spkleft_port_types[0]);
7075 if (dapm->component) {
7076 snd_soc_dapm_ignore_suspend(dapm, "SpkrLeft IN");
7077 snd_soc_dapm_ignore_suspend(dapm, "SpkrLeft SPKR");
7078 }
7079 } else if (!strcmp(component->name_prefix, "SpkrRight")) {
7080 dev_dbg(component->dev, "%s: setting right ch map to codec %s\n",
7081 __func__, component->name);
7082 wsa881x_set_channel_map(component, &spkright_ports[0],
7083 WSA881X_MAX_SWR_PORTS, &ch_mask[0],
7084 &ch_rate[0], &spkright_port_types[0]);
7085 if (dapm->component) {
7086 snd_soc_dapm_ignore_suspend(dapm, "SpkrRight IN");
7087 snd_soc_dapm_ignore_suspend(dapm, "SpkrRight SPKR");
7088 }
7089 } else {
7090 dev_err(component->dev, "%s: wrong codec name %s\n", __func__,
7091 component->name);
7092 ret = -EINVAL;
7093 goto err;
7094 }
7095 pdata = snd_soc_card_get_drvdata(component->card);
7096 if (!pdata->codec_root) {
7097 entry = snd_info_create_subdir(card->module, "codecs",
7098 card->proc_root);
7099 if (!entry) {
7100 pr_err("%s: Cannot create codecs module entry\n",
7101 __func__);
7102 ret = 0;
7103 goto err;
7104 }
7105 pdata->codec_root = entry;
7106 }
7107 wsa881x_codec_info_create_codec_entry(pdata->codec_root,
7108 component);
7109err:
7110 return ret;
7111}
7112
7113static int msm_aux_codec_init(struct snd_soc_component *component)
7114{
7115 struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);
7116 int ret = 0;
Karthikeyan Mani5eb13422018-11-05 13:49:17 -0800[diff] [blame]7117 void *mbhc_calibration;
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7118 struct snd_info_entry *entry;
7119 struct snd_card *card = component->card->snd_card;
7120 struct msm_asoc_mach_data *pdata;
7121
7122 snd_soc_dapm_ignore_suspend(dapm, "EAR");
7123 snd_soc_dapm_ignore_suspend(dapm, "AUX");
7124 snd_soc_dapm_ignore_suspend(dapm, "HPHL");
7125 snd_soc_dapm_ignore_suspend(dapm, "HPHR");
7126 snd_soc_dapm_ignore_suspend(dapm, "AMIC1");
7127 snd_soc_dapm_ignore_suspend(dapm, "AMIC2");
7128 snd_soc_dapm_ignore_suspend(dapm, "AMIC3");
7129 snd_soc_dapm_ignore_suspend(dapm, "AMIC4");
7130 snd_soc_dapm_sync(dapm);
7131
7132 pdata = snd_soc_card_get_drvdata(component->card);
7133 if (!pdata->codec_root) {
7134 entry = snd_info_create_subdir(card->module, "codecs",
7135 card->proc_root);
7136 if (!entry) {
Karthikeyan Mani5eb13422018-11-05 13:49:17 -0800[diff] [blame]7137 dev_dbg(component->dev, "%s: Cannot create codecs module entry\n",
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7138 __func__);
7139 ret = 0;
Karthikeyan Mani5eb13422018-11-05 13:49:17 -0800[diff] [blame]7140 goto mbhc_cfg_cal;
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7141 }
7142 pdata->codec_root = entry;
7143 }
Karthikeyan Mani5eb13422018-11-05 13:49:17 -0800[diff] [blame]7144 wcd938x_info_create_codec_entry(pdata->codec_root, component);
7145
7146mbhc_cfg_cal:
7147 mbhc_calibration = def_wcd_mbhc_cal();
7148 if (!mbhc_calibration)
7149 return -ENOMEM;
7150 wcd_mbhc_cfg.calibration = mbhc_calibration;
7151 ret = wcd938x_mbhc_hs_detect(component, &wcd_mbhc_cfg);
7152 if (ret) {
7153 dev_err(component->dev, "%s: mbhc hs detect failed, err:%d\n",
7154 __func__, ret);
7155 goto err_hs_detect;
7156 }
7157 return 0;
7158
7159err_hs_detect:
7160 kfree(mbhc_calibration);
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7161 return ret;
7162}
7163
7164static int msm_init_aux_dev(struct platform_device *pdev,
7165 struct snd_soc_card *card)
7166{
7167 struct device_node *wsa_of_node;
7168 struct device_node *aux_codec_of_node;
7169 u32 wsa_max_devs;
7170 u32 wsa_dev_cnt;
7171 u32 codec_aux_dev_cnt = 0;
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7172 int i;
7173 struct msm_wsa881x_dev_info *wsa881x_dev_info;
7174 struct aux_codec_dev_info *aux_cdc_dev_info;
7175 const char *auxdev_name_prefix[1];
7176 char *dev_name_str = NULL;
7177 int found = 0;
7178 int codecs_found = 0;
7179 int ret = 0;
7180
7181 /* Get maximum WSA device count for this platform */
7182 ret = of_property_read_u32(pdev->dev.of_node,
7183 "qcom,wsa-max-devs", &wsa_max_devs);
7184 if (ret) {
7185 dev_info(&pdev->dev,
7186 "%s: wsa-max-devs property missing in DT %s, ret = %d\n",
7187 __func__, pdev->dev.of_node->full_name, ret);
7188 wsa_max_devs = 0;
7189 goto codec_aux_dev;
7190 }
7191 if (wsa_max_devs == 0) {
7192 dev_warn(&pdev->dev,
7193 "%s: Max WSA devices is 0 for this target?\n",
7194 __func__);
7195 goto codec_aux_dev;
7196 }
7197
7198 /* Get count of WSA device phandles for this platform */
7199 wsa_dev_cnt = of_count_phandle_with_args(pdev->dev.of_node,
7200 "qcom,wsa-devs", NULL);
7201 if (wsa_dev_cnt == -ENOENT) {
7202 dev_warn(&pdev->dev, "%s: No wsa device defined in DT.\n",
7203 __func__);
7204 goto err;
7205 } else if (wsa_dev_cnt <= 0) {
7206 dev_err(&pdev->dev,
7207 "%s: Error reading wsa device from DT. wsa_dev_cnt = %d\n",
7208 __func__, wsa_dev_cnt);
7209 ret = -EINVAL;
7210 goto err;
7211 }
7212
7213 /*
7214 * Expect total phandles count to be NOT less than maximum possible
7215 * WSA count. However, if it is less, then assign same value to
7216 * max count as well.
7217 */
7218 if (wsa_dev_cnt < wsa_max_devs) {
7219 dev_dbg(&pdev->dev,
7220 "%s: wsa_max_devs = %d cannot exceed wsa_dev_cnt = %d\n",
7221 __func__, wsa_max_devs, wsa_dev_cnt);
7222 wsa_max_devs = wsa_dev_cnt;
7223 }
7224
7225 /* Make sure prefix string passed for each WSA device */
7226 ret = of_property_count_strings(pdev->dev.of_node,
7227 "qcom,wsa-aux-dev-prefix");
7228 if (ret != wsa_dev_cnt) {
7229 dev_err(&pdev->dev,
7230 "%s: expecting %d wsa prefix. Defined only %d in DT\n",
7231 __func__, wsa_dev_cnt, ret);
7232 ret = -EINVAL;
7233 goto err;
7234 }
7235
7236 /*
7237 * Alloc mem to store phandle and index info of WSA device, if already
7238 * registered with ALSA core
7239 */
7240 wsa881x_dev_info = devm_kcalloc(&pdev->dev, wsa_max_devs,
7241 sizeof(struct msm_wsa881x_dev_info),
7242 GFP_KERNEL);
7243 if (!wsa881x_dev_info) {
7244 ret = -ENOMEM;
7245 goto err;
7246 }
7247
7248 /*
7249 * search and check whether all WSA devices are already
7250 * registered with ALSA core or not. If found a node, store
7251 * the node and the index in a local array of struct for later
7252 * use.
7253 */
7254 for (i = 0; i < wsa_dev_cnt; i++) {
7255 wsa_of_node = of_parse_phandle(pdev->dev.of_node,
7256 "qcom,wsa-devs", i);
7257 if (unlikely(!wsa_of_node)) {
7258 /* we should not be here */
7259 dev_err(&pdev->dev,
7260 "%s: wsa dev node is not present\n",
7261 __func__);
7262 ret = -EINVAL;
7263 goto err;
7264 }
7265 if (soc_find_component(wsa_of_node, NULL)) {
7266 /* WSA device registered with ALSA core */
7267 wsa881x_dev_info[found].of_node = wsa_of_node;
7268 wsa881x_dev_info[found].index = i;
7269 found++;
7270 if (found == wsa_max_devs)
7271 break;
7272 }
7273 }
7274
7275 if (found < wsa_max_devs) {
7276 dev_dbg(&pdev->dev,
7277 "%s: failed to find %d components. Found only %d\n",
7278 __func__, wsa_max_devs, found);
7279 return -EPROBE_DEFER;
7280 }
7281 dev_info(&pdev->dev,
7282 "%s: found %d wsa881x devices registered with ALSA core\n",
7283 __func__, found);
7284
7285codec_aux_dev:
Karthikeyan Mani1a111b92019-02-12 21:35:31 -0800[diff] [blame]7286 /* Get count of aux codec device phandles for this platform */
7287 codec_aux_dev_cnt = of_count_phandle_with_args(
7288 pdev->dev.of_node,
7289 "qcom,codec-aux-devs", NULL);
7290 if (codec_aux_dev_cnt == -ENOENT) {
7291 dev_warn(&pdev->dev, "%s: No aux codec defined in DT.\n",
7292 __func__);
7293 goto err;
7294 } else if (codec_aux_dev_cnt <= 0) {
7295 dev_err(&pdev->dev,
7296 "%s: Error reading aux codec device from DT, dev_cnt=%d\n",
7297 __func__, codec_aux_dev_cnt);
7298 ret = -EINVAL;
7299 goto err;
7300 }
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7301
Karthikeyan Mani1a111b92019-02-12 21:35:31 -0800[diff] [blame]7302 /*
7303 * Alloc mem to store phandle and index info of aux codec
7304 * if already registered with ALSA core
7305 */
7306 aux_cdc_dev_info = devm_kcalloc(&pdev->dev, codec_aux_dev_cnt,
7307 sizeof(struct aux_codec_dev_info),
7308 GFP_KERNEL);
7309 if (!aux_cdc_dev_info) {
7310 ret = -ENOMEM;
7311 goto err;
7312 }
7313
7314 /*
7315 * search and check whether all aux codecs are already
7316 * registered with ALSA core or not. If found a node, store
7317 * the node and the index in a local array of struct for later
7318 * use.
7319 */
7320 for (i = 0; i < codec_aux_dev_cnt; i++) {
7321 aux_codec_of_node = of_parse_phandle(pdev->dev.of_node,
7322 "qcom,codec-aux-devs", i);
7323 if (unlikely(!aux_codec_of_node)) {
7324 /* we should not be here */
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7325 dev_err(&pdev->dev,
Karthikeyan Mani1a111b92019-02-12 21:35:31 -0800[diff] [blame]7326 "%s: aux codec dev node is not present\n",
7327 __func__);
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7328 ret = -EINVAL;
7329 goto err;
7330 }
Karthikeyan Mani1a111b92019-02-12 21:35:31 -0800[diff] [blame]7331 if (soc_find_component(aux_codec_of_node, NULL)) {
7332 /* AUX codec registered with ALSA core */
7333 aux_cdc_dev_info[codecs_found].of_node =
7334 aux_codec_of_node;
7335 aux_cdc_dev_info[codecs_found].index = i;
7336 codecs_found++;
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7337 }
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7338 }
7339
Karthikeyan Mani1a111b92019-02-12 21:35:31 -0800[diff] [blame]7340 if (codecs_found < codec_aux_dev_cnt) {
7341 dev_dbg(&pdev->dev,
7342 "%s: failed to find %d components. Found only %d\n",
7343 __func__, codec_aux_dev_cnt, codecs_found);
7344 return -EPROBE_DEFER;
7345 }
7346 dev_info(&pdev->dev,
7347 "%s: found %d AUX codecs registered with ALSA core\n",
7348 __func__, codecs_found);
7349
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7350 card->num_aux_devs = wsa_max_devs + codec_aux_dev_cnt;
7351 card->num_configs = wsa_max_devs + codec_aux_dev_cnt;
7352
7353 /* Alloc array of AUX devs struct */
7354 msm_aux_dev = devm_kcalloc(&pdev->dev, card->num_aux_devs,
7355 sizeof(struct snd_soc_aux_dev),
7356 GFP_KERNEL);
7357 if (!msm_aux_dev) {
7358 ret = -ENOMEM;
7359 goto err;
7360 }
7361
7362 /* Alloc array of codec conf struct */
7363 msm_codec_conf = devm_kcalloc(&pdev->dev, card->num_configs,
7364 sizeof(struct snd_soc_codec_conf),
7365 GFP_KERNEL);
7366 if (!msm_codec_conf) {
7367 ret = -ENOMEM;
7368 goto err;
7369 }
7370
7371 for (i = 0; i < wsa_max_devs; i++) {
7372 dev_name_str = devm_kzalloc(&pdev->dev, DEV_NAME_STR_LEN,
7373 GFP_KERNEL);
7374 if (!dev_name_str) {
7375 ret = -ENOMEM;
7376 goto err;
7377 }
7378
7379 ret = of_property_read_string_index(pdev->dev.of_node,
7380 "qcom,wsa-aux-dev-prefix",
7381 wsa881x_dev_info[i].index,
7382 auxdev_name_prefix);
7383 if (ret) {
7384 dev_err(&pdev->dev,
7385 "%s: failed to read wsa aux dev prefix, ret = %d\n",
7386 __func__, ret);
7387 ret = -EINVAL;
7388 goto err;
7389 }
7390
7391 snprintf(dev_name_str, strlen("wsa881x.%d"), "wsa881x.%d", i);
7392 msm_aux_dev[i].name = dev_name_str;
7393 msm_aux_dev[i].codec_name = NULL;
7394 msm_aux_dev[i].codec_of_node =
7395 wsa881x_dev_info[i].of_node;
7396 msm_aux_dev[i].init = msm_wsa881x_init;
7397 msm_codec_conf[i].dev_name = NULL;
7398 msm_codec_conf[i].name_prefix = auxdev_name_prefix[0];
7399 msm_codec_conf[i].of_node =
7400 wsa881x_dev_info[i].of_node;
7401 }
7402
7403 for (i = 0; i < codec_aux_dev_cnt; i++) {
7404 msm_aux_dev[wsa_max_devs + i].name = NULL;
7405 msm_aux_dev[wsa_max_devs + i].codec_name = NULL;
7406 msm_aux_dev[wsa_max_devs + i].codec_of_node =
7407 aux_cdc_dev_info[i].of_node;
7408 msm_aux_dev[wsa_max_devs + i].init = msm_aux_codec_init;
7409 msm_codec_conf[wsa_max_devs + i].dev_name = NULL;
7410 msm_codec_conf[wsa_max_devs + i].name_prefix =
7411 NULL;
7412 msm_codec_conf[wsa_max_devs + i].of_node =
7413 aux_cdc_dev_info[i].of_node;
7414 }
7415
7416 card->codec_conf = msm_codec_conf;
7417 card->aux_dev = msm_aux_dev;
7418err:
7419 return ret;
7420}
7421
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]7422static void msm_i2s_auxpcm_init(struct platform_device *pdev)
7423{
7424 int count = 0;
7425 u32 mi2s_master_slave[MI2S_MAX];
7426 int ret = 0;
7427
7428 for (count = 0; count < MI2S_MAX; count++) {
7429 mutex_init(&mi2s_intf_conf[count].lock);
7430 mi2s_intf_conf[count].ref_cnt = 0;
7431 }
7432
7433 ret = of_property_read_u32_array(pdev->dev.of_node,
7434 "qcom,msm-mi2s-master",
7435 mi2s_master_slave, MI2S_MAX);
7436 if (ret) {
7437 dev_dbg(&pdev->dev, "%s: no qcom,msm-mi2s-master in DT node\n",
7438 __func__);
7439 } else {
7440 for (count = 0; count < MI2S_MAX; count++) {
7441 mi2s_intf_conf[count].msm_is_mi2s_master =
7442 mi2s_master_slave[count];
7443 }
7444 }
7445}
7446
7447static void msm_i2s_auxpcm_deinit(void)
7448{
7449 int count = 0;
7450
7451 for (count = 0; count < MI2S_MAX; count++) {
7452 mutex_destroy(&mi2s_intf_conf[count].lock);
7453 mi2s_intf_conf[count].ref_cnt = 0;
7454 mi2s_intf_conf[count].msm_is_mi2s_master = 0;
7455 }
7456}
7457
7458static int kona_ssr_enable(struct device *dev, void *data)
7459{
7460 struct platform_device *pdev = to_platform_device(dev);
7461 struct snd_soc_card *card = platform_get_drvdata(pdev);
7462 int ret = 0;
7463
7464 if (!card) {
7465 dev_err(dev, "%s: card is NULL\n", __func__);
7466 ret = -EINVAL;
7467 goto err;
7468 }
7469
7470 if (!strcmp(card->name, "kona-stub-snd-card")) {
7471 /* TODO */
7472 dev_dbg(dev, "%s: TODO \n", __func__);
7473 }
7474
7475 snd_soc_card_change_online_state(card, 1);
7476 dev_dbg(dev, "%s: setting snd_card to ONLINE\n", __func__);
7477
7478err:
7479 return ret;
7480}
7481
7482static void kona_ssr_disable(struct device *dev, void *data)
7483{
7484 struct platform_device *pdev = to_platform_device(dev);
7485 struct snd_soc_card *card = platform_get_drvdata(pdev);
7486
7487 if (!card) {
7488 dev_err(dev, "%s: card is NULL\n", __func__);
7489 return;
7490 }
7491
7492 dev_dbg(dev, "%s: setting snd_card to OFFLINE\n", __func__);
7493 snd_soc_card_change_online_state(card, 0);
7494
7495 if (!strcmp(card->name, "kona-stub-snd-card")) {
7496 /* TODO */
7497 dev_dbg(dev, "%s: TODO \n", __func__);
7498 }
7499}
7500
7501static const struct snd_event_ops kona_ssr_ops = {
7502 .enable = kona_ssr_enable,
7503 .disable = kona_ssr_disable,
7504};
7505
7506static int msm_audio_ssr_compare(struct device *dev, void *data)
7507{
7508 struct device_node *node = data;
7509
7510 dev_dbg(dev, "%s: dev->of_node = 0x%p, node = 0x%p\n",
7511 __func__, dev->of_node, node);
7512 return (dev->of_node && dev->of_node == node);
7513}
7514
7515static int msm_audio_ssr_register(struct device *dev)
7516{
7517 struct device_node *np = dev->of_node;
7518 struct snd_event_clients *ssr_clients = NULL;
7519 struct device_node *node = NULL;
7520 int ret = 0;
7521 int i = 0;
7522
7523 for (i = 0; ; i++) {
7524 node = of_parse_phandle(np, "qcom,msm_audio_ssr_devs", i);
7525 if (!node)
7526 break;
7527 snd_event_mstr_add_client(&ssr_clients,
7528 msm_audio_ssr_compare, node);
7529 }
7530
7531 ret = snd_event_master_register(dev, &kona_ssr_ops,
7532 ssr_clients, NULL);
7533 if (!ret)
7534 snd_event_notify(dev, SND_EVENT_UP);
7535
7536 return ret;
7537}
7538
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]7539static int msm_asoc_machine_probe(struct platform_device *pdev)
7540{
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]7541 struct snd_soc_card *card = NULL;
7542 struct msm_asoc_mach_data *pdata = NULL;
7543 const char *mbhc_audio_jack_type = NULL;
7544 int ret = 0;
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame^]7545 uint index = 0;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]7546
7547 if (!pdev->dev.of_node) {
7548 dev_err(&pdev->dev, "%s: No platform supplied from device tree\n", __func__);
7549 return -EINVAL;
7550 }
7551
7552 pdata = devm_kzalloc(&pdev->dev,
7553 sizeof(struct msm_asoc_mach_data), GFP_KERNEL);
7554 if (!pdata)
7555 return -ENOMEM;
7556
7557 card = populate_snd_card_dailinks(&pdev->dev);
7558 if (!card) {
7559 dev_err(&pdev->dev, "%s: Card uninitialized\n", __func__);
7560 ret = -EINVAL;
7561 goto err;
7562 }
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]7563
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]7564 card->dev = &pdev->dev;
7565 platform_set_drvdata(pdev, card);
7566 snd_soc_card_set_drvdata(card, pdata);
7567
7568 ret = snd_soc_of_parse_card_name(card, "qcom,model");
7569 if (ret) {
7570 dev_err(&pdev->dev, "%s: parse card name failed, err:%d\n",
7571 __func__, ret);
7572 goto err;
7573 }
7574
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]7575 ret = snd_soc_of_parse_audio_routing(card, "qcom,audio-routing");
7576 if (ret) {
7577 dev_err(&pdev->dev, "%s: parse audio routing failed, err:%d\n",
7578 __func__, ret);
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]7579 goto err;
7580 }
7581
7582 ret = msm_populate_dai_link_component_of_node(card);
7583 if (ret) {
7584 ret = -EPROBE_DEFER;
7585 goto err;
7586 }
7587
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7588 ret = msm_init_aux_dev(pdev, card);
7589 if (ret)
7590 goto err;
7591
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]7592 ret = devm_snd_soc_register_card(&pdev->dev, card);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]7593 if (ret == -EPROBE_DEFER) {
7594 if (codec_reg_done)
7595 ret = -EINVAL;
7596 goto err;
7597 } else if (ret) {
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]7598 dev_err(&pdev->dev, "%s: snd_soc_register_card failed (%d)\n",
7599 __func__, ret);
7600 goto err;
7601 }
7602 dev_info(&pdev->dev, "%s: Sound card %s registered\n",
7603 __func__, card->name);
7604
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]7605 pdata->hph_en1_gpio_p = of_parse_phandle(pdev->dev.of_node,
7606 "qcom,hph-en1-gpio", 0);
7607 if (!pdata->hph_en1_gpio_p) {
7608 dev_dbg(&pdev->dev, "%s: property %s not detected in node %s\n",
7609 __func__, "qcom,hph-en1-gpio",
7610 pdev->dev.of_node->full_name);
7611 }
7612
7613 pdata->hph_en0_gpio_p = of_parse_phandle(pdev->dev.of_node,
7614 "qcom,hph-en0-gpio", 0);
7615 if (!pdata->hph_en0_gpio_p) {
7616 dev_dbg(&pdev->dev, "%s: property %s not detected in node %s\n",
7617 __func__, "qcom,hph-en0-gpio",
7618 pdev->dev.of_node->full_name);
7619 }
7620
7621 ret = of_property_read_string(pdev->dev.of_node,
7622 "qcom,mbhc-audio-jack-type", &mbhc_audio_jack_type);
7623 if (ret) {
7624 dev_dbg(&pdev->dev, "%s: Looking up %s property in node %s failed\n",
7625 __func__, "qcom,mbhc-audio-jack-type",
7626 pdev->dev.of_node->full_name);
7627 dev_dbg(&pdev->dev, "Jack type properties set to default\n");
7628 } else {
7629 if (!strcmp(mbhc_audio_jack_type, "4-pole-jack")) {
7630 wcd_mbhc_cfg.enable_anc_mic_detect = false;
7631 dev_dbg(&pdev->dev, "This hardware has 4 pole jack");
7632 } else if (!strcmp(mbhc_audio_jack_type, "5-pole-jack")) {
7633 wcd_mbhc_cfg.enable_anc_mic_detect = true;
7634 dev_dbg(&pdev->dev, "This hardware has 5 pole jack");
7635 } else if (!strcmp(mbhc_audio_jack_type, "6-pole-jack")) {
7636 wcd_mbhc_cfg.enable_anc_mic_detect = true;
7637 dev_dbg(&pdev->dev, "This hardware has 6 pole jack");
7638 } else {
7639 wcd_mbhc_cfg.enable_anc_mic_detect = false;
7640 dev_dbg(&pdev->dev, "Unknown value, set to default\n");
7641 }
7642 }
Karthikeyan Mani5eb13422018-11-05 13:49:17 -0800[diff] [blame]7643 /*
7644 * Parse US-Euro gpio info from DT. Report no error if us-euro
7645 * entry is not found in DT file as some targets do not support
7646 * US-Euro detection
7647 */
7648 pdata->us_euro_gpio_p = of_parse_phandle(pdev->dev.of_node,
7649 "qcom,us-euro-gpios", 0);
7650 if (!pdata->us_euro_gpio_p) {
7651 dev_dbg(&pdev->dev, "property %s not detected in node %s",
7652 "qcom,us-euro-gpios", pdev->dev.of_node->full_name);
7653 } else {
7654 dev_dbg(&pdev->dev, "%s detected\n",
7655 "qcom,us-euro-gpios");
7656 wcd_mbhc_cfg.swap_gnd_mic = msm_swap_gnd_mic;
7657 }
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]7658
Meng Wanga60b4082019-02-25 17:02:23 +0800[diff] [blame]7659 if (wcd_mbhc_cfg.enable_usbc_analog)
7660 wcd_mbhc_cfg.swap_gnd_mic = msm_usbc_swap_gnd_mic;
7661
7662 pdata->fsa_handle = of_parse_phandle(pdev->dev.of_node,
7663 "fsa4480-i2c-handle", 0);
7664 if (!pdata->fsa_handle)
7665 dev_dbg(&pdev->dev, "property %s not detected in node %s\n",
7666 "fsa4480-i2c-handle", pdev->dev.of_node->full_name);
7667
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]7668 msm_i2s_auxpcm_init(pdev);
Karthikeyan Mani1a111b92019-02-12 21:35:31 -0800[diff] [blame]7669 pdata->dmic01_gpio_p = of_parse_phandle(pdev->dev.of_node,
7670 "qcom,cdc-dmic01-gpios",
7671 0);
7672 pdata->dmic23_gpio_p = of_parse_phandle(pdev->dev.of_node,
7673 "qcom,cdc-dmic23-gpios",
7674 0);
7675 pdata->dmic45_gpio_p = of_parse_phandle(pdev->dev.of_node,
7676 "qcom,cdc-dmic45-gpios",
7677 0);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]7678
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame^]7679 pdata->mi2s_gpio_p[PRIM_MI2S] = of_parse_phandle(pdev->dev.of_node,
7680 "qcom,pri-mi2s-gpios", 0);
7681 pdata->mi2s_gpio_p[SEC_MI2S] = of_parse_phandle(pdev->dev.of_node,
7682 "qcom,sec-mi2s-gpios", 0);
7683 pdata->mi2s_gpio_p[TERT_MI2S] = of_parse_phandle(pdev->dev.of_node,
7684 "qcom,tert-mi2s-gpios", 0);
7685 pdata->mi2s_gpio_p[QUAT_MI2S] = of_parse_phandle(pdev->dev.of_node,
7686 "qcom,quat-mi2s-gpios", 0);
7687 pdata->mi2s_gpio_p[QUIN_MI2S] = of_parse_phandle(pdev->dev.of_node,
7688 "qcom,quin-mi2s-gpios", 0);
7689 pdata->mi2s_gpio_p[SEN_MI2S] = of_parse_phandle(pdev->dev.of_node,
7690 "qcom,sen-mi2s-gpios", 0);
7691 for (index = PRIM_MI2S; index < MI2S_MAX; index++)
7692 atomic_set(&(pdata->mi2s_gpio_ref_count[index]), 0);
7693
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]7694 ret = msm_audio_ssr_register(&pdev->dev);
7695 if (ret)
7696 pr_err("%s: Registration with SND event FWK failed ret = %d\n",
7697 __func__, ret);
7698
7699 is_initial_boot = true;
7700
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]7701 return 0;
7702err:
7703 devm_kfree(&pdev->dev, pdata);
7704 return ret;
7705}
7706
7707static int msm_asoc_machine_remove(struct platform_device *pdev)
7708{
7709 struct snd_soc_card *card = platform_get_drvdata(pdev);
7710
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]7711 snd_event_master_deregister(&pdev->dev);
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]7712 snd_soc_unregister_card(card);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]7713 msm_i2s_auxpcm_deinit();
7714
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]7715 return 0;
7716}
7717
7718static struct platform_driver kona_asoc_machine_driver = {
7719 .driver = {
7720 .name = DRV_NAME,
7721 .owner = THIS_MODULE,
7722 .pm = &snd_soc_pm_ops,
7723 .of_match_table = kona_asoc_machine_of_match,
Xiaojun Sang53cd13a2018-06-29 15:14:37 +0800[diff] [blame]7724 .suppress_bind_attrs = true,
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]7725 },
7726 .probe = msm_asoc_machine_probe,
7727 .remove = msm_asoc_machine_remove,
7728};
7729module_platform_driver(kona_asoc_machine_driver);
7730
7731MODULE_DESCRIPTION("ALSA SoC msm");
7732MODULE_LICENSE("GPL v2");
7733MODULE_ALIAS("platform:" DRV_NAME);
7734MODULE_DEVICE_TABLE(of, kona_asoc_machine_of_match);