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gerrit-public.fairphone.software / platform / vendor / opensource / audio-kernel / 8d37df9265d0d590228acd319a7ccb72fa40f5ff / . / asoc / bengal.c
blob: cb4f51313ce526117b2def92c1ece42900f79f65 [file] [log] [blame]
Laxminath Kasamae52c992019-08-26 15:01:15 +0530[diff] [blame]1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * Copyright (c) 2016-2019, The Linux Foundation. All rights reserved.
4 */
5
6#include <linux/clk.h>
7#include <linux/delay.h>
8#include <linux/gpio.h>
9#include <linux/of_gpio.h>
10#include <linux/platform_device.h>
11#include <linux/slab.h>
12#include <linux/io.h>
13#include <linux/module.h>
14#include <linux/input.h>
15#include <linux/of_device.h>
16#include <linux/soc/qcom/fsa4480-i2c.h>
Laxminath Kasam8d37df92019-11-22 15:46:11 +0530[diff] [blame^]17#include <linux/nvmem-consumer.h>
Laxminath Kasamae52c992019-08-26 15:01:15 +0530[diff] [blame]18#include <sound/core.h>
19#include <sound/soc.h>
20#include <sound/soc-dapm.h>
21#include <sound/pcm.h>
22#include <sound/pcm_params.h>
23#include <sound/info.h>
24#include <soc/snd_event.h>
25#include <dsp/audio_notifier.h>
26#include <soc/swr-common.h>
27#include <dsp/q6afe-v2.h>
28#include <dsp/q6core.h>
29#include "device_event.h"
30#include "msm-pcm-routing-v2.h"
31#include "asoc/msm-cdc-pinctrl.h"
32#include "asoc/wcd-mbhc-v2.h"
33#include "codecs/wcd937x/wcd937x-mbhc.h"
34#include "codecs/wsa881x-analog.h"
35#include "codecs/wcd937x/wcd937x.h"
36#include "codecs/bolero/bolero-cdc.h"
37#include <dt-bindings/sound/audio-codec-port-types.h>
38#include "bengal-port-config.h"
39
40#define DRV_NAME "bengal-asoc-snd"
41#define __CHIPSET__ "BENGAL "
42#define MSM_DAILINK_NAME(name) (__CHIPSET__#name)
43
44#define SAMPLING_RATE_8KHZ 8000
45#define SAMPLING_RATE_11P025KHZ 11025
46#define SAMPLING_RATE_16KHZ 16000
47#define SAMPLING_RATE_22P05KHZ 22050
48#define SAMPLING_RATE_32KHZ 32000
49#define SAMPLING_RATE_44P1KHZ 44100
50#define SAMPLING_RATE_48KHZ 48000
51#define SAMPLING_RATE_88P2KHZ 88200
52#define SAMPLING_RATE_96KHZ 96000
53#define SAMPLING_RATE_176P4KHZ 176400
54#define SAMPLING_RATE_192KHZ 192000
55#define SAMPLING_RATE_352P8KHZ 352800
56#define SAMPLING_RATE_384KHZ 384000
57
58#define WCD9XXX_MBHC_DEF_RLOADS 5
59#define WCD9XXX_MBHC_DEF_BUTTONS 8
60#define CODEC_EXT_CLK_RATE 9600000
61#define ADSP_STATE_READY_TIMEOUT_MS 3000
62#define DEV_NAME_STR_LEN 32
63#define WCD_MBHC_HS_V_MAX 1600
64
65#define TDM_CHANNEL_MAX 8
66#define DEV_NAME_STR_LEN 32
67
68/* time in us to ensure LPM doesn't go in C3/C4 */
69#define MSM_LL_QOS_VALUE 300
70
71#define ADSP_STATE_READY_TIMEOUT_MS 3000
72
73#define WCN_CDC_SLIM_RX_CH_MAX 2
74#define WCN_CDC_SLIM_TX_CH_MAX 3
75
76enum {
77 TDM_0 = 0,
78 TDM_1,
79 TDM_2,
80 TDM_3,
81 TDM_4,
82 TDM_5,
83 TDM_6,
84 TDM_7,
85 TDM_PORT_MAX,
86};
87
88enum {
89 TDM_PRI = 0,
90 TDM_SEC,
91 TDM_TERT,
92 TDM_QUAT,
93 TDM_INTERFACE_MAX,
94};
95
96enum {
97 PRIM_AUX_PCM = 0,
98 SEC_AUX_PCM,
99 TERT_AUX_PCM,
100 QUAT_AUX_PCM,
101 AUX_PCM_MAX,
102};
103
104enum {
105 PRIM_MI2S = 0,
106 SEC_MI2S,
107 TERT_MI2S,
108 QUAT_MI2S,
109 MI2S_MAX,
110};
111
112enum {
113 RX_CDC_DMA_RX_0 = 0,
114 RX_CDC_DMA_RX_1,
115 RX_CDC_DMA_RX_2,
116 RX_CDC_DMA_RX_3,
117 RX_CDC_DMA_RX_5,
118 CDC_DMA_RX_MAX,
119};
120
121enum {
122 TX_CDC_DMA_TX_0 = 0,
123 TX_CDC_DMA_TX_3,
124 TX_CDC_DMA_TX_4,
125 VA_CDC_DMA_TX_0,
126 VA_CDC_DMA_TX_1,
127 VA_CDC_DMA_TX_2,
128 CDC_DMA_TX_MAX,
129};
130
131enum {
132 SLIM_RX_7 = 0,
133 SLIM_RX_MAX,
134};
135
136enum {
137 SLIM_TX_7 = 0,
138 SLIM_TX_8,
139 SLIM_TX_MAX,
140};
141
142enum {
143 AFE_LOOPBACK_TX_IDX = 0,
144 AFE_LOOPBACK_TX_IDX_MAX,
145};
146struct msm_asoc_mach_data {
147 struct snd_info_entry *codec_root;
148 int usbc_en2_gpio; /* used by gpio driver API */
149 struct device_node *dmic01_gpio_p; /* used by pinctrl API */
150 struct device_node *dmic23_gpio_p; /* used by pinctrl API */
151 struct device_node *mi2s_gpio_p[MI2S_MAX]; /* used by pinctrl API */
152 atomic_t mi2s_gpio_ref_count[MI2S_MAX]; /* used by pinctrl API */
153 struct device_node *us_euro_gpio_p; /* used by pinctrl API */
154 struct pinctrl *usbc_en2_gpio_p; /* used by pinctrl API */
155 struct device_node *hph_en1_gpio_p; /* used by pinctrl API */
156 struct device_node *hph_en0_gpio_p; /* used by pinctrl API */
157 bool is_afe_config_done;
158 struct device_node *fsa_handle;
159};
160
161struct tdm_port {
162 u32 mode;
163 u32 channel;
164};
165
166enum {
167 EXT_DISP_RX_IDX_DP = 0,
168 EXT_DISP_RX_IDX_DP1,
169 EXT_DISP_RX_IDX_MAX,
170};
171
172struct msm_wsa881x_dev_info {
173 struct device_node *of_node;
174 u32 index;
175};
176
177struct aux_codec_dev_info {
178 struct device_node *of_node;
179 u32 index;
180};
181
182struct dev_config {
183 u32 sample_rate;
184 u32 bit_format;
185 u32 channels;
186};
187
188/* Default configuration of slimbus channels */
189static struct dev_config slim_rx_cfg[] = {
190 [SLIM_RX_7] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
191};
192
193static struct dev_config slim_tx_cfg[] = {
194 [SLIM_TX_7] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
195 [SLIM_TX_8] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
196};
197
198static struct dev_config usb_rx_cfg = {
199 .sample_rate = SAMPLING_RATE_48KHZ,
200 .bit_format = SNDRV_PCM_FORMAT_S16_LE,
201 .channels = 2,
202};
203
204static struct dev_config usb_tx_cfg = {
205 .sample_rate = SAMPLING_RATE_48KHZ,
206 .bit_format = SNDRV_PCM_FORMAT_S16_LE,
207 .channels = 1,
208};
209
210static struct dev_config proxy_rx_cfg = {
211 .sample_rate = SAMPLING_RATE_48KHZ,
212 .bit_format = SNDRV_PCM_FORMAT_S16_LE,
213 .channels = 2,
214};
215
216static struct afe_clk_set mi2s_clk[MI2S_MAX] = {
217 {
218 AFE_API_VERSION_I2S_CONFIG,
219 Q6AFE_LPASS_CLK_ID_PRI_MI2S_IBIT,
220 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
221 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
222 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
223 0,
224 },
225 {
226 AFE_API_VERSION_I2S_CONFIG,
227 Q6AFE_LPASS_CLK_ID_SEC_MI2S_IBIT,
228 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
229 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
230 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
231 0,
232 },
233 {
234 AFE_API_VERSION_I2S_CONFIG,
235 Q6AFE_LPASS_CLK_ID_TER_MI2S_IBIT,
236 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
237 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
238 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
239 0,
240 },
241 {
242 AFE_API_VERSION_I2S_CONFIG,
243 Q6AFE_LPASS_CLK_ID_QUAD_MI2S_IBIT,
244 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
245 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
246 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
247 0,
248 },
249};
250
251struct mi2s_conf {
252 struct mutex lock;
253 u32 ref_cnt;
254 u32 msm_is_mi2s_master;
255};
256
257static u32 mi2s_ebit_clk[MI2S_MAX] = {
258 Q6AFE_LPASS_CLK_ID_PRI_MI2S_EBIT,
259 Q6AFE_LPASS_CLK_ID_SEC_MI2S_EBIT,
260 Q6AFE_LPASS_CLK_ID_TER_MI2S_EBIT,
261};
262
263static struct mi2s_conf mi2s_intf_conf[MI2S_MAX];
Laxminath Kasam8d37df92019-11-22 15:46:11 +0530[diff] [blame^]264static bool va_disable;
Laxminath Kasamae52c992019-08-26 15:01:15 +0530[diff] [blame]265
266/* Default configuration of TDM channels */
267static struct dev_config tdm_rx_cfg[TDM_INTERFACE_MAX][TDM_PORT_MAX] = {
268 { /* PRI TDM */
269 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
270 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
271 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
272 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
273 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
274 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
275 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
276 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
277 },
278 { /* SEC TDM */
279 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
280 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
281 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
282 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
283 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
284 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
285 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
286 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
287 },
288 { /* TERT TDM */
289 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
290 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
291 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
292 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
293 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
294 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
295 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
296 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
297 },
298 { /* QUAT TDM */
299 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
300 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
301 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
302 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
303 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
304 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
305 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
306 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
307 },
308};
309
310static struct dev_config tdm_tx_cfg[TDM_INTERFACE_MAX][TDM_PORT_MAX] = {
311 { /* PRI TDM */
312 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
313 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
314 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
315 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
316 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
317 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
318 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
319 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
320 },
321 { /* SEC TDM */
322 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
323 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
324 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
325 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
326 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
327 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
328 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
329 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
330 },
331 { /* TERT TDM */
332 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
333 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
334 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
335 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
336 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
337 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
338 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
339 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
340 },
341 { /* QUAT TDM */
342 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
343 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
344 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
345 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
346 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
347 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
348 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
349 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
350 },
351};
352
353/* Default configuration of AUX PCM channels */
354static struct dev_config aux_pcm_rx_cfg[] = {
355 [PRIM_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
356 [SEC_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
357 [TERT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
358 [QUAT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
359};
360
361static struct dev_config aux_pcm_tx_cfg[] = {
362 [PRIM_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
363 [SEC_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
364 [TERT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
365 [QUAT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
366};
367
368/* Default configuration of MI2S channels */
369static struct dev_config mi2s_rx_cfg[] = {
370 [PRIM_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
371 [SEC_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
372 [TERT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
373 [QUAT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
374};
375
376static struct dev_config mi2s_tx_cfg[] = {
377 [PRIM_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
378 [SEC_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
379 [TERT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
380 [QUAT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
381};
382
383/* Default configuration of Codec DMA Interface RX */
384static struct dev_config cdc_dma_rx_cfg[] = {
385 [RX_CDC_DMA_RX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
386 [RX_CDC_DMA_RX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
387 [RX_CDC_DMA_RX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
388 [RX_CDC_DMA_RX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
389 [RX_CDC_DMA_RX_5] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
390};
391
392/* Default configuration of Codec DMA Interface TX */
393static struct dev_config cdc_dma_tx_cfg[] = {
394 [TX_CDC_DMA_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
395 [TX_CDC_DMA_TX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
396 [TX_CDC_DMA_TX_4] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
397 [VA_CDC_DMA_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 8},
398 [VA_CDC_DMA_TX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 8},
399 [VA_CDC_DMA_TX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 8},
400};
401
402static struct dev_config afe_loopback_tx_cfg[] = {
403 [AFE_LOOPBACK_TX_IDX] = {
404 SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
405};
406
407static int msm_vi_feed_tx_ch = 2;
408static const char *const vi_feed_ch_text[] = {"One", "Two"};
409static char const *bit_format_text[] = {"S16_LE", "S24_LE", "S24_3LE",
410 "S32_LE"};
411static char const *ch_text[] = {"Two", "Three", "Four", "Five",
412 "Six", "Seven", "Eight"};
413static char const *usb_sample_rate_text[] = {"KHZ_8", "KHZ_11P025",
414 "KHZ_16", "KHZ_22P05",
415 "KHZ_32", "KHZ_44P1", "KHZ_48",
416 "KHZ_88P2", "KHZ_96", "KHZ_176P4",
417 "KHZ_192", "KHZ_352P8", "KHZ_384"};
418static const char *const usb_ch_text[] = {"One", "Two", "Three", "Four",
419 "Five", "Six", "Seven",
420 "Eight"};
421static char const *tdm_sample_rate_text[] = {"KHZ_8", "KHZ_16", "KHZ_32",
422 "KHZ_48", "KHZ_176P4",
423 "KHZ_352P8"};
424static char const *tdm_bit_format_text[] = {"S16_LE", "S24_LE", "S32_LE"};
425static char const *tdm_ch_text[] = {"One", "Two", "Three", "Four",
426 "Five", "Six", "Seven", "Eight"};
427static const char *const auxpcm_rate_text[] = {"KHZ_8", "KHZ_16"};
428static char const *mi2s_rate_text[] = {"KHZ_8", "KHZ_11P025", "KHZ_16",
429 "KHZ_22P05", "KHZ_32", "KHZ_44P1",
430 "KHZ_48", "KHZ_96", "KHZ_192"};
431static const char *const mi2s_ch_text[] = {"One", "Two", "Three", "Four",
432 "Five", "Six", "Seven",
433 "Eight"};
434
435static const char *const cdc_dma_rx_ch_text[] = {"One", "Two"};
436static const char *const cdc_dma_tx_ch_text[] = {"One", "Two", "Three", "Four",
437 "Five", "Six", "Seven",
438 "Eight"};
439static char const *cdc_dma_sample_rate_text[] = {"KHZ_8", "KHZ_11P025",
440 "KHZ_16", "KHZ_22P05",
441 "KHZ_32", "KHZ_44P1", "KHZ_48",
442 "KHZ_88P2", "KHZ_96",
443 "KHZ_176P4", "KHZ_192",
444 "KHZ_352P8", "KHZ_384"};
445static char const *bt_sample_rate_text[] = {"KHZ_8", "KHZ_16",
446 "KHZ_44P1", "KHZ_48",
447 "KHZ_88P2", "KHZ_96"};
448static char const *bt_sample_rate_rx_text[] = {"KHZ_8", "KHZ_16",
449 "KHZ_44P1", "KHZ_48",
450 "KHZ_88P2", "KHZ_96"};
451static char const *bt_sample_rate_tx_text[] = {"KHZ_8", "KHZ_16",
452 "KHZ_44P1", "KHZ_48",
453 "KHZ_88P2", "KHZ_96"};
454static const char *const afe_loopback_tx_ch_text[] = {"One", "Two"};
455
456static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_sample_rate, usb_sample_rate_text);
457static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_sample_rate, usb_sample_rate_text);
458static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_format, bit_format_text);
459static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_format, bit_format_text);
460static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_chs, usb_ch_text);
461static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_chs, usb_ch_text);
462static SOC_ENUM_SINGLE_EXT_DECL(vi_feed_tx_chs, vi_feed_ch_text);
463static SOC_ENUM_SINGLE_EXT_DECL(proxy_rx_chs, ch_text);
464static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_sample_rate, tdm_sample_rate_text);
465static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_sample_rate, tdm_sample_rate_text);
466static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_format, tdm_bit_format_text);
467static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_format, tdm_bit_format_text);
468static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_chs, tdm_ch_text);
469static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_chs, tdm_ch_text);
470static SOC_ENUM_SINGLE_EXT_DECL(prim_aux_pcm_rx_sample_rate, auxpcm_rate_text);
471static SOC_ENUM_SINGLE_EXT_DECL(sec_aux_pcm_rx_sample_rate, auxpcm_rate_text);
472static SOC_ENUM_SINGLE_EXT_DECL(tert_aux_pcm_rx_sample_rate, auxpcm_rate_text);
473static SOC_ENUM_SINGLE_EXT_DECL(quat_aux_pcm_rx_sample_rate, auxpcm_rate_text);
474static SOC_ENUM_SINGLE_EXT_DECL(prim_aux_pcm_tx_sample_rate, auxpcm_rate_text);
475static SOC_ENUM_SINGLE_EXT_DECL(sec_aux_pcm_tx_sample_rate, auxpcm_rate_text);
476static SOC_ENUM_SINGLE_EXT_DECL(tert_aux_pcm_tx_sample_rate, auxpcm_rate_text);
477static SOC_ENUM_SINGLE_EXT_DECL(quat_aux_pcm_tx_sample_rate, auxpcm_rate_text);
478static SOC_ENUM_SINGLE_EXT_DECL(aux_pcm_rx_format, bit_format_text);
479static SOC_ENUM_SINGLE_EXT_DECL(aux_pcm_tx_format, bit_format_text);
480static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_rx_sample_rate, mi2s_rate_text);
481static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_rx_sample_rate, mi2s_rate_text);
482static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_rx_sample_rate, mi2s_rate_text);
483static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_rx_sample_rate, mi2s_rate_text);
484static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_tx_sample_rate, mi2s_rate_text);
485static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_tx_sample_rate, mi2s_rate_text);
486static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_tx_sample_rate, mi2s_rate_text);
487static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_tx_sample_rate, mi2s_rate_text);
488static SOC_ENUM_SINGLE_EXT_DECL(mi2s_rx_format, bit_format_text);
489static SOC_ENUM_SINGLE_EXT_DECL(mi2s_tx_format, bit_format_text);
490static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_rx_chs, mi2s_ch_text);
491static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_rx_chs, mi2s_ch_text);
492static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_rx_chs, mi2s_ch_text);
493static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_rx_chs, mi2s_ch_text);
494static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_tx_chs, mi2s_ch_text);
495static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_tx_chs, mi2s_ch_text);
496static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_tx_chs, mi2s_ch_text);
497static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_tx_chs, mi2s_ch_text);
498static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_chs, cdc_dma_rx_ch_text);
499static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_chs, cdc_dma_rx_ch_text);
500static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_chs, cdc_dma_rx_ch_text);
501static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_chs, cdc_dma_rx_ch_text);
502static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_chs, cdc_dma_rx_ch_text);
503static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_chs, cdc_dma_tx_ch_text);
504static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_chs, cdc_dma_tx_ch_text);
505static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_chs, cdc_dma_tx_ch_text);
506static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_0_chs, cdc_dma_tx_ch_text);
507static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_1_chs, cdc_dma_tx_ch_text);
508static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_2_chs, cdc_dma_tx_ch_text);
509static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_format, bit_format_text);
510static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_format, bit_format_text);
511static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_format, bit_format_text);
512static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_format, bit_format_text);
513static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_format, bit_format_text);
514static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_format, bit_format_text);
515static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_format, bit_format_text);
516static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_format, bit_format_text);
517static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_0_format, bit_format_text);
518static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_1_format, bit_format_text);
519static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_2_format, bit_format_text);
520static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_sample_rate,
521 cdc_dma_sample_rate_text);
522static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_sample_rate,
523 cdc_dma_sample_rate_text);
524static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_sample_rate,
525 cdc_dma_sample_rate_text);
526static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_sample_rate,
527 cdc_dma_sample_rate_text);
528static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_sample_rate,
529 cdc_dma_sample_rate_text);
530static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_sample_rate,
531 cdc_dma_sample_rate_text);
532static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_sample_rate,
533 cdc_dma_sample_rate_text);
534static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_sample_rate,
535 cdc_dma_sample_rate_text);
536static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_0_sample_rate,
537 cdc_dma_sample_rate_text);
538static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_1_sample_rate,
539 cdc_dma_sample_rate_text);
540static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_2_sample_rate,
541 cdc_dma_sample_rate_text);
542static SOC_ENUM_SINGLE_EXT_DECL(bt_sample_rate, bt_sample_rate_text);
543static SOC_ENUM_SINGLE_EXT_DECL(bt_sample_rate_rx, bt_sample_rate_rx_text);
544static SOC_ENUM_SINGLE_EXT_DECL(bt_sample_rate_tx, bt_sample_rate_tx_text);
545static SOC_ENUM_SINGLE_EXT_DECL(afe_loopback_tx_chs, afe_loopback_tx_ch_text);
546
547static bool is_initial_boot;
548static bool codec_reg_done;
549static struct snd_soc_aux_dev *msm_aux_dev;
550static struct snd_soc_codec_conf *msm_codec_conf;
551static struct snd_soc_card snd_soc_card_bengal_msm;
552static int dmic_0_1_gpio_cnt;
553static int dmic_2_3_gpio_cnt;
554
555static void *def_wcd_mbhc_cal(void);
556
557/*
558 * Need to report LINEIN
559 * if R/L channel impedance is larger than 5K ohm
560 */
561static struct wcd_mbhc_config wcd_mbhc_cfg = {
562 .read_fw_bin = false,
563 .calibration = NULL,
564 .detect_extn_cable = true,
565 .mono_stero_detection = false,
566 .swap_gnd_mic = NULL,
567 .hs_ext_micbias = true,
568 .key_code[0] = KEY_MEDIA,
569 .key_code[1] = KEY_VOICECOMMAND,
570 .key_code[2] = KEY_VOLUMEUP,
571 .key_code[3] = KEY_VOLUMEDOWN,
572 .key_code[4] = 0,
573 .key_code[5] = 0,
574 .key_code[6] = 0,
575 .key_code[7] = 0,
576 .linein_th = 5000,
577 .moisture_en = false,
578 .mbhc_micbias = MIC_BIAS_2,
579 .anc_micbias = MIC_BIAS_2,
580 .enable_anc_mic_detect = false,
581 .moisture_duty_cycle_en = true,
582};
583
584static inline int param_is_mask(int p)
585{
586 return (p >= SNDRV_PCM_HW_PARAM_FIRST_MASK) &&
587 (p <= SNDRV_PCM_HW_PARAM_LAST_MASK);
588}
589
590static inline struct snd_mask *param_to_mask(struct snd_pcm_hw_params *p,
591 int n)
592{
593 return &(p->masks[n - SNDRV_PCM_HW_PARAM_FIRST_MASK]);
594}
595
596static void param_set_mask(struct snd_pcm_hw_params *p, int n,
597 unsigned int bit)
598{
599 if (bit >= SNDRV_MASK_MAX)
600 return;
601 if (param_is_mask(n)) {
602 struct snd_mask *m = param_to_mask(p, n);
603
604 m->bits[0] = 0;
605 m->bits[1] = 0;
606 m->bits[bit >> 5] |= (1 << (bit & 31));
607 }
608}
609
610static int usb_audio_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
611 struct snd_ctl_elem_value *ucontrol)
612{
613 int sample_rate_val = 0;
614
615 switch (usb_rx_cfg.sample_rate) {
616 case SAMPLING_RATE_384KHZ:
617 sample_rate_val = 12;
618 break;
619 case SAMPLING_RATE_352P8KHZ:
620 sample_rate_val = 11;
621 break;
622 case SAMPLING_RATE_192KHZ:
623 sample_rate_val = 10;
624 break;
625 case SAMPLING_RATE_176P4KHZ:
626 sample_rate_val = 9;
627 break;
628 case SAMPLING_RATE_96KHZ:
629 sample_rate_val = 8;
630 break;
631 case SAMPLING_RATE_88P2KHZ:
632 sample_rate_val = 7;
633 break;
634 case SAMPLING_RATE_48KHZ:
635 sample_rate_val = 6;
636 break;
637 case SAMPLING_RATE_44P1KHZ:
638 sample_rate_val = 5;
639 break;
640 case SAMPLING_RATE_32KHZ:
641 sample_rate_val = 4;
642 break;
643 case SAMPLING_RATE_22P05KHZ:
644 sample_rate_val = 3;
645 break;
646 case SAMPLING_RATE_16KHZ:
647 sample_rate_val = 2;
648 break;
649 case SAMPLING_RATE_11P025KHZ:
650 sample_rate_val = 1;
651 break;
652 case SAMPLING_RATE_8KHZ:
653 default:
654 sample_rate_val = 0;
655 break;
656 }
657
658 ucontrol->value.integer.value[0] = sample_rate_val;
659 pr_debug("%s: usb_audio_rx_sample_rate = %d\n", __func__,
660 usb_rx_cfg.sample_rate);
661 return 0;
662}
663
664static int usb_audio_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
665 struct snd_ctl_elem_value *ucontrol)
666{
667 switch (ucontrol->value.integer.value[0]) {
668 case 12:
669 usb_rx_cfg.sample_rate = SAMPLING_RATE_384KHZ;
670 break;
671 case 11:
672 usb_rx_cfg.sample_rate = SAMPLING_RATE_352P8KHZ;
673 break;
674 case 10:
675 usb_rx_cfg.sample_rate = SAMPLING_RATE_192KHZ;
676 break;
677 case 9:
678 usb_rx_cfg.sample_rate = SAMPLING_RATE_176P4KHZ;
679 break;
680 case 8:
681 usb_rx_cfg.sample_rate = SAMPLING_RATE_96KHZ;
682 break;
683 case 7:
684 usb_rx_cfg.sample_rate = SAMPLING_RATE_88P2KHZ;
685 break;
686 case 6:
687 usb_rx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
688 break;
689 case 5:
690 usb_rx_cfg.sample_rate = SAMPLING_RATE_44P1KHZ;
691 break;
692 case 4:
693 usb_rx_cfg.sample_rate = SAMPLING_RATE_32KHZ;
694 break;
695 case 3:
696 usb_rx_cfg.sample_rate = SAMPLING_RATE_22P05KHZ;
697 break;
698 case 2:
699 usb_rx_cfg.sample_rate = SAMPLING_RATE_16KHZ;
700 break;
701 case 1:
702 usb_rx_cfg.sample_rate = SAMPLING_RATE_11P025KHZ;
703 break;
704 case 0:
705 usb_rx_cfg.sample_rate = SAMPLING_RATE_8KHZ;
706 break;
707 default:
708 usb_rx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
709 break;
710 }
711
712 pr_debug("%s: control value = %ld, usb_audio_rx_sample_rate = %d\n",
713 __func__, ucontrol->value.integer.value[0],
714 usb_rx_cfg.sample_rate);
715 return 0;
716}
717
718static int usb_audio_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
719 struct snd_ctl_elem_value *ucontrol)
720{
721 int sample_rate_val = 0;
722
723 switch (usb_tx_cfg.sample_rate) {
724 case SAMPLING_RATE_384KHZ:
725 sample_rate_val = 12;
726 break;
727 case SAMPLING_RATE_352P8KHZ:
728 sample_rate_val = 11;
729 break;
730 case SAMPLING_RATE_192KHZ:
731 sample_rate_val = 10;
732 break;
733 case SAMPLING_RATE_176P4KHZ:
734 sample_rate_val = 9;
735 break;
736 case SAMPLING_RATE_96KHZ:
737 sample_rate_val = 8;
738 break;
739 case SAMPLING_RATE_88P2KHZ:
740 sample_rate_val = 7;
741 break;
742 case SAMPLING_RATE_48KHZ:
743 sample_rate_val = 6;
744 break;
745 case SAMPLING_RATE_44P1KHZ:
746 sample_rate_val = 5;
747 break;
748 case SAMPLING_RATE_32KHZ:
749 sample_rate_val = 4;
750 break;
751 case SAMPLING_RATE_22P05KHZ:
752 sample_rate_val = 3;
753 break;
754 case SAMPLING_RATE_16KHZ:
755 sample_rate_val = 2;
756 break;
757 case SAMPLING_RATE_11P025KHZ:
758 sample_rate_val = 1;
759 break;
760 case SAMPLING_RATE_8KHZ:
761 sample_rate_val = 0;
762 break;
763 default:
764 sample_rate_val = 6;
765 break;
766 }
767
768 ucontrol->value.integer.value[0] = sample_rate_val;
769 pr_debug("%s: usb_audio_tx_sample_rate = %d\n", __func__,
770 usb_tx_cfg.sample_rate);
771 return 0;
772}
773
774static int usb_audio_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
775 struct snd_ctl_elem_value *ucontrol)
776{
777 switch (ucontrol->value.integer.value[0]) {
778 case 12:
779 usb_tx_cfg.sample_rate = SAMPLING_RATE_384KHZ;
780 break;
781 case 11:
782 usb_tx_cfg.sample_rate = SAMPLING_RATE_352P8KHZ;
783 break;
784 case 10:
785 usb_tx_cfg.sample_rate = SAMPLING_RATE_192KHZ;
786 break;
787 case 9:
788 usb_tx_cfg.sample_rate = SAMPLING_RATE_176P4KHZ;
789 break;
790 case 8:
791 usb_tx_cfg.sample_rate = SAMPLING_RATE_96KHZ;
792 break;
793 case 7:
794 usb_tx_cfg.sample_rate = SAMPLING_RATE_88P2KHZ;
795 break;
796 case 6:
797 usb_tx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
798 break;
799 case 5:
800 usb_tx_cfg.sample_rate = SAMPLING_RATE_44P1KHZ;
801 break;
802 case 4:
803 usb_tx_cfg.sample_rate = SAMPLING_RATE_32KHZ;
804 break;
805 case 3:
806 usb_tx_cfg.sample_rate = SAMPLING_RATE_22P05KHZ;
807 break;
808 case 2:
809 usb_tx_cfg.sample_rate = SAMPLING_RATE_16KHZ;
810 break;
811 case 1:
812 usb_tx_cfg.sample_rate = SAMPLING_RATE_11P025KHZ;
813 break;
814 case 0:
815 usb_tx_cfg.sample_rate = SAMPLING_RATE_8KHZ;
816 break;
817 default:
818 usb_tx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
819 break;
820 }
821
822 pr_debug("%s: control value = %ld, usb_audio_tx_sample_rate = %d\n",
823 __func__, ucontrol->value.integer.value[0],
824 usb_tx_cfg.sample_rate);
825 return 0;
826}
827static int afe_loopback_tx_ch_get(struct snd_kcontrol *kcontrol,
828 struct snd_ctl_elem_value *ucontrol)
829{
830 pr_debug("%s: afe_loopback_tx_ch = %d\n", __func__,
831 afe_loopback_tx_cfg[0].channels);
832 ucontrol->value.enumerated.item[0] =
833 afe_loopback_tx_cfg[0].channels - 1;
834
835 return 0;
836}
837
838static int afe_loopback_tx_ch_put(struct snd_kcontrol *kcontrol,
839 struct snd_ctl_elem_value *ucontrol)
840{
841 afe_loopback_tx_cfg[0].channels =
842 ucontrol->value.enumerated.item[0] + 1;
843 pr_debug("%s: afe_loopback_tx_ch = %d\n", __func__,
844 afe_loopback_tx_cfg[0].channels);
845
846 return 1;
847}
848
849static int usb_audio_rx_format_get(struct snd_kcontrol *kcontrol,
850 struct snd_ctl_elem_value *ucontrol)
851{
852 switch (usb_rx_cfg.bit_format) {
853 case SNDRV_PCM_FORMAT_S32_LE:
854 ucontrol->value.integer.value[0] = 3;
855 break;
856 case SNDRV_PCM_FORMAT_S24_3LE:
857 ucontrol->value.integer.value[0] = 2;
858 break;
859 case SNDRV_PCM_FORMAT_S24_LE:
860 ucontrol->value.integer.value[0] = 1;
861 break;
862 case SNDRV_PCM_FORMAT_S16_LE:
863 default:
864 ucontrol->value.integer.value[0] = 0;
865 break;
866 }
867
868 pr_debug("%s: usb_audio_rx_format = %d, ucontrol value = %ld\n",
869 __func__, usb_rx_cfg.bit_format,
870 ucontrol->value.integer.value[0]);
871 return 0;
872}
873
874static int usb_audio_rx_format_put(struct snd_kcontrol *kcontrol,
875 struct snd_ctl_elem_value *ucontrol)
876{
877 int rc = 0;
878
879 switch (ucontrol->value.integer.value[0]) {
880 case 3:
881 usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S32_LE;
882 break;
883 case 2:
884 usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_3LE;
885 break;
886 case 1:
887 usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_LE;
888 break;
889 case 0:
890 default:
891 usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S16_LE;
892 break;
893 }
894 pr_debug("%s: usb_audio_rx_format = %d, ucontrol value = %ld\n",
895 __func__, usb_rx_cfg.bit_format,
896 ucontrol->value.integer.value[0]);
897
898 return rc;
899}
900
901static int usb_audio_tx_format_get(struct snd_kcontrol *kcontrol,
902 struct snd_ctl_elem_value *ucontrol)
903{
904 switch (usb_tx_cfg.bit_format) {
905 case SNDRV_PCM_FORMAT_S32_LE:
906 ucontrol->value.integer.value[0] = 3;
907 break;
908 case SNDRV_PCM_FORMAT_S24_3LE:
909 ucontrol->value.integer.value[0] = 2;
910 break;
911 case SNDRV_PCM_FORMAT_S24_LE:
912 ucontrol->value.integer.value[0] = 1;
913 break;
914 case SNDRV_PCM_FORMAT_S16_LE:
915 default:
916 ucontrol->value.integer.value[0] = 0;
917 break;
918 }
919
920 pr_debug("%s: usb_audio_tx_format = %d, ucontrol value = %ld\n",
921 __func__, usb_tx_cfg.bit_format,
922 ucontrol->value.integer.value[0]);
923 return 0;
924}
925
926static int usb_audio_tx_format_put(struct snd_kcontrol *kcontrol,
927 struct snd_ctl_elem_value *ucontrol)
928{
929 int rc = 0;
930
931 switch (ucontrol->value.integer.value[0]) {
932 case 3:
933 usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S32_LE;
934 break;
935 case 2:
936 usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_3LE;
937 break;
938 case 1:
939 usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_LE;
940 break;
941 case 0:
942 default:
943 usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S16_LE;
944 break;
945 }
946 pr_debug("%s: usb_audio_tx_format = %d, ucontrol value = %ld\n",
947 __func__, usb_tx_cfg.bit_format,
948 ucontrol->value.integer.value[0]);
949
950 return rc;
951}
952
953static int usb_audio_rx_ch_get(struct snd_kcontrol *kcontrol,
954 struct snd_ctl_elem_value *ucontrol)
955{
956 pr_debug("%s: usb_audio_rx_ch = %d\n", __func__,
957 usb_rx_cfg.channels);
958 ucontrol->value.integer.value[0] = usb_rx_cfg.channels - 1;
959 return 0;
960}
961
962static int usb_audio_rx_ch_put(struct snd_kcontrol *kcontrol,
963 struct snd_ctl_elem_value *ucontrol)
964{
965 usb_rx_cfg.channels = ucontrol->value.integer.value[0] + 1;
966
967 pr_debug("%s: usb_audio_rx_ch = %d\n", __func__, usb_rx_cfg.channels);
968 return 1;
969}
970
971static int usb_audio_tx_ch_get(struct snd_kcontrol *kcontrol,
972 struct snd_ctl_elem_value *ucontrol)
973{
974 pr_debug("%s: usb_audio_tx_ch = %d\n", __func__,
975 usb_tx_cfg.channels);
976 ucontrol->value.integer.value[0] = usb_tx_cfg.channels - 1;
977 return 0;
978}
979
980static int usb_audio_tx_ch_put(struct snd_kcontrol *kcontrol,
981 struct snd_ctl_elem_value *ucontrol)
982{
983 usb_tx_cfg.channels = ucontrol->value.integer.value[0] + 1;
984
985 pr_debug("%s: usb_audio_tx_ch = %d\n", __func__, usb_tx_cfg.channels);
986 return 1;
987}
988
989static int msm_vi_feed_tx_ch_get(struct snd_kcontrol *kcontrol,
990 struct snd_ctl_elem_value *ucontrol)
991{
992 ucontrol->value.integer.value[0] = msm_vi_feed_tx_ch - 1;
993 pr_debug("%s: msm_vi_feed_tx_ch = %ld\n", __func__,
994 ucontrol->value.integer.value[0]);
995 return 0;
996}
997
998static int msm_vi_feed_tx_ch_put(struct snd_kcontrol *kcontrol,
999 struct snd_ctl_elem_value *ucontrol)
1000{
1001 msm_vi_feed_tx_ch = ucontrol->value.integer.value[0] + 1;
1002 pr_debug("%s: msm_vi_feed_tx_ch = %d\n", __func__, msm_vi_feed_tx_ch);
1003 return 1;
1004}
1005
1006static int proxy_rx_ch_get(struct snd_kcontrol *kcontrol,
1007 struct snd_ctl_elem_value *ucontrol)
1008{
1009 pr_debug("%s: proxy_rx channels = %d\n",
1010 __func__, proxy_rx_cfg.channels);
1011 ucontrol->value.integer.value[0] = proxy_rx_cfg.channels - 2;
1012
1013 return 0;
1014}
1015
1016static int proxy_rx_ch_put(struct snd_kcontrol *kcontrol,
1017 struct snd_ctl_elem_value *ucontrol)
1018{
1019 proxy_rx_cfg.channels = ucontrol->value.integer.value[0] + 2;
1020 pr_debug("%s: proxy_rx channels = %d\n",
1021 __func__, proxy_rx_cfg.channels);
1022
1023 return 1;
1024}
1025
1026static int tdm_get_port_idx(struct snd_kcontrol *kcontrol,
1027 struct tdm_port *port)
1028{
1029 if (port) {
1030 if (strnstr(kcontrol->id.name, "PRI",
1031 sizeof(kcontrol->id.name))) {
1032 port->mode = TDM_PRI;
1033 } else if (strnstr(kcontrol->id.name, "SEC",
1034 sizeof(kcontrol->id.name))) {
1035 port->mode = TDM_SEC;
1036 } else if (strnstr(kcontrol->id.name, "TERT",
1037 sizeof(kcontrol->id.name))) {
1038 port->mode = TDM_TERT;
1039 } else if (strnstr(kcontrol->id.name, "QUAT",
1040 sizeof(kcontrol->id.name))) {
1041 port->mode = TDM_QUAT;
1042 } else {
1043 pr_err("%s: unsupported mode in: %s\n",
1044 __func__, kcontrol->id.name);
1045 return -EINVAL;
1046 }
1047
1048 if (strnstr(kcontrol->id.name, "RX_0",
1049 sizeof(kcontrol->id.name)) ||
1050 strnstr(kcontrol->id.name, "TX_0",
1051 sizeof(kcontrol->id.name))) {
1052 port->channel = TDM_0;
1053 } else if (strnstr(kcontrol->id.name, "RX_1",
1054 sizeof(kcontrol->id.name)) ||
1055 strnstr(kcontrol->id.name, "TX_1",
1056 sizeof(kcontrol->id.name))) {
1057 port->channel = TDM_1;
1058 } else if (strnstr(kcontrol->id.name, "RX_2",
1059 sizeof(kcontrol->id.name)) ||
1060 strnstr(kcontrol->id.name, "TX_2",
1061 sizeof(kcontrol->id.name))) {
1062 port->channel = TDM_2;
1063 } else if (strnstr(kcontrol->id.name, "RX_3",
1064 sizeof(kcontrol->id.name)) ||
1065 strnstr(kcontrol->id.name, "TX_3",
1066 sizeof(kcontrol->id.name))) {
1067 port->channel = TDM_3;
1068 } else if (strnstr(kcontrol->id.name, "RX_4",
1069 sizeof(kcontrol->id.name)) ||
1070 strnstr(kcontrol->id.name, "TX_4",
1071 sizeof(kcontrol->id.name))) {
1072 port->channel = TDM_4;
1073 } else if (strnstr(kcontrol->id.name, "RX_5",
1074 sizeof(kcontrol->id.name)) ||
1075 strnstr(kcontrol->id.name, "TX_5",
1076 sizeof(kcontrol->id.name))) {
1077 port->channel = TDM_5;
1078 } else if (strnstr(kcontrol->id.name, "RX_6",
1079 sizeof(kcontrol->id.name)) ||
1080 strnstr(kcontrol->id.name, "TX_6",
1081 sizeof(kcontrol->id.name))) {
1082 port->channel = TDM_6;
1083 } else if (strnstr(kcontrol->id.name, "RX_7",
1084 sizeof(kcontrol->id.name)) ||
1085 strnstr(kcontrol->id.name, "TX_7",
1086 sizeof(kcontrol->id.name))) {
1087 port->channel = TDM_7;
1088 } else {
1089 pr_err("%s: unsupported channel in: %s\n",
1090 __func__, kcontrol->id.name);
1091 return -EINVAL;
1092 }
1093 } else {
1094 return -EINVAL;
1095 }
1096 return 0;
1097}
1098
1099static int tdm_get_sample_rate(int value)
1100{
1101 int sample_rate = 0;
1102
1103 switch (value) {
1104 case 0:
1105 sample_rate = SAMPLING_RATE_8KHZ;
1106 break;
1107 case 1:
1108 sample_rate = SAMPLING_RATE_16KHZ;
1109 break;
1110 case 2:
1111 sample_rate = SAMPLING_RATE_32KHZ;
1112 break;
1113 case 3:
1114 sample_rate = SAMPLING_RATE_48KHZ;
1115 break;
1116 case 4:
1117 sample_rate = SAMPLING_RATE_176P4KHZ;
1118 break;
1119 case 5:
1120 sample_rate = SAMPLING_RATE_352P8KHZ;
1121 break;
1122 default:
1123 sample_rate = SAMPLING_RATE_48KHZ;
1124 break;
1125 }
1126 return sample_rate;
1127}
1128
1129static int tdm_get_sample_rate_val(int sample_rate)
1130{
1131 int sample_rate_val = 0;
1132
1133 switch (sample_rate) {
1134 case SAMPLING_RATE_8KHZ:
1135 sample_rate_val = 0;
1136 break;
1137 case SAMPLING_RATE_16KHZ:
1138 sample_rate_val = 1;
1139 break;
1140 case SAMPLING_RATE_32KHZ:
1141 sample_rate_val = 2;
1142 break;
1143 case SAMPLING_RATE_48KHZ:
1144 sample_rate_val = 3;
1145 break;
1146 case SAMPLING_RATE_176P4KHZ:
1147 sample_rate_val = 4;
1148 break;
1149 case SAMPLING_RATE_352P8KHZ:
1150 sample_rate_val = 5;
1151 break;
1152 default:
1153 sample_rate_val = 3;
1154 break;
1155 }
1156 return sample_rate_val;
1157}
1158
1159static int tdm_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
1160 struct snd_ctl_elem_value *ucontrol)
1161{
1162 struct tdm_port port;
1163 int ret = tdm_get_port_idx(kcontrol, &port);
1164
1165 if (ret) {
1166 pr_err("%s: unsupported control: %s\n",
1167 __func__, kcontrol->id.name);
1168 } else {
1169 ucontrol->value.enumerated.item[0] = tdm_get_sample_rate_val(
1170 tdm_rx_cfg[port.mode][port.channel].sample_rate);
1171
1172 pr_debug("%s: tdm_rx_sample_rate = %d, item = %d\n", __func__,
1173 tdm_rx_cfg[port.mode][port.channel].sample_rate,
1174 ucontrol->value.enumerated.item[0]);
1175 }
1176 return ret;
1177}
1178
1179static int tdm_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
1180 struct snd_ctl_elem_value *ucontrol)
1181{
1182 struct tdm_port port;
1183 int ret = tdm_get_port_idx(kcontrol, &port);
1184
1185 if (ret) {
1186 pr_err("%s: unsupported control: %s\n",
1187 __func__, kcontrol->id.name);
1188 } else {
1189 tdm_rx_cfg[port.mode][port.channel].sample_rate =
1190 tdm_get_sample_rate(ucontrol->value.enumerated.item[0]);
1191
1192 pr_debug("%s: tdm_rx_sample_rate = %d, item = %d\n", __func__,
1193 tdm_rx_cfg[port.mode][port.channel].sample_rate,
1194 ucontrol->value.enumerated.item[0]);
1195 }
1196 return ret;
1197}
1198
1199static int tdm_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
1200 struct snd_ctl_elem_value *ucontrol)
1201{
1202 struct tdm_port port;
1203 int ret = tdm_get_port_idx(kcontrol, &port);
1204
1205 if (ret) {
1206 pr_err("%s: unsupported control: %s\n",
1207 __func__, kcontrol->id.name);
1208 } else {
1209 ucontrol->value.enumerated.item[0] = tdm_get_sample_rate_val(
1210 tdm_tx_cfg[port.mode][port.channel].sample_rate);
1211
1212 pr_debug("%s: tdm_tx_sample_rate = %d, item = %d\n", __func__,
1213 tdm_tx_cfg[port.mode][port.channel].sample_rate,
1214 ucontrol->value.enumerated.item[0]);
1215 }
1216 return ret;
1217}
1218
1219static int tdm_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
1220 struct snd_ctl_elem_value *ucontrol)
1221{
1222 struct tdm_port port;
1223 int ret = tdm_get_port_idx(kcontrol, &port);
1224
1225 if (ret) {
1226 pr_err("%s: unsupported control: %s\n",
1227 __func__, kcontrol->id.name);
1228 } else {
1229 tdm_tx_cfg[port.mode][port.channel].sample_rate =
1230 tdm_get_sample_rate(ucontrol->value.enumerated.item[0]);
1231
1232 pr_debug("%s: tdm_tx_sample_rate = %d, item = %d\n", __func__,
1233 tdm_tx_cfg[port.mode][port.channel].sample_rate,
1234 ucontrol->value.enumerated.item[0]);
1235 }
1236 return ret;
1237}
1238
1239static int tdm_get_format(int value)
1240{
1241 int format = 0;
1242
1243 switch (value) {
1244 case 0:
1245 format = SNDRV_PCM_FORMAT_S16_LE;
1246 break;
1247 case 1:
1248 format = SNDRV_PCM_FORMAT_S24_LE;
1249 break;
1250 case 2:
1251 format = SNDRV_PCM_FORMAT_S32_LE;
1252 break;
1253 default:
1254 format = SNDRV_PCM_FORMAT_S16_LE;
1255 break;
1256 }
1257 return format;
1258}
1259
1260static int tdm_get_format_val(int format)
1261{
1262 int value = 0;
1263
1264 switch (format) {
1265 case SNDRV_PCM_FORMAT_S16_LE:
1266 value = 0;
1267 break;
1268 case SNDRV_PCM_FORMAT_S24_LE:
1269 value = 1;
1270 break;
1271 case SNDRV_PCM_FORMAT_S32_LE:
1272 value = 2;
1273 break;
1274 default:
1275 value = 0;
1276 break;
1277 }
1278 return value;
1279}
1280
1281static int tdm_rx_format_get(struct snd_kcontrol *kcontrol,
1282 struct snd_ctl_elem_value *ucontrol)
1283{
1284 struct tdm_port port;
1285 int ret = tdm_get_port_idx(kcontrol, &port);
1286
1287 if (ret) {
1288 pr_err("%s: unsupported control: %s\n",
1289 __func__, kcontrol->id.name);
1290 } else {
1291 ucontrol->value.enumerated.item[0] = tdm_get_format_val(
1292 tdm_rx_cfg[port.mode][port.channel].bit_format);
1293
1294 pr_debug("%s: tdm_rx_bit_format = %d, item = %d\n", __func__,
1295 tdm_rx_cfg[port.mode][port.channel].bit_format,
1296 ucontrol->value.enumerated.item[0]);
1297 }
1298 return ret;
1299}
1300
1301static int tdm_rx_format_put(struct snd_kcontrol *kcontrol,
1302 struct snd_ctl_elem_value *ucontrol)
1303{
1304 struct tdm_port port;
1305 int ret = tdm_get_port_idx(kcontrol, &port);
1306
1307 if (ret) {
1308 pr_err("%s: unsupported control: %s\n",
1309 __func__, kcontrol->id.name);
1310 } else {
1311 tdm_rx_cfg[port.mode][port.channel].bit_format =
1312 tdm_get_format(ucontrol->value.enumerated.item[0]);
1313
1314 pr_debug("%s: tdm_rx_bit_format = %d, item = %d\n", __func__,
1315 tdm_rx_cfg[port.mode][port.channel].bit_format,
1316 ucontrol->value.enumerated.item[0]);
1317 }
1318 return ret;
1319}
1320
1321static int tdm_tx_format_get(struct snd_kcontrol *kcontrol,
1322 struct snd_ctl_elem_value *ucontrol)
1323{
1324 struct tdm_port port;
1325 int ret = tdm_get_port_idx(kcontrol, &port);
1326
1327 if (ret) {
1328 pr_err("%s: unsupported control: %s\n",
1329 __func__, kcontrol->id.name);
1330 } else {
1331 ucontrol->value.enumerated.item[0] = tdm_get_format_val(
1332 tdm_tx_cfg[port.mode][port.channel].bit_format);
1333
1334 pr_debug("%s: tdm_tx_bit_format = %d, item = %d\n", __func__,
1335 tdm_tx_cfg[port.mode][port.channel].bit_format,
1336 ucontrol->value.enumerated.item[0]);
1337 }
1338 return ret;
1339}
1340
1341static int tdm_tx_format_put(struct snd_kcontrol *kcontrol,
1342 struct snd_ctl_elem_value *ucontrol)
1343{
1344 struct tdm_port port;
1345 int ret = tdm_get_port_idx(kcontrol, &port);
1346
1347 if (ret) {
1348 pr_err("%s: unsupported control: %s\n",
1349 __func__, kcontrol->id.name);
1350 } else {
1351 tdm_tx_cfg[port.mode][port.channel].bit_format =
1352 tdm_get_format(ucontrol->value.enumerated.item[0]);
1353
1354 pr_debug("%s: tdm_tx_bit_format = %d, item = %d\n", __func__,
1355 tdm_tx_cfg[port.mode][port.channel].bit_format,
1356 ucontrol->value.enumerated.item[0]);
1357 }
1358 return ret;
1359}
1360
1361static int tdm_rx_ch_get(struct snd_kcontrol *kcontrol,
1362 struct snd_ctl_elem_value *ucontrol)
1363{
1364 struct tdm_port port;
1365 int ret = tdm_get_port_idx(kcontrol, &port);
1366
1367 if (ret) {
1368 pr_err("%s: unsupported control: %s\n",
1369 __func__, kcontrol->id.name);
1370 } else {
1371
1372 ucontrol->value.enumerated.item[0] =
1373 tdm_rx_cfg[port.mode][port.channel].channels - 1;
1374
1375 pr_debug("%s: tdm_rx_ch = %d, item = %d\n", __func__,
1376 tdm_rx_cfg[port.mode][port.channel].channels - 1,
1377 ucontrol->value.enumerated.item[0]);
1378 }
1379 return ret;
1380}
1381
1382static int tdm_rx_ch_put(struct snd_kcontrol *kcontrol,
1383 struct snd_ctl_elem_value *ucontrol)
1384{
1385 struct tdm_port port;
1386 int ret = tdm_get_port_idx(kcontrol, &port);
1387
1388 if (ret) {
1389 pr_err("%s: unsupported control: %s\n",
1390 __func__, kcontrol->id.name);
1391 } else {
1392 tdm_rx_cfg[port.mode][port.channel].channels =
1393 ucontrol->value.enumerated.item[0] + 1;
1394
1395 pr_debug("%s: tdm_rx_ch = %d, item = %d\n", __func__,
1396 tdm_rx_cfg[port.mode][port.channel].channels,
1397 ucontrol->value.enumerated.item[0] + 1);
1398 }
1399 return ret;
1400}
1401
1402static int tdm_tx_ch_get(struct snd_kcontrol *kcontrol,
1403 struct snd_ctl_elem_value *ucontrol)
1404{
1405 struct tdm_port port;
1406 int ret = tdm_get_port_idx(kcontrol, &port);
1407
1408 if (ret) {
1409 pr_err("%s: unsupported control: %s\n",
1410 __func__, kcontrol->id.name);
1411 } else {
1412 ucontrol->value.enumerated.item[0] =
1413 tdm_tx_cfg[port.mode][port.channel].channels - 1;
1414
1415 pr_debug("%s: tdm_tx_ch = %d, item = %d\n", __func__,
1416 tdm_tx_cfg[port.mode][port.channel].channels - 1,
1417 ucontrol->value.enumerated.item[0]);
1418 }
1419 return ret;
1420}
1421
1422static int tdm_tx_ch_put(struct snd_kcontrol *kcontrol,
1423 struct snd_ctl_elem_value *ucontrol)
1424{
1425 struct tdm_port port;
1426 int ret = tdm_get_port_idx(kcontrol, &port);
1427
1428 if (ret) {
1429 pr_err("%s: unsupported control: %s\n",
1430 __func__, kcontrol->id.name);
1431 } else {
1432 tdm_tx_cfg[port.mode][port.channel].channels =
1433 ucontrol->value.enumerated.item[0] + 1;
1434
1435 pr_debug("%s: tdm_tx_ch = %d, item = %d\n", __func__,
1436 tdm_tx_cfg[port.mode][port.channel].channels,
1437 ucontrol->value.enumerated.item[0] + 1);
1438 }
1439 return ret;
1440}
1441
1442static int aux_pcm_get_port_idx(struct snd_kcontrol *kcontrol)
1443{
1444 int idx = 0;
1445
1446 if (strnstr(kcontrol->id.name, "PRIM_AUX_PCM",
1447 sizeof("PRIM_AUX_PCM"))) {
1448 idx = PRIM_AUX_PCM;
1449 } else if (strnstr(kcontrol->id.name, "SEC_AUX_PCM",
1450 sizeof("SEC_AUX_PCM"))) {
1451 idx = SEC_AUX_PCM;
1452 } else if (strnstr(kcontrol->id.name, "TERT_AUX_PCM",
1453 sizeof("TERT_AUX_PCM"))) {
1454 idx = TERT_AUX_PCM;
1455 } else if (strnstr(kcontrol->id.name, "QUAT_AUX_PCM",
1456 sizeof("QUAT_AUX_PCM"))) {
1457 idx = QUAT_AUX_PCM;
1458 } else {
1459 pr_err("%s: unsupported port: %s\n",
1460 __func__, kcontrol->id.name);
1461 idx = -EINVAL;
1462 }
1463
1464 return idx;
1465}
1466
1467static int aux_pcm_get_sample_rate(int value)
1468{
1469 int sample_rate = 0;
1470
1471 switch (value) {
1472 case 1:
1473 sample_rate = SAMPLING_RATE_16KHZ;
1474 break;
1475 case 0:
1476 default:
1477 sample_rate = SAMPLING_RATE_8KHZ;
1478 break;
1479 }
1480 return sample_rate;
1481}
1482
1483static int aux_pcm_get_sample_rate_val(int sample_rate)
1484{
1485 int sample_rate_val = 0;
1486
1487 switch (sample_rate) {
1488 case SAMPLING_RATE_16KHZ:
1489 sample_rate_val = 1;
1490 break;
1491 case SAMPLING_RATE_8KHZ:
1492 default:
1493 sample_rate_val = 0;
1494 break;
1495 }
1496 return sample_rate_val;
1497}
1498
1499static int mi2s_auxpcm_get_format(int value)
1500{
1501 int format = 0;
1502
1503 switch (value) {
1504 case 0:
1505 format = SNDRV_PCM_FORMAT_S16_LE;
1506 break;
1507 case 1:
1508 format = SNDRV_PCM_FORMAT_S24_LE;
1509 break;
1510 case 2:
1511 format = SNDRV_PCM_FORMAT_S24_3LE;
1512 break;
1513 case 3:
1514 format = SNDRV_PCM_FORMAT_S32_LE;
1515 break;
1516 default:
1517 format = SNDRV_PCM_FORMAT_S16_LE;
1518 break;
1519 }
1520 return format;
1521}
1522
1523static int mi2s_auxpcm_get_format_value(int format)
1524{
1525 int value = 0;
1526
1527 switch (format) {
1528 case SNDRV_PCM_FORMAT_S16_LE:
1529 value = 0;
1530 break;
1531 case SNDRV_PCM_FORMAT_S24_LE:
1532 value = 1;
1533 break;
1534 case SNDRV_PCM_FORMAT_S24_3LE:
1535 value = 2;
1536 break;
1537 case SNDRV_PCM_FORMAT_S32_LE:
1538 value = 3;
1539 break;
1540 default:
1541 value = 0;
1542 break;
1543 }
1544 return value;
1545}
1546
1547static int aux_pcm_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
1548 struct snd_ctl_elem_value *ucontrol)
1549{
1550 int idx = aux_pcm_get_port_idx(kcontrol);
1551
1552 if (idx < 0)
1553 return idx;
1554
1555 ucontrol->value.enumerated.item[0] =
1556 aux_pcm_get_sample_rate_val(aux_pcm_rx_cfg[idx].sample_rate);
1557
1558 pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
1559 idx, aux_pcm_rx_cfg[idx].sample_rate,
1560 ucontrol->value.enumerated.item[0]);
1561
1562 return 0;
1563}
1564
1565static int aux_pcm_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
1566 struct snd_ctl_elem_value *ucontrol)
1567{
1568 int idx = aux_pcm_get_port_idx(kcontrol);
1569
1570 if (idx < 0)
1571 return idx;
1572
1573 aux_pcm_rx_cfg[idx].sample_rate =
1574 aux_pcm_get_sample_rate(ucontrol->value.enumerated.item[0]);
1575
1576 pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
1577 idx, aux_pcm_rx_cfg[idx].sample_rate,
1578 ucontrol->value.enumerated.item[0]);
1579
1580 return 0;
1581}
1582
1583static int aux_pcm_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
1584 struct snd_ctl_elem_value *ucontrol)
1585{
1586 int idx = aux_pcm_get_port_idx(kcontrol);
1587
1588 if (idx < 0)
1589 return idx;
1590
1591 ucontrol->value.enumerated.item[0] =
1592 aux_pcm_get_sample_rate_val(aux_pcm_tx_cfg[idx].sample_rate);
1593
1594 pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
1595 idx, aux_pcm_tx_cfg[idx].sample_rate,
1596 ucontrol->value.enumerated.item[0]);
1597
1598 return 0;
1599}
1600
1601static int aux_pcm_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
1602 struct snd_ctl_elem_value *ucontrol)
1603{
1604 int idx = aux_pcm_get_port_idx(kcontrol);
1605
1606 if (idx < 0)
1607 return idx;
1608
1609 aux_pcm_tx_cfg[idx].sample_rate =
1610 aux_pcm_get_sample_rate(ucontrol->value.enumerated.item[0]);
1611
1612 pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
1613 idx, aux_pcm_tx_cfg[idx].sample_rate,
1614 ucontrol->value.enumerated.item[0]);
1615
1616 return 0;
1617}
1618
1619static int msm_aux_pcm_rx_format_get(struct snd_kcontrol *kcontrol,
1620 struct snd_ctl_elem_value *ucontrol)
1621{
1622 int idx = aux_pcm_get_port_idx(kcontrol);
1623
1624 if (idx < 0)
1625 return idx;
1626
1627 ucontrol->value.enumerated.item[0] =
1628 mi2s_auxpcm_get_format_value(aux_pcm_rx_cfg[idx].bit_format);
1629
1630 pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
1631 idx, aux_pcm_rx_cfg[idx].bit_format,
1632 ucontrol->value.enumerated.item[0]);
1633
1634 return 0;
1635}
1636
1637static int msm_aux_pcm_rx_format_put(struct snd_kcontrol *kcontrol,
1638 struct snd_ctl_elem_value *ucontrol)
1639{
1640 int idx = aux_pcm_get_port_idx(kcontrol);
1641
1642 if (idx < 0)
1643 return idx;
1644
1645 aux_pcm_rx_cfg[idx].bit_format =
1646 mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
1647
1648 pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
1649 idx, aux_pcm_rx_cfg[idx].bit_format,
1650 ucontrol->value.enumerated.item[0]);
1651
1652 return 0;
1653}
1654
1655static int msm_aux_pcm_tx_format_get(struct snd_kcontrol *kcontrol,
1656 struct snd_ctl_elem_value *ucontrol)
1657{
1658 int idx = aux_pcm_get_port_idx(kcontrol);
1659
1660 if (idx < 0)
1661 return idx;
1662
1663 ucontrol->value.enumerated.item[0] =
1664 mi2s_auxpcm_get_format_value(aux_pcm_tx_cfg[idx].bit_format);
1665
1666 pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
1667 idx, aux_pcm_tx_cfg[idx].bit_format,
1668 ucontrol->value.enumerated.item[0]);
1669
1670 return 0;
1671}
1672
1673static int msm_aux_pcm_tx_format_put(struct snd_kcontrol *kcontrol,
1674 struct snd_ctl_elem_value *ucontrol)
1675{
1676 int idx = aux_pcm_get_port_idx(kcontrol);
1677
1678 if (idx < 0)
1679 return idx;
1680
1681 aux_pcm_tx_cfg[idx].bit_format =
1682 mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
1683
1684 pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
1685 idx, aux_pcm_tx_cfg[idx].bit_format,
1686 ucontrol->value.enumerated.item[0]);
1687
1688 return 0;
1689}
1690
1691static int mi2s_get_port_idx(struct snd_kcontrol *kcontrol)
1692{
1693 int idx = 0;
1694
1695 if (strnstr(kcontrol->id.name, "PRIM_MI2S_RX",
1696 sizeof("PRIM_MI2S_RX"))) {
1697 idx = PRIM_MI2S;
1698 } else if (strnstr(kcontrol->id.name, "SEC_MI2S_RX",
1699 sizeof("SEC_MI2S_RX"))) {
1700 idx = SEC_MI2S;
1701 } else if (strnstr(kcontrol->id.name, "TERT_MI2S_RX",
1702 sizeof("TERT_MI2S_RX"))) {
1703 idx = TERT_MI2S;
1704 } else if (strnstr(kcontrol->id.name, "QUAT_MI2S_RX",
1705 sizeof("QUAT_MI2S_RX"))) {
1706 idx = QUAT_MI2S;
1707 } else if (strnstr(kcontrol->id.name, "PRIM_MI2S_TX",
1708 sizeof("PRIM_MI2S_TX"))) {
1709 idx = PRIM_MI2S;
1710 } else if (strnstr(kcontrol->id.name, "SEC_MI2S_TX",
1711 sizeof("SEC_MI2S_TX"))) {
1712 idx = SEC_MI2S;
1713 } else if (strnstr(kcontrol->id.name, "TERT_MI2S_TX",
1714 sizeof("TERT_MI2S_TX"))) {
1715 idx = TERT_MI2S;
1716 } else if (strnstr(kcontrol->id.name, "QUAT_MI2S_TX",
1717 sizeof("QUAT_MI2S_TX"))) {
1718 idx = QUAT_MI2S;
1719 } else {
1720 pr_err("%s: unsupported channel: %s\n",
1721 __func__, kcontrol->id.name);
1722 idx = -EINVAL;
1723 }
1724
1725 return idx;
1726}
1727
1728static int mi2s_get_sample_rate(int value)
1729{
1730 int sample_rate = 0;
1731
1732 switch (value) {
1733 case 0:
1734 sample_rate = SAMPLING_RATE_8KHZ;
1735 break;
1736 case 1:
1737 sample_rate = SAMPLING_RATE_11P025KHZ;
1738 break;
1739 case 2:
1740 sample_rate = SAMPLING_RATE_16KHZ;
1741 break;
1742 case 3:
1743 sample_rate = SAMPLING_RATE_22P05KHZ;
1744 break;
1745 case 4:
1746 sample_rate = SAMPLING_RATE_32KHZ;
1747 break;
1748 case 5:
1749 sample_rate = SAMPLING_RATE_44P1KHZ;
1750 break;
1751 case 6:
1752 sample_rate = SAMPLING_RATE_48KHZ;
1753 break;
1754 case 7:
1755 sample_rate = SAMPLING_RATE_96KHZ;
1756 break;
1757 case 8:
1758 sample_rate = SAMPLING_RATE_192KHZ;
1759 break;
1760 default:
1761 sample_rate = SAMPLING_RATE_48KHZ;
1762 break;
1763 }
1764 return sample_rate;
1765}
1766
1767static int mi2s_get_sample_rate_val(int sample_rate)
1768{
1769 int sample_rate_val = 0;
1770
1771 switch (sample_rate) {
1772 case SAMPLING_RATE_8KHZ:
1773 sample_rate_val = 0;
1774 break;
1775 case SAMPLING_RATE_11P025KHZ:
1776 sample_rate_val = 1;
1777 break;
1778 case SAMPLING_RATE_16KHZ:
1779 sample_rate_val = 2;
1780 break;
1781 case SAMPLING_RATE_22P05KHZ:
1782 sample_rate_val = 3;
1783 break;
1784 case SAMPLING_RATE_32KHZ:
1785 sample_rate_val = 4;
1786 break;
1787 case SAMPLING_RATE_44P1KHZ:
1788 sample_rate_val = 5;
1789 break;
1790 case SAMPLING_RATE_48KHZ:
1791 sample_rate_val = 6;
1792 break;
1793 case SAMPLING_RATE_96KHZ:
1794 sample_rate_val = 7;
1795 break;
1796 case SAMPLING_RATE_192KHZ:
1797 sample_rate_val = 8;
1798 break;
1799 default:
1800 sample_rate_val = 6;
1801 break;
1802 }
1803 return sample_rate_val;
1804}
1805
1806static int mi2s_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
1807 struct snd_ctl_elem_value *ucontrol)
1808{
1809 int idx = mi2s_get_port_idx(kcontrol);
1810
1811 if (idx < 0)
1812 return idx;
1813
1814 ucontrol->value.enumerated.item[0] =
1815 mi2s_get_sample_rate_val(mi2s_rx_cfg[idx].sample_rate);
1816
1817 pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
1818 idx, mi2s_rx_cfg[idx].sample_rate,
1819 ucontrol->value.enumerated.item[0]);
1820
1821 return 0;
1822}
1823
1824static int mi2s_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
1825 struct snd_ctl_elem_value *ucontrol)
1826{
1827 int idx = mi2s_get_port_idx(kcontrol);
1828
1829 if (idx < 0)
1830 return idx;
1831
1832 mi2s_rx_cfg[idx].sample_rate =
1833 mi2s_get_sample_rate(ucontrol->value.enumerated.item[0]);
1834
1835 pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
1836 idx, mi2s_rx_cfg[idx].sample_rate,
1837 ucontrol->value.enumerated.item[0]);
1838
1839 return 0;
1840}
1841
1842static int mi2s_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
1843 struct snd_ctl_elem_value *ucontrol)
1844{
1845 int idx = mi2s_get_port_idx(kcontrol);
1846
1847 if (idx < 0)
1848 return idx;
1849
1850 ucontrol->value.enumerated.item[0] =
1851 mi2s_get_sample_rate_val(mi2s_tx_cfg[idx].sample_rate);
1852
1853 pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
1854 idx, mi2s_tx_cfg[idx].sample_rate,
1855 ucontrol->value.enumerated.item[0]);
1856
1857 return 0;
1858}
1859
1860static int mi2s_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
1861 struct snd_ctl_elem_value *ucontrol)
1862{
1863 int idx = mi2s_get_port_idx(kcontrol);
1864
1865 if (idx < 0)
1866 return idx;
1867
1868 mi2s_tx_cfg[idx].sample_rate =
1869 mi2s_get_sample_rate(ucontrol->value.enumerated.item[0]);
1870
1871 pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
1872 idx, mi2s_tx_cfg[idx].sample_rate,
1873 ucontrol->value.enumerated.item[0]);
1874
1875 return 0;
1876}
1877
1878static int msm_mi2s_rx_format_get(struct snd_kcontrol *kcontrol,
1879 struct snd_ctl_elem_value *ucontrol)
1880{
1881 int idx = mi2s_get_port_idx(kcontrol);
1882
1883 if (idx < 0)
1884 return idx;
1885
1886 ucontrol->value.enumerated.item[0] =
1887 mi2s_auxpcm_get_format_value(mi2s_rx_cfg[idx].bit_format);
1888
1889 pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
1890 idx, mi2s_rx_cfg[idx].bit_format,
1891 ucontrol->value.enumerated.item[0]);
1892
1893 return 0;
1894}
1895
1896static int msm_mi2s_rx_format_put(struct snd_kcontrol *kcontrol,
1897 struct snd_ctl_elem_value *ucontrol)
1898{
1899 int idx = mi2s_get_port_idx(kcontrol);
1900
1901 if (idx < 0)
1902 return idx;
1903
1904 mi2s_rx_cfg[idx].bit_format =
1905 mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
1906
1907 pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
1908 idx, mi2s_rx_cfg[idx].bit_format,
1909 ucontrol->value.enumerated.item[0]);
1910
1911 return 0;
1912}
1913
1914static int msm_mi2s_tx_format_get(struct snd_kcontrol *kcontrol,
1915 struct snd_ctl_elem_value *ucontrol)
1916{
1917 int idx = mi2s_get_port_idx(kcontrol);
1918
1919 if (idx < 0)
1920 return idx;
1921
1922 ucontrol->value.enumerated.item[0] =
1923 mi2s_auxpcm_get_format_value(mi2s_tx_cfg[idx].bit_format);
1924
1925 pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
1926 idx, mi2s_tx_cfg[idx].bit_format,
1927 ucontrol->value.enumerated.item[0]);
1928
1929 return 0;
1930}
1931
1932static int msm_mi2s_tx_format_put(struct snd_kcontrol *kcontrol,
1933 struct snd_ctl_elem_value *ucontrol)
1934{
1935 int idx = mi2s_get_port_idx(kcontrol);
1936
1937 if (idx < 0)
1938 return idx;
1939
1940 mi2s_tx_cfg[idx].bit_format =
1941 mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
1942
1943 pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
1944 idx, mi2s_tx_cfg[idx].bit_format,
1945 ucontrol->value.enumerated.item[0]);
1946
1947 return 0;
1948}
1949static int msm_mi2s_rx_ch_get(struct snd_kcontrol *kcontrol,
1950 struct snd_ctl_elem_value *ucontrol)
1951{
1952 int idx = mi2s_get_port_idx(kcontrol);
1953
1954 if (idx < 0)
1955 return idx;
1956
1957 pr_debug("%s: msm_mi2s_[%d]_rx_ch = %d\n", __func__,
1958 idx, mi2s_rx_cfg[idx].channels);
1959 ucontrol->value.enumerated.item[0] = mi2s_rx_cfg[idx].channels - 1;
1960
1961 return 0;
1962}
1963
1964static int msm_mi2s_rx_ch_put(struct snd_kcontrol *kcontrol,
1965 struct snd_ctl_elem_value *ucontrol)
1966{
1967 int idx = mi2s_get_port_idx(kcontrol);
1968
1969 if (idx < 0)
1970 return idx;
1971
1972 mi2s_rx_cfg[idx].channels = ucontrol->value.enumerated.item[0] + 1;
1973 pr_debug("%s: msm_mi2s_[%d]_rx_ch = %d\n", __func__,
1974 idx, mi2s_rx_cfg[idx].channels);
1975
1976 return 1;
1977}
1978
1979static int msm_mi2s_tx_ch_get(struct snd_kcontrol *kcontrol,
1980 struct snd_ctl_elem_value *ucontrol)
1981{
1982 int idx = mi2s_get_port_idx(kcontrol);
1983
1984 if (idx < 0)
1985 return idx;
1986
1987 pr_debug("%s: msm_mi2s_[%d]_tx_ch = %d\n", __func__,
1988 idx, mi2s_tx_cfg[idx].channels);
1989 ucontrol->value.enumerated.item[0] = mi2s_tx_cfg[idx].channels - 1;
1990
1991 return 0;
1992}
1993
1994static int msm_mi2s_tx_ch_put(struct snd_kcontrol *kcontrol,
1995 struct snd_ctl_elem_value *ucontrol)
1996{
1997 int idx = mi2s_get_port_idx(kcontrol);
1998
1999 if (idx < 0)
2000 return idx;
2001
2002 mi2s_tx_cfg[idx].channels = ucontrol->value.enumerated.item[0] + 1;
2003 pr_debug("%s: msm_mi2s_[%d]_tx_ch = %d\n", __func__,
2004 idx, mi2s_tx_cfg[idx].channels);
2005
2006 return 1;
2007}
2008
2009static int msm_get_port_id(int be_id)
2010{
2011 int afe_port_id = 0;
2012
2013 switch (be_id) {
2014 case MSM_BACKEND_DAI_PRI_MI2S_RX:
2015 afe_port_id = AFE_PORT_ID_PRIMARY_MI2S_RX;
2016 break;
2017 case MSM_BACKEND_DAI_PRI_MI2S_TX:
2018 afe_port_id = AFE_PORT_ID_PRIMARY_MI2S_TX;
2019 break;
2020 case MSM_BACKEND_DAI_SECONDARY_MI2S_RX:
2021 afe_port_id = AFE_PORT_ID_SECONDARY_MI2S_RX;
2022 break;
2023 case MSM_BACKEND_DAI_SECONDARY_MI2S_TX:
2024 afe_port_id = AFE_PORT_ID_SECONDARY_MI2S_TX;
2025 break;
2026 case MSM_BACKEND_DAI_TERTIARY_MI2S_RX:
2027 afe_port_id = AFE_PORT_ID_TERTIARY_MI2S_RX;
2028 break;
2029 case MSM_BACKEND_DAI_TERTIARY_MI2S_TX:
2030 afe_port_id = AFE_PORT_ID_TERTIARY_MI2S_TX;
2031 break;
2032 case MSM_BACKEND_DAI_QUATERNARY_MI2S_RX:
2033 afe_port_id = AFE_PORT_ID_QUATERNARY_MI2S_RX;
2034 break;
2035 case MSM_BACKEND_DAI_QUATERNARY_MI2S_TX:
2036 afe_port_id = AFE_PORT_ID_QUATERNARY_MI2S_TX;
2037 break;
2038 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_0:
2039 afe_port_id = AFE_PORT_ID_VA_CODEC_DMA_TX_0;
2040 break;
2041 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_1:
2042 afe_port_id = AFE_PORT_ID_VA_CODEC_DMA_TX_1;
2043 break;
2044 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_2:
2045 afe_port_id = AFE_PORT_ID_VA_CODEC_DMA_TX_2;
2046 break;
2047 default:
2048 pr_err("%s: Invalid BE id: %d\n", __func__, be_id);
2049 afe_port_id = -EINVAL;
2050 }
2051
2052 return afe_port_id;
2053}
2054
2055static u32 get_mi2s_bits_per_sample(u32 bit_format)
2056{
2057 u32 bit_per_sample = 0;
2058
2059 switch (bit_format) {
2060 case SNDRV_PCM_FORMAT_S32_LE:
2061 case SNDRV_PCM_FORMAT_S24_3LE:
2062 case SNDRV_PCM_FORMAT_S24_LE:
2063 bit_per_sample = 32;
2064 break;
2065 case SNDRV_PCM_FORMAT_S16_LE:
2066 default:
2067 bit_per_sample = 16;
2068 break;
2069 }
2070
2071 return bit_per_sample;
2072}
2073
2074static void update_mi2s_clk_val(int dai_id, int stream)
2075{
2076 u32 bit_per_sample = 0;
2077
2078 if (stream == SNDRV_PCM_STREAM_PLAYBACK) {
2079 bit_per_sample =
2080 get_mi2s_bits_per_sample(mi2s_rx_cfg[dai_id].bit_format);
2081 mi2s_clk[dai_id].clk_freq_in_hz =
2082 mi2s_rx_cfg[dai_id].sample_rate * 2 * bit_per_sample;
2083 } else {
2084 bit_per_sample =
2085 get_mi2s_bits_per_sample(mi2s_tx_cfg[dai_id].bit_format);
2086 mi2s_clk[dai_id].clk_freq_in_hz =
2087 mi2s_tx_cfg[dai_id].sample_rate * 2 * bit_per_sample;
2088 }
2089}
2090
2091static int msm_mi2s_set_sclk(struct snd_pcm_substream *substream, bool enable)
2092{
2093 int ret = 0;
2094 struct snd_soc_pcm_runtime *rtd = substream->private_data;
2095 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
2096 int port_id = 0;
2097 int index = cpu_dai->id;
2098
2099 port_id = msm_get_port_id(rtd->dai_link->id);
2100 if (port_id < 0) {
2101 dev_err(rtd->card->dev, "%s: Invalid port_id\n", __func__);
2102 ret = port_id;
2103 goto err;
2104 }
2105
2106 if (enable) {
2107 update_mi2s_clk_val(index, substream->stream);
2108 dev_dbg(rtd->card->dev, "%s: clock rate %ul\n", __func__,
2109 mi2s_clk[index].clk_freq_in_hz);
2110 }
2111
2112 mi2s_clk[index].enable = enable;
2113 ret = afe_set_lpass_clock_v2(port_id,
2114 &mi2s_clk[index]);
2115 if (ret < 0) {
2116 dev_err(rtd->card->dev,
2117 "%s: afe lpass clock failed for port 0x%x , err:%d\n",
2118 __func__, port_id, ret);
2119 goto err;
2120 }
2121
2122err:
2123 return ret;
2124}
2125
2126static int cdc_dma_get_port_idx(struct snd_kcontrol *kcontrol)
2127{
2128 int idx = 0;
2129
2130 if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_0",
2131 sizeof("RX_CDC_DMA_RX_0")))
2132 idx = RX_CDC_DMA_RX_0;
2133 else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_1",
2134 sizeof("RX_CDC_DMA_RX_1")))
2135 idx = RX_CDC_DMA_RX_1;
2136 else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_2",
2137 sizeof("RX_CDC_DMA_RX_2")))
2138 idx = RX_CDC_DMA_RX_2;
2139 else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_3",
2140 sizeof("RX_CDC_DMA_RX_3")))
2141 idx = RX_CDC_DMA_RX_3;
2142 else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_5",
2143 sizeof("RX_CDC_DMA_RX_5")))
2144 idx = RX_CDC_DMA_RX_5;
2145 else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_0",
2146 sizeof("TX_CDC_DMA_TX_0")))
2147 idx = TX_CDC_DMA_TX_0;
2148 else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_3",
2149 sizeof("TX_CDC_DMA_TX_3")))
2150 idx = TX_CDC_DMA_TX_3;
2151 else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_4",
2152 sizeof("TX_CDC_DMA_TX_4")))
2153 idx = TX_CDC_DMA_TX_4;
2154 else if (strnstr(kcontrol->id.name, "VA_CDC_DMA_TX_0",
2155 sizeof("VA_CDC_DMA_TX_0")))
2156 idx = VA_CDC_DMA_TX_0;
2157 else if (strnstr(kcontrol->id.name, "VA_CDC_DMA_TX_1",
2158 sizeof("VA_CDC_DMA_TX_1")))
2159 idx = VA_CDC_DMA_TX_1;
2160 else if (strnstr(kcontrol->id.name, "VA_CDC_DMA_TX_2",
2161 sizeof("VA_CDC_DMA_TX_2")))
2162 idx = VA_CDC_DMA_TX_2;
2163 else {
2164 pr_err("%s: unsupported channel: %s\n",
2165 __func__, kcontrol->id.name);
2166 return -EINVAL;
2167 }
2168
2169 return idx;
2170}
2171
2172static int cdc_dma_rx_ch_get(struct snd_kcontrol *kcontrol,
2173 struct snd_ctl_elem_value *ucontrol)
2174{
2175 int ch_num = cdc_dma_get_port_idx(kcontrol);
2176
2177 if (ch_num < 0 || ch_num >= CDC_DMA_RX_MAX) {
2178 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
2179 return ch_num;
2180 }
2181
2182 pr_debug("%s: cdc_dma_rx_ch = %d\n", __func__,
2183 cdc_dma_rx_cfg[ch_num].channels - 1);
2184 ucontrol->value.integer.value[0] = cdc_dma_rx_cfg[ch_num].channels - 1;
2185 return 0;
2186}
2187
2188static int cdc_dma_rx_ch_put(struct snd_kcontrol *kcontrol,
2189 struct snd_ctl_elem_value *ucontrol)
2190{
2191 int ch_num = cdc_dma_get_port_idx(kcontrol);
2192
2193 if (ch_num < 0 || ch_num >= CDC_DMA_RX_MAX) {
2194 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
2195 return ch_num;
2196 }
2197
2198 cdc_dma_rx_cfg[ch_num].channels = ucontrol->value.integer.value[0] + 1;
2199
2200 pr_debug("%s: cdc_dma_rx_ch = %d\n", __func__,
2201 cdc_dma_rx_cfg[ch_num].channels);
2202 return 1;
2203}
2204
2205static int cdc_dma_rx_format_get(struct snd_kcontrol *kcontrol,
2206 struct snd_ctl_elem_value *ucontrol)
2207{
2208 int ch_num = cdc_dma_get_port_idx(kcontrol);
2209
2210 if (ch_num < 0 || ch_num >= CDC_DMA_RX_MAX) {
2211 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
2212 return ch_num;
2213 }
2214
2215 switch (cdc_dma_rx_cfg[ch_num].bit_format) {
2216 case SNDRV_PCM_FORMAT_S32_LE:
2217 ucontrol->value.integer.value[0] = 3;
2218 break;
2219 case SNDRV_PCM_FORMAT_S24_3LE:
2220 ucontrol->value.integer.value[0] = 2;
2221 break;
2222 case SNDRV_PCM_FORMAT_S24_LE:
2223 ucontrol->value.integer.value[0] = 1;
2224 break;
2225 case SNDRV_PCM_FORMAT_S16_LE:
2226 default:
2227 ucontrol->value.integer.value[0] = 0;
2228 break;
2229 }
2230
2231 pr_debug("%s: cdc_dma_rx_format = %d, ucontrol value = %ld\n",
2232 __func__, cdc_dma_rx_cfg[ch_num].bit_format,
2233 ucontrol->value.integer.value[0]);
2234 return 0;
2235}
2236
2237static int cdc_dma_rx_format_put(struct snd_kcontrol *kcontrol,
2238 struct snd_ctl_elem_value *ucontrol)
2239{
2240 int rc = 0;
2241 int ch_num = cdc_dma_get_port_idx(kcontrol);
2242
2243 if (ch_num < 0 || ch_num >= CDC_DMA_RX_MAX) {
2244 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
2245 return ch_num;
2246 }
2247
2248 switch (ucontrol->value.integer.value[0]) {
2249 case 3:
2250 cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S32_LE;
2251 break;
2252 case 2:
2253 cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
2254 break;
2255 case 1:
2256 cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_LE;
2257 break;
2258 case 0:
2259 default:
2260 cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S16_LE;
2261 break;
2262 }
2263 pr_debug("%s: cdc_dma_rx_format = %d, ucontrol value = %ld\n",
2264 __func__, cdc_dma_rx_cfg[ch_num].bit_format,
2265 ucontrol->value.integer.value[0]);
2266
2267 return rc;
2268}
2269
2270
2271static int cdc_dma_get_sample_rate_val(int sample_rate)
2272{
2273 int sample_rate_val = 0;
2274
2275 switch (sample_rate) {
2276 case SAMPLING_RATE_8KHZ:
2277 sample_rate_val = 0;
2278 break;
2279 case SAMPLING_RATE_11P025KHZ:
2280 sample_rate_val = 1;
2281 break;
2282 case SAMPLING_RATE_16KHZ:
2283 sample_rate_val = 2;
2284 break;
2285 case SAMPLING_RATE_22P05KHZ:
2286 sample_rate_val = 3;
2287 break;
2288 case SAMPLING_RATE_32KHZ:
2289 sample_rate_val = 4;
2290 break;
2291 case SAMPLING_RATE_44P1KHZ:
2292 sample_rate_val = 5;
2293 break;
2294 case SAMPLING_RATE_48KHZ:
2295 sample_rate_val = 6;
2296 break;
2297 case SAMPLING_RATE_88P2KHZ:
2298 sample_rate_val = 7;
2299 break;
2300 case SAMPLING_RATE_96KHZ:
2301 sample_rate_val = 8;
2302 break;
2303 case SAMPLING_RATE_176P4KHZ:
2304 sample_rate_val = 9;
2305 break;
2306 case SAMPLING_RATE_192KHZ:
2307 sample_rate_val = 10;
2308 break;
2309 case SAMPLING_RATE_352P8KHZ:
2310 sample_rate_val = 11;
2311 break;
2312 case SAMPLING_RATE_384KHZ:
2313 sample_rate_val = 12;
2314 break;
2315 default:
2316 sample_rate_val = 6;
2317 break;
2318 }
2319 return sample_rate_val;
2320}
2321
2322static int cdc_dma_get_sample_rate(int value)
2323{
2324 int sample_rate = 0;
2325
2326 switch (value) {
2327 case 0:
2328 sample_rate = SAMPLING_RATE_8KHZ;
2329 break;
2330 case 1:
2331 sample_rate = SAMPLING_RATE_11P025KHZ;
2332 break;
2333 case 2:
2334 sample_rate = SAMPLING_RATE_16KHZ;
2335 break;
2336 case 3:
2337 sample_rate = SAMPLING_RATE_22P05KHZ;
2338 break;
2339 case 4:
2340 sample_rate = SAMPLING_RATE_32KHZ;
2341 break;
2342 case 5:
2343 sample_rate = SAMPLING_RATE_44P1KHZ;
2344 break;
2345 case 6:
2346 sample_rate = SAMPLING_RATE_48KHZ;
2347 break;
2348 case 7:
2349 sample_rate = SAMPLING_RATE_88P2KHZ;
2350 break;
2351 case 8:
2352 sample_rate = SAMPLING_RATE_96KHZ;
2353 break;
2354 case 9:
2355 sample_rate = SAMPLING_RATE_176P4KHZ;
2356 break;
2357 case 10:
2358 sample_rate = SAMPLING_RATE_192KHZ;
2359 break;
2360 case 11:
2361 sample_rate = SAMPLING_RATE_352P8KHZ;
2362 break;
2363 case 12:
2364 sample_rate = SAMPLING_RATE_384KHZ;
2365 break;
2366 default:
2367 sample_rate = SAMPLING_RATE_48KHZ;
2368 break;
2369 }
2370 return sample_rate;
2371}
2372
2373static int cdc_dma_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
2374 struct snd_ctl_elem_value *ucontrol)
2375{
2376 int ch_num = cdc_dma_get_port_idx(kcontrol);
2377
2378 if (ch_num < 0 || ch_num >= CDC_DMA_RX_MAX) {
2379 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
2380 return ch_num;
2381 }
2382
2383 ucontrol->value.enumerated.item[0] =
2384 cdc_dma_get_sample_rate_val(cdc_dma_rx_cfg[ch_num].sample_rate);
2385
2386 pr_debug("%s: cdc_dma_rx_sample_rate = %d\n", __func__,
2387 cdc_dma_rx_cfg[ch_num].sample_rate);
2388 return 0;
2389}
2390
2391static int cdc_dma_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
2392 struct snd_ctl_elem_value *ucontrol)
2393{
2394 int ch_num = cdc_dma_get_port_idx(kcontrol);
2395
2396 if (ch_num < 0 || ch_num >= CDC_DMA_RX_MAX) {
2397 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
2398 return ch_num;
2399 }
2400
2401 cdc_dma_rx_cfg[ch_num].sample_rate =
2402 cdc_dma_get_sample_rate(ucontrol->value.enumerated.item[0]);
2403
2404
2405 pr_debug("%s: control value = %d, cdc_dma_rx_sample_rate = %d\n",
2406 __func__, ucontrol->value.enumerated.item[0],
2407 cdc_dma_rx_cfg[ch_num].sample_rate);
2408 return 0;
2409}
2410
2411static int cdc_dma_tx_ch_get(struct snd_kcontrol *kcontrol,
2412 struct snd_ctl_elem_value *ucontrol)
2413{
2414 int ch_num = cdc_dma_get_port_idx(kcontrol);
2415
2416 if (ch_num < 0) {
2417 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
2418 return ch_num;
2419 }
2420
2421 pr_debug("%s: cdc_dma_tx_ch = %d\n", __func__,
2422 cdc_dma_tx_cfg[ch_num].channels);
2423 ucontrol->value.integer.value[0] = cdc_dma_tx_cfg[ch_num].channels - 1;
2424 return 0;
2425}
2426
2427static int cdc_dma_tx_ch_put(struct snd_kcontrol *kcontrol,
2428 struct snd_ctl_elem_value *ucontrol)
2429{
2430 int ch_num = cdc_dma_get_port_idx(kcontrol);
2431
2432 if (ch_num < 0) {
2433 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
2434 return ch_num;
2435 }
2436
2437 cdc_dma_tx_cfg[ch_num].channels = ucontrol->value.integer.value[0] + 1;
2438
2439 pr_debug("%s: cdc_dma_tx_ch = %d\n", __func__,
2440 cdc_dma_tx_cfg[ch_num].channels);
2441 return 1;
2442}
2443
2444static int cdc_dma_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
2445 struct snd_ctl_elem_value *ucontrol)
2446{
2447 int sample_rate_val;
2448 int ch_num = cdc_dma_get_port_idx(kcontrol);
2449
2450 if (ch_num < 0) {
2451 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
2452 return ch_num;
2453 }
2454
2455 switch (cdc_dma_tx_cfg[ch_num].sample_rate) {
2456 case SAMPLING_RATE_384KHZ:
2457 sample_rate_val = 12;
2458 break;
2459 case SAMPLING_RATE_352P8KHZ:
2460 sample_rate_val = 11;
2461 break;
2462 case SAMPLING_RATE_192KHZ:
2463 sample_rate_val = 10;
2464 break;
2465 case SAMPLING_RATE_176P4KHZ:
2466 sample_rate_val = 9;
2467 break;
2468 case SAMPLING_RATE_96KHZ:
2469 sample_rate_val = 8;
2470 break;
2471 case SAMPLING_RATE_88P2KHZ:
2472 sample_rate_val = 7;
2473 break;
2474 case SAMPLING_RATE_48KHZ:
2475 sample_rate_val = 6;
2476 break;
2477 case SAMPLING_RATE_44P1KHZ:
2478 sample_rate_val = 5;
2479 break;
2480 case SAMPLING_RATE_32KHZ:
2481 sample_rate_val = 4;
2482 break;
2483 case SAMPLING_RATE_22P05KHZ:
2484 sample_rate_val = 3;
2485 break;
2486 case SAMPLING_RATE_16KHZ:
2487 sample_rate_val = 2;
2488 break;
2489 case SAMPLING_RATE_11P025KHZ:
2490 sample_rate_val = 1;
2491 break;
2492 case SAMPLING_RATE_8KHZ:
2493 sample_rate_val = 0;
2494 break;
2495 default:
2496 sample_rate_val = 6;
2497 break;
2498 }
2499
2500 ucontrol->value.integer.value[0] = sample_rate_val;
2501 pr_debug("%s: cdc_dma_tx_sample_rate = %d\n", __func__,
2502 cdc_dma_tx_cfg[ch_num].sample_rate);
2503 return 0;
2504}
2505
2506static int cdc_dma_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
2507 struct snd_ctl_elem_value *ucontrol)
2508{
2509 int ch_num = cdc_dma_get_port_idx(kcontrol);
2510
2511 if (ch_num < 0) {
2512 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
2513 return ch_num;
2514 }
2515
2516 switch (ucontrol->value.integer.value[0]) {
2517 case 12:
2518 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_384KHZ;
2519 break;
2520 case 11:
2521 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_352P8KHZ;
2522 break;
2523 case 10:
2524 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_192KHZ;
2525 break;
2526 case 9:
2527 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_176P4KHZ;
2528 break;
2529 case 8:
2530 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_96KHZ;
2531 break;
2532 case 7:
2533 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_88P2KHZ;
2534 break;
2535 case 6:
2536 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_48KHZ;
2537 break;
2538 case 5:
2539 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_44P1KHZ;
2540 break;
2541 case 4:
2542 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_32KHZ;
2543 break;
2544 case 3:
2545 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_22P05KHZ;
2546 break;
2547 case 2:
2548 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_16KHZ;
2549 break;
2550 case 1:
2551 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_11P025KHZ;
2552 break;
2553 case 0:
2554 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_8KHZ;
2555 break;
2556 default:
2557 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_48KHZ;
2558 break;
2559 }
2560
2561 pr_debug("%s: control value = %ld, cdc_dma_tx_sample_rate = %d\n",
2562 __func__, ucontrol->value.integer.value[0],
2563 cdc_dma_tx_cfg[ch_num].sample_rate);
2564 return 0;
2565}
2566
2567static int cdc_dma_tx_format_get(struct snd_kcontrol *kcontrol,
2568 struct snd_ctl_elem_value *ucontrol)
2569{
2570 int ch_num = cdc_dma_get_port_idx(kcontrol);
2571
2572 if (ch_num < 0) {
2573 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
2574 return ch_num;
2575 }
2576
2577 switch (cdc_dma_tx_cfg[ch_num].bit_format) {
2578 case SNDRV_PCM_FORMAT_S32_LE:
2579 ucontrol->value.integer.value[0] = 3;
2580 break;
2581 case SNDRV_PCM_FORMAT_S24_3LE:
2582 ucontrol->value.integer.value[0] = 2;
2583 break;
2584 case SNDRV_PCM_FORMAT_S24_LE:
2585 ucontrol->value.integer.value[0] = 1;
2586 break;
2587 case SNDRV_PCM_FORMAT_S16_LE:
2588 default:
2589 ucontrol->value.integer.value[0] = 0;
2590 break;
2591 }
2592
2593 pr_debug("%s: cdc_dma_tx_format = %d, ucontrol value = %ld\n",
2594 __func__, cdc_dma_tx_cfg[ch_num].bit_format,
2595 ucontrol->value.integer.value[0]);
2596 return 0;
2597}
2598
2599static int cdc_dma_tx_format_put(struct snd_kcontrol *kcontrol,
2600 struct snd_ctl_elem_value *ucontrol)
2601{
2602 int rc = 0;
2603 int ch_num = cdc_dma_get_port_idx(kcontrol);
2604
2605 if (ch_num < 0) {
2606 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
2607 return ch_num;
2608 }
2609
2610 switch (ucontrol->value.integer.value[0]) {
2611 case 3:
2612 cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S32_LE;
2613 break;
2614 case 2:
2615 cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
2616 break;
2617 case 1:
2618 cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_LE;
2619 break;
2620 case 0:
2621 default:
2622 cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S16_LE;
2623 break;
2624 }
2625 pr_debug("%s: cdc_dma_tx_format = %d, ucontrol value = %ld\n",
2626 __func__, cdc_dma_tx_cfg[ch_num].bit_format,
2627 ucontrol->value.integer.value[0]);
2628
2629 return rc;
2630}
2631
2632static int msm_cdc_dma_get_idx_from_beid(int32_t be_id)
2633{
2634 int idx = 0;
2635
2636 switch (be_id) {
2637 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
2638 idx = RX_CDC_DMA_RX_0;
2639 break;
2640 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
2641 idx = RX_CDC_DMA_RX_1;
2642 break;
2643 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
2644 idx = RX_CDC_DMA_RX_2;
2645 break;
2646 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_3:
2647 idx = RX_CDC_DMA_RX_3;
2648 break;
2649 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_5:
2650 idx = RX_CDC_DMA_RX_5;
2651 break;
2652 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
2653 idx = TX_CDC_DMA_TX_0;
2654 break;
2655 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
2656 idx = TX_CDC_DMA_TX_3;
2657 break;
2658 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
2659 idx = TX_CDC_DMA_TX_4;
2660 break;
2661 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_0:
2662 idx = VA_CDC_DMA_TX_0;
2663 break;
2664 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_1:
2665 idx = VA_CDC_DMA_TX_1;
2666 break;
2667 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_2:
2668 idx = VA_CDC_DMA_TX_2;
2669 break;
2670 default:
2671 idx = RX_CDC_DMA_RX_0;
2672 break;
2673 }
2674
2675 return idx;
2676}
2677
2678static int msm_bt_sample_rate_get(struct snd_kcontrol *kcontrol,
2679 struct snd_ctl_elem_value *ucontrol)
2680{
2681 /*
2682 * Slimbus_7_Rx/Tx sample rate values should always be in sync (same)
2683 * when used for BT_SCO use case. Return either Rx or Tx sample rate
2684 * value.
2685 */
2686 switch (slim_rx_cfg[SLIM_RX_7].sample_rate) {
2687 case SAMPLING_RATE_96KHZ:
2688 ucontrol->value.integer.value[0] = 5;
2689 break;
2690 case SAMPLING_RATE_88P2KHZ:
2691 ucontrol->value.integer.value[0] = 4;
2692 break;
2693 case SAMPLING_RATE_48KHZ:
2694 ucontrol->value.integer.value[0] = 3;
2695 break;
2696 case SAMPLING_RATE_44P1KHZ:
2697 ucontrol->value.integer.value[0] = 2;
2698 break;
2699 case SAMPLING_RATE_16KHZ:
2700 ucontrol->value.integer.value[0] = 1;
2701 break;
2702 case SAMPLING_RATE_8KHZ:
2703 default:
2704 ucontrol->value.integer.value[0] = 0;
2705 break;
2706 }
2707 pr_debug("%s: sample rate = %d\n", __func__,
2708 slim_rx_cfg[SLIM_RX_7].sample_rate);
2709
2710 return 0;
2711}
2712
2713static int msm_bt_sample_rate_put(struct snd_kcontrol *kcontrol,
2714 struct snd_ctl_elem_value *ucontrol)
2715{
2716 switch (ucontrol->value.integer.value[0]) {
2717 case 1:
2718 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_16KHZ;
2719 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_16KHZ;
2720 break;
2721 case 2:
2722 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
2723 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
2724 break;
2725 case 3:
2726 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_48KHZ;
2727 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_48KHZ;
2728 break;
2729 case 4:
2730 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
2731 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
2732 break;
2733 case 5:
2734 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_96KHZ;
2735 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_96KHZ;
2736 break;
2737 case 0:
2738 default:
2739 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_8KHZ;
2740 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_8KHZ;
2741 break;
2742 }
2743 pr_debug("%s: sample rates: slim7_rx = %d, slim7_tx = %d, value = %d\n",
2744 __func__,
2745 slim_rx_cfg[SLIM_RX_7].sample_rate,
2746 slim_tx_cfg[SLIM_TX_7].sample_rate,
2747 ucontrol->value.enumerated.item[0]);
2748
2749 return 0;
2750}
2751
2752static int msm_bt_sample_rate_rx_get(struct snd_kcontrol *kcontrol,
2753 struct snd_ctl_elem_value *ucontrol)
2754{
2755 switch (slim_rx_cfg[SLIM_RX_7].sample_rate) {
2756 case SAMPLING_RATE_96KHZ:
2757 ucontrol->value.integer.value[0] = 5;
2758 break;
2759 case SAMPLING_RATE_88P2KHZ:
2760 ucontrol->value.integer.value[0] = 4;
2761 break;
2762 case SAMPLING_RATE_48KHZ:
2763 ucontrol->value.integer.value[0] = 3;
2764 break;
2765 case SAMPLING_RATE_44P1KHZ:
2766 ucontrol->value.integer.value[0] = 2;
2767 break;
2768 case SAMPLING_RATE_16KHZ:
2769 ucontrol->value.integer.value[0] = 1;
2770 break;
2771 case SAMPLING_RATE_8KHZ:
2772 default:
2773 ucontrol->value.integer.value[0] = 0;
2774 break;
2775 }
2776 pr_debug("%s: sample rate rx = %d\n", __func__,
2777 slim_rx_cfg[SLIM_RX_7].sample_rate);
2778
2779 return 0;
2780}
2781
2782static int msm_bt_sample_rate_rx_put(struct snd_kcontrol *kcontrol,
2783 struct snd_ctl_elem_value *ucontrol)
2784{
2785 switch (ucontrol->value.integer.value[0]) {
2786 case 1:
2787 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_16KHZ;
2788 break;
2789 case 2:
2790 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
2791 break;
2792 case 3:
2793 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_48KHZ;
2794 break;
2795 case 4:
2796 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
2797 break;
2798 case 5:
2799 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_96KHZ;
2800 break;
2801 case 0:
2802 default:
2803 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_8KHZ;
2804 break;
2805 }
2806 pr_debug("%s: sample rate: slim7_rx = %d, value = %d\n",
2807 __func__,
2808 slim_rx_cfg[SLIM_RX_7].sample_rate,
2809 ucontrol->value.enumerated.item[0]);
2810
2811 return 0;
2812}
2813
2814static int msm_bt_sample_rate_tx_get(struct snd_kcontrol *kcontrol,
2815 struct snd_ctl_elem_value *ucontrol)
2816{
2817 switch (slim_tx_cfg[SLIM_TX_7].sample_rate) {
2818 case SAMPLING_RATE_96KHZ:
2819 ucontrol->value.integer.value[0] = 5;
2820 break;
2821 case SAMPLING_RATE_88P2KHZ:
2822 ucontrol->value.integer.value[0] = 4;
2823 break;
2824 case SAMPLING_RATE_48KHZ:
2825 ucontrol->value.integer.value[0] = 3;
2826 break;
2827 case SAMPLING_RATE_44P1KHZ:
2828 ucontrol->value.integer.value[0] = 2;
2829 break;
2830 case SAMPLING_RATE_16KHZ:
2831 ucontrol->value.integer.value[0] = 1;
2832 break;
2833 case SAMPLING_RATE_8KHZ:
2834 default:
2835 ucontrol->value.integer.value[0] = 0;
2836 break;
2837 }
2838 pr_debug("%s: sample rate tx = %d\n", __func__,
2839 slim_tx_cfg[SLIM_TX_7].sample_rate);
2840
2841 return 0;
2842}
2843
2844static int msm_bt_sample_rate_tx_put(struct snd_kcontrol *kcontrol,
2845 struct snd_ctl_elem_value *ucontrol)
2846{
2847 switch (ucontrol->value.integer.value[0]) {
2848 case 1:
2849 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_16KHZ;
2850 break;
2851 case 2:
2852 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
2853 break;
2854 case 3:
2855 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_48KHZ;
2856 break;
2857 case 4:
2858 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
2859 break;
2860 case 5:
2861 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_96KHZ;
2862 break;
2863 case 0:
2864 default:
2865 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_8KHZ;
2866 break;
2867 }
2868 pr_debug("%s: sample rate: slim7_tx = %d, value = %d\n",
2869 __func__,
2870 slim_tx_cfg[SLIM_TX_7].sample_rate,
2871 ucontrol->value.enumerated.item[0]);
2872
2873 return 0;
2874}
2875
2876static const struct snd_kcontrol_new msm_int_snd_controls[] = {
2877 SOC_ENUM_EXT("RX_CDC_DMA_RX_0 Channels", rx_cdc_dma_rx_0_chs,
2878 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
2879 SOC_ENUM_EXT("RX_CDC_DMA_RX_1 Channels", rx_cdc_dma_rx_1_chs,
2880 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
2881 SOC_ENUM_EXT("RX_CDC_DMA_RX_2 Channels", rx_cdc_dma_rx_2_chs,
2882 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
2883 SOC_ENUM_EXT("RX_CDC_DMA_RX_3 Channels", rx_cdc_dma_rx_3_chs,
2884 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
2885 SOC_ENUM_EXT("RX_CDC_DMA_RX_5 Channels", rx_cdc_dma_rx_5_chs,
2886 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
2887 SOC_ENUM_EXT("TX_CDC_DMA_TX_0 Channels", tx_cdc_dma_tx_0_chs,
2888 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
2889 SOC_ENUM_EXT("TX_CDC_DMA_TX_3 Channels", tx_cdc_dma_tx_3_chs,
2890 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
2891 SOC_ENUM_EXT("TX_CDC_DMA_TX_4 Channels", tx_cdc_dma_tx_4_chs,
2892 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
2893 SOC_ENUM_EXT("VA_CDC_DMA_TX_0 Channels", va_cdc_dma_tx_0_chs,
2894 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
2895 SOC_ENUM_EXT("VA_CDC_DMA_TX_1 Channels", va_cdc_dma_tx_1_chs,
2896 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
2897 SOC_ENUM_EXT("VA_CDC_DMA_TX_2 Channels", va_cdc_dma_tx_2_chs,
2898 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
2899 SOC_ENUM_EXT("RX_CDC_DMA_RX_0 Format", rx_cdc_dma_rx_0_format,
2900 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
2901 SOC_ENUM_EXT("RX_CDC_DMA_RX_1 Format", rx_cdc_dma_rx_1_format,
2902 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
2903 SOC_ENUM_EXT("RX_CDC_DMA_RX_2 Format", rx_cdc_dma_rx_2_format,
2904 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
2905 SOC_ENUM_EXT("RX_CDC_DMA_RX_3 Format", rx_cdc_dma_rx_3_format,
2906 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
2907 SOC_ENUM_EXT("RX_CDC_DMA_RX_5 Format", rx_cdc_dma_rx_5_format,
2908 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
2909 SOC_ENUM_EXT("TX_CDC_DMA_TX_0 Format", tx_cdc_dma_tx_0_format,
2910 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
2911 SOC_ENUM_EXT("TX_CDC_DMA_TX_3 Format", tx_cdc_dma_tx_3_format,
2912 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
2913 SOC_ENUM_EXT("TX_CDC_DMA_TX_4 Format", tx_cdc_dma_tx_4_format,
2914 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
2915 SOC_ENUM_EXT("VA_CDC_DMA_TX_0 Format", va_cdc_dma_tx_0_format,
2916 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
2917 SOC_ENUM_EXT("VA_CDC_DMA_TX_1 Format", va_cdc_dma_tx_1_format,
2918 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
2919 SOC_ENUM_EXT("VA_CDC_DMA_TX_2 Format", va_cdc_dma_tx_2_format,
2920 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
2921 SOC_ENUM_EXT("RX_CDC_DMA_RX_0 SampleRate",
2922 rx_cdc_dma_rx_0_sample_rate,
2923 cdc_dma_rx_sample_rate_get,
2924 cdc_dma_rx_sample_rate_put),
2925 SOC_ENUM_EXT("RX_CDC_DMA_RX_1 SampleRate",
2926 rx_cdc_dma_rx_1_sample_rate,
2927 cdc_dma_rx_sample_rate_get,
2928 cdc_dma_rx_sample_rate_put),
2929 SOC_ENUM_EXT("RX_CDC_DMA_RX_2 SampleRate",
2930 rx_cdc_dma_rx_2_sample_rate,
2931 cdc_dma_rx_sample_rate_get,
2932 cdc_dma_rx_sample_rate_put),
2933 SOC_ENUM_EXT("RX_CDC_DMA_RX_3 SampleRate",
2934 rx_cdc_dma_rx_3_sample_rate,
2935 cdc_dma_rx_sample_rate_get,
2936 cdc_dma_rx_sample_rate_put),
2937 SOC_ENUM_EXT("RX_CDC_DMA_RX_5 SampleRate",
2938 rx_cdc_dma_rx_5_sample_rate,
2939 cdc_dma_rx_sample_rate_get,
2940 cdc_dma_rx_sample_rate_put),
2941 SOC_ENUM_EXT("TX_CDC_DMA_TX_0 SampleRate",
2942 tx_cdc_dma_tx_0_sample_rate,
2943 cdc_dma_tx_sample_rate_get,
2944 cdc_dma_tx_sample_rate_put),
2945 SOC_ENUM_EXT("TX_CDC_DMA_TX_3 SampleRate",
2946 tx_cdc_dma_tx_3_sample_rate,
2947 cdc_dma_tx_sample_rate_get,
2948 cdc_dma_tx_sample_rate_put),
2949 SOC_ENUM_EXT("TX_CDC_DMA_TX_4 SampleRate",
2950 tx_cdc_dma_tx_4_sample_rate,
2951 cdc_dma_tx_sample_rate_get,
2952 cdc_dma_tx_sample_rate_put),
2953 SOC_ENUM_EXT("VA_CDC_DMA_TX_0 SampleRate",
2954 va_cdc_dma_tx_0_sample_rate,
2955 cdc_dma_tx_sample_rate_get,
2956 cdc_dma_tx_sample_rate_put),
2957 SOC_ENUM_EXT("VA_CDC_DMA_TX_1 SampleRate",
2958 va_cdc_dma_tx_1_sample_rate,
2959 cdc_dma_tx_sample_rate_get,
2960 cdc_dma_tx_sample_rate_put),
2961 SOC_ENUM_EXT("VA_CDC_DMA_TX_2 SampleRate",
2962 va_cdc_dma_tx_2_sample_rate,
2963 cdc_dma_tx_sample_rate_get,
2964 cdc_dma_tx_sample_rate_put),
2965};
2966
2967static const struct snd_kcontrol_new msm_common_snd_controls[] = {
2968 SOC_ENUM_EXT("USB_AUDIO_RX SampleRate", usb_rx_sample_rate,
2969 usb_audio_rx_sample_rate_get,
2970 usb_audio_rx_sample_rate_put),
2971 SOC_ENUM_EXT("USB_AUDIO_TX SampleRate", usb_tx_sample_rate,
2972 usb_audio_tx_sample_rate_get,
2973 usb_audio_tx_sample_rate_put),
2974 SOC_ENUM_EXT("PRI_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
2975 tdm_rx_sample_rate_get,
2976 tdm_rx_sample_rate_put),
2977 SOC_ENUM_EXT("SEC_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
2978 tdm_rx_sample_rate_get,
2979 tdm_rx_sample_rate_put),
2980 SOC_ENUM_EXT("TERT_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
2981 tdm_rx_sample_rate_get,
2982 tdm_rx_sample_rate_put),
2983 SOC_ENUM_EXT("QUAT_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
2984 tdm_rx_sample_rate_get,
2985 tdm_rx_sample_rate_put),
2986 SOC_ENUM_EXT("PRI_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
2987 tdm_tx_sample_rate_get,
2988 tdm_tx_sample_rate_put),
2989 SOC_ENUM_EXT("SEC_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
2990 tdm_tx_sample_rate_get,
2991 tdm_tx_sample_rate_put),
2992 SOC_ENUM_EXT("TERT_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
2993 tdm_tx_sample_rate_get,
2994 tdm_tx_sample_rate_put),
2995 SOC_ENUM_EXT("QUAT_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
2996 tdm_tx_sample_rate_get,
2997 tdm_tx_sample_rate_put),
2998 SOC_ENUM_EXT("PRIM_AUX_PCM_RX SampleRate", prim_aux_pcm_rx_sample_rate,
2999 aux_pcm_rx_sample_rate_get,
3000 aux_pcm_rx_sample_rate_put),
3001 SOC_ENUM_EXT("SEC_AUX_PCM_RX SampleRate", sec_aux_pcm_rx_sample_rate,
3002 aux_pcm_rx_sample_rate_get,
3003 aux_pcm_rx_sample_rate_put),
3004 SOC_ENUM_EXT("TERT_AUX_PCM_RX SampleRate", tert_aux_pcm_rx_sample_rate,
3005 aux_pcm_rx_sample_rate_get,
3006 aux_pcm_rx_sample_rate_put),
3007 SOC_ENUM_EXT("QUAT_AUX_PCM_RX SampleRate", quat_aux_pcm_rx_sample_rate,
3008 aux_pcm_rx_sample_rate_get,
3009 aux_pcm_rx_sample_rate_put),
3010 SOC_ENUM_EXT("PRIM_AUX_PCM_TX SampleRate", prim_aux_pcm_tx_sample_rate,
3011 aux_pcm_tx_sample_rate_get,
3012 aux_pcm_tx_sample_rate_put),
3013 SOC_ENUM_EXT("SEC_AUX_PCM_TX SampleRate", sec_aux_pcm_tx_sample_rate,
3014 aux_pcm_tx_sample_rate_get,
3015 aux_pcm_tx_sample_rate_put),
3016 SOC_ENUM_EXT("TERT_AUX_PCM_TX SampleRate", tert_aux_pcm_tx_sample_rate,
3017 aux_pcm_tx_sample_rate_get,
3018 aux_pcm_tx_sample_rate_put),
3019 SOC_ENUM_EXT("QUAT_AUX_PCM_TX SampleRate", quat_aux_pcm_tx_sample_rate,
3020 aux_pcm_tx_sample_rate_get,
3021 aux_pcm_tx_sample_rate_put),
3022 SOC_ENUM_EXT("PRIM_MI2S_RX SampleRate", prim_mi2s_rx_sample_rate,
3023 mi2s_rx_sample_rate_get,
3024 mi2s_rx_sample_rate_put),
3025 SOC_ENUM_EXT("SEC_MI2S_RX SampleRate", sec_mi2s_rx_sample_rate,
3026 mi2s_rx_sample_rate_get,
3027 mi2s_rx_sample_rate_put),
3028 SOC_ENUM_EXT("TERT_MI2S_RX SampleRate", tert_mi2s_rx_sample_rate,
3029 mi2s_rx_sample_rate_get,
3030 mi2s_rx_sample_rate_put),
3031 SOC_ENUM_EXT("QUAT_MI2S_RX SampleRate", quat_mi2s_rx_sample_rate,
3032 mi2s_rx_sample_rate_get,
3033 mi2s_rx_sample_rate_put),
3034 SOC_ENUM_EXT("PRIM_MI2S_TX SampleRate", prim_mi2s_tx_sample_rate,
3035 mi2s_tx_sample_rate_get,
3036 mi2s_tx_sample_rate_put),
3037 SOC_ENUM_EXT("SEC_MI2S_TX SampleRate", sec_mi2s_tx_sample_rate,
3038 mi2s_tx_sample_rate_get,
3039 mi2s_tx_sample_rate_put),
3040 SOC_ENUM_EXT("TERT_MI2S_TX SampleRate", tert_mi2s_tx_sample_rate,
3041 mi2s_tx_sample_rate_get,
3042 mi2s_tx_sample_rate_put),
3043 SOC_ENUM_EXT("QUAT_MI2S_TX SampleRate", quat_mi2s_tx_sample_rate,
3044 mi2s_tx_sample_rate_get,
3045 mi2s_tx_sample_rate_put),
3046 SOC_ENUM_EXT("USB_AUDIO_RX Format", usb_rx_format,
3047 usb_audio_rx_format_get, usb_audio_rx_format_put),
3048 SOC_ENUM_EXT("USB_AUDIO_TX Format", usb_tx_format,
3049 usb_audio_tx_format_get, usb_audio_tx_format_put),
3050 SOC_ENUM_EXT("PRI_TDM_RX_0 Format", tdm_rx_format,
3051 tdm_rx_format_get,
3052 tdm_rx_format_put),
3053 SOC_ENUM_EXT("SEC_TDM_RX_0 Format", tdm_rx_format,
3054 tdm_rx_format_get,
3055 tdm_rx_format_put),
3056 SOC_ENUM_EXT("TERT_TDM_RX_0 Format", tdm_rx_format,
3057 tdm_rx_format_get,
3058 tdm_rx_format_put),
3059 SOC_ENUM_EXT("QUAT_TDM_RX_0 Format", tdm_rx_format,
3060 tdm_rx_format_get,
3061 tdm_rx_format_put),
3062 SOC_ENUM_EXT("PRI_TDM_TX_0 Format", tdm_tx_format,
3063 tdm_tx_format_get,
3064 tdm_tx_format_put),
3065 SOC_ENUM_EXT("SEC_TDM_TX_0 Format", tdm_tx_format,
3066 tdm_tx_format_get,
3067 tdm_tx_format_put),
3068 SOC_ENUM_EXT("TERT_TDM_TX_0 Format", tdm_tx_format,
3069 tdm_tx_format_get,
3070 tdm_tx_format_put),
3071 SOC_ENUM_EXT("QUAT_TDM_TX_0 Format", tdm_tx_format,
3072 tdm_tx_format_get,
3073 tdm_tx_format_put),
3074 SOC_ENUM_EXT("PRIM_AUX_PCM_RX Format", aux_pcm_rx_format,
3075 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3076 SOC_ENUM_EXT("SEC_AUX_PCM_RX Format", aux_pcm_rx_format,
3077 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3078 SOC_ENUM_EXT("TERT_AUX_PCM_RX Format", aux_pcm_rx_format,
3079 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3080 SOC_ENUM_EXT("QUAT_AUX_PCM_RX Format", aux_pcm_rx_format,
3081 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3082 SOC_ENUM_EXT("PRIM_AUX_PCM_TX Format", aux_pcm_tx_format,
3083 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3084 SOC_ENUM_EXT("SEC_AUX_PCM_TX Format", aux_pcm_tx_format,
3085 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3086 SOC_ENUM_EXT("TERT_AUX_PCM_TX Format", aux_pcm_tx_format,
3087 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3088 SOC_ENUM_EXT("QUAT_AUX_PCM_TX Format", aux_pcm_tx_format,
3089 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3090 SOC_ENUM_EXT("PRIM_MI2S_RX Format", mi2s_rx_format,
3091 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
3092 SOC_ENUM_EXT("SEC_MI2S_RX Format", mi2s_rx_format,
3093 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
3094 SOC_ENUM_EXT("TERT_MI2S_RX Format", mi2s_rx_format,
3095 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
3096 SOC_ENUM_EXT("QUAT_MI2S_RX Format", mi2s_rx_format,
3097 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
3098 SOC_ENUM_EXT("PRIM_MI2S_TX Format", mi2s_tx_format,
3099 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
3100 SOC_ENUM_EXT("SEC_MI2S_TX Format", mi2s_tx_format,
3101 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
3102 SOC_ENUM_EXT("TERT_MI2S_TX Format", mi2s_tx_format,
3103 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
3104 SOC_ENUM_EXT("QUAT_MI2S_TX Format", mi2s_tx_format,
3105 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
3106 SOC_ENUM_EXT("USB_AUDIO_RX Channels", usb_rx_chs,
3107 usb_audio_rx_ch_get, usb_audio_rx_ch_put),
3108 SOC_ENUM_EXT("USB_AUDIO_TX Channels", usb_tx_chs,
3109 usb_audio_tx_ch_get, usb_audio_tx_ch_put),
3110 SOC_ENUM_EXT("PROXY_RX Channels", proxy_rx_chs,
3111 proxy_rx_ch_get, proxy_rx_ch_put),
3112 SOC_ENUM_EXT("PRI_TDM_RX_0 Channels", tdm_rx_chs,
3113 tdm_rx_ch_get,
3114 tdm_rx_ch_put),
3115 SOC_ENUM_EXT("SEC_TDM_RX_0 Channels", tdm_rx_chs,
3116 tdm_rx_ch_get,
3117 tdm_rx_ch_put),
3118 SOC_ENUM_EXT("TERT_TDM_RX_0 Channels", tdm_rx_chs,
3119 tdm_rx_ch_get,
3120 tdm_rx_ch_put),
3121 SOC_ENUM_EXT("QUAT_TDM_RX_0 Channels", tdm_rx_chs,
3122 tdm_rx_ch_get,
3123 tdm_rx_ch_put),
3124 SOC_ENUM_EXT("PRI_TDM_TX_0 Channels", tdm_tx_chs,
3125 tdm_tx_ch_get,
3126 tdm_tx_ch_put),
3127 SOC_ENUM_EXT("SEC_TDM_TX_0 Channels", tdm_tx_chs,
3128 tdm_tx_ch_get,
3129 tdm_tx_ch_put),
3130 SOC_ENUM_EXT("TERT_TDM_TX_0 Channels", tdm_tx_chs,
3131 tdm_tx_ch_get,
3132 tdm_tx_ch_put),
3133 SOC_ENUM_EXT("QUAT_TDM_TX_0 Channels", tdm_tx_chs,
3134 tdm_tx_ch_get,
3135 tdm_tx_ch_put),
3136 SOC_ENUM_EXT("PRIM_MI2S_RX Channels", prim_mi2s_rx_chs,
3137 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
3138 SOC_ENUM_EXT("SEC_MI2S_RX Channels", sec_mi2s_rx_chs,
3139 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
3140 SOC_ENUM_EXT("TERT_MI2S_RX Channels", tert_mi2s_rx_chs,
3141 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
3142 SOC_ENUM_EXT("QUAT_MI2S_RX Channels", quat_mi2s_rx_chs,
3143 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
3144 SOC_ENUM_EXT("PRIM_MI2S_TX Channels", prim_mi2s_tx_chs,
3145 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
3146 SOC_ENUM_EXT("SEC_MI2S_TX Channels", sec_mi2s_tx_chs,
3147 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
3148 SOC_ENUM_EXT("TERT_MI2S_TX Channels", tert_mi2s_tx_chs,
3149 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
3150 SOC_ENUM_EXT("QUAT_MI2S_TX Channels", quat_mi2s_tx_chs,
3151 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
3152 SOC_ENUM_EXT("BT SampleRate", bt_sample_rate,
3153 msm_bt_sample_rate_get,
3154 msm_bt_sample_rate_put),
3155 SOC_ENUM_EXT("BT SampleRate RX", bt_sample_rate_rx,
3156 msm_bt_sample_rate_rx_get,
3157 msm_bt_sample_rate_rx_put),
3158 SOC_ENUM_EXT("BT SampleRate TX", bt_sample_rate_tx,
3159 msm_bt_sample_rate_tx_get,
3160 msm_bt_sample_rate_tx_put),
3161 SOC_ENUM_EXT("AFE_LOOPBACK_TX Channels", afe_loopback_tx_chs,
3162 afe_loopback_tx_ch_get, afe_loopback_tx_ch_put),
3163 SOC_ENUM_EXT("VI_FEED_TX Channels", vi_feed_tx_chs,
3164 msm_vi_feed_tx_ch_get, msm_vi_feed_tx_ch_put),
3165};
3166
3167static const struct snd_kcontrol_new msm_snd_controls[] = {
3168 SOC_ENUM_EXT("PRIM_AUX_PCM_RX Format", aux_pcm_rx_format,
3169 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3170 SOC_ENUM_EXT("PRIM_AUX_PCM_TX Format", aux_pcm_tx_format,
3171 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3172 SOC_ENUM_EXT("PRIM_AUX_PCM_RX SampleRate", prim_aux_pcm_rx_sample_rate,
3173 aux_pcm_rx_sample_rate_get,
3174 aux_pcm_rx_sample_rate_put),
3175 SOC_ENUM_EXT("PRIM_AUX_PCM_TX SampleRate", prim_aux_pcm_tx_sample_rate,
3176 aux_pcm_tx_sample_rate_get,
3177 aux_pcm_tx_sample_rate_put),
3178};
3179
3180static int bengal_send_island_va_config(int32_t be_id)
3181{
3182 int rc = 0;
3183 int port_id = 0xFFFF;
3184
3185 port_id = msm_get_port_id(be_id);
3186 if (port_id < 0) {
3187 pr_err("%s: Invalid island interface, be_id: %d\n",
3188 __func__, be_id);
3189 rc = -EINVAL;
3190 } else {
3191 /*
3192 * send island mode config
3193 * This should be the first configuration
3194 */
3195 rc = afe_send_port_island_mode(port_id);
3196 if (rc)
3197 pr_err("%s: afe send island mode failed %d\n",
3198 __func__, rc);
3199 }
3200
3201 return rc;
3202}
3203
3204static int msm_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
3205 struct snd_pcm_hw_params *params)
3206{
3207 struct snd_soc_dai_link *dai_link = rtd->dai_link;
3208 struct snd_interval *rate = hw_param_interval(params,
3209 SNDRV_PCM_HW_PARAM_RATE);
3210 struct snd_interval *channels = hw_param_interval(params,
3211 SNDRV_PCM_HW_PARAM_CHANNELS);
3212 int idx = 0;
3213
3214 pr_debug("%s: format = %d, rate = %d\n",
3215 __func__, params_format(params), params_rate(params));
3216
3217 switch (dai_link->id) {
3218 case MSM_BACKEND_DAI_USB_RX:
3219 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3220 usb_rx_cfg.bit_format);
3221 rate->min = rate->max = usb_rx_cfg.sample_rate;
3222 channels->min = channels->max = usb_rx_cfg.channels;
3223 break;
3224
3225 case MSM_BACKEND_DAI_USB_TX:
3226 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3227 usb_tx_cfg.bit_format);
3228 rate->min = rate->max = usb_tx_cfg.sample_rate;
3229 channels->min = channels->max = usb_tx_cfg.channels;
3230 break;
3231
3232 case MSM_BACKEND_DAI_AFE_PCM_RX:
3233 channels->min = channels->max = proxy_rx_cfg.channels;
3234 rate->min = rate->max = SAMPLING_RATE_48KHZ;
3235 break;
3236
3237 case MSM_BACKEND_DAI_PRI_TDM_RX_0:
3238 channels->min = channels->max =
3239 tdm_rx_cfg[TDM_PRI][TDM_0].channels;
3240 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3241 tdm_rx_cfg[TDM_PRI][TDM_0].bit_format);
3242 rate->min = rate->max = tdm_rx_cfg[TDM_PRI][TDM_0].sample_rate;
3243 break;
3244
3245 case MSM_BACKEND_DAI_PRI_TDM_TX_0:
3246 channels->min = channels->max =
3247 tdm_tx_cfg[TDM_PRI][TDM_0].channels;
3248 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3249 tdm_tx_cfg[TDM_PRI][TDM_0].bit_format);
3250 rate->min = rate->max = tdm_tx_cfg[TDM_PRI][TDM_0].sample_rate;
3251 break;
3252
3253 case MSM_BACKEND_DAI_SEC_TDM_RX_0:
3254 channels->min = channels->max =
3255 tdm_rx_cfg[TDM_SEC][TDM_0].channels;
3256 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3257 tdm_rx_cfg[TDM_SEC][TDM_0].bit_format);
3258 rate->min = rate->max = tdm_rx_cfg[TDM_SEC][TDM_0].sample_rate;
3259 break;
3260
3261 case MSM_BACKEND_DAI_SEC_TDM_TX_0:
3262 channels->min = channels->max =
3263 tdm_tx_cfg[TDM_SEC][TDM_0].channels;
3264 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3265 tdm_tx_cfg[TDM_SEC][TDM_0].bit_format);
3266 rate->min = rate->max = tdm_tx_cfg[TDM_SEC][TDM_0].sample_rate;
3267 break;
3268
3269 case MSM_BACKEND_DAI_TERT_TDM_RX_0:
3270 channels->min = channels->max =
3271 tdm_rx_cfg[TDM_TERT][TDM_0].channels;
3272 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3273 tdm_rx_cfg[TDM_TERT][TDM_0].bit_format);
3274 rate->min = rate->max = tdm_rx_cfg[TDM_TERT][TDM_0].sample_rate;
3275 break;
3276
3277 case MSM_BACKEND_DAI_TERT_TDM_TX_0:
3278 channels->min = channels->max =
3279 tdm_tx_cfg[TDM_TERT][TDM_0].channels;
3280 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3281 tdm_tx_cfg[TDM_TERT][TDM_0].bit_format);
3282 rate->min = rate->max = tdm_tx_cfg[TDM_TERT][TDM_0].sample_rate;
3283 break;
3284
3285 case MSM_BACKEND_DAI_QUAT_TDM_RX_0:
3286 channels->min = channels->max =
3287 tdm_rx_cfg[TDM_QUAT][TDM_0].channels;
3288 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3289 tdm_rx_cfg[TDM_QUAT][TDM_0].bit_format);
3290 rate->min = rate->max = tdm_rx_cfg[TDM_QUAT][TDM_0].sample_rate;
3291 break;
3292
3293 case MSM_BACKEND_DAI_QUAT_TDM_TX_0:
3294 channels->min = channels->max =
3295 tdm_tx_cfg[TDM_QUAT][TDM_0].channels;
3296 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3297 tdm_tx_cfg[TDM_QUAT][TDM_0].bit_format);
3298 rate->min = rate->max = tdm_tx_cfg[TDM_QUAT][TDM_0].sample_rate;
3299 break;
3300
3301 case MSM_BACKEND_DAI_AUXPCM_RX:
3302 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3303 aux_pcm_rx_cfg[PRIM_AUX_PCM].bit_format);
3304 rate->min = rate->max =
3305 aux_pcm_rx_cfg[PRIM_AUX_PCM].sample_rate;
3306 channels->min = channels->max =
3307 aux_pcm_rx_cfg[PRIM_AUX_PCM].channels;
3308 break;
3309
3310 case MSM_BACKEND_DAI_AUXPCM_TX:
3311 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3312 aux_pcm_tx_cfg[PRIM_AUX_PCM].bit_format);
3313 rate->min = rate->max =
3314 aux_pcm_tx_cfg[PRIM_AUX_PCM].sample_rate;
3315 channels->min = channels->max =
3316 aux_pcm_tx_cfg[PRIM_AUX_PCM].channels;
3317 break;
3318
3319 case MSM_BACKEND_DAI_SEC_AUXPCM_RX:
3320 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3321 aux_pcm_rx_cfg[SEC_AUX_PCM].bit_format);
3322 rate->min = rate->max =
3323 aux_pcm_rx_cfg[SEC_AUX_PCM].sample_rate;
3324 channels->min = channels->max =
3325 aux_pcm_rx_cfg[SEC_AUX_PCM].channels;
3326 break;
3327
3328 case MSM_BACKEND_DAI_SEC_AUXPCM_TX:
3329 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3330 aux_pcm_tx_cfg[SEC_AUX_PCM].bit_format);
3331 rate->min = rate->max =
3332 aux_pcm_tx_cfg[SEC_AUX_PCM].sample_rate;
3333 channels->min = channels->max =
3334 aux_pcm_tx_cfg[SEC_AUX_PCM].channels;
3335 break;
3336
3337 case MSM_BACKEND_DAI_TERT_AUXPCM_RX:
3338 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3339 aux_pcm_rx_cfg[TERT_AUX_PCM].bit_format);
3340 rate->min = rate->max =
3341 aux_pcm_rx_cfg[TERT_AUX_PCM].sample_rate;
3342 channels->min = channels->max =
3343 aux_pcm_rx_cfg[TERT_AUX_PCM].channels;
3344 break;
3345
3346 case MSM_BACKEND_DAI_TERT_AUXPCM_TX:
3347 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3348 aux_pcm_tx_cfg[TERT_AUX_PCM].bit_format);
3349 rate->min = rate->max =
3350 aux_pcm_tx_cfg[TERT_AUX_PCM].sample_rate;
3351 channels->min = channels->max =
3352 aux_pcm_tx_cfg[TERT_AUX_PCM].channels;
3353 break;
3354
3355 case MSM_BACKEND_DAI_QUAT_AUXPCM_RX:
3356 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3357 aux_pcm_rx_cfg[QUAT_AUX_PCM].bit_format);
3358 rate->min = rate->max =
3359 aux_pcm_rx_cfg[QUAT_AUX_PCM].sample_rate;
3360 channels->min = channels->max =
3361 aux_pcm_rx_cfg[QUAT_AUX_PCM].channels;
3362 break;
3363
3364 case MSM_BACKEND_DAI_QUAT_AUXPCM_TX:
3365 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3366 aux_pcm_tx_cfg[QUAT_AUX_PCM].bit_format);
3367 rate->min = rate->max =
3368 aux_pcm_tx_cfg[QUAT_AUX_PCM].sample_rate;
3369 channels->min = channels->max =
3370 aux_pcm_tx_cfg[QUAT_AUX_PCM].channels;
3371 break;
3372
3373 case MSM_BACKEND_DAI_PRI_MI2S_RX:
3374 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3375 mi2s_rx_cfg[PRIM_MI2S].bit_format);
3376 rate->min = rate->max = mi2s_rx_cfg[PRIM_MI2S].sample_rate;
3377 channels->min = channels->max =
3378 mi2s_rx_cfg[PRIM_MI2S].channels;
3379 break;
3380
3381 case MSM_BACKEND_DAI_PRI_MI2S_TX:
3382 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3383 mi2s_tx_cfg[PRIM_MI2S].bit_format);
3384 rate->min = rate->max = mi2s_tx_cfg[PRIM_MI2S].sample_rate;
3385 channels->min = channels->max =
3386 mi2s_tx_cfg[PRIM_MI2S].channels;
3387 break;
3388
3389 case MSM_BACKEND_DAI_SECONDARY_MI2S_RX:
3390 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3391 mi2s_rx_cfg[SEC_MI2S].bit_format);
3392 rate->min = rate->max = mi2s_rx_cfg[SEC_MI2S].sample_rate;
3393 channels->min = channels->max =
3394 mi2s_rx_cfg[SEC_MI2S].channels;
3395 break;
3396
3397 case MSM_BACKEND_DAI_SECONDARY_MI2S_TX:
3398 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3399 mi2s_tx_cfg[SEC_MI2S].bit_format);
3400 rate->min = rate->max = mi2s_tx_cfg[SEC_MI2S].sample_rate;
3401 channels->min = channels->max =
3402 mi2s_tx_cfg[SEC_MI2S].channels;
3403 break;
3404
3405 case MSM_BACKEND_DAI_TERTIARY_MI2S_RX:
3406 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3407 mi2s_rx_cfg[TERT_MI2S].bit_format);
3408 rate->min = rate->max = mi2s_rx_cfg[TERT_MI2S].sample_rate;
3409 channels->min = channels->max =
3410 mi2s_rx_cfg[TERT_MI2S].channels;
3411 break;
3412
3413 case MSM_BACKEND_DAI_TERTIARY_MI2S_TX:
3414 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3415 mi2s_tx_cfg[TERT_MI2S].bit_format);
3416 rate->min = rate->max = mi2s_tx_cfg[TERT_MI2S].sample_rate;
3417 channels->min = channels->max =
3418 mi2s_tx_cfg[TERT_MI2S].channels;
3419 break;
3420
3421 case MSM_BACKEND_DAI_QUATERNARY_MI2S_RX:
3422 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3423 mi2s_rx_cfg[QUAT_MI2S].bit_format);
3424 rate->min = rate->max = mi2s_rx_cfg[QUAT_MI2S].sample_rate;
3425 channels->min = channels->max =
3426 mi2s_rx_cfg[QUAT_MI2S].channels;
3427 break;
3428
3429 case MSM_BACKEND_DAI_QUATERNARY_MI2S_TX:
3430 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3431 mi2s_tx_cfg[QUAT_MI2S].bit_format);
3432 rate->min = rate->max = mi2s_tx_cfg[QUAT_MI2S].sample_rate;
3433 channels->min = channels->max =
3434 mi2s_tx_cfg[QUAT_MI2S].channels;
3435 break;
3436
3437 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
3438 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
3439 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
3440 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_3:
3441 idx = msm_cdc_dma_get_idx_from_beid(dai_link->id);
3442 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3443 cdc_dma_rx_cfg[idx].bit_format);
3444 rate->min = rate->max = cdc_dma_rx_cfg[idx].sample_rate;
3445 channels->min = channels->max = cdc_dma_rx_cfg[idx].channels;
3446 break;
3447
3448 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
3449 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
3450 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
3451 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_0:
3452 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_1:
3453 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_2:
3454 idx = msm_cdc_dma_get_idx_from_beid(dai_link->id);
3455 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3456 cdc_dma_tx_cfg[idx].bit_format);
3457 rate->min = rate->max = cdc_dma_tx_cfg[idx].sample_rate;
3458 channels->min = channels->max = cdc_dma_tx_cfg[idx].channels;
3459 break;
3460
3461 case MSM_BACKEND_DAI_SLIMBUS_7_RX:
3462 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3463 slim_rx_cfg[SLIM_RX_7].bit_format);
3464 rate->min = rate->max = slim_rx_cfg[SLIM_RX_7].sample_rate;
3465 channels->min = channels->max =
3466 slim_rx_cfg[SLIM_RX_7].channels;
3467 break;
3468
3469 case MSM_BACKEND_DAI_SLIMBUS_7_TX:
3470 rate->min = rate->max = slim_tx_cfg[SLIM_TX_7].sample_rate;
3471 channels->min = channels->max =
3472 slim_tx_cfg[SLIM_TX_7].channels;
3473 break;
3474
3475 case MSM_BACKEND_DAI_SLIMBUS_8_TX:
3476 rate->min = rate->max = slim_tx_cfg[SLIM_TX_8].sample_rate;
3477 channels->min = channels->max =
3478 slim_tx_cfg[SLIM_TX_8].channels;
3479 break;
3480
3481 case MSM_BACKEND_DAI_AFE_LOOPBACK_TX:
3482 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3483 afe_loopback_tx_cfg[idx].bit_format);
3484 rate->min = rate->max = afe_loopback_tx_cfg[idx].sample_rate;
3485 channels->min = channels->max =
3486 afe_loopback_tx_cfg[idx].channels;
3487 break;
3488
3489 default:
3490 rate->min = rate->max = SAMPLING_RATE_48KHZ;
3491 break;
3492 }
3493
3494 return 0;
3495}
3496
3497static bool msm_usbc_swap_gnd_mic(struct snd_soc_component *component,
3498 bool active)
3499{
3500 struct snd_soc_card *card = component->card;
3501 struct msm_asoc_mach_data *pdata =
3502 snd_soc_card_get_drvdata(card);
3503
3504 if (!pdata->fsa_handle)
3505 return false;
3506
3507 return fsa4480_switch_event(pdata->fsa_handle, FSA_MIC_GND_SWAP);
3508}
3509
3510static bool msm_swap_gnd_mic(struct snd_soc_component *component, bool active)
3511{
3512 int value = 0;
3513 bool ret = false;
3514 struct snd_soc_card *card;
3515 struct msm_asoc_mach_data *pdata;
3516
3517 if (!component) {
3518 pr_err("%s component is NULL\n", __func__);
3519 return false;
3520 }
3521 card = component->card;
3522 pdata = snd_soc_card_get_drvdata(card);
3523
3524 if (!pdata)
3525 return false;
3526
3527 if (wcd_mbhc_cfg.enable_usbc_analog)
3528 return msm_usbc_swap_gnd_mic(component, active);
3529
3530 /* if usbc is not defined, swap using us_euro_gpio_p */
3531 if (pdata->us_euro_gpio_p) {
3532 value = msm_cdc_pinctrl_get_state(
3533 pdata->us_euro_gpio_p);
3534 if (value)
3535 msm_cdc_pinctrl_select_sleep_state(
3536 pdata->us_euro_gpio_p);
3537 else
3538 msm_cdc_pinctrl_select_active_state(
3539 pdata->us_euro_gpio_p);
3540 dev_dbg(component->dev, "%s: swap select switch %d to %d\n",
3541 __func__, value, !value);
3542 ret = true;
3543 }
3544
3545 return ret;
3546}
3547
3548static int bengal_tdm_snd_hw_params(struct snd_pcm_substream *substream,
3549 struct snd_pcm_hw_params *params)
3550{
3551 struct snd_soc_pcm_runtime *rtd = substream->private_data;
3552 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
3553 int ret = 0;
3554 int slot_width = 32;
3555 int channels, slots;
3556 unsigned int slot_mask, rate, clk_freq;
3557 unsigned int slot_offset[8] = {0, 4, 8, 12, 16, 20, 24, 28};
3558
3559 pr_debug("%s: dai id = 0x%x\n", __func__, cpu_dai->id);
3560
3561 /* currently only supporting TDM_RX_0 and TDM_TX_0 */
3562 switch (cpu_dai->id) {
3563 case AFE_PORT_ID_PRIMARY_TDM_RX:
3564 slots = tdm_rx_cfg[TDM_PRI][TDM_0].channels;
3565 break;
3566 case AFE_PORT_ID_SECONDARY_TDM_RX:
3567 slots = tdm_rx_cfg[TDM_SEC][TDM_0].channels;
3568 break;
3569 case AFE_PORT_ID_TERTIARY_TDM_RX:
3570 slots = tdm_rx_cfg[TDM_TERT][TDM_0].channels;
3571 break;
3572 case AFE_PORT_ID_QUATERNARY_TDM_RX:
3573 slots = tdm_rx_cfg[TDM_QUAT][TDM_0].channels;
3574 break;
3575 case AFE_PORT_ID_PRIMARY_TDM_TX:
3576 slots = tdm_tx_cfg[TDM_PRI][TDM_0].channels;
3577 break;
3578 case AFE_PORT_ID_SECONDARY_TDM_TX:
3579 slots = tdm_tx_cfg[TDM_SEC][TDM_0].channels;
3580 break;
3581 case AFE_PORT_ID_TERTIARY_TDM_TX:
3582 slots = tdm_tx_cfg[TDM_TERT][TDM_0].channels;
3583 break;
3584 case AFE_PORT_ID_QUATERNARY_TDM_TX:
3585 slots = tdm_tx_cfg[TDM_QUAT][TDM_0].channels;
3586 break;
3587
3588 default:
3589 pr_err("%s: dai id 0x%x not supported\n",
3590 __func__, cpu_dai->id);
3591 return -EINVAL;
3592 }
3593
3594 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
3595 /*2 slot config - bits 0 and 1 set for the first two slots */
3596 slot_mask = 0x0000FFFF >> (16 - slots);
3597 channels = slots;
3598
3599 pr_debug("%s: tdm rx slot_width %d slots %d\n",
3600 __func__, slot_width, slots);
3601
3602 ret = snd_soc_dai_set_tdm_slot(cpu_dai, 0, slot_mask,
3603 slots, slot_width);
3604 if (ret < 0) {
3605 pr_err("%s: failed to set tdm rx slot, err:%d\n",
3606 __func__, ret);
3607 goto end;
3608 }
3609
3610 ret = snd_soc_dai_set_channel_map(cpu_dai,
3611 0, NULL, channels, slot_offset);
3612 if (ret < 0) {
3613 pr_err("%s: failed to set tdm rx channel map, err:%d\n",
3614 __func__, ret);
3615 goto end;
3616 }
3617 } else if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
3618 /*2 slot config - bits 0 and 1 set for the first two slots */
3619 slot_mask = 0x0000FFFF >> (16 - slots);
3620 channels = slots;
3621
3622 pr_debug("%s: tdm tx slot_width %d slots %d\n",
3623 __func__, slot_width, slots);
3624
3625 ret = snd_soc_dai_set_tdm_slot(cpu_dai, slot_mask, 0,
3626 slots, slot_width);
3627 if (ret < 0) {
3628 pr_err("%s: failed to set tdm tx slot, err:%d\n",
3629 __func__, ret);
3630 goto end;
3631 }
3632
3633 ret = snd_soc_dai_set_channel_map(cpu_dai,
3634 channels, slot_offset, 0, NULL);
3635 if (ret < 0) {
3636 pr_err("%s: failed to set tdm tx channel map, err:%d\n",
3637 __func__, ret);
3638 goto end;
3639 }
3640 } else {
3641 ret = -EINVAL;
3642 pr_err("%s: invalid use case, err:%d\n",
3643 __func__, ret);
3644 goto end;
3645 }
3646
3647 rate = params_rate(params);
3648 clk_freq = rate * slot_width * slots;
3649 ret = snd_soc_dai_set_sysclk(cpu_dai, 0, clk_freq, SND_SOC_CLOCK_OUT);
3650 if (ret < 0)
3651 pr_err("%s: failed to set tdm clk, err:%d\n",
3652 __func__, ret);
3653
3654end:
3655 return ret;
3656}
3657
3658static int msm_get_tdm_mode(u32 port_id)
3659{
3660 int tdm_mode;
3661
3662 switch (port_id) {
3663 case AFE_PORT_ID_PRIMARY_TDM_RX:
3664 case AFE_PORT_ID_PRIMARY_TDM_TX:
3665 tdm_mode = TDM_PRI;
3666 break;
3667 case AFE_PORT_ID_SECONDARY_TDM_RX:
3668 case AFE_PORT_ID_SECONDARY_TDM_TX:
3669 tdm_mode = TDM_SEC;
3670 break;
3671 case AFE_PORT_ID_TERTIARY_TDM_RX:
3672 case AFE_PORT_ID_TERTIARY_TDM_TX:
3673 tdm_mode = TDM_TERT;
3674 break;
3675 case AFE_PORT_ID_QUATERNARY_TDM_RX:
3676 case AFE_PORT_ID_QUATERNARY_TDM_TX:
3677 tdm_mode = TDM_QUAT;
3678 break;
3679 default:
3680 pr_err("%s: Invalid port id: %d\n", __func__, port_id);
3681 tdm_mode = -EINVAL;
3682 }
3683 return tdm_mode;
3684}
3685
3686static int bengal_tdm_snd_startup(struct snd_pcm_substream *substream)
3687{
3688 int ret = 0;
3689 struct snd_soc_pcm_runtime *rtd = substream->private_data;
3690 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
3691 struct snd_soc_card *card = rtd->card;
3692 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
3693 int tdm_mode = msm_get_tdm_mode(cpu_dai->id);
3694
3695 if (tdm_mode >= TDM_INTERFACE_MAX || tdm_mode < 0) {
3696 ret = -EINVAL;
3697 pr_err("%s: Invalid TDM interface %d\n",
3698 __func__, ret);
3699 return ret;
3700 }
3701
3702 if (pdata->mi2s_gpio_p[tdm_mode]) {
3703 if (atomic_read(&(pdata->mi2s_gpio_ref_count[tdm_mode]))
3704 == 0) {
3705 ret = msm_cdc_pinctrl_select_active_state(
3706 pdata->mi2s_gpio_p[tdm_mode]);
3707 if (ret) {
3708 pr_err("%s: TDM GPIO pinctrl set active failed with %d\n",
3709 __func__, ret);
3710 goto done;
3711 }
3712 }
3713 atomic_inc(&(pdata->mi2s_gpio_ref_count[tdm_mode]));
3714 }
3715
3716done:
3717 return ret;
3718}
3719
3720static void bengal_tdm_snd_shutdown(struct snd_pcm_substream *substream)
3721{
3722 int ret = 0;
3723 struct snd_soc_pcm_runtime *rtd = substream->private_data;
3724 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
3725 struct snd_soc_card *card = rtd->card;
3726 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
3727 int tdm_mode = msm_get_tdm_mode(cpu_dai->id);
3728
3729 if (tdm_mode >= TDM_INTERFACE_MAX || tdm_mode < 0) {
3730 ret = -EINVAL;
3731 pr_err("%s: Invalid TDM interface %d\n",
3732 __func__, ret);
3733 return;
3734 }
3735
3736 if (pdata->mi2s_gpio_p[tdm_mode]) {
3737 atomic_dec(&(pdata->mi2s_gpio_ref_count[tdm_mode]));
3738 if (atomic_read(&(pdata->mi2s_gpio_ref_count[tdm_mode]))
3739 == 0) {
3740 ret = msm_cdc_pinctrl_select_sleep_state(
3741 pdata->mi2s_gpio_p[tdm_mode]);
3742 if (ret)
3743 pr_err("%s: TDM GPIO pinctrl set sleep failed with %d\n",
3744 __func__, ret);
3745 }
3746 }
3747}
3748
3749static int bengal_aux_snd_startup(struct snd_pcm_substream *substream)
3750{
3751 int ret = 0;
3752 struct snd_soc_pcm_runtime *rtd = substream->private_data;
3753 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
3754 struct snd_soc_card *card = rtd->card;
3755 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
3756 u32 aux_mode = cpu_dai->id - 1;
3757
3758 if (aux_mode >= AUX_PCM_MAX) {
3759 ret = -EINVAL;
3760 pr_err("%s: Invalid AUX interface %d\n",
3761 __func__, ret);
3762 return ret;
3763 }
3764
3765 if (pdata->mi2s_gpio_p[aux_mode]) {
3766 if (atomic_read(&(pdata->mi2s_gpio_ref_count[aux_mode]))
3767 == 0) {
3768 ret = msm_cdc_pinctrl_select_active_state(
3769 pdata->mi2s_gpio_p[aux_mode]);
3770 if (ret) {
3771 pr_err("%s: AUX GPIO pinctrl set active failed with %d\n",
3772 __func__, ret);
3773 goto done;
3774 }
3775 }
3776 atomic_inc(&(pdata->mi2s_gpio_ref_count[aux_mode]));
3777 }
3778
3779done:
3780 return ret;
3781}
3782
3783static void bengal_aux_snd_shutdown(struct snd_pcm_substream *substream)
3784{
3785 int ret = 0;
3786 struct snd_soc_pcm_runtime *rtd = substream->private_data;
3787 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
3788 struct snd_soc_card *card = rtd->card;
3789 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
3790 u32 aux_mode = cpu_dai->id - 1;
3791
3792 if (aux_mode >= AUX_PCM_MAX) {
3793 pr_err("%s: Invalid AUX interface %d\n",
3794 __func__, ret);
3795 return;
3796 }
3797
3798 if (pdata->mi2s_gpio_p[aux_mode]) {
3799 atomic_dec(&(pdata->mi2s_gpio_ref_count[aux_mode]));
3800 if (atomic_read(&(pdata->mi2s_gpio_ref_count[aux_mode]))
3801 == 0) {
3802 ret = msm_cdc_pinctrl_select_sleep_state(
3803 pdata->mi2s_gpio_p[aux_mode]);
3804 if (ret)
3805 pr_err("%s: AUX GPIO pinctrl set sleep failed with %d\n",
3806 __func__, ret);
3807 }
3808 }
3809}
3810
3811static int msm_snd_cdc_dma_startup(struct snd_pcm_substream *substream)
3812{
3813 int ret = 0;
3814 struct snd_soc_pcm_runtime *rtd = substream->private_data;
3815 struct snd_soc_dai_link *dai_link = rtd->dai_link;
3816
3817 switch (dai_link->id) {
3818 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_0:
3819 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_1:
3820 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_2:
Laxminath Kasam8d37df92019-11-22 15:46:11 +0530[diff] [blame^]3821 if (va_disable)
3822 break;
Laxminath Kasamae52c992019-08-26 15:01:15 +0530[diff] [blame]3823 ret = bengal_send_island_va_config(dai_link->id);
3824 if (ret)
3825 pr_err("%s: send island va cfg failed, err: %d\n",
3826 __func__, ret);
3827 break;
3828 }
3829
3830 return ret;
3831}
3832
3833static int msm_snd_cdc_dma_hw_params(struct snd_pcm_substream *substream,
3834 struct snd_pcm_hw_params *params)
3835{
3836 struct snd_soc_pcm_runtime *rtd = substream->private_data;
3837 struct snd_soc_dai *codec_dai = rtd->codec_dai;
3838 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
3839 struct snd_soc_dai_link *dai_link = rtd->dai_link;
3840
3841 int ret = 0;
3842 u32 rx_ch_cdc_dma, tx_ch_cdc_dma;
3843 u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
3844 u32 user_set_tx_ch = 0;
3845 u32 user_set_rx_ch = 0;
3846 u32 ch_id;
3847
3848 ret = snd_soc_dai_get_channel_map(codec_dai,
3849 &tx_ch_cnt, &tx_ch_cdc_dma, &rx_ch_cnt,
3850 &rx_ch_cdc_dma);
3851 if (ret < 0) {
3852 pr_err("%s: failed to get codec chan map, err:%d\n",
3853 __func__, ret);
3854 goto err;
3855 }
3856
3857 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
3858 switch (dai_link->id) {
3859 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
3860 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
3861 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
3862 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_3:
3863 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_4:
3864 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_5:
3865 {
3866 ch_id = msm_cdc_dma_get_idx_from_beid(dai_link->id);
3867 pr_debug("%s: id %d rx_ch=%d\n", __func__,
3868 ch_id, cdc_dma_rx_cfg[ch_id].channels);
3869 user_set_rx_ch = cdc_dma_rx_cfg[ch_id].channels;
3870 ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
3871 user_set_rx_ch, &rx_ch_cdc_dma);
3872 if (ret < 0) {
3873 pr_err("%s: failed to set cpu chan map, err:%d\n",
3874 __func__, ret);
3875 goto err;
3876 }
3877
3878 }
3879 break;
3880 }
3881 } else {
3882 switch (dai_link->id) {
3883 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
3884 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
3885 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
3886 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_0:
3887 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_1:
3888 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_2:
3889 {
3890 ch_id = msm_cdc_dma_get_idx_from_beid(dai_link->id);
3891 pr_debug("%s: id %d tx_ch=%d\n", __func__,
3892 ch_id, cdc_dma_tx_cfg[ch_id].channels);
3893 user_set_tx_ch = cdc_dma_tx_cfg[ch_id].channels;
3894 }
3895 break;
3896 }
3897
3898 ret = snd_soc_dai_set_channel_map(cpu_dai, user_set_tx_ch,
3899 &tx_ch_cdc_dma, 0, 0);
3900 if (ret < 0) {
3901 pr_err("%s: failed to set cpu chan map, err:%d\n",
3902 __func__, ret);
3903 goto err;
3904 }
3905 }
3906
3907err:
3908 return ret;
3909}
3910
3911static int msm_fe_qos_prepare(struct snd_pcm_substream *substream)
3912{
3913 cpumask_t mask;
3914
3915 if (pm_qos_request_active(&substream->latency_pm_qos_req))
3916 pm_qos_remove_request(&substream->latency_pm_qos_req);
3917
3918 cpumask_clear(&mask);
3919 cpumask_set_cpu(1, &mask); /* affine to core 1 */
3920 cpumask_set_cpu(2, &mask); /* affine to core 2 */
3921 cpumask_copy(&substream->latency_pm_qos_req.cpus_affine, &mask);
3922
3923 substream->latency_pm_qos_req.type = PM_QOS_REQ_AFFINE_CORES;
3924
3925 pm_qos_add_request(&substream->latency_pm_qos_req,
3926 PM_QOS_CPU_DMA_LATENCY,
3927 MSM_LL_QOS_VALUE);
3928 return 0;
3929}
3930
3931static int msm_mi2s_snd_startup(struct snd_pcm_substream *substream)
3932{
3933 int ret = 0;
3934 struct snd_soc_pcm_runtime *rtd = substream->private_data;
3935 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
3936 int index = cpu_dai->id;
3937 unsigned int fmt = SND_SOC_DAIFMT_CBS_CFS;
3938 struct snd_soc_card *card = rtd->card;
3939 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
3940
3941 dev_dbg(rtd->card->dev,
3942 "%s: substream = %s stream = %d, dai name %s, dai ID %d\n",
3943 __func__, substream->name, substream->stream,
3944 cpu_dai->name, cpu_dai->id);
3945
3946 if (index < PRIM_MI2S || index >= MI2S_MAX) {
3947 ret = -EINVAL;
3948 dev_err(rtd->card->dev,
3949 "%s: CPU DAI id (%d) out of range\n",
3950 __func__, cpu_dai->id);
3951 goto err;
3952 }
3953 /*
3954 * Mutex protection in case the same MI2S
3955 * interface using for both TX and RX so
3956 * that the same clock won't be enable twice.
3957 */
3958 mutex_lock(&mi2s_intf_conf[index].lock);
3959 if (++mi2s_intf_conf[index].ref_cnt == 1) {
3960 /* Check if msm needs to provide the clock to the interface */
3961 if (!mi2s_intf_conf[index].msm_is_mi2s_master) {
3962 mi2s_clk[index].clk_id = mi2s_ebit_clk[index];
3963 fmt = SND_SOC_DAIFMT_CBM_CFM;
3964 }
3965 ret = msm_mi2s_set_sclk(substream, true);
3966 if (ret < 0) {
3967 dev_err(rtd->card->dev,
3968 "%s: afe lpass clock failed to enable MI2S clock, err:%d\n",
3969 __func__, ret);
3970 goto clean_up;
3971 }
3972
3973 ret = snd_soc_dai_set_fmt(cpu_dai, fmt);
3974 if (ret < 0) {
3975 pr_err("%s: set fmt cpu dai failed for MI2S (%d), err:%d\n",
3976 __func__, index, ret);
3977 goto clk_off;
3978 }
3979 if (pdata->mi2s_gpio_p[index]) {
3980 if (atomic_read(&(pdata->mi2s_gpio_ref_count[index]))
3981 == 0) {
3982 ret = msm_cdc_pinctrl_select_active_state(
3983 pdata->mi2s_gpio_p[index]);
3984 if (ret) {
3985 pr_err("%s: MI2S GPIO pinctrl set active failed with %d\n",
3986 __func__, ret);
3987 goto clk_off;
3988 }
3989 }
3990 atomic_inc(&(pdata->mi2s_gpio_ref_count[index]));
3991 }
3992 }
3993clk_off:
3994 if (ret < 0)
3995 msm_mi2s_set_sclk(substream, false);
3996clean_up:
3997 if (ret < 0)
3998 mi2s_intf_conf[index].ref_cnt--;
3999 mutex_unlock(&mi2s_intf_conf[index].lock);
4000err:
4001 return ret;
4002}
4003
4004static void msm_mi2s_snd_shutdown(struct snd_pcm_substream *substream)
4005{
4006 int ret = 0;
4007 struct snd_soc_pcm_runtime *rtd = substream->private_data;
4008 int index = rtd->cpu_dai->id;
4009 struct snd_soc_card *card = rtd->card;
4010 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
4011
4012 pr_debug("%s(): substream = %s stream = %d\n", __func__,
4013 substream->name, substream->stream);
4014 if (index < PRIM_MI2S || index >= MI2S_MAX) {
4015 pr_err("%s:invalid MI2S DAI(%d)\n", __func__, index);
4016 return;
4017 }
4018
4019 mutex_lock(&mi2s_intf_conf[index].lock);
4020 if (--mi2s_intf_conf[index].ref_cnt == 0) {
4021 if (pdata->mi2s_gpio_p[index]) {
4022 atomic_dec(&(pdata->mi2s_gpio_ref_count[index]));
4023 if (atomic_read(&(pdata->mi2s_gpio_ref_count[index]))
4024 == 0) {
4025 ret = msm_cdc_pinctrl_select_sleep_state(
4026 pdata->mi2s_gpio_p[index]);
4027 if (ret)
4028 pr_err("%s: MI2S GPIO pinctrl set sleep failed with %d\n",
4029 __func__, ret);
4030 }
4031 }
4032
4033 ret = msm_mi2s_set_sclk(substream, false);
4034 if (ret < 0)
4035 pr_err("%s:clock disable failed for MI2S (%d); ret=%d\n",
4036 __func__, index, ret);
4037 }
4038 mutex_unlock(&mi2s_intf_conf[index].lock);
4039}
4040
4041static int msm_wcn_hw_params(struct snd_pcm_substream *substream,
4042 struct snd_pcm_hw_params *params)
4043{
4044 struct snd_soc_pcm_runtime *rtd = substream->private_data;
4045 struct snd_soc_dai *codec_dai = rtd->codec_dai;
4046 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
4047 struct snd_soc_dai_link *dai_link = rtd->dai_link;
4048 u32 rx_ch[WCN_CDC_SLIM_RX_CH_MAX], tx_ch[WCN_CDC_SLIM_TX_CH_MAX];
4049 u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
4050 int ret = 0;
4051
4052 dev_dbg(rtd->dev, "%s: %s_tx_dai_id_%d\n", __func__,
4053 codec_dai->name, codec_dai->id);
4054 ret = snd_soc_dai_get_channel_map(codec_dai,
4055 &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
4056 if (ret) {
4057 dev_err(rtd->dev,
4058 "%s: failed to get BTFM codec chan map\n, err:%d\n",
4059 __func__, ret);
4060 goto err;
4061 }
4062
4063 dev_dbg(rtd->dev, "%s: tx_ch_cnt(%d) BE id %d\n",
4064 __func__, tx_ch_cnt, dai_link->id);
4065
4066 ret = snd_soc_dai_set_channel_map(cpu_dai,
4067 tx_ch_cnt, tx_ch, rx_ch_cnt, rx_ch);
4068 if (ret)
4069 dev_err(rtd->dev, "%s: failed to set cpu chan map, err:%d\n",
4070 __func__, ret);
4071
4072err:
4073 return ret;
4074}
4075
4076static struct snd_soc_ops bengal_aux_be_ops = {
4077 .startup = bengal_aux_snd_startup,
4078 .shutdown = bengal_aux_snd_shutdown
4079};
4080
4081static struct snd_soc_ops bengal_tdm_be_ops = {
4082 .hw_params = bengal_tdm_snd_hw_params,
4083 .startup = bengal_tdm_snd_startup,
4084 .shutdown = bengal_tdm_snd_shutdown
4085};
4086
4087static struct snd_soc_ops msm_mi2s_be_ops = {
4088 .startup = msm_mi2s_snd_startup,
4089 .shutdown = msm_mi2s_snd_shutdown,
4090};
4091
4092static struct snd_soc_ops msm_fe_qos_ops = {
4093 .prepare = msm_fe_qos_prepare,
4094};
4095
4096static struct snd_soc_ops msm_cdc_dma_be_ops = {
4097 .startup = msm_snd_cdc_dma_startup,
4098 .hw_params = msm_snd_cdc_dma_hw_params,
4099};
4100
4101static struct snd_soc_ops msm_wcn_ops = {
4102 .hw_params = msm_wcn_hw_params,
4103};
4104
4105static int msm_dmic_event(struct snd_soc_dapm_widget *w,
4106 struct snd_kcontrol *kcontrol, int event)
4107{
4108 struct msm_asoc_mach_data *pdata = NULL;
4109 struct snd_soc_component *component =
4110 snd_soc_dapm_to_component(w->dapm);
4111 int ret = 0;
4112 u32 dmic_idx;
4113 int *dmic_gpio_cnt;
4114 struct device_node *dmic_gpio;
4115 char *wname;
4116
4117 wname = strpbrk(w->name, "0123");
4118 if (!wname) {
4119 dev_err(component->dev, "%s: widget not found\n", __func__);
4120 return -EINVAL;
4121 }
4122
4123 ret = kstrtouint(wname, 10, &dmic_idx);
4124 if (ret < 0) {
4125 dev_err(component->dev, "%s: Invalid DMIC line on the codec\n",
4126 __func__);
4127 return -EINVAL;
4128 }
4129
4130 pdata = snd_soc_card_get_drvdata(component->card);
4131
4132 switch (dmic_idx) {
4133 case 0:
4134 case 1:
4135 dmic_gpio_cnt = &dmic_0_1_gpio_cnt;
4136 dmic_gpio = pdata->dmic01_gpio_p;
4137 break;
4138 case 2:
4139 case 3:
4140 dmic_gpio_cnt = &dmic_2_3_gpio_cnt;
4141 dmic_gpio = pdata->dmic23_gpio_p;
4142 break;
4143 default:
4144 dev_err(component->dev, "%s: Invalid DMIC Selection\n",
4145 __func__);
4146 return -EINVAL;
4147 }
4148
4149 dev_dbg(component->dev, "%s: event %d DMIC%d dmic_gpio_cnt %d\n",
4150 __func__, event, dmic_idx, *dmic_gpio_cnt);
4151
4152 switch (event) {
4153 case SND_SOC_DAPM_PRE_PMU:
4154 (*dmic_gpio_cnt)++;
4155 if (*dmic_gpio_cnt == 1) {
4156 ret = msm_cdc_pinctrl_select_active_state(
4157 dmic_gpio);
4158 if (ret < 0) {
4159 pr_err("%s: gpio set cannot be activated %sd",
4160 __func__, "dmic_gpio");
4161 return ret;
4162 }
4163 }
4164
4165 break;
4166 case SND_SOC_DAPM_POST_PMD:
4167 (*dmic_gpio_cnt)--;
4168 if (*dmic_gpio_cnt == 0) {
4169 ret = msm_cdc_pinctrl_select_sleep_state(
4170 dmic_gpio);
4171 if (ret < 0) {
4172 pr_err("%s: gpio set cannot be de-activated %sd",
4173 __func__, "dmic_gpio");
4174 return ret;
4175 }
4176 }
4177 break;
4178 default:
4179 pr_err("%s: invalid DAPM event %d\n", __func__, event);
4180 return -EINVAL;
4181 }
4182 return 0;
4183}
4184
4185static const struct snd_soc_dapm_widget msm_int_dapm_widgets[] = {
4186 SND_SOC_DAPM_MIC("Analog Mic1", NULL),
4187 SND_SOC_DAPM_MIC("Analog Mic2", NULL),
4188 SND_SOC_DAPM_MIC("Analog Mic3", NULL),
4189 SND_SOC_DAPM_MIC("Analog Mic4", NULL),
4190 SND_SOC_DAPM_MIC("Digital Mic0", msm_dmic_event),
4191 SND_SOC_DAPM_MIC("Digital Mic1", msm_dmic_event),
4192 SND_SOC_DAPM_MIC("Digital Mic2", msm_dmic_event),
4193 SND_SOC_DAPM_MIC("Digital Mic3", msm_dmic_event),
4194};
4195
4196static int msm_wcn_init(struct snd_soc_pcm_runtime *rtd)
4197{
4198 unsigned int rx_ch[WCN_CDC_SLIM_RX_CH_MAX] = {157, 158};
4199 unsigned int tx_ch[WCN_CDC_SLIM_TX_CH_MAX] = {159, 160, 161};
4200 struct snd_soc_dai *codec_dai = rtd->codec_dai;
4201
4202 return snd_soc_dai_set_channel_map(codec_dai, ARRAY_SIZE(tx_ch),
4203 tx_ch, ARRAY_SIZE(rx_ch), rx_ch);
4204}
4205
4206static int msm_int_audrx_init(struct snd_soc_pcm_runtime *rtd)
4207{
4208 int ret = -EINVAL;
4209 struct snd_soc_component *component;
4210 struct snd_soc_dapm_context *dapm;
4211 struct snd_card *card;
4212 struct snd_info_entry *entry;
4213 struct msm_asoc_mach_data *pdata =
4214 snd_soc_card_get_drvdata(rtd->card);
4215
4216 component = snd_soc_rtdcom_lookup(rtd, "bolero_codec");
4217 if (!component) {
4218 pr_err("%s: could not find component for bolero_codec\n",
4219 __func__);
4220 return ret;
4221 }
4222
4223 dapm = snd_soc_component_get_dapm(component);
4224
4225 ret = snd_soc_add_component_controls(component, msm_int_snd_controls,
4226 ARRAY_SIZE(msm_int_snd_controls));
4227 if (ret < 0) {
4228 pr_err("%s: add_component_controls failed: %d\n",
4229 __func__, ret);
4230 return ret;
4231 }
4232 ret = snd_soc_add_component_controls(component, msm_common_snd_controls,
4233 ARRAY_SIZE(msm_common_snd_controls));
4234 if (ret < 0) {
4235 pr_err("%s: add common snd controls failed: %d\n",
4236 __func__, ret);
4237 return ret;
4238 }
4239
4240 snd_soc_dapm_new_controls(dapm, msm_int_dapm_widgets,
4241 ARRAY_SIZE(msm_int_dapm_widgets));
4242
4243 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic0");
4244 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic1");
4245 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic2");
4246 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic3");
4247
4248 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic1");
4249 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic2");
4250 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic3");
4251 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic4");
4252
4253 snd_soc_dapm_sync(dapm);
4254
4255 bolero_set_port_map(component, ARRAY_SIZE(sm_port_map),
4256 sm_port_map);
4257 card = rtd->card->snd_card;
4258 if (!pdata->codec_root) {
4259 entry = snd_info_create_subdir(card->module, "codecs",
4260 card->proc_root);
4261 if (!entry) {
4262 pr_debug("%s: Cannot create codecs module entry\n",
4263 __func__);
4264 ret = 0;
4265 goto err;
4266 }
4267 pdata->codec_root = entry;
4268 }
4269 bolero_info_create_codec_entry(pdata->codec_root, component);
4270 bolero_register_wake_irq(component, false);
4271 codec_reg_done = true;
4272 return 0;
4273err:
4274 return ret;
4275}
4276
4277static void *def_wcd_mbhc_cal(void)
4278{
4279 void *wcd_mbhc_cal;
4280 struct wcd_mbhc_btn_detect_cfg *btn_cfg;
4281 u16 *btn_high;
4282
4283 wcd_mbhc_cal = kzalloc(WCD_MBHC_CAL_SIZE(WCD_MBHC_DEF_BUTTONS,
4284 WCD9XXX_MBHC_DEF_RLOADS), GFP_KERNEL);
4285 if (!wcd_mbhc_cal)
4286 return NULL;
4287
4288 WCD_MBHC_CAL_PLUG_TYPE_PTR(wcd_mbhc_cal)->v_hs_max = WCD_MBHC_HS_V_MAX;
4289 WCD_MBHC_CAL_BTN_DET_PTR(wcd_mbhc_cal)->num_btn = WCD_MBHC_DEF_BUTTONS;
4290 btn_cfg = WCD_MBHC_CAL_BTN_DET_PTR(wcd_mbhc_cal);
4291 btn_high = ((void *)&btn_cfg->_v_btn_low) +
4292 (sizeof(btn_cfg->_v_btn_low[0]) * btn_cfg->num_btn);
4293
4294 btn_high[0] = 75;
4295 btn_high[1] = 150;
4296 btn_high[2] = 237;
4297 btn_high[3] = 500;
4298 btn_high[4] = 500;
4299 btn_high[5] = 500;
4300 btn_high[6] = 500;
4301 btn_high[7] = 500;
4302
4303 return wcd_mbhc_cal;
4304}
4305
4306/* Digital audio interface glue - connects codec <---> CPU */
4307static struct snd_soc_dai_link msm_common_dai_links[] = {
4308 /* FrontEnd DAI Links */
4309 {/* hw:x,0 */
4310 .name = MSM_DAILINK_NAME(Media1),
4311 .stream_name = "MultiMedia1",
4312 .cpu_dai_name = "MultiMedia1",
4313 .platform_name = "msm-pcm-dsp.0",
4314 .dynamic = 1,
4315 .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
4316 .dpcm_playback = 1,
4317 .dpcm_capture = 1,
4318 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
4319 SND_SOC_DPCM_TRIGGER_POST},
4320 .codec_dai_name = "snd-soc-dummy-dai",
4321 .codec_name = "snd-soc-dummy",
4322 .ignore_suspend = 1,
4323 /* this dainlink has playback support */
4324 .ignore_pmdown_time = 1,
4325 .id = MSM_FRONTEND_DAI_MULTIMEDIA1
4326 },
4327 {/* hw:x,1 */
4328 .name = MSM_DAILINK_NAME(Media2),
4329 .stream_name = "MultiMedia2",
4330 .cpu_dai_name = "MultiMedia2",
4331 .platform_name = "msm-pcm-dsp.0",
4332 .dynamic = 1,
4333 .dpcm_playback = 1,
4334 .dpcm_capture = 1,
4335 .codec_dai_name = "snd-soc-dummy-dai",
4336 .codec_name = "snd-soc-dummy",
4337 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
4338 SND_SOC_DPCM_TRIGGER_POST},
4339 .ignore_suspend = 1,
4340 /* this dainlink has playback support */
4341 .ignore_pmdown_time = 1,
4342 .id = MSM_FRONTEND_DAI_MULTIMEDIA2,
4343 },
4344 {/* hw:x,2 */
4345 .name = "VoiceMMode1",
4346 .stream_name = "VoiceMMode1",
4347 .cpu_dai_name = "VoiceMMode1",
4348 .platform_name = "msm-pcm-voice",
4349 .dynamic = 1,
4350 .dpcm_playback = 1,
4351 .dpcm_capture = 1,
4352 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
4353 SND_SOC_DPCM_TRIGGER_POST},
4354 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
4355 .ignore_suspend = 1,
4356 .ignore_pmdown_time = 1,
4357 .codec_dai_name = "snd-soc-dummy-dai",
4358 .codec_name = "snd-soc-dummy",
4359 .id = MSM_FRONTEND_DAI_VOICEMMODE1,
4360 },
4361 {/* hw:x,3 */
4362 .name = "MSM VoIP",
4363 .stream_name = "VoIP",
4364 .cpu_dai_name = "VoIP",
4365 .platform_name = "msm-voip-dsp",
4366 .dynamic = 1,
4367 .dpcm_playback = 1,
4368 .dpcm_capture = 1,
4369 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
4370 SND_SOC_DPCM_TRIGGER_POST},
4371 .codec_dai_name = "snd-soc-dummy-dai",
4372 .codec_name = "snd-soc-dummy",
4373 .ignore_suspend = 1,
4374 /* this dainlink has playback support */
4375 .ignore_pmdown_time = 1,
4376 .id = MSM_FRONTEND_DAI_VOIP,
4377 },
4378 {/* hw:x,4 */
4379 .name = MSM_DAILINK_NAME(ULL),
4380 .stream_name = "MultiMedia3",
4381 .cpu_dai_name = "MultiMedia3",
4382 .platform_name = "msm-pcm-dsp.2",
4383 .dynamic = 1,
4384 .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
4385 .dpcm_playback = 1,
4386 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
4387 SND_SOC_DPCM_TRIGGER_POST},
4388 .codec_dai_name = "snd-soc-dummy-dai",
4389 .codec_name = "snd-soc-dummy",
4390 .ignore_suspend = 1,
4391 /* this dainlink has playback support */
4392 .ignore_pmdown_time = 1,
4393 .id = MSM_FRONTEND_DAI_MULTIMEDIA3,
4394 },
4395 {/* hw:x,5 */
4396 .name = "MSM AFE-PCM RX",
4397 .stream_name = "AFE-PROXY RX",
4398 .cpu_dai_name = "msm-dai-q6-dev.241",
4399 .codec_name = "msm-stub-codec.1",
4400 .codec_dai_name = "msm-stub-rx",
4401 .platform_name = "msm-pcm-afe",
4402 .dpcm_playback = 1,
4403 .ignore_suspend = 1,
4404 /* this dainlink has playback support */
4405 .ignore_pmdown_time = 1,
4406 },
4407 {/* hw:x,6 */
4408 .name = "MSM AFE-PCM TX",
4409 .stream_name = "AFE-PROXY TX",
4410 .cpu_dai_name = "msm-dai-q6-dev.240",
4411 .codec_name = "msm-stub-codec.1",
4412 .codec_dai_name = "msm-stub-tx",
4413 .platform_name = "msm-pcm-afe",
4414 .dpcm_capture = 1,
4415 .ignore_suspend = 1,
4416 },
4417 {/* hw:x,7 */
4418 .name = MSM_DAILINK_NAME(Compress1),
4419 .stream_name = "Compress1",
4420 .cpu_dai_name = "MultiMedia4",
4421 .platform_name = "msm-compress-dsp",
4422 .dynamic = 1,
4423 .async_ops = ASYNC_DPCM_SND_SOC_HW_PARAMS,
4424 .dpcm_playback = 1,
4425 .dpcm_capture = 1,
4426 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
4427 SND_SOC_DPCM_TRIGGER_POST},
4428 .codec_dai_name = "snd-soc-dummy-dai",
4429 .codec_name = "snd-soc-dummy",
4430 .ignore_suspend = 1,
4431 .ignore_pmdown_time = 1,
4432 /* this dainlink has playback support */
4433 .id = MSM_FRONTEND_DAI_MULTIMEDIA4,
4434 },
4435 /* Hostless PCM purpose */
4436 {/* hw:x,8 */
4437 .name = "AUXPCM Hostless",
4438 .stream_name = "AUXPCM Hostless",
4439 .cpu_dai_name = "AUXPCM_HOSTLESS",
4440 .platform_name = "msm-pcm-hostless",
4441 .dynamic = 1,
4442 .dpcm_playback = 1,
4443 .dpcm_capture = 1,
4444 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
4445 SND_SOC_DPCM_TRIGGER_POST},
4446 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
4447 .ignore_suspend = 1,
4448 /* this dainlink has playback support */
4449 .ignore_pmdown_time = 1,
4450 .codec_dai_name = "snd-soc-dummy-dai",
4451 .codec_name = "snd-soc-dummy",
4452 },
4453 {/* hw:x,9 */
4454 .name = MSM_DAILINK_NAME(LowLatency),
4455 .stream_name = "MultiMedia5",
4456 .cpu_dai_name = "MultiMedia5",
4457 .platform_name = "msm-pcm-dsp.1",
4458 .dynamic = 1,
4459 .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
4460 .dpcm_playback = 1,
4461 .dpcm_capture = 1,
4462 .codec_dai_name = "snd-soc-dummy-dai",
4463 .codec_name = "snd-soc-dummy",
4464 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
4465 SND_SOC_DPCM_TRIGGER_POST},
4466 .ignore_suspend = 1,
4467 /* this dainlink has playback support */
4468 .ignore_pmdown_time = 1,
4469 .id = MSM_FRONTEND_DAI_MULTIMEDIA5,
4470 .ops = &msm_fe_qos_ops,
4471 },
4472 {/* hw:x,10 */
4473 .name = "Listen 1 Audio Service",
4474 .stream_name = "Listen 1 Audio Service",
4475 .cpu_dai_name = "LSM1",
4476 .platform_name = "msm-lsm-client",
4477 .dynamic = 1,
4478 .dpcm_capture = 1,
4479 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
4480 SND_SOC_DPCM_TRIGGER_POST },
4481 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
4482 .ignore_suspend = 1,
4483 .codec_dai_name = "snd-soc-dummy-dai",
4484 .codec_name = "snd-soc-dummy",
4485 .id = MSM_FRONTEND_DAI_LSM1,
4486 },
4487 /* Multiple Tunnel instances */
4488 {/* hw:x,11 */
4489 .name = MSM_DAILINK_NAME(Compress2),
4490 .stream_name = "Compress2",
4491 .cpu_dai_name = "MultiMedia7",
4492 .platform_name = "msm-compress-dsp",
4493 .dynamic = 1,
4494 .dpcm_playback = 1,
4495 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
4496 SND_SOC_DPCM_TRIGGER_POST},
4497 .codec_dai_name = "snd-soc-dummy-dai",
4498 .codec_name = "snd-soc-dummy",
4499 .ignore_suspend = 1,
4500 .ignore_pmdown_time = 1,
4501 /* this dainlink has playback support */
4502 .id = MSM_FRONTEND_DAI_MULTIMEDIA7,
4503 },
4504 {/* hw:x,12 */
4505 .name = MSM_DAILINK_NAME(MultiMedia10),
4506 .stream_name = "MultiMedia10",
4507 .cpu_dai_name = "MultiMedia10",
4508 .platform_name = "msm-pcm-dsp.1",
4509 .dynamic = 1,
4510 .dpcm_playback = 1,
4511 .dpcm_capture = 1,
4512 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
4513 SND_SOC_DPCM_TRIGGER_POST},
4514 .codec_dai_name = "snd-soc-dummy-dai",
4515 .codec_name = "snd-soc-dummy",
4516 .ignore_suspend = 1,
4517 .ignore_pmdown_time = 1,
4518 /* this dainlink has playback support */
4519 .id = MSM_FRONTEND_DAI_MULTIMEDIA10,
4520 },
4521 {/* hw:x,13 */
4522 .name = MSM_DAILINK_NAME(ULL_NOIRQ),
4523 .stream_name = "MM_NOIRQ",
4524 .cpu_dai_name = "MultiMedia8",
4525 .platform_name = "msm-pcm-dsp-noirq",
4526 .dynamic = 1,
4527 .dpcm_playback = 1,
4528 .dpcm_capture = 1,
4529 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
4530 SND_SOC_DPCM_TRIGGER_POST},
4531 .codec_dai_name = "snd-soc-dummy-dai",
4532 .codec_name = "snd-soc-dummy",
4533 .ignore_suspend = 1,
4534 .ignore_pmdown_time = 1,
4535 /* this dainlink has playback support */
4536 .id = MSM_FRONTEND_DAI_MULTIMEDIA8,
4537 .ops = &msm_fe_qos_ops,
4538 },
4539 /* HDMI Hostless */
4540 {/* hw:x,14 */
4541 .name = "HDMI_RX_HOSTLESS",
4542 .stream_name = "HDMI_RX_HOSTLESS",
4543 .cpu_dai_name = "HDMI_HOSTLESS",
4544 .platform_name = "msm-pcm-hostless",
4545 .dynamic = 1,
4546 .dpcm_playback = 1,
4547 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
4548 SND_SOC_DPCM_TRIGGER_POST},
4549 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
4550 .ignore_suspend = 1,
4551 .ignore_pmdown_time = 1,
4552 .codec_dai_name = "snd-soc-dummy-dai",
4553 .codec_name = "snd-soc-dummy",
4554 },
4555 {/* hw:x,15 */
4556 .name = "VoiceMMode2",
4557 .stream_name = "VoiceMMode2",
4558 .cpu_dai_name = "VoiceMMode2",
4559 .platform_name = "msm-pcm-voice",
4560 .dynamic = 1,
4561 .dpcm_playback = 1,
4562 .dpcm_capture = 1,
4563 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
4564 SND_SOC_DPCM_TRIGGER_POST},
4565 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
4566 .ignore_suspend = 1,
4567 .ignore_pmdown_time = 1,
4568 .codec_dai_name = "snd-soc-dummy-dai",
4569 .codec_name = "snd-soc-dummy",
4570 .id = MSM_FRONTEND_DAI_VOICEMMODE2,
4571 },
4572 /* LSM FE */
4573 {/* hw:x,16 */
4574 .name = "Listen 2 Audio Service",
4575 .stream_name = "Listen 2 Audio Service",
4576 .cpu_dai_name = "LSM2",
4577 .platform_name = "msm-lsm-client",
4578 .dynamic = 1,
4579 .dpcm_capture = 1,
4580 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
4581 SND_SOC_DPCM_TRIGGER_POST },
4582 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
4583 .ignore_suspend = 1,
4584 .codec_dai_name = "snd-soc-dummy-dai",
4585 .codec_name = "snd-soc-dummy",
4586 .id = MSM_FRONTEND_DAI_LSM2,
4587 },
4588 {/* hw:x,17 */
4589 .name = "Listen 3 Audio Service",
4590 .stream_name = "Listen 3 Audio Service",
4591 .cpu_dai_name = "LSM3",
4592 .platform_name = "msm-lsm-client",
4593 .dynamic = 1,
4594 .dpcm_capture = 1,
4595 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
4596 SND_SOC_DPCM_TRIGGER_POST },
4597 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
4598 .ignore_suspend = 1,
4599 .codec_dai_name = "snd-soc-dummy-dai",
4600 .codec_name = "snd-soc-dummy",
4601 .id = MSM_FRONTEND_DAI_LSM3,
4602 },
4603 {/* hw:x,18 */
4604 .name = "Listen 4 Audio Service",
4605 .stream_name = "Listen 4 Audio Service",
4606 .cpu_dai_name = "LSM4",
4607 .platform_name = "msm-lsm-client",
4608 .dynamic = 1,
4609 .dpcm_capture = 1,
4610 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
4611 SND_SOC_DPCM_TRIGGER_POST },
4612 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
4613 .ignore_suspend = 1,
4614 .codec_dai_name = "snd-soc-dummy-dai",
4615 .codec_name = "snd-soc-dummy",
4616 .id = MSM_FRONTEND_DAI_LSM4,
4617 },
4618 {/* hw:x,19 */
4619 .name = "Listen 5 Audio Service",
4620 .stream_name = "Listen 5 Audio Service",
4621 .cpu_dai_name = "LSM5",
4622 .platform_name = "msm-lsm-client",
4623 .dynamic = 1,
4624 .dpcm_capture = 1,
4625 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
4626 SND_SOC_DPCM_TRIGGER_POST },
4627 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
4628 .ignore_suspend = 1,
4629 .codec_dai_name = "snd-soc-dummy-dai",
4630 .codec_name = "snd-soc-dummy",
4631 .id = MSM_FRONTEND_DAI_LSM5,
4632 },
4633 {/* hw:x,20 */
4634 .name = "Listen 6 Audio Service",
4635 .stream_name = "Listen 6 Audio Service",
4636 .cpu_dai_name = "LSM6",
4637 .platform_name = "msm-lsm-client",
4638 .dynamic = 1,
4639 .dpcm_capture = 1,
4640 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
4641 SND_SOC_DPCM_TRIGGER_POST },
4642 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
4643 .ignore_suspend = 1,
4644 .codec_dai_name = "snd-soc-dummy-dai",
4645 .codec_name = "snd-soc-dummy",
4646 .id = MSM_FRONTEND_DAI_LSM6,
4647 },
4648 {/* hw:x,21 */
4649 .name = "Listen 7 Audio Service",
4650 .stream_name = "Listen 7 Audio Service",
4651 .cpu_dai_name = "LSM7",
4652 .platform_name = "msm-lsm-client",
4653 .dynamic = 1,
4654 .dpcm_capture = 1,
4655 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
4656 SND_SOC_DPCM_TRIGGER_POST },
4657 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
4658 .ignore_suspend = 1,
4659 .codec_dai_name = "snd-soc-dummy-dai",
4660 .codec_name = "snd-soc-dummy",
4661 .id = MSM_FRONTEND_DAI_LSM7,
4662 },
4663 {/* hw:x,22 */
4664 .name = "Listen 8 Audio Service",
4665 .stream_name = "Listen 8 Audio Service",
4666 .cpu_dai_name = "LSM8",
4667 .platform_name = "msm-lsm-client",
4668 .dynamic = 1,
4669 .dpcm_capture = 1,
4670 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
4671 SND_SOC_DPCM_TRIGGER_POST },
4672 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
4673 .ignore_suspend = 1,
4674 .codec_dai_name = "snd-soc-dummy-dai",
4675 .codec_name = "snd-soc-dummy",
4676 .id = MSM_FRONTEND_DAI_LSM8,
4677 },
4678 {/* hw:x,23 */
4679 .name = MSM_DAILINK_NAME(Media9),
4680 .stream_name = "MultiMedia9",
4681 .cpu_dai_name = "MultiMedia9",
4682 .platform_name = "msm-pcm-dsp.0",
4683 .dynamic = 1,
4684 .dpcm_playback = 1,
4685 .dpcm_capture = 1,
4686 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
4687 SND_SOC_DPCM_TRIGGER_POST},
4688 .codec_dai_name = "snd-soc-dummy-dai",
4689 .codec_name = "snd-soc-dummy",
4690 .ignore_suspend = 1,
4691 /* this dainlink has playback support */
4692 .ignore_pmdown_time = 1,
4693 .id = MSM_FRONTEND_DAI_MULTIMEDIA9,
4694 },
4695 {/* hw:x,24 */
4696 .name = MSM_DAILINK_NAME(Compress4),
4697 .stream_name = "Compress4",
4698 .cpu_dai_name = "MultiMedia11",
4699 .platform_name = "msm-compress-dsp",
4700 .dynamic = 1,
4701 .dpcm_playback = 1,
4702 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
4703 SND_SOC_DPCM_TRIGGER_POST},
4704 .codec_dai_name = "snd-soc-dummy-dai",
4705 .codec_name = "snd-soc-dummy",
4706 .ignore_suspend = 1,
4707 .ignore_pmdown_time = 1,
4708 /* this dainlink has playback support */
4709 .id = MSM_FRONTEND_DAI_MULTIMEDIA11,
4710 },
4711 {/* hw:x,25 */
4712 .name = MSM_DAILINK_NAME(Compress5),
4713 .stream_name = "Compress5",
4714 .cpu_dai_name = "MultiMedia12",
4715 .platform_name = "msm-compress-dsp",
4716 .dynamic = 1,
4717 .dpcm_playback = 1,
4718 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
4719 SND_SOC_DPCM_TRIGGER_POST},
4720 .codec_dai_name = "snd-soc-dummy-dai",
4721 .codec_name = "snd-soc-dummy",
4722 .ignore_suspend = 1,
4723 .ignore_pmdown_time = 1,
4724 /* this dainlink has playback support */
4725 .id = MSM_FRONTEND_DAI_MULTIMEDIA12,
4726 },
4727 {/* hw:x,26 */
4728 .name = MSM_DAILINK_NAME(Compress6),
4729 .stream_name = "Compress6",
4730 .cpu_dai_name = "MultiMedia13",
4731 .platform_name = "msm-compress-dsp",
4732 .dynamic = 1,
4733 .dpcm_playback = 1,
4734 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
4735 SND_SOC_DPCM_TRIGGER_POST},
4736 .codec_dai_name = "snd-soc-dummy-dai",
4737 .codec_name = "snd-soc-dummy",
4738 .ignore_suspend = 1,
4739 .ignore_pmdown_time = 1,
4740 /* this dainlink has playback support */
4741 .id = MSM_FRONTEND_DAI_MULTIMEDIA13,
4742 },
4743 {/* hw:x,27 */
4744 .name = MSM_DAILINK_NAME(Compress7),
4745 .stream_name = "Compress7",
4746 .cpu_dai_name = "MultiMedia14",
4747 .platform_name = "msm-compress-dsp",
4748 .dynamic = 1,
4749 .dpcm_playback = 1,
4750 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
4751 SND_SOC_DPCM_TRIGGER_POST},
4752 .codec_dai_name = "snd-soc-dummy-dai",
4753 .codec_name = "snd-soc-dummy",
4754 .ignore_suspend = 1,
4755 .ignore_pmdown_time = 1,
4756 /* this dainlink has playback support */
4757 .id = MSM_FRONTEND_DAI_MULTIMEDIA14,
4758 },
4759 {/* hw:x,28 */
4760 .name = MSM_DAILINK_NAME(Compress8),
4761 .stream_name = "Compress8",
4762 .cpu_dai_name = "MultiMedia15",
4763 .platform_name = "msm-compress-dsp",
4764 .dynamic = 1,
4765 .dpcm_playback = 1,
4766 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
4767 SND_SOC_DPCM_TRIGGER_POST},
4768 .codec_dai_name = "snd-soc-dummy-dai",
4769 .codec_name = "snd-soc-dummy",
4770 .ignore_suspend = 1,
4771 .ignore_pmdown_time = 1,
4772 /* this dainlink has playback support */
4773 .id = MSM_FRONTEND_DAI_MULTIMEDIA15,
4774 },
4775 {/* hw:x,29 */
4776 .name = MSM_DAILINK_NAME(ULL_NOIRQ_2),
4777 .stream_name = "MM_NOIRQ_2",
4778 .cpu_dai_name = "MultiMedia16",
4779 .platform_name = "msm-pcm-dsp-noirq",
4780 .dynamic = 1,
4781 .dpcm_playback = 1,
4782 .dpcm_capture = 1,
4783 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
4784 SND_SOC_DPCM_TRIGGER_POST},
4785 .codec_dai_name = "snd-soc-dummy-dai",
4786 .codec_name = "snd-soc-dummy",
4787 .ignore_suspend = 1,
4788 .ignore_pmdown_time = 1,
4789 /* this dainlink has playback support */
4790 .id = MSM_FRONTEND_DAI_MULTIMEDIA16,
4791 .ops = &msm_fe_qos_ops,
4792 },
4793 {/* hw:x,30 */
4794 .name = "CDC_DMA Hostless",
4795 .stream_name = "CDC_DMA Hostless",
4796 .cpu_dai_name = "CDC_DMA_HOSTLESS",
4797 .platform_name = "msm-pcm-hostless",
4798 .dynamic = 1,
4799 .dpcm_playback = 1,
4800 .dpcm_capture = 1,
4801 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
4802 SND_SOC_DPCM_TRIGGER_POST},
4803 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
4804 .ignore_suspend = 1,
4805 /* this dailink has playback support */
4806 .ignore_pmdown_time = 1,
4807 .codec_dai_name = "snd-soc-dummy-dai",
4808 .codec_name = "snd-soc-dummy",
4809 },
4810 {/* hw:x,31 */
4811 .name = "TX3_CDC_DMA Hostless",
4812 .stream_name = "TX3_CDC_DMA Hostless",
4813 .cpu_dai_name = "TX3_CDC_DMA_HOSTLESS",
4814 .platform_name = "msm-pcm-hostless",
4815 .dynamic = 1,
4816 .dpcm_capture = 1,
4817 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
4818 SND_SOC_DPCM_TRIGGER_POST},
4819 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
4820 .ignore_suspend = 1,
4821 .codec_dai_name = "snd-soc-dummy-dai",
4822 .codec_name = "snd-soc-dummy",
4823 },
4824 {/* hw:x,32 */
4825 .name = "Tertiary MI2S TX_Hostless",
4826 .stream_name = "Tertiary MI2S_TX Hostless Capture",
4827 .cpu_dai_name = "TERT_MI2S_TX_HOSTLESS",
4828 .platform_name = "msm-pcm-hostless",
4829 .dynamic = 1,
4830 .dpcm_capture = 1,
4831 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
4832 SND_SOC_DPCM_TRIGGER_POST},
4833 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
4834 .ignore_suspend = 1,
4835 .ignore_pmdown_time = 1,
4836 .codec_dai_name = "snd-soc-dummy-dai",
4837 .codec_name = "snd-soc-dummy",
4838 },
4839};
4840
4841static struct snd_soc_dai_link msm_common_misc_fe_dai_links[] = {
Laxminath Kasamc6974d02019-11-22 15:18:47 +0530[diff] [blame]4842 {/* hw:x,33 */
Laxminath Kasamae52c992019-08-26 15:01:15 +0530[diff] [blame]4843 .name = MSM_DAILINK_NAME(ASM Loopback),
4844 .stream_name = "MultiMedia6",
4845 .cpu_dai_name = "MultiMedia6",
4846 .platform_name = "msm-pcm-loopback",
4847 .dynamic = 1,
4848 .dpcm_playback = 1,
4849 .dpcm_capture = 1,
4850 .codec_dai_name = "snd-soc-dummy-dai",
4851 .codec_name = "snd-soc-dummy",
4852 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
4853 SND_SOC_DPCM_TRIGGER_POST},
4854 .ignore_suspend = 1,
4855 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
4856 .ignore_pmdown_time = 1,
4857 .id = MSM_FRONTEND_DAI_MULTIMEDIA6,
4858 },
Laxminath Kasamc6974d02019-11-22 15:18:47 +0530[diff] [blame]4859 {/* hw:x,34 */
Laxminath Kasamae52c992019-08-26 15:01:15 +0530[diff] [blame]4860 .name = "USB Audio Hostless",
4861 .stream_name = "USB Audio Hostless",
4862 .cpu_dai_name = "USBAUDIO_HOSTLESS",
4863 .platform_name = "msm-pcm-hostless",
4864 .dynamic = 1,
4865 .dpcm_playback = 1,
4866 .dpcm_capture = 1,
4867 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
4868 SND_SOC_DPCM_TRIGGER_POST},
4869 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
4870 .ignore_suspend = 1,
4871 .ignore_pmdown_time = 1,
4872 .codec_dai_name = "snd-soc-dummy-dai",
4873 .codec_name = "snd-soc-dummy",
4874 },
Laxminath Kasamc6974d02019-11-22 15:18:47 +0530[diff] [blame]4875 {/* hw:x,35 */
Laxminath Kasamae52c992019-08-26 15:01:15 +0530[diff] [blame]4876 .name = "SLIMBUS_7 Hostless",
4877 .stream_name = "SLIMBUS_7 Hostless",
4878 .cpu_dai_name = "SLIMBUS7_HOSTLESS",
4879 .platform_name = "msm-pcm-hostless",
4880 .dynamic = 1,
4881 .dpcm_capture = 1,
4882 .dpcm_playback = 1,
4883 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
4884 SND_SOC_DPCM_TRIGGER_POST},
4885 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
4886 .ignore_suspend = 1,
4887 .ignore_pmdown_time = 1,
4888 .codec_dai_name = "snd-soc-dummy-dai",
4889 .codec_name = "snd-soc-dummy",
4890 },
Laxminath Kasamc6974d02019-11-22 15:18:47 +0530[diff] [blame]4891 {/* hw:x,36 */
Laxminath Kasamae52c992019-08-26 15:01:15 +0530[diff] [blame]4892 .name = "Compress Capture",
4893 .stream_name = "Compress9",
4894 .cpu_dai_name = "MultiMedia17",
4895 .platform_name = "msm-compress-dsp",
4896 .dynamic = 1,
4897 .dpcm_capture = 1,
4898 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
4899 SND_SOC_DPCM_TRIGGER_POST},
4900 .codec_dai_name = "snd-soc-dummy-dai",
4901 .codec_name = "snd-soc-dummy",
4902 .ignore_suspend = 1,
4903 .ignore_pmdown_time = 1,
4904 .id = MSM_FRONTEND_DAI_MULTIMEDIA17,
4905 },
Laxminath Kasamc6974d02019-11-22 15:18:47 +0530[diff] [blame]4906 {/* hw:x,37 */
Laxminath Kasamae52c992019-08-26 15:01:15 +0530[diff] [blame]4907 .name = "SLIMBUS_8 Hostless",
4908 .stream_name = "SLIMBUS_8 Hostless",
4909 .cpu_dai_name = "SLIMBUS8_HOSTLESS",
4910 .platform_name = "msm-pcm-hostless",
4911 .dynamic = 1,
4912 .dpcm_capture = 1,
4913 .dpcm_playback = 1,
4914 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
4915 SND_SOC_DPCM_TRIGGER_POST},
4916 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
4917 .ignore_suspend = 1,
4918 .ignore_pmdown_time = 1,
4919 .codec_dai_name = "snd-soc-dummy-dai",
4920 .codec_name = "snd-soc-dummy",
4921 },
Laxminath Kasamc6974d02019-11-22 15:18:47 +0530[diff] [blame]4922 {/* hw:x,38 */
Laxminath Kasamae52c992019-08-26 15:01:15 +0530[diff] [blame]4923 .name = LPASS_BE_TX_CDC_DMA_TX_5,
4924 .stream_name = "TX CDC DMA5 Capture",
4925 .cpu_dai_name = "msm-dai-cdc-dma-dev.45115",
4926 .platform_name = "msm-pcm-hostless",
4927 .codec_name = "bolero_codec",
4928 .codec_dai_name = "tx_macro_tx3",
4929 .id = MSM_BACKEND_DAI_TX_CDC_DMA_TX_5,
4930 .be_hw_params_fixup = msm_be_hw_params_fixup,
4931 .ignore_suspend = 1,
4932 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
4933 .ops = &msm_cdc_dma_be_ops,
4934 },
4935};
4936
4937static struct snd_soc_dai_link msm_common_be_dai_links[] = {
4938 /* Backend AFE DAI Links */
4939 {
4940 .name = LPASS_BE_AFE_PCM_RX,
4941 .stream_name = "AFE Playback",
4942 .cpu_dai_name = "msm-dai-q6-dev.224",
4943 .platform_name = "msm-pcm-routing",
4944 .codec_name = "msm-stub-codec.1",
4945 .codec_dai_name = "msm-stub-rx",
4946 .no_pcm = 1,
4947 .dpcm_playback = 1,
4948 .id = MSM_BACKEND_DAI_AFE_PCM_RX,
4949 .be_hw_params_fixup = msm_be_hw_params_fixup,
4950 /* this dainlink has playback support */
4951 .ignore_pmdown_time = 1,
4952 .ignore_suspend = 1,
4953 },
4954 {
4955 .name = LPASS_BE_AFE_PCM_TX,
4956 .stream_name = "AFE Capture",
4957 .cpu_dai_name = "msm-dai-q6-dev.225",
4958 .platform_name = "msm-pcm-routing",
4959 .codec_name = "msm-stub-codec.1",
4960 .codec_dai_name = "msm-stub-tx",
4961 .no_pcm = 1,
4962 .dpcm_capture = 1,
4963 .id = MSM_BACKEND_DAI_AFE_PCM_TX,
4964 .be_hw_params_fixup = msm_be_hw_params_fixup,
4965 .ignore_suspend = 1,
4966 },
4967 /* Incall Record Uplink BACK END DAI Link */
4968 {
4969 .name = LPASS_BE_INCALL_RECORD_TX,
4970 .stream_name = "Voice Uplink Capture",
4971 .cpu_dai_name = "msm-dai-q6-dev.32772",
4972 .platform_name = "msm-pcm-routing",
4973 .codec_name = "msm-stub-codec.1",
4974 .codec_dai_name = "msm-stub-tx",
4975 .no_pcm = 1,
4976 .dpcm_capture = 1,
4977 .id = MSM_BACKEND_DAI_INCALL_RECORD_TX,
4978 .be_hw_params_fixup = msm_be_hw_params_fixup,
4979 .ignore_suspend = 1,
4980 },
4981 /* Incall Record Downlink BACK END DAI Link */
4982 {
4983 .name = LPASS_BE_INCALL_RECORD_RX,
4984 .stream_name = "Voice Downlink Capture",
4985 .cpu_dai_name = "msm-dai-q6-dev.32771",
4986 .platform_name = "msm-pcm-routing",
4987 .codec_name = "msm-stub-codec.1",
4988 .codec_dai_name = "msm-stub-tx",
4989 .no_pcm = 1,
4990 .dpcm_capture = 1,
4991 .id = MSM_BACKEND_DAI_INCALL_RECORD_RX,
4992 .be_hw_params_fixup = msm_be_hw_params_fixup,
4993 .ignore_suspend = 1,
4994 },
4995 /* Incall Music BACK END DAI Link */
4996 {
4997 .name = LPASS_BE_VOICE_PLAYBACK_TX,
4998 .stream_name = "Voice Farend Playback",
4999 .cpu_dai_name = "msm-dai-q6-dev.32773",
5000 .platform_name = "msm-pcm-routing",
5001 .codec_name = "msm-stub-codec.1",
5002 .codec_dai_name = "msm-stub-rx",
5003 .no_pcm = 1,
5004 .dpcm_playback = 1,
5005 .id = MSM_BACKEND_DAI_VOICE_PLAYBACK_TX,
5006 .be_hw_params_fixup = msm_be_hw_params_fixup,
5007 .ignore_suspend = 1,
5008 .ignore_pmdown_time = 1,
5009 },
5010 /* Incall Music 2 BACK END DAI Link */
5011 {
5012 .name = LPASS_BE_VOICE2_PLAYBACK_TX,
5013 .stream_name = "Voice2 Farend Playback",
5014 .cpu_dai_name = "msm-dai-q6-dev.32770",
5015 .platform_name = "msm-pcm-routing",
5016 .codec_name = "msm-stub-codec.1",
5017 .codec_dai_name = "msm-stub-rx",
5018 .no_pcm = 1,
5019 .dpcm_playback = 1,
5020 .id = MSM_BACKEND_DAI_VOICE2_PLAYBACK_TX,
5021 .be_hw_params_fixup = msm_be_hw_params_fixup,
5022 .ignore_suspend = 1,
5023 .ignore_pmdown_time = 1,
5024 },
5025 {
5026 .name = LPASS_BE_USB_AUDIO_RX,
5027 .stream_name = "USB Audio Playback",
5028 .cpu_dai_name = "msm-dai-q6-dev.28672",
5029 .platform_name = "msm-pcm-routing",
5030 .codec_name = "msm-stub-codec.1",
5031 .codec_dai_name = "msm-stub-rx",
5032 .dynamic_be = 1,
5033 .no_pcm = 1,
5034 .dpcm_playback = 1,
5035 .id = MSM_BACKEND_DAI_USB_RX,
5036 .be_hw_params_fixup = msm_be_hw_params_fixup,
5037 .ignore_pmdown_time = 1,
5038 .ignore_suspend = 1,
5039 },
5040 {
5041 .name = LPASS_BE_USB_AUDIO_TX,
5042 .stream_name = "USB Audio Capture",
5043 .cpu_dai_name = "msm-dai-q6-dev.28673",
5044 .platform_name = "msm-pcm-routing",
5045 .codec_name = "msm-stub-codec.1",
5046 .codec_dai_name = "msm-stub-tx",
5047 .no_pcm = 1,
5048 .dpcm_capture = 1,
5049 .id = MSM_BACKEND_DAI_USB_TX,
5050 .be_hw_params_fixup = msm_be_hw_params_fixup,
5051 .ignore_suspend = 1,
5052 },
5053 {
5054 .name = LPASS_BE_PRI_TDM_RX_0,
5055 .stream_name = "Primary TDM0 Playback",
5056 .cpu_dai_name = "msm-dai-q6-tdm.36864",
5057 .platform_name = "msm-pcm-routing",
5058 .codec_name = "msm-stub-codec.1",
5059 .codec_dai_name = "msm-stub-rx",
5060 .no_pcm = 1,
5061 .dpcm_playback = 1,
5062 .id = MSM_BACKEND_DAI_PRI_TDM_RX_0,
5063 .be_hw_params_fixup = msm_be_hw_params_fixup,
5064 .ops = &bengal_tdm_be_ops,
5065 .ignore_suspend = 1,
5066 .ignore_pmdown_time = 1,
5067 },
5068 {
5069 .name = LPASS_BE_PRI_TDM_TX_0,
5070 .stream_name = "Primary TDM0 Capture",
5071 .cpu_dai_name = "msm-dai-q6-tdm.36865",
5072 .platform_name = "msm-pcm-routing",
5073 .codec_name = "msm-stub-codec.1",
5074 .codec_dai_name = "msm-stub-tx",
5075 .no_pcm = 1,
5076 .dpcm_capture = 1,
5077 .id = MSM_BACKEND_DAI_PRI_TDM_TX_0,
5078 .be_hw_params_fixup = msm_be_hw_params_fixup,
5079 .ops = &bengal_tdm_be_ops,
5080 .ignore_suspend = 1,
5081 },
5082 {
5083 .name = LPASS_BE_SEC_TDM_RX_0,
5084 .stream_name = "Secondary TDM0 Playback",
5085 .cpu_dai_name = "msm-dai-q6-tdm.36880",
5086 .platform_name = "msm-pcm-routing",
5087 .codec_name = "msm-stub-codec.1",
5088 .codec_dai_name = "msm-stub-rx",
5089 .no_pcm = 1,
5090 .dpcm_playback = 1,
5091 .id = MSM_BACKEND_DAI_SEC_TDM_RX_0,
5092 .be_hw_params_fixup = msm_be_hw_params_fixup,
5093 .ops = &bengal_tdm_be_ops,
5094 .ignore_suspend = 1,
5095 .ignore_pmdown_time = 1,
5096 },
5097 {
5098 .name = LPASS_BE_SEC_TDM_TX_0,
5099 .stream_name = "Secondary TDM0 Capture",
5100 .cpu_dai_name = "msm-dai-q6-tdm.36881",
5101 .platform_name = "msm-pcm-routing",
5102 .codec_name = "msm-stub-codec.1",
5103 .codec_dai_name = "msm-stub-tx",
5104 .no_pcm = 1,
5105 .dpcm_capture = 1,
5106 .id = MSM_BACKEND_DAI_SEC_TDM_TX_0,
5107 .be_hw_params_fixup = msm_be_hw_params_fixup,
5108 .ops = &bengal_tdm_be_ops,
5109 .ignore_suspend = 1,
5110 },
5111 {
5112 .name = LPASS_BE_TERT_TDM_RX_0,
5113 .stream_name = "Tertiary TDM0 Playback",
5114 .cpu_dai_name = "msm-dai-q6-tdm.36896",
5115 .platform_name = "msm-pcm-routing",
5116 .codec_name = "msm-stub-codec.1",
5117 .codec_dai_name = "msm-stub-rx",
5118 .no_pcm = 1,
5119 .dpcm_playback = 1,
5120 .id = MSM_BACKEND_DAI_TERT_TDM_RX_0,
5121 .be_hw_params_fixup = msm_be_hw_params_fixup,
5122 .ops = &bengal_tdm_be_ops,
5123 .ignore_suspend = 1,
5124 .ignore_pmdown_time = 1,
5125 },
5126 {
5127 .name = LPASS_BE_TERT_TDM_TX_0,
5128 .stream_name = "Tertiary TDM0 Capture",
5129 .cpu_dai_name = "msm-dai-q6-tdm.36897",
5130 .platform_name = "msm-pcm-routing",
5131 .codec_name = "msm-stub-codec.1",
5132 .codec_dai_name = "msm-stub-tx",
5133 .no_pcm = 1,
5134 .dpcm_capture = 1,
5135 .id = MSM_BACKEND_DAI_TERT_TDM_TX_0,
5136 .be_hw_params_fixup = msm_be_hw_params_fixup,
5137 .ops = &bengal_tdm_be_ops,
5138 .ignore_suspend = 1,
5139 },
5140 {
5141 .name = LPASS_BE_QUAT_TDM_RX_0,
5142 .stream_name = "Quaternary TDM0 Playback",
5143 .cpu_dai_name = "msm-dai-q6-tdm.36912",
5144 .platform_name = "msm-pcm-routing",
5145 .codec_name = "msm-stub-codec.1",
5146 .codec_dai_name = "msm-stub-rx",
5147 .no_pcm = 1,
5148 .dpcm_playback = 1,
5149 .id = MSM_BACKEND_DAI_QUAT_TDM_RX_0,
5150 .be_hw_params_fixup = msm_be_hw_params_fixup,
5151 .ops = &bengal_tdm_be_ops,
5152 .ignore_suspend = 1,
5153 .ignore_pmdown_time = 1,
5154 },
5155 {
5156 .name = LPASS_BE_QUAT_TDM_TX_0,
5157 .stream_name = "Quaternary TDM0 Capture",
5158 .cpu_dai_name = "msm-dai-q6-tdm.36913",
5159 .platform_name = "msm-pcm-routing",
5160 .codec_name = "msm-stub-codec.1",
5161 .codec_dai_name = "msm-stub-tx",
5162 .no_pcm = 1,
5163 .dpcm_capture = 1,
5164 .id = MSM_BACKEND_DAI_QUAT_TDM_TX_0,
5165 .be_hw_params_fixup = msm_be_hw_params_fixup,
5166 .ops = &bengal_tdm_be_ops,
5167 .ignore_suspend = 1,
5168 },
5169};
5170
5171static struct snd_soc_dai_link msm_wcn_btfm_be_dai_links[] = {
5172 {
5173 .name = LPASS_BE_SLIMBUS_7_RX,
5174 .stream_name = "Slimbus7 Playback",
5175 .cpu_dai_name = "msm-dai-q6-dev.16398",
5176 .platform_name = "msm-pcm-routing",
5177 .codec_name = "btfmslim_slave",
5178 /* BT codec driver determines capabilities based on
5179 * dai name, bt codecdai name should always contains
5180 * supported usecase information
5181 */
5182 .codec_dai_name = "btfm_bt_sco_a2dp_slim_rx",
5183 .no_pcm = 1,
5184 .dpcm_playback = 1,
5185 .id = MSM_BACKEND_DAI_SLIMBUS_7_RX,
5186 .be_hw_params_fixup = msm_be_hw_params_fixup,
5187 .init = &msm_wcn_init,
5188 .ops = &msm_wcn_ops,
5189 /* dai link has playback support */
5190 .ignore_pmdown_time = 1,
5191 .ignore_suspend = 1,
5192 },
5193 {
5194 .name = LPASS_BE_SLIMBUS_7_TX,
5195 .stream_name = "Slimbus7 Capture",
5196 .cpu_dai_name = "msm-dai-q6-dev.16399",
5197 .platform_name = "msm-pcm-routing",
5198 .codec_name = "btfmslim_slave",
5199 .codec_dai_name = "btfm_bt_sco_slim_tx",
5200 .no_pcm = 1,
5201 .dpcm_capture = 1,
5202 .id = MSM_BACKEND_DAI_SLIMBUS_7_TX,
5203 .be_hw_params_fixup = msm_be_hw_params_fixup,
5204 .ops = &msm_wcn_ops,
5205 .ignore_suspend = 1,
5206 },
5207 {
5208 .name = LPASS_BE_SLIMBUS_8_TX,
5209 .stream_name = "Slimbus8 Capture",
5210 .cpu_dai_name = "msm-dai-q6-dev.16401",
5211 .platform_name = "msm-pcm-routing",
5212 .codec_name = "btfmslim_slave",
5213 .codec_dai_name = "btfm_fm_slim_tx",
5214 .no_pcm = 1,
5215 .dpcm_capture = 1,
5216 .id = MSM_BACKEND_DAI_SLIMBUS_8_TX,
5217 .be_hw_params_fixup = msm_be_hw_params_fixup,
5218 .ops = &msm_wcn_ops,
5219 .ignore_suspend = 1,
5220 },
5221};
5222
5223static struct snd_soc_dai_link msm_mi2s_be_dai_links[] = {
5224 {
5225 .name = LPASS_BE_PRI_MI2S_RX,
5226 .stream_name = "Primary MI2S Playback",
5227 .cpu_dai_name = "msm-dai-q6-mi2s.0",
5228 .platform_name = "msm-pcm-routing",
5229 .codec_name = "msm-stub-codec.1",
5230 .codec_dai_name = "msm-stub-rx",
5231 .no_pcm = 1,
5232 .dpcm_playback = 1,
5233 .id = MSM_BACKEND_DAI_PRI_MI2S_RX,
5234 .be_hw_params_fixup = msm_be_hw_params_fixup,
5235 .ops = &msm_mi2s_be_ops,
5236 .ignore_suspend = 1,
5237 .ignore_pmdown_time = 1,
5238 },
5239 {
5240 .name = LPASS_BE_PRI_MI2S_TX,
5241 .stream_name = "Primary MI2S Capture",
5242 .cpu_dai_name = "msm-dai-q6-mi2s.0",
5243 .platform_name = "msm-pcm-routing",
5244 .codec_name = "msm-stub-codec.1",
5245 .codec_dai_name = "msm-stub-tx",
5246 .no_pcm = 1,
5247 .dpcm_capture = 1,
5248 .id = MSM_BACKEND_DAI_PRI_MI2S_TX,
5249 .be_hw_params_fixup = msm_be_hw_params_fixup,
5250 .ops = &msm_mi2s_be_ops,
5251 .ignore_suspend = 1,
5252 },
5253 {
5254 .name = LPASS_BE_SEC_MI2S_RX,
5255 .stream_name = "Secondary MI2S Playback",
5256 .cpu_dai_name = "msm-dai-q6-mi2s.1",
5257 .platform_name = "msm-pcm-routing",
5258 .codec_name = "msm-stub-codec.1",
5259 .codec_dai_name = "msm-stub-rx",
5260 .no_pcm = 1,
5261 .dpcm_playback = 1,
5262 .id = MSM_BACKEND_DAI_SECONDARY_MI2S_RX,
5263 .be_hw_params_fixup = msm_be_hw_params_fixup,
5264 .ops = &msm_mi2s_be_ops,
5265 .ignore_suspend = 1,
5266 .ignore_pmdown_time = 1,
5267 },
5268 {
5269 .name = LPASS_BE_SEC_MI2S_TX,
5270 .stream_name = "Secondary MI2S Capture",
5271 .cpu_dai_name = "msm-dai-q6-mi2s.1",
5272 .platform_name = "msm-pcm-routing",
5273 .codec_name = "msm-stub-codec.1",
5274 .codec_dai_name = "msm-stub-tx",
5275 .no_pcm = 1,
5276 .dpcm_capture = 1,
5277 .id = MSM_BACKEND_DAI_SECONDARY_MI2S_TX,
5278 .be_hw_params_fixup = msm_be_hw_params_fixup,
5279 .ops = &msm_mi2s_be_ops,
5280 .ignore_suspend = 1,
5281 },
5282 {
5283 .name = LPASS_BE_TERT_MI2S_RX,
5284 .stream_name = "Tertiary MI2S Playback",
5285 .cpu_dai_name = "msm-dai-q6-mi2s.2",
5286 .platform_name = "msm-pcm-routing",
5287 .codec_name = "msm-stub-codec.1",
5288 .codec_dai_name = "msm-stub-rx",
5289 .no_pcm = 1,
5290 .dpcm_playback = 1,
5291 .id = MSM_BACKEND_DAI_TERTIARY_MI2S_RX,
5292 .be_hw_params_fixup = msm_be_hw_params_fixup,
5293 .ops = &msm_mi2s_be_ops,
5294 .ignore_suspend = 1,
5295 .ignore_pmdown_time = 1,
5296 },
5297 {
5298 .name = LPASS_BE_TERT_MI2S_TX,
5299 .stream_name = "Tertiary MI2S Capture",
5300 .cpu_dai_name = "msm-dai-q6-mi2s.2",
5301 .platform_name = "msm-pcm-routing",
5302 .codec_name = "msm-stub-codec.1",
5303 .codec_dai_name = "msm-stub-tx",
5304 .no_pcm = 1,
5305 .dpcm_capture = 1,
5306 .id = MSM_BACKEND_DAI_TERTIARY_MI2S_TX,
5307 .be_hw_params_fixup = msm_be_hw_params_fixup,
5308 .ops = &msm_mi2s_be_ops,
5309 .ignore_suspend = 1,
5310 },
5311 {
5312 .name = LPASS_BE_QUAT_MI2S_RX,
5313 .stream_name = "Quaternary MI2S Playback",
5314 .cpu_dai_name = "msm-dai-q6-mi2s.3",
5315 .platform_name = "msm-pcm-routing",
5316 .codec_name = "msm-stub-codec.1",
5317 .codec_dai_name = "msm-stub-rx",
5318 .no_pcm = 1,
5319 .dpcm_playback = 1,
5320 .id = MSM_BACKEND_DAI_QUATERNARY_MI2S_RX,
5321 .be_hw_params_fixup = msm_be_hw_params_fixup,
5322 .ops = &msm_mi2s_be_ops,
5323 .ignore_suspend = 1,
5324 .ignore_pmdown_time = 1,
5325 },
5326 {
5327 .name = LPASS_BE_QUAT_MI2S_TX,
5328 .stream_name = "Quaternary MI2S Capture",
5329 .cpu_dai_name = "msm-dai-q6-mi2s.3",
5330 .platform_name = "msm-pcm-routing",
5331 .codec_name = "msm-stub-codec.1",
5332 .codec_dai_name = "msm-stub-tx",
5333 .no_pcm = 1,
5334 .dpcm_capture = 1,
5335 .id = MSM_BACKEND_DAI_QUATERNARY_MI2S_TX,
5336 .be_hw_params_fixup = msm_be_hw_params_fixup,
5337 .ops = &msm_mi2s_be_ops,
5338 .ignore_suspend = 1,
5339 },
5340};
5341
5342static struct snd_soc_dai_link msm_auxpcm_be_dai_links[] = {
5343 /* Primary AUX PCM Backend DAI Links */
5344 {
5345 .name = LPASS_BE_AUXPCM_RX,
5346 .stream_name = "AUX PCM Playback",
5347 .cpu_dai_name = "msm-dai-q6-auxpcm.1",
5348 .platform_name = "msm-pcm-routing",
5349 .codec_name = "msm-stub-codec.1",
5350 .codec_dai_name = "msm-stub-rx",
5351 .no_pcm = 1,
5352 .dpcm_playback = 1,
5353 .id = MSM_BACKEND_DAI_AUXPCM_RX,
5354 .be_hw_params_fixup = msm_be_hw_params_fixup,
5355 .ops = &bengal_aux_be_ops,
5356 .ignore_pmdown_time = 1,
5357 .ignore_suspend = 1,
5358 },
5359 {
5360 .name = LPASS_BE_AUXPCM_TX,
5361 .stream_name = "AUX PCM Capture",
5362 .cpu_dai_name = "msm-dai-q6-auxpcm.1",
5363 .platform_name = "msm-pcm-routing",
5364 .codec_name = "msm-stub-codec.1",
5365 .codec_dai_name = "msm-stub-tx",
5366 .no_pcm = 1,
5367 .dpcm_capture = 1,
5368 .id = MSM_BACKEND_DAI_AUXPCM_TX,
5369 .be_hw_params_fixup = msm_be_hw_params_fixup,
5370 .ops = &bengal_aux_be_ops,
5371 .ignore_suspend = 1,
5372 },
5373 /* Secondary AUX PCM Backend DAI Links */
5374 {
5375 .name = LPASS_BE_SEC_AUXPCM_RX,
5376 .stream_name = "Sec AUX PCM Playback",
5377 .cpu_dai_name = "msm-dai-q6-auxpcm.2",
5378 .platform_name = "msm-pcm-routing",
5379 .codec_name = "msm-stub-codec.1",
5380 .codec_dai_name = "msm-stub-rx",
5381 .no_pcm = 1,
5382 .dpcm_playback = 1,
5383 .id = MSM_BACKEND_DAI_SEC_AUXPCM_RX,
5384 .be_hw_params_fixup = msm_be_hw_params_fixup,
5385 .ops = &bengal_aux_be_ops,
5386 .ignore_pmdown_time = 1,
5387 .ignore_suspend = 1,
5388 },
5389 {
5390 .name = LPASS_BE_SEC_AUXPCM_TX,
5391 .stream_name = "Sec AUX PCM Capture",
5392 .cpu_dai_name = "msm-dai-q6-auxpcm.2",
5393 .platform_name = "msm-pcm-routing",
5394 .codec_name = "msm-stub-codec.1",
5395 .codec_dai_name = "msm-stub-tx",
5396 .no_pcm = 1,
5397 .dpcm_capture = 1,
5398 .id = MSM_BACKEND_DAI_SEC_AUXPCM_TX,
5399 .be_hw_params_fixup = msm_be_hw_params_fixup,
5400 .ops = &bengal_aux_be_ops,
5401 .ignore_suspend = 1,
5402 },
5403 /* Tertiary AUX PCM Backend DAI Links */
5404 {
5405 .name = LPASS_BE_TERT_AUXPCM_RX,
5406 .stream_name = "Tert AUX PCM Playback",
5407 .cpu_dai_name = "msm-dai-q6-auxpcm.3",
5408 .platform_name = "msm-pcm-routing",
5409 .codec_name = "msm-stub-codec.1",
5410 .codec_dai_name = "msm-stub-rx",
5411 .no_pcm = 1,
5412 .dpcm_playback = 1,
5413 .id = MSM_BACKEND_DAI_TERT_AUXPCM_RX,
5414 .be_hw_params_fixup = msm_be_hw_params_fixup,
5415 .ops = &bengal_aux_be_ops,
5416 .ignore_suspend = 1,
5417 },
5418 {
5419 .name = LPASS_BE_TERT_AUXPCM_TX,
5420 .stream_name = "Tert AUX PCM Capture",
5421 .cpu_dai_name = "msm-dai-q6-auxpcm.3",
5422 .platform_name = "msm-pcm-routing",
5423 .codec_name = "msm-stub-codec.1",
5424 .codec_dai_name = "msm-stub-tx",
5425 .no_pcm = 1,
5426 .dpcm_capture = 1,
5427 .id = MSM_BACKEND_DAI_TERT_AUXPCM_TX,
5428 .be_hw_params_fixup = msm_be_hw_params_fixup,
5429 .ops = &bengal_aux_be_ops,
5430 .ignore_suspend = 1,
5431 },
5432 /* Quaternary AUX PCM Backend DAI Links */
5433 {
5434 .name = LPASS_BE_QUAT_AUXPCM_RX,
5435 .stream_name = "Quat AUX PCM Playback",
5436 .cpu_dai_name = "msm-dai-q6-auxpcm.4",
5437 .platform_name = "msm-pcm-routing",
5438 .codec_name = "msm-stub-codec.1",
5439 .codec_dai_name = "msm-stub-rx",
5440 .no_pcm = 1,
5441 .dpcm_playback = 1,
5442 .id = MSM_BACKEND_DAI_QUAT_AUXPCM_RX,
5443 .be_hw_params_fixup = msm_be_hw_params_fixup,
5444 .ops = &bengal_aux_be_ops,
5445 .ignore_suspend = 1,
5446 },
5447 {
5448 .name = LPASS_BE_QUAT_AUXPCM_TX,
5449 .stream_name = "Quat AUX PCM Capture",
5450 .cpu_dai_name = "msm-dai-q6-auxpcm.4",
5451 .platform_name = "msm-pcm-routing",
5452 .codec_name = "msm-stub-codec.1",
5453 .codec_dai_name = "msm-stub-tx",
5454 .no_pcm = 1,
5455 .dpcm_capture = 1,
5456 .id = MSM_BACKEND_DAI_QUAT_AUXPCM_TX,
5457 .be_hw_params_fixup = msm_be_hw_params_fixup,
5458 .ops = &bengal_aux_be_ops,
5459 .ignore_suspend = 1,
5460 },
5461};
5462
5463static struct snd_soc_dai_link msm_rx_tx_cdc_dma_be_dai_links[] = {
5464 /* RX CDC DMA Backend DAI Links */
5465 {
5466 .name = LPASS_BE_RX_CDC_DMA_RX_0,
5467 .stream_name = "RX CDC DMA0 Playback",
5468 .cpu_dai_name = "msm-dai-cdc-dma-dev.45104",
5469 .platform_name = "msm-pcm-routing",
5470 .codec_name = "bolero_codec",
5471 .codec_dai_name = "rx_macro_rx1",
5472 .dynamic_be = 1,
5473 .no_pcm = 1,
5474 .dpcm_playback = 1,
5475 .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_0,
5476 .be_hw_params_fixup = msm_be_hw_params_fixup,
5477 .ignore_pmdown_time = 1,
5478 .ignore_suspend = 1,
5479 .ops = &msm_cdc_dma_be_ops,
5480 },
5481 {
5482 .name = LPASS_BE_RX_CDC_DMA_RX_1,
5483 .stream_name = "RX CDC DMA1 Playback",
5484 .cpu_dai_name = "msm-dai-cdc-dma-dev.45106",
5485 .platform_name = "msm-pcm-routing",
5486 .codec_name = "bolero_codec",
5487 .codec_dai_name = "rx_macro_rx2",
5488 .dynamic_be = 1,
5489 .no_pcm = 1,
5490 .dpcm_playback = 1,
5491 .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_1,
5492 .be_hw_params_fixup = msm_be_hw_params_fixup,
5493 .ignore_pmdown_time = 1,
5494 .ignore_suspend = 1,
5495 .ops = &msm_cdc_dma_be_ops,
5496 },
5497 {
5498 .name = LPASS_BE_RX_CDC_DMA_RX_2,
5499 .stream_name = "RX CDC DMA2 Playback",
5500 .cpu_dai_name = "msm-dai-cdc-dma-dev.45108",
5501 .platform_name = "msm-pcm-routing",
5502 .codec_name = "bolero_codec",
5503 .codec_dai_name = "rx_macro_rx3",
5504 .dynamic_be = 1,
5505 .no_pcm = 1,
5506 .dpcm_playback = 1,
5507 .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_2,
5508 .be_hw_params_fixup = msm_be_hw_params_fixup,
5509 .ignore_pmdown_time = 1,
5510 .ignore_suspend = 1,
5511 .ops = &msm_cdc_dma_be_ops,
5512 },
5513 {
5514 .name = LPASS_BE_RX_CDC_DMA_RX_3,
5515 .stream_name = "RX CDC DMA3 Playback",
5516 .cpu_dai_name = "msm-dai-cdc-dma-dev.45110",
5517 .platform_name = "msm-pcm-routing",
5518 .codec_name = "bolero_codec",
5519 .codec_dai_name = "rx_macro_rx4",
5520 .dynamic_be = 1,
5521 .no_pcm = 1,
5522 .dpcm_playback = 1,
5523 .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_3,
5524 .be_hw_params_fixup = msm_be_hw_params_fixup,
5525 .ignore_pmdown_time = 1,
5526 .ignore_suspend = 1,
5527 .ops = &msm_cdc_dma_be_ops,
5528 },
5529 /* TX CDC DMA Backend DAI Links */
5530 {
5531 .name = LPASS_BE_TX_CDC_DMA_TX_3,
5532 .stream_name = "TX CDC DMA3 Capture",
5533 .cpu_dai_name = "msm-dai-cdc-dma-dev.45111",
5534 .platform_name = "msm-pcm-routing",
5535 .codec_name = "bolero_codec",
5536 .codec_dai_name = "tx_macro_tx1",
5537 .no_pcm = 1,
5538 .dpcm_capture = 1,
5539 .id = MSM_BACKEND_DAI_TX_CDC_DMA_TX_3,
5540 .be_hw_params_fixup = msm_be_hw_params_fixup,
5541 .ignore_suspend = 1,
5542 .ops = &msm_cdc_dma_be_ops,
5543 },
5544 {
5545 .name = LPASS_BE_TX_CDC_DMA_TX_4,
5546 .stream_name = "TX CDC DMA4 Capture",
5547 .cpu_dai_name = "msm-dai-cdc-dma-dev.45113",
5548 .platform_name = "msm-pcm-routing",
5549 .codec_name = "bolero_codec",
5550 .codec_dai_name = "tx_macro_tx2",
5551 .no_pcm = 1,
5552 .dpcm_capture = 1,
5553 .id = MSM_BACKEND_DAI_TX_CDC_DMA_TX_4,
5554 .be_hw_params_fixup = msm_be_hw_params_fixup,
5555 .ignore_suspend = 1,
5556 .ops = &msm_cdc_dma_be_ops,
5557 },
5558};
5559
5560static struct snd_soc_dai_link msm_va_cdc_dma_be_dai_links[] = {
5561 {
5562 .name = LPASS_BE_VA_CDC_DMA_TX_0,
5563 .stream_name = "VA CDC DMA0 Capture",
5564 .cpu_dai_name = "msm-dai-cdc-dma-dev.45089",
5565 .platform_name = "msm-pcm-routing",
5566 .codec_name = "bolero_codec",
5567 .codec_dai_name = "va_macro_tx1",
5568 .no_pcm = 1,
5569 .dpcm_capture = 1,
5570 .init = &msm_int_audrx_init,
5571 .id = MSM_BACKEND_DAI_VA_CDC_DMA_TX_0,
5572 .be_hw_params_fixup = msm_be_hw_params_fixup,
5573 .ignore_suspend = 1,
5574 .ops = &msm_cdc_dma_be_ops,
5575 },
5576 {
5577 .name = LPASS_BE_VA_CDC_DMA_TX_1,
5578 .stream_name = "VA CDC DMA1 Capture",
5579 .cpu_dai_name = "msm-dai-cdc-dma-dev.45091",
5580 .platform_name = "msm-pcm-routing",
5581 .codec_name = "bolero_codec",
5582 .codec_dai_name = "va_macro_tx2",
5583 .no_pcm = 1,
5584 .dpcm_capture = 1,
5585 .id = MSM_BACKEND_DAI_VA_CDC_DMA_TX_1,
5586 .be_hw_params_fixup = msm_be_hw_params_fixup,
5587 .ignore_suspend = 1,
5588 .ops = &msm_cdc_dma_be_ops,
5589 },
5590 {
5591 .name = LPASS_BE_VA_CDC_DMA_TX_2,
5592 .stream_name = "VA CDC DMA2 Capture",
5593 .cpu_dai_name = "msm-dai-cdc-dma-dev.45093",
5594 .platform_name = "msm-pcm-routing",
5595 .codec_name = "bolero_codec",
5596 .codec_dai_name = "va_macro_tx3",
5597 .no_pcm = 1,
5598 .dpcm_capture = 1,
5599 .id = MSM_BACKEND_DAI_VA_CDC_DMA_TX_2,
5600 .be_hw_params_fixup = msm_be_hw_params_fixup,
5601 .ignore_suspend = 1,
5602 .ops = &msm_cdc_dma_be_ops,
5603 },
5604};
5605
5606static struct snd_soc_dai_link msm_afe_rxtx_lb_be_dai_link[] = {
5607 {
5608 .name = LPASS_BE_AFE_LOOPBACK_TX,
5609 .stream_name = "AFE Loopback Capture",
5610 .cpu_dai_name = "msm-dai-q6-dev.24577",
5611 .platform_name = "msm-pcm-routing",
5612 .codec_name = "msm-stub-codec.1",
5613 .codec_dai_name = "msm-stub-tx",
5614 .no_pcm = 1,
5615 .dpcm_capture = 1,
5616 .id = MSM_BACKEND_DAI_AFE_LOOPBACK_TX,
5617 .be_hw_params_fixup = msm_be_hw_params_fixup,
5618 .ignore_pmdown_time = 1,
5619 .ignore_suspend = 1,
5620 },
5621};
5622
5623static struct snd_soc_dai_link msm_bengal_dai_links[
5624 ARRAY_SIZE(msm_common_dai_links) +
5625 ARRAY_SIZE(msm_common_misc_fe_dai_links) +
5626 ARRAY_SIZE(msm_common_be_dai_links) +
5627 ARRAY_SIZE(msm_mi2s_be_dai_links) +
5628 ARRAY_SIZE(msm_auxpcm_be_dai_links) +
5629 ARRAY_SIZE(msm_rx_tx_cdc_dma_be_dai_links) +
5630 ARRAY_SIZE(msm_va_cdc_dma_be_dai_links) +
5631 ARRAY_SIZE(msm_afe_rxtx_lb_be_dai_link) +
5632 ARRAY_SIZE(msm_wcn_btfm_be_dai_links)];
5633
5634static int msm_populate_dai_link_component_of_node(
5635 struct snd_soc_card *card)
5636{
5637 int i, index, ret = 0;
5638 struct device *cdev = card->dev;
5639 struct snd_soc_dai_link *dai_link = card->dai_link;
5640 struct device_node *np;
5641
5642 if (!cdev) {
5643 dev_err(cdev, "%s: Sound card device memory NULL\n", __func__);
5644 return -ENODEV;
5645 }
5646
5647 for (i = 0; i < card->num_links; i++) {
5648 if (dai_link[i].platform_of_node && dai_link[i].cpu_of_node)
5649 continue;
5650
5651 /* populate platform_of_node for snd card dai links */
5652 if (dai_link[i].platform_name &&
5653 !dai_link[i].platform_of_node) {
5654 index = of_property_match_string(cdev->of_node,
5655 "asoc-platform-names",
5656 dai_link[i].platform_name);
5657 if (index < 0) {
5658 dev_err(cdev,
5659 "%s: No match found for platform name: %s\n",
5660 __func__, dai_link[i].platform_name);
5661 ret = index;
5662 goto err;
5663 }
5664 np = of_parse_phandle(cdev->of_node, "asoc-platform",
5665 index);
5666 if (!np) {
5667 dev_err(cdev,
5668 "%s: retrieving phandle for platform %s, index %d failed\n",
5669 __func__, dai_link[i].platform_name,
5670 index);
5671 ret = -ENODEV;
5672 goto err;
5673 }
5674 dai_link[i].platform_of_node = np;
5675 dai_link[i].platform_name = NULL;
5676 }
5677
5678 /* populate cpu_of_node for snd card dai links */
5679 if (dai_link[i].cpu_dai_name && !dai_link[i].cpu_of_node) {
5680 index = of_property_match_string(cdev->of_node,
5681 "asoc-cpu-names",
5682 dai_link[i].cpu_dai_name);
5683 if (index >= 0) {
5684 np = of_parse_phandle(cdev->of_node, "asoc-cpu",
5685 index);
5686 if (!np) {
5687 dev_err(cdev,
5688 "%s: retrieving phandle for cpu dai %s failed\n",
5689 __func__,
5690 dai_link[i].cpu_dai_name);
5691 ret = -ENODEV;
5692 goto err;
5693 }
5694 dai_link[i].cpu_of_node = np;
5695 dai_link[i].cpu_dai_name = NULL;
5696 }
5697 }
5698
5699 /* populate codec_of_node for snd card dai links */
5700 if (dai_link[i].codec_name && !dai_link[i].codec_of_node) {
5701 index = of_property_match_string(cdev->of_node,
5702 "asoc-codec-names",
5703 dai_link[i].codec_name);
5704 if (index < 0)
5705 continue;
5706 np = of_parse_phandle(cdev->of_node, "asoc-codec",
5707 index);
5708 if (!np) {
5709 dev_err(cdev,
5710 "%s: retrieving phandle for codec %s failed\n",
5711 __func__, dai_link[i].codec_name);
5712 ret = -ENODEV;
5713 goto err;
5714 }
5715 dai_link[i].codec_of_node = np;
5716 dai_link[i].codec_name = NULL;
5717 }
5718 }
5719
5720err:
5721 return ret;
5722}
5723
5724static int msm_audrx_stub_init(struct snd_soc_pcm_runtime *rtd)
5725{
5726 int ret = -EINVAL;
5727 struct snd_soc_component *component =
5728 snd_soc_rtdcom_lookup(rtd, "msm-stub-codec");
5729
5730 if (!component) {
5731 pr_err("* %s: No match for msm-stub-codec component\n",
5732 __func__);
5733 return ret;
5734 }
5735
5736 ret = snd_soc_add_component_controls(component, msm_snd_controls,
5737 ARRAY_SIZE(msm_snd_controls));
5738 if (ret < 0) {
5739 dev_err(component->dev,
5740 "%s: add_codec_controls failed, err = %d\n",
5741 __func__, ret);
5742 return ret;
5743 }
5744
5745 return ret;
5746}
5747
5748static int msm_snd_stub_hw_params(struct snd_pcm_substream *substream,
5749 struct snd_pcm_hw_params *params)
5750{
5751 return 0;
5752}
5753
5754static struct snd_soc_ops msm_stub_be_ops = {
5755 .hw_params = msm_snd_stub_hw_params,
5756};
5757
5758struct snd_soc_card snd_soc_card_stub_msm = {
5759 .name = "bengal-stub-snd-card",
5760};
5761
5762static struct snd_soc_dai_link msm_stub_fe_dai_links[] = {
5763 /* FrontEnd DAI Links */
5764 {
5765 .name = "MSMSTUB Media1",
5766 .stream_name = "MultiMedia1",
5767 .cpu_dai_name = "MultiMedia1",
5768 .platform_name = "msm-pcm-dsp.0",
5769 .dynamic = 1,
5770 .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
5771 .dpcm_playback = 1,
5772 .dpcm_capture = 1,
5773 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5774 SND_SOC_DPCM_TRIGGER_POST},
5775 .codec_dai_name = "snd-soc-dummy-dai",
5776 .codec_name = "snd-soc-dummy",
5777 .ignore_suspend = 1,
5778 /* this dainlink has playback support */
5779 .ignore_pmdown_time = 1,
5780 .id = MSM_FRONTEND_DAI_MULTIMEDIA1
5781 },
5782};
5783
5784static struct snd_soc_dai_link msm_stub_be_dai_links[] = {
5785 /* Backend DAI Links */
5786 {
5787 .name = LPASS_BE_AUXPCM_RX,
5788 .stream_name = "AUX PCM Playback",
5789 .cpu_dai_name = "msm-dai-q6-auxpcm.1",
5790 .platform_name = "msm-pcm-routing",
5791 .codec_name = "msm-stub-codec.1",
5792 .codec_dai_name = "msm-stub-rx",
5793 .no_pcm = 1,
5794 .dpcm_playback = 1,
5795 .id = MSM_BACKEND_DAI_AUXPCM_RX,
5796 .init = &msm_audrx_stub_init,
5797 .be_hw_params_fixup = msm_be_hw_params_fixup,
5798 .ignore_pmdown_time = 1,
5799 .ignore_suspend = 1,
5800 .ops = &msm_stub_be_ops,
5801 },
5802 {
5803 .name = LPASS_BE_AUXPCM_TX,
5804 .stream_name = "AUX PCM Capture",
5805 .cpu_dai_name = "msm-dai-q6-auxpcm.1",
5806 .platform_name = "msm-pcm-routing",
5807 .codec_name = "msm-stub-codec.1",
5808 .codec_dai_name = "msm-stub-tx",
5809 .no_pcm = 1,
5810 .dpcm_capture = 1,
5811 .id = MSM_BACKEND_DAI_AUXPCM_TX,
5812 .be_hw_params_fixup = msm_be_hw_params_fixup,
5813 .ignore_suspend = 1,
5814 .ops = &msm_stub_be_ops,
5815 },
5816};
5817
5818static struct snd_soc_dai_link msm_stub_dai_links[
5819 ARRAY_SIZE(msm_stub_fe_dai_links) +
5820 ARRAY_SIZE(msm_stub_be_dai_links)];
5821
5822static const struct of_device_id bengal_asoc_machine_of_match[] = {
5823 { .compatible = "qcom,bengal-asoc-snd",
5824 .data = "codec"},
5825 { .compatible = "qcom,bengal-asoc-snd-stub",
5826 .data = "stub_codec"},
5827 {},
5828};
5829
5830static struct snd_soc_card *populate_snd_card_dailinks(struct device *dev)
5831{
5832 struct snd_soc_card *card = NULL;
5833 struct snd_soc_dai_link *dailink = NULL;
5834 int len_1 = 0;
5835 int len_2 = 0;
5836 int total_links = 0;
5837 int rc = 0;
5838 u32 mi2s_audio_intf = 0;
5839 u32 auxpcm_audio_intf = 0;
Laxminath Kasame1dc0d72019-11-05 21:19:45 +0530[diff] [blame]5840 u32 rxtx_bolero_codec = 0;
5841 u32 va_bolero_codec = 0;
Laxminath Kasamae52c992019-08-26 15:01:15 +0530[diff] [blame]5842 u32 val = 0;
5843 u32 wcn_btfm_intf = 0;
5844 const struct of_device_id *match;
5845
5846 match = of_match_node(bengal_asoc_machine_of_match, dev->of_node);
5847 if (!match) {
5848 dev_err(dev, "%s: No DT match found for sound card\n",
5849 __func__);
5850 return NULL;
5851 }
5852
5853 if (!strcmp(match->data, "codec")) {
5854 card = &snd_soc_card_bengal_msm;
5855
5856 memcpy(msm_bengal_dai_links + total_links,
5857 msm_common_dai_links,
5858 sizeof(msm_common_dai_links));
5859 total_links += ARRAY_SIZE(msm_common_dai_links);
5860
5861 memcpy(msm_bengal_dai_links + total_links,
5862 msm_common_misc_fe_dai_links,
5863 sizeof(msm_common_misc_fe_dai_links));
5864 total_links += ARRAY_SIZE(msm_common_misc_fe_dai_links);
5865
5866 memcpy(msm_bengal_dai_links + total_links,
5867 msm_common_be_dai_links,
5868 sizeof(msm_common_be_dai_links));
5869 total_links += ARRAY_SIZE(msm_common_be_dai_links);
5870
Laxminath Kasame1dc0d72019-11-05 21:19:45 +0530[diff] [blame]5871 rc = of_property_read_u32(dev->of_node,
5872 "qcom,rxtx-bolero-codec",
5873 &rxtx_bolero_codec);
5874 if (rc) {
5875 dev_dbg(dev, "%s: No DT match RXTX Macro codec\n",
5876 __func__);
5877 } else {
5878 if (rxtx_bolero_codec) {
5879 memcpy(msm_bengal_dai_links + total_links,
5880 msm_rx_tx_cdc_dma_be_dai_links,
5881 sizeof(msm_rx_tx_cdc_dma_be_dai_links));
5882 total_links +=
5883 ARRAY_SIZE(
5884 msm_rx_tx_cdc_dma_be_dai_links);
5885 }
5886 }
Laxminath Kasamae52c992019-08-26 15:01:15 +0530[diff] [blame]5887
Laxminath Kasame1dc0d72019-11-05 21:19:45 +0530[diff] [blame]5888 rc = of_property_read_u32(dev->of_node, "qcom,va-bolero-codec",
5889 &va_bolero_codec);
5890 if (rc) {
5891 dev_dbg(dev, "%s: No DT match VA Macro codec\n",
5892 __func__);
5893 } else {
5894 if (va_bolero_codec) {
5895 memcpy(msm_bengal_dai_links + total_links,
5896 msm_va_cdc_dma_be_dai_links,
5897 sizeof(msm_va_cdc_dma_be_dai_links));
5898 total_links +=
5899 ARRAY_SIZE(msm_va_cdc_dma_be_dai_links);
5900 }
5901 }
Laxminath Kasamae52c992019-08-26 15:01:15 +0530[diff] [blame]5902
5903 rc = of_property_read_u32(dev->of_node, "qcom,mi2s-audio-intf",
5904 &mi2s_audio_intf);
5905 if (rc) {
5906 dev_dbg(dev, "%s: No DT match MI2S audio interface\n",
5907 __func__);
5908 } else {
5909 if (mi2s_audio_intf) {
5910 memcpy(msm_bengal_dai_links + total_links,
5911 msm_mi2s_be_dai_links,
5912 sizeof(msm_mi2s_be_dai_links));
5913 total_links +=
5914 ARRAY_SIZE(msm_mi2s_be_dai_links);
5915 }
5916 }
5917
5918 rc = of_property_read_u32(dev->of_node,
5919 "qcom,auxpcm-audio-intf",
5920 &auxpcm_audio_intf);
5921 if (rc) {
5922 dev_dbg(dev, "%s: No DT match Aux PCM interface\n",
5923 __func__);
5924 } else {
5925 if (auxpcm_audio_intf) {
5926 memcpy(msm_bengal_dai_links + total_links,
5927 msm_auxpcm_be_dai_links,
5928 sizeof(msm_auxpcm_be_dai_links));
5929 total_links +=
5930 ARRAY_SIZE(msm_auxpcm_be_dai_links);
5931 }
5932 }
5933
5934 rc = of_property_read_u32(dev->of_node, "qcom,afe-rxtx-lb",
5935 &val);
5936 if (!rc && val) {
5937 memcpy(msm_bengal_dai_links + total_links,
5938 msm_afe_rxtx_lb_be_dai_link,
5939 sizeof(msm_afe_rxtx_lb_be_dai_link));
5940 total_links +=
5941 ARRAY_SIZE(msm_afe_rxtx_lb_be_dai_link);
5942 }
5943
5944 rc = of_property_read_u32(dev->of_node, "qcom,wcn-btfm",
5945 &wcn_btfm_intf);
5946 if (rc) {
5947 dev_dbg(dev, "%s: No DT match wcn btfm interface\n",
5948 __func__);
5949 } else {
5950 if (wcn_btfm_intf) {
5951 memcpy(msm_bengal_dai_links + total_links,
5952 msm_wcn_btfm_be_dai_links,
5953 sizeof(msm_wcn_btfm_be_dai_links));
5954 total_links +=
5955 ARRAY_SIZE(msm_wcn_btfm_be_dai_links);
5956 }
5957 }
5958 dailink = msm_bengal_dai_links;
5959 } else if (!strcmp(match->data, "stub_codec")) {
5960 card = &snd_soc_card_stub_msm;
5961 len_1 = ARRAY_SIZE(msm_stub_fe_dai_links);
5962 len_2 = len_1 + ARRAY_SIZE(msm_stub_be_dai_links);
5963
5964 memcpy(msm_stub_dai_links,
5965 msm_stub_fe_dai_links,
5966 sizeof(msm_stub_fe_dai_links));
5967 memcpy(msm_stub_dai_links + len_1,
5968 msm_stub_be_dai_links,
5969 sizeof(msm_stub_be_dai_links));
5970
5971 dailink = msm_stub_dai_links;
5972 total_links = len_2;
5973 }
5974
5975 if (card) {
5976 card->dai_link = dailink;
5977 card->num_links = total_links;
5978 }
5979
5980 return card;
5981}
5982
5983static int msm_aux_codec_init(struct snd_soc_component *component)
5984{
5985 struct snd_soc_dapm_context *dapm =
5986 snd_soc_component_get_dapm(component);
5987 int ret = 0;
5988 void *mbhc_calibration;
5989 struct snd_info_entry *entry;
5990 struct snd_card *card = component->card->snd_card;
5991 struct msm_asoc_mach_data *pdata;
5992
5993 snd_soc_dapm_ignore_suspend(dapm, "EAR");
5994 snd_soc_dapm_ignore_suspend(dapm, "AUX");
5995 snd_soc_dapm_ignore_suspend(dapm, "HPHL");
5996 snd_soc_dapm_ignore_suspend(dapm, "HPHR");
5997 snd_soc_dapm_ignore_suspend(dapm, "AMIC1");
5998 snd_soc_dapm_ignore_suspend(dapm, "AMIC2");
5999 snd_soc_dapm_ignore_suspend(dapm, "AMIC3");
6000 snd_soc_dapm_ignore_suspend(dapm, "AMIC4");
6001 snd_soc_dapm_sync(dapm);
6002
6003 pdata = snd_soc_card_get_drvdata(component->card);
6004 if (!pdata->codec_root) {
6005 entry = snd_info_create_subdir(card->module, "codecs",
6006 card->proc_root);
6007 if (!entry) {
6008 dev_dbg(component->dev, "%s: Cannot create codecs module entry\n",
6009 __func__);
6010 ret = 0;
6011 goto mbhc_cfg_cal;
6012 }
6013 pdata->codec_root = entry;
6014 }
6015 wcd937x_info_create_codec_entry(pdata->codec_root, component);
6016
6017mbhc_cfg_cal:
6018 mbhc_calibration = def_wcd_mbhc_cal();
6019 if (!mbhc_calibration)
6020 return -ENOMEM;
6021 wcd_mbhc_cfg.calibration = mbhc_calibration;
6022 ret = wcd937x_mbhc_hs_detect(component, &wcd_mbhc_cfg);
6023 if (ret) {
6024 dev_err(component->dev, "%s: mbhc hs detect failed, err:%d\n",
6025 __func__, ret);
6026 goto err_hs_detect;
6027 }
6028 return 0;
6029
6030err_hs_detect:
6031 kfree(mbhc_calibration);
6032 return ret;
6033}
6034
6035static int msm_init_aux_dev(struct platform_device *pdev,
6036 struct snd_soc_card *card)
6037{
6038 struct device_node *wsa_of_node;
6039 struct device_node *aux_codec_of_node;
6040 u32 wsa_max_devs;
6041 u32 wsa_dev_cnt;
6042 u32 codec_max_aux_devs = 0;
6043 u32 codec_aux_dev_cnt = 0;
6044 int i;
6045 struct msm_wsa881x_dev_info *wsa881x_dev_info;
6046 struct aux_codec_dev_info *aux_cdc_dev_info;
6047 const char *auxdev_name_prefix[1];
6048 char *dev_name_str = NULL;
6049 int found = 0;
6050 int codecs_found = 0;
6051 int ret = 0;
6052
6053 /* Get maximum WSA device count for this platform */
6054 ret = of_property_read_u32(pdev->dev.of_node,
6055 "qcom,wsa-max-devs", &wsa_max_devs);
6056 if (ret) {
6057 dev_info(&pdev->dev,
6058 "%s: wsa-max-devs property missing in DT %s, ret = %d\n",
6059 __func__, pdev->dev.of_node->full_name, ret);
6060 wsa_max_devs = 0;
6061 goto codec_aux_dev;
6062 }
6063 if (wsa_max_devs == 0) {
6064 dev_warn(&pdev->dev,
6065 "%s: Max WSA devices is 0 for this target?\n",
6066 __func__);
6067 goto codec_aux_dev;
6068 }
6069
6070 /* Get count of WSA device phandles for this platform */
6071 wsa_dev_cnt = of_count_phandle_with_args(pdev->dev.of_node,
6072 "qcom,wsa-devs", NULL);
6073 if (wsa_dev_cnt == -ENOENT) {
6074 dev_warn(&pdev->dev, "%s: No wsa device defined in DT.\n",
6075 __func__);
6076 goto err;
6077 } else if (wsa_dev_cnt <= 0) {
6078 dev_err(&pdev->dev,
6079 "%s: Error reading wsa device from DT. wsa_dev_cnt = %d\n",
6080 __func__, wsa_dev_cnt);
6081 ret = -EINVAL;
6082 goto err;
6083 }
6084
6085 /*
6086 * Expect total phandles count to be NOT less than maximum possible
6087 * WSA count. However, if it is less, then assign same value to
6088 * max count as well.
6089 */
6090 if (wsa_dev_cnt < wsa_max_devs) {
6091 dev_dbg(&pdev->dev,
6092 "%s: wsa_max_devs = %d cannot exceed wsa_dev_cnt = %d\n",
6093 __func__, wsa_max_devs, wsa_dev_cnt);
6094 wsa_max_devs = wsa_dev_cnt;
6095 }
6096
6097 /* Make sure prefix string passed for each WSA device */
6098 ret = of_property_count_strings(pdev->dev.of_node,
6099 "qcom,wsa-aux-dev-prefix");
6100 if (ret != wsa_dev_cnt) {
6101 dev_err(&pdev->dev,
6102 "%s: expecting %d wsa prefix. Defined only %d in DT\n",
6103 __func__, wsa_dev_cnt, ret);
6104 ret = -EINVAL;
6105 goto err;
6106 }
6107
6108 /*
6109 * Alloc mem to store phandle and index info of WSA device, if already
6110 * registered with ALSA core
6111 */
6112 wsa881x_dev_info = devm_kcalloc(&pdev->dev, wsa_max_devs,
6113 sizeof(struct msm_wsa881x_dev_info),
6114 GFP_KERNEL);
6115 if (!wsa881x_dev_info) {
6116 ret = -ENOMEM;
6117 goto err;
6118 }
6119
6120 /*
6121 * search and check whether all WSA devices are already
6122 * registered with ALSA core or not. If found a node, store
6123 * the node and the index in a local array of struct for later
6124 * use.
6125 */
6126 for (i = 0; i < wsa_dev_cnt; i++) {
6127 wsa_of_node = of_parse_phandle(pdev->dev.of_node,
6128 "qcom,wsa-devs", i);
6129 if (unlikely(!wsa_of_node)) {
6130 /* we should not be here */
6131 dev_err(&pdev->dev,
6132 "%s: wsa dev node is not present\n",
6133 __func__);
6134 ret = -EINVAL;
6135 goto err;
6136 }
6137 if (soc_find_component(wsa_of_node, NULL)) {
6138 /* WSA device registered with ALSA core */
6139 wsa881x_dev_info[found].of_node = wsa_of_node;
6140 wsa881x_dev_info[found].index = i;
6141 found++;
6142 if (found == wsa_max_devs)
6143 break;
6144 }
6145 }
6146
6147 if (found < wsa_max_devs) {
6148 dev_dbg(&pdev->dev,
6149 "%s: failed to find %d components. Found only %d\n",
6150 __func__, wsa_max_devs, found);
6151 return -EPROBE_DEFER;
6152 }
6153 dev_info(&pdev->dev,
6154 "%s: found %d wsa881x devices registered with ALSA core\n",
6155 __func__, found);
6156
6157codec_aux_dev:
6158 /* Get maximum aux codec device count for this platform */
6159 ret = of_property_read_u32(pdev->dev.of_node,
6160 "qcom,codec-max-aux-devs",
6161 &codec_max_aux_devs);
6162 if (ret) {
6163 dev_err(&pdev->dev,
6164 "%s: codec-max-aux-devs property missing in DT %s, ret = %d\n",
6165 __func__, pdev->dev.of_node->full_name, ret);
6166 codec_max_aux_devs = 0;
6167 goto aux_dev_register;
6168 }
6169 if (codec_max_aux_devs == 0) {
6170 dev_dbg(&pdev->dev,
6171 "%s: Max aux codec devices is 0 for this target?\n",
6172 __func__);
6173 goto aux_dev_register;
6174 }
6175
6176 /* Get count of aux codec device phandles for this platform */
6177 codec_aux_dev_cnt = of_count_phandle_with_args(
6178 pdev->dev.of_node,
6179 "qcom,codec-aux-devs", NULL);
6180 if (codec_aux_dev_cnt == -ENOENT) {
6181 dev_warn(&pdev->dev, "%s: No aux codec defined in DT.\n",
6182 __func__);
6183 goto err;
6184 } else if (codec_aux_dev_cnt <= 0) {
6185 dev_err(&pdev->dev,
6186 "%s: Error reading aux codec device from DT, dev_cnt=%d\n",
6187 __func__, codec_aux_dev_cnt);
6188 ret = -EINVAL;
6189 goto err;
6190 }
6191
6192 /*
6193 * Expect total phandles count to be NOT less than maximum possible
6194 * AUX device count. However, if it is less, then assign same value to
6195 * max count as well.
6196 */
6197 if (codec_aux_dev_cnt < codec_max_aux_devs) {
6198 dev_dbg(&pdev->dev,
6199 "%s: codec_max_aux_devs = %d cannot exceed codec_aux_dev_cnt = %d\n",
6200 __func__, codec_max_aux_devs,
6201 codec_aux_dev_cnt);
6202 codec_max_aux_devs = codec_aux_dev_cnt;
6203 }
6204
6205 /*
6206 * Alloc mem to store phandle and index info of aux codec
6207 * if already registered with ALSA core
6208 */
6209 aux_cdc_dev_info = devm_kcalloc(&pdev->dev, codec_aux_dev_cnt,
6210 sizeof(struct aux_codec_dev_info),
6211 GFP_KERNEL);
6212 if (!aux_cdc_dev_info) {
6213 ret = -ENOMEM;
6214 goto err;
6215 }
6216
6217 /*
6218 * search and check whether all aux codecs are already
6219 * registered with ALSA core or not. If found a node, store
6220 * the node and the index in a local array of struct for later
6221 * use.
6222 */
6223 for (i = 0; i < codec_aux_dev_cnt; i++) {
6224 aux_codec_of_node = of_parse_phandle(pdev->dev.of_node,
6225 "qcom,codec-aux-devs", i);
6226 if (unlikely(!aux_codec_of_node)) {
6227 /* we should not be here */
6228 dev_err(&pdev->dev,
6229 "%s: aux codec dev node is not present\n",
6230 __func__);
6231 ret = -EINVAL;
6232 goto err;
6233 }
6234 if (soc_find_component(aux_codec_of_node, NULL)) {
6235 /* AUX codec registered with ALSA core */
6236 aux_cdc_dev_info[codecs_found].of_node =
6237 aux_codec_of_node;
6238 aux_cdc_dev_info[codecs_found].index = i;
6239 codecs_found++;
6240 }
6241 }
6242
6243 if (codecs_found < codec_aux_dev_cnt) {
6244 dev_dbg(&pdev->dev,
6245 "%s: failed to find %d components. Found only %d\n",
6246 __func__, codec_aux_dev_cnt, codecs_found);
6247 return -EPROBE_DEFER;
6248 }
6249 dev_info(&pdev->dev,
6250 "%s: found %d AUX codecs registered with ALSA core\n",
6251 __func__, codecs_found);
6252
6253aux_dev_register:
6254 card->num_aux_devs = wsa_max_devs + codec_aux_dev_cnt;
6255 card->num_configs = wsa_max_devs + codec_aux_dev_cnt;
6256
6257 /* Alloc array of AUX devs struct */
6258 msm_aux_dev = devm_kcalloc(&pdev->dev, card->num_aux_devs,
6259 sizeof(struct snd_soc_aux_dev),
6260 GFP_KERNEL);
6261 if (!msm_aux_dev) {
6262 ret = -ENOMEM;
6263 goto err;
6264 }
6265
6266 /* Alloc array of codec conf struct */
6267 msm_codec_conf = devm_kcalloc(&pdev->dev, card->num_configs,
6268 sizeof(struct snd_soc_codec_conf),
6269 GFP_KERNEL);
6270 if (!msm_codec_conf) {
6271 ret = -ENOMEM;
6272 goto err;
6273 }
6274
6275 for (i = 0; i < wsa_max_devs; i++) {
6276 dev_name_str = devm_kzalloc(&pdev->dev, DEV_NAME_STR_LEN,
6277 GFP_KERNEL);
6278 if (!dev_name_str) {
6279 ret = -ENOMEM;
6280 goto err;
6281 }
6282
6283 ret = of_property_read_string_index(pdev->dev.of_node,
6284 "qcom,wsa-aux-dev-prefix",
6285 wsa881x_dev_info[i].index,
6286 auxdev_name_prefix);
6287 if (ret) {
6288 dev_err(&pdev->dev,
6289 "%s: failed to read wsa aux dev prefix, ret = %d\n",
6290 __func__, ret);
6291 ret = -EINVAL;
6292 goto err;
6293 }
6294
6295 snprintf(dev_name_str, strlen("wsa881x.%d"), "wsa881x.%d", i);
6296 msm_aux_dev[i].name = dev_name_str;
6297 msm_aux_dev[i].codec_name = NULL;
6298 msm_aux_dev[i].codec_of_node =
6299 wsa881x_dev_info[i].of_node;
6300 msm_aux_dev[i].init = NULL;
6301 msm_codec_conf[i].dev_name = NULL;
6302 msm_codec_conf[i].name_prefix = auxdev_name_prefix[0];
6303 msm_codec_conf[i].of_node =
6304 wsa881x_dev_info[i].of_node;
6305 }
6306
6307 for (i = 0; i < codec_aux_dev_cnt; i++) {
6308 msm_aux_dev[wsa_max_devs + i].name = NULL;
6309 msm_aux_dev[wsa_max_devs + i].codec_name = NULL;
6310 msm_aux_dev[wsa_max_devs + i].codec_of_node =
6311 aux_cdc_dev_info[i].of_node;
6312 msm_aux_dev[wsa_max_devs + i].init = msm_aux_codec_init;
6313 msm_codec_conf[wsa_max_devs + i].dev_name = NULL;
6314 msm_codec_conf[wsa_max_devs + i].name_prefix =
6315 NULL;
6316 msm_codec_conf[wsa_max_devs + i].of_node =
6317 aux_cdc_dev_info[i].of_node;
6318 }
6319
6320 card->codec_conf = msm_codec_conf;
6321 card->aux_dev = msm_aux_dev;
6322err:
6323 return ret;
6324}
6325
6326static void msm_i2s_auxpcm_init(struct platform_device *pdev)
6327{
6328 int count = 0;
6329 u32 mi2s_master_slave[MI2S_MAX];
6330 int ret = 0;
6331
6332 for (count = 0; count < MI2S_MAX; count++) {
6333 mutex_init(&mi2s_intf_conf[count].lock);
6334 mi2s_intf_conf[count].ref_cnt = 0;
6335 }
6336
6337 ret = of_property_read_u32_array(pdev->dev.of_node,
6338 "qcom,msm-mi2s-master",
6339 mi2s_master_slave, MI2S_MAX);
6340 if (ret) {
6341 dev_dbg(&pdev->dev, "%s: no qcom,msm-mi2s-master in DT node\n",
6342 __func__);
6343 } else {
6344 for (count = 0; count < MI2S_MAX; count++) {
6345 mi2s_intf_conf[count].msm_is_mi2s_master =
6346 mi2s_master_slave[count];
6347 }
6348 }
6349}
6350
6351static void msm_i2s_auxpcm_deinit(void)
6352{
6353 int count = 0;
6354
6355 for (count = 0; count < MI2S_MAX; count++) {
6356 mutex_destroy(&mi2s_intf_conf[count].lock);
6357 mi2s_intf_conf[count].ref_cnt = 0;
6358 mi2s_intf_conf[count].msm_is_mi2s_master = 0;
6359 }
6360}
6361
6362static int bengal_ssr_enable(struct device *dev, void *data)
6363{
6364 struct platform_device *pdev = to_platform_device(dev);
6365 struct snd_soc_card *card = platform_get_drvdata(pdev);
6366 int ret = 0;
6367
6368 if (!card) {
6369 dev_err(dev, "%s: card is NULL\n", __func__);
6370 ret = -EINVAL;
6371 goto err;
6372 }
6373
6374 if (!strcmp(card->name, "bengal-stub-snd-card")) {
6375 /* TODO */
6376 dev_dbg(dev, "%s: TODO\n", __func__);
6377 }
6378
6379 snd_soc_card_change_online_state(card, 1);
6380 dev_dbg(dev, "%s: setting snd_card to ONLINE\n", __func__);
6381
6382err:
6383 return ret;
6384}
6385
6386static void bengal_ssr_disable(struct device *dev, void *data)
6387{
6388 struct platform_device *pdev = to_platform_device(dev);
6389 struct snd_soc_card *card = platform_get_drvdata(pdev);
6390
6391 if (!card) {
6392 dev_err(dev, "%s: card is NULL\n", __func__);
6393 return;
6394 }
6395
6396 dev_dbg(dev, "%s: setting snd_card to OFFLINE\n", __func__);
6397 snd_soc_card_change_online_state(card, 0);
6398
6399 if (!strcmp(card->name, "bengal-stub-snd-card")) {
6400 /* TODO */
6401 dev_dbg(dev, "%s: TODO\n", __func__);
6402 }
6403}
6404
6405static const struct snd_event_ops bengal_ssr_ops = {
6406 .enable = bengal_ssr_enable,
6407 .disable = bengal_ssr_disable,
6408};
6409
6410static int msm_audio_ssr_compare(struct device *dev, void *data)
6411{
6412 struct device_node *node = data;
6413
6414 dev_dbg(dev, "%s: dev->of_node = 0x%p, node = 0x%p\n",
6415 __func__, dev->of_node, node);
6416 return (dev->of_node && dev->of_node == node);
6417}
6418
6419static int msm_audio_ssr_register(struct device *dev)
6420{
6421 struct device_node *np = dev->of_node;
6422 struct snd_event_clients *ssr_clients = NULL;
6423 struct device_node *node = NULL;
6424 int ret = 0;
6425 int i = 0;
6426
6427 for (i = 0; ; i++) {
6428 node = of_parse_phandle(np, "qcom,msm_audio_ssr_devs", i);
6429 if (!node)
6430 break;
6431 snd_event_mstr_add_client(&ssr_clients,
6432 msm_audio_ssr_compare, node);
6433 }
6434
6435 ret = snd_event_master_register(dev, &bengal_ssr_ops,
6436 ssr_clients, NULL);
6437 if (!ret)
6438 snd_event_notify(dev, SND_EVENT_UP);
6439
6440 return ret;
6441}
6442
6443static int msm_asoc_machine_probe(struct platform_device *pdev)
6444{
6445 struct snd_soc_card *card = NULL;
6446 struct msm_asoc_mach_data *pdata = NULL;
6447 const char *mbhc_audio_jack_type = NULL;
6448 int ret = 0;
6449 uint index = 0;
Laxminath Kasam8d37df92019-11-22 15:46:11 +0530[diff] [blame^]6450 struct nvmem_cell *cell;
6451 size_t len;
6452 u32 *buf;
6453 u32 adsp_var_idx = 0;
Laxminath Kasamae52c992019-08-26 15:01:15 +0530[diff] [blame]6454
6455 if (!pdev->dev.of_node) {
6456 dev_err(&pdev->dev,
6457 "%s: No platform supplied from device tree\n",
6458 __func__);
6459 return -EINVAL;
6460 }
6461
6462 pdata = devm_kzalloc(&pdev->dev,
6463 sizeof(struct msm_asoc_mach_data), GFP_KERNEL);
6464 if (!pdata)
6465 return -ENOMEM;
6466
6467 card = populate_snd_card_dailinks(&pdev->dev);
6468 if (!card) {
6469 dev_err(&pdev->dev, "%s: Card uninitialized\n", __func__);
6470 ret = -EINVAL;
6471 goto err;
6472 }
6473
6474 card->dev = &pdev->dev;
6475 platform_set_drvdata(pdev, card);
6476 snd_soc_card_set_drvdata(card, pdata);
6477
6478 ret = snd_soc_of_parse_card_name(card, "qcom,model");
6479 if (ret) {
6480 dev_err(&pdev->dev, "%s: parse card name failed, err:%d\n",
6481 __func__, ret);
6482 goto err;
6483 }
6484
6485 ret = snd_soc_of_parse_audio_routing(card, "qcom,audio-routing");
6486 if (ret) {
6487 dev_err(&pdev->dev, "%s: parse audio routing failed, err:%d\n",
6488 __func__, ret);
6489 goto err;
6490 }
6491
6492 ret = msm_populate_dai_link_component_of_node(card);
6493 if (ret) {
6494 ret = -EPROBE_DEFER;
6495 goto err;
6496 }
6497
6498 ret = msm_init_aux_dev(pdev, card);
6499 if (ret)
6500 goto err;
6501
6502 ret = devm_snd_soc_register_card(&pdev->dev, card);
6503 if (ret == -EPROBE_DEFER) {
6504 if (codec_reg_done)
6505 ret = -EINVAL;
6506 goto err;
6507 } else if (ret) {
6508 dev_err(&pdev->dev, "%s: snd_soc_register_card failed (%d)\n",
6509 __func__, ret);
6510 goto err;
6511 }
6512 dev_info(&pdev->dev, "%s: Sound card %s registered\n",
6513 __func__, card->name);
6514
6515 pdata->hph_en1_gpio_p = of_parse_phandle(pdev->dev.of_node,
6516 "qcom,hph-en1-gpio", 0);
6517 if (!pdata->hph_en1_gpio_p) {
6518 dev_dbg(&pdev->dev, "%s: property %s not detected in node %s\n",
6519 __func__, "qcom,hph-en1-gpio",
6520 pdev->dev.of_node->full_name);
6521 }
6522
6523 pdata->hph_en0_gpio_p = of_parse_phandle(pdev->dev.of_node,
6524 "qcom,hph-en0-gpio", 0);
6525 if (!pdata->hph_en0_gpio_p) {
6526 dev_dbg(&pdev->dev, "%s: property %s not detected in node %s\n",
6527 __func__, "qcom,hph-en0-gpio",
6528 pdev->dev.of_node->full_name);
6529 }
6530
6531 ret = of_property_read_string(pdev->dev.of_node,
6532 "qcom,mbhc-audio-jack-type", &mbhc_audio_jack_type);
6533 if (ret) {
6534 dev_dbg(&pdev->dev, "%s: Looking up %s property in node %s failed\n",
6535 __func__, "qcom,mbhc-audio-jack-type",
6536 pdev->dev.of_node->full_name);
6537 dev_dbg(&pdev->dev, "Jack type properties set to default\n");
6538 } else {
6539 if (!strcmp(mbhc_audio_jack_type, "4-pole-jack")) {
6540 wcd_mbhc_cfg.enable_anc_mic_detect = false;
6541 dev_dbg(&pdev->dev, "This hardware has 4 pole jack");
6542 } else if (!strcmp(mbhc_audio_jack_type, "5-pole-jack")) {
6543 wcd_mbhc_cfg.enable_anc_mic_detect = true;
6544 dev_dbg(&pdev->dev, "This hardware has 5 pole jack");
6545 } else if (!strcmp(mbhc_audio_jack_type, "6-pole-jack")) {
6546 wcd_mbhc_cfg.enable_anc_mic_detect = true;
6547 dev_dbg(&pdev->dev, "This hardware has 6 pole jack");
6548 } else {
6549 wcd_mbhc_cfg.enable_anc_mic_detect = false;
6550 dev_dbg(&pdev->dev, "Unknown value, set to default\n");
6551 }
6552 }
6553 /*
6554 * Parse US-Euro gpio info from DT. Report no error if us-euro
6555 * entry is not found in DT file as some targets do not support
6556 * US-Euro detection
6557 */
6558 pdata->us_euro_gpio_p = of_parse_phandle(pdev->dev.of_node,
6559 "qcom,us-euro-gpios", 0);
6560 if (!pdata->us_euro_gpio_p) {
6561 dev_dbg(&pdev->dev, "property %s not detected in node %s",
6562 "qcom,us-euro-gpios", pdev->dev.of_node->full_name);
6563 } else {
6564 dev_dbg(&pdev->dev, "%s detected\n",
6565 "qcom,us-euro-gpios");
6566 wcd_mbhc_cfg.swap_gnd_mic = msm_swap_gnd_mic;
6567 }
6568
6569 if (wcd_mbhc_cfg.enable_usbc_analog)
6570 wcd_mbhc_cfg.swap_gnd_mic = msm_usbc_swap_gnd_mic;
6571
6572 pdata->fsa_handle = of_parse_phandle(pdev->dev.of_node,
6573 "fsa4480-i2c-handle", 0);
6574 if (!pdata->fsa_handle)
6575 dev_dbg(&pdev->dev, "property %s not detected in node %s\n",
6576 "fsa4480-i2c-handle", pdev->dev.of_node->full_name);
6577
6578 msm_i2s_auxpcm_init(pdev);
6579 pdata->dmic01_gpio_p = of_parse_phandle(pdev->dev.of_node,
6580 "qcom,cdc-dmic01-gpios",
6581 0);
6582 pdata->dmic23_gpio_p = of_parse_phandle(pdev->dev.of_node,
6583 "qcom,cdc-dmic23-gpios",
6584 0);
6585
6586 pdata->mi2s_gpio_p[PRIM_MI2S] = of_parse_phandle(pdev->dev.of_node,
6587 "qcom,pri-mi2s-gpios", 0);
6588 pdata->mi2s_gpio_p[SEC_MI2S] = of_parse_phandle(pdev->dev.of_node,
6589 "qcom,sec-mi2s-gpios", 0);
6590 pdata->mi2s_gpio_p[TERT_MI2S] = of_parse_phandle(pdev->dev.of_node,
6591 "qcom,tert-mi2s-gpios", 0);
6592 pdata->mi2s_gpio_p[QUAT_MI2S] = of_parse_phandle(pdev->dev.of_node,
6593 "qcom,quat-mi2s-gpios", 0);
6594 for (index = PRIM_MI2S; index < MI2S_MAX; index++)
6595 atomic_set(&(pdata->mi2s_gpio_ref_count[index]), 0);
6596
6597 ret = msm_audio_ssr_register(&pdev->dev);
6598 if (ret)
6599 pr_err("%s: Registration with SND event FWK failed ret = %d\n",
6600 __func__, ret);
6601
6602 is_initial_boot = true;
Laxminath Kasam8d37df92019-11-22 15:46:11 +0530[diff] [blame^]6603 /* get adsp variant idx */
6604 cell = nvmem_cell_get(&pdev->dev, "adsp_variant");
6605 if (IS_ERR_OR_NULL(cell)) {
6606 dev_dbg(&pdev->dev, "%s: FAILED to get nvmem cell \n", __func__);
6607 goto ret;
6608 }
6609 buf = nvmem_cell_read(cell, &len);
6610 nvmem_cell_put(cell);
6611 if (IS_ERR_OR_NULL(buf) || len <= 0 || len > sizeof(32)) {
6612 dev_dbg(&pdev->dev, "%s: FAILED to read nvmem cell \n", __func__);
6613 goto ret;
6614 }
6615 memcpy(&adsp_var_idx, buf, len);
6616 kfree(buf);
6617 va_disable = adsp_var_idx;
Laxminath Kasamae52c992019-08-26 15:01:15 +0530[diff] [blame]6618
Laxminath Kasam8d37df92019-11-22 15:46:11 +0530[diff] [blame^]6619ret:
Laxminath Kasamae52c992019-08-26 15:01:15 +0530[diff] [blame]6620 return 0;
6621err:
6622 devm_kfree(&pdev->dev, pdata);
6623 return ret;
6624}
6625
6626static int msm_asoc_machine_remove(struct platform_device *pdev)
6627{
6628 struct snd_soc_card *card = platform_get_drvdata(pdev);
6629
6630 snd_event_master_deregister(&pdev->dev);
6631 snd_soc_unregister_card(card);
6632 msm_i2s_auxpcm_deinit();
6633
6634 return 0;
6635}
6636
6637static struct platform_driver bengal_asoc_machine_driver = {
6638 .driver = {
6639 .name = DRV_NAME,
6640 .owner = THIS_MODULE,
6641 .pm = &snd_soc_pm_ops,
6642 .of_match_table = bengal_asoc_machine_of_match,
6643 .suppress_bind_attrs = true,
6644 },
6645 .probe = msm_asoc_machine_probe,
6646 .remove = msm_asoc_machine_remove,
6647};
6648module_platform_driver(bengal_asoc_machine_driver);
6649
6650MODULE_DESCRIPTION("ALSA SoC msm");
6651MODULE_LICENSE("GPL v2");
6652MODULE_ALIAS("platform:" DRV_NAME);
6653MODULE_DEVICE_TABLE(of, bengal_asoc_machine_of_match);