blob: 8006472ff338878ac3f9436a7c977a25774fee5e [file] [log] [blame]
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05301/* Copyright (c) 2015-2017, The Linux Foundation. All rights reserved.
2 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 */
12
13#include <linux/input.h>
14#include <linux/of_gpio.h>
Asish Bhattacharya84f7f732017-07-25 16:29:27 +053015#include <linux/module.h>
16#include <linux/platform_device.h>
17#include <linux/of_device.h>
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +053018#include <sound/pcm_params.h>
Laxminath Kasam605b42f2017-08-01 22:02:15 +053019#include <dsp/q6afe-v2.h>
20#include "msm-pcm-routing-v2.h"
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +053021#include "sdm660-common.h"
22#include "sdm660-internal.h"
23#include "sdm660-external.h"
Laxminath Kasam605b42f2017-08-01 22:02:15 +053024#include "codecs/msm-cdc-pinctrl.h"
25#include "codecs/sdm660_cdc/msm-analog-cdc.h"
26#include "codecs/wsa881x.h"
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +053027
28#define DRV_NAME "sdm660-asoc-snd"
29
30#define MSM_INT_DIGITAL_CODEC "msm-dig-codec"
31#define PMIC_INT_ANALOG_CODEC "analog-codec"
32
33#define DEV_NAME_STR_LEN 32
34#define DEFAULT_MCLK_RATE 9600000
35
36struct dev_config {
37 u32 sample_rate;
38 u32 bit_format;
39 u32 channels;
40};
41
42enum {
43 DP_RX_IDX,
44 EXT_DISP_RX_IDX_MAX,
45};
46
Laxminath Kasam38070be2017-08-17 18:21:59 +053047bool codec_reg_done;
48
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +053049/* TDM default config */
50static struct dev_config tdm_rx_cfg[TDM_INTERFACE_MAX][TDM_PORT_MAX] = {
51 { /* PRI TDM */
52 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
53 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
54 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
55 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
56 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
57 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
58 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
59 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
60 },
61 { /* SEC TDM */
62 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
63 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
64 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
65 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
66 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
67 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
68 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
69 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
70 },
71 { /* TERT TDM */
72 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
73 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
74 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
75 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
76 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
77 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
78 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
79 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
80 },
81 { /* QUAT TDM */
82 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
83 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
84 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
85 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
86 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
87 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
88 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
89 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
90 }
91};
92
93/* TDM default config */
94static struct dev_config tdm_tx_cfg[TDM_INTERFACE_MAX][TDM_PORT_MAX] = {
95 { /* PRI TDM */
96 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
97 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
98 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
99 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
100 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
101 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
102 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
103 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
104 },
105 { /* SEC TDM */
106 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
107 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
108 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
109 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
110 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
111 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
112 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
113 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
114 },
115 { /* TERT TDM */
116 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
117 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
118 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
119 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
120 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
121 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
122 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
123 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
124 },
125 { /* QUAT TDM */
126 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
127 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
128 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
129 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
130 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
131 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
132 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
133 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
134 }
135};
136
137/* Default configuration of external display BE */
138static struct dev_config ext_disp_rx_cfg[] = {
139 [DP_RX_IDX] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
140};
141static struct dev_config usb_rx_cfg = {
142 .sample_rate = SAMPLING_RATE_48KHZ,
143 .bit_format = SNDRV_PCM_FORMAT_S16_LE,
144 .channels = 2,
145};
146
147static struct dev_config usb_tx_cfg = {
148 .sample_rate = SAMPLING_RATE_48KHZ,
149 .bit_format = SNDRV_PCM_FORMAT_S16_LE,
150 .channels = 1,
151};
152
153enum {
154 PRIM_MI2S = 0,
155 SEC_MI2S,
156 TERT_MI2S,
157 QUAT_MI2S,
158 MI2S_MAX,
159};
160
161enum {
162 PRIM_AUX_PCM = 0,
163 SEC_AUX_PCM,
164 TERT_AUX_PCM,
165 QUAT_AUX_PCM,
166 AUX_PCM_MAX,
167};
168
169enum {
170 PCM_I2S_SEL_PRIM = 0,
171 PCM_I2S_SEL_SEC,
172 PCM_I2S_SEL_TERT,
173 PCM_I2S_SEL_QUAT,
174 PCM_I2S_SEL_MAX,
175};
176
177struct mi2s_conf {
178 struct mutex lock;
179 u32 ref_cnt;
180 u32 msm_is_mi2s_master;
181 u32 msm_is_ext_mclk;
182};
183
184static u32 mi2s_ebit_clk[MI2S_MAX] = {
185 Q6AFE_LPASS_CLK_ID_PRI_MI2S_EBIT,
186 Q6AFE_LPASS_CLK_ID_SEC_MI2S_EBIT,
187 Q6AFE_LPASS_CLK_ID_TER_MI2S_EBIT,
188 Q6AFE_LPASS_CLK_ID_QUAD_MI2S_EBIT
189};
190
191struct msm_wsa881x_dev_info {
192 struct device_node *of_node;
193 u32 index;
194};
195static struct snd_soc_aux_dev *msm_aux_dev;
196static struct snd_soc_codec_conf *msm_codec_conf;
197
Asish Bhattacharya84f7f732017-07-25 16:29:27 +0530198static bool msm_swap_gnd_mic(struct snd_soc_codec *codec, bool active);
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +0530199
200static struct wcd_mbhc_config mbhc_cfg = {
201 .read_fw_bin = false,
202 .calibration = NULL,
203 .detect_extn_cable = true,
204 .mono_stero_detection = false,
205 .swap_gnd_mic = NULL,
206 .hs_ext_micbias = true,
207 .key_code[0] = KEY_MEDIA,
208 .key_code[1] = KEY_VOICECOMMAND,
209 .key_code[2] = KEY_VOLUMEUP,
210 .key_code[3] = KEY_VOLUMEDOWN,
211 .key_code[4] = 0,
212 .key_code[5] = 0,
213 .key_code[6] = 0,
214 .key_code[7] = 0,
215 .linein_th = 5000,
216 .moisture_en = false,
217 .mbhc_micbias = 0,
218 .anc_micbias = 0,
219 .enable_anc_mic_detect = false,
220};
221
222static struct dev_config proxy_rx_cfg = {
223 .sample_rate = SAMPLING_RATE_48KHZ,
224 .bit_format = SNDRV_PCM_FORMAT_S16_LE,
225 .channels = 2,
226};
227
228/* Default configuration of MI2S channels */
229static struct dev_config mi2s_rx_cfg[] = {
230 [PRIM_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
231 [SEC_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
232 [TERT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
233 [QUAT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
234};
235
236static struct dev_config mi2s_tx_cfg[] = {
237 [PRIM_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
238 [SEC_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
239 [TERT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
240 [QUAT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
241};
242
243static struct dev_config aux_pcm_rx_cfg[] = {
244 [PRIM_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
245 [SEC_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
246 [TERT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
247 [QUAT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
248};
249
250static struct dev_config aux_pcm_tx_cfg[] = {
251 [PRIM_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
252 [SEC_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
253 [TERT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
254 [QUAT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
255};
256
257static char const *ch_text[] = {"Two", "Three", "Four", "Five",
258 "Six", "Seven", "Eight"};
259static const char *const auxpcm_rate_text[] = {"KHZ_8", "KHZ_16"};
260static char const *mi2s_rate_text[] = {"KHZ_8", "KHZ_16",
261 "KHZ_32", "KHZ_44P1", "KHZ_48",
262 "KHZ_96", "KHZ_192"};
263static const char *const mi2s_ch_text[] = {"One", "Two", "Three", "Four",
264 "Five", "Six", "Seven",
265 "Eight"};
266static char const *bit_format_text[] = {"S16_LE", "S24_LE", "S24_3LE",
267 "S32_LE"};
268static char const *mi2s_format_text[] = {"S16_LE", "S24_LE", "S24_3LE",
269 "S32_LE"};
270static char const *tdm_ch_text[] = {"One", "Two", "Three", "Four",
271 "Five", "Six", "Seven", "Eight"};
272static char const *tdm_bit_format_text[] = {"S16_LE", "S24_LE", "S32_LE"};
273static char const *tdm_sample_rate_text[] = {"KHZ_8", "KHZ_16", "KHZ_32",
274 "KHZ_44P1", "KHZ_48", "KHZ_96",
275 "KHZ_192", "KHZ_352P8", "KHZ_384"};
276static const char *const usb_ch_text[] = {"One", "Two", "Three", "Four",
277 "Five", "Six", "Seven",
278 "Eight"};
279static char const *usb_sample_rate_text[] = {"KHZ_8", "KHZ_11P025",
280 "KHZ_16", "KHZ_22P05",
281 "KHZ_32", "KHZ_44P1", "KHZ_48",
282 "KHZ_96", "KHZ_192", "KHZ_384"};
283static char const *ext_disp_bit_format_text[] = {"S16_LE", "S24_LE"};
284static char const *ext_disp_sample_rate_text[] = {"KHZ_48", "KHZ_96",
285 "KHZ_192"};
286
287static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_chs, ch_text);
288static SOC_ENUM_SINGLE_EXT_DECL(proxy_rx_chs, ch_text);
289static SOC_ENUM_SINGLE_EXT_DECL(prim_aux_pcm_rx_sample_rate, auxpcm_rate_text);
290static SOC_ENUM_SINGLE_EXT_DECL(sec_aux_pcm_rx_sample_rate, auxpcm_rate_text);
291static SOC_ENUM_SINGLE_EXT_DECL(tert_aux_pcm_rx_sample_rate, auxpcm_rate_text);
292static SOC_ENUM_SINGLE_EXT_DECL(quat_aux_pcm_rx_sample_rate, auxpcm_rate_text);
293static SOC_ENUM_SINGLE_EXT_DECL(prim_aux_pcm_tx_sample_rate, auxpcm_rate_text);
294static SOC_ENUM_SINGLE_EXT_DECL(sec_aux_pcm_tx_sample_rate, auxpcm_rate_text);
295static SOC_ENUM_SINGLE_EXT_DECL(tert_aux_pcm_tx_sample_rate, auxpcm_rate_text);
296static SOC_ENUM_SINGLE_EXT_DECL(quat_aux_pcm_tx_sample_rate, auxpcm_rate_text);
297static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_rx_sample_rate, mi2s_rate_text);
298static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_rx_sample_rate, mi2s_rate_text);
299static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_rx_sample_rate, mi2s_rate_text);
300static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_rx_sample_rate, mi2s_rate_text);
301static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_tx_sample_rate, mi2s_rate_text);
302static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_tx_sample_rate, mi2s_rate_text);
303static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_tx_sample_rate, mi2s_rate_text);
304static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_tx_sample_rate, mi2s_rate_text);
305static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_rx_format, mi2s_format_text);
306static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_rx_format, mi2s_format_text);
307static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_rx_format, mi2s_format_text);
308static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_rx_format, mi2s_format_text);
309static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_tx_format, mi2s_format_text);
310static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_tx_format, mi2s_format_text);
311static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_tx_format, mi2s_format_text);
312static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_tx_format, mi2s_format_text);
313static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_rx_chs, mi2s_ch_text);
314static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_tx_chs, mi2s_ch_text);
315static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_rx_chs, mi2s_ch_text);
316static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_tx_chs, mi2s_ch_text);
317static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_rx_chs, mi2s_ch_text);
318static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_tx_chs, mi2s_ch_text);
319static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_rx_chs, mi2s_ch_text);
320static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_tx_chs, mi2s_ch_text);
321static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_chs, usb_ch_text);
322static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_chs, usb_ch_text);
323static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_format, bit_format_text);
324static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_format, bit_format_text);
325static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_format, ext_disp_bit_format_text);
326static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_sample_rate, usb_sample_rate_text);
327static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_sample_rate, usb_sample_rate_text);
328static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_sample_rate,
329 ext_disp_sample_rate_text);
330static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_chs, tdm_ch_text);
331static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_format, tdm_bit_format_text);
332static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_sample_rate, tdm_sample_rate_text);
333static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_chs, tdm_ch_text);
334static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_format, tdm_bit_format_text);
335static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_sample_rate, tdm_sample_rate_text);
336
337static struct afe_clk_set mi2s_clk[MI2S_MAX] = {
338 {
339 AFE_API_VERSION_I2S_CONFIG,
340 Q6AFE_LPASS_CLK_ID_PRI_MI2S_IBIT,
341 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
342 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
343 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
344 0,
345 },
346 {
347 AFE_API_VERSION_I2S_CONFIG,
348 Q6AFE_LPASS_CLK_ID_SEC_MI2S_IBIT,
349 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
350 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
351 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
352 0,
353 },
354 {
355 AFE_API_VERSION_I2S_CONFIG,
356 Q6AFE_LPASS_CLK_ID_TER_MI2S_IBIT,
357 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
358 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
359 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
360 0,
361 },
362 {
363 AFE_API_VERSION_I2S_CONFIG,
364 Q6AFE_LPASS_CLK_ID_QUAD_MI2S_IBIT,
365 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
366 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
367 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
368 0,
369 }
370};
371
372static struct afe_clk_set mi2s_mclk[MI2S_MAX] = {
373 {
374 AFE_API_VERSION_I2S_CONFIG,
375 Q6AFE_LPASS_CLK_ID_MCLK_3,
376 Q6AFE_LPASS_OSR_CLK_9_P600_MHZ,
377 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
378 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
379 0,
380 },
381 {
382 AFE_API_VERSION_I2S_CONFIG,
383 Q6AFE_LPASS_CLK_ID_MCLK_4,
384 Q6AFE_LPASS_OSR_CLK_9_P600_MHZ,
385 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
386 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
387 0,
388 },
389 {
390 AFE_API_VERSION_I2S_CONFIG,
391 Q6AFE_LPASS_CLK_ID_MCLK_1,
392 Q6AFE_LPASS_OSR_CLK_9_P600_MHZ,
393 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
394 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
395 0,
396 },
397 {
398 AFE_API_VERSION_I2S_CONFIG,
399 Q6AFE_LPASS_CLK_ID_MCLK_2,
400 Q6AFE_LPASS_OSR_CLK_9_P600_MHZ,
401 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
402 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
403 0,
404 }
405};
406
407static struct mi2s_conf mi2s_intf_conf[MI2S_MAX];
408
409static int proxy_rx_ch_get(struct snd_kcontrol *kcontrol,
410 struct snd_ctl_elem_value *ucontrol)
411{
412 pr_debug("%s: proxy_rx channels = %d\n",
413 __func__, proxy_rx_cfg.channels);
414 ucontrol->value.integer.value[0] = proxy_rx_cfg.channels - 2;
415
416 return 0;
417}
418
419static int proxy_rx_ch_put(struct snd_kcontrol *kcontrol,
420 struct snd_ctl_elem_value *ucontrol)
421{
422 proxy_rx_cfg.channels = ucontrol->value.integer.value[0] + 2;
423 pr_debug("%s: proxy_rx channels = %d\n",
424 __func__, proxy_rx_cfg.channels);
425
426 return 1;
427}
428
429static int tdm_get_sample_rate(int value)
430{
431 int sample_rate = 0;
432
433 switch (value) {
434 case 0:
435 sample_rate = SAMPLING_RATE_8KHZ;
436 break;
437 case 1:
438 sample_rate = SAMPLING_RATE_16KHZ;
439 break;
440 case 2:
441 sample_rate = SAMPLING_RATE_32KHZ;
442 break;
443 case 3:
444 sample_rate = SAMPLING_RATE_44P1KHZ;
445 break;
446 case 4:
447 sample_rate = SAMPLING_RATE_48KHZ;
448 break;
449 case 5:
450 sample_rate = SAMPLING_RATE_96KHZ;
451 break;
452 case 6:
453 sample_rate = SAMPLING_RATE_192KHZ;
454 break;
455 case 7:
456 sample_rate = SAMPLING_RATE_352P8KHZ;
457 break;
458 case 8:
459 sample_rate = SAMPLING_RATE_384KHZ;
460 break;
461 default:
462 sample_rate = SAMPLING_RATE_48KHZ;
463 break;
464 }
465 return sample_rate;
466}
467
468static int tdm_get_sample_rate_val(int sample_rate)
469{
470 int sample_rate_val = 0;
471
472 switch (sample_rate) {
473 case SAMPLING_RATE_8KHZ:
474 sample_rate_val = 0;
475 break;
476 case SAMPLING_RATE_16KHZ:
477 sample_rate_val = 1;
478 break;
479 case SAMPLING_RATE_32KHZ:
480 sample_rate_val = 2;
481 break;
482 case SAMPLING_RATE_44P1KHZ:
483 sample_rate_val = 3;
484 break;
485 case SAMPLING_RATE_48KHZ:
486 sample_rate_val = 4;
487 break;
488 case SAMPLING_RATE_96KHZ:
489 sample_rate_val = 5;
490 break;
491 case SAMPLING_RATE_192KHZ:
492 sample_rate_val = 6;
493 break;
494 case SAMPLING_RATE_352P8KHZ:
495 sample_rate_val = 7;
496 break;
497 case SAMPLING_RATE_384KHZ:
498 sample_rate_val = 8;
499 break;
500 default:
501 sample_rate_val = 4;
502 break;
503 }
504 return sample_rate_val;
505}
506
507static int tdm_get_port_idx(struct snd_kcontrol *kcontrol,
508 struct tdm_port *port)
509{
510 if (port) {
511 if (strnstr(kcontrol->id.name, "PRI",
512 sizeof(kcontrol->id.name))) {
513 port->mode = TDM_PRI;
514 } else if (strnstr(kcontrol->id.name, "SEC",
515 sizeof(kcontrol->id.name))) {
516 port->mode = TDM_SEC;
517 } else if (strnstr(kcontrol->id.name, "TERT",
518 sizeof(kcontrol->id.name))) {
519 port->mode = TDM_TERT;
520 } else if (strnstr(kcontrol->id.name, "QUAT",
521 sizeof(kcontrol->id.name))) {
522 port->mode = TDM_QUAT;
523 } else {
524 pr_err("%s: unsupported mode in: %s",
525 __func__, kcontrol->id.name);
526 return -EINVAL;
527 }
528
529 if (strnstr(kcontrol->id.name, "RX_0",
530 sizeof(kcontrol->id.name)) ||
531 strnstr(kcontrol->id.name, "TX_0",
532 sizeof(kcontrol->id.name))) {
533 port->channel = TDM_0;
534 } else if (strnstr(kcontrol->id.name, "RX_1",
535 sizeof(kcontrol->id.name)) ||
536 strnstr(kcontrol->id.name, "TX_1",
537 sizeof(kcontrol->id.name))) {
538 port->channel = TDM_1;
539 } else if (strnstr(kcontrol->id.name, "RX_2",
540 sizeof(kcontrol->id.name)) ||
541 strnstr(kcontrol->id.name, "TX_2",
542 sizeof(kcontrol->id.name))) {
543 port->channel = TDM_2;
544 } else if (strnstr(kcontrol->id.name, "RX_3",
545 sizeof(kcontrol->id.name)) ||
546 strnstr(kcontrol->id.name, "TX_3",
547 sizeof(kcontrol->id.name))) {
548 port->channel = TDM_3;
549 } else if (strnstr(kcontrol->id.name, "RX_4",
550 sizeof(kcontrol->id.name)) ||
551 strnstr(kcontrol->id.name, "TX_4",
552 sizeof(kcontrol->id.name))) {
553 port->channel = TDM_4;
554 } else if (strnstr(kcontrol->id.name, "RX_5",
555 sizeof(kcontrol->id.name)) ||
556 strnstr(kcontrol->id.name, "TX_5",
557 sizeof(kcontrol->id.name))) {
558 port->channel = TDM_5;
559 } else if (strnstr(kcontrol->id.name, "RX_6",
560 sizeof(kcontrol->id.name)) ||
561 strnstr(kcontrol->id.name, "TX_6",
562 sizeof(kcontrol->id.name))) {
563 port->channel = TDM_6;
564 } else if (strnstr(kcontrol->id.name, "RX_7",
565 sizeof(kcontrol->id.name)) ||
566 strnstr(kcontrol->id.name, "TX_7",
567 sizeof(kcontrol->id.name))) {
568 port->channel = TDM_7;
569 } else {
570 pr_err("%s: unsupported channel in: %s",
571 __func__, kcontrol->id.name);
572 return -EINVAL;
573 }
574 } else
575 return -EINVAL;
576 return 0;
577}
578
579static int tdm_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
580 struct snd_ctl_elem_value *ucontrol)
581{
582 struct tdm_port port;
583 int ret = tdm_get_port_idx(kcontrol, &port);
584
585 if (ret) {
586 pr_err("%s: unsupported control: %s",
587 __func__, kcontrol->id.name);
588 } else {
589 ucontrol->value.enumerated.item[0] = tdm_get_sample_rate_val(
590 tdm_rx_cfg[port.mode][port.channel].sample_rate);
591
592 pr_debug("%s: tdm_rx_sample_rate = %d, item = %d\n", __func__,
593 tdm_rx_cfg[port.mode][port.channel].sample_rate,
594 ucontrol->value.enumerated.item[0]);
595 }
596 return ret;
597}
598
599static int tdm_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
600 struct snd_ctl_elem_value *ucontrol)
601{
602 struct tdm_port port;
603 int ret = tdm_get_port_idx(kcontrol, &port);
604
605 if (ret) {
606 pr_err("%s: unsupported control: %s",
607 __func__, kcontrol->id.name);
608 } else {
609 tdm_rx_cfg[port.mode][port.channel].sample_rate =
610 tdm_get_sample_rate(ucontrol->value.enumerated.item[0]);
611
612 pr_debug("%s: tdm_rx_sample_rate = %d, item = %d\n", __func__,
613 tdm_rx_cfg[port.mode][port.channel].sample_rate,
614 ucontrol->value.enumerated.item[0]);
615 }
616 return ret;
617}
618
619static int tdm_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
620 struct snd_ctl_elem_value *ucontrol)
621{
622 struct tdm_port port;
623 int ret = tdm_get_port_idx(kcontrol, &port);
624
625 if (ret) {
626 pr_err("%s: unsupported control: %s",
627 __func__, kcontrol->id.name);
628 } else {
629 ucontrol->value.enumerated.item[0] = tdm_get_sample_rate_val(
630 tdm_tx_cfg[port.mode][port.channel].sample_rate);
631
632 pr_debug("%s: tdm_tx_sample_rate = %d, item = %d\n", __func__,
633 tdm_tx_cfg[port.mode][port.channel].sample_rate,
634 ucontrol->value.enumerated.item[0]);
635 }
636 return ret;
637}
638
639static int tdm_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
640 struct snd_ctl_elem_value *ucontrol)
641{
642 struct tdm_port port;
643 int ret = tdm_get_port_idx(kcontrol, &port);
644
645 if (ret) {
646 pr_err("%s: unsupported control: %s",
647 __func__, kcontrol->id.name);
648 } else {
649 tdm_tx_cfg[port.mode][port.channel].sample_rate =
650 tdm_get_sample_rate(ucontrol->value.enumerated.item[0]);
651
652 pr_debug("%s: tdm_tx_sample_rate = %d, item = %d\n", __func__,
653 tdm_tx_cfg[port.mode][port.channel].sample_rate,
654 ucontrol->value.enumerated.item[0]);
655 }
656 return ret;
657}
658
659static int tdm_get_format(int value)
660{
661 int format = 0;
662
663 switch (value) {
664 case 0:
665 format = SNDRV_PCM_FORMAT_S16_LE;
666 break;
667 case 1:
668 format = SNDRV_PCM_FORMAT_S24_LE;
669 break;
670 case 2:
671 format = SNDRV_PCM_FORMAT_S32_LE;
672 break;
673 default:
674 format = SNDRV_PCM_FORMAT_S16_LE;
675 break;
676 }
677 return format;
678}
679
680static int tdm_get_format_val(int format)
681{
682 int value = 0;
683
684 switch (format) {
685 case SNDRV_PCM_FORMAT_S16_LE:
686 value = 0;
687 break;
688 case SNDRV_PCM_FORMAT_S24_LE:
689 value = 1;
690 break;
691 case SNDRV_PCM_FORMAT_S32_LE:
692 value = 2;
693 break;
694 default:
695 value = 0;
696 break;
697 }
698 return value;
699}
700
701static int mi2s_get_format(int value)
702{
703 int format = 0;
704
705 switch (value) {
706 case 0:
707 format = SNDRV_PCM_FORMAT_S16_LE;
708 break;
709 case 1:
710 format = SNDRV_PCM_FORMAT_S24_LE;
711 break;
712 case 2:
713 format = SNDRV_PCM_FORMAT_S24_3LE;
714 break;
715 case 3:
716 format = SNDRV_PCM_FORMAT_S32_LE;
717 break;
718 default:
719 format = SNDRV_PCM_FORMAT_S16_LE;
720 break;
721 }
722 return format;
723}
724
725static int mi2s_get_format_value(int format)
726{
727 int value = 0;
728
729 switch (format) {
730 case SNDRV_PCM_FORMAT_S16_LE:
731 value = 0;
732 break;
733 case SNDRV_PCM_FORMAT_S24_LE:
734 value = 1;
735 break;
736 case SNDRV_PCM_FORMAT_S24_3LE:
737 value = 2;
738 break;
739 case SNDRV_PCM_FORMAT_S32_LE:
740 value = 3;
741 break;
742 default:
743 value = 0;
744 break;
745 }
746 return value;
747}
748
749static int tdm_rx_format_get(struct snd_kcontrol *kcontrol,
750 struct snd_ctl_elem_value *ucontrol)
751{
752 struct tdm_port port;
753 int ret = tdm_get_port_idx(kcontrol, &port);
754
755 if (ret) {
756 pr_err("%s: unsupported control: %s",
757 __func__, kcontrol->id.name);
758 } else {
759 ucontrol->value.enumerated.item[0] = tdm_get_format_val(
760 tdm_rx_cfg[port.mode][port.channel].bit_format);
761
762 pr_debug("%s: tdm_rx_bit_format = %d, item = %d\n", __func__,
763 tdm_rx_cfg[port.mode][port.channel].bit_format,
764 ucontrol->value.enumerated.item[0]);
765 }
766 return ret;
767}
768
769static int tdm_rx_format_put(struct snd_kcontrol *kcontrol,
770 struct snd_ctl_elem_value *ucontrol)
771{
772 struct tdm_port port;
773 int ret = tdm_get_port_idx(kcontrol, &port);
774
775 if (ret) {
776 pr_err("%s: unsupported control: %s",
777 __func__, kcontrol->id.name);
778 } else {
779 tdm_rx_cfg[port.mode][port.channel].bit_format =
780 tdm_get_format(ucontrol->value.enumerated.item[0]);
781
782 pr_debug("%s: tdm_rx_bit_format = %d, item = %d\n", __func__,
783 tdm_rx_cfg[port.mode][port.channel].bit_format,
784 ucontrol->value.enumerated.item[0]);
785 }
786 return ret;
787}
788
789static int tdm_tx_format_get(struct snd_kcontrol *kcontrol,
790 struct snd_ctl_elem_value *ucontrol)
791{
792 struct tdm_port port;
793 int ret = tdm_get_port_idx(kcontrol, &port);
794
795 if (ret) {
796 pr_err("%s: unsupported control: %s",
797 __func__, kcontrol->id.name);
798 } else {
799 ucontrol->value.enumerated.item[0] = tdm_get_format_val(
800 tdm_tx_cfg[port.mode][port.channel].bit_format);
801
802 pr_debug("%s: tdm_tx_bit_format = %d, item = %d\n", __func__,
803 tdm_tx_cfg[port.mode][port.channel].bit_format,
804 ucontrol->value.enumerated.item[0]);
805 }
806 return ret;
807}
808
809static int tdm_tx_format_put(struct snd_kcontrol *kcontrol,
810 struct snd_ctl_elem_value *ucontrol)
811{
812 struct tdm_port port;
813 int ret = tdm_get_port_idx(kcontrol, &port);
814
815 if (ret) {
816 pr_err("%s: unsupported control: %s",
817 __func__, kcontrol->id.name);
818 } else {
819 tdm_tx_cfg[port.mode][port.channel].bit_format =
820 tdm_get_format(ucontrol->value.enumerated.item[0]);
821
822 pr_debug("%s: tdm_tx_bit_format = %d, item = %d\n", __func__,
823 tdm_tx_cfg[port.mode][port.channel].bit_format,
824 ucontrol->value.enumerated.item[0]);
825 }
826 return ret;
827}
828
829static int tdm_rx_ch_get(struct snd_kcontrol *kcontrol,
830 struct snd_ctl_elem_value *ucontrol)
831{
832 struct tdm_port port;
833 int ret = tdm_get_port_idx(kcontrol, &port);
834
835 if (ret) {
836 pr_err("%s: unsupported control: %s",
837 __func__, kcontrol->id.name);
838 } else {
839
840 ucontrol->value.enumerated.item[0] =
841 tdm_rx_cfg[port.mode][port.channel].channels - 1;
842
843 pr_debug("%s: tdm_rx_ch = %d, item = %d\n", __func__,
844 tdm_rx_cfg[port.mode][port.channel].channels - 1,
845 ucontrol->value.enumerated.item[0]);
846 }
847 return ret;
848}
849
850static int tdm_rx_ch_put(struct snd_kcontrol *kcontrol,
851 struct snd_ctl_elem_value *ucontrol)
852{
853 struct tdm_port port;
854 int ret = tdm_get_port_idx(kcontrol, &port);
855
856 if (ret) {
857 pr_err("%s: unsupported control: %s",
858 __func__, kcontrol->id.name);
859 } else {
860 tdm_rx_cfg[port.mode][port.channel].channels =
861 ucontrol->value.enumerated.item[0] + 1;
862
863 pr_debug("%s: tdm_rx_ch = %d, item = %d\n", __func__,
864 tdm_rx_cfg[port.mode][port.channel].channels,
865 ucontrol->value.enumerated.item[0] + 1);
866 }
867 return ret;
868}
869
870static int tdm_tx_ch_get(struct snd_kcontrol *kcontrol,
871 struct snd_ctl_elem_value *ucontrol)
872{
873 struct tdm_port port;
874 int ret = tdm_get_port_idx(kcontrol, &port);
875
876 if (ret) {
877 pr_err("%s: unsupported control: %s",
878 __func__, kcontrol->id.name);
879 } else {
880 ucontrol->value.enumerated.item[0] =
881 tdm_tx_cfg[port.mode][port.channel].channels - 1;
882
883 pr_debug("%s: tdm_tx_ch = %d, item = %d\n", __func__,
884 tdm_tx_cfg[port.mode][port.channel].channels - 1,
885 ucontrol->value.enumerated.item[0]);
886 }
887 return ret;
888}
889
890static int tdm_tx_ch_put(struct snd_kcontrol *kcontrol,
891 struct snd_ctl_elem_value *ucontrol)
892{
893 struct tdm_port port;
894 int ret = tdm_get_port_idx(kcontrol, &port);
895
896 if (ret) {
897 pr_err("%s: unsupported control: %s",
898 __func__, kcontrol->id.name);
899 } else {
900 tdm_tx_cfg[port.mode][port.channel].channels =
901 ucontrol->value.enumerated.item[0] + 1;
902
903 pr_debug("%s: tdm_tx_ch = %d, item = %d\n", __func__,
904 tdm_tx_cfg[port.mode][port.channel].channels,
905 ucontrol->value.enumerated.item[0] + 1);
906 }
907 return ret;
908}
909
910static int aux_pcm_get_sample_rate(int value)
911{
912 int sample_rate;
913
914 switch (value) {
915 case 1:
916 sample_rate = SAMPLING_RATE_16KHZ;
917 break;
918 case 0:
919 default:
920 sample_rate = SAMPLING_RATE_8KHZ;
921 break;
922 }
923 return sample_rate;
924}
925
926static int aux_pcm_get_sample_rate_val(int sample_rate)
927{
928 int sample_rate_val;
929
930 switch (sample_rate) {
931 case SAMPLING_RATE_16KHZ:
932 sample_rate_val = 1;
933 break;
934 case SAMPLING_RATE_8KHZ:
935 default:
936 sample_rate_val = 0;
937 break;
938 }
939 return sample_rate_val;
940}
941
942static int aux_pcm_get_port_idx(struct snd_kcontrol *kcontrol)
943{
944 int idx;
945
946 if (strnstr(kcontrol->id.name, "PRIM_AUX_PCM",
947 sizeof("PRIM_AUX_PCM")))
948 idx = PRIM_AUX_PCM;
949 else if (strnstr(kcontrol->id.name, "SEC_AUX_PCM",
950 sizeof("SEC_AUX_PCM")))
951 idx = SEC_AUX_PCM;
952 else if (strnstr(kcontrol->id.name, "TERT_AUX_PCM",
953 sizeof("TERT_AUX_PCM")))
954 idx = TERT_AUX_PCM;
955 else if (strnstr(kcontrol->id.name, "QUAT_AUX_PCM",
956 sizeof("QUAT_AUX_PCM")))
957 idx = QUAT_AUX_PCM;
958 else {
959 pr_err("%s: unsupported port: %s",
960 __func__, kcontrol->id.name);
961 idx = -EINVAL;
962 }
963
964 return idx;
965}
966
967static int aux_pcm_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
968 struct snd_ctl_elem_value *ucontrol)
969{
970 int idx = aux_pcm_get_port_idx(kcontrol);
971
972 if (idx < 0)
973 return idx;
974
975 aux_pcm_rx_cfg[idx].sample_rate =
976 aux_pcm_get_sample_rate(ucontrol->value.enumerated.item[0]);
977
978 pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
979 idx, aux_pcm_rx_cfg[idx].sample_rate,
980 ucontrol->value.enumerated.item[0]);
981
982 return 0;
983}
984
985static int aux_pcm_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
986 struct snd_ctl_elem_value *ucontrol)
987{
988 int idx = aux_pcm_get_port_idx(kcontrol);
989
990 if (idx < 0)
991 return idx;
992
993 ucontrol->value.enumerated.item[0] =
994 aux_pcm_get_sample_rate_val(aux_pcm_rx_cfg[idx].sample_rate);
995
996 pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
997 idx, aux_pcm_rx_cfg[idx].sample_rate,
998 ucontrol->value.enumerated.item[0]);
999
1000 return 0;
1001}
1002
1003static int aux_pcm_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
1004 struct snd_ctl_elem_value *ucontrol)
1005{
1006 int idx = aux_pcm_get_port_idx(kcontrol);
1007
1008 if (idx < 0)
1009 return idx;
1010
1011 aux_pcm_tx_cfg[idx].sample_rate =
1012 aux_pcm_get_sample_rate(ucontrol->value.enumerated.item[0]);
1013
1014 pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
1015 idx, aux_pcm_tx_cfg[idx].sample_rate,
1016 ucontrol->value.enumerated.item[0]);
1017
1018 return 0;
1019}
1020
1021static int aux_pcm_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
1022 struct snd_ctl_elem_value *ucontrol)
1023{
1024 int idx = aux_pcm_get_port_idx(kcontrol);
1025
1026 if (idx < 0)
1027 return idx;
1028
1029 ucontrol->value.enumerated.item[0] =
1030 aux_pcm_get_sample_rate_val(aux_pcm_tx_cfg[idx].sample_rate);
1031
1032 pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
1033 idx, aux_pcm_tx_cfg[idx].sample_rate,
1034 ucontrol->value.enumerated.item[0]);
1035
1036 return 0;
1037}
1038
1039static int mi2s_get_port_idx(struct snd_kcontrol *kcontrol)
1040{
1041 int idx;
1042
1043 if (strnstr(kcontrol->id.name, "PRIM_MI2S_RX",
1044 sizeof("PRIM_MI2S_RX")))
1045 idx = PRIM_MI2S;
1046 else if (strnstr(kcontrol->id.name, "SEC_MI2S_RX",
1047 sizeof("SEC_MI2S_RX")))
1048 idx = SEC_MI2S;
1049 else if (strnstr(kcontrol->id.name, "TERT_MI2S_RX",
1050 sizeof("TERT_MI2S_RX")))
1051 idx = TERT_MI2S;
1052 else if (strnstr(kcontrol->id.name, "QUAT_MI2S_RX",
1053 sizeof("QUAT_MI2S_RX")))
1054 idx = QUAT_MI2S;
1055 else if (strnstr(kcontrol->id.name, "PRIM_MI2S_TX",
1056 sizeof("PRIM_MI2S_TX")))
1057 idx = PRIM_MI2S;
1058 else if (strnstr(kcontrol->id.name, "SEC_MI2S_TX",
1059 sizeof("SEC_MI2S_TX")))
1060 idx = SEC_MI2S;
1061 else if (strnstr(kcontrol->id.name, "TERT_MI2S_TX",
1062 sizeof("TERT_MI2S_TX")))
1063 idx = TERT_MI2S;
1064 else if (strnstr(kcontrol->id.name, "QUAT_MI2S_TX",
1065 sizeof("QUAT_MI2S_TX")))
1066 idx = QUAT_MI2S;
1067 else {
1068 pr_err("%s: unsupported channel: %s",
1069 __func__, kcontrol->id.name);
1070 idx = -EINVAL;
1071 }
1072
1073 return idx;
1074}
1075
1076static int mi2s_get_sample_rate_val(int sample_rate)
1077{
1078 int sample_rate_val;
1079
1080 switch (sample_rate) {
1081 case SAMPLING_RATE_8KHZ:
1082 sample_rate_val = 0;
1083 break;
1084 case SAMPLING_RATE_16KHZ:
1085 sample_rate_val = 1;
1086 break;
1087 case SAMPLING_RATE_32KHZ:
1088 sample_rate_val = 2;
1089 break;
1090 case SAMPLING_RATE_44P1KHZ:
1091 sample_rate_val = 3;
1092 break;
1093 case SAMPLING_RATE_48KHZ:
1094 sample_rate_val = 4;
1095 break;
1096 case SAMPLING_RATE_96KHZ:
1097 sample_rate_val = 5;
1098 break;
1099 case SAMPLING_RATE_192KHZ:
1100 sample_rate_val = 6;
1101 break;
1102 default:
1103 sample_rate_val = 4;
1104 break;
1105 }
1106 return sample_rate_val;
1107}
1108
1109static int mi2s_get_sample_rate(int value)
1110{
1111 int sample_rate;
1112
1113 switch (value) {
1114 case 0:
1115 sample_rate = SAMPLING_RATE_8KHZ;
1116 break;
1117 case 1:
1118 sample_rate = SAMPLING_RATE_16KHZ;
1119 break;
1120 case 2:
1121 sample_rate = SAMPLING_RATE_32KHZ;
1122 break;
1123 case 3:
1124 sample_rate = SAMPLING_RATE_44P1KHZ;
1125 break;
1126 case 4:
1127 sample_rate = SAMPLING_RATE_48KHZ;
1128 break;
1129 case 5:
1130 sample_rate = SAMPLING_RATE_96KHZ;
1131 break;
1132 case 6:
1133 sample_rate = SAMPLING_RATE_192KHZ;
1134 break;
1135 default:
1136 sample_rate = SAMPLING_RATE_48KHZ;
1137 break;
1138 }
1139 return sample_rate;
1140}
1141
1142static int mi2s_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
1143 struct snd_ctl_elem_value *ucontrol)
1144{
1145 int idx = mi2s_get_port_idx(kcontrol);
1146
1147 if (idx < 0)
1148 return idx;
1149
1150 mi2s_rx_cfg[idx].sample_rate =
1151 mi2s_get_sample_rate(ucontrol->value.enumerated.item[0]);
1152
1153 pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
1154 idx, mi2s_rx_cfg[idx].sample_rate,
1155 ucontrol->value.enumerated.item[0]);
1156
1157 return 0;
1158}
1159
1160static int mi2s_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
1161 struct snd_ctl_elem_value *ucontrol)
1162{
1163 int idx = mi2s_get_port_idx(kcontrol);
1164
1165 if (idx < 0)
1166 return idx;
1167
1168 ucontrol->value.enumerated.item[0] =
1169 mi2s_get_sample_rate_val(mi2s_rx_cfg[idx].sample_rate);
1170
1171 pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
1172 idx, mi2s_rx_cfg[idx].sample_rate,
1173 ucontrol->value.enumerated.item[0]);
1174
1175 return 0;
1176}
1177
1178static int mi2s_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
1179 struct snd_ctl_elem_value *ucontrol)
1180{
1181 int idx = mi2s_get_port_idx(kcontrol);
1182
1183 if (idx < 0)
1184 return idx;
1185
1186 mi2s_tx_cfg[idx].sample_rate =
1187 mi2s_get_sample_rate(ucontrol->value.enumerated.item[0]);
1188
1189 pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
1190 idx, mi2s_tx_cfg[idx].sample_rate,
1191 ucontrol->value.enumerated.item[0]);
1192
1193 return 0;
1194}
1195
1196static int mi2s_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
1197 struct snd_ctl_elem_value *ucontrol)
1198{
1199 int idx = mi2s_get_port_idx(kcontrol);
1200
1201 if (idx < 0)
1202 return idx;
1203
1204 ucontrol->value.enumerated.item[0] =
1205 mi2s_get_sample_rate_val(mi2s_tx_cfg[idx].sample_rate);
1206
1207 pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
1208 idx, mi2s_tx_cfg[idx].sample_rate,
1209 ucontrol->value.enumerated.item[0]);
1210
1211 return 0;
1212}
1213
1214static int mi2s_tx_format_put(struct snd_kcontrol *kcontrol,
1215 struct snd_ctl_elem_value *ucontrol)
1216{
1217 int idx = mi2s_get_port_idx(kcontrol);
1218
1219 if (idx < 0)
1220 return idx;
1221
1222 mi2s_tx_cfg[idx].bit_format =
1223 mi2s_get_format(ucontrol->value.enumerated.item[0]);
1224
1225 pr_debug("%s: idx[%d] _tx_format = %d, item = %d\n", __func__,
1226 idx, mi2s_tx_cfg[idx].bit_format,
1227 ucontrol->value.enumerated.item[0]);
1228
1229 return 0;
1230}
1231
1232static int mi2s_tx_format_get(struct snd_kcontrol *kcontrol,
1233 struct snd_ctl_elem_value *ucontrol)
1234{
1235 int idx = mi2s_get_port_idx(kcontrol);
1236
1237 if (idx < 0)
1238 return idx;
1239
1240 ucontrol->value.enumerated.item[0] =
1241 mi2s_get_format_value(mi2s_tx_cfg[idx].bit_format);
1242
1243 pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
1244 idx, mi2s_tx_cfg[idx].bit_format,
1245 ucontrol->value.enumerated.item[0]);
1246
1247 return 0;
1248}
1249
1250static int mi2s_rx_format_put(struct snd_kcontrol *kcontrol,
1251 struct snd_ctl_elem_value *ucontrol)
1252{
1253 int idx = mi2s_get_port_idx(kcontrol);
1254
1255 if (idx < 0)
1256 return idx;
1257
1258 mi2s_rx_cfg[idx].bit_format =
1259 mi2s_get_format(ucontrol->value.enumerated.item[0]);
1260
1261 pr_debug("%s: idx[%d] _rx_format = %d, item = %d\n", __func__,
1262 idx, mi2s_rx_cfg[idx].bit_format,
1263 ucontrol->value.enumerated.item[0]);
1264
1265 return 0;
1266}
1267
1268static int mi2s_rx_format_get(struct snd_kcontrol *kcontrol,
1269 struct snd_ctl_elem_value *ucontrol)
1270{
1271 int idx = mi2s_get_port_idx(kcontrol);
1272
1273 if (idx < 0)
1274 return idx;
1275
1276 ucontrol->value.enumerated.item[0] =
1277 mi2s_get_format_value(mi2s_rx_cfg[idx].bit_format);
1278
1279 pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
1280 idx, mi2s_rx_cfg[idx].bit_format,
1281 ucontrol->value.enumerated.item[0]);
1282
1283 return 0;
1284}
1285
1286static int msm_mi2s_rx_ch_get(struct snd_kcontrol *kcontrol,
1287 struct snd_ctl_elem_value *ucontrol)
1288{
1289 int idx = mi2s_get_port_idx(kcontrol);
1290
1291 if (idx < 0)
1292 return idx;
1293
1294 pr_debug("%s: msm_mi2s_[%d]_rx_ch = %d\n", __func__,
1295 idx, mi2s_rx_cfg[idx].channels);
1296 ucontrol->value.enumerated.item[0] = mi2s_rx_cfg[idx].channels - 1;
1297
1298 return 0;
1299}
1300
1301static int msm_mi2s_rx_ch_put(struct snd_kcontrol *kcontrol,
1302 struct snd_ctl_elem_value *ucontrol)
1303{
1304 int idx = mi2s_get_port_idx(kcontrol);
1305
1306 if (idx < 0)
1307 return idx;
1308
1309 mi2s_rx_cfg[idx].channels = ucontrol->value.enumerated.item[0] + 1;
1310 pr_debug("%s: msm_mi2s_[%d]_rx_ch = %d\n", __func__,
1311 idx, mi2s_rx_cfg[idx].channels);
1312
1313 return 1;
1314}
1315
1316static int msm_mi2s_tx_ch_get(struct snd_kcontrol *kcontrol,
1317 struct snd_ctl_elem_value *ucontrol)
1318{
1319 int idx = mi2s_get_port_idx(kcontrol);
1320
1321 if (idx < 0)
1322 return idx;
1323
1324 pr_debug("%s: msm_mi2s_[%d]_tx_ch = %d\n", __func__,
1325 idx, mi2s_tx_cfg[idx].channels);
1326 ucontrol->value.enumerated.item[0] = mi2s_tx_cfg[idx].channels - 1;
1327
1328 return 0;
1329}
1330
1331static int msm_mi2s_tx_ch_put(struct snd_kcontrol *kcontrol,
1332 struct snd_ctl_elem_value *ucontrol)
1333{
1334 int idx = mi2s_get_port_idx(kcontrol);
1335
1336 if (idx < 0)
1337 return idx;
1338
1339 mi2s_tx_cfg[idx].channels = ucontrol->value.enumerated.item[0] + 1;
1340 pr_debug("%s: msm_mi2s_[%d]_tx_ch = %d\n", __func__,
1341 idx, mi2s_tx_cfg[idx].channels);
1342
1343 return 1;
1344}
1345
1346static int usb_audio_rx_ch_get(struct snd_kcontrol *kcontrol,
1347 struct snd_ctl_elem_value *ucontrol)
1348{
1349 pr_debug("%s: usb_audio_rx_ch = %d\n", __func__,
1350 usb_rx_cfg.channels);
1351 ucontrol->value.integer.value[0] = usb_rx_cfg.channels - 1;
1352 return 0;
1353}
1354
1355static int usb_audio_rx_ch_put(struct snd_kcontrol *kcontrol,
1356 struct snd_ctl_elem_value *ucontrol)
1357{
1358 usb_rx_cfg.channels = ucontrol->value.integer.value[0] + 1;
1359
1360 pr_debug("%s: usb_audio_rx_ch = %d\n", __func__, usb_rx_cfg.channels);
1361 return 1;
1362}
1363
1364static int usb_audio_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
1365 struct snd_ctl_elem_value *ucontrol)
1366{
1367 int sample_rate_val;
1368
1369 switch (usb_rx_cfg.sample_rate) {
1370 case SAMPLING_RATE_384KHZ:
1371 sample_rate_val = 9;
1372 break;
1373 case SAMPLING_RATE_192KHZ:
1374 sample_rate_val = 8;
1375 break;
1376 case SAMPLING_RATE_96KHZ:
1377 sample_rate_val = 7;
1378 break;
1379 case SAMPLING_RATE_48KHZ:
1380 sample_rate_val = 6;
1381 break;
1382 case SAMPLING_RATE_44P1KHZ:
1383 sample_rate_val = 5;
1384 break;
1385 case SAMPLING_RATE_32KHZ:
1386 sample_rate_val = 4;
1387 break;
1388 case SAMPLING_RATE_22P05KHZ:
1389 sample_rate_val = 3;
1390 break;
1391 case SAMPLING_RATE_16KHZ:
1392 sample_rate_val = 2;
1393 break;
1394 case SAMPLING_RATE_11P025KHZ:
1395 sample_rate_val = 1;
1396 break;
1397 case SAMPLING_RATE_8KHZ:
1398 default:
1399 sample_rate_val = 0;
1400 break;
1401 }
1402
1403 ucontrol->value.integer.value[0] = sample_rate_val;
1404 pr_debug("%s: usb_audio_rx_sample_rate = %d\n", __func__,
1405 usb_rx_cfg.sample_rate);
1406 return 0;
1407}
1408
1409static int usb_audio_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
1410 struct snd_ctl_elem_value *ucontrol)
1411{
1412 switch (ucontrol->value.integer.value[0]) {
1413 case 9:
1414 usb_rx_cfg.sample_rate = SAMPLING_RATE_384KHZ;
1415 break;
1416 case 8:
1417 usb_rx_cfg.sample_rate = SAMPLING_RATE_192KHZ;
1418 break;
1419 case 7:
1420 usb_rx_cfg.sample_rate = SAMPLING_RATE_96KHZ;
1421 break;
1422 case 6:
1423 usb_rx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
1424 break;
1425 case 5:
1426 usb_rx_cfg.sample_rate = SAMPLING_RATE_44P1KHZ;
1427 break;
1428 case 4:
1429 usb_rx_cfg.sample_rate = SAMPLING_RATE_32KHZ;
1430 break;
1431 case 3:
1432 usb_rx_cfg.sample_rate = SAMPLING_RATE_22P05KHZ;
1433 break;
1434 case 2:
1435 usb_rx_cfg.sample_rate = SAMPLING_RATE_16KHZ;
1436 break;
1437 case 1:
1438 usb_rx_cfg.sample_rate = SAMPLING_RATE_11P025KHZ;
1439 break;
1440 case 0:
1441 usb_rx_cfg.sample_rate = SAMPLING_RATE_8KHZ;
1442 break;
1443 default:
1444 usb_rx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
1445 break;
1446 }
1447
1448 pr_debug("%s: control value = %ld, usb_audio_rx_sample_rate = %d\n",
1449 __func__, ucontrol->value.integer.value[0],
1450 usb_rx_cfg.sample_rate);
1451 return 0;
1452}
1453
1454static int usb_audio_rx_format_get(struct snd_kcontrol *kcontrol,
1455 struct snd_ctl_elem_value *ucontrol)
1456{
1457 switch (usb_rx_cfg.bit_format) {
1458 case SNDRV_PCM_FORMAT_S32_LE:
1459 ucontrol->value.integer.value[0] = 3;
1460 break;
1461 case SNDRV_PCM_FORMAT_S24_3LE:
1462 ucontrol->value.integer.value[0] = 2;
1463 break;
1464 case SNDRV_PCM_FORMAT_S24_LE:
1465 ucontrol->value.integer.value[0] = 1;
1466 break;
1467 case SNDRV_PCM_FORMAT_S16_LE:
1468 default:
1469 ucontrol->value.integer.value[0] = 0;
1470 break;
1471 }
1472
1473 pr_debug("%s: usb_audio_rx_format = %d, ucontrol value = %ld\n",
1474 __func__, usb_rx_cfg.bit_format,
1475 ucontrol->value.integer.value[0]);
1476 return 0;
1477}
1478
1479static int usb_audio_rx_format_put(struct snd_kcontrol *kcontrol,
1480 struct snd_ctl_elem_value *ucontrol)
1481{
1482 int rc = 0;
1483
1484 switch (ucontrol->value.integer.value[0]) {
1485 case 3:
1486 usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S32_LE;
1487 break;
1488 case 2:
1489 usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_3LE;
1490 break;
1491 case 1:
1492 usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_LE;
1493 break;
1494 case 0:
1495 default:
1496 usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S16_LE;
1497 break;
1498 }
1499 pr_debug("%s: usb_audio_rx_format = %d, ucontrol value = %ld\n",
1500 __func__, usb_rx_cfg.bit_format,
1501 ucontrol->value.integer.value[0]);
1502
1503 return rc;
1504}
1505
1506static int usb_audio_tx_ch_get(struct snd_kcontrol *kcontrol,
1507 struct snd_ctl_elem_value *ucontrol)
1508{
1509 pr_debug("%s: usb_audio_tx_ch = %d\n", __func__,
1510 usb_tx_cfg.channels);
1511 ucontrol->value.integer.value[0] = usb_tx_cfg.channels - 1;
1512 return 0;
1513}
1514
1515static int usb_audio_tx_ch_put(struct snd_kcontrol *kcontrol,
1516 struct snd_ctl_elem_value *ucontrol)
1517{
1518 usb_tx_cfg.channels = ucontrol->value.integer.value[0] + 1;
1519
1520 pr_debug("%s: usb_audio_tx_ch = %d\n", __func__, usb_tx_cfg.channels);
1521 return 1;
1522}
1523
1524static int usb_audio_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
1525 struct snd_ctl_elem_value *ucontrol)
1526{
1527 int sample_rate_val;
1528
1529 switch (usb_tx_cfg.sample_rate) {
1530 case SAMPLING_RATE_384KHZ:
1531 sample_rate_val = 9;
1532 break;
1533 case SAMPLING_RATE_192KHZ:
1534 sample_rate_val = 8;
1535 break;
1536 case SAMPLING_RATE_96KHZ:
1537 sample_rate_val = 7;
1538 break;
1539 case SAMPLING_RATE_48KHZ:
1540 sample_rate_val = 6;
1541 break;
1542 case SAMPLING_RATE_44P1KHZ:
1543 sample_rate_val = 5;
1544 break;
1545 case SAMPLING_RATE_32KHZ:
1546 sample_rate_val = 4;
1547 break;
1548 case SAMPLING_RATE_22P05KHZ:
1549 sample_rate_val = 3;
1550 break;
1551 case SAMPLING_RATE_16KHZ:
1552 sample_rate_val = 2;
1553 break;
1554 case SAMPLING_RATE_11P025KHZ:
1555 sample_rate_val = 1;
1556 break;
1557 case SAMPLING_RATE_8KHZ:
1558 sample_rate_val = 0;
1559 break;
1560 default:
1561 sample_rate_val = 6;
1562 break;
1563 }
1564
1565 ucontrol->value.integer.value[0] = sample_rate_val;
1566 pr_debug("%s: usb_audio_tx_sample_rate = %d\n", __func__,
1567 usb_tx_cfg.sample_rate);
1568 return 0;
1569}
1570
1571static int usb_audio_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
1572 struct snd_ctl_elem_value *ucontrol)
1573{
1574 switch (ucontrol->value.integer.value[0]) {
1575 case 9:
1576 usb_tx_cfg.sample_rate = SAMPLING_RATE_384KHZ;
1577 break;
1578 case 8:
1579 usb_tx_cfg.sample_rate = SAMPLING_RATE_192KHZ;
1580 break;
1581 case 7:
1582 usb_tx_cfg.sample_rate = SAMPLING_RATE_96KHZ;
1583 break;
1584 case 6:
1585 usb_tx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
1586 break;
1587 case 5:
1588 usb_tx_cfg.sample_rate = SAMPLING_RATE_44P1KHZ;
1589 break;
1590 case 4:
1591 usb_tx_cfg.sample_rate = SAMPLING_RATE_32KHZ;
1592 break;
1593 case 3:
1594 usb_tx_cfg.sample_rate = SAMPLING_RATE_22P05KHZ;
1595 break;
1596 case 2:
1597 usb_tx_cfg.sample_rate = SAMPLING_RATE_16KHZ;
1598 break;
1599 case 1:
1600 usb_tx_cfg.sample_rate = SAMPLING_RATE_11P025KHZ;
1601 break;
1602 case 0:
1603 usb_tx_cfg.sample_rate = SAMPLING_RATE_8KHZ;
1604 break;
1605 default:
1606 usb_tx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
1607 break;
1608 }
1609
1610 pr_debug("%s: control value = %ld, usb_audio_tx_sample_rate = %d\n",
1611 __func__, ucontrol->value.integer.value[0],
1612 usb_tx_cfg.sample_rate);
1613 return 0;
1614}
1615
1616static int usb_audio_tx_format_get(struct snd_kcontrol *kcontrol,
1617 struct snd_ctl_elem_value *ucontrol)
1618{
1619 switch (usb_tx_cfg.bit_format) {
1620 case SNDRV_PCM_FORMAT_S32_LE:
1621 ucontrol->value.integer.value[0] = 3;
1622 break;
1623 case SNDRV_PCM_FORMAT_S24_3LE:
1624 ucontrol->value.integer.value[0] = 2;
1625 break;
1626 case SNDRV_PCM_FORMAT_S24_LE:
1627 ucontrol->value.integer.value[0] = 1;
1628 break;
1629 case SNDRV_PCM_FORMAT_S16_LE:
1630 default:
1631 ucontrol->value.integer.value[0] = 0;
1632 break;
1633 }
1634
1635 pr_debug("%s: usb_audio_tx_format = %d, ucontrol value = %ld\n",
1636 __func__, usb_tx_cfg.bit_format,
1637 ucontrol->value.integer.value[0]);
1638 return 0;
1639}
1640
1641static int usb_audio_tx_format_put(struct snd_kcontrol *kcontrol,
1642 struct snd_ctl_elem_value *ucontrol)
1643{
1644 int rc = 0;
1645
1646 switch (ucontrol->value.integer.value[0]) {
1647 case 3:
1648 usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S32_LE;
1649 break;
1650 case 2:
1651 usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_3LE;
1652 break;
1653 case 1:
1654 usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_LE;
1655 break;
1656 case 0:
1657 default:
1658 usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S16_LE;
1659 break;
1660 }
1661 pr_debug("%s: usb_audio_tx_format = %d, ucontrol value = %ld\n",
1662 __func__, usb_tx_cfg.bit_format,
1663 ucontrol->value.integer.value[0]);
1664
1665 return rc;
1666}
1667
1668static int ext_disp_get_port_idx(struct snd_kcontrol *kcontrol)
1669{
1670 int idx;
1671
1672 if (strnstr(kcontrol->id.name, "Display Port RX",
1673 sizeof("Display Port RX")))
1674 idx = DP_RX_IDX;
1675 else {
1676 pr_err("%s: unsupported BE: %s",
1677 __func__, kcontrol->id.name);
1678 idx = -EINVAL;
1679 }
1680
1681 return idx;
1682}
1683
1684static int ext_disp_rx_format_get(struct snd_kcontrol *kcontrol,
1685 struct snd_ctl_elem_value *ucontrol)
1686{
1687 int idx = ext_disp_get_port_idx(kcontrol);
1688
1689 if (idx < 0)
1690 return idx;
1691
1692 switch (ext_disp_rx_cfg[idx].bit_format) {
1693 case SNDRV_PCM_FORMAT_S24_LE:
1694 ucontrol->value.integer.value[0] = 1;
1695 break;
1696
1697 case SNDRV_PCM_FORMAT_S16_LE:
1698 default:
1699 ucontrol->value.integer.value[0] = 0;
1700 break;
1701 }
1702
1703 pr_debug("%s: ext_disp_rx[%d].format = %d, ucontrol value = %ld\n",
1704 __func__, idx, ext_disp_rx_cfg[idx].bit_format,
1705 ucontrol->value.integer.value[0]);
1706 return 0;
1707}
1708
1709static int ext_disp_rx_format_put(struct snd_kcontrol *kcontrol,
1710 struct snd_ctl_elem_value *ucontrol)
1711{
1712 int idx = ext_disp_get_port_idx(kcontrol);
1713
1714 if (idx < 0)
1715 return idx;
1716
1717 switch (ucontrol->value.integer.value[0]) {
1718 case 1:
1719 ext_disp_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S24_LE;
1720 break;
1721 case 0:
1722 default:
1723 ext_disp_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S16_LE;
1724 break;
1725 }
1726 pr_debug("%s: ext_disp_rx[%d].format = %d, ucontrol value = %ld\n",
1727 __func__, idx, ext_disp_rx_cfg[idx].bit_format,
1728 ucontrol->value.integer.value[0]);
1729
1730 return 0;
1731}
1732
1733static int ext_disp_rx_ch_get(struct snd_kcontrol *kcontrol,
1734 struct snd_ctl_elem_value *ucontrol)
1735{
1736 int idx = ext_disp_get_port_idx(kcontrol);
1737
1738 if (idx < 0)
1739 return idx;
1740
1741 ucontrol->value.integer.value[0] =
1742 ext_disp_rx_cfg[idx].channels - 2;
1743
1744 pr_debug("%s: ext_disp_rx[%d].ch = %d\n", __func__,
1745 idx, ext_disp_rx_cfg[idx].channels);
1746
1747 return 0;
1748}
1749
1750static int ext_disp_rx_ch_put(struct snd_kcontrol *kcontrol,
1751 struct snd_ctl_elem_value *ucontrol)
1752{
1753 int idx = ext_disp_get_port_idx(kcontrol);
1754
1755 if (idx < 0)
1756 return idx;
1757
1758 ext_disp_rx_cfg[idx].channels =
1759 ucontrol->value.integer.value[0] + 2;
1760
1761 pr_debug("%s: ext_disp_rx[%d].ch = %d\n", __func__,
1762 idx, ext_disp_rx_cfg[idx].channels);
1763 return 1;
1764}
1765
1766static int ext_disp_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
1767 struct snd_ctl_elem_value *ucontrol)
1768{
1769 int sample_rate_val;
1770 int idx = ext_disp_get_port_idx(kcontrol);
1771
1772 if (idx < 0)
1773 return idx;
1774
1775 switch (ext_disp_rx_cfg[idx].sample_rate) {
1776 case SAMPLING_RATE_192KHZ:
1777 sample_rate_val = 2;
1778 break;
1779
1780 case SAMPLING_RATE_96KHZ:
1781 sample_rate_val = 1;
1782 break;
1783
1784 case SAMPLING_RATE_48KHZ:
1785 default:
1786 sample_rate_val = 0;
1787 break;
1788 }
1789
1790 ucontrol->value.integer.value[0] = sample_rate_val;
1791 pr_debug("%s: ext_disp_rx[%d].sample_rate = %d\n", __func__,
1792 idx, ext_disp_rx_cfg[idx].sample_rate);
1793
1794 return 0;
1795}
1796
1797static int ext_disp_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
1798 struct snd_ctl_elem_value *ucontrol)
1799{
1800 int idx = ext_disp_get_port_idx(kcontrol);
1801
1802 if (idx < 0)
1803 return idx;
1804
1805 switch (ucontrol->value.integer.value[0]) {
1806 case 2:
1807 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_192KHZ;
1808 break;
1809 case 1:
1810 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_96KHZ;
1811 break;
1812 case 0:
1813 default:
1814 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_48KHZ;
1815 break;
1816 }
1817
1818 pr_debug("%s: control value = %ld, ext_disp_rx[%d].sample_rate = %d\n",
1819 __func__, ucontrol->value.integer.value[0], idx,
1820 ext_disp_rx_cfg[idx].sample_rate);
1821 return 0;
1822}
1823
1824const struct snd_kcontrol_new msm_common_snd_controls[] = {
1825 SOC_ENUM_EXT("PROXY_RX Channels", proxy_rx_chs,
1826 proxy_rx_ch_get, proxy_rx_ch_put),
1827 SOC_ENUM_EXT("PRIM_AUX_PCM_RX SampleRate", prim_aux_pcm_rx_sample_rate,
1828 aux_pcm_rx_sample_rate_get,
1829 aux_pcm_rx_sample_rate_put),
1830 SOC_ENUM_EXT("SEC_AUX_PCM_RX SampleRate", sec_aux_pcm_rx_sample_rate,
1831 aux_pcm_rx_sample_rate_get,
1832 aux_pcm_rx_sample_rate_put),
1833 SOC_ENUM_EXT("TERT_AUX_PCM_RX SampleRate", tert_aux_pcm_rx_sample_rate,
1834 aux_pcm_rx_sample_rate_get,
1835 aux_pcm_rx_sample_rate_put),
1836 SOC_ENUM_EXT("QUAT_AUX_PCM_RX SampleRate", quat_aux_pcm_rx_sample_rate,
1837 aux_pcm_rx_sample_rate_get,
1838 aux_pcm_rx_sample_rate_put),
1839 SOC_ENUM_EXT("PRIM_AUX_PCM_TX SampleRate", prim_aux_pcm_tx_sample_rate,
1840 aux_pcm_tx_sample_rate_get,
1841 aux_pcm_tx_sample_rate_put),
1842 SOC_ENUM_EXT("SEC_AUX_PCM_TX SampleRate", sec_aux_pcm_tx_sample_rate,
1843 aux_pcm_tx_sample_rate_get,
1844 aux_pcm_tx_sample_rate_put),
1845 SOC_ENUM_EXT("TERT_AUX_PCM_TX SampleRate", tert_aux_pcm_tx_sample_rate,
1846 aux_pcm_tx_sample_rate_get,
1847 aux_pcm_tx_sample_rate_put),
1848 SOC_ENUM_EXT("QUAT_AUX_PCM_TX SampleRate", quat_aux_pcm_tx_sample_rate,
1849 aux_pcm_tx_sample_rate_get,
1850 aux_pcm_tx_sample_rate_put),
1851 SOC_ENUM_EXT("PRIM_MI2S_RX SampleRate", prim_mi2s_rx_sample_rate,
1852 mi2s_rx_sample_rate_get,
1853 mi2s_rx_sample_rate_put),
1854 SOC_ENUM_EXT("SEC_MI2S_RX SampleRate", sec_mi2s_rx_sample_rate,
1855 mi2s_rx_sample_rate_get,
1856 mi2s_rx_sample_rate_put),
1857 SOC_ENUM_EXT("TERT_MI2S_RX SampleRate", tert_mi2s_rx_sample_rate,
1858 mi2s_rx_sample_rate_get,
1859 mi2s_rx_sample_rate_put),
1860 SOC_ENUM_EXT("QUAT_MI2S_RX SampleRate", quat_mi2s_rx_sample_rate,
1861 mi2s_rx_sample_rate_get,
1862 mi2s_rx_sample_rate_put),
1863 SOC_ENUM_EXT("PRIM_MI2S_TX SampleRate", prim_mi2s_tx_sample_rate,
1864 mi2s_tx_sample_rate_get,
1865 mi2s_tx_sample_rate_put),
1866 SOC_ENUM_EXT("SEC_MI2S_TX SampleRate", sec_mi2s_tx_sample_rate,
1867 mi2s_tx_sample_rate_get,
1868 mi2s_tx_sample_rate_put),
1869 SOC_ENUM_EXT("TERT_MI2S_TX SampleRate", tert_mi2s_tx_sample_rate,
1870 mi2s_tx_sample_rate_get,
1871 mi2s_tx_sample_rate_put),
1872 SOC_ENUM_EXT("QUAT_MI2S_TX SampleRate", quat_mi2s_tx_sample_rate,
1873 mi2s_tx_sample_rate_get,
1874 mi2s_tx_sample_rate_put),
1875 SOC_ENUM_EXT("PRIM_MI2S_RX Format", prim_mi2s_rx_format,
1876 mi2s_rx_format_get,
1877 mi2s_rx_format_put),
1878 SOC_ENUM_EXT("SEC_MI2S_RX Format", sec_mi2s_rx_format,
1879 mi2s_rx_format_get,
1880 mi2s_rx_format_put),
1881 SOC_ENUM_EXT("TERT_MI2S_RX Format", tert_mi2s_rx_format,
1882 mi2s_rx_format_get,
1883 mi2s_rx_format_put),
1884 SOC_ENUM_EXT("QUAT_MI2S_RX Format", quat_mi2s_rx_format,
1885 mi2s_rx_format_get,
1886 mi2s_rx_format_put),
1887 SOC_ENUM_EXT("PRIM_MI2S_TX Format", prim_mi2s_tx_format,
1888 mi2s_tx_format_get,
1889 mi2s_tx_format_put),
1890 SOC_ENUM_EXT("SEC_MI2S_TX Format", sec_mi2s_tx_format,
1891 mi2s_tx_format_get,
1892 mi2s_tx_format_put),
1893 SOC_ENUM_EXT("TERT_MI2S_TX Format", tert_mi2s_tx_format,
1894 mi2s_tx_format_get,
1895 mi2s_tx_format_put),
1896 SOC_ENUM_EXT("QUAT_MI2S_TX Format", quat_mi2s_tx_format,
1897 mi2s_tx_format_get,
1898 mi2s_tx_format_put),
1899 SOC_ENUM_EXT("PRIM_MI2S_RX Channels", prim_mi2s_rx_chs,
1900 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
1901 SOC_ENUM_EXT("PRIM_MI2S_TX Channels", prim_mi2s_tx_chs,
1902 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
1903 SOC_ENUM_EXT("SEC_MI2S_RX Channels", sec_mi2s_rx_chs,
1904 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
1905 SOC_ENUM_EXT("SEC_MI2S_TX Channels", sec_mi2s_tx_chs,
1906 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
1907 SOC_ENUM_EXT("TERT_MI2S_RX Channels", tert_mi2s_rx_chs,
1908 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
1909 SOC_ENUM_EXT("TERT_MI2S_TX Channels", tert_mi2s_tx_chs,
1910 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
1911 SOC_ENUM_EXT("QUAT_MI2S_RX Channels", quat_mi2s_rx_chs,
1912 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
1913 SOC_ENUM_EXT("QUAT_MI2S_TX Channels", quat_mi2s_tx_chs,
1914 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
1915 SOC_ENUM_EXT("USB_AUDIO_RX Channels", usb_rx_chs,
1916 usb_audio_rx_ch_get, usb_audio_rx_ch_put),
1917 SOC_ENUM_EXT("USB_AUDIO_TX Channels", usb_tx_chs,
1918 usb_audio_tx_ch_get, usb_audio_tx_ch_put),
1919 SOC_ENUM_EXT("Display Port RX Channels", ext_disp_rx_chs,
1920 ext_disp_rx_ch_get, ext_disp_rx_ch_put),
1921 SOC_ENUM_EXT("USB_AUDIO_RX Format", usb_rx_format,
1922 usb_audio_rx_format_get, usb_audio_rx_format_put),
1923 SOC_ENUM_EXT("USB_AUDIO_TX Format", usb_tx_format,
1924 usb_audio_tx_format_get, usb_audio_tx_format_put),
1925 SOC_ENUM_EXT("Display Port RX Bit Format", ext_disp_rx_format,
1926 ext_disp_rx_format_get, ext_disp_rx_format_put),
1927 SOC_ENUM_EXT("USB_AUDIO_RX SampleRate", usb_rx_sample_rate,
1928 usb_audio_rx_sample_rate_get,
1929 usb_audio_rx_sample_rate_put),
1930 SOC_ENUM_EXT("USB_AUDIO_TX SampleRate", usb_tx_sample_rate,
1931 usb_audio_tx_sample_rate_get,
1932 usb_audio_tx_sample_rate_put),
1933 SOC_ENUM_EXT("Display Port RX SampleRate", ext_disp_rx_sample_rate,
1934 ext_disp_rx_sample_rate_get,
1935 ext_disp_rx_sample_rate_put),
1936 SOC_ENUM_EXT("PRI_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
1937 tdm_rx_sample_rate_get,
1938 tdm_rx_sample_rate_put),
1939 SOC_ENUM_EXT("PRI_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
1940 tdm_tx_sample_rate_get,
1941 tdm_tx_sample_rate_put),
1942 SOC_ENUM_EXT("PRI_TDM_RX_0 Format", tdm_rx_format,
1943 tdm_rx_format_get,
1944 tdm_rx_format_put),
1945 SOC_ENUM_EXT("PRI_TDM_TX_0 Format", tdm_tx_format,
1946 tdm_tx_format_get,
1947 tdm_tx_format_put),
1948 SOC_ENUM_EXT("PRI_TDM_RX_0 Channels", tdm_rx_chs,
1949 tdm_rx_ch_get,
1950 tdm_rx_ch_put),
1951 SOC_ENUM_EXT("PRI_TDM_TX_0 Channels", tdm_tx_chs,
1952 tdm_tx_ch_get,
1953 tdm_tx_ch_put),
1954 SOC_ENUM_EXT("SEC_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
1955 tdm_rx_sample_rate_get,
1956 tdm_rx_sample_rate_put),
1957 SOC_ENUM_EXT("SEC_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
1958 tdm_tx_sample_rate_get,
1959 tdm_tx_sample_rate_put),
1960 SOC_ENUM_EXT("SEC_TDM_RX_0 Format", tdm_rx_format,
1961 tdm_rx_format_get,
1962 tdm_rx_format_put),
1963 SOC_ENUM_EXT("SEC_TDM_TX_0 Format", tdm_tx_format,
1964 tdm_tx_format_get,
1965 tdm_tx_format_put),
1966 SOC_ENUM_EXT("SEC_TDM_RX_0 Channels", tdm_rx_chs,
1967 tdm_rx_ch_get,
1968 tdm_rx_ch_put),
1969 SOC_ENUM_EXT("SEC_TDM_TX_0 Channels", tdm_tx_chs,
1970 tdm_tx_ch_get,
1971 tdm_tx_ch_put),
1972 SOC_ENUM_EXT("TERT_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
1973 tdm_rx_sample_rate_get,
1974 tdm_rx_sample_rate_put),
1975 SOC_ENUM_EXT("TERT_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
1976 tdm_tx_sample_rate_get,
1977 tdm_tx_sample_rate_put),
1978 SOC_ENUM_EXT("TERT_TDM_RX_0 Format", tdm_rx_format,
1979 tdm_rx_format_get,
1980 tdm_rx_format_put),
1981 SOC_ENUM_EXT("TERT_TDM_TX_0 Format", tdm_tx_format,
1982 tdm_tx_format_get,
1983 tdm_tx_format_put),
1984 SOC_ENUM_EXT("TERT_TDM_RX_0 Channels", tdm_rx_chs,
1985 tdm_rx_ch_get,
1986 tdm_rx_ch_put),
1987 SOC_ENUM_EXT("TERT_TDM_TX_0 Channels", tdm_tx_chs,
1988 tdm_tx_ch_get,
1989 tdm_tx_ch_put),
1990 SOC_ENUM_EXT("QUAT_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
1991 tdm_rx_sample_rate_get,
1992 tdm_rx_sample_rate_put),
1993 SOC_ENUM_EXT("QUAT_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
1994 tdm_tx_sample_rate_get,
1995 tdm_tx_sample_rate_put),
1996 SOC_ENUM_EXT("QUAT_TDM_RX_0 Format", tdm_rx_format,
1997 tdm_rx_format_get,
1998 tdm_rx_format_put),
1999 SOC_ENUM_EXT("QUAT_TDM_TX_0 Format", tdm_tx_format,
2000 tdm_tx_format_get,
2001 tdm_tx_format_put),
2002 SOC_ENUM_EXT("QUAT_TDM_RX_0 Channels", tdm_rx_chs,
2003 tdm_rx_ch_get,
2004 tdm_rx_ch_put),
2005 SOC_ENUM_EXT("QUAT_TDM_TX_0 Channels", tdm_tx_chs,
2006 tdm_tx_ch_get,
2007 tdm_tx_ch_put),
2008};
2009
2010/**
2011 * msm_common_snd_controls_size - to return controls size
2012 *
2013 * Return: returns size of common controls array
2014 */
2015int msm_common_snd_controls_size(void)
2016{
2017 return ARRAY_SIZE(msm_common_snd_controls);
2018}
2019EXPORT_SYMBOL(msm_common_snd_controls_size);
2020
Laxminath Kasam38070be2017-08-17 18:21:59 +05302021void msm_set_codec_reg_done(bool done)
2022{
2023 codec_reg_done = done;
2024}
2025EXPORT_SYMBOL(msm_set_codec_reg_done);
2026
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05302027static inline int param_is_mask(int p)
2028{
2029 return (p >= SNDRV_PCM_HW_PARAM_FIRST_MASK) &&
2030 (p <= SNDRV_PCM_HW_PARAM_LAST_MASK);
2031}
2032
2033static inline struct snd_mask *param_to_mask(struct snd_pcm_hw_params *p,
2034 int n)
2035{
2036 return &(p->masks[n - SNDRV_PCM_HW_PARAM_FIRST_MASK]);
2037}
2038
2039static void param_set_mask(struct snd_pcm_hw_params *p, int n, unsigned int bit)
2040{
2041 if (bit >= SNDRV_MASK_MAX)
2042 return;
2043 if (param_is_mask(n)) {
2044 struct snd_mask *m = param_to_mask(p, n);
2045
2046 m->bits[0] = 0;
2047 m->bits[1] = 0;
2048 m->bits[bit >> 5] |= (1 << (bit & 31));
2049 }
2050}
2051
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05302052static int msm_ext_disp_get_idx_from_beid(int32_t id)
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05302053{
2054 int idx;
2055
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05302056 switch (id) {
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05302057 case MSM_BACKEND_DAI_DISPLAY_PORT_RX:
2058 idx = DP_RX_IDX;
2059 break;
2060 default:
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05302061 pr_err("%s: Incorrect ext_disp id %d\n", __func__, id);
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05302062 idx = -EINVAL;
2063 break;
2064 }
2065
2066 return idx;
2067}
2068
2069/**
2070 * msm_common_be_hw_params_fixup - updates settings of ALSA BE hw params.
2071 *
2072 * @rtd: runtime dailink instance
2073 * @params: HW params of associated backend dailink.
2074 *
2075 * Returns 0.
2076 */
2077int msm_common_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
2078 struct snd_pcm_hw_params *params)
2079{
2080 struct snd_soc_dai_link *dai_link = rtd->dai_link;
2081 struct snd_interval *rate = hw_param_interval(params,
2082 SNDRV_PCM_HW_PARAM_RATE);
2083 struct snd_interval *channels = hw_param_interval(params,
2084 SNDRV_PCM_HW_PARAM_CHANNELS);
2085 int rc = 0;
2086 int idx;
2087
2088 pr_debug("%s: format = %d, rate = %d\n",
2089 __func__, params_format(params), params_rate(params));
2090
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05302091 switch (dai_link->id) {
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05302092 case MSM_BACKEND_DAI_USB_RX:
2093 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
2094 usb_rx_cfg.bit_format);
2095 rate->min = rate->max = usb_rx_cfg.sample_rate;
2096 channels->min = channels->max = usb_rx_cfg.channels;
2097 break;
2098
2099 case MSM_BACKEND_DAI_USB_TX:
2100 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
2101 usb_tx_cfg.bit_format);
2102 rate->min = rate->max = usb_tx_cfg.sample_rate;
2103 channels->min = channels->max = usb_tx_cfg.channels;
2104 break;
2105
2106 case MSM_BACKEND_DAI_DISPLAY_PORT_RX:
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05302107 idx = msm_ext_disp_get_idx_from_beid(dai_link->id);
2108 if (idx < 0) {
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05302109 pr_err("%s: Incorrect ext disp idx %d\n",
2110 __func__, idx);
2111 rc = idx;
2112 break;
2113 }
2114
2115 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
2116 ext_disp_rx_cfg[idx].bit_format);
2117 rate->min = rate->max = ext_disp_rx_cfg[idx].sample_rate;
2118 channels->min = channels->max = ext_disp_rx_cfg[idx].channels;
2119 break;
2120
2121 case MSM_BACKEND_DAI_AFE_PCM_RX:
2122 channels->min = channels->max = proxy_rx_cfg.channels;
2123 rate->min = rate->max = SAMPLING_RATE_48KHZ;
2124 break;
2125
2126 case MSM_BACKEND_DAI_PRI_TDM_RX_0:
2127 channels->min = channels->max =
2128 tdm_rx_cfg[TDM_PRI][TDM_0].channels;
2129 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
2130 tdm_rx_cfg[TDM_PRI][TDM_0].bit_format);
2131 rate->min = rate->max = tdm_rx_cfg[TDM_PRI][TDM_0].sample_rate;
2132 break;
2133
2134 case MSM_BACKEND_DAI_PRI_TDM_TX_0:
2135 channels->min = channels->max =
2136 tdm_tx_cfg[TDM_PRI][TDM_0].channels;
2137 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
2138 tdm_tx_cfg[TDM_PRI][TDM_0].bit_format);
2139 rate->min = rate->max = tdm_tx_cfg[TDM_PRI][TDM_0].sample_rate;
2140 break;
2141
2142 case MSM_BACKEND_DAI_SEC_TDM_RX_0:
2143 channels->min = channels->max =
2144 tdm_rx_cfg[TDM_SEC][TDM_0].channels;
2145 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
2146 tdm_rx_cfg[TDM_SEC][TDM_0].bit_format);
2147 rate->min = rate->max = tdm_rx_cfg[TDM_SEC][TDM_0].sample_rate;
2148 break;
2149
2150 case MSM_BACKEND_DAI_SEC_TDM_TX_0:
2151 channels->min = channels->max =
2152 tdm_tx_cfg[TDM_SEC][TDM_0].channels;
2153 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
2154 tdm_tx_cfg[TDM_SEC][TDM_0].bit_format);
2155 rate->min = rate->max = tdm_tx_cfg[TDM_SEC][TDM_0].sample_rate;
2156 break;
2157
2158 case MSM_BACKEND_DAI_TERT_TDM_RX_0:
2159 channels->min = channels->max =
2160 tdm_rx_cfg[TDM_TERT][TDM_0].channels;
2161 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
2162 tdm_rx_cfg[TDM_TERT][TDM_0].bit_format);
2163 rate->min = rate->max = tdm_rx_cfg[TDM_TERT][TDM_0].sample_rate;
2164 break;
2165
2166 case MSM_BACKEND_DAI_TERT_TDM_TX_0:
2167 channels->min = channels->max =
2168 tdm_tx_cfg[TDM_TERT][TDM_0].channels;
2169 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
2170 tdm_tx_cfg[TDM_TERT][TDM_0].bit_format);
2171 rate->min = rate->max = tdm_tx_cfg[TDM_TERT][TDM_0].sample_rate;
2172 break;
2173
2174 case MSM_BACKEND_DAI_QUAT_TDM_RX_0:
2175 channels->min = channels->max =
2176 tdm_rx_cfg[TDM_QUAT][TDM_0].channels;
2177 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
2178 tdm_rx_cfg[TDM_QUAT][TDM_0].bit_format);
2179 rate->min = rate->max = tdm_rx_cfg[TDM_QUAT][TDM_0].sample_rate;
2180 break;
2181
2182 case MSM_BACKEND_DAI_QUAT_TDM_TX_0:
2183 channels->min = channels->max =
2184 tdm_tx_cfg[TDM_QUAT][TDM_0].channels;
2185 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
2186 tdm_tx_cfg[TDM_QUAT][TDM_0].bit_format);
2187 rate->min = rate->max = tdm_tx_cfg[TDM_QUAT][TDM_0].sample_rate;
2188 break;
2189
2190 case MSM_BACKEND_DAI_AUXPCM_RX:
2191 rate->min = rate->max =
2192 aux_pcm_rx_cfg[PRIM_AUX_PCM].sample_rate;
2193 channels->min = channels->max =
2194 aux_pcm_rx_cfg[PRIM_AUX_PCM].channels;
2195 break;
2196
2197 case MSM_BACKEND_DAI_AUXPCM_TX:
2198 rate->min = rate->max =
2199 aux_pcm_tx_cfg[PRIM_AUX_PCM].sample_rate;
2200 channels->min = channels->max =
2201 aux_pcm_tx_cfg[PRIM_AUX_PCM].channels;
2202 break;
2203
2204 case MSM_BACKEND_DAI_SEC_AUXPCM_RX:
2205 rate->min = rate->max =
2206 aux_pcm_rx_cfg[SEC_AUX_PCM].sample_rate;
2207 channels->min = channels->max =
2208 aux_pcm_rx_cfg[SEC_AUX_PCM].channels;
2209 break;
2210
2211 case MSM_BACKEND_DAI_SEC_AUXPCM_TX:
2212 rate->min = rate->max =
2213 aux_pcm_tx_cfg[SEC_AUX_PCM].sample_rate;
2214 channels->min = channels->max =
2215 aux_pcm_tx_cfg[SEC_AUX_PCM].channels;
2216 break;
2217
2218 case MSM_BACKEND_DAI_TERT_AUXPCM_RX:
2219 rate->min = rate->max =
2220 aux_pcm_rx_cfg[TERT_AUX_PCM].sample_rate;
2221 channels->min = channels->max =
2222 aux_pcm_rx_cfg[TERT_AUX_PCM].channels;
2223 break;
2224
2225 case MSM_BACKEND_DAI_TERT_AUXPCM_TX:
2226 rate->min = rate->max =
2227 aux_pcm_tx_cfg[TERT_AUX_PCM].sample_rate;
2228 channels->min = channels->max =
2229 aux_pcm_tx_cfg[TERT_AUX_PCM].channels;
2230 break;
2231
2232 case MSM_BACKEND_DAI_QUAT_AUXPCM_RX:
2233 rate->min = rate->max =
2234 aux_pcm_rx_cfg[QUAT_AUX_PCM].sample_rate;
2235 channels->min = channels->max =
2236 aux_pcm_rx_cfg[QUAT_AUX_PCM].channels;
2237 break;
2238
2239 case MSM_BACKEND_DAI_QUAT_AUXPCM_TX:
2240 rate->min = rate->max =
2241 aux_pcm_tx_cfg[QUAT_AUX_PCM].sample_rate;
2242 channels->min = channels->max =
2243 aux_pcm_tx_cfg[QUAT_AUX_PCM].channels;
2244 break;
2245
2246 case MSM_BACKEND_DAI_PRI_MI2S_RX:
2247 rate->min = rate->max = mi2s_rx_cfg[PRIM_MI2S].sample_rate;
2248 channels->min = channels->max =
2249 mi2s_rx_cfg[PRIM_MI2S].channels;
2250 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
2251 mi2s_rx_cfg[PRIM_MI2S].bit_format);
2252 break;
2253
2254 case MSM_BACKEND_DAI_PRI_MI2S_TX:
2255 rate->min = rate->max = mi2s_tx_cfg[PRIM_MI2S].sample_rate;
2256 channels->min = channels->max =
2257 mi2s_tx_cfg[PRIM_MI2S].channels;
2258 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
2259 mi2s_tx_cfg[PRIM_MI2S].bit_format);
2260 break;
2261
2262 case MSM_BACKEND_DAI_SECONDARY_MI2S_RX:
2263 rate->min = rate->max = mi2s_rx_cfg[SEC_MI2S].sample_rate;
2264 channels->min = channels->max =
2265 mi2s_rx_cfg[SEC_MI2S].channels;
2266 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
2267 mi2s_rx_cfg[SEC_MI2S].bit_format);
2268 break;
2269
2270 case MSM_BACKEND_DAI_SECONDARY_MI2S_TX:
2271 rate->min = rate->max = mi2s_tx_cfg[SEC_MI2S].sample_rate;
2272 channels->min = channels->max =
2273 mi2s_tx_cfg[SEC_MI2S].channels;
2274 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
2275 mi2s_tx_cfg[SEC_MI2S].bit_format);
2276 break;
2277
2278 case MSM_BACKEND_DAI_TERTIARY_MI2S_RX:
2279 rate->min = rate->max = mi2s_rx_cfg[TERT_MI2S].sample_rate;
2280 channels->min = channels->max =
2281 mi2s_rx_cfg[TERT_MI2S].channels;
2282 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
2283 mi2s_rx_cfg[TERT_MI2S].bit_format);
2284 break;
2285
2286 case MSM_BACKEND_DAI_TERTIARY_MI2S_TX:
2287 rate->min = rate->max = mi2s_tx_cfg[TERT_MI2S].sample_rate;
2288 channels->min = channels->max =
2289 mi2s_tx_cfg[TERT_MI2S].channels;
2290 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
2291 mi2s_tx_cfg[TERT_MI2S].bit_format);
2292 break;
2293
2294 case MSM_BACKEND_DAI_QUATERNARY_MI2S_RX:
2295 rate->min = rate->max = mi2s_rx_cfg[QUAT_MI2S].sample_rate;
2296 channels->min = channels->max =
2297 mi2s_rx_cfg[QUAT_MI2S].channels;
2298 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
2299 mi2s_rx_cfg[QUAT_MI2S].bit_format);
2300 break;
2301
2302 case MSM_BACKEND_DAI_QUATERNARY_MI2S_TX:
2303 rate->min = rate->max = mi2s_tx_cfg[QUAT_MI2S].sample_rate;
2304 channels->min = channels->max =
2305 mi2s_tx_cfg[QUAT_MI2S].channels;
2306 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
2307 mi2s_tx_cfg[QUAT_MI2S].bit_format);
2308 break;
2309
2310 default:
2311 rate->min = rate->max = SAMPLING_RATE_48KHZ;
2312 break;
2313 }
2314 return rc;
2315}
2316EXPORT_SYMBOL(msm_common_be_hw_params_fixup);
2317
2318/**
2319 * msm_aux_pcm_snd_startup - startup ops of auxpcm.
2320 *
2321 * @substream: PCM stream pointer of associated backend dailink
2322 *
2323 * Returns 0 on success or -EINVAL on error.
2324 */
2325int msm_aux_pcm_snd_startup(struct snd_pcm_substream *substream)
2326{
2327 struct snd_soc_pcm_runtime *rtd = substream->private_data;
2328
2329 dev_dbg(rtd->card->dev,
2330 "%s: substream = %s stream = %d, dai name %s, dai ID %d\n",
2331 __func__, substream->name, substream->stream,
2332 rtd->cpu_dai->name, rtd->cpu_dai->id);
2333
2334 return 0;
2335}
2336EXPORT_SYMBOL(msm_aux_pcm_snd_startup);
2337
2338/**
2339 * msm_aux_pcm_snd_shutdown - shutdown ops of auxpcm.
2340 *
2341 * @substream: PCM stream pointer of associated backend dailink
2342 */
2343void msm_aux_pcm_snd_shutdown(struct snd_pcm_substream *substream)
2344{
2345 struct snd_soc_pcm_runtime *rtd = substream->private_data;
2346
2347 dev_dbg(rtd->card->dev,
2348 "%s: substream = %s stream = %d, dai name %s, dai ID %d\n",
2349 __func__,
2350 substream->name, substream->stream,
2351 rtd->cpu_dai->name, rtd->cpu_dai->id);
2352}
2353EXPORT_SYMBOL(msm_aux_pcm_snd_shutdown);
2354
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05302355static int msm_get_port_id(int id)
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05302356{
2357 int afe_port_id;
2358
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05302359 switch (id) {
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05302360 case MSM_BACKEND_DAI_PRI_MI2S_RX:
2361 afe_port_id = AFE_PORT_ID_PRIMARY_MI2S_RX;
2362 break;
2363 case MSM_BACKEND_DAI_PRI_MI2S_TX:
2364 afe_port_id = AFE_PORT_ID_PRIMARY_MI2S_TX;
2365 break;
2366 case MSM_BACKEND_DAI_SECONDARY_MI2S_RX:
2367 afe_port_id = AFE_PORT_ID_SECONDARY_MI2S_RX;
2368 break;
2369 case MSM_BACKEND_DAI_SECONDARY_MI2S_TX:
2370 afe_port_id = AFE_PORT_ID_SECONDARY_MI2S_TX;
2371 break;
2372 case MSM_BACKEND_DAI_TERTIARY_MI2S_RX:
2373 afe_port_id = AFE_PORT_ID_TERTIARY_MI2S_RX;
2374 break;
2375 case MSM_BACKEND_DAI_TERTIARY_MI2S_TX:
2376 afe_port_id = AFE_PORT_ID_TERTIARY_MI2S_TX;
2377 break;
2378 case MSM_BACKEND_DAI_QUATERNARY_MI2S_RX:
2379 afe_port_id = AFE_PORT_ID_QUATERNARY_MI2S_RX;
2380 break;
2381 case MSM_BACKEND_DAI_QUATERNARY_MI2S_TX:
2382 afe_port_id = AFE_PORT_ID_QUATERNARY_MI2S_TX;
2383 break;
2384 default:
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05302385 pr_err("%s: Invalid id: %d\n", __func__, id);
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05302386 afe_port_id = -EINVAL;
2387 }
2388
2389 return afe_port_id;
2390}
2391
2392static u32 get_mi2s_bits_per_sample(u32 bit_format)
2393{
2394 u32 bit_per_sample;
2395
2396 switch (bit_format) {
2397 case SNDRV_PCM_FORMAT_S32_LE:
2398 case SNDRV_PCM_FORMAT_S24_3LE:
2399 case SNDRV_PCM_FORMAT_S24_LE:
2400 bit_per_sample = 32;
2401 break;
2402 case SNDRV_PCM_FORMAT_S16_LE:
2403 default:
2404 bit_per_sample = 16;
2405 break;
2406 }
2407
2408 return bit_per_sample;
2409}
2410
2411static void update_mi2s_clk_val(int dai_id, int stream)
2412{
2413 u32 bit_per_sample;
2414
2415 if (stream == SNDRV_PCM_STREAM_PLAYBACK) {
2416 bit_per_sample =
2417 get_mi2s_bits_per_sample(mi2s_rx_cfg[dai_id].bit_format);
2418 mi2s_clk[dai_id].clk_freq_in_hz =
2419 mi2s_rx_cfg[dai_id].sample_rate * 2 * bit_per_sample;
2420 } else {
2421 bit_per_sample =
2422 get_mi2s_bits_per_sample(mi2s_tx_cfg[dai_id].bit_format);
2423 mi2s_clk[dai_id].clk_freq_in_hz =
2424 mi2s_tx_cfg[dai_id].sample_rate * 2 * bit_per_sample;
2425 }
2426}
2427
2428static int msm_mi2s_set_sclk(struct snd_pcm_substream *substream, bool enable)
2429{
2430 int ret = 0;
2431 struct snd_soc_pcm_runtime *rtd = substream->private_data;
2432 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
2433 int port_id = 0;
2434 int index = cpu_dai->id;
2435
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05302436 port_id = msm_get_port_id(rtd->dai_link->id);
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05302437 if (port_id < 0) {
2438 dev_err(rtd->card->dev, "%s: Invalid port_id\n", __func__);
2439 ret = port_id;
2440 goto done;
2441 }
2442
2443 if (enable) {
2444 update_mi2s_clk_val(index, substream->stream);
2445 dev_dbg(rtd->card->dev, "%s: clock rate %ul\n", __func__,
2446 mi2s_clk[index].clk_freq_in_hz);
2447 }
2448
2449 mi2s_clk[index].enable = enable;
2450 ret = afe_set_lpass_clock_v2(port_id,
2451 &mi2s_clk[index]);
2452 if (ret < 0) {
2453 dev_err(rtd->card->dev,
2454 "%s: afe lpass clock failed for port 0x%x , err:%d\n",
2455 __func__, port_id, ret);
2456 goto done;
2457 }
2458
2459done:
2460 return ret;
2461}
2462
2463/**
2464 * msm_mi2s_snd_startup - startup ops of mi2s.
2465 *
2466 * @substream: PCM stream pointer of associated backend dailink
2467 *
2468 * Returns 0 on success or -EINVAL on error.
2469 */
2470int msm_mi2s_snd_startup(struct snd_pcm_substream *substream)
2471{
2472 int ret = 0;
2473 struct snd_soc_pcm_runtime *rtd = substream->private_data;
2474 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05302475 int port_id = msm_get_port_id(rtd->dai_link->id);
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05302476 int index = cpu_dai->id;
2477 unsigned int fmt = SND_SOC_DAIFMT_CBS_CFS;
2478
2479 dev_dbg(rtd->card->dev,
2480 "%s: substream = %s stream = %d, dai name %s, dai ID %d\n",
2481 __func__, substream->name, substream->stream,
2482 cpu_dai->name, cpu_dai->id);
2483
2484 if (index < PRIM_MI2S || index > QUAT_MI2S) {
2485 ret = -EINVAL;
2486 dev_err(rtd->card->dev,
2487 "%s: CPU DAI id (%d) out of range\n",
2488 __func__, cpu_dai->id);
2489 goto done;
2490 }
2491 /*
2492 * Muxtex protection in case the same MI2S
2493 * interface using for both TX and RX so
2494 * that the same clock won't be enable twice.
2495 */
2496 mutex_lock(&mi2s_intf_conf[index].lock);
2497 if (++mi2s_intf_conf[index].ref_cnt == 1) {
2498 /* Check if msm needs to provide the clock to the interface */
2499 if (!mi2s_intf_conf[index].msm_is_mi2s_master) {
2500 mi2s_clk[index].clk_id = mi2s_ebit_clk[index];
2501 fmt = SND_SOC_DAIFMT_CBM_CFM;
2502 }
2503 ret = msm_mi2s_set_sclk(substream, true);
2504 if (ret < 0) {
2505 dev_err(rtd->card->dev,
2506 "%s: afe lpass clock failed to enable MI2S clock, err:%d\n",
2507 __func__, ret);
2508 goto clean_up;
2509 }
2510 ret = snd_soc_dai_set_fmt(cpu_dai, fmt);
2511 if (ret < 0) {
2512 dev_err(rtd->card->dev,
2513 "%s: set fmt cpu dai failed for MI2S (%d), err:%d\n",
2514 __func__, index, ret);
2515 goto clk_off;
2516 }
2517 if (mi2s_intf_conf[index].msm_is_ext_mclk) {
2518 mi2s_mclk[index].enable = 1;
2519 pr_debug("%s: Enabling mclk, clk_freq_in_hz = %u\n",
2520 __func__, mi2s_mclk[index].clk_freq_in_hz);
2521 ret = afe_set_lpass_clock_v2(port_id,
2522 &mi2s_mclk[index]);
2523 if (ret < 0) {
2524 pr_err("%s: afe lpass mclk failed, err:%d\n",
2525 __func__, ret);
2526 goto clk_off;
2527 }
2528 }
2529 }
2530 mutex_unlock(&mi2s_intf_conf[index].lock);
2531 return 0;
2532clk_off:
2533 if (ret < 0)
2534 msm_mi2s_set_sclk(substream, false);
2535clean_up:
2536 if (ret < 0)
2537 mi2s_intf_conf[index].ref_cnt--;
2538 mutex_unlock(&mi2s_intf_conf[index].lock);
2539done:
2540 return ret;
2541}
2542EXPORT_SYMBOL(msm_mi2s_snd_startup);
2543
2544/**
2545 * msm_mi2s_snd_shutdown - shutdown ops of mi2s.
2546 *
2547 * @substream: PCM stream pointer of associated backend dailink
2548 */
2549void msm_mi2s_snd_shutdown(struct snd_pcm_substream *substream)
2550{
2551 int ret;
2552 struct snd_soc_pcm_runtime *rtd = substream->private_data;
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05302553 int port_id = msm_get_port_id(rtd->dai_link->id);
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05302554 int index = rtd->cpu_dai->id;
2555
2556 pr_debug("%s(): substream = %s stream = %d\n", __func__,
2557 substream->name, substream->stream);
2558 if (index < PRIM_MI2S || index > QUAT_MI2S) {
2559 pr_err("%s:invalid MI2S DAI(%d)\n", __func__, index);
2560 return;
2561 }
2562
2563 mutex_lock(&mi2s_intf_conf[index].lock);
2564 if (--mi2s_intf_conf[index].ref_cnt == 0) {
2565 ret = msm_mi2s_set_sclk(substream, false);
2566 if (ret < 0) {
2567 pr_err("%s:clock disable failed for MI2S (%d); ret=%d\n",
2568 __func__, index, ret);
2569 mi2s_intf_conf[index].ref_cnt++;
2570 }
2571 if (mi2s_intf_conf[index].msm_is_ext_mclk) {
2572 mi2s_mclk[index].enable = 0;
2573 pr_debug("%s: Disabling mclk, clk_freq_in_hz = %u\n",
2574 __func__, mi2s_mclk[index].clk_freq_in_hz);
2575 ret = afe_set_lpass_clock_v2(port_id,
2576 &mi2s_mclk[index]);
2577 if (ret < 0) {
2578 pr_err("%s: mclk disable failed for MCLK (%d); ret=%d\n",
2579 __func__, index, ret);
2580 }
2581 }
2582 }
2583 mutex_unlock(&mi2s_intf_conf[index].lock);
2584}
2585EXPORT_SYMBOL(msm_mi2s_snd_shutdown);
2586
2587/* Validate whether US EU switch is present or not */
2588static int msm_prepare_us_euro(struct snd_soc_card *card)
2589{
2590 struct msm_asoc_mach_data *pdata =
2591 snd_soc_card_get_drvdata(card);
2592 int ret = 0;
2593
2594 if (pdata->us_euro_gpio >= 0) {
2595 dev_dbg(card->dev, "%s: us_euro gpio request %d", __func__,
2596 pdata->us_euro_gpio);
2597 ret = gpio_request(pdata->us_euro_gpio, "TASHA_CODEC_US_EURO");
2598 if (ret) {
2599 dev_err(card->dev,
2600 "%s: Failed to request codec US/EURO gpio %d error %d\n",
2601 __func__, pdata->us_euro_gpio, ret);
2602 }
2603 }
2604
2605 return ret;
2606}
2607
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05302608static bool msm_swap_gnd_mic(struct snd_soc_codec *codec, bool active)
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05302609{
2610 struct snd_soc_card *card = codec->component.card;
2611 struct msm_asoc_mach_data *pdata =
2612 snd_soc_card_get_drvdata(card);
2613 int value = 0;
2614
2615 if (pdata->us_euro_gpio_p) {
2616 value = msm_cdc_pinctrl_get_state(pdata->us_euro_gpio_p);
2617 if (value)
2618 msm_cdc_pinctrl_select_sleep_state(
2619 pdata->us_euro_gpio_p);
2620 else
2621 msm_cdc_pinctrl_select_active_state(
2622 pdata->us_euro_gpio_p);
2623 } else if (pdata->us_euro_gpio >= 0) {
2624 value = gpio_get_value_cansleep(pdata->us_euro_gpio);
2625 gpio_set_value_cansleep(pdata->us_euro_gpio, !value);
2626 }
2627 pr_debug("%s: swap select switch %d to %d\n", __func__, value, !value);
2628 return true;
2629}
2630
2631static int msm_populate_dai_link_component_of_node(
2632 struct msm_asoc_mach_data *pdata,
2633 struct snd_soc_card *card)
2634{
2635 int i, index, ret = 0;
2636 struct device *cdev = card->dev;
2637 struct snd_soc_dai_link *dai_link = card->dai_link;
2638 struct device_node *phandle;
2639
2640 if (!cdev) {
2641 pr_err("%s: Sound card device memory NULL\n", __func__);
2642 return -ENODEV;
2643 }
2644
2645 for (i = 0; i < card->num_links; i++) {
2646 if (dai_link[i].platform_of_node && dai_link[i].cpu_of_node)
2647 continue;
2648
2649 /* populate platform_of_node for snd card dai links */
2650 if (dai_link[i].platform_name &&
2651 !dai_link[i].platform_of_node) {
2652 index = of_property_match_string(cdev->of_node,
2653 "asoc-platform-names",
2654 dai_link[i].platform_name);
2655 if (index < 0) {
2656 pr_err("%s: No match found for platform name: %s\n",
2657 __func__, dai_link[i].platform_name);
2658 ret = index;
2659 goto cpu_dai;
2660 }
2661 phandle = of_parse_phandle(cdev->of_node,
2662 "asoc-platform",
2663 index);
2664 if (!phandle) {
2665 pr_err("%s: retrieving phandle for platform %s, index %d failed\n",
2666 __func__, dai_link[i].platform_name,
2667 index);
2668 ret = -ENODEV;
2669 goto err;
2670 }
2671 dai_link[i].platform_of_node = phandle;
2672 dai_link[i].platform_name = NULL;
2673 }
2674cpu_dai:
2675 /* populate cpu_of_node for snd card dai links */
2676 if (dai_link[i].cpu_dai_name && !dai_link[i].cpu_of_node) {
2677 index = of_property_match_string(cdev->of_node,
2678 "asoc-cpu-names",
2679 dai_link[i].cpu_dai_name);
2680 if (index < 0)
2681 goto codec_dai;
2682 phandle = of_parse_phandle(cdev->of_node, "asoc-cpu",
2683 index);
2684 if (!phandle) {
2685 pr_err("%s: retrieving phandle for cpu dai %s failed\n",
2686 __func__, dai_link[i].cpu_dai_name);
2687 ret = -ENODEV;
2688 goto err;
2689 }
2690 dai_link[i].cpu_of_node = phandle;
2691 dai_link[i].cpu_dai_name = NULL;
2692 }
2693codec_dai:
2694 /* populate codec_of_node for snd card dai links */
2695 if (dai_link[i].codec_name && !dai_link[i].codec_of_node) {
2696 index = of_property_match_string(cdev->of_node,
2697 "asoc-codec-names",
2698 dai_link[i].codec_name);
2699 if (index < 0)
2700 continue;
2701 phandle = of_parse_phandle(cdev->of_node, "asoc-codec",
2702 index);
2703 if (!phandle) {
2704 pr_err("%s: retrieving phandle for codec dai %s failed\n",
2705 __func__, dai_link[i].codec_name);
2706 ret = -ENODEV;
2707 goto err;
2708 }
2709 dai_link[i].codec_of_node = phandle;
2710 dai_link[i].codec_name = NULL;
2711 }
2712 if (pdata->snd_card_val == INT_SND_CARD) {
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05302713 if ((dai_link[i].id ==
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05302714 MSM_BACKEND_DAI_INT0_MI2S_RX) ||
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05302715 (dai_link[i].id ==
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05302716 MSM_BACKEND_DAI_INT1_MI2S_RX) ||
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05302717 (dai_link[i].id ==
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05302718 MSM_BACKEND_DAI_INT2_MI2S_TX) ||
Asish Bhattacharya84f7f732017-07-25 16:29:27 +05302719 (dai_link[i].id ==
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05302720 MSM_BACKEND_DAI_INT3_MI2S_TX)) {
2721 index = of_property_match_string(cdev->of_node,
2722 "asoc-codec-names",
2723 MSM_INT_DIGITAL_CODEC);
2724 phandle = of_parse_phandle(cdev->of_node,
2725 "asoc-codec",
2726 index);
2727 dai_link[i].codecs[DIG_CDC].of_node = phandle;
2728 index = of_property_match_string(cdev->of_node,
2729 "asoc-codec-names",
2730 PMIC_INT_ANALOG_CODEC);
2731 phandle = of_parse_phandle(cdev->of_node,
2732 "asoc-codec",
2733 index);
2734 dai_link[i].codecs[ANA_CDC].of_node = phandle;
2735 }
2736 }
2737 }
2738err:
2739 return ret;
2740}
2741
2742static int msm_wsa881x_init(struct snd_soc_component *component)
2743{
2744 u8 spkleft_ports[WSA881X_MAX_SWR_PORTS] = {100, 101, 102, 106};
2745 u8 spkright_ports[WSA881X_MAX_SWR_PORTS] = {103, 104, 105, 107};
2746 unsigned int ch_rate[WSA881X_MAX_SWR_PORTS] = {2400, 600, 300, 1200};
2747 unsigned int ch_mask[WSA881X_MAX_SWR_PORTS] = {0x1, 0xF, 0x3, 0x3};
2748 struct snd_soc_codec *codec = snd_soc_component_to_codec(component);
2749 struct msm_asoc_mach_data *pdata;
2750 struct snd_soc_dapm_context *dapm =
2751 snd_soc_codec_get_dapm(codec);
2752
2753 if (!codec) {
2754 pr_err("%s codec is NULL\n", __func__);
2755 return -EINVAL;
2756 }
2757
2758 if (!strcmp(component->name_prefix, "SpkrLeft")) {
2759 dev_dbg(codec->dev, "%s: setting left ch map to codec %s\n",
2760 __func__, codec->component.name);
2761 wsa881x_set_channel_map(codec, &spkleft_ports[0],
2762 WSA881X_MAX_SWR_PORTS, &ch_mask[0],
2763 &ch_rate[0]);
2764 if (dapm->component) {
2765 snd_soc_dapm_ignore_suspend(dapm, "SpkrLeft IN");
2766 snd_soc_dapm_ignore_suspend(dapm, "SpkrLeft SPKR");
2767 }
2768 } else if (!strcmp(component->name_prefix, "SpkrRight")) {
2769 dev_dbg(codec->dev, "%s: setting right ch map to codec %s\n",
2770 __func__, codec->component.name);
2771 wsa881x_set_channel_map(codec, &spkright_ports[0],
2772 WSA881X_MAX_SWR_PORTS, &ch_mask[0],
2773 &ch_rate[0]);
2774 if (dapm->component) {
2775 snd_soc_dapm_ignore_suspend(dapm, "SpkrRight IN");
2776 snd_soc_dapm_ignore_suspend(dapm, "SpkrRight SPKR");
2777 }
2778 } else {
2779 dev_err(codec->dev, "%s: wrong codec name %s\n", __func__,
2780 codec->component.name);
2781 return -EINVAL;
2782 }
2783
2784
2785 pdata = snd_soc_card_get_drvdata(component->card);
2786 if (pdata && pdata->codec_root)
2787 wsa881x_codec_info_create_codec_entry(pdata->codec_root,
2788 codec);
2789 return 0;
2790}
2791
2792
2793static int msm_init_wsa_dev(struct platform_device *pdev,
2794 struct snd_soc_card *card)
2795{
2796 struct device_node *wsa_of_node;
2797 u32 wsa_max_devs;
2798 u32 wsa_dev_cnt;
2799 char *dev_name_str = NULL;
2800 struct msm_wsa881x_dev_info *wsa881x_dev_info;
2801 const char *wsa_auxdev_name_prefix[1];
2802 int found = 0;
2803 int i;
2804 int ret;
2805
2806 /* Get maximum WSA device count for this platform */
2807 ret = of_property_read_u32(pdev->dev.of_node,
2808 "qcom,wsa-max-devs", &wsa_max_devs);
2809 if (ret) {
2810 dev_dbg(&pdev->dev,
2811 "%s: wsa-max-devs property missing in DT %s, ret = %d\n",
2812 __func__, pdev->dev.of_node->full_name, ret);
2813 goto err_dt;
2814 }
2815 if (wsa_max_devs == 0) {
2816 dev_warn(&pdev->dev,
2817 "%s: Max WSA devices is 0 for this target?\n",
2818 __func__);
2819 goto err_dt;
2820 }
2821
2822 /* Get count of WSA device phandles for this platform */
2823 wsa_dev_cnt = of_count_phandle_with_args(pdev->dev.of_node,
2824 "qcom,wsa-devs", NULL);
2825 if (wsa_dev_cnt == -ENOENT) {
2826 dev_warn(&pdev->dev, "%s: No wsa device defined in DT.\n",
2827 __func__);
2828 goto err_dt;
2829 } else if (wsa_dev_cnt <= 0) {
2830 dev_err(&pdev->dev,
2831 "%s: Error reading wsa device from DT. wsa_dev_cnt = %d\n",
2832 __func__, wsa_dev_cnt);
2833 ret = -EINVAL;
2834 goto err_dt;
2835 }
2836
2837 /*
2838 * Expect total phandles count to be NOT less than maximum possible
2839 * WSA count. However, if it is less, then assign same value to
2840 * max count as well.
2841 */
2842 if (wsa_dev_cnt < wsa_max_devs) {
2843 dev_dbg(&pdev->dev,
2844 "%s: wsa_max_devs = %d cannot exceed wsa_dev_cnt = %d\n",
2845 __func__, wsa_max_devs, wsa_dev_cnt);
2846 wsa_max_devs = wsa_dev_cnt;
2847 }
2848
2849 /* Make sure prefix string passed for each WSA device */
2850 ret = of_property_count_strings(pdev->dev.of_node,
2851 "qcom,wsa-aux-dev-prefix");
2852 if (ret != wsa_dev_cnt) {
2853 dev_err(&pdev->dev,
2854 "%s: expecting %d wsa prefix. Defined only %d in DT\n",
2855 __func__, wsa_dev_cnt, ret);
2856 ret = -EINVAL;
2857 goto err_dt;
2858 }
2859
2860 /*
2861 * Alloc mem to store phandle and index info of WSA device, if already
2862 * registered with ALSA core
2863 */
2864 wsa881x_dev_info = devm_kcalloc(&pdev->dev, wsa_max_devs,
2865 sizeof(struct msm_wsa881x_dev_info),
2866 GFP_KERNEL);
2867 if (!wsa881x_dev_info) {
2868 ret = -ENOMEM;
2869 goto err_mem;
2870 }
2871
2872 /*
2873 * search and check whether all WSA devices are already
2874 * registered with ALSA core or not. If found a node, store
2875 * the node and the index in a local array of struct for later
2876 * use.
2877 */
2878 for (i = 0; i < wsa_dev_cnt; i++) {
2879 wsa_of_node = of_parse_phandle(pdev->dev.of_node,
2880 "qcom,wsa-devs", i);
2881 if (unlikely(!wsa_of_node)) {
2882 /* we should not be here */
2883 dev_err(&pdev->dev,
2884 "%s: wsa dev node is not present\n",
2885 __func__);
2886 ret = -EINVAL;
2887 goto err_dev_node;
2888 }
2889 if (soc_find_component(wsa_of_node, NULL)) {
2890 /* WSA device registered with ALSA core */
2891 wsa881x_dev_info[found].of_node = wsa_of_node;
2892 wsa881x_dev_info[found].index = i;
2893 found++;
2894 if (found == wsa_max_devs)
2895 break;
2896 }
2897 }
2898
2899 if (found < wsa_max_devs) {
2900 dev_dbg(&pdev->dev,
2901 "%s: failed to find %d components. Found only %d\n",
2902 __func__, wsa_max_devs, found);
2903 return -EPROBE_DEFER;
2904 }
2905 dev_info(&pdev->dev,
2906 "%s: found %d wsa881x devices registered with ALSA core\n",
2907 __func__, found);
2908
2909 card->num_aux_devs = wsa_max_devs;
2910 card->num_configs = wsa_max_devs;
2911
2912 /* Alloc array of AUX devs struct */
2913 msm_aux_dev = devm_kcalloc(&pdev->dev, card->num_aux_devs,
2914 sizeof(struct snd_soc_aux_dev),
2915 GFP_KERNEL);
2916 if (!msm_aux_dev) {
2917 ret = -ENOMEM;
2918 goto err_auxdev_mem;
2919 }
2920
2921 /* Alloc array of codec conf struct */
2922 msm_codec_conf = devm_kcalloc(&pdev->dev, card->num_aux_devs,
2923 sizeof(struct snd_soc_codec_conf),
2924 GFP_KERNEL);
2925 if (!msm_codec_conf) {
2926 ret = -ENOMEM;
2927 goto err_codec_conf;
2928 }
2929
2930 for (i = 0; i < card->num_aux_devs; i++) {
2931 dev_name_str = devm_kzalloc(&pdev->dev, DEV_NAME_STR_LEN,
2932 GFP_KERNEL);
2933 if (!dev_name_str) {
2934 ret = -ENOMEM;
2935 goto err_dev_str;
2936 }
2937
2938 ret = of_property_read_string_index(pdev->dev.of_node,
2939 "qcom,wsa-aux-dev-prefix",
2940 wsa881x_dev_info[i].index,
2941 wsa_auxdev_name_prefix);
2942 if (ret) {
2943 dev_err(&pdev->dev,
2944 "%s: failed to read wsa aux dev prefix, ret = %d\n",
2945 __func__, ret);
2946 ret = -EINVAL;
2947 goto err_dt_prop;
2948 }
2949
2950 snprintf(dev_name_str, strlen("wsa881x.%d"), "wsa881x.%d", i);
2951 msm_aux_dev[i].name = dev_name_str;
2952 msm_aux_dev[i].codec_name = NULL;
2953 msm_aux_dev[i].codec_of_node =
2954 wsa881x_dev_info[i].of_node;
2955 msm_aux_dev[i].init = msm_wsa881x_init;
2956 msm_codec_conf[i].dev_name = NULL;
2957 msm_codec_conf[i].name_prefix = wsa_auxdev_name_prefix[0];
2958 msm_codec_conf[i].of_node = wsa881x_dev_info[i].of_node;
2959 }
2960 card->codec_conf = msm_codec_conf;
2961 card->aux_dev = msm_aux_dev;
2962
2963 return 0;
2964
2965err_dt_prop:
2966 devm_kfree(&pdev->dev, dev_name_str);
2967err_dev_str:
2968 devm_kfree(&pdev->dev, msm_codec_conf);
2969err_codec_conf:
2970 devm_kfree(&pdev->dev, msm_aux_dev);
2971err_auxdev_mem:
2972err_dev_node:
2973 devm_kfree(&pdev->dev, wsa881x_dev_info);
2974err_mem:
2975err_dt:
2976 return ret;
2977}
2978
2979static void msm_free_auxdev_mem(struct platform_device *pdev)
2980{
2981 struct snd_soc_card *card = platform_get_drvdata(pdev);
2982 int i;
2983
2984 if (card->num_aux_devs > 0) {
2985 for (i = 0; i < card->num_aux_devs; i++) {
2986 kfree(msm_aux_dev[i].codec_name);
2987 kfree(msm_codec_conf[i].dev_name);
2988 kfree(msm_codec_conf[i].name_prefix);
2989 }
2990 }
2991}
2992
2993static void i2s_auxpcm_init(struct platform_device *pdev)
2994{
2995 int count;
2996 u32 mi2s_master_slave[MI2S_MAX];
2997 u32 mi2s_ext_mclk[MI2S_MAX];
2998 int ret;
2999
3000 for (count = 0; count < MI2S_MAX; count++) {
3001 mutex_init(&mi2s_intf_conf[count].lock);
3002 mi2s_intf_conf[count].ref_cnt = 0;
3003 }
3004
3005 ret = of_property_read_u32_array(pdev->dev.of_node,
3006 "qcom,msm-mi2s-master",
3007 mi2s_master_slave, MI2S_MAX);
3008 if (ret) {
3009 dev_dbg(&pdev->dev, "%s: no qcom,msm-mi2s-master in DT node\n",
3010 __func__);
3011 } else {
3012 for (count = 0; count < MI2S_MAX; count++) {
3013 mi2s_intf_conf[count].msm_is_mi2s_master =
3014 mi2s_master_slave[count];
3015 }
3016 }
3017
3018 ret = of_property_read_u32_array(pdev->dev.of_node,
3019 "qcom,msm-mi2s-ext-mclk",
3020 mi2s_ext_mclk, MI2S_MAX);
3021 if (ret) {
3022 dev_dbg(&pdev->dev, "%s: no qcom,msm-mi2s-ext-mclk in DT node\n",
3023 __func__);
3024 } else {
3025 for (count = 0; count < MI2S_MAX; count++)
3026 mi2s_intf_conf[count].msm_is_ext_mclk =
3027 mi2s_ext_mclk[count];
3028 }
3029}
3030
3031static const struct of_device_id sdm660_asoc_machine_of_match[] = {
3032 { .compatible = "qcom,sdm660-asoc-snd",
3033 .data = "internal_codec"},
3034 { .compatible = "qcom,sdm660-asoc-snd-tasha",
3035 .data = "tasha_codec"},
3036 { .compatible = "qcom,sdm660-asoc-snd-tavil",
3037 .data = "tavil_codec"},
Laxminath Kasam38070be2017-08-17 18:21:59 +05303038 { .compatible = "qcom,sdm670-asoc-snd",
3039 .data = "internal_codec"},
3040 { .compatible = "qcom,sdm670-asoc-snd-tasha",
3041 .data = "tasha_codec"},
3042 { .compatible = "qcom,sdm670-asoc-snd-tavil",
3043 .data = "tavil_codec"},
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05303044 {},
3045};
3046
3047static int msm_asoc_machine_probe(struct platform_device *pdev)
3048{
3049 struct snd_soc_card *card = NULL;
3050 struct msm_asoc_mach_data *pdata = NULL;
3051 const char *mclk = "qcom,msm-mclk-freq";
3052 int ret = -EINVAL, id;
3053 const struct of_device_id *match;
3054
3055 pdata = devm_kzalloc(&pdev->dev,
3056 sizeof(struct msm_asoc_mach_data),
3057 GFP_KERNEL);
3058 if (!pdata)
3059 return -ENOMEM;
3060
Laxminath Kasam38070be2017-08-17 18:21:59 +05303061 msm_set_codec_reg_done(false);
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05303062 match = of_match_node(sdm660_asoc_machine_of_match,
3063 pdev->dev.of_node);
3064 if (!match)
3065 goto err;
3066
3067 ret = of_property_read_u32(pdev->dev.of_node, mclk, &id);
3068 if (ret) {
3069 dev_err(&pdev->dev,
3070 "%s: missing %s in dt node\n", __func__, mclk);
3071 id = DEFAULT_MCLK_RATE;
3072 }
3073 pdata->mclk_freq = id;
3074
3075 if (!strcmp(match->data, "tasha_codec") ||
3076 !strcmp(match->data, "tavil_codec")) {
3077 if (!strcmp(match->data, "tasha_codec"))
3078 pdata->snd_card_val = EXT_SND_CARD_TASHA;
3079 else
3080 pdata->snd_card_val = EXT_SND_CARD_TAVIL;
3081 ret = msm_ext_cdc_init(pdev, pdata, &card, &mbhc_cfg);
3082 if (ret)
3083 goto err;
3084 } else if (!strcmp(match->data, "internal_codec")) {
3085 pdata->snd_card_val = INT_SND_CARD;
3086 ret = msm_int_cdc_init(pdev, pdata, &card, &mbhc_cfg);
3087 if (ret)
3088 goto err;
3089 } else {
3090 dev_err(&pdev->dev,
3091 "%s: Not a matching DT sound node\n", __func__);
3092 goto err;
3093 }
3094 if (!card)
3095 goto err;
3096
3097 if (pdata->snd_card_val == INT_SND_CARD) {
3098 /*reading the gpio configurations from dtsi file*/
3099 pdata->pdm_gpio_p = of_parse_phandle(pdev->dev.of_node,
3100 "qcom,cdc-pdm-gpios", 0);
3101 pdata->comp_gpio_p = of_parse_phandle(pdev->dev.of_node,
3102 "qcom,cdc-comp-gpios", 0);
3103 pdata->dmic_gpio_p = of_parse_phandle(pdev->dev.of_node,
3104 "qcom,cdc-dmic-gpios", 0);
3105 pdata->ext_spk_gpio_p = of_parse_phandle(pdev->dev.of_node,
3106 "qcom,cdc-ext-spk-gpios", 0);
3107 }
3108
3109 /*
3110 * Parse US-Euro gpio info from DT. Report no error if us-euro
3111 * entry is not found in DT file as some targets do not support
3112 * US-Euro detection
3113 */
3114 pdata->us_euro_gpio = of_get_named_gpio(pdev->dev.of_node,
3115 "qcom,us-euro-gpios", 0);
3116 if (!gpio_is_valid(pdata->us_euro_gpio))
3117 pdata->us_euro_gpio_p = of_parse_phandle(pdev->dev.of_node,
3118 "qcom,us-euro-gpios", 0);
3119 if (!gpio_is_valid(pdata->us_euro_gpio) && (!pdata->us_euro_gpio_p)) {
3120 dev_dbg(&pdev->dev, "property %s not detected in node %s",
3121 "qcom,us-euro-gpios", pdev->dev.of_node->full_name);
3122 } else {
3123 dev_dbg(&pdev->dev, "%s detected",
3124 "qcom,us-euro-gpios");
3125 mbhc_cfg.swap_gnd_mic = msm_swap_gnd_mic;
3126 }
3127
3128 ret = msm_prepare_us_euro(card);
3129 if (ret)
3130 dev_dbg(&pdev->dev, "msm_prepare_us_euro failed (%d)\n",
3131 ret);
3132
3133 i2s_auxpcm_init(pdev);
3134
3135 ret = snd_soc_of_parse_audio_routing(card, "qcom,audio-routing");
3136 if (ret)
3137 goto err;
3138
3139 ret = msm_populate_dai_link_component_of_node(pdata, card);
3140 if (ret) {
3141 ret = -EPROBE_DEFER;
3142 goto err;
3143 }
3144
3145 if (!of_property_read_bool(pdev->dev.of_node, "qcom,wsa-disable")) {
3146 ret = msm_init_wsa_dev(pdev, card);
3147 if (ret)
3148 goto err;
3149 }
3150
3151 ret = devm_snd_soc_register_card(&pdev->dev, card);
3152 if (ret == -EPROBE_DEFER) {
3153 if (codec_reg_done) {
3154 /*
3155 * return failure as EINVAL since other codec
3156 * registered sound card successfully.
3157 * This avoids any further probe calls.
3158 */
3159 ret = -EINVAL;
3160 }
3161 goto err;
3162 } else if (ret) {
3163 dev_err(&pdev->dev, "snd_soc_register_card failed (%d)\n",
3164 ret);
3165 goto err;
3166 }
3167 if (pdata->snd_card_val != INT_SND_CARD)
3168 msm_ext_register_audio_notifier(pdev);
3169
3170 return 0;
3171err:
3172 if (pdata->us_euro_gpio > 0) {
3173 dev_dbg(&pdev->dev, "%s free us_euro gpio %d\n",
3174 __func__, pdata->us_euro_gpio);
3175 pdata->us_euro_gpio = 0;
3176 }
3177 if (pdata->hph_en1_gpio > 0) {
3178 dev_dbg(&pdev->dev, "%s free hph_en1_gpio %d\n",
3179 __func__, pdata->hph_en1_gpio);
3180 gpio_free(pdata->hph_en1_gpio);
3181 pdata->hph_en1_gpio = 0;
3182 }
3183 if (pdata->hph_en0_gpio > 0) {
3184 dev_dbg(&pdev->dev, "%s free hph_en0_gpio %d\n",
3185 __func__, pdata->hph_en0_gpio);
3186 gpio_free(pdata->hph_en0_gpio);
3187 pdata->hph_en0_gpio = 0;
3188 }
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05303189 devm_kfree(&pdev->dev, pdata);
3190 return ret;
3191}
3192
3193static int msm_asoc_machine_remove(struct platform_device *pdev)
3194{
3195 struct snd_soc_card *card = platform_get_drvdata(pdev);
3196 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
3197
3198 if (pdata->snd_card_val == INT_SND_CARD)
3199 mutex_destroy(&pdata->cdc_int_mclk0_mutex);
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05303200
Laxminath Kasam8f7ccc22017-08-28 17:35:04 +05303201 msm_free_auxdev_mem(pdev);
Asish Bhattacharya8e2277f2017-07-20 18:31:55 +05303202 gpio_free(pdata->us_euro_gpio);
3203 gpio_free(pdata->hph_en1_gpio);
3204 gpio_free(pdata->hph_en0_gpio);
3205 snd_soc_unregister_card(card);
3206 return 0;
3207}
3208
3209static struct platform_driver sdm660_asoc_machine_driver = {
3210 .driver = {
3211 .name = DRV_NAME,
3212 .owner = THIS_MODULE,
3213 .pm = &snd_soc_pm_ops,
3214 .of_match_table = sdm660_asoc_machine_of_match,
3215 },
3216 .probe = msm_asoc_machine_probe,
3217 .remove = msm_asoc_machine_remove,
3218};
3219module_platform_driver(sdm660_asoc_machine_driver);
3220
3221MODULE_DESCRIPTION("ALSA SoC msm");
3222MODULE_LICENSE("GPL v2");
3223MODULE_ALIAS("platform:" DRV_NAME);
3224MODULE_DEVICE_TABLE(of, sdm660_asoc_machine_of_match);