Gitiles
Code Review Sign In
gerrit-public.fairphone.software / platform / vendor / opensource / audio-kernel / 997da40118c577f37bde0d1629410779fdde0c61 / . / asoc / sm6150.c
blob: 46b5c70b9494207115ac7f1ab5284e93a47beebb [file] [log] [blame]
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1/*
2 * Copyright (c) 2018, The Linux Foundation. All rights reserved.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 and
6 * only version 2 as published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 */
13
14#include <linux/clk.h>
15#include <linux/delay.h>
16#include <linux/gpio.h>
17#include <linux/of_gpio.h>
18#include <linux/platform_device.h>
19#include <linux/slab.h>
20#include <linux/io.h>
21#include <linux/module.h>
22#include <linux/input.h>
23#include <linux/of_device.h>
24#include <linux/pm_qos.h>
25#include <sound/core.h>
26#include <sound/soc.h>
27#include <sound/soc-dapm.h>
28#include <sound/pcm.h>
29#include <sound/pcm_params.h>
30#include <sound/info.h>
31#include <dsp/audio_notifier.h>
32#include <dsp/q6afe-v2.h>
33#include <dsp/q6core.h>
34#include "device_event.h"
35#include "msm-pcm-routing-v2.h"
36#include "codecs/msm-cdc-pinctrl.h"
37#include "codecs/wcd934x/wcd934x.h"
38#include "codecs/wcd934x/wcd934x-mbhc.h"
Ramprasad Katkam997da402018-08-17 20:20:06 +0530[diff] [blame^]39#include "codecs/wcd937x/wcd937x-mbhc.h"
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]40#include "codecs/wsa881x.h"
41#include "codecs/bolero/bolero-cdc.h"
42#include <dt-bindings/sound/audio-codec-port-types.h>
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]43#include "codecs/bolero/wsa-macro.h"
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]44
45#define DRV_NAME "sm6150-asoc-snd"
46
47#define __CHIPSET__ "SM6150 "
48#define MSM_DAILINK_NAME(name) (__CHIPSET__#name)
49
50#define SAMPLING_RATE_8KHZ 8000
51#define SAMPLING_RATE_11P025KHZ 11025
52#define SAMPLING_RATE_16KHZ 16000
53#define SAMPLING_RATE_22P05KHZ 22050
54#define SAMPLING_RATE_32KHZ 32000
55#define SAMPLING_RATE_44P1KHZ 44100
56#define SAMPLING_RATE_48KHZ 48000
57#define SAMPLING_RATE_88P2KHZ 88200
58#define SAMPLING_RATE_96KHZ 96000
59#define SAMPLING_RATE_176P4KHZ 176400
60#define SAMPLING_RATE_192KHZ 192000
61#define SAMPLING_RATE_352P8KHZ 352800
62#define SAMPLING_RATE_384KHZ 384000
63
64#define WCD9XXX_MBHC_DEF_BUTTONS 8
65#define WCD9XXX_MBHC_DEF_RLOADS 5
66#define CODEC_EXT_CLK_RATE 9600000
67#define ADSP_STATE_READY_TIMEOUT_MS 3000
68#define DEV_NAME_STR_LEN 32
69
70#define WSA8810_NAME_1 "wsa881x.20170211"
71#define WSA8810_NAME_2 "wsa881x.20170212"
72#define WCN_CDC_SLIM_RX_CH_MAX 2
73#define WCN_CDC_SLIM_TX_CH_MAX 3
74#define TDM_CHANNEL_MAX 8
75
76#define ADSP_STATE_READY_TIMEOUT_MS 3000
77#define MSM_LL_QOS_VALUE 300 /* time in us to ensure LPM doesn't go in C3/C4 */
78#define MSM_HIFI_ON 1
79
80enum {
81 SLIM_RX_0 = 0,
82 SLIM_RX_1,
83 SLIM_RX_2,
84 SLIM_RX_3,
85 SLIM_RX_4,
86 SLIM_RX_5,
87 SLIM_RX_6,
88 SLIM_RX_7,
89 SLIM_RX_MAX,
90};
91enum {
92 SLIM_TX_0 = 0,
93 SLIM_TX_1,
94 SLIM_TX_2,
95 SLIM_TX_3,
96 SLIM_TX_4,
97 SLIM_TX_5,
98 SLIM_TX_6,
99 SLIM_TX_7,
100 SLIM_TX_8,
101 SLIM_TX_MAX,
102};
103
104enum {
105 PRIM_MI2S = 0,
106 SEC_MI2S,
107 TERT_MI2S,
108 QUAT_MI2S,
109 QUIN_MI2S,
110 MI2S_MAX,
111};
112
113enum {
114 PRIM_AUX_PCM = 0,
115 SEC_AUX_PCM,
116 TERT_AUX_PCM,
117 QUAT_AUX_PCM,
118 QUIN_AUX_PCM,
119 AUX_PCM_MAX,
120};
121
122enum {
123 WSA_CDC_DMA_RX_0 = 0,
124 WSA_CDC_DMA_RX_1,
125 RX_CDC_DMA_RX_0,
126 RX_CDC_DMA_RX_1,
127 RX_CDC_DMA_RX_2,
128 RX_CDC_DMA_RX_3,
129 RX_CDC_DMA_RX_5,
130 CDC_DMA_RX_MAX,
131};
132
133enum {
134 WSA_CDC_DMA_TX_0 = 0,
135 WSA_CDC_DMA_TX_1,
136 WSA_CDC_DMA_TX_2,
137 TX_CDC_DMA_TX_0,
138 TX_CDC_DMA_TX_3,
139 TX_CDC_DMA_TX_4,
140 CDC_DMA_TX_MAX,
141};
142
143struct mi2s_conf {
144 struct mutex lock;
145 u32 ref_cnt;
146 u32 msm_is_mi2s_master;
147};
148
149static u32 mi2s_ebit_clk[MI2S_MAX] = {
150 Q6AFE_LPASS_CLK_ID_PRI_MI2S_EBIT,
151 Q6AFE_LPASS_CLK_ID_SEC_MI2S_EBIT,
152 Q6AFE_LPASS_CLK_ID_TER_MI2S_EBIT,
153 Q6AFE_LPASS_CLK_ID_QUAD_MI2S_EBIT,
154 Q6AFE_LPASS_CLK_ID_QUI_MI2S_EBIT
155};
156
157struct dev_config {
158 u32 sample_rate;
159 u32 bit_format;
160 u32 channels;
161};
162
163enum {
164 DP_RX_IDX = 0,
165 EXT_DISP_RX_IDX_MAX,
166};
167
168struct msm_wsa881x_dev_info {
169 struct device_node *of_node;
170 u32 index;
171};
172
173struct aux_codec_dev_info {
174 struct device_node *of_node;
175 u32 index;
176};
177
178enum pinctrl_pin_state {
179 STATE_DISABLE = 0, /* All pins are in sleep state */
180 STATE_MI2S_ACTIVE, /* I2S = active, TDM = sleep */
181 STATE_TDM_ACTIVE, /* I2S = sleep, TDM = active */
182};
183
184struct msm_pinctrl_info {
185 struct pinctrl *pinctrl;
186 struct pinctrl_state *mi2s_disable;
187 struct pinctrl_state *tdm_disable;
188 struct pinctrl_state *mi2s_active;
189 struct pinctrl_state *tdm_active;
190 enum pinctrl_pin_state curr_state;
191};
192
193struct msm_asoc_mach_data {
194 struct snd_info_entry *codec_root;
195 struct msm_pinctrl_info pinctrl_info;
196 int usbc_en2_gpio; /* used by gpio driver API */
197 struct device_node *dmic01_gpio_p; /* used by pinctrl API */
198 struct device_node *dmic23_gpio_p; /* used by pinctrl API */
199 struct device_node *us_euro_gpio_p; /* used by pinctrl API */
200 struct pinctrl *usbc_en2_gpio_p; /* used by pinctrl API */
201 struct device_node *hph_en1_gpio_p; /* used by pinctrl API */
202 struct device_node *hph_en0_gpio_p; /* used by pinctrl API */
203};
204
205struct msm_asoc_wcd93xx_codec {
206 void* (*get_afe_config_fn)(struct snd_soc_codec *codec,
207 enum afe_config_type config_type);
208};
209
210static const char *const pin_states[] = {"sleep", "i2s-active",
211 "tdm-active"};
212
213static struct snd_soc_card snd_soc_card_sm6150_msm;
214
215enum {
216 TDM_0 = 0,
217 TDM_1,
218 TDM_2,
219 TDM_3,
220 TDM_4,
221 TDM_5,
222 TDM_6,
223 TDM_7,
224 TDM_PORT_MAX,
225};
226
227enum {
228 TDM_PRI = 0,
229 TDM_SEC,
230 TDM_TERT,
231 TDM_QUAT,
232 TDM_QUIN,
233 TDM_INTERFACE_MAX,
234};
235
236struct tdm_port {
237 u32 mode;
238 u32 channel;
239};
240
241/* TDM default config */
242static struct dev_config tdm_rx_cfg[TDM_INTERFACE_MAX][TDM_PORT_MAX] = {
243 { /* PRI TDM */
244 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
245 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
246 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
247 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
248 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
249 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
250 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
251 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
252 },
253 { /* SEC TDM */
254 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
255 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
256 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
257 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
258 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
259 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
260 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
261 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
262 },
263 { /* TERT TDM */
264 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
265 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
266 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
267 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
268 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
269 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
270 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
271 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
272 },
273 { /* QUAT TDM */
274 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
275 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
276 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
277 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
278 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
279 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
280 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
281 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
282 },
283 { /* QUIN TDM */
284 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
285 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
286 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
287 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
288 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
289 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
290 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
291 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
292 }
293
294};
295
296/* TDM default config */
297static struct dev_config tdm_tx_cfg[TDM_INTERFACE_MAX][TDM_PORT_MAX] = {
298 { /* PRI TDM */
299 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
300 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
301 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
302 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
303 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
304 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
305 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
306 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
307 },
308 { /* SEC TDM */
309 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
310 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
311 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
312 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
313 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
314 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
315 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
316 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
317 },
318 { /* TERT TDM */
319 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
320 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
321 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
322 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
323 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
324 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
325 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
326 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
327 },
328 { /* QUAT TDM */
329 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
330 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
331 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
332 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
333 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
334 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
335 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
336 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
337 },
338 { /* QUIN TDM */
339 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
340 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
341 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
342 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
343 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
344 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
345 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
346 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
347 }
348};
349
350
351/* Default configuration of slimbus channels */
352static struct dev_config slim_rx_cfg[] = {
353 [SLIM_RX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
354 [SLIM_RX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
355 [SLIM_RX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
356 [SLIM_RX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
357 [SLIM_RX_4] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
358 [SLIM_RX_5] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
359 [SLIM_RX_6] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
360 [SLIM_RX_7] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
361};
362
363static struct dev_config slim_tx_cfg[] = {
364 [SLIM_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
365 [SLIM_TX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
366 [SLIM_TX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
367 [SLIM_TX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
368 [SLIM_TX_4] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
369 [SLIM_TX_5] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
370 [SLIM_TX_6] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
371 [SLIM_TX_7] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
372 [SLIM_TX_8] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
373};
374
375/* Default configuration of Codec DMA Interface Tx */
376static struct dev_config cdc_dma_rx_cfg[] = {
377 [WSA_CDC_DMA_RX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
378 [WSA_CDC_DMA_RX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
379 [RX_CDC_DMA_RX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
380 [RX_CDC_DMA_RX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
381 [RX_CDC_DMA_RX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
382 [RX_CDC_DMA_RX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
383 [RX_CDC_DMA_RX_5] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
384};
385
386/* Default configuration of Codec DMA Interface Rx */
387static struct dev_config cdc_dma_tx_cfg[] = {
388 [WSA_CDC_DMA_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
389 [WSA_CDC_DMA_TX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
390 [WSA_CDC_DMA_TX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
391 [TX_CDC_DMA_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
392 [TX_CDC_DMA_TX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
393 [TX_CDC_DMA_TX_4] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
394};
395
396/* Default configuration of external display BE */
397static struct dev_config ext_disp_rx_cfg[] = {
398 [DP_RX_IDX] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
399};
400
401static struct dev_config usb_rx_cfg = {
402 .sample_rate = SAMPLING_RATE_48KHZ,
403 .bit_format = SNDRV_PCM_FORMAT_S16_LE,
404 .channels = 2,
405};
406
407static struct dev_config usb_tx_cfg = {
408 .sample_rate = SAMPLING_RATE_48KHZ,
409 .bit_format = SNDRV_PCM_FORMAT_S16_LE,
410 .channels = 1,
411};
412
413static struct dev_config proxy_rx_cfg = {
414 .sample_rate = SAMPLING_RATE_48KHZ,
415 .bit_format = SNDRV_PCM_FORMAT_S16_LE,
416 .channels = 2,
417};
418
419/* Default configuration of MI2S channels */
420static struct dev_config mi2s_rx_cfg[] = {
421 [PRIM_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
422 [SEC_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
423 [TERT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
424 [QUAT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
425 [QUIN_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
426};
427
428static struct dev_config mi2s_tx_cfg[] = {
429 [PRIM_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
430 [SEC_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
431 [TERT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
432 [QUAT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
433 [QUIN_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
434};
435
436static struct dev_config aux_pcm_rx_cfg[] = {
437 [PRIM_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
438 [SEC_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
439 [TERT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
440 [QUAT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
441 [QUIN_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
442};
443
444static struct dev_config aux_pcm_tx_cfg[] = {
445 [PRIM_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
446 [SEC_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
447 [TERT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
448 [QUAT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
449 [QUIN_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
450};
451static int msm_vi_feed_tx_ch = 2;
452static const char *const slim_rx_ch_text[] = {"One", "Two"};
453static const char *const slim_tx_ch_text[] = {"One", "Two", "Three", "Four",
454 "Five", "Six", "Seven",
455 "Eight"};
456static const char *const vi_feed_ch_text[] = {"One", "Two"};
457static char const *bit_format_text[] = {"S16_LE", "S24_LE", "S24_3LE",
458 "S32_LE"};
459static char const *ext_disp_bit_format_text[] = {"S16_LE", "S24_LE",
460 "S24_3LE"};
461static char const *slim_sample_rate_text[] = {"KHZ_8", "KHZ_16",
462 "KHZ_32", "KHZ_44P1", "KHZ_48",
463 "KHZ_88P2", "KHZ_96", "KHZ_176P4",
464 "KHZ_192", "KHZ_352P8", "KHZ_384"};
465static char const *bt_sample_rate_text[] = {"KHZ_8", "KHZ_16",
466 "KHZ_44P1", "KHZ_48",
467 "KHZ_88P2", "KHZ_96"};
468static const char *const usb_ch_text[] = {"One", "Two", "Three", "Four",
469 "Five", "Six", "Seven",
470 "Eight"};
471static char const *ch_text[] = {"Two", "Three", "Four", "Five",
472 "Six", "Seven", "Eight"};
473static char const *usb_sample_rate_text[] = {"KHZ_8", "KHZ_11P025",
474 "KHZ_16", "KHZ_22P05",
475 "KHZ_32", "KHZ_44P1", "KHZ_48",
476 "KHZ_88P2", "KHZ_96", "KHZ_176P4",
477 "KHZ_192", "KHZ_352P8", "KHZ_384"};
478static char const *ext_disp_sample_rate_text[] = {"KHZ_48", "KHZ_96",
479 "KHZ_192", "KHZ_32", "KHZ_44P1",
480 "KHZ_88P2", "KHZ_176P4" };
481static char const *tdm_ch_text[] = {"One", "Two", "Three", "Four",
482 "Five", "Six", "Seven", "Eight"};
483static char const *tdm_bit_format_text[] = {"S16_LE", "S24_LE", "S32_LE"};
484static char const *tdm_sample_rate_text[] = {"KHZ_8", "KHZ_16", "KHZ_32",
485 "KHZ_48", "KHZ_176P4",
486 "KHZ_352P8"};
487static const char *const auxpcm_rate_text[] = {"KHZ_8", "KHZ_16"};
488static char const *mi2s_rate_text[] = {"KHZ_8", "KHZ_11P025", "KHZ_16",
489 "KHZ_22P05", "KHZ_32", "KHZ_44P1",
490 "KHZ_48", "KHZ_96", "KHZ_192"};
491static const char *const mi2s_ch_text[] = {"One", "Two", "Three", "Four",
492 "Five", "Six", "Seven",
493 "Eight"};
494static const char *const hifi_text[] = {"Off", "On"};
495static const char *const qos_text[] = {"Disable", "Enable"};
496
497static const char *const cdc_dma_rx_ch_text[] = {"One", "Two"};
498static const char *const cdc_dma_tx_ch_text[] = {"One", "Two", "Three", "Four",
499 "Five", "Six", "Seven",
500 "Eight"};
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]501static char const *cdc_dma_sample_rate_text[] = {"KHZ_8", "KHZ_11P025",
502 "KHZ_16", "KHZ_22P05",
503 "KHZ_32", "KHZ_44P1", "KHZ_48",
504 "KHZ_88P2", "KHZ_96",
505 "KHZ_176P4", "KHZ_192",
506 "KHZ_352P8", "KHZ_384"};
507
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]508
509static SOC_ENUM_SINGLE_EXT_DECL(slim_0_rx_chs, slim_rx_ch_text);
510static SOC_ENUM_SINGLE_EXT_DECL(slim_2_rx_chs, slim_rx_ch_text);
511static SOC_ENUM_SINGLE_EXT_DECL(slim_0_tx_chs, slim_tx_ch_text);
512static SOC_ENUM_SINGLE_EXT_DECL(slim_1_tx_chs, slim_tx_ch_text);
513static SOC_ENUM_SINGLE_EXT_DECL(slim_5_rx_chs, slim_rx_ch_text);
514static SOC_ENUM_SINGLE_EXT_DECL(slim_6_rx_chs, slim_rx_ch_text);
515static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_chs, usb_ch_text);
516static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_chs, usb_ch_text);
517static SOC_ENUM_SINGLE_EXT_DECL(vi_feed_tx_chs, vi_feed_ch_text);
518static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_chs, ch_text);
519static SOC_ENUM_SINGLE_EXT_DECL(proxy_rx_chs, ch_text);
520static SOC_ENUM_SINGLE_EXT_DECL(slim_0_rx_format, bit_format_text);
521static SOC_ENUM_SINGLE_EXT_DECL(slim_5_rx_format, bit_format_text);
522static SOC_ENUM_SINGLE_EXT_DECL(slim_6_rx_format, bit_format_text);
523static SOC_ENUM_SINGLE_EXT_DECL(slim_0_tx_format, bit_format_text);
524static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_format, bit_format_text);
525static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_format, bit_format_text);
526static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_format, ext_disp_bit_format_text);
527static SOC_ENUM_SINGLE_EXT_DECL(slim_0_rx_sample_rate, slim_sample_rate_text);
528static SOC_ENUM_SINGLE_EXT_DECL(slim_2_rx_sample_rate, slim_sample_rate_text);
529static SOC_ENUM_SINGLE_EXT_DECL(slim_0_tx_sample_rate, slim_sample_rate_text);
530static SOC_ENUM_SINGLE_EXT_DECL(slim_5_rx_sample_rate, slim_sample_rate_text);
531static SOC_ENUM_SINGLE_EXT_DECL(slim_6_rx_sample_rate, slim_sample_rate_text);
532static SOC_ENUM_SINGLE_EXT_DECL(bt_sample_rate, bt_sample_rate_text);
533static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_sample_rate, usb_sample_rate_text);
534static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_sample_rate, usb_sample_rate_text);
535static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_sample_rate,
536 ext_disp_sample_rate_text);
537static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_chs, tdm_ch_text);
538static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_format, tdm_bit_format_text);
539static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_sample_rate, tdm_sample_rate_text);
540static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_chs, tdm_ch_text);
541static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_format, tdm_bit_format_text);
542static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_sample_rate, tdm_sample_rate_text);
543static SOC_ENUM_SINGLE_EXT_DECL(prim_aux_pcm_rx_sample_rate, auxpcm_rate_text);
544static SOC_ENUM_SINGLE_EXT_DECL(sec_aux_pcm_rx_sample_rate, auxpcm_rate_text);
545static SOC_ENUM_SINGLE_EXT_DECL(tert_aux_pcm_rx_sample_rate, auxpcm_rate_text);
546static SOC_ENUM_SINGLE_EXT_DECL(quat_aux_pcm_rx_sample_rate, auxpcm_rate_text);
547static SOC_ENUM_SINGLE_EXT_DECL(quin_aux_pcm_rx_sample_rate, auxpcm_rate_text);
548static SOC_ENUM_SINGLE_EXT_DECL(prim_aux_pcm_tx_sample_rate, auxpcm_rate_text);
549static SOC_ENUM_SINGLE_EXT_DECL(sec_aux_pcm_tx_sample_rate, auxpcm_rate_text);
550static SOC_ENUM_SINGLE_EXT_DECL(tert_aux_pcm_tx_sample_rate, auxpcm_rate_text);
551static SOC_ENUM_SINGLE_EXT_DECL(quat_aux_pcm_tx_sample_rate, auxpcm_rate_text);
552static SOC_ENUM_SINGLE_EXT_DECL(quin_aux_pcm_tx_sample_rate, auxpcm_rate_text);
553static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_rx_sample_rate, mi2s_rate_text);
554static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_rx_sample_rate, mi2s_rate_text);
555static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_rx_sample_rate, mi2s_rate_text);
556static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_rx_sample_rate, mi2s_rate_text);
557static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_rx_sample_rate, mi2s_rate_text);
558static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_tx_sample_rate, mi2s_rate_text);
559static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_tx_sample_rate, mi2s_rate_text);
560static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_tx_sample_rate, mi2s_rate_text);
561static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_tx_sample_rate, mi2s_rate_text);
562static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_tx_sample_rate, mi2s_rate_text);
563static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_rx_chs, mi2s_ch_text);
564static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_tx_chs, mi2s_ch_text);
565static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_rx_chs, mi2s_ch_text);
566static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_tx_chs, mi2s_ch_text);
567static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_rx_chs, mi2s_ch_text);
568static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_tx_chs, mi2s_ch_text);
569static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_rx_chs, mi2s_ch_text);
570static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_tx_chs, mi2s_ch_text);
571static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_rx_chs, mi2s_ch_text);
572static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_tx_chs, mi2s_ch_text);
573static SOC_ENUM_SINGLE_EXT_DECL(mi2s_rx_format, bit_format_text);
574static SOC_ENUM_SINGLE_EXT_DECL(mi2s_tx_format, bit_format_text);
575static SOC_ENUM_SINGLE_EXT_DECL(aux_pcm_rx_format, bit_format_text);
576static SOC_ENUM_SINGLE_EXT_DECL(aux_pcm_tx_format, bit_format_text);
577static SOC_ENUM_SINGLE_EXT_DECL(hifi_function, hifi_text);
578static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_chs, cdc_dma_rx_ch_text);
579static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_chs, cdc_dma_rx_ch_text);
580static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_chs, cdc_dma_rx_ch_text);
581static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_chs, cdc_dma_rx_ch_text);
582static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_chs, cdc_dma_rx_ch_text);
583static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_chs, cdc_dma_rx_ch_text);
584static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_chs, cdc_dma_rx_ch_text);
585static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_0_chs, cdc_dma_tx_ch_text);
586static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_chs, cdc_dma_tx_ch_text);
587static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_chs, cdc_dma_tx_ch_text);
588static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_chs, cdc_dma_tx_ch_text);
589static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_chs, cdc_dma_tx_ch_text);
590static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_chs, cdc_dma_tx_ch_text);
591static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_format, bit_format_text);
592static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_format, bit_format_text);
593static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_format, bit_format_text);
594static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_format, bit_format_text);
595static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_format, bit_format_text);
596static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_format, bit_format_text);
597static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_format, bit_format_text);
598static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_format, bit_format_text);
599static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_format, bit_format_text);
600static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_format, bit_format_text);
601static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_format, bit_format_text);
602static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_format, bit_format_text);
603static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_sample_rate,
604 cdc_dma_sample_rate_text);
605static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_sample_rate,
606 cdc_dma_sample_rate_text);
607static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_sample_rate,
608 cdc_dma_sample_rate_text);
609static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_sample_rate,
610 cdc_dma_sample_rate_text);
611static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_sample_rate,
612 cdc_dma_sample_rate_text);
613static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_sample_rate,
614 cdc_dma_sample_rate_text);
615static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_sample_rate,
616 cdc_dma_sample_rate_text);
617static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_0_sample_rate,
618 cdc_dma_sample_rate_text);
619static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_sample_rate,
620 cdc_dma_sample_rate_text);
621static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_sample_rate,
622 cdc_dma_sample_rate_text);
623static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_sample_rate,
624 cdc_dma_sample_rate_text);
625static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_sample_rate,
626 cdc_dma_sample_rate_text);
627static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_sample_rate,
628 cdc_dma_sample_rate_text);
629
630static struct platform_device *spdev;
631
632static int msm_hifi_control;
633static bool is_initial_boot;
634static bool codec_reg_done;
635static struct snd_soc_aux_dev *msm_aux_dev;
636static struct snd_soc_codec_conf *msm_codec_conf;
637static struct msm_asoc_wcd93xx_codec msm_codec_fn;
638
639static int dmic_0_1_gpio_cnt;
640static int dmic_2_3_gpio_cnt;
641
642static void *def_wcd_mbhc_cal(void);
643static int msm_snd_enable_codec_ext_clk(struct snd_soc_codec *codec,
644 int enable, bool dapm);
645static int msm_wsa881x_init(struct snd_soc_component *component);
646static int msm_aux_codec_init(struct snd_soc_component *component);
647
648/*
649 * Need to report LINEIN
650 * if R/L channel impedance is larger than 5K ohm
651 */
652static struct wcd_mbhc_config wcd_mbhc_cfg = {
653 .read_fw_bin = false,
654 .calibration = NULL,
655 .detect_extn_cable = true,
656 .mono_stero_detection = false,
657 .swap_gnd_mic = NULL,
658 .hs_ext_micbias = true,
659 .key_code[0] = KEY_MEDIA,
660 .key_code[1] = KEY_VOICECOMMAND,
661 .key_code[2] = KEY_VOLUMEUP,
662 .key_code[3] = KEY_VOLUMEDOWN,
663 .key_code[4] = 0,
664 .key_code[5] = 0,
665 .key_code[6] = 0,
666 .key_code[7] = 0,
667 .linein_th = 5000,
668 .moisture_en = true,
669 .mbhc_micbias = MIC_BIAS_2,
670 .anc_micbias = MIC_BIAS_2,
671 .enable_anc_mic_detect = false,
672};
673
674static struct snd_soc_dapm_route wcd_audio_paths_tavil[] = {
675 {"MIC BIAS1", NULL, "MCLK TX"},
676 {"MIC BIAS2", NULL, "MCLK TX"},
677 {"MIC BIAS3", NULL, "MCLK TX"},
678 {"MIC BIAS4", NULL, "MCLK TX"},
679};
680
681static struct afe_clk_set mi2s_clk[MI2S_MAX] = {
682 {
683 AFE_API_VERSION_I2S_CONFIG,
684 Q6AFE_LPASS_CLK_ID_PRI_MI2S_IBIT,
685 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
686 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
687 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
688 0,
689 },
690 {
691 AFE_API_VERSION_I2S_CONFIG,
692 Q6AFE_LPASS_CLK_ID_SEC_MI2S_IBIT,
693 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
694 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
695 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
696 0,
697 },
698 {
699 AFE_API_VERSION_I2S_CONFIG,
700 Q6AFE_LPASS_CLK_ID_TER_MI2S_IBIT,
701 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
702 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
703 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
704 0,
705 },
706 {
707 AFE_API_VERSION_I2S_CONFIG,
708 Q6AFE_LPASS_CLK_ID_QUAD_MI2S_IBIT,
709 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
710 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
711 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
712 0,
713 },
714 {
715 AFE_API_VERSION_I2S_CONFIG,
716 Q6AFE_LPASS_CLK_ID_QUI_MI2S_IBIT,
717 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
718 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
719 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
720 0,
721 }
722
723};
724
725static struct mi2s_conf mi2s_intf_conf[MI2S_MAX];
726
727static int slim_get_sample_rate_val(int sample_rate)
728{
729 int sample_rate_val = 0;
730
731 switch (sample_rate) {
732 case SAMPLING_RATE_8KHZ:
733 sample_rate_val = 0;
734 break;
735 case SAMPLING_RATE_16KHZ:
736 sample_rate_val = 1;
737 break;
738 case SAMPLING_RATE_32KHZ:
739 sample_rate_val = 2;
740 break;
741 case SAMPLING_RATE_44P1KHZ:
742 sample_rate_val = 3;
743 break;
744 case SAMPLING_RATE_48KHZ:
745 sample_rate_val = 4;
746 break;
747 case SAMPLING_RATE_88P2KHZ:
748 sample_rate_val = 5;
749 break;
750 case SAMPLING_RATE_96KHZ:
751 sample_rate_val = 6;
752 break;
753 case SAMPLING_RATE_176P4KHZ:
754 sample_rate_val = 7;
755 break;
756 case SAMPLING_RATE_192KHZ:
757 sample_rate_val = 8;
758 break;
759 case SAMPLING_RATE_352P8KHZ:
760 sample_rate_val = 9;
761 break;
762 case SAMPLING_RATE_384KHZ:
763 sample_rate_val = 10;
764 break;
765 default:
766 sample_rate_val = 4;
767 break;
768 }
769 return sample_rate_val;
770}
771
772static int slim_get_sample_rate(int value)
773{
774 int sample_rate = 0;
775
776 switch (value) {
777 case 0:
778 sample_rate = SAMPLING_RATE_8KHZ;
779 break;
780 case 1:
781 sample_rate = SAMPLING_RATE_16KHZ;
782 break;
783 case 2:
784 sample_rate = SAMPLING_RATE_32KHZ;
785 break;
786 case 3:
787 sample_rate = SAMPLING_RATE_44P1KHZ;
788 break;
789 case 4:
790 sample_rate = SAMPLING_RATE_48KHZ;
791 break;
792 case 5:
793 sample_rate = SAMPLING_RATE_88P2KHZ;
794 break;
795 case 6:
796 sample_rate = SAMPLING_RATE_96KHZ;
797 break;
798 case 7:
799 sample_rate = SAMPLING_RATE_176P4KHZ;
800 break;
801 case 8:
802 sample_rate = SAMPLING_RATE_192KHZ;
803 break;
804 case 9:
805 sample_rate = SAMPLING_RATE_352P8KHZ;
806 break;
807 case 10:
808 sample_rate = SAMPLING_RATE_384KHZ;
809 break;
810 default:
811 sample_rate = SAMPLING_RATE_48KHZ;
812 break;
813 }
814 return sample_rate;
815}
816
817static int slim_get_bit_format_val(int bit_format)
818{
819 int val = 0;
820
821 switch (bit_format) {
822 case SNDRV_PCM_FORMAT_S32_LE:
823 val = 3;
824 break;
825 case SNDRV_PCM_FORMAT_S24_3LE:
826 val = 2;
827 break;
828 case SNDRV_PCM_FORMAT_S24_LE:
829 val = 1;
830 break;
831 case SNDRV_PCM_FORMAT_S16_LE:
832 default:
833 val = 0;
834 break;
835 }
836 return val;
837}
838
839static int slim_get_bit_format(int val)
840{
841 int bit_fmt = SNDRV_PCM_FORMAT_S16_LE;
842
843 switch (val) {
844 case 0:
845 bit_fmt = SNDRV_PCM_FORMAT_S16_LE;
846 break;
847 case 1:
848 bit_fmt = SNDRV_PCM_FORMAT_S24_LE;
849 break;
850 case 2:
851 bit_fmt = SNDRV_PCM_FORMAT_S24_3LE;
852 break;
853 case 3:
854 bit_fmt = SNDRV_PCM_FORMAT_S32_LE;
855 break;
856 default:
857 bit_fmt = SNDRV_PCM_FORMAT_S16_LE;
858 break;
859 }
860 return bit_fmt;
861}
862
863static int slim_get_port_idx(struct snd_kcontrol *kcontrol)
864{
865 int port_id = 0;
866
867 if (strnstr(kcontrol->id.name, "SLIM_0_RX", sizeof("SLIM_0_RX"))) {
868 port_id = SLIM_RX_0;
869 } else if (strnstr(kcontrol->id.name,
870 "SLIM_2_RX", sizeof("SLIM_2_RX"))) {
871 port_id = SLIM_RX_2;
872 } else if (strnstr(kcontrol->id.name,
873 "SLIM_5_RX", sizeof("SLIM_5_RX"))) {
874 port_id = SLIM_RX_5;
875 } else if (strnstr(kcontrol->id.name,
876 "SLIM_6_RX", sizeof("SLIM_6_RX"))) {
877 port_id = SLIM_RX_6;
878 } else if (strnstr(kcontrol->id.name,
879 "SLIM_0_TX", sizeof("SLIM_0_TX"))) {
880 port_id = SLIM_TX_0;
881 } else if (strnstr(kcontrol->id.name,
882 "SLIM_1_TX", sizeof("SLIM_1_TX"))) {
883 port_id = SLIM_TX_1;
884 } else {
885 pr_err("%s: unsupported channel: %s\n",
886 __func__, kcontrol->id.name);
887 return -EINVAL;
888 }
889
890 return port_id;
891}
892
893static int slim_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
894 struct snd_ctl_elem_value *ucontrol)
895{
896 int ch_num = slim_get_port_idx(kcontrol);
897
898 if (ch_num < 0)
899 return ch_num;
900
901 ucontrol->value.enumerated.item[0] =
902 slim_get_sample_rate_val(slim_rx_cfg[ch_num].sample_rate);
903
904 pr_debug("%s: slim[%d]_rx_sample_rate = %d, item = %d\n", __func__,
905 ch_num, slim_rx_cfg[ch_num].sample_rate,
906 ucontrol->value.enumerated.item[0]);
907
908 return 0;
909}
910
911static int slim_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
912 struct snd_ctl_elem_value *ucontrol)
913{
914 int ch_num = slim_get_port_idx(kcontrol);
915
916 if (ch_num < 0)
917 return ch_num;
918
919 slim_rx_cfg[ch_num].sample_rate =
920 slim_get_sample_rate(ucontrol->value.enumerated.item[0]);
921
922 pr_debug("%s: slim[%d]_rx_sample_rate = %d, item = %d\n", __func__,
923 ch_num, slim_rx_cfg[ch_num].sample_rate,
924 ucontrol->value.enumerated.item[0]);
925
926 return 0;
927}
928
929static int slim_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
930 struct snd_ctl_elem_value *ucontrol)
931{
932 int ch_num = slim_get_port_idx(kcontrol);
933
934 if (ch_num < 0)
935 return ch_num;
936
937 ucontrol->value.enumerated.item[0] =
938 slim_get_sample_rate_val(slim_tx_cfg[ch_num].sample_rate);
939
940 pr_debug("%s: slim[%d]_tx_sample_rate = %d, item = %d\n", __func__,
941 ch_num, slim_tx_cfg[ch_num].sample_rate,
942 ucontrol->value.enumerated.item[0]);
943
944 return 0;
945}
946
947static int slim_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
948 struct snd_ctl_elem_value *ucontrol)
949{
950 int sample_rate = 0;
951 int ch_num = slim_get_port_idx(kcontrol);
952
953 if (ch_num < 0)
954 return ch_num;
955
956 sample_rate = slim_get_sample_rate(ucontrol->value.enumerated.item[0]);
957 if (sample_rate == SAMPLING_RATE_44P1KHZ) {
958 pr_err("%s: Unsupported sample rate %d: for Tx path\n",
959 __func__, sample_rate);
960 return -EINVAL;
961 }
962 slim_tx_cfg[ch_num].sample_rate = sample_rate;
963
964 pr_debug("%s: slim[%d]_tx_sample_rate = %d, value = %d\n", __func__,
965 ch_num, slim_tx_cfg[ch_num].sample_rate,
966 ucontrol->value.enumerated.item[0]);
967
968 return 0;
969}
970
971static int slim_rx_bit_format_get(struct snd_kcontrol *kcontrol,
972 struct snd_ctl_elem_value *ucontrol)
973{
974 int ch_num = slim_get_port_idx(kcontrol);
975
976 if (ch_num < 0)
977 return ch_num;
978
979 ucontrol->value.enumerated.item[0] =
980 slim_get_bit_format_val(slim_rx_cfg[ch_num].bit_format);
981
982 pr_debug("%s: slim[%d]_rx_bit_format = %d, ucontrol value = %d\n",
983 __func__, ch_num, slim_rx_cfg[ch_num].bit_format,
984 ucontrol->value.enumerated.item[0]);
985
986 return 0;
987}
988
989static int slim_rx_bit_format_put(struct snd_kcontrol *kcontrol,
990 struct snd_ctl_elem_value *ucontrol)
991{
992 int ch_num = slim_get_port_idx(kcontrol);
993
994 if (ch_num < 0)
995 return ch_num;
996
997 slim_rx_cfg[ch_num].bit_format =
998 slim_get_bit_format(ucontrol->value.enumerated.item[0]);
999
1000 pr_debug("%s: slim[%d]_rx_bit_format = %d, ucontrol value = %d\n",
1001 __func__, ch_num, slim_rx_cfg[ch_num].bit_format,
1002 ucontrol->value.enumerated.item[0]);
1003
1004 return 0;
1005}
1006
1007static int slim_tx_bit_format_get(struct snd_kcontrol *kcontrol,
1008 struct snd_ctl_elem_value *ucontrol)
1009{
1010 int ch_num = slim_get_port_idx(kcontrol);
1011
1012 if (ch_num < 0)
1013 return ch_num;
1014
1015 ucontrol->value.enumerated.item[0] =
1016 slim_get_bit_format_val(slim_tx_cfg[ch_num].bit_format);
1017
1018 pr_debug("%s: slim[%d]_tx_bit_format = %d, ucontrol value = %d\n",
1019 __func__, ch_num, slim_tx_cfg[ch_num].bit_format,
1020 ucontrol->value.enumerated.item[0]);
1021
1022 return 0;
1023}
1024
1025static int slim_tx_bit_format_put(struct snd_kcontrol *kcontrol,
1026 struct snd_ctl_elem_value *ucontrol)
1027{
1028 int ch_num = slim_get_port_idx(kcontrol);
1029
1030 if (ch_num < 0)
1031 return ch_num;
1032
1033 slim_tx_cfg[ch_num].bit_format =
1034 slim_get_bit_format(ucontrol->value.enumerated.item[0]);
1035
1036 pr_debug("%s: slim[%d]_tx_bit_format = %d, ucontrol value = %d\n",
1037 __func__, ch_num, slim_tx_cfg[ch_num].bit_format,
1038 ucontrol->value.enumerated.item[0]);
1039
1040 return 0;
1041}
1042
1043static int slim_rx_ch_get(struct snd_kcontrol *kcontrol,
1044 struct snd_ctl_elem_value *ucontrol)
1045{
1046 int ch_num = slim_get_port_idx(kcontrol);
1047
1048 if (ch_num < 0)
1049 return ch_num;
1050
1051 pr_debug("%s: msm_slim_[%d]_rx_ch = %d\n", __func__,
1052 ch_num, slim_rx_cfg[ch_num].channels);
1053 ucontrol->value.enumerated.item[0] = slim_rx_cfg[ch_num].channels - 1;
1054
1055 return 0;
1056}
1057
1058static int slim_rx_ch_put(struct snd_kcontrol *kcontrol,
1059 struct snd_ctl_elem_value *ucontrol)
1060{
1061 int ch_num = slim_get_port_idx(kcontrol);
1062
1063 if (ch_num < 0)
1064 return ch_num;
1065
1066 slim_rx_cfg[ch_num].channels = ucontrol->value.enumerated.item[0] + 1;
1067 pr_debug("%s: msm_slim_[%d]_rx_ch = %d\n", __func__,
1068 ch_num, slim_rx_cfg[ch_num].channels);
1069
1070 return 1;
1071}
1072
1073static int slim_tx_ch_get(struct snd_kcontrol *kcontrol,
1074 struct snd_ctl_elem_value *ucontrol)
1075{
1076 int ch_num = slim_get_port_idx(kcontrol);
1077
1078 if (ch_num < 0)
1079 return ch_num;
1080
1081 pr_debug("%s: msm_slim_[%d]_tx_ch = %d\n", __func__,
1082 ch_num, slim_tx_cfg[ch_num].channels);
1083 ucontrol->value.enumerated.item[0] = slim_tx_cfg[ch_num].channels - 1;
1084
1085 return 0;
1086}
1087
1088static int slim_tx_ch_put(struct snd_kcontrol *kcontrol,
1089 struct snd_ctl_elem_value *ucontrol)
1090{
1091 int ch_num = slim_get_port_idx(kcontrol);
1092
1093 if (ch_num < 0)
1094 return ch_num;
1095
1096 slim_tx_cfg[ch_num].channels = ucontrol->value.enumerated.item[0] + 1;
1097 pr_debug("%s: msm_slim_[%d]_tx_ch = %d\n", __func__,
1098 ch_num, slim_tx_cfg[ch_num].channels);
1099
1100 return 1;
1101}
1102
1103static int msm_vi_feed_tx_ch_get(struct snd_kcontrol *kcontrol,
1104 struct snd_ctl_elem_value *ucontrol)
1105{
1106 ucontrol->value.integer.value[0] = msm_vi_feed_tx_ch - 1;
1107 pr_debug("%s: msm_vi_feed_tx_ch = %ld\n", __func__,
1108 ucontrol->value.integer.value[0]);
1109 return 0;
1110}
1111
1112static int msm_vi_feed_tx_ch_put(struct snd_kcontrol *kcontrol,
1113 struct snd_ctl_elem_value *ucontrol)
1114{
1115 msm_vi_feed_tx_ch = ucontrol->value.integer.value[0] + 1;
1116
1117 pr_debug("%s: msm_vi_feed_tx_ch = %d\n", __func__, msm_vi_feed_tx_ch);
1118 return 1;
1119}
1120
1121static int msm_bt_sample_rate_get(struct snd_kcontrol *kcontrol,
1122 struct snd_ctl_elem_value *ucontrol)
1123{
1124 /*
1125 * Slimbus_7_Rx/Tx sample rate values should always be in sync (same)
1126 * when used for BT_SCO use case. Return either Rx or Tx sample rate
1127 * value.
1128 */
1129 switch (slim_rx_cfg[SLIM_RX_7].sample_rate) {
1130 case SAMPLING_RATE_96KHZ:
1131 ucontrol->value.integer.value[0] = 5;
1132 break;
1133 case SAMPLING_RATE_88P2KHZ:
1134 ucontrol->value.integer.value[0] = 4;
1135 break;
1136 case SAMPLING_RATE_48KHZ:
1137 ucontrol->value.integer.value[0] = 3;
1138 break;
1139 case SAMPLING_RATE_44P1KHZ:
1140 ucontrol->value.integer.value[0] = 2;
1141 break;
1142 case SAMPLING_RATE_16KHZ:
1143 ucontrol->value.integer.value[0] = 1;
1144 break;
1145 case SAMPLING_RATE_8KHZ:
1146 default:
1147 ucontrol->value.integer.value[0] = 0;
1148 break;
1149 }
1150 pr_debug("%s: sample rate = %d\n", __func__,
1151 slim_rx_cfg[SLIM_RX_7].sample_rate);
1152
1153 return 0;
1154}
1155
1156static int msm_bt_sample_rate_put(struct snd_kcontrol *kcontrol,
1157 struct snd_ctl_elem_value *ucontrol)
1158{
1159 switch (ucontrol->value.integer.value[0]) {
1160 case 1:
1161 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_16KHZ;
1162 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_16KHZ;
1163 break;
1164 case 2:
1165 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
1166 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
1167 break;
1168 case 3:
1169 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_48KHZ;
1170 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_48KHZ;
1171 break;
1172 case 4:
1173 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
1174 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
1175 break;
1176 case 5:
1177 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_96KHZ;
1178 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_96KHZ;
1179 break;
1180 case 0:
1181 default:
1182 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_8KHZ;
1183 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_8KHZ;
1184 break;
1185 }
1186 pr_debug("%s: sample rates: slim7_rx = %d, slim7_tx = %d, value = %d\n",
1187 __func__,
1188 slim_rx_cfg[SLIM_RX_7].sample_rate,
1189 slim_tx_cfg[SLIM_TX_7].sample_rate,
1190 ucontrol->value.enumerated.item[0]);
1191
1192 return 0;
1193}
1194
1195static int cdc_dma_get_port_idx(struct snd_kcontrol *kcontrol)
1196{
1197 int idx = 0;
1198
1199 if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_RX_0",
1200 sizeof("WSA_CDC_DMA_RX_0")))
1201 idx = WSA_CDC_DMA_RX_0;
1202 else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_RX_1",
1203 sizeof("WSA_CDC_DMA_RX_0")))
1204 idx = WSA_CDC_DMA_RX_1;
1205 else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_0",
1206 sizeof("RX_CDC_DMA_RX_0")))
1207 idx = RX_CDC_DMA_RX_0;
1208 else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_1",
1209 sizeof("RX_CDC_DMA_RX_1")))
1210 idx = RX_CDC_DMA_RX_1;
1211 else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_2",
1212 sizeof("RX_CDC_DMA_RX_2")))
1213 idx = RX_CDC_DMA_RX_2;
1214 else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_3",
1215 sizeof("RX_CDC_DMA_RX_3")))
1216 idx = RX_CDC_DMA_RX_3;
1217 else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_5",
1218 sizeof("RX_CDC_DMA_RX_5")))
1219 idx = RX_CDC_DMA_RX_5;
1220 else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_0",
1221 sizeof("WSA_CDC_DMA_TX_0")))
1222 idx = WSA_CDC_DMA_TX_0;
1223 else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_1",
1224 sizeof("WSA_CDC_DMA_TX_1")))
1225 idx = WSA_CDC_DMA_TX_1;
1226 else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_2",
1227 sizeof("WSA_CDC_DMA_TX_2")))
1228 idx = WSA_CDC_DMA_TX_2;
1229 else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_0",
1230 sizeof("TX_CDC_DMA_TX_0")))
1231 idx = TX_CDC_DMA_TX_0;
1232 else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_3",
1233 sizeof("TX_CDC_DMA_TX_3")))
1234 idx = TX_CDC_DMA_TX_3;
1235 else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_4",
1236 sizeof("TX_CDC_DMA_TX_4")))
1237 idx = TX_CDC_DMA_TX_4;
1238 else {
1239 pr_err("%s: unsupported channel: %s\n",
1240 __func__, kcontrol->id.name);
1241 return -EINVAL;
1242 }
1243
1244 return idx;
1245}
1246
1247static int cdc_dma_rx_ch_get(struct snd_kcontrol *kcontrol,
1248 struct snd_ctl_elem_value *ucontrol)
1249{
1250 int ch_num = cdc_dma_get_port_idx(kcontrol);
1251
1252 if (ch_num < 0)
1253 return ch_num;
1254
1255 pr_debug("%s: cdc_dma_rx_ch = %d\n", __func__,
1256 cdc_dma_rx_cfg[ch_num].channels - 1);
1257 ucontrol->value.integer.value[0] = cdc_dma_rx_cfg[ch_num].channels - 1;
1258 return 0;
1259}
1260
1261static int cdc_dma_rx_ch_put(struct snd_kcontrol *kcontrol,
1262 struct snd_ctl_elem_value *ucontrol)
1263{
1264 int ch_num = cdc_dma_get_port_idx(kcontrol);
1265
1266 if (ch_num < 0)
1267 return ch_num;
1268
1269 cdc_dma_rx_cfg[ch_num].channels = ucontrol->value.integer.value[0] + 1;
1270
1271 pr_debug("%s: cdc_dma_rx_ch = %d\n", __func__,
1272 cdc_dma_rx_cfg[ch_num].channels);
1273 return 1;
1274}
1275
1276static int cdc_dma_rx_format_get(struct snd_kcontrol *kcontrol,
1277 struct snd_ctl_elem_value *ucontrol)
1278{
1279 int ch_num = cdc_dma_get_port_idx(kcontrol);
1280
1281 switch (cdc_dma_rx_cfg[ch_num].bit_format) {
1282 case SNDRV_PCM_FORMAT_S32_LE:
1283 ucontrol->value.integer.value[0] = 3;
1284 break;
1285 case SNDRV_PCM_FORMAT_S24_3LE:
1286 ucontrol->value.integer.value[0] = 2;
1287 break;
1288 case SNDRV_PCM_FORMAT_S24_LE:
1289 ucontrol->value.integer.value[0] = 1;
1290 break;
1291 case SNDRV_PCM_FORMAT_S16_LE:
1292 default:
1293 ucontrol->value.integer.value[0] = 0;
1294 break;
1295 }
1296
1297 pr_debug("%s: cdc_dma_rx_format = %d, ucontrol value = %ld\n",
1298 __func__, cdc_dma_rx_cfg[ch_num].bit_format,
1299 ucontrol->value.integer.value[0]);
1300 return 0;
1301}
1302
1303static int cdc_dma_rx_format_put(struct snd_kcontrol *kcontrol,
1304 struct snd_ctl_elem_value *ucontrol)
1305{
1306 int rc = 0;
1307 int ch_num = cdc_dma_get_port_idx(kcontrol);
1308
1309 switch (ucontrol->value.integer.value[0]) {
1310 case 3:
1311 cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S32_LE;
1312 break;
1313 case 2:
1314 cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
1315 break;
1316 case 1:
1317 cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_LE;
1318 break;
1319 case 0:
1320 default:
1321 cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S16_LE;
1322 break;
1323 }
1324 pr_debug("%s: cdc_dma_rx_format = %d, ucontrol value = %ld\n",
1325 __func__, cdc_dma_rx_cfg[ch_num].bit_format,
1326 ucontrol->value.integer.value[0]);
1327
1328 return rc;
1329}
1330
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1331
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1332static int cdc_dma_get_sample_rate_val(int sample_rate)
1333{
1334 int sample_rate_val = 0;
1335
1336 switch (sample_rate) {
1337 case SAMPLING_RATE_8KHZ:
1338 sample_rate_val = 0;
1339 break;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1340 case SAMPLING_RATE_11P025KHZ:
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1341 sample_rate_val = 1;
1342 break;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1343 case SAMPLING_RATE_16KHZ:
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1344 sample_rate_val = 2;
1345 break;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1346 case SAMPLING_RATE_22P05KHZ:
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1347 sample_rate_val = 3;
1348 break;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1349 case SAMPLING_RATE_32KHZ:
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1350 sample_rate_val = 4;
1351 break;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1352 case SAMPLING_RATE_44P1KHZ:
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1353 sample_rate_val = 5;
1354 break;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1355 case SAMPLING_RATE_48KHZ:
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1356 sample_rate_val = 6;
1357 break;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1358 case SAMPLING_RATE_88P2KHZ:
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1359 sample_rate_val = 7;
1360 break;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1361 case SAMPLING_RATE_96KHZ:
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1362 sample_rate_val = 8;
1363 break;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1364 case SAMPLING_RATE_176P4KHZ:
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1365 sample_rate_val = 9;
1366 break;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1367 case SAMPLING_RATE_192KHZ:
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1368 sample_rate_val = 10;
1369 break;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1370 case SAMPLING_RATE_352P8KHZ:
1371 sample_rate_val = 11;
1372 break;
1373 case SAMPLING_RATE_384KHZ:
1374 sample_rate_val = 12;
1375 break;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1376 default:
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1377 sample_rate_val = 6;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1378 break;
1379 }
1380 return sample_rate_val;
1381}
1382
1383static int cdc_dma_get_sample_rate(int value)
1384{
1385 int sample_rate = 0;
1386
1387 switch (value) {
1388 case 0:
1389 sample_rate = SAMPLING_RATE_8KHZ;
1390 break;
1391 case 1:
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1392 sample_rate = SAMPLING_RATE_11P025KHZ;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1393 break;
1394 case 2:
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1395 sample_rate = SAMPLING_RATE_16KHZ;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1396 break;
1397 case 3:
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1398 sample_rate = SAMPLING_RATE_22P05KHZ;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1399 break;
1400 case 4:
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1401 sample_rate = SAMPLING_RATE_32KHZ;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1402 break;
1403 case 5:
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1404 sample_rate = SAMPLING_RATE_44P1KHZ;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1405 break;
1406 case 6:
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1407 sample_rate = SAMPLING_RATE_48KHZ;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1408 break;
1409 case 7:
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1410 sample_rate = SAMPLING_RATE_88P2KHZ;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1411 break;
1412 case 8:
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1413 sample_rate = SAMPLING_RATE_96KHZ;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1414 break;
1415 case 9:
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1416 sample_rate = SAMPLING_RATE_176P4KHZ;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1417 break;
1418 case 10:
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1419 sample_rate = SAMPLING_RATE_192KHZ;
1420 break;
1421 case 11:
1422 sample_rate = SAMPLING_RATE_352P8KHZ;
1423 break;
1424 case 12:
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1425 sample_rate = SAMPLING_RATE_384KHZ;
1426 break;
1427 default:
1428 sample_rate = SAMPLING_RATE_48KHZ;
1429 break;
1430 }
1431 return sample_rate;
1432}
1433
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1434static int cdc_dma_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
1435 struct snd_ctl_elem_value *ucontrol)
1436{
1437 int ch_num = cdc_dma_get_port_idx(kcontrol);
1438
1439 if (ch_num < 0)
1440 return ch_num;
1441
1442 ucontrol->value.enumerated.item[0] =
1443 cdc_dma_get_sample_rate_val(cdc_dma_rx_cfg[ch_num].sample_rate);
1444
1445 pr_debug("%s: cdc_dma_rx_sample_rate = %d\n", __func__,
1446 cdc_dma_rx_cfg[ch_num].sample_rate);
1447 return 0;
1448}
1449
1450static int cdc_dma_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
1451 struct snd_ctl_elem_value *ucontrol)
1452{
1453 int ch_num = cdc_dma_get_port_idx(kcontrol);
1454
1455 if (ch_num < 0)
1456 return ch_num;
1457
1458 cdc_dma_rx_cfg[ch_num].sample_rate =
1459 cdc_dma_get_sample_rate(ucontrol->value.enumerated.item[0]);
1460
1461
1462 pr_debug("%s: control value = %d, cdc_dma_rx_sample_rate = %d\n",
1463 __func__, ucontrol->value.enumerated.item[0],
1464 cdc_dma_rx_cfg[ch_num].sample_rate);
1465 return 0;
1466}
1467
1468static int cdc_dma_tx_ch_get(struct snd_kcontrol *kcontrol,
1469 struct snd_ctl_elem_value *ucontrol)
1470{
1471 int ch_num = cdc_dma_get_port_idx(kcontrol);
1472
1473 pr_debug("%s: cdc_dma_tx_ch = %d\n", __func__,
1474 cdc_dma_tx_cfg[ch_num].channels);
1475 ucontrol->value.integer.value[0] = cdc_dma_tx_cfg[ch_num].channels - 1;
1476 return 0;
1477}
1478
1479static int cdc_dma_tx_ch_put(struct snd_kcontrol *kcontrol,
1480 struct snd_ctl_elem_value *ucontrol)
1481{
1482 int ch_num = cdc_dma_get_port_idx(kcontrol);
1483
1484 cdc_dma_tx_cfg[ch_num].channels = ucontrol->value.integer.value[0] + 1;
1485
1486 pr_debug("%s: cdc_dma_tx_ch = %d\n", __func__,
1487 cdc_dma_tx_cfg[ch_num].channels);
1488 return 1;
1489}
1490
1491static int cdc_dma_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
1492 struct snd_ctl_elem_value *ucontrol)
1493{
1494 int sample_rate_val;
1495 int ch_num = cdc_dma_get_port_idx(kcontrol);
1496
1497 switch (cdc_dma_tx_cfg[ch_num].sample_rate) {
1498 case SAMPLING_RATE_384KHZ:
1499 sample_rate_val = 12;
1500 break;
1501 case SAMPLING_RATE_352P8KHZ:
1502 sample_rate_val = 11;
1503 break;
1504 case SAMPLING_RATE_192KHZ:
1505 sample_rate_val = 10;
1506 break;
1507 case SAMPLING_RATE_176P4KHZ:
1508 sample_rate_val = 9;
1509 break;
1510 case SAMPLING_RATE_96KHZ:
1511 sample_rate_val = 8;
1512 break;
1513 case SAMPLING_RATE_88P2KHZ:
1514 sample_rate_val = 7;
1515 break;
1516 case SAMPLING_RATE_48KHZ:
1517 sample_rate_val = 6;
1518 break;
1519 case SAMPLING_RATE_44P1KHZ:
1520 sample_rate_val = 5;
1521 break;
1522 case SAMPLING_RATE_32KHZ:
1523 sample_rate_val = 4;
1524 break;
1525 case SAMPLING_RATE_22P05KHZ:
1526 sample_rate_val = 3;
1527 break;
1528 case SAMPLING_RATE_16KHZ:
1529 sample_rate_val = 2;
1530 break;
1531 case SAMPLING_RATE_11P025KHZ:
1532 sample_rate_val = 1;
1533 break;
1534 case SAMPLING_RATE_8KHZ:
1535 sample_rate_val = 0;
1536 break;
1537 default:
1538 sample_rate_val = 6;
1539 break;
1540 }
1541
1542 ucontrol->value.integer.value[0] = sample_rate_val;
1543 pr_debug("%s: cdc_dma_tx_sample_rate = %d\n", __func__,
1544 cdc_dma_tx_cfg[ch_num].sample_rate);
1545 return 0;
1546}
1547
1548static int cdc_dma_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
1549 struct snd_ctl_elem_value *ucontrol)
1550{
1551 int ch_num = cdc_dma_get_port_idx(kcontrol);
1552
1553 switch (ucontrol->value.integer.value[0]) {
1554 case 12:
1555 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_384KHZ;
1556 break;
1557 case 11:
1558 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_352P8KHZ;
1559 break;
1560 case 10:
1561 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_192KHZ;
1562 break;
1563 case 9:
1564 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_176P4KHZ;
1565 break;
1566 case 8:
1567 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_96KHZ;
1568 break;
1569 case 7:
1570 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_88P2KHZ;
1571 break;
1572 case 6:
1573 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_48KHZ;
1574 break;
1575 case 5:
1576 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_44P1KHZ;
1577 break;
1578 case 4:
1579 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_32KHZ;
1580 break;
1581 case 3:
1582 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_22P05KHZ;
1583 break;
1584 case 2:
1585 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_16KHZ;
1586 break;
1587 case 1:
1588 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_11P025KHZ;
1589 break;
1590 case 0:
1591 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_8KHZ;
1592 break;
1593 default:
1594 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_48KHZ;
1595 break;
1596 }
1597
1598 pr_debug("%s: control value = %ld, cdc_dma_tx_sample_rate = %d\n",
1599 __func__, ucontrol->value.integer.value[0],
1600 cdc_dma_tx_cfg[ch_num].sample_rate);
1601 return 0;
1602}
1603
1604static int cdc_dma_tx_format_get(struct snd_kcontrol *kcontrol,
1605 struct snd_ctl_elem_value *ucontrol)
1606{
1607 int ch_num = cdc_dma_get_port_idx(kcontrol);
1608
1609 switch (cdc_dma_tx_cfg[ch_num].bit_format) {
1610 case SNDRV_PCM_FORMAT_S32_LE:
1611 ucontrol->value.integer.value[0] = 3;
1612 break;
1613 case SNDRV_PCM_FORMAT_S24_3LE:
1614 ucontrol->value.integer.value[0] = 2;
1615 break;
1616 case SNDRV_PCM_FORMAT_S24_LE:
1617 ucontrol->value.integer.value[0] = 1;
1618 break;
1619 case SNDRV_PCM_FORMAT_S16_LE:
1620 default:
1621 ucontrol->value.integer.value[0] = 0;
1622 break;
1623 }
1624
1625 pr_debug("%s: cdc_dma_tx_format = %d, ucontrol value = %ld\n",
1626 __func__, cdc_dma_tx_cfg[ch_num].bit_format,
1627 ucontrol->value.integer.value[0]);
1628 return 0;
1629}
1630
1631static int cdc_dma_tx_format_put(struct snd_kcontrol *kcontrol,
1632 struct snd_ctl_elem_value *ucontrol)
1633{
1634 int rc = 0;
1635 int ch_num = cdc_dma_get_port_idx(kcontrol);
1636
1637 switch (ucontrol->value.integer.value[0]) {
1638 case 3:
1639 cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S32_LE;
1640 break;
1641 case 2:
1642 cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
1643 break;
1644 case 1:
1645 cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_LE;
1646 break;
1647 case 0:
1648 default:
1649 cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S16_LE;
1650 break;
1651 }
1652 pr_debug("%s: cdc_dma_tx_format = %d, ucontrol value = %ld\n",
1653 __func__, cdc_dma_tx_cfg[ch_num].bit_format,
1654 ucontrol->value.integer.value[0]);
1655
1656 return rc;
1657}
1658
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1659static int usb_audio_rx_ch_get(struct snd_kcontrol *kcontrol,
1660 struct snd_ctl_elem_value *ucontrol)
1661{
1662 pr_debug("%s: usb_audio_rx_ch = %d\n", __func__,
1663 usb_rx_cfg.channels);
1664 ucontrol->value.integer.value[0] = usb_rx_cfg.channels - 1;
1665 return 0;
1666}
1667
1668static int usb_audio_rx_ch_put(struct snd_kcontrol *kcontrol,
1669 struct snd_ctl_elem_value *ucontrol)
1670{
1671 usb_rx_cfg.channels = ucontrol->value.integer.value[0] + 1;
1672
1673 pr_debug("%s: usb_audio_rx_ch = %d\n", __func__, usb_rx_cfg.channels);
1674 return 1;
1675}
1676
1677static int usb_audio_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
1678 struct snd_ctl_elem_value *ucontrol)
1679{
1680 int sample_rate_val;
1681
1682 switch (usb_rx_cfg.sample_rate) {
1683 case SAMPLING_RATE_384KHZ:
1684 sample_rate_val = 12;
1685 break;
1686 case SAMPLING_RATE_352P8KHZ:
1687 sample_rate_val = 11;
1688 break;
1689 case SAMPLING_RATE_192KHZ:
1690 sample_rate_val = 10;
1691 break;
1692 case SAMPLING_RATE_176P4KHZ:
1693 sample_rate_val = 9;
1694 break;
1695 case SAMPLING_RATE_96KHZ:
1696 sample_rate_val = 8;
1697 break;
1698 case SAMPLING_RATE_88P2KHZ:
1699 sample_rate_val = 7;
1700 break;
1701 case SAMPLING_RATE_48KHZ:
1702 sample_rate_val = 6;
1703 break;
1704 case SAMPLING_RATE_44P1KHZ:
1705 sample_rate_val = 5;
1706 break;
1707 case SAMPLING_RATE_32KHZ:
1708 sample_rate_val = 4;
1709 break;
1710 case SAMPLING_RATE_22P05KHZ:
1711 sample_rate_val = 3;
1712 break;
1713 case SAMPLING_RATE_16KHZ:
1714 sample_rate_val = 2;
1715 break;
1716 case SAMPLING_RATE_11P025KHZ:
1717 sample_rate_val = 1;
1718 break;
1719 case SAMPLING_RATE_8KHZ:
1720 default:
1721 sample_rate_val = 0;
1722 break;
1723 }
1724
1725 ucontrol->value.integer.value[0] = sample_rate_val;
1726 pr_debug("%s: usb_audio_rx_sample_rate = %d\n", __func__,
1727 usb_rx_cfg.sample_rate);
1728 return 0;
1729}
1730
1731static int usb_audio_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
1732 struct snd_ctl_elem_value *ucontrol)
1733{
1734 switch (ucontrol->value.integer.value[0]) {
1735 case 12:
1736 usb_rx_cfg.sample_rate = SAMPLING_RATE_384KHZ;
1737 break;
1738 case 11:
1739 usb_rx_cfg.sample_rate = SAMPLING_RATE_352P8KHZ;
1740 break;
1741 case 10:
1742 usb_rx_cfg.sample_rate = SAMPLING_RATE_192KHZ;
1743 break;
1744 case 9:
1745 usb_rx_cfg.sample_rate = SAMPLING_RATE_176P4KHZ;
1746 break;
1747 case 8:
1748 usb_rx_cfg.sample_rate = SAMPLING_RATE_96KHZ;
1749 break;
1750 case 7:
1751 usb_rx_cfg.sample_rate = SAMPLING_RATE_88P2KHZ;
1752 break;
1753 case 6:
1754 usb_rx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
1755 break;
1756 case 5:
1757 usb_rx_cfg.sample_rate = SAMPLING_RATE_44P1KHZ;
1758 break;
1759 case 4:
1760 usb_rx_cfg.sample_rate = SAMPLING_RATE_32KHZ;
1761 break;
1762 case 3:
1763 usb_rx_cfg.sample_rate = SAMPLING_RATE_22P05KHZ;
1764 break;
1765 case 2:
1766 usb_rx_cfg.sample_rate = SAMPLING_RATE_16KHZ;
1767 break;
1768 case 1:
1769 usb_rx_cfg.sample_rate = SAMPLING_RATE_11P025KHZ;
1770 break;
1771 case 0:
1772 usb_rx_cfg.sample_rate = SAMPLING_RATE_8KHZ;
1773 break;
1774 default:
1775 usb_rx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
1776 break;
1777 }
1778
1779 pr_debug("%s: control value = %ld, usb_audio_rx_sample_rate = %d\n",
1780 __func__, ucontrol->value.integer.value[0],
1781 usb_rx_cfg.sample_rate);
1782 return 0;
1783}
1784
1785static int usb_audio_rx_format_get(struct snd_kcontrol *kcontrol,
1786 struct snd_ctl_elem_value *ucontrol)
1787{
1788 switch (usb_rx_cfg.bit_format) {
1789 case SNDRV_PCM_FORMAT_S32_LE:
1790 ucontrol->value.integer.value[0] = 3;
1791 break;
1792 case SNDRV_PCM_FORMAT_S24_3LE:
1793 ucontrol->value.integer.value[0] = 2;
1794 break;
1795 case SNDRV_PCM_FORMAT_S24_LE:
1796 ucontrol->value.integer.value[0] = 1;
1797 break;
1798 case SNDRV_PCM_FORMAT_S16_LE:
1799 default:
1800 ucontrol->value.integer.value[0] = 0;
1801 break;
1802 }
1803
1804 pr_debug("%s: usb_audio_rx_format = %d, ucontrol value = %ld\n",
1805 __func__, usb_rx_cfg.bit_format,
1806 ucontrol->value.integer.value[0]);
1807 return 0;
1808}
1809
1810static int usb_audio_rx_format_put(struct snd_kcontrol *kcontrol,
1811 struct snd_ctl_elem_value *ucontrol)
1812{
1813 int rc = 0;
1814
1815 switch (ucontrol->value.integer.value[0]) {
1816 case 3:
1817 usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S32_LE;
1818 break;
1819 case 2:
1820 usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_3LE;
1821 break;
1822 case 1:
1823 usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_LE;
1824 break;
1825 case 0:
1826 default:
1827 usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S16_LE;
1828 break;
1829 }
1830 pr_debug("%s: usb_audio_rx_format = %d, ucontrol value = %ld\n",
1831 __func__, usb_rx_cfg.bit_format,
1832 ucontrol->value.integer.value[0]);
1833
1834 return rc;
1835}
1836
1837static int usb_audio_tx_ch_get(struct snd_kcontrol *kcontrol,
1838 struct snd_ctl_elem_value *ucontrol)
1839{
1840 pr_debug("%s: usb_audio_tx_ch = %d\n", __func__,
1841 usb_tx_cfg.channels);
1842 ucontrol->value.integer.value[0] = usb_tx_cfg.channels - 1;
1843 return 0;
1844}
1845
1846static int usb_audio_tx_ch_put(struct snd_kcontrol *kcontrol,
1847 struct snd_ctl_elem_value *ucontrol)
1848{
1849 usb_tx_cfg.channels = ucontrol->value.integer.value[0] + 1;
1850
1851 pr_debug("%s: usb_audio_tx_ch = %d\n", __func__, usb_tx_cfg.channels);
1852 return 1;
1853}
1854
1855static int usb_audio_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
1856 struct snd_ctl_elem_value *ucontrol)
1857{
1858 int sample_rate_val;
1859
1860 switch (usb_tx_cfg.sample_rate) {
1861 case SAMPLING_RATE_384KHZ:
1862 sample_rate_val = 12;
1863 break;
1864 case SAMPLING_RATE_352P8KHZ:
1865 sample_rate_val = 11;
1866 break;
1867 case SAMPLING_RATE_192KHZ:
1868 sample_rate_val = 10;
1869 break;
1870 case SAMPLING_RATE_176P4KHZ:
1871 sample_rate_val = 9;
1872 break;
1873 case SAMPLING_RATE_96KHZ:
1874 sample_rate_val = 8;
1875 break;
1876 case SAMPLING_RATE_88P2KHZ:
1877 sample_rate_val = 7;
1878 break;
1879 case SAMPLING_RATE_48KHZ:
1880 sample_rate_val = 6;
1881 break;
1882 case SAMPLING_RATE_44P1KHZ:
1883 sample_rate_val = 5;
1884 break;
1885 case SAMPLING_RATE_32KHZ:
1886 sample_rate_val = 4;
1887 break;
1888 case SAMPLING_RATE_22P05KHZ:
1889 sample_rate_val = 3;
1890 break;
1891 case SAMPLING_RATE_16KHZ:
1892 sample_rate_val = 2;
1893 break;
1894 case SAMPLING_RATE_11P025KHZ:
1895 sample_rate_val = 1;
1896 break;
1897 case SAMPLING_RATE_8KHZ:
1898 sample_rate_val = 0;
1899 break;
1900 default:
1901 sample_rate_val = 6;
1902 break;
1903 }
1904
1905 ucontrol->value.integer.value[0] = sample_rate_val;
1906 pr_debug("%s: usb_audio_tx_sample_rate = %d\n", __func__,
1907 usb_tx_cfg.sample_rate);
1908 return 0;
1909}
1910
1911static int usb_audio_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
1912 struct snd_ctl_elem_value *ucontrol)
1913{
1914 switch (ucontrol->value.integer.value[0]) {
1915 case 12:
1916 usb_tx_cfg.sample_rate = SAMPLING_RATE_384KHZ;
1917 break;
1918 case 11:
1919 usb_tx_cfg.sample_rate = SAMPLING_RATE_352P8KHZ;
1920 break;
1921 case 10:
1922 usb_tx_cfg.sample_rate = SAMPLING_RATE_192KHZ;
1923 break;
1924 case 9:
1925 usb_tx_cfg.sample_rate = SAMPLING_RATE_176P4KHZ;
1926 break;
1927 case 8:
1928 usb_tx_cfg.sample_rate = SAMPLING_RATE_96KHZ;
1929 break;
1930 case 7:
1931 usb_tx_cfg.sample_rate = SAMPLING_RATE_88P2KHZ;
1932 break;
1933 case 6:
1934 usb_tx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
1935 break;
1936 case 5:
1937 usb_tx_cfg.sample_rate = SAMPLING_RATE_44P1KHZ;
1938 break;
1939 case 4:
1940 usb_tx_cfg.sample_rate = SAMPLING_RATE_32KHZ;
1941 break;
1942 case 3:
1943 usb_tx_cfg.sample_rate = SAMPLING_RATE_22P05KHZ;
1944 break;
1945 case 2:
1946 usb_tx_cfg.sample_rate = SAMPLING_RATE_16KHZ;
1947 break;
1948 case 1:
1949 usb_tx_cfg.sample_rate = SAMPLING_RATE_11P025KHZ;
1950 break;
1951 case 0:
1952 usb_tx_cfg.sample_rate = SAMPLING_RATE_8KHZ;
1953 break;
1954 default:
1955 usb_tx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
1956 break;
1957 }
1958
1959 pr_debug("%s: control value = %ld, usb_audio_tx_sample_rate = %d\n",
1960 __func__, ucontrol->value.integer.value[0],
1961 usb_tx_cfg.sample_rate);
1962 return 0;
1963}
1964
1965static int usb_audio_tx_format_get(struct snd_kcontrol *kcontrol,
1966 struct snd_ctl_elem_value *ucontrol)
1967{
1968 switch (usb_tx_cfg.bit_format) {
1969 case SNDRV_PCM_FORMAT_S32_LE:
1970 ucontrol->value.integer.value[0] = 3;
1971 break;
1972 case SNDRV_PCM_FORMAT_S24_3LE:
1973 ucontrol->value.integer.value[0] = 2;
1974 break;
1975 case SNDRV_PCM_FORMAT_S24_LE:
1976 ucontrol->value.integer.value[0] = 1;
1977 break;
1978 case SNDRV_PCM_FORMAT_S16_LE:
1979 default:
1980 ucontrol->value.integer.value[0] = 0;
1981 break;
1982 }
1983
1984 pr_debug("%s: usb_audio_tx_format = %d, ucontrol value = %ld\n",
1985 __func__, usb_tx_cfg.bit_format,
1986 ucontrol->value.integer.value[0]);
1987 return 0;
1988}
1989
1990static int usb_audio_tx_format_put(struct snd_kcontrol *kcontrol,
1991 struct snd_ctl_elem_value *ucontrol)
1992{
1993 int rc = 0;
1994
1995 switch (ucontrol->value.integer.value[0]) {
1996 case 3:
1997 usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S32_LE;
1998 break;
1999 case 2:
2000 usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_3LE;
2001 break;
2002 case 1:
2003 usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_LE;
2004 break;
2005 case 0:
2006 default:
2007 usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S16_LE;
2008 break;
2009 }
2010 pr_debug("%s: usb_audio_tx_format = %d, ucontrol value = %ld\n",
2011 __func__, usb_tx_cfg.bit_format,
2012 ucontrol->value.integer.value[0]);
2013
2014 return rc;
2015}
2016
2017static int ext_disp_get_port_idx(struct snd_kcontrol *kcontrol)
2018{
2019 int idx;
2020
2021 if (strnstr(kcontrol->id.name, "Display Port RX",
2022 sizeof("Display Port RX"))) {
2023 idx = DP_RX_IDX;
2024 } else {
2025 pr_err("%s: unsupported BE: %s\n",
2026 __func__, kcontrol->id.name);
2027 idx = -EINVAL;
2028 }
2029
2030 return idx;
2031}
2032
2033static int ext_disp_rx_format_get(struct snd_kcontrol *kcontrol,
2034 struct snd_ctl_elem_value *ucontrol)
2035{
2036 int idx = ext_disp_get_port_idx(kcontrol);
2037
2038 if (idx < 0)
2039 return idx;
2040
2041 switch (ext_disp_rx_cfg[idx].bit_format) {
2042 case SNDRV_PCM_FORMAT_S24_3LE:
2043 ucontrol->value.integer.value[0] = 2;
2044 break;
2045 case SNDRV_PCM_FORMAT_S24_LE:
2046 ucontrol->value.integer.value[0] = 1;
2047 break;
2048 case SNDRV_PCM_FORMAT_S16_LE:
2049 default:
2050 ucontrol->value.integer.value[0] = 0;
2051 break;
2052 }
2053
2054 pr_debug("%s: ext_disp_rx[%d].format = %d, ucontrol value = %ld\n",
2055 __func__, idx, ext_disp_rx_cfg[idx].bit_format,
2056 ucontrol->value.integer.value[0]);
2057 return 0;
2058}
2059
2060static int ext_disp_rx_format_put(struct snd_kcontrol *kcontrol,
2061 struct snd_ctl_elem_value *ucontrol)
2062{
2063 int idx = ext_disp_get_port_idx(kcontrol);
2064
2065 if (idx < 0)
2066 return idx;
2067
2068 switch (ucontrol->value.integer.value[0]) {
2069 case 2:
2070 ext_disp_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
2071 break;
2072 case 1:
2073 ext_disp_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S24_LE;
2074 break;
2075 case 0:
2076 default:
2077 ext_disp_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S16_LE;
2078 break;
2079 }
2080 pr_debug("%s: ext_disp_rx[%d].format = %d, ucontrol value = %ld\n",
2081 __func__, idx, ext_disp_rx_cfg[idx].bit_format,
2082 ucontrol->value.integer.value[0]);
2083
2084 return 0;
2085}
2086
2087static int ext_disp_rx_ch_get(struct snd_kcontrol *kcontrol,
2088 struct snd_ctl_elem_value *ucontrol)
2089{
2090 int idx = ext_disp_get_port_idx(kcontrol);
2091
2092 if (idx < 0)
2093 return idx;
2094
2095 ucontrol->value.integer.value[0] =
2096 ext_disp_rx_cfg[idx].channels - 2;
2097
2098 pr_debug("%s: ext_disp_rx[%d].ch = %d\n", __func__,
2099 idx, ext_disp_rx_cfg[idx].channels);
2100
2101 return 0;
2102}
2103
2104static int ext_disp_rx_ch_put(struct snd_kcontrol *kcontrol,
2105 struct snd_ctl_elem_value *ucontrol)
2106{
2107 int idx = ext_disp_get_port_idx(kcontrol);
2108
2109 if (idx < 0)
2110 return idx;
2111
2112 ext_disp_rx_cfg[idx].channels =
2113 ucontrol->value.integer.value[0] + 2;
2114
2115 pr_debug("%s: ext_disp_rx[%d].ch = %d\n", __func__,
2116 idx, ext_disp_rx_cfg[idx].channels);
2117 return 1;
2118}
2119
2120static int ext_disp_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
2121 struct snd_ctl_elem_value *ucontrol)
2122{
2123 int sample_rate_val;
2124 int idx = ext_disp_get_port_idx(kcontrol);
2125
2126 if (idx < 0)
2127 return idx;
2128
2129 switch (ext_disp_rx_cfg[idx].sample_rate) {
2130 case SAMPLING_RATE_176P4KHZ:
2131 sample_rate_val = 6;
2132 break;
2133
2134 case SAMPLING_RATE_88P2KHZ:
2135 sample_rate_val = 5;
2136 break;
2137
2138 case SAMPLING_RATE_44P1KHZ:
2139 sample_rate_val = 4;
2140 break;
2141
2142 case SAMPLING_RATE_32KHZ:
2143 sample_rate_val = 3;
2144 break;
2145
2146 case SAMPLING_RATE_192KHZ:
2147 sample_rate_val = 2;
2148 break;
2149
2150 case SAMPLING_RATE_96KHZ:
2151 sample_rate_val = 1;
2152 break;
2153
2154 case SAMPLING_RATE_48KHZ:
2155 default:
2156 sample_rate_val = 0;
2157 break;
2158 }
2159
2160 ucontrol->value.integer.value[0] = sample_rate_val;
2161 pr_debug("%s: ext_disp_rx[%d].sample_rate = %d\n", __func__,
2162 idx, ext_disp_rx_cfg[idx].sample_rate);
2163
2164 return 0;
2165}
2166
2167static int ext_disp_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
2168 struct snd_ctl_elem_value *ucontrol)
2169{
2170 int idx = ext_disp_get_port_idx(kcontrol);
2171
2172 if (idx < 0)
2173 return idx;
2174
2175 switch (ucontrol->value.integer.value[0]) {
2176 case 6:
2177 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_176P4KHZ;
2178 break;
2179 case 5:
2180 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_88P2KHZ;
2181 break;
2182 case 4:
2183 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_44P1KHZ;
2184 break;
2185 case 3:
2186 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_32KHZ;
2187 break;
2188 case 2:
2189 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_192KHZ;
2190 break;
2191 case 1:
2192 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_96KHZ;
2193 break;
2194 case 0:
2195 default:
2196 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_48KHZ;
2197 break;
2198 }
2199
2200 pr_debug("%s: control value = %ld, ext_disp_rx[%d].sample_rate = %d\n",
2201 __func__, ucontrol->value.integer.value[0], idx,
2202 ext_disp_rx_cfg[idx].sample_rate);
2203 return 0;
2204}
2205
2206static int proxy_rx_ch_get(struct snd_kcontrol *kcontrol,
2207 struct snd_ctl_elem_value *ucontrol)
2208{
2209 pr_debug("%s: proxy_rx channels = %d\n",
2210 __func__, proxy_rx_cfg.channels);
2211 ucontrol->value.integer.value[0] = proxy_rx_cfg.channels - 2;
2212
2213 return 0;
2214}
2215
2216static int proxy_rx_ch_put(struct snd_kcontrol *kcontrol,
2217 struct snd_ctl_elem_value *ucontrol)
2218{
2219 proxy_rx_cfg.channels = ucontrol->value.integer.value[0] + 2;
2220 pr_debug("%s: proxy_rx channels = %d\n",
2221 __func__, proxy_rx_cfg.channels);
2222
2223 return 1;
2224}
2225
2226static int tdm_get_sample_rate(int value)
2227{
2228 int sample_rate = 0;
2229
2230 switch (value) {
2231 case 0:
2232 sample_rate = SAMPLING_RATE_8KHZ;
2233 break;
2234 case 1:
2235 sample_rate = SAMPLING_RATE_16KHZ;
2236 break;
2237 case 2:
2238 sample_rate = SAMPLING_RATE_32KHZ;
2239 break;
2240 case 3:
2241 sample_rate = SAMPLING_RATE_48KHZ;
2242 break;
2243 case 4:
2244 sample_rate = SAMPLING_RATE_176P4KHZ;
2245 break;
2246 case 5:
2247 sample_rate = SAMPLING_RATE_352P8KHZ;
2248 break;
2249 default:
2250 sample_rate = SAMPLING_RATE_48KHZ;
2251 break;
2252 }
2253 return sample_rate;
2254}
2255
2256static int aux_pcm_get_sample_rate(int value)
2257{
2258 int sample_rate;
2259
2260 switch (value) {
2261 case 1:
2262 sample_rate = SAMPLING_RATE_16KHZ;
2263 break;
2264 case 0:
2265 default:
2266 sample_rate = SAMPLING_RATE_8KHZ;
2267 break;
2268 }
2269 return sample_rate;
2270}
2271
2272static int tdm_get_sample_rate_val(int sample_rate)
2273{
2274 int sample_rate_val = 0;
2275
2276 switch (sample_rate) {
2277 case SAMPLING_RATE_8KHZ:
2278 sample_rate_val = 0;
2279 break;
2280 case SAMPLING_RATE_16KHZ:
2281 sample_rate_val = 1;
2282 break;
2283 case SAMPLING_RATE_32KHZ:
2284 sample_rate_val = 2;
2285 break;
2286 case SAMPLING_RATE_48KHZ:
2287 sample_rate_val = 3;
2288 break;
2289 case SAMPLING_RATE_176P4KHZ:
2290 sample_rate_val = 4;
2291 break;
2292 case SAMPLING_RATE_352P8KHZ:
2293 sample_rate_val = 5;
2294 break;
2295 default:
2296 sample_rate_val = 3;
2297 break;
2298 }
2299 return sample_rate_val;
2300}
2301
2302static int aux_pcm_get_sample_rate_val(int sample_rate)
2303{
2304 int sample_rate_val;
2305
2306 switch (sample_rate) {
2307 case SAMPLING_RATE_16KHZ:
2308 sample_rate_val = 1;
2309 break;
2310 case SAMPLING_RATE_8KHZ:
2311 default:
2312 sample_rate_val = 0;
2313 break;
2314 }
2315 return sample_rate_val;
2316}
2317
2318static int tdm_get_port_idx(struct snd_kcontrol *kcontrol,
2319 struct tdm_port *port)
2320{
2321 if (port) {
2322 if (strnstr(kcontrol->id.name, "PRI",
2323 sizeof(kcontrol->id.name))) {
2324 port->mode = TDM_PRI;
2325 } else if (strnstr(kcontrol->id.name, "SEC",
2326 sizeof(kcontrol->id.name))) {
2327 port->mode = TDM_SEC;
2328 } else if (strnstr(kcontrol->id.name, "TERT",
2329 sizeof(kcontrol->id.name))) {
2330 port->mode = TDM_TERT;
2331 } else if (strnstr(kcontrol->id.name, "QUAT",
2332 sizeof(kcontrol->id.name))) {
2333 port->mode = TDM_QUAT;
2334 } else if (strnstr(kcontrol->id.name, "QUIN",
2335 sizeof(kcontrol->id.name))) {
2336 port->mode = TDM_QUIN;
2337 } else {
2338 pr_err("%s: unsupported mode in: %s\n",
2339 __func__, kcontrol->id.name);
2340 return -EINVAL;
2341 }
2342
2343 if (strnstr(kcontrol->id.name, "RX_0",
2344 sizeof(kcontrol->id.name)) ||
2345 strnstr(kcontrol->id.name, "TX_0",
2346 sizeof(kcontrol->id.name))) {
2347 port->channel = TDM_0;
2348 } else if (strnstr(kcontrol->id.name, "RX_1",
2349 sizeof(kcontrol->id.name)) ||
2350 strnstr(kcontrol->id.name, "TX_1",
2351 sizeof(kcontrol->id.name))) {
2352 port->channel = TDM_1;
2353 } else if (strnstr(kcontrol->id.name, "RX_2",
2354 sizeof(kcontrol->id.name)) ||
2355 strnstr(kcontrol->id.name, "TX_2",
2356 sizeof(kcontrol->id.name))) {
2357 port->channel = TDM_2;
2358 } else if (strnstr(kcontrol->id.name, "RX_3",
2359 sizeof(kcontrol->id.name)) ||
2360 strnstr(kcontrol->id.name, "TX_3",
2361 sizeof(kcontrol->id.name))) {
2362 port->channel = TDM_3;
2363 } else if (strnstr(kcontrol->id.name, "RX_4",
2364 sizeof(kcontrol->id.name)) ||
2365 strnstr(kcontrol->id.name, "TX_4",
2366 sizeof(kcontrol->id.name))) {
2367 port->channel = TDM_4;
2368 } else if (strnstr(kcontrol->id.name, "RX_5",
2369 sizeof(kcontrol->id.name)) ||
2370 strnstr(kcontrol->id.name, "TX_5",
2371 sizeof(kcontrol->id.name))) {
2372 port->channel = TDM_5;
2373 } else if (strnstr(kcontrol->id.name, "RX_6",
2374 sizeof(kcontrol->id.name)) ||
2375 strnstr(kcontrol->id.name, "TX_6",
2376 sizeof(kcontrol->id.name))) {
2377 port->channel = TDM_6;
2378 } else if (strnstr(kcontrol->id.name, "RX_7",
2379 sizeof(kcontrol->id.name)) ||
2380 strnstr(kcontrol->id.name, "TX_7",
2381 sizeof(kcontrol->id.name))) {
2382 port->channel = TDM_7;
2383 } else {
2384 pr_err("%s: unsupported channel in: %s\n",
2385 __func__, kcontrol->id.name);
2386 return -EINVAL;
2387 }
2388 } else {
2389 return -EINVAL;
2390 }
2391 return 0;
2392}
2393
2394static int tdm_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
2395 struct snd_ctl_elem_value *ucontrol)
2396{
2397 struct tdm_port port;
2398 int ret = tdm_get_port_idx(kcontrol, &port);
2399
2400 if (ret) {
2401 pr_err("%s: unsupported control: %s\n",
2402 __func__, kcontrol->id.name);
2403 } else {
2404 ucontrol->value.enumerated.item[0] = tdm_get_sample_rate_val(
2405 tdm_rx_cfg[port.mode][port.channel].sample_rate);
2406
2407 pr_debug("%s: tdm_rx_sample_rate = %d, item = %d\n", __func__,
2408 tdm_rx_cfg[port.mode][port.channel].sample_rate,
2409 ucontrol->value.enumerated.item[0]);
2410 }
2411 return ret;
2412}
2413
2414static int tdm_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
2415 struct snd_ctl_elem_value *ucontrol)
2416{
2417 struct tdm_port port;
2418 int ret = tdm_get_port_idx(kcontrol, &port);
2419
2420 if (ret) {
2421 pr_err("%s: unsupported control: %s\n",
2422 __func__, kcontrol->id.name);
2423 } else {
2424 tdm_rx_cfg[port.mode][port.channel].sample_rate =
2425 tdm_get_sample_rate(ucontrol->value.enumerated.item[0]);
2426
2427 pr_debug("%s: tdm_rx_sample_rate = %d, item = %d\n", __func__,
2428 tdm_rx_cfg[port.mode][port.channel].sample_rate,
2429 ucontrol->value.enumerated.item[0]);
2430 }
2431 return ret;
2432}
2433
2434static int tdm_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
2435 struct snd_ctl_elem_value *ucontrol)
2436{
2437 struct tdm_port port;
2438 int ret = tdm_get_port_idx(kcontrol, &port);
2439
2440 if (ret) {
2441 pr_err("%s: unsupported control: %s\n",
2442 __func__, kcontrol->id.name);
2443 } else {
2444 ucontrol->value.enumerated.item[0] = tdm_get_sample_rate_val(
2445 tdm_tx_cfg[port.mode][port.channel].sample_rate);
2446
2447 pr_debug("%s: tdm_tx_sample_rate = %d, item = %d\n", __func__,
2448 tdm_tx_cfg[port.mode][port.channel].sample_rate,
2449 ucontrol->value.enumerated.item[0]);
2450 }
2451 return ret;
2452}
2453
2454static int tdm_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
2455 struct snd_ctl_elem_value *ucontrol)
2456{
2457 struct tdm_port port;
2458 int ret = tdm_get_port_idx(kcontrol, &port);
2459
2460 if (ret) {
2461 pr_err("%s: unsupported control: %s\n",
2462 __func__, kcontrol->id.name);
2463 } else {
2464 tdm_tx_cfg[port.mode][port.channel].sample_rate =
2465 tdm_get_sample_rate(ucontrol->value.enumerated.item[0]);
2466
2467 pr_debug("%s: tdm_tx_sample_rate = %d, item = %d\n", __func__,
2468 tdm_tx_cfg[port.mode][port.channel].sample_rate,
2469 ucontrol->value.enumerated.item[0]);
2470 }
2471 return ret;
2472}
2473
2474static int tdm_get_format(int value)
2475{
2476 int format = 0;
2477
2478 switch (value) {
2479 case 0:
2480 format = SNDRV_PCM_FORMAT_S16_LE;
2481 break;
2482 case 1:
2483 format = SNDRV_PCM_FORMAT_S24_LE;
2484 break;
2485 case 2:
2486 format = SNDRV_PCM_FORMAT_S32_LE;
2487 break;
2488 default:
2489 format = SNDRV_PCM_FORMAT_S16_LE;
2490 break;
2491 }
2492 return format;
2493}
2494
2495static int tdm_get_format_val(int format)
2496{
2497 int value = 0;
2498
2499 switch (format) {
2500 case SNDRV_PCM_FORMAT_S16_LE:
2501 value = 0;
2502 break;
2503 case SNDRV_PCM_FORMAT_S24_LE:
2504 value = 1;
2505 break;
2506 case SNDRV_PCM_FORMAT_S32_LE:
2507 value = 2;
2508 break;
2509 default:
2510 value = 0;
2511 break;
2512 }
2513 return value;
2514}
2515
2516static int tdm_rx_format_get(struct snd_kcontrol *kcontrol,
2517 struct snd_ctl_elem_value *ucontrol)
2518{
2519 struct tdm_port port;
2520 int ret = tdm_get_port_idx(kcontrol, &port);
2521
2522 if (ret) {
2523 pr_err("%s: unsupported control: %s\n",
2524 __func__, kcontrol->id.name);
2525 } else {
2526 ucontrol->value.enumerated.item[0] = tdm_get_format_val(
2527 tdm_rx_cfg[port.mode][port.channel].bit_format);
2528
2529 pr_debug("%s: tdm_rx_bit_format = %d, item = %d\n", __func__,
2530 tdm_rx_cfg[port.mode][port.channel].bit_format,
2531 ucontrol->value.enumerated.item[0]);
2532 }
2533 return ret;
2534}
2535
2536static int tdm_rx_format_put(struct snd_kcontrol *kcontrol,
2537 struct snd_ctl_elem_value *ucontrol)
2538{
2539 struct tdm_port port;
2540 int ret = tdm_get_port_idx(kcontrol, &port);
2541
2542 if (ret) {
2543 pr_err("%s: unsupported control: %s\n",
2544 __func__, kcontrol->id.name);
2545 } else {
2546 tdm_rx_cfg[port.mode][port.channel].bit_format =
2547 tdm_get_format(ucontrol->value.enumerated.item[0]);
2548
2549 pr_debug("%s: tdm_rx_bit_format = %d, item = %d\n", __func__,
2550 tdm_rx_cfg[port.mode][port.channel].bit_format,
2551 ucontrol->value.enumerated.item[0]);
2552 }
2553 return ret;
2554}
2555
2556static int tdm_tx_format_get(struct snd_kcontrol *kcontrol,
2557 struct snd_ctl_elem_value *ucontrol)
2558{
2559 struct tdm_port port;
2560 int ret = tdm_get_port_idx(kcontrol, &port);
2561
2562 if (ret) {
2563 pr_err("%s: unsupported control: %s\n",
2564 __func__, kcontrol->id.name);
2565 } else {
2566 ucontrol->value.enumerated.item[0] = tdm_get_format_val(
2567 tdm_tx_cfg[port.mode][port.channel].bit_format);
2568
2569 pr_debug("%s: tdm_tx_bit_format = %d, item = %d\n", __func__,
2570 tdm_tx_cfg[port.mode][port.channel].bit_format,
2571 ucontrol->value.enumerated.item[0]);
2572 }
2573 return ret;
2574}
2575
2576static int tdm_tx_format_put(struct snd_kcontrol *kcontrol,
2577 struct snd_ctl_elem_value *ucontrol)
2578{
2579 struct tdm_port port;
2580 int ret = tdm_get_port_idx(kcontrol, &port);
2581
2582 if (ret) {
2583 pr_err("%s: unsupported control: %s\n",
2584 __func__, kcontrol->id.name);
2585 } else {
2586 tdm_tx_cfg[port.mode][port.channel].bit_format =
2587 tdm_get_format(ucontrol->value.enumerated.item[0]);
2588
2589 pr_debug("%s: tdm_tx_bit_format = %d, item = %d\n", __func__,
2590 tdm_tx_cfg[port.mode][port.channel].bit_format,
2591 ucontrol->value.enumerated.item[0]);
2592 }
2593 return ret;
2594}
2595
2596static int tdm_rx_ch_get(struct snd_kcontrol *kcontrol,
2597 struct snd_ctl_elem_value *ucontrol)
2598{
2599 struct tdm_port port;
2600 int ret = tdm_get_port_idx(kcontrol, &port);
2601
2602 if (ret) {
2603 pr_err("%s: unsupported control: %s\n",
2604 __func__, kcontrol->id.name);
2605 } else {
2606
2607 ucontrol->value.enumerated.item[0] =
2608 tdm_rx_cfg[port.mode][port.channel].channels - 1;
2609
2610 pr_debug("%s: tdm_rx_ch = %d, item = %d\n", __func__,
2611 tdm_rx_cfg[port.mode][port.channel].channels - 1,
2612 ucontrol->value.enumerated.item[0]);
2613 }
2614 return ret;
2615}
2616
2617static int tdm_rx_ch_put(struct snd_kcontrol *kcontrol,
2618 struct snd_ctl_elem_value *ucontrol)
2619{
2620 struct tdm_port port;
2621 int ret = tdm_get_port_idx(kcontrol, &port);
2622
2623 if (ret) {
2624 pr_err("%s: unsupported control: %s\n",
2625 __func__, kcontrol->id.name);
2626 } else {
2627 tdm_rx_cfg[port.mode][port.channel].channels =
2628 ucontrol->value.enumerated.item[0] + 1;
2629
2630 pr_debug("%s: tdm_rx_ch = %d, item = %d\n", __func__,
2631 tdm_rx_cfg[port.mode][port.channel].channels,
2632 ucontrol->value.enumerated.item[0] + 1);
2633 }
2634 return ret;
2635}
2636
2637static int tdm_tx_ch_get(struct snd_kcontrol *kcontrol,
2638 struct snd_ctl_elem_value *ucontrol)
2639{
2640 struct tdm_port port;
2641 int ret = tdm_get_port_idx(kcontrol, &port);
2642
2643 if (ret) {
2644 pr_err("%s: unsupported control: %s\n",
2645 __func__, kcontrol->id.name);
2646 } else {
2647 ucontrol->value.enumerated.item[0] =
2648 tdm_tx_cfg[port.mode][port.channel].channels - 1;
2649
2650 pr_debug("%s: tdm_tx_ch = %d, item = %d\n", __func__,
2651 tdm_tx_cfg[port.mode][port.channel].channels - 1,
2652 ucontrol->value.enumerated.item[0]);
2653 }
2654 return ret;
2655}
2656
2657static int tdm_tx_ch_put(struct snd_kcontrol *kcontrol,
2658 struct snd_ctl_elem_value *ucontrol)
2659{
2660 struct tdm_port port;
2661 int ret = tdm_get_port_idx(kcontrol, &port);
2662
2663 if (ret) {
2664 pr_err("%s: unsupported control: %s\n",
2665 __func__, kcontrol->id.name);
2666 } else {
2667 tdm_tx_cfg[port.mode][port.channel].channels =
2668 ucontrol->value.enumerated.item[0] + 1;
2669
2670 pr_debug("%s: tdm_tx_ch = %d, item = %d\n", __func__,
2671 tdm_tx_cfg[port.mode][port.channel].channels,
2672 ucontrol->value.enumerated.item[0] + 1);
2673 }
2674 return ret;
2675}
2676
2677static int aux_pcm_get_port_idx(struct snd_kcontrol *kcontrol)
2678{
2679 int idx;
2680
2681 if (strnstr(kcontrol->id.name, "PRIM_AUX_PCM",
2682 sizeof("PRIM_AUX_PCM"))) {
2683 idx = PRIM_AUX_PCM;
2684 } else if (strnstr(kcontrol->id.name, "SEC_AUX_PCM",
2685 sizeof("SEC_AUX_PCM"))) {
2686 idx = SEC_AUX_PCM;
2687 } else if (strnstr(kcontrol->id.name, "TERT_AUX_PCM",
2688 sizeof("TERT_AUX_PCM"))) {
2689 idx = TERT_AUX_PCM;
2690 } else if (strnstr(kcontrol->id.name, "QUAT_AUX_PCM",
2691 sizeof("QUAT_AUX_PCM"))) {
2692 idx = QUAT_AUX_PCM;
2693 } else if (strnstr(kcontrol->id.name, "QUIN_AUX_PCM",
2694 sizeof("QUIN_AUX_PCM"))) {
2695 idx = QUIN_AUX_PCM;
2696 } else {
2697 pr_err("%s: unsupported port: %s\n",
2698 __func__, kcontrol->id.name);
2699 idx = -EINVAL;
2700 }
2701
2702 return idx;
2703}
2704
2705static int aux_pcm_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
2706 struct snd_ctl_elem_value *ucontrol)
2707{
2708 int idx = aux_pcm_get_port_idx(kcontrol);
2709
2710 if (idx < 0)
2711 return idx;
2712
2713 aux_pcm_rx_cfg[idx].sample_rate =
2714 aux_pcm_get_sample_rate(ucontrol->value.enumerated.item[0]);
2715
2716 pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
2717 idx, aux_pcm_rx_cfg[idx].sample_rate,
2718 ucontrol->value.enumerated.item[0]);
2719
2720 return 0;
2721}
2722
2723static int aux_pcm_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
2724 struct snd_ctl_elem_value *ucontrol)
2725{
2726 int idx = aux_pcm_get_port_idx(kcontrol);
2727
2728 if (idx < 0)
2729 return idx;
2730
2731 ucontrol->value.enumerated.item[0] =
2732 aux_pcm_get_sample_rate_val(aux_pcm_rx_cfg[idx].sample_rate);
2733
2734 pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
2735 idx, aux_pcm_rx_cfg[idx].sample_rate,
2736 ucontrol->value.enumerated.item[0]);
2737
2738 return 0;
2739}
2740
2741static int aux_pcm_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
2742 struct snd_ctl_elem_value *ucontrol)
2743{
2744 int idx = aux_pcm_get_port_idx(kcontrol);
2745
2746 if (idx < 0)
2747 return idx;
2748
2749 aux_pcm_tx_cfg[idx].sample_rate =
2750 aux_pcm_get_sample_rate(ucontrol->value.enumerated.item[0]);
2751
2752 pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
2753 idx, aux_pcm_tx_cfg[idx].sample_rate,
2754 ucontrol->value.enumerated.item[0]);
2755
2756 return 0;
2757}
2758
2759static int aux_pcm_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
2760 struct snd_ctl_elem_value *ucontrol)
2761{
2762 int idx = aux_pcm_get_port_idx(kcontrol);
2763
2764 if (idx < 0)
2765 return idx;
2766
2767 ucontrol->value.enumerated.item[0] =
2768 aux_pcm_get_sample_rate_val(aux_pcm_tx_cfg[idx].sample_rate);
2769
2770 pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
2771 idx, aux_pcm_tx_cfg[idx].sample_rate,
2772 ucontrol->value.enumerated.item[0]);
2773
2774 return 0;
2775}
2776
2777static int mi2s_get_port_idx(struct snd_kcontrol *kcontrol)
2778{
2779 int idx;
2780
2781 if (strnstr(kcontrol->id.name, "PRIM_MI2S_RX",
2782 sizeof("PRIM_MI2S_RX"))) {
2783 idx = PRIM_MI2S;
2784 } else if (strnstr(kcontrol->id.name, "SEC_MI2S_RX",
2785 sizeof("SEC_MI2S_RX"))) {
2786 idx = SEC_MI2S;
2787 } else if (strnstr(kcontrol->id.name, "TERT_MI2S_RX",
2788 sizeof("TERT_MI2S_RX"))) {
2789 idx = TERT_MI2S;
2790 } else if (strnstr(kcontrol->id.name, "QUAT_MI2S_RX",
2791 sizeof("QUAT_MI2S_RX"))) {
2792 idx = QUAT_MI2S;
2793 } else if (strnstr(kcontrol->id.name, "QUIN_MI2S_RX",
2794 sizeof("QUIN_MI2S_RX"))) {
2795 idx = QUIN_MI2S;
2796 } else if (strnstr(kcontrol->id.name, "PRIM_MI2S_TX",
2797 sizeof("PRIM_MI2S_TX"))) {
2798 idx = PRIM_MI2S;
2799 } else if (strnstr(kcontrol->id.name, "SEC_MI2S_TX",
2800 sizeof("SEC_MI2S_TX"))) {
2801 idx = SEC_MI2S;
2802 } else if (strnstr(kcontrol->id.name, "TERT_MI2S_TX",
2803 sizeof("TERT_MI2S_TX"))) {
2804 idx = TERT_MI2S;
2805 } else if (strnstr(kcontrol->id.name, "QUAT_MI2S_TX",
2806 sizeof("QUAT_MI2S_TX"))) {
2807 idx = QUAT_MI2S;
2808 } else if (strnstr(kcontrol->id.name, "QUIN_MI2S_TX",
2809 sizeof("QUIN_MI2S_TX"))) {
2810 idx = QUIN_MI2S;
2811 } else {
2812 pr_err("%s: unsupported channel: %s\n",
2813 __func__, kcontrol->id.name);
2814 idx = -EINVAL;
2815 }
2816
2817 return idx;
2818}
2819
2820static int mi2s_get_sample_rate_val(int sample_rate)
2821{
2822 int sample_rate_val;
2823
2824 switch (sample_rate) {
2825 case SAMPLING_RATE_8KHZ:
2826 sample_rate_val = 0;
2827 break;
2828 case SAMPLING_RATE_11P025KHZ:
2829 sample_rate_val = 1;
2830 break;
2831 case SAMPLING_RATE_16KHZ:
2832 sample_rate_val = 2;
2833 break;
2834 case SAMPLING_RATE_22P05KHZ:
2835 sample_rate_val = 3;
2836 break;
2837 case SAMPLING_RATE_32KHZ:
2838 sample_rate_val = 4;
2839 break;
2840 case SAMPLING_RATE_44P1KHZ:
2841 sample_rate_val = 5;
2842 break;
2843 case SAMPLING_RATE_48KHZ:
2844 sample_rate_val = 6;
2845 break;
2846 case SAMPLING_RATE_96KHZ:
2847 sample_rate_val = 7;
2848 break;
2849 case SAMPLING_RATE_192KHZ:
2850 sample_rate_val = 8;
2851 break;
2852 default:
2853 sample_rate_val = 6;
2854 break;
2855 }
2856 return sample_rate_val;
2857}
2858
2859static int mi2s_get_sample_rate(int value)
2860{
2861 int sample_rate;
2862
2863 switch (value) {
2864 case 0:
2865 sample_rate = SAMPLING_RATE_8KHZ;
2866 break;
2867 case 1:
2868 sample_rate = SAMPLING_RATE_11P025KHZ;
2869 break;
2870 case 2:
2871 sample_rate = SAMPLING_RATE_16KHZ;
2872 break;
2873 case 3:
2874 sample_rate = SAMPLING_RATE_22P05KHZ;
2875 break;
2876 case 4:
2877 sample_rate = SAMPLING_RATE_32KHZ;
2878 break;
2879 case 5:
2880 sample_rate = SAMPLING_RATE_44P1KHZ;
2881 break;
2882 case 6:
2883 sample_rate = SAMPLING_RATE_48KHZ;
2884 break;
2885 case 7:
2886 sample_rate = SAMPLING_RATE_96KHZ;
2887 break;
2888 case 8:
2889 sample_rate = SAMPLING_RATE_192KHZ;
2890 break;
2891 default:
2892 sample_rate = SAMPLING_RATE_48KHZ;
2893 break;
2894 }
2895 return sample_rate;
2896}
2897
2898static int mi2s_auxpcm_get_format(int value)
2899{
2900 int format;
2901
2902 switch (value) {
2903 case 0:
2904 format = SNDRV_PCM_FORMAT_S16_LE;
2905 break;
2906 case 1:
2907 format = SNDRV_PCM_FORMAT_S24_LE;
2908 break;
2909 case 2:
2910 format = SNDRV_PCM_FORMAT_S24_3LE;
2911 break;
2912 case 3:
2913 format = SNDRV_PCM_FORMAT_S32_LE;
2914 break;
2915 default:
2916 format = SNDRV_PCM_FORMAT_S16_LE;
2917 break;
2918 }
2919 return format;
2920}
2921
2922static int mi2s_auxpcm_get_format_value(int format)
2923{
2924 int value;
2925
2926 switch (format) {
2927 case SNDRV_PCM_FORMAT_S16_LE:
2928 value = 0;
2929 break;
2930 case SNDRV_PCM_FORMAT_S24_LE:
2931 value = 1;
2932 break;
2933 case SNDRV_PCM_FORMAT_S24_3LE:
2934 value = 2;
2935 break;
2936 case SNDRV_PCM_FORMAT_S32_LE:
2937 value = 3;
2938 break;
2939 default:
2940 value = 0;
2941 break;
2942 }
2943 return value;
2944}
2945
2946static int mi2s_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
2947 struct snd_ctl_elem_value *ucontrol)
2948{
2949 int idx = mi2s_get_port_idx(kcontrol);
2950
2951 if (idx < 0)
2952 return idx;
2953
2954 mi2s_rx_cfg[idx].sample_rate =
2955 mi2s_get_sample_rate(ucontrol->value.enumerated.item[0]);
2956
2957 pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
2958 idx, mi2s_rx_cfg[idx].sample_rate,
2959 ucontrol->value.enumerated.item[0]);
2960
2961 return 0;
2962}
2963
2964static int mi2s_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
2965 struct snd_ctl_elem_value *ucontrol)
2966{
2967 int idx = mi2s_get_port_idx(kcontrol);
2968
2969 if (idx < 0)
2970 return idx;
2971
2972 ucontrol->value.enumerated.item[0] =
2973 mi2s_get_sample_rate_val(mi2s_rx_cfg[idx].sample_rate);
2974
2975 pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
2976 idx, mi2s_rx_cfg[idx].sample_rate,
2977 ucontrol->value.enumerated.item[0]);
2978
2979 return 0;
2980}
2981
2982static int mi2s_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
2983 struct snd_ctl_elem_value *ucontrol)
2984{
2985 int idx = mi2s_get_port_idx(kcontrol);
2986
2987 if (idx < 0)
2988 return idx;
2989
2990 mi2s_tx_cfg[idx].sample_rate =
2991 mi2s_get_sample_rate(ucontrol->value.enumerated.item[0]);
2992
2993 pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
2994 idx, mi2s_tx_cfg[idx].sample_rate,
2995 ucontrol->value.enumerated.item[0]);
2996
2997 return 0;
2998}
2999
3000static int mi2s_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
3001 struct snd_ctl_elem_value *ucontrol)
3002{
3003 int idx = mi2s_get_port_idx(kcontrol);
3004
3005 if (idx < 0)
3006 return idx;
3007
3008 ucontrol->value.enumerated.item[0] =
3009 mi2s_get_sample_rate_val(mi2s_tx_cfg[idx].sample_rate);
3010
3011 pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
3012 idx, mi2s_tx_cfg[idx].sample_rate,
3013 ucontrol->value.enumerated.item[0]);
3014
3015 return 0;
3016}
3017
3018static int msm_mi2s_rx_ch_get(struct snd_kcontrol *kcontrol,
3019 struct snd_ctl_elem_value *ucontrol)
3020{
3021 int idx = mi2s_get_port_idx(kcontrol);
3022
3023 if (idx < 0)
3024 return idx;
3025
3026 pr_debug("%s: msm_mi2s_[%d]_rx_ch = %d\n", __func__,
3027 idx, mi2s_rx_cfg[idx].channels);
3028 ucontrol->value.enumerated.item[0] = mi2s_rx_cfg[idx].channels - 1;
3029
3030 return 0;
3031}
3032
3033static int msm_mi2s_rx_ch_put(struct snd_kcontrol *kcontrol,
3034 struct snd_ctl_elem_value *ucontrol)
3035{
3036 int idx = mi2s_get_port_idx(kcontrol);
3037
3038 if (idx < 0)
3039 return idx;
3040
3041 mi2s_rx_cfg[idx].channels = ucontrol->value.enumerated.item[0] + 1;
3042 pr_debug("%s: msm_mi2s_[%d]_rx_ch = %d\n", __func__,
3043 idx, mi2s_rx_cfg[idx].channels);
3044
3045 return 1;
3046}
3047
3048static int msm_mi2s_tx_ch_get(struct snd_kcontrol *kcontrol,
3049 struct snd_ctl_elem_value *ucontrol)
3050{
3051 int idx = mi2s_get_port_idx(kcontrol);
3052
3053 if (idx < 0)
3054 return idx;
3055
3056 pr_debug("%s: msm_mi2s_[%d]_tx_ch = %d\n", __func__,
3057 idx, mi2s_tx_cfg[idx].channels);
3058 ucontrol->value.enumerated.item[0] = mi2s_tx_cfg[idx].channels - 1;
3059
3060 return 0;
3061}
3062
3063static int msm_mi2s_tx_ch_put(struct snd_kcontrol *kcontrol,
3064 struct snd_ctl_elem_value *ucontrol)
3065{
3066 int idx = mi2s_get_port_idx(kcontrol);
3067
3068 if (idx < 0)
3069 return idx;
3070
3071 mi2s_tx_cfg[idx].channels = ucontrol->value.enumerated.item[0] + 1;
3072 pr_debug("%s: msm_mi2s_[%d]_tx_ch = %d\n", __func__,
3073 idx, mi2s_tx_cfg[idx].channels);
3074
3075 return 1;
3076}
3077
3078static int msm_mi2s_rx_format_get(struct snd_kcontrol *kcontrol,
3079 struct snd_ctl_elem_value *ucontrol)
3080{
3081 int idx = mi2s_get_port_idx(kcontrol);
3082
3083 if (idx < 0)
3084 return idx;
3085
3086 ucontrol->value.enumerated.item[0] =
3087 mi2s_auxpcm_get_format_value(mi2s_rx_cfg[idx].bit_format);
3088
3089 pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
3090 idx, mi2s_rx_cfg[idx].bit_format,
3091 ucontrol->value.enumerated.item[0]);
3092
3093 return 0;
3094}
3095
3096static int msm_mi2s_rx_format_put(struct snd_kcontrol *kcontrol,
3097 struct snd_ctl_elem_value *ucontrol)
3098{
3099 int idx = mi2s_get_port_idx(kcontrol);
3100
3101 if (idx < 0)
3102 return idx;
3103
3104 mi2s_rx_cfg[idx].bit_format =
3105 mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
3106
3107 pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
3108 idx, mi2s_rx_cfg[idx].bit_format,
3109 ucontrol->value.enumerated.item[0]);
3110
3111 return 0;
3112}
3113
3114static int msm_mi2s_tx_format_get(struct snd_kcontrol *kcontrol,
3115 struct snd_ctl_elem_value *ucontrol)
3116{
3117 int idx = mi2s_get_port_idx(kcontrol);
3118
3119 if (idx < 0)
3120 return idx;
3121
3122 ucontrol->value.enumerated.item[0] =
3123 mi2s_auxpcm_get_format_value(mi2s_tx_cfg[idx].bit_format);
3124
3125 pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
3126 idx, mi2s_tx_cfg[idx].bit_format,
3127 ucontrol->value.enumerated.item[0]);
3128
3129 return 0;
3130}
3131
3132static int msm_mi2s_tx_format_put(struct snd_kcontrol *kcontrol,
3133 struct snd_ctl_elem_value *ucontrol)
3134{
3135 int idx = mi2s_get_port_idx(kcontrol);
3136
3137 if (idx < 0)
3138 return idx;
3139
3140 mi2s_tx_cfg[idx].bit_format =
3141 mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
3142
3143 pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
3144 idx, mi2s_tx_cfg[idx].bit_format,
3145 ucontrol->value.enumerated.item[0]);
3146
3147 return 0;
3148}
3149
3150static int msm_aux_pcm_rx_format_get(struct snd_kcontrol *kcontrol,
3151 struct snd_ctl_elem_value *ucontrol)
3152{
3153 int idx = aux_pcm_get_port_idx(kcontrol);
3154
3155 if (idx < 0)
3156 return idx;
3157
3158 ucontrol->value.enumerated.item[0] =
3159 mi2s_auxpcm_get_format_value(aux_pcm_rx_cfg[idx].bit_format);
3160
3161 pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
3162 idx, aux_pcm_rx_cfg[idx].bit_format,
3163 ucontrol->value.enumerated.item[0]);
3164
3165 return 0;
3166}
3167
3168static int msm_aux_pcm_rx_format_put(struct snd_kcontrol *kcontrol,
3169 struct snd_ctl_elem_value *ucontrol)
3170{
3171 int idx = aux_pcm_get_port_idx(kcontrol);
3172
3173 if (idx < 0)
3174 return idx;
3175
3176 aux_pcm_rx_cfg[idx].bit_format =
3177 mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
3178
3179 pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
3180 idx, aux_pcm_rx_cfg[idx].bit_format,
3181 ucontrol->value.enumerated.item[0]);
3182
3183 return 0;
3184}
3185
3186static int msm_aux_pcm_tx_format_get(struct snd_kcontrol *kcontrol,
3187 struct snd_ctl_elem_value *ucontrol)
3188{
3189 int idx = aux_pcm_get_port_idx(kcontrol);
3190
3191 if (idx < 0)
3192 return idx;
3193
3194 ucontrol->value.enumerated.item[0] =
3195 mi2s_auxpcm_get_format_value(aux_pcm_tx_cfg[idx].bit_format);
3196
3197 pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
3198 idx, aux_pcm_tx_cfg[idx].bit_format,
3199 ucontrol->value.enumerated.item[0]);
3200
3201 return 0;
3202}
3203
3204static int msm_aux_pcm_tx_format_put(struct snd_kcontrol *kcontrol,
3205 struct snd_ctl_elem_value *ucontrol)
3206{
3207 int idx = aux_pcm_get_port_idx(kcontrol);
3208
3209 if (idx < 0)
3210 return idx;
3211
3212 aux_pcm_tx_cfg[idx].bit_format =
3213 mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
3214
3215 pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
3216 idx, aux_pcm_tx_cfg[idx].bit_format,
3217 ucontrol->value.enumerated.item[0]);
3218
3219 return 0;
3220}
3221
3222static int msm_hifi_ctrl(struct snd_soc_codec *codec)
3223{
3224 struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
3225 struct snd_soc_card *card = codec->component.card;
3226 struct msm_asoc_mach_data *pdata =
3227 snd_soc_card_get_drvdata(card);
3228
3229 dev_dbg(codec->dev, "%s: msm_hifi_control = %d\n", __func__,
3230 msm_hifi_control);
3231
3232 if (!pdata || !pdata->hph_en1_gpio_p) {
3233 dev_err(codec->dev, "%s: hph_en1_gpio is invalid\n", __func__);
3234 return -EINVAL;
3235 }
3236 if (msm_hifi_control == MSM_HIFI_ON) {
3237 msm_cdc_pinctrl_select_active_state(pdata->hph_en1_gpio_p);
3238 /* 5msec delay needed as per HW requirement */
3239 usleep_range(5000, 5010);
3240 } else {
3241 msm_cdc_pinctrl_select_sleep_state(pdata->hph_en1_gpio_p);
3242 }
3243 snd_soc_dapm_sync(dapm);
3244
3245 return 0;
3246}
3247
3248static int msm_hifi_get(struct snd_kcontrol *kcontrol,
3249 struct snd_ctl_elem_value *ucontrol)
3250{
3251 pr_debug("%s: msm_hifi_control = %d\n",
3252 __func__, msm_hifi_control);
3253 ucontrol->value.integer.value[0] = msm_hifi_control;
3254
3255 return 0;
3256}
3257
3258static int msm_hifi_put(struct snd_kcontrol *kcontrol,
3259 struct snd_ctl_elem_value *ucontrol)
3260{
3261 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
3262
3263 dev_dbg(codec->dev, "%s: ucontrol->value.integer.value[0] = %ld\n",
3264 __func__, ucontrol->value.integer.value[0]);
3265
3266 msm_hifi_control = ucontrol->value.integer.value[0];
3267 msm_hifi_ctrl(codec);
3268
3269 return 0;
3270}
3271
3272static const struct snd_kcontrol_new msm_int_snd_controls[] = {
3273 SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 Channels", wsa_cdc_dma_rx_0_chs,
3274 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3275 SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 Channels", wsa_cdc_dma_rx_1_chs,
3276 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3277 SOC_ENUM_EXT("RX_CDC_DMA_RX_0 Channels", rx_cdc_dma_rx_0_chs,
3278 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3279 SOC_ENUM_EXT("RX_CDC_DMA_RX_1 Channels", rx_cdc_dma_rx_1_chs,
3280 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3281 SOC_ENUM_EXT("RX_CDC_DMA_RX_2 Channels", rx_cdc_dma_rx_2_chs,
3282 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3283 SOC_ENUM_EXT("RX_CDC_DMA_RX_3 Channels", rx_cdc_dma_rx_3_chs,
3284 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3285 SOC_ENUM_EXT("RX_CDC_DMA_RX_5 Channels", rx_cdc_dma_rx_5_chs,
3286 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3287 SOC_ENUM_EXT("WSA_CDC_DMA_TX_0 Channels", wsa_cdc_dma_tx_0_chs,
3288 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3289 SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 Channels", wsa_cdc_dma_tx_1_chs,
3290 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3291 SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 Channels", wsa_cdc_dma_tx_2_chs,
3292 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3293 SOC_ENUM_EXT("TX_CDC_DMA_TX_0 Channels", tx_cdc_dma_tx_0_chs,
3294 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3295 SOC_ENUM_EXT("TX_CDC_DMA_TX_3 Channels", tx_cdc_dma_tx_3_chs,
3296 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3297 SOC_ENUM_EXT("TX_CDC_DMA_TX_4 Channels", tx_cdc_dma_tx_4_chs,
3298 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3299 SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 Format", wsa_cdc_dma_rx_0_format,
3300 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3301 SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 Format", wsa_cdc_dma_rx_1_format,
3302 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3303 SOC_ENUM_EXT("RX_CDC_DMA_RX_0 Format", rx_cdc_dma_rx_0_format,
3304 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3305 SOC_ENUM_EXT("RX_CDC_DMA_RX_1 Format", rx_cdc_dma_rx_1_format,
3306 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3307 SOC_ENUM_EXT("RX_CDC_DMA_RX_2 Format", rx_cdc_dma_rx_2_format,
3308 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3309 SOC_ENUM_EXT("RX_CDC_DMA_RX_3 Format", rx_cdc_dma_rx_3_format,
3310 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3311 SOC_ENUM_EXT("RX_CDC_DMA_RX_5 Format", rx_cdc_dma_rx_5_format,
3312 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3313 SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 Format", wsa_cdc_dma_tx_1_format,
3314 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
3315 SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 Format", wsa_cdc_dma_tx_2_format,
3316 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
3317 SOC_ENUM_EXT("TX_CDC_DMA_TX_0 Format", tx_cdc_dma_tx_0_format,
3318 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
3319 SOC_ENUM_EXT("TX_CDC_DMA_TX_3 Format", tx_cdc_dma_tx_3_format,
3320 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
3321 SOC_ENUM_EXT("TX_CDC_DMA_TX_4 Format", tx_cdc_dma_tx_4_format,
3322 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
3323 SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 SampleRate",
3324 wsa_cdc_dma_rx_0_sample_rate,
3325 cdc_dma_rx_sample_rate_get,
3326 cdc_dma_rx_sample_rate_put),
3327 SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 SampleRate",
3328 wsa_cdc_dma_rx_1_sample_rate,
3329 cdc_dma_rx_sample_rate_get,
3330 cdc_dma_rx_sample_rate_put),
3331 SOC_ENUM_EXT("RX_CDC_DMA_RX_0 SampleRate",
3332 rx_cdc_dma_rx_0_sample_rate,
3333 cdc_dma_rx_sample_rate_get,
3334 cdc_dma_rx_sample_rate_put),
3335 SOC_ENUM_EXT("RX_CDC_DMA_RX_1 SampleRate",
3336 rx_cdc_dma_rx_1_sample_rate,
3337 cdc_dma_rx_sample_rate_get,
3338 cdc_dma_rx_sample_rate_put),
3339 SOC_ENUM_EXT("RX_CDC_DMA_RX_2 SampleRate",
3340 rx_cdc_dma_rx_2_sample_rate,
3341 cdc_dma_rx_sample_rate_get,
3342 cdc_dma_rx_sample_rate_put),
3343 SOC_ENUM_EXT("RX_CDC_DMA_RX_3 SampleRate",
3344 rx_cdc_dma_rx_3_sample_rate,
3345 cdc_dma_rx_sample_rate_get,
3346 cdc_dma_rx_sample_rate_put),
3347 SOC_ENUM_EXT("RX_CDC_DMA_RX_5 SampleRate",
3348 rx_cdc_dma_rx_5_sample_rate,
3349 cdc_dma_rx_sample_rate_get,
3350 cdc_dma_rx_sample_rate_put),
3351 SOC_ENUM_EXT("WSA_CDC_DMA_TX_0 SampleRate",
3352 wsa_cdc_dma_tx_0_sample_rate,
3353 cdc_dma_tx_sample_rate_get,
3354 cdc_dma_tx_sample_rate_put),
3355 SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 SampleRate",
3356 wsa_cdc_dma_tx_1_sample_rate,
3357 cdc_dma_tx_sample_rate_get,
3358 cdc_dma_tx_sample_rate_put),
3359 SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 SampleRate",
3360 wsa_cdc_dma_tx_2_sample_rate,
3361 cdc_dma_tx_sample_rate_get,
3362 cdc_dma_tx_sample_rate_put),
3363 SOC_ENUM_EXT("TX_CDC_DMA_TX_0 SampleRate",
3364 tx_cdc_dma_tx_0_sample_rate,
3365 cdc_dma_tx_sample_rate_get,
3366 cdc_dma_tx_sample_rate_put),
3367 SOC_ENUM_EXT("TX_CDC_DMA_TX_3 SampleRate",
3368 tx_cdc_dma_tx_3_sample_rate,
3369 cdc_dma_tx_sample_rate_get,
3370 cdc_dma_tx_sample_rate_put),
3371 SOC_ENUM_EXT("TX_CDC_DMA_TX_4 SampleRate",
3372 tx_cdc_dma_tx_4_sample_rate,
3373 cdc_dma_tx_sample_rate_get,
3374 cdc_dma_tx_sample_rate_put),
3375};
3376
3377static const struct snd_kcontrol_new msm_tavil_snd_controls[] = {
3378 SOC_ENUM_EXT("SLIM_0_RX Channels", slim_0_rx_chs,
3379 slim_rx_ch_get, slim_rx_ch_put),
3380 SOC_ENUM_EXT("SLIM_2_RX Channels", slim_2_rx_chs,
3381 slim_rx_ch_get, slim_rx_ch_put),
3382 SOC_ENUM_EXT("SLIM_0_TX Channels", slim_0_tx_chs,
3383 slim_tx_ch_get, slim_tx_ch_put),
3384 SOC_ENUM_EXT("SLIM_1_TX Channels", slim_1_tx_chs,
3385 slim_tx_ch_get, slim_tx_ch_put),
3386 SOC_ENUM_EXT("SLIM_5_RX Channels", slim_5_rx_chs,
3387 slim_rx_ch_get, slim_rx_ch_put),
3388 SOC_ENUM_EXT("SLIM_6_RX Channels", slim_6_rx_chs,
3389 slim_rx_ch_get, slim_rx_ch_put),
3390 SOC_ENUM_EXT("VI_FEED_TX Channels", vi_feed_tx_chs,
3391 msm_vi_feed_tx_ch_get, msm_vi_feed_tx_ch_put),
3392 SOC_ENUM_EXT("SLIM_0_RX Format", slim_0_rx_format,
3393 slim_rx_bit_format_get, slim_rx_bit_format_put),
3394 SOC_ENUM_EXT("SLIM_5_RX Format", slim_5_rx_format,
3395 slim_rx_bit_format_get, slim_rx_bit_format_put),
3396 SOC_ENUM_EXT("SLIM_6_RX Format", slim_6_rx_format,
3397 slim_rx_bit_format_get, slim_rx_bit_format_put),
3398 SOC_ENUM_EXT("SLIM_0_TX Format", slim_0_tx_format,
3399 slim_tx_bit_format_get, slim_tx_bit_format_put),
3400 SOC_ENUM_EXT("SLIM_0_RX SampleRate", slim_0_rx_sample_rate,
3401 slim_rx_sample_rate_get, slim_rx_sample_rate_put),
3402 SOC_ENUM_EXT("SLIM_2_RX SampleRate", slim_2_rx_sample_rate,
3403 slim_rx_sample_rate_get, slim_rx_sample_rate_put),
3404 SOC_ENUM_EXT("SLIM_0_TX SampleRate", slim_0_tx_sample_rate,
3405 slim_tx_sample_rate_get, slim_tx_sample_rate_put),
3406 SOC_ENUM_EXT("SLIM_5_RX SampleRate", slim_5_rx_sample_rate,
3407 slim_rx_sample_rate_get, slim_rx_sample_rate_put),
3408 SOC_ENUM_EXT("SLIM_6_RX SampleRate", slim_6_rx_sample_rate,
3409 slim_rx_sample_rate_get, slim_rx_sample_rate_put),
3410};
3411
3412static const struct snd_kcontrol_new msm_common_snd_controls[] = {
3413 SOC_ENUM_EXT("USB_AUDIO_RX Channels", usb_rx_chs,
3414 usb_audio_rx_ch_get, usb_audio_rx_ch_put),
3415 SOC_ENUM_EXT("USB_AUDIO_TX Channels", usb_tx_chs,
3416 usb_audio_tx_ch_get, usb_audio_tx_ch_put),
3417 SOC_ENUM_EXT("Display Port RX Channels", ext_disp_rx_chs,
3418 ext_disp_rx_ch_get, ext_disp_rx_ch_put),
3419 SOC_ENUM_EXT("PROXY_RX Channels", proxy_rx_chs,
3420 proxy_rx_ch_get, proxy_rx_ch_put),
3421 SOC_ENUM_EXT("USB_AUDIO_RX Format", usb_rx_format,
3422 usb_audio_rx_format_get, usb_audio_rx_format_put),
3423 SOC_ENUM_EXT("USB_AUDIO_TX Format", usb_tx_format,
3424 usb_audio_tx_format_get, usb_audio_tx_format_put),
3425 SOC_ENUM_EXT("Display Port RX Bit Format", ext_disp_rx_format,
3426 ext_disp_rx_format_get, ext_disp_rx_format_put),
3427 SOC_ENUM_EXT("USB_AUDIO_RX SampleRate", usb_rx_sample_rate,
3428 usb_audio_rx_sample_rate_get,
3429 usb_audio_rx_sample_rate_put),
3430 SOC_ENUM_EXT("USB_AUDIO_TX SampleRate", usb_tx_sample_rate,
3431 usb_audio_tx_sample_rate_get,
3432 usb_audio_tx_sample_rate_put),
3433 SOC_ENUM_EXT("Display Port RX SampleRate", ext_disp_rx_sample_rate,
3434 ext_disp_rx_sample_rate_get,
3435 ext_disp_rx_sample_rate_put),
3436 SOC_ENUM_EXT("PRI_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3437 tdm_rx_sample_rate_get,
3438 tdm_rx_sample_rate_put),
3439 SOC_ENUM_EXT("PRI_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3440 tdm_tx_sample_rate_get,
3441 tdm_tx_sample_rate_put),
3442 SOC_ENUM_EXT("PRI_TDM_RX_0 Format", tdm_rx_format,
3443 tdm_rx_format_get,
3444 tdm_rx_format_put),
3445 SOC_ENUM_EXT("PRI_TDM_TX_0 Format", tdm_tx_format,
3446 tdm_tx_format_get,
3447 tdm_tx_format_put),
3448 SOC_ENUM_EXT("PRI_TDM_RX_0 Channels", tdm_rx_chs,
3449 tdm_rx_ch_get,
3450 tdm_rx_ch_put),
3451 SOC_ENUM_EXT("PRI_TDM_TX_0 Channels", tdm_tx_chs,
3452 tdm_tx_ch_get,
3453 tdm_tx_ch_put),
3454 SOC_ENUM_EXT("SEC_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3455 tdm_rx_sample_rate_get,
3456 tdm_rx_sample_rate_put),
3457 SOC_ENUM_EXT("SEC_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3458 tdm_tx_sample_rate_get,
3459 tdm_tx_sample_rate_put),
3460 SOC_ENUM_EXT("SEC_TDM_RX_0 Format", tdm_rx_format,
3461 tdm_rx_format_get,
3462 tdm_rx_format_put),
3463 SOC_ENUM_EXT("SEC_TDM_TX_0 Format", tdm_tx_format,
3464 tdm_tx_format_get,
3465 tdm_tx_format_put),
3466 SOC_ENUM_EXT("SEC_TDM_RX_0 Channels", tdm_rx_chs,
3467 tdm_rx_ch_get,
3468 tdm_rx_ch_put),
3469 SOC_ENUM_EXT("SEC_TDM_TX_0 Channels", tdm_tx_chs,
3470 tdm_tx_ch_get,
3471 tdm_tx_ch_put),
3472 SOC_ENUM_EXT("TERT_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3473 tdm_rx_sample_rate_get,
3474 tdm_rx_sample_rate_put),
3475 SOC_ENUM_EXT("TERT_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3476 tdm_tx_sample_rate_get,
3477 tdm_tx_sample_rate_put),
3478 SOC_ENUM_EXT("TERT_TDM_RX_0 Format", tdm_rx_format,
3479 tdm_rx_format_get,
3480 tdm_rx_format_put),
3481 SOC_ENUM_EXT("TERT_TDM_TX_0 Format", tdm_tx_format,
3482 tdm_tx_format_get,
3483 tdm_tx_format_put),
3484 SOC_ENUM_EXT("TERT_TDM_RX_0 Channels", tdm_rx_chs,
3485 tdm_rx_ch_get,
3486 tdm_rx_ch_put),
3487 SOC_ENUM_EXT("TERT_TDM_TX_0 Channels", tdm_tx_chs,
3488 tdm_tx_ch_get,
3489 tdm_tx_ch_put),
3490 SOC_ENUM_EXT("QUAT_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3491 tdm_rx_sample_rate_get,
3492 tdm_rx_sample_rate_put),
3493 SOC_ENUM_EXT("QUAT_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3494 tdm_tx_sample_rate_get,
3495 tdm_tx_sample_rate_put),
3496 SOC_ENUM_EXT("QUAT_TDM_RX_0 Format", tdm_rx_format,
3497 tdm_rx_format_get,
3498 tdm_rx_format_put),
3499 SOC_ENUM_EXT("QUAT_TDM_TX_0 Format", tdm_tx_format,
3500 tdm_tx_format_get,
3501 tdm_tx_format_put),
3502 SOC_ENUM_EXT("QUAT_TDM_RX_0 Channels", tdm_rx_chs,
3503 tdm_rx_ch_get,
3504 tdm_rx_ch_put),
3505 SOC_ENUM_EXT("QUAT_TDM_TX_0 Channels", tdm_tx_chs,
3506 tdm_tx_ch_get,
3507 tdm_tx_ch_put),
3508 SOC_ENUM_EXT("QUIN_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3509 tdm_rx_sample_rate_get,
3510 tdm_rx_sample_rate_put),
3511 SOC_ENUM_EXT("QUIN_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3512 tdm_tx_sample_rate_get,
3513 tdm_tx_sample_rate_put),
3514 SOC_ENUM_EXT("QUIN_TDM_RX_0 Format", tdm_rx_format,
3515 tdm_rx_format_get,
3516 tdm_rx_format_put),
3517 SOC_ENUM_EXT("QUIN_TDM_TX_0 Format", tdm_tx_format,
3518 tdm_tx_format_get,
3519 tdm_tx_format_put),
3520 SOC_ENUM_EXT("QUIN_TDM_RX_0 Channels", tdm_rx_chs,
3521 tdm_rx_ch_get,
3522 tdm_rx_ch_put),
3523 SOC_ENUM_EXT("QUIN_TDM_TX_0 Channels", tdm_tx_chs,
3524 tdm_tx_ch_get,
3525 tdm_tx_ch_put),
3526 SOC_ENUM_EXT("PRIM_AUX_PCM_RX SampleRate", prim_aux_pcm_rx_sample_rate,
3527 aux_pcm_rx_sample_rate_get,
3528 aux_pcm_rx_sample_rate_put),
3529 SOC_ENUM_EXT("SEC_AUX_PCM_RX SampleRate", sec_aux_pcm_rx_sample_rate,
3530 aux_pcm_rx_sample_rate_get,
3531 aux_pcm_rx_sample_rate_put),
3532 SOC_ENUM_EXT("TERT_AUX_PCM_RX SampleRate", tert_aux_pcm_rx_sample_rate,
3533 aux_pcm_rx_sample_rate_get,
3534 aux_pcm_rx_sample_rate_put),
3535 SOC_ENUM_EXT("QUAT_AUX_PCM_RX SampleRate", quat_aux_pcm_rx_sample_rate,
3536 aux_pcm_rx_sample_rate_get,
3537 aux_pcm_rx_sample_rate_put),
3538 SOC_ENUM_EXT("QUIN_AUX_PCM_RX SampleRate", quin_aux_pcm_rx_sample_rate,
3539 aux_pcm_rx_sample_rate_get,
3540 aux_pcm_rx_sample_rate_put),
3541 SOC_ENUM_EXT("PRIM_AUX_PCM_TX SampleRate", prim_aux_pcm_tx_sample_rate,
3542 aux_pcm_tx_sample_rate_get,
3543 aux_pcm_tx_sample_rate_put),
3544 SOC_ENUM_EXT("SEC_AUX_PCM_TX SampleRate", sec_aux_pcm_tx_sample_rate,
3545 aux_pcm_tx_sample_rate_get,
3546 aux_pcm_tx_sample_rate_put),
3547 SOC_ENUM_EXT("TERT_AUX_PCM_TX SampleRate", tert_aux_pcm_tx_sample_rate,
3548 aux_pcm_tx_sample_rate_get,
3549 aux_pcm_tx_sample_rate_put),
3550 SOC_ENUM_EXT("QUAT_AUX_PCM_TX SampleRate", quat_aux_pcm_tx_sample_rate,
3551 aux_pcm_tx_sample_rate_get,
3552 aux_pcm_tx_sample_rate_put),
3553 SOC_ENUM_EXT("QUIN_AUX_PCM_TX SampleRate", quin_aux_pcm_tx_sample_rate,
3554 aux_pcm_tx_sample_rate_get,
3555 aux_pcm_tx_sample_rate_put),
3556 SOC_ENUM_EXT("PRIM_MI2S_RX SampleRate", prim_mi2s_rx_sample_rate,
3557 mi2s_rx_sample_rate_get,
3558 mi2s_rx_sample_rate_put),
3559 SOC_ENUM_EXT("SEC_MI2S_RX SampleRate", sec_mi2s_rx_sample_rate,
3560 mi2s_rx_sample_rate_get,
3561 mi2s_rx_sample_rate_put),
3562 SOC_ENUM_EXT("TERT_MI2S_RX SampleRate", tert_mi2s_rx_sample_rate,
3563 mi2s_rx_sample_rate_get,
3564 mi2s_rx_sample_rate_put),
3565 SOC_ENUM_EXT("QUAT_MI2S_RX SampleRate", quat_mi2s_rx_sample_rate,
3566 mi2s_rx_sample_rate_get,
3567 mi2s_rx_sample_rate_put),
3568 SOC_ENUM_EXT("QUIN_MI2S_RX SampleRate", quin_mi2s_rx_sample_rate,
3569 mi2s_rx_sample_rate_get,
3570 mi2s_rx_sample_rate_put),
3571 SOC_ENUM_EXT("PRIM_MI2S_TX SampleRate", prim_mi2s_tx_sample_rate,
3572 mi2s_tx_sample_rate_get,
3573 mi2s_tx_sample_rate_put),
3574 SOC_ENUM_EXT("SEC_MI2S_TX SampleRate", sec_mi2s_tx_sample_rate,
3575 mi2s_tx_sample_rate_get,
3576 mi2s_tx_sample_rate_put),
3577 SOC_ENUM_EXT("TERT_MI2S_TX SampleRate", tert_mi2s_tx_sample_rate,
3578 mi2s_tx_sample_rate_get,
3579 mi2s_tx_sample_rate_put),
3580 SOC_ENUM_EXT("QUAT_MI2S_TX SampleRate", quat_mi2s_tx_sample_rate,
3581 mi2s_tx_sample_rate_get,
3582 mi2s_tx_sample_rate_put),
3583 SOC_ENUM_EXT("QUIN_MI2S_TX SampleRate", quin_mi2s_tx_sample_rate,
3584 mi2s_tx_sample_rate_get,
3585 mi2s_tx_sample_rate_put),
3586 SOC_ENUM_EXT("PRIM_MI2S_RX Channels", prim_mi2s_rx_chs,
3587 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
3588 SOC_ENUM_EXT("PRIM_MI2S_TX Channels", prim_mi2s_tx_chs,
3589 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
3590 SOC_ENUM_EXT("SEC_MI2S_RX Channels", sec_mi2s_rx_chs,
3591 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
3592 SOC_ENUM_EXT("SEC_MI2S_TX Channels", sec_mi2s_tx_chs,
3593 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
3594 SOC_ENUM_EXT("TERT_MI2S_RX Channels", tert_mi2s_rx_chs,
3595 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
3596 SOC_ENUM_EXT("TERT_MI2S_TX Channels", tert_mi2s_tx_chs,
3597 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
3598 SOC_ENUM_EXT("QUAT_MI2S_RX Channels", quat_mi2s_rx_chs,
3599 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
3600 SOC_ENUM_EXT("QUAT_MI2S_TX Channels", quat_mi2s_tx_chs,
3601 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
3602 SOC_ENUM_EXT("QUIN_MI2S_RX Channels", quin_mi2s_rx_chs,
3603 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
3604 SOC_ENUM_EXT("QUIN_MI2S_TX Channels", quin_mi2s_tx_chs,
3605 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
3606 SOC_ENUM_EXT("PRIM_MI2S_RX Format", mi2s_rx_format,
3607 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
3608 SOC_ENUM_EXT("PRIM_MI2S_TX Format", mi2s_tx_format,
3609 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
3610 SOC_ENUM_EXT("SEC_MI2S_RX Format", mi2s_rx_format,
3611 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
3612 SOC_ENUM_EXT("SEC_MI2S_TX Format", mi2s_tx_format,
3613 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
3614 SOC_ENUM_EXT("TERT_MI2S_RX Format", mi2s_rx_format,
3615 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
3616 SOC_ENUM_EXT("TERT_MI2S_TX Format", mi2s_tx_format,
3617 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
3618 SOC_ENUM_EXT("QUAT_MI2S_RX Format", mi2s_rx_format,
3619 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
3620 SOC_ENUM_EXT("QUAT_MI2S_TX Format", mi2s_tx_format,
3621 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
3622 SOC_ENUM_EXT("QUIN_MI2S_RX Format", mi2s_rx_format,
3623 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
3624 SOC_ENUM_EXT("QUIN_MI2S_TX Format", mi2s_tx_format,
3625 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
3626 SOC_ENUM_EXT("PRIM_AUX_PCM_RX Format", aux_pcm_rx_format,
3627 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3628 SOC_ENUM_EXT("PRIM_AUX_PCM_TX Format", aux_pcm_tx_format,
3629 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3630 SOC_ENUM_EXT("SEC_AUX_PCM_RX Format", aux_pcm_rx_format,
3631 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3632 SOC_ENUM_EXT("SEC_AUX_PCM_TX Format", aux_pcm_tx_format,
3633 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3634 SOC_ENUM_EXT("TERT_AUX_PCM_RX Format", aux_pcm_rx_format,
3635 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3636 SOC_ENUM_EXT("TERT_AUX_PCM_TX Format", aux_pcm_tx_format,
3637 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3638 SOC_ENUM_EXT("QUAT_AUX_PCM_RX Format", aux_pcm_rx_format,
3639 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3640 SOC_ENUM_EXT("QUAT_AUX_PCM_TX Format", aux_pcm_tx_format,
3641 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3642 SOC_ENUM_EXT("QUIN_AUX_PCM_RX Format", aux_pcm_rx_format,
3643 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3644 SOC_ENUM_EXT("QUIN_AUX_PCM_TX Format", aux_pcm_tx_format,
3645 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3646 SOC_ENUM_EXT("HiFi Function", hifi_function, msm_hifi_get,
3647 msm_hifi_put),
3648 SOC_ENUM_EXT("BT SampleRate", bt_sample_rate,
3649 msm_bt_sample_rate_get,
3650 msm_bt_sample_rate_put),
3651};
3652
3653static int msm_snd_enable_codec_ext_clk(struct snd_soc_codec *codec,
3654 int enable, bool dapm)
3655{
3656 int ret = 0;
3657
3658 if (!strcmp(dev_name(codec->dev), "tavil_codec")) {
3659 ret = tavil_cdc_mclk_enable(codec, enable);
3660 } else {
3661 dev_err(codec->dev, "%s: unknown codec to enable ext clk\n",
3662 __func__);
3663 ret = -EINVAL;
3664 }
3665 return ret;
3666}
3667
3668static int msm_snd_enable_codec_ext_tx_clk(struct snd_soc_codec *codec,
3669 int enable, bool dapm)
3670{
3671 int ret = 0;
3672
3673 if (!strcmp(dev_name(codec->dev), "tavil_codec")) {
3674 ret = tavil_cdc_mclk_tx_enable(codec, enable);
3675 } else {
3676 dev_err(codec->dev, "%s: unknown codec to enable TX ext clk\n",
3677 __func__);
3678 ret = -EINVAL;
3679 }
3680
3681 return ret;
3682}
3683
3684static int msm_mclk_tx_event(struct snd_soc_dapm_widget *w,
3685 struct snd_kcontrol *kcontrol, int event)
3686{
3687 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
3688
3689 pr_debug("%s: event = %d\n", __func__, event);
3690
3691 switch (event) {
3692 case SND_SOC_DAPM_PRE_PMU:
3693 return msm_snd_enable_codec_ext_tx_clk(codec, 1, true);
3694 case SND_SOC_DAPM_POST_PMD:
3695 return msm_snd_enable_codec_ext_tx_clk(codec, 0, true);
3696 }
3697 return 0;
3698}
3699
3700static int msm_mclk_event(struct snd_soc_dapm_widget *w,
3701 struct snd_kcontrol *kcontrol, int event)
3702{
3703 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
3704
3705 pr_debug("%s: event = %d\n", __func__, event);
3706
3707 switch (event) {
3708 case SND_SOC_DAPM_PRE_PMU:
3709 return msm_snd_enable_codec_ext_clk(codec, 1, true);
3710 case SND_SOC_DAPM_POST_PMD:
3711 return msm_snd_enable_codec_ext_clk(codec, 0, true);
3712 }
3713 return 0;
3714}
3715
3716static int msm_hifi_ctrl_event(struct snd_soc_dapm_widget *w,
3717 struct snd_kcontrol *k, int event)
3718{
3719 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
3720 struct snd_soc_card *card = codec->component.card;
3721 struct msm_asoc_mach_data *pdata =
3722 snd_soc_card_get_drvdata(card);
3723
3724 dev_dbg(codec->dev, "%s: msm_hifi_control = %d\n",
3725 __func__, msm_hifi_control);
3726
3727 if (!pdata || !pdata->hph_en0_gpio_p) {
3728 dev_err(codec->dev, "%s: hph_en0_gpio is invalid\n", __func__);
3729 return -EINVAL;
3730 }
3731
3732 if (msm_hifi_control != MSM_HIFI_ON) {
3733 dev_dbg(codec->dev, "%s: HiFi mixer control is not set\n",
3734 __func__);
3735 return 0;
3736 }
3737
3738 switch (event) {
3739 case SND_SOC_DAPM_POST_PMU:
3740 msm_cdc_pinctrl_select_active_state(pdata->hph_en0_gpio_p);
3741 break;
3742 case SND_SOC_DAPM_PRE_PMD:
3743 msm_cdc_pinctrl_select_sleep_state(pdata->hph_en0_gpio_p);
3744 break;
3745 }
3746
3747 return 0;
3748}
3749
3750static const struct snd_soc_dapm_widget msm_dapm_widgets_tavil[] = {
3751
3752 SND_SOC_DAPM_SUPPLY("MCLK", SND_SOC_NOPM, 0, 0,
3753 msm_mclk_event,
3754 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
3755
3756 SND_SOC_DAPM_SUPPLY("MCLK TX", SND_SOC_NOPM, 0, 0,
3757 msm_mclk_tx_event, SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
3758
3759 SND_SOC_DAPM_SPK("Lineout_1 amp", NULL),
3760 SND_SOC_DAPM_SPK("Lineout_2 amp", NULL),
3761 SND_SOC_DAPM_SPK("hifi amp", msm_hifi_ctrl_event),
3762 SND_SOC_DAPM_MIC("Handset Mic", NULL),
3763 SND_SOC_DAPM_MIC("Headset Mic", NULL),
3764 SND_SOC_DAPM_MIC("ANCRight Headset Mic", NULL),
3765 SND_SOC_DAPM_MIC("ANCLeft Headset Mic", NULL),
3766 SND_SOC_DAPM_MIC("Analog Mic5", NULL),
3767
3768 SND_SOC_DAPM_MIC("Digital Mic0", NULL),
3769 SND_SOC_DAPM_MIC("Digital Mic1", NULL),
3770 SND_SOC_DAPM_MIC("Digital Mic2", NULL),
3771 SND_SOC_DAPM_MIC("Digital Mic3", NULL),
3772 SND_SOC_DAPM_MIC("Digital Mic4", NULL),
3773 SND_SOC_DAPM_MIC("Digital Mic5", NULL),
3774};
3775
3776static int msm_dmic_event(struct snd_soc_dapm_widget *w,
3777 struct snd_kcontrol *kcontrol, int event)
3778{
3779 struct msm_asoc_mach_data *pdata = NULL;
3780 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
3781 int ret = 0;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]3782 u32 dmic_idx;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]3783 int *dmic_gpio_cnt;
3784 struct device_node *dmic_gpio;
3785 char *wname;
3786
3787 wname = strpbrk(w->name, "0123");
3788 if (!wname) {
3789 dev_err(codec->dev, "%s: widget not found\n", __func__);
3790 return -EINVAL;
3791 }
3792
3793 ret = kstrtouint(wname, 10, &dmic_idx);
3794 if (ret < 0) {
3795 dev_err(codec->dev, "%s: Invalid DMIC line on the codec\n",
3796 __func__);
3797 return -EINVAL;
3798 }
3799
3800 pdata = snd_soc_card_get_drvdata(codec->component.card);
3801
3802 switch (dmic_idx) {
3803 case 0:
3804 case 1:
3805 dmic_gpio_cnt = &dmic_0_1_gpio_cnt;
3806 dmic_gpio = pdata->dmic01_gpio_p;
3807 break;
3808 case 2:
3809 case 3:
3810 dmic_gpio_cnt = &dmic_2_3_gpio_cnt;
3811 dmic_gpio = pdata->dmic23_gpio_p;
3812 break;
3813 default:
3814 dev_err(codec->dev, "%s: Invalid DMIC Selection\n",
3815 __func__);
3816 return -EINVAL;
3817 }
3818
3819 dev_dbg(codec->dev, "%s: event %d DMIC%d dmic_gpio_cnt %d\n",
3820 __func__, event, dmic_idx, *dmic_gpio_cnt);
3821
3822 switch (event) {
3823 case SND_SOC_DAPM_PRE_PMU:
3824 (*dmic_gpio_cnt)++;
3825 if (*dmic_gpio_cnt == 1) {
3826 ret = msm_cdc_pinctrl_select_active_state(
3827 dmic_gpio);
3828 if (ret < 0) {
3829 pr_err("%s: gpio set cannot be activated %sd",
3830 __func__, "dmic_gpio");
3831 return ret;
3832 }
3833 }
3834
3835 break;
3836 case SND_SOC_DAPM_POST_PMD:
3837 (*dmic_gpio_cnt)--;
3838 if (*dmic_gpio_cnt == 0) {
3839 ret = msm_cdc_pinctrl_select_sleep_state(
3840 dmic_gpio);
3841 if (ret < 0) {
3842 pr_err("%s: gpio set cannot be de-activated %sd",
3843 __func__, "dmic_gpio");
3844 return ret;
3845 }
3846 }
3847 break;
3848 default:
3849 pr_err("%s: invalid DAPM event %d\n", __func__, event);
3850 return -EINVAL;
3851 }
3852 return 0;
3853}
3854
3855static const struct snd_soc_dapm_widget msm_int_dapm_widgets[] = {
3856 SND_SOC_DAPM_MIC("Analog Mic1", NULL),
3857 SND_SOC_DAPM_MIC("Analog Mic2", NULL),
3858 SND_SOC_DAPM_MIC("Analog Mic3", NULL),
3859 SND_SOC_DAPM_MIC("Analog Mic4", NULL),
3860 SND_SOC_DAPM_MIC("Digital Mic0", msm_dmic_event),
3861 SND_SOC_DAPM_MIC("Digital Mic1", msm_dmic_event),
3862 SND_SOC_DAPM_MIC("Digital Mic2", msm_dmic_event),
3863 SND_SOC_DAPM_MIC("Digital Mic3", msm_dmic_event),
3864};
3865
3866static inline int param_is_mask(int p)
3867{
3868 return (p >= SNDRV_PCM_HW_PARAM_FIRST_MASK) &&
3869 (p <= SNDRV_PCM_HW_PARAM_LAST_MASK);
3870}
3871
3872static inline struct snd_mask *param_to_mask(struct snd_pcm_hw_params *p,
3873 int n)
3874{
3875 return &(p->masks[n - SNDRV_PCM_HW_PARAM_FIRST_MASK]);
3876}
3877
3878static void param_set_mask(struct snd_pcm_hw_params *p, int n,
3879 unsigned int bit)
3880{
3881 if (bit >= SNDRV_MASK_MAX)
3882 return;
3883 if (param_is_mask(n)) {
3884 struct snd_mask *m = param_to_mask(p, n);
3885
3886 m->bits[0] = 0;
3887 m->bits[1] = 0;
3888 m->bits[bit >> 5] |= (1 << (bit & 31));
3889 }
3890}
3891
3892static int msm_slim_get_ch_from_beid(int32_t be_id)
3893{
3894 int ch_id = 0;
3895
3896 switch (be_id) {
3897 case MSM_BACKEND_DAI_SLIMBUS_0_RX:
3898 ch_id = SLIM_RX_0;
3899 break;
3900 case MSM_BACKEND_DAI_SLIMBUS_1_RX:
3901 ch_id = SLIM_RX_1;
3902 break;
3903 case MSM_BACKEND_DAI_SLIMBUS_2_RX:
3904 ch_id = SLIM_RX_2;
3905 break;
3906 case MSM_BACKEND_DAI_SLIMBUS_3_RX:
3907 ch_id = SLIM_RX_3;
3908 break;
3909 case MSM_BACKEND_DAI_SLIMBUS_4_RX:
3910 ch_id = SLIM_RX_4;
3911 break;
3912 case MSM_BACKEND_DAI_SLIMBUS_6_RX:
3913 ch_id = SLIM_RX_6;
3914 break;
3915 case MSM_BACKEND_DAI_SLIMBUS_0_TX:
3916 ch_id = SLIM_TX_0;
3917 break;
3918 case MSM_BACKEND_DAI_SLIMBUS_3_TX:
3919 ch_id = SLIM_TX_3;
3920 break;
3921 default:
3922 ch_id = SLIM_RX_0;
3923 break;
3924 }
3925
3926 return ch_id;
3927}
3928
3929static int msm_cdc_dma_get_idx_from_beid(int32_t be_id)
3930{
3931 int idx = 0;
3932
3933 switch (be_id) {
3934 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
3935 idx = WSA_CDC_DMA_RX_0;
3936 break;
3937 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
3938 idx = WSA_CDC_DMA_TX_0;
3939 break;
3940 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
3941 idx = WSA_CDC_DMA_RX_1;
3942 break;
3943 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
3944 idx = WSA_CDC_DMA_TX_1;
3945 break;
3946 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
3947 idx = WSA_CDC_DMA_TX_2;
3948 break;
3949 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
3950 idx = RX_CDC_DMA_RX_0;
3951 break;
3952 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
3953 idx = RX_CDC_DMA_RX_1;
3954 break;
3955 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
3956 idx = RX_CDC_DMA_RX_2;
3957 break;
3958 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_3:
3959 idx = RX_CDC_DMA_RX_3;
3960 break;
3961 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_5:
3962 idx = RX_CDC_DMA_RX_5;
3963 break;
3964 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
3965 idx = TX_CDC_DMA_TX_0;
3966 break;
3967 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
3968 idx = TX_CDC_DMA_TX_3;
3969 break;
3970 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
3971 idx = TX_CDC_DMA_TX_4;
3972 break;
3973 default:
3974 idx = RX_CDC_DMA_RX_0;
3975 break;
3976 }
3977
3978 return idx;
3979}
3980
3981static int msm_ext_disp_get_idx_from_beid(int32_t be_id)
3982{
3983 int idx = -EINVAL;
3984
3985 switch (be_id) {
3986 case MSM_BACKEND_DAI_DISPLAY_PORT_RX:
3987 idx = DP_RX_IDX;
3988 break;
3989 default:
3990 pr_err("%s: Incorrect ext_disp BE id %d\n", __func__, be_id);
3991 idx = -EINVAL;
3992 break;
3993 }
3994
3995 return idx;
3996}
3997
3998static int msm_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
3999 struct snd_pcm_hw_params *params)
4000{
4001 struct snd_soc_dai_link *dai_link = rtd->dai_link;
4002 struct snd_interval *rate = hw_param_interval(params,
4003 SNDRV_PCM_HW_PARAM_RATE);
4004 struct snd_interval *channels = hw_param_interval(params,
4005 SNDRV_PCM_HW_PARAM_CHANNELS);
4006 int rc = 0;
4007 int idx;
4008 void *config = NULL;
4009 struct snd_soc_codec *codec = NULL;
4010
4011 pr_debug("%s: format = %d, rate = %d\n",
4012 __func__, params_format(params), params_rate(params));
4013
4014 switch (dai_link->id) {
4015 case MSM_BACKEND_DAI_SLIMBUS_0_RX:
4016 case MSM_BACKEND_DAI_SLIMBUS_1_RX:
4017 case MSM_BACKEND_DAI_SLIMBUS_2_RX:
4018 case MSM_BACKEND_DAI_SLIMBUS_3_RX:
4019 case MSM_BACKEND_DAI_SLIMBUS_4_RX:
4020 case MSM_BACKEND_DAI_SLIMBUS_6_RX:
4021 idx = msm_slim_get_ch_from_beid(dai_link->id);
4022 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4023 slim_rx_cfg[idx].bit_format);
4024 rate->min = rate->max = slim_rx_cfg[idx].sample_rate;
4025 channels->min = channels->max = slim_rx_cfg[idx].channels;
4026 break;
4027
4028 case MSM_BACKEND_DAI_SLIMBUS_0_TX:
4029 case MSM_BACKEND_DAI_SLIMBUS_3_TX:
4030 idx = msm_slim_get_ch_from_beid(dai_link->id);
4031 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4032 slim_tx_cfg[idx].bit_format);
4033 rate->min = rate->max = slim_tx_cfg[idx].sample_rate;
4034 channels->min = channels->max = slim_tx_cfg[idx].channels;
4035 break;
4036
4037 case MSM_BACKEND_DAI_SLIMBUS_1_TX:
4038 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4039 slim_tx_cfg[1].bit_format);
4040 rate->min = rate->max = slim_tx_cfg[1].sample_rate;
4041 channels->min = channels->max = slim_tx_cfg[1].channels;
4042 break;
4043
4044 case MSM_BACKEND_DAI_SLIMBUS_4_TX:
4045 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4046 SNDRV_PCM_FORMAT_S32_LE);
4047 rate->min = rate->max = SAMPLING_RATE_8KHZ;
4048 channels->min = channels->max = msm_vi_feed_tx_ch;
4049 break;
4050
4051 case MSM_BACKEND_DAI_SLIMBUS_5_RX:
4052 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4053 slim_rx_cfg[5].bit_format);
4054 rate->min = rate->max = slim_rx_cfg[5].sample_rate;
4055 channels->min = channels->max = slim_rx_cfg[5].channels;
4056 break;
4057
4058 case MSM_BACKEND_DAI_SLIMBUS_5_TX:
4059 codec = rtd->codec;
4060 rate->min = rate->max = SAMPLING_RATE_16KHZ;
4061 channels->min = channels->max = 1;
4062
4063 config = msm_codec_fn.get_afe_config_fn(codec,
4064 AFE_SLIMBUS_SLAVE_PORT_CONFIG);
4065 if (config) {
4066 rc = afe_set_config(AFE_SLIMBUS_SLAVE_PORT_CONFIG,
4067 config, SLIMBUS_5_TX);
4068 if (rc)
4069 pr_err("%s: Failed to set slimbus slave port config %d\n",
4070 __func__, rc);
4071 }
4072 break;
4073
4074 case MSM_BACKEND_DAI_SLIMBUS_7_RX:
4075 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4076 slim_rx_cfg[SLIM_RX_7].bit_format);
4077 rate->min = rate->max = slim_rx_cfg[SLIM_RX_7].sample_rate;
4078 channels->min = channels->max =
4079 slim_rx_cfg[SLIM_RX_7].channels;
4080 break;
4081
4082 case MSM_BACKEND_DAI_SLIMBUS_7_TX:
4083 rate->min = rate->max = slim_tx_cfg[SLIM_TX_7].sample_rate;
4084 channels->min = channels->max =
4085 slim_tx_cfg[SLIM_TX_7].channels;
4086 break;
4087
4088 case MSM_BACKEND_DAI_SLIMBUS_8_TX:
4089 rate->min = rate->max = slim_tx_cfg[SLIM_TX_8].sample_rate;
4090 channels->min = channels->max =
4091 slim_tx_cfg[SLIM_TX_8].channels;
4092 break;
4093
4094 case MSM_BACKEND_DAI_USB_RX:
4095 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4096 usb_rx_cfg.bit_format);
4097 rate->min = rate->max = usb_rx_cfg.sample_rate;
4098 channels->min = channels->max = usb_rx_cfg.channels;
4099 break;
4100
4101 case MSM_BACKEND_DAI_USB_TX:
4102 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4103 usb_tx_cfg.bit_format);
4104 rate->min = rate->max = usb_tx_cfg.sample_rate;
4105 channels->min = channels->max = usb_tx_cfg.channels;
4106 break;
4107
4108 case MSM_BACKEND_DAI_DISPLAY_PORT_RX:
4109 idx = msm_ext_disp_get_idx_from_beid(dai_link->id);
4110 if (idx < 0) {
4111 pr_err("%s: Incorrect ext disp idx %d\n",
4112 __func__, idx);
4113 rc = idx;
4114 goto done;
4115 }
4116
4117 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4118 ext_disp_rx_cfg[idx].bit_format);
4119 rate->min = rate->max = ext_disp_rx_cfg[idx].sample_rate;
4120 channels->min = channels->max = ext_disp_rx_cfg[idx].channels;
4121 break;
4122
4123 case MSM_BACKEND_DAI_AFE_PCM_RX:
4124 channels->min = channels->max = proxy_rx_cfg.channels;
4125 rate->min = rate->max = SAMPLING_RATE_48KHZ;
4126 break;
4127
4128 case MSM_BACKEND_DAI_PRI_TDM_RX_0:
4129 channels->min = channels->max =
4130 tdm_rx_cfg[TDM_PRI][TDM_0].channels;
4131 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4132 tdm_rx_cfg[TDM_PRI][TDM_0].bit_format);
4133 rate->min = rate->max = tdm_rx_cfg[TDM_PRI][TDM_0].sample_rate;
4134 break;
4135
4136 case MSM_BACKEND_DAI_PRI_TDM_TX_0:
4137 channels->min = channels->max =
4138 tdm_tx_cfg[TDM_PRI][TDM_0].channels;
4139 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4140 tdm_tx_cfg[TDM_PRI][TDM_0].bit_format);
4141 rate->min = rate->max = tdm_tx_cfg[TDM_PRI][TDM_0].sample_rate;
4142 break;
4143
4144 case MSM_BACKEND_DAI_SEC_TDM_RX_0:
4145 channels->min = channels->max =
4146 tdm_rx_cfg[TDM_SEC][TDM_0].channels;
4147 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4148 tdm_rx_cfg[TDM_SEC][TDM_0].bit_format);
4149 rate->min = rate->max = tdm_rx_cfg[TDM_SEC][TDM_0].sample_rate;
4150 break;
4151
4152 case MSM_BACKEND_DAI_SEC_TDM_TX_0:
4153 channels->min = channels->max =
4154 tdm_tx_cfg[TDM_SEC][TDM_0].channels;
4155 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4156 tdm_tx_cfg[TDM_SEC][TDM_0].bit_format);
4157 rate->min = rate->max = tdm_tx_cfg[TDM_SEC][TDM_0].sample_rate;
4158 break;
4159
4160 case MSM_BACKEND_DAI_TERT_TDM_RX_0:
4161 channels->min = channels->max =
4162 tdm_rx_cfg[TDM_TERT][TDM_0].channels;
4163 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4164 tdm_rx_cfg[TDM_TERT][TDM_0].bit_format);
4165 rate->min = rate->max = tdm_rx_cfg[TDM_TERT][TDM_0].sample_rate;
4166 break;
4167
4168 case MSM_BACKEND_DAI_TERT_TDM_TX_0:
4169 channels->min = channels->max =
4170 tdm_tx_cfg[TDM_TERT][TDM_0].channels;
4171 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4172 tdm_tx_cfg[TDM_TERT][TDM_0].bit_format);
4173 rate->min = rate->max = tdm_tx_cfg[TDM_TERT][TDM_0].sample_rate;
4174 break;
4175
4176 case MSM_BACKEND_DAI_QUAT_TDM_RX_0:
4177 channels->min = channels->max =
4178 tdm_rx_cfg[TDM_QUAT][TDM_0].channels;
4179 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4180 tdm_rx_cfg[TDM_QUAT][TDM_0].bit_format);
4181 rate->min = rate->max = tdm_rx_cfg[TDM_QUAT][TDM_0].sample_rate;
4182 break;
4183
4184 case MSM_BACKEND_DAI_QUAT_TDM_TX_0:
4185 channels->min = channels->max =
4186 tdm_tx_cfg[TDM_QUAT][TDM_0].channels;
4187 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4188 tdm_tx_cfg[TDM_QUAT][TDM_0].bit_format);
4189 rate->min = rate->max = tdm_tx_cfg[TDM_QUAT][TDM_0].sample_rate;
4190 break;
4191
4192 case MSM_BACKEND_DAI_QUIN_TDM_RX_0:
4193 channels->min = channels->max =
4194 tdm_rx_cfg[TDM_QUIN][TDM_0].channels;
4195 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4196 tdm_rx_cfg[TDM_QUIN][TDM_0].bit_format);
4197 rate->min = rate->max = tdm_rx_cfg[TDM_QUIN][TDM_0].sample_rate;
4198 break;
4199
4200 case MSM_BACKEND_DAI_QUIN_TDM_TX_0:
4201 channels->min = channels->max =
4202 tdm_tx_cfg[TDM_QUIN][TDM_0].channels;
4203 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4204 tdm_tx_cfg[TDM_QUIN][TDM_0].bit_format);
4205 rate->min = rate->max = tdm_tx_cfg[TDM_QUIN][TDM_0].sample_rate;
4206 break;
4207
4208
4209 case MSM_BACKEND_DAI_AUXPCM_RX:
4210 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4211 aux_pcm_rx_cfg[PRIM_AUX_PCM].bit_format);
4212 rate->min = rate->max =
4213 aux_pcm_rx_cfg[PRIM_AUX_PCM].sample_rate;
4214 channels->min = channels->max =
4215 aux_pcm_rx_cfg[PRIM_AUX_PCM].channels;
4216 break;
4217
4218 case MSM_BACKEND_DAI_AUXPCM_TX:
4219 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4220 aux_pcm_tx_cfg[PRIM_AUX_PCM].bit_format);
4221 rate->min = rate->max =
4222 aux_pcm_tx_cfg[PRIM_AUX_PCM].sample_rate;
4223 channels->min = channels->max =
4224 aux_pcm_tx_cfg[PRIM_AUX_PCM].channels;
4225 break;
4226
4227 case MSM_BACKEND_DAI_SEC_AUXPCM_RX:
4228 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4229 aux_pcm_rx_cfg[SEC_AUX_PCM].bit_format);
4230 rate->min = rate->max =
4231 aux_pcm_rx_cfg[SEC_AUX_PCM].sample_rate;
4232 channels->min = channels->max =
4233 aux_pcm_rx_cfg[SEC_AUX_PCM].channels;
4234 break;
4235
4236 case MSM_BACKEND_DAI_SEC_AUXPCM_TX:
4237 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4238 aux_pcm_tx_cfg[SEC_AUX_PCM].bit_format);
4239 rate->min = rate->max =
4240 aux_pcm_tx_cfg[SEC_AUX_PCM].sample_rate;
4241 channels->min = channels->max =
4242 aux_pcm_tx_cfg[SEC_AUX_PCM].channels;
4243 break;
4244
4245 case MSM_BACKEND_DAI_TERT_AUXPCM_RX:
4246 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4247 aux_pcm_rx_cfg[TERT_AUX_PCM].bit_format);
4248 rate->min = rate->max =
4249 aux_pcm_rx_cfg[TERT_AUX_PCM].sample_rate;
4250 channels->min = channels->max =
4251 aux_pcm_rx_cfg[TERT_AUX_PCM].channels;
4252 break;
4253
4254 case MSM_BACKEND_DAI_TERT_AUXPCM_TX:
4255 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4256 aux_pcm_tx_cfg[TERT_AUX_PCM].bit_format);
4257 rate->min = rate->max =
4258 aux_pcm_tx_cfg[TERT_AUX_PCM].sample_rate;
4259 channels->min = channels->max =
4260 aux_pcm_tx_cfg[TERT_AUX_PCM].channels;
4261 break;
4262
4263 case MSM_BACKEND_DAI_QUAT_AUXPCM_RX:
4264 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4265 aux_pcm_rx_cfg[QUAT_AUX_PCM].bit_format);
4266 rate->min = rate->max =
4267 aux_pcm_rx_cfg[QUAT_AUX_PCM].sample_rate;
4268 channels->min = channels->max =
4269 aux_pcm_rx_cfg[QUAT_AUX_PCM].channels;
4270 break;
4271
4272 case MSM_BACKEND_DAI_QUAT_AUXPCM_TX:
4273 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4274 aux_pcm_tx_cfg[QUAT_AUX_PCM].bit_format);
4275 rate->min = rate->max =
4276 aux_pcm_tx_cfg[QUAT_AUX_PCM].sample_rate;
4277 channels->min = channels->max =
4278 aux_pcm_tx_cfg[QUAT_AUX_PCM].channels;
4279 break;
4280
4281 case MSM_BACKEND_DAI_QUIN_AUXPCM_RX:
4282 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4283 aux_pcm_rx_cfg[QUIN_AUX_PCM].bit_format);
4284 rate->min = rate->max =
4285 aux_pcm_rx_cfg[QUIN_AUX_PCM].sample_rate;
4286 channels->min = channels->max =
4287 aux_pcm_rx_cfg[QUIN_AUX_PCM].channels;
4288 break;
4289
4290 case MSM_BACKEND_DAI_QUIN_AUXPCM_TX:
4291 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4292 aux_pcm_tx_cfg[QUIN_AUX_PCM].bit_format);
4293 rate->min = rate->max =
4294 aux_pcm_tx_cfg[QUIN_AUX_PCM].sample_rate;
4295 channels->min = channels->max =
4296 aux_pcm_tx_cfg[QUIN_AUX_PCM].channels;
4297 break;
4298
4299 case MSM_BACKEND_DAI_PRI_MI2S_RX:
4300 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4301 mi2s_rx_cfg[PRIM_MI2S].bit_format);
4302 rate->min = rate->max = mi2s_rx_cfg[PRIM_MI2S].sample_rate;
4303 channels->min = channels->max =
4304 mi2s_rx_cfg[PRIM_MI2S].channels;
4305 break;
4306
4307 case MSM_BACKEND_DAI_PRI_MI2S_TX:
4308 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4309 mi2s_tx_cfg[PRIM_MI2S].bit_format);
4310 rate->min = rate->max = mi2s_tx_cfg[PRIM_MI2S].sample_rate;
4311 channels->min = channels->max =
4312 mi2s_tx_cfg[PRIM_MI2S].channels;
4313 break;
4314
4315 case MSM_BACKEND_DAI_SECONDARY_MI2S_RX:
4316 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4317 mi2s_rx_cfg[SEC_MI2S].bit_format);
4318 rate->min = rate->max = mi2s_rx_cfg[SEC_MI2S].sample_rate;
4319 channels->min = channels->max =
4320 mi2s_rx_cfg[SEC_MI2S].channels;
4321 break;
4322
4323 case MSM_BACKEND_DAI_SECONDARY_MI2S_TX:
4324 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4325 mi2s_tx_cfg[SEC_MI2S].bit_format);
4326 rate->min = rate->max = mi2s_tx_cfg[SEC_MI2S].sample_rate;
4327 channels->min = channels->max =
4328 mi2s_tx_cfg[SEC_MI2S].channels;
4329 break;
4330
4331 case MSM_BACKEND_DAI_TERTIARY_MI2S_RX:
4332 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4333 mi2s_rx_cfg[TERT_MI2S].bit_format);
4334 rate->min = rate->max = mi2s_rx_cfg[TERT_MI2S].sample_rate;
4335 channels->min = channels->max =
4336 mi2s_rx_cfg[TERT_MI2S].channels;
4337 break;
4338
4339 case MSM_BACKEND_DAI_TERTIARY_MI2S_TX:
4340 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4341 mi2s_tx_cfg[TERT_MI2S].bit_format);
4342 rate->min = rate->max = mi2s_tx_cfg[TERT_MI2S].sample_rate;
4343 channels->min = channels->max =
4344 mi2s_tx_cfg[TERT_MI2S].channels;
4345 break;
4346
4347 case MSM_BACKEND_DAI_QUATERNARY_MI2S_RX:
4348 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4349 mi2s_rx_cfg[QUAT_MI2S].bit_format);
4350 rate->min = rate->max = mi2s_rx_cfg[QUAT_MI2S].sample_rate;
4351 channels->min = channels->max =
4352 mi2s_rx_cfg[QUAT_MI2S].channels;
4353 break;
4354
4355 case MSM_BACKEND_DAI_QUATERNARY_MI2S_TX:
4356 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4357 mi2s_tx_cfg[QUAT_MI2S].bit_format);
4358 rate->min = rate->max = mi2s_tx_cfg[QUAT_MI2S].sample_rate;
4359 channels->min = channels->max =
4360 mi2s_tx_cfg[QUAT_MI2S].channels;
4361 break;
4362
4363 case MSM_BACKEND_DAI_QUINARY_MI2S_RX:
4364 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4365 mi2s_rx_cfg[QUIN_MI2S].bit_format);
4366 rate->min = rate->max = mi2s_rx_cfg[QUIN_MI2S].sample_rate;
4367 channels->min = channels->max =
4368 mi2s_rx_cfg[QUIN_MI2S].channels;
4369 break;
4370
4371 case MSM_BACKEND_DAI_QUINARY_MI2S_TX:
4372 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4373 mi2s_tx_cfg[QUIN_MI2S].bit_format);
4374 rate->min = rate->max = mi2s_tx_cfg[QUIN_MI2S].sample_rate;
4375 channels->min = channels->max =
4376 mi2s_tx_cfg[QUIN_MI2S].channels;
4377 break;
4378
4379 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
4380 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
4381 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
4382 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
4383 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
4384 idx = msm_cdc_dma_get_idx_from_beid(dai_link->id);
4385 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4386 cdc_dma_rx_cfg[idx].bit_format);
4387 rate->min = rate->max = cdc_dma_rx_cfg[idx].sample_rate;
4388 channels->min = channels->max = cdc_dma_rx_cfg[idx].channels;
4389 break;
4390
4391 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
4392 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
4393 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
4394 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_1:
4395 idx = msm_cdc_dma_get_idx_from_beid(dai_link->id);
4396 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4397 cdc_dma_tx_cfg[idx].bit_format);
4398 rate->min = rate->max = cdc_dma_tx_cfg[idx].sample_rate;
4399 channels->min = channels->max = cdc_dma_tx_cfg[idx].channels;
4400 break;
4401
4402 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
4403 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4404 SNDRV_PCM_FORMAT_S32_LE);
4405 rate->min = rate->max = SAMPLING_RATE_8KHZ;
4406 channels->min = channels->max = msm_vi_feed_tx_ch;
4407 break;
4408
4409 default:
4410 rate->min = rate->max = SAMPLING_RATE_48KHZ;
4411 break;
4412 }
4413
4414done:
4415 return rc;
4416}
4417
4418static bool msm_usbc_swap_gnd_mic(struct snd_soc_codec *codec, bool active)
4419{
4420 int value = 0;
4421 bool ret = 0;
4422 struct snd_soc_card *card = codec->component.card;
4423 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
4424 struct pinctrl_state *en2_pinctrl_active;
4425 struct pinctrl_state *en2_pinctrl_sleep;
4426
4427 if (!pdata->usbc_en2_gpio_p) {
4428 if (active) {
4429 /* if active and usbc_en2_gpio undefined, get pin */
4430 pdata->usbc_en2_gpio_p = devm_pinctrl_get(card->dev);
4431 if (IS_ERR_OR_NULL(pdata->usbc_en2_gpio_p)) {
4432 dev_err(card->dev,
4433 "%s: Can't get EN2 gpio pinctrl:%ld\n",
4434 __func__,
4435 PTR_ERR(pdata->usbc_en2_gpio_p));
4436 pdata->usbc_en2_gpio_p = NULL;
4437 return false;
4438 }
4439 } else {
4440 /* if not active and usbc_en2_gpio undefined, return */
4441 return false;
4442 }
4443 }
4444
4445 pdata->usbc_en2_gpio = of_get_named_gpio(card->dev->of_node,
4446 "qcom,usbc-analog-en2-gpio", 0);
4447 if (!gpio_is_valid(pdata->usbc_en2_gpio)) {
4448 dev_err(card->dev, "%s, property %s not in node %s",
4449 __func__, "qcom,usbc-analog-en2-gpio",
4450 card->dev->of_node->full_name);
4451 return false;
4452 }
4453
4454 en2_pinctrl_active = pinctrl_lookup_state(
4455 pdata->usbc_en2_gpio_p, "aud_active");
4456 if (IS_ERR_OR_NULL(en2_pinctrl_active)) {
4457 dev_err(card->dev,
4458 "%s: Cannot get aud_active pinctrl state:%ld\n",
4459 __func__, PTR_ERR(en2_pinctrl_active));
4460 ret = false;
4461 goto err_lookup_state;
4462 }
4463
4464 en2_pinctrl_sleep = pinctrl_lookup_state(
4465 pdata->usbc_en2_gpio_p, "aud_sleep");
4466 if (IS_ERR_OR_NULL(en2_pinctrl_sleep)) {
4467 dev_err(card->dev,
4468 "%s: Cannot get aud_sleep pinctrl state:%ld\n",
4469 __func__, PTR_ERR(en2_pinctrl_sleep));
4470 ret = false;
4471 goto err_lookup_state;
4472 }
4473
4474 /* if active and usbc_en2_gpio_p defined, swap using usbc_en2_gpio_p */
4475 if (active) {
4476 dev_dbg(codec->dev, "%s: enter\n", __func__);
4477 if (pdata->usbc_en2_gpio_p) {
4478 value = gpio_get_value_cansleep(pdata->usbc_en2_gpio);
4479 if (value)
4480 pinctrl_select_state(pdata->usbc_en2_gpio_p,
4481 en2_pinctrl_sleep);
4482 else
4483 pinctrl_select_state(pdata->usbc_en2_gpio_p,
4484 en2_pinctrl_active);
4485 } else if (pdata->usbc_en2_gpio >= 0) {
4486 value = gpio_get_value_cansleep(pdata->usbc_en2_gpio);
4487 gpio_set_value_cansleep(pdata->usbc_en2_gpio, !value);
4488 }
4489 pr_debug("%s: swap select switch %d to %d\n", __func__,
4490 value, !value);
4491 ret = true;
4492 } else {
4493 /* if not active, release usbc_en2_gpio_p pin */
4494 pinctrl_select_state(pdata->usbc_en2_gpio_p,
4495 en2_pinctrl_sleep);
4496 }
4497
4498err_lookup_state:
4499 devm_pinctrl_put(pdata->usbc_en2_gpio_p);
4500 pdata->usbc_en2_gpio_p = NULL;
4501 return ret;
4502}
4503
4504static bool msm_swap_gnd_mic(struct snd_soc_codec *codec, bool active)
4505{
4506 int value = 0;
4507 bool ret = false;
4508 struct snd_soc_card *card;
4509 struct msm_asoc_mach_data *pdata;
4510
4511 if (!codec) {
4512 pr_err("%s codec is NULL\n", __func__);
4513 return false;
4514 }
4515 card = codec->component.card;
4516 pdata = snd_soc_card_get_drvdata(card);
4517
4518 if (!pdata)
4519 return false;
4520
4521 if (wcd_mbhc_cfg.enable_usbc_analog)
4522 return msm_usbc_swap_gnd_mic(codec, active);
4523
4524 /* if usbc is not defined, swap using us_euro_gpio_p */
4525 if (pdata->us_euro_gpio_p) {
4526 value = msm_cdc_pinctrl_get_state(
4527 pdata->us_euro_gpio_p);
4528 if (value)
4529 msm_cdc_pinctrl_select_sleep_state(
4530 pdata->us_euro_gpio_p);
4531 else
4532 msm_cdc_pinctrl_select_active_state(
4533 pdata->us_euro_gpio_p);
4534 dev_dbg(codec->dev, "%s: swap select switch %d to %d\n",
4535 __func__, value, !value);
4536 ret = true;
4537 }
4538 return ret;
4539}
4540
4541static int msm_afe_set_config(struct snd_soc_codec *codec)
4542{
4543 int ret = 0;
4544 void *config_data = NULL;
4545
4546 if (!msm_codec_fn.get_afe_config_fn) {
4547 dev_err(codec->dev, "%s: codec get afe config not init'ed\n",
4548 __func__);
4549 return -EINVAL;
4550 }
4551
4552 config_data = msm_codec_fn.get_afe_config_fn(codec,
4553 AFE_CDC_REGISTERS_CONFIG);
4554 if (config_data) {
4555 ret = afe_set_config(AFE_CDC_REGISTERS_CONFIG, config_data, 0);
4556 if (ret) {
4557 dev_err(codec->dev,
4558 "%s: Failed to set codec registers config %d\n",
4559 __func__, ret);
4560 return ret;
4561 }
4562 }
4563
4564 config_data = msm_codec_fn.get_afe_config_fn(codec,
4565 AFE_CDC_REGISTER_PAGE_CONFIG);
4566 if (config_data) {
4567 ret = afe_set_config(AFE_CDC_REGISTER_PAGE_CONFIG, config_data,
4568 0);
4569 if (ret)
4570 dev_err(codec->dev,
4571 "%s: Failed to set cdc register page config\n",
4572 __func__);
4573 }
4574
4575 config_data = msm_codec_fn.get_afe_config_fn(codec,
4576 AFE_SLIMBUS_SLAVE_CONFIG);
4577 if (config_data) {
4578 ret = afe_set_config(AFE_SLIMBUS_SLAVE_CONFIG, config_data, 0);
4579 if (ret) {
4580 dev_err(codec->dev,
4581 "%s: Failed to set slimbus slave config %d\n",
4582 __func__, ret);
4583 return ret;
4584 }
4585 }
4586
4587 return 0;
4588}
4589
4590static void msm_afe_clear_config(void)
4591{
4592 afe_clear_config(AFE_CDC_REGISTERS_CONFIG);
4593 afe_clear_config(AFE_SLIMBUS_SLAVE_CONFIG);
4594}
4595
4596static int msm_adsp_power_up_config(struct snd_soc_codec *codec,
4597 struct snd_card *card)
4598{
4599 int ret = 0;
4600 unsigned long timeout;
4601 int adsp_ready = 0;
4602 bool snd_card_online = 0;
4603
4604 timeout = jiffies +
4605 msecs_to_jiffies(ADSP_STATE_READY_TIMEOUT_MS);
4606
4607 do {
4608 if (!snd_card_online) {
4609 snd_card_online = snd_card_is_online_state(card);
4610 pr_debug("%s: Sound card is %s\n", __func__,
4611 snd_card_online ? "Online" : "Offline");
4612 }
4613 if (!adsp_ready) {
4614 adsp_ready = q6core_is_adsp_ready();
4615 pr_debug("%s: ADSP Audio is %s\n", __func__,
4616 adsp_ready ? "ready" : "not ready");
4617 }
4618 if (snd_card_online && adsp_ready)
4619 break;
4620
4621 /*
4622 * Sound card/ADSP will be coming up after subsystem restart and
4623 * it might not be fully up when the control reaches
4624 * here. So, wait for 50msec before checking ADSP state
4625 */
4626 msleep(50);
4627 } while (time_after(timeout, jiffies));
4628
4629 if (!snd_card_online || !adsp_ready) {
4630 pr_err("%s: Timeout. Sound card is %s, ADSP Audio is %s\n",
4631 __func__,
4632 snd_card_online ? "Online" : "Offline",
4633 adsp_ready ? "ready" : "not ready");
4634 ret = -ETIMEDOUT;
4635 goto err;
4636 }
4637
4638 ret = msm_afe_set_config(codec);
4639 if (ret)
4640 pr_err("%s: Failed to set AFE config. err %d\n",
4641 __func__, ret);
4642
4643 return 0;
4644
4645err:
4646 return ret;
4647}
4648
4649static int sm6150_notifier_service_cb(struct notifier_block *this,
4650 unsigned long opcode, void *ptr)
4651{
4652 int ret;
4653 struct snd_soc_card *card = NULL;
4654 const char *be_dl_name = LPASS_BE_SLIMBUS_0_RX;
4655 struct snd_soc_pcm_runtime *rtd;
4656 struct snd_soc_codec *codec;
4657
4658 pr_debug("%s: Service opcode 0x%lx\n", __func__, opcode);
4659
4660 switch (opcode) {
4661 case AUDIO_NOTIFIER_SERVICE_DOWN:
4662 /*
4663 * Use flag to ignore initial boot notifications
4664 * On initial boot msm_adsp_power_up_config is
4665 * called on init. There is no need to clear
4666 * and set the config again on initial boot.
4667 */
4668 if (is_initial_boot)
4669 break;
4670 msm_afe_clear_config();
4671 break;
4672 case AUDIO_NOTIFIER_SERVICE_UP:
4673 if (is_initial_boot) {
4674 is_initial_boot = false;
4675 break;
4676 }
4677 if (!spdev)
4678 return -EINVAL;
4679
4680 card = platform_get_drvdata(spdev);
4681 rtd = snd_soc_get_pcm_runtime(card, be_dl_name);
4682 if (!rtd) {
4683 dev_err(card->dev,
4684 "%s: snd_soc_get_pcm_runtime for %s failed!\n",
4685 __func__, be_dl_name);
4686 ret = -EINVAL;
4687 goto err;
4688 }
4689 codec = rtd->codec;
4690
4691 ret = msm_adsp_power_up_config(codec, card->snd_card);
4692 if (ret < 0) {
4693 dev_err(card->dev,
4694 "%s: msm_adsp_power_up_config failed ret = %d!\n",
4695 __func__, ret);
4696 goto err;
4697 }
4698 break;
4699 default:
4700 break;
4701 }
4702err:
4703 return NOTIFY_OK;
4704}
4705
4706static struct notifier_block service_nb = {
4707 .notifier_call = sm6150_notifier_service_cb,
4708 .priority = -INT_MAX,
4709};
4710
4711static int msm_audrx_tavil_init(struct snd_soc_pcm_runtime *rtd)
4712{
4713 int ret = 0;
4714 void *config_data;
4715 struct snd_soc_codec *codec = rtd->codec;
4716 struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
4717 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
4718 struct snd_soc_dai *codec_dai = rtd->codec_dai;
4719 struct snd_soc_component *aux_comp;
4720 struct snd_card *card;
4721 struct snd_info_entry *entry;
4722 struct msm_asoc_mach_data *pdata =
4723 snd_soc_card_get_drvdata(rtd->card);
4724
4725 /*
4726 * Codec SLIMBUS configuration
4727 * RX1, RX2, RX3, RX4, RX5, RX6, RX7, RX8
4728 * TX1, TX2, TX3, TX4, TX5, TX6, TX7, TX8, TX9, TX10, TX11, TX12, TX13
4729 * TX14, TX15, TX16
4730 */
4731 unsigned int rx_ch[WCD934X_RX_MAX] = {144, 145, 146, 147, 148, 149,
4732 150, 151};
4733 unsigned int tx_ch[WCD934X_TX_MAX] = {128, 129, 130, 131, 132, 133,
4734 134, 135, 136, 137, 138, 139,
4735 140, 141, 142, 143};
4736
4737 pr_info("%s: dev_name:%s\n", __func__, dev_name(cpu_dai->dev));
4738
4739 rtd->pmdown_time = 0;
4740
4741 ret = snd_soc_add_codec_controls(codec, msm_tavil_snd_controls,
4742 ARRAY_SIZE(msm_tavil_snd_controls));
4743 if (ret < 0) {
4744 pr_err("%s: add_codec_controls failed, err %d\n",
4745 __func__, ret);
4746 return ret;
4747 }
4748
4749 ret = snd_soc_add_codec_controls(codec, msm_common_snd_controls,
4750 ARRAY_SIZE(msm_common_snd_controls));
4751 if (ret < 0) {
4752 pr_err("%s: add_codec_controls failed, err %d\n",
4753 __func__, ret);
4754 return ret;
4755 }
4756
4757 snd_soc_dapm_new_controls(dapm, msm_dapm_widgets_tavil,
4758 ARRAY_SIZE(msm_dapm_widgets_tavil));
4759
4760 snd_soc_dapm_add_routes(dapm, wcd_audio_paths_tavil,
4761 ARRAY_SIZE(wcd_audio_paths_tavil));
4762
4763 snd_soc_dapm_ignore_suspend(dapm, "Handset Mic");
4764 snd_soc_dapm_ignore_suspend(dapm, "Headset Mic");
4765 snd_soc_dapm_ignore_suspend(dapm, "ANCRight Headset Mic");
4766 snd_soc_dapm_ignore_suspend(dapm, "ANCLeft Headset Mic");
4767 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic0");
4768 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic1");
4769 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic2");
4770 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic3");
4771 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic4");
4772 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic5");
4773 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic5");
4774 snd_soc_dapm_ignore_suspend(dapm, "MADINPUT");
4775 snd_soc_dapm_ignore_suspend(dapm, "MAD_CPE_INPUT");
4776 snd_soc_dapm_ignore_suspend(dapm, "MAD_CPE_OUT1");
4777 snd_soc_dapm_ignore_suspend(dapm, "MAD_CPE_OUT2");
4778 snd_soc_dapm_ignore_suspend(dapm, "EAR");
4779 snd_soc_dapm_ignore_suspend(dapm, "LINEOUT1");
4780 snd_soc_dapm_ignore_suspend(dapm, "LINEOUT2");
4781 snd_soc_dapm_ignore_suspend(dapm, "ANC EAR");
4782 snd_soc_dapm_ignore_suspend(dapm, "SPK1 OUT");
4783 snd_soc_dapm_ignore_suspend(dapm, "SPK2 OUT");
4784 snd_soc_dapm_ignore_suspend(dapm, "HPHL");
4785 snd_soc_dapm_ignore_suspend(dapm, "HPHR");
4786 snd_soc_dapm_ignore_suspend(dapm, "AIF4 VI");
4787 snd_soc_dapm_ignore_suspend(dapm, "VIINPUT");
4788 snd_soc_dapm_ignore_suspend(dapm, "ANC HPHL");
4789 snd_soc_dapm_ignore_suspend(dapm, "ANC HPHR");
4790
4791 snd_soc_dapm_sync(dapm);
4792
4793 snd_soc_dai_set_channel_map(codec_dai, ARRAY_SIZE(tx_ch),
4794 tx_ch, ARRAY_SIZE(rx_ch), rx_ch);
4795
4796 msm_codec_fn.get_afe_config_fn = tavil_get_afe_config;
4797
4798 ret = msm_adsp_power_up_config(codec, rtd->card->snd_card);
4799 if (ret) {
4800 pr_err("%s: Failed to set AFE config %d\n", __func__, ret);
4801 goto err;
4802 }
4803
4804 config_data = msm_codec_fn.get_afe_config_fn(codec,
4805 AFE_AANC_VERSION);
4806 if (config_data) {
4807 ret = afe_set_config(AFE_AANC_VERSION, config_data, 0);
4808 if (ret) {
4809 pr_err("%s: Failed to set aanc version %d\n",
4810 __func__, ret);
4811 goto err;
4812 }
4813 }
4814
4815 /*
4816 * Send speaker configuration only for WSA8810.
4817 * Default configuration is for WSA8815.
4818 */
4819 pr_debug("%s: Number of aux devices: %d\n",
4820 __func__, rtd->card->num_aux_devs);
4821 if (rtd->card->num_aux_devs &&
4822 !list_empty(&rtd->card->aux_comp_list)) {
4823 aux_comp = list_first_entry(&rtd->card->aux_comp_list,
4824 struct snd_soc_component, card_aux_list);
4825 if (!strcmp(aux_comp->name, WSA8810_NAME_1) ||
4826 !strcmp(aux_comp->name, WSA8810_NAME_2)) {
4827 tavil_set_spkr_mode(rtd->codec, WCD934X_SPKR_MODE_1);
4828 tavil_set_spkr_gain_offset(rtd->codec,
4829 WCD934X_RX_GAIN_OFFSET_M1P5_DB);
4830 }
4831 }
4832
4833 card = rtd->card->snd_card;
4834 entry = snd_info_create_subdir(card->module, "codecs",
4835 card->proc_root);
4836 if (!entry) {
4837 pr_debug("%s: Cannot create codecs module entry\n",
4838 __func__);
4839 ret = 0;
4840 goto err;
4841 }
4842 pdata->codec_root = entry;
4843 tavil_codec_info_create_codec_entry(pdata->codec_root, codec);
4844
4845 codec_reg_done = true;
4846 return 0;
4847err:
4848 return ret;
4849}
4850
4851static int msm_int_audrx_init(struct snd_soc_pcm_runtime *rtd)
4852{
4853 int ret = 0;
4854 struct snd_soc_codec *codec = rtd->codec;
4855 struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
4856 struct snd_card *card;
4857 struct snd_info_entry *entry;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]4858 struct snd_soc_component *aux_comp;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4859 struct msm_asoc_mach_data *pdata =
4860 snd_soc_card_get_drvdata(rtd->card);
4861
4862 ret = snd_soc_add_codec_controls(codec, msm_int_snd_controls,
4863 ARRAY_SIZE(msm_int_snd_controls));
4864 if (ret < 0) {
4865 pr_err("%s: add_codec_controls failed: %d\n",
4866 __func__, ret);
4867 return ret;
4868 }
4869 ret = snd_soc_add_codec_controls(codec, msm_common_snd_controls,
4870 ARRAY_SIZE(msm_common_snd_controls));
4871 if (ret < 0) {
4872 pr_err("%s: add common snd controls failed: %d\n",
4873 __func__, ret);
4874 return ret;
4875 }
4876
4877 snd_soc_dapm_new_controls(dapm, msm_int_dapm_widgets,
4878 ARRAY_SIZE(msm_int_dapm_widgets));
4879
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]4880 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic0");
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4881 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic1");
4882 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic2");
4883 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic3");
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4884
4885 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic1");
4886 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic2");
4887 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic3");
4888 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic4");
4889
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]4890 snd_soc_dapm_ignore_suspend(dapm, "WSA_SPK1 OUT");
4891 snd_soc_dapm_ignore_suspend(dapm, "WSA_SPK2 OUT");
4892 snd_soc_dapm_ignore_suspend(dapm, "WSA AIF VI");
4893 snd_soc_dapm_ignore_suspend(dapm, "VIINPUT_WSA");
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4894
4895 snd_soc_dapm_sync(dapm);
4896
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]4897 /*
4898 * Send speaker configuration only for WSA8810.
4899 * Default configuration is for WSA8815.
4900 */
4901 dev_dbg(codec->dev, "%s: Number of aux devices: %d\n",
4902 __func__, rtd->card->num_aux_devs);
4903 if (rtd->card->num_aux_devs &&
4904 !list_empty(&rtd->card->component_dev_list)) {
4905 aux_comp = list_first_entry(
4906 &rtd->card->component_dev_list,
4907 struct snd_soc_component,
4908 card_aux_list);
4909 if (!strcmp(aux_comp->name, WSA8810_NAME_1) ||
4910 !strcmp(aux_comp->name, WSA8810_NAME_2)) {
4911 wsa_macro_set_spkr_mode(rtd->codec,
4912 WSA_MACRO_SPKR_MODE_1);
4913 wsa_macro_set_spkr_gain_offset(rtd->codec,
4914 WSA_MACRO_GAIN_OFFSET_M1P5_DB);
4915 }
4916 }
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4917 card = rtd->card->snd_card;
4918 entry = snd_info_create_subdir(card->module, "codecs",
4919 card->proc_root);
4920 if (!entry) {
4921 pr_debug("%s: Cannot create codecs module entry\n",
4922 __func__);
4923 ret = 0;
4924 goto err;
4925 }
4926 pdata->codec_root = entry;
4927 bolero_info_create_codec_entry(pdata->codec_root, codec);
4928 codec_reg_done = true;
4929 return 0;
4930err:
4931 return ret;
4932}
4933
4934static int msm_wcn_init(struct snd_soc_pcm_runtime *rtd)
4935{
4936 unsigned int rx_ch[WCN_CDC_SLIM_RX_CH_MAX] = {157, 158};
4937 unsigned int tx_ch[WCN_CDC_SLIM_TX_CH_MAX] = {159, 160, 161};
4938 struct snd_soc_dai *codec_dai = rtd->codec_dai;
4939
4940 return snd_soc_dai_set_channel_map(codec_dai, ARRAY_SIZE(tx_ch),
4941 tx_ch, ARRAY_SIZE(rx_ch), rx_ch);
4942}
4943
4944static void *def_wcd_mbhc_cal(void)
4945{
4946 void *wcd_mbhc_cal;
4947 struct wcd_mbhc_btn_detect_cfg *btn_cfg;
4948 u16 *btn_high;
4949
4950 wcd_mbhc_cal = kzalloc(WCD_MBHC_CAL_SIZE(WCD_MBHC_DEF_BUTTONS,
4951 WCD9XXX_MBHC_DEF_RLOADS), GFP_KERNEL);
4952 if (!wcd_mbhc_cal)
4953 return NULL;
4954
4955#define S(X, Y) ((WCD_MBHC_CAL_PLUG_TYPE_PTR(wcd_mbhc_cal)->X) = (Y))
4956 S(v_hs_max, 1600);
4957#undef S
4958#define S(X, Y) ((WCD_MBHC_CAL_BTN_DET_PTR(wcd_mbhc_cal)->X) = (Y))
4959 S(num_btn, WCD_MBHC_DEF_BUTTONS);
4960#undef S
4961
4962 btn_cfg = WCD_MBHC_CAL_BTN_DET_PTR(wcd_mbhc_cal);
4963 btn_high = ((void *)&btn_cfg->_v_btn_low) +
4964 (sizeof(btn_cfg->_v_btn_low[0]) * btn_cfg->num_btn);
4965
4966 btn_high[0] = 75;
4967 btn_high[1] = 150;
4968 btn_high[2] = 237;
4969 btn_high[3] = 500;
4970 btn_high[4] = 500;
4971 btn_high[5] = 500;
4972 btn_high[6] = 500;
4973 btn_high[7] = 500;
4974
4975 return wcd_mbhc_cal;
4976}
4977
4978static int msm_snd_hw_params(struct snd_pcm_substream *substream,
4979 struct snd_pcm_hw_params *params)
4980{
4981 struct snd_soc_pcm_runtime *rtd = substream->private_data;
4982 struct snd_soc_dai *codec_dai = rtd->codec_dai;
4983 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
4984 struct snd_soc_dai_link *dai_link = rtd->dai_link;
4985
4986 int ret = 0;
4987 u32 rx_ch[SLIM_MAX_RX_PORTS], tx_ch[SLIM_MAX_TX_PORTS];
4988 u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
4989 u32 user_set_tx_ch = 0;
4990 u32 rx_ch_count;
4991
4992 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
4993 ret = snd_soc_dai_get_channel_map(codec_dai,
4994 &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
4995 if (ret < 0) {
4996 pr_err("%s: failed to get codec chan map, err:%d\n",
4997 __func__, ret);
4998 goto err;
4999 }
5000 if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_5_RX) {
5001 pr_debug("%s: rx_5_ch=%d\n", __func__,
5002 slim_rx_cfg[5].channels);
5003 rx_ch_count = slim_rx_cfg[5].channels;
5004 } else if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_2_RX) {
5005 pr_debug("%s: rx_2_ch=%d\n", __func__,
5006 slim_rx_cfg[2].channels);
5007 rx_ch_count = slim_rx_cfg[2].channels;
5008 } else if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_6_RX) {
5009 pr_debug("%s: rx_6_ch=%d\n", __func__,
5010 slim_rx_cfg[6].channels);
5011 rx_ch_count = slim_rx_cfg[6].channels;
5012 } else {
5013 pr_debug("%s: rx_0_ch=%d\n", __func__,
5014 slim_rx_cfg[0].channels);
5015 rx_ch_count = slim_rx_cfg[0].channels;
5016 }
5017 ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
5018 rx_ch_count, rx_ch);
5019 if (ret < 0) {
5020 pr_err("%s: failed to set cpu chan map, err:%d\n",
5021 __func__, ret);
5022 goto err;
5023 }
5024 } else {
5025
5026 pr_debug("%s: %s_tx_dai_id_%d_ch=%d\n", __func__,
5027 codec_dai->name, codec_dai->id, user_set_tx_ch);
5028 ret = snd_soc_dai_get_channel_map(codec_dai,
5029 &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
5030 if (ret < 0) {
5031 pr_err("%s: failed to get tx codec chan map, err:%d\n",
5032 __func__, ret);
5033 goto err;
5034 }
5035 /* For <codec>_tx1 case */
5036 if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_0_TX)
5037 user_set_tx_ch = slim_tx_cfg[0].channels;
5038 /* For <codec>_tx3 case */
5039 else if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_1_TX)
5040 user_set_tx_ch = slim_tx_cfg[1].channels;
5041 else if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_4_TX)
5042 user_set_tx_ch = msm_vi_feed_tx_ch;
5043 else
5044 user_set_tx_ch = tx_ch_cnt;
5045
5046 pr_debug("%s: msm_slim_0_tx_ch(%d) user_set_tx_ch(%d) tx_ch_cnt(%d), BE id (%d)\n",
5047 __func__, slim_tx_cfg[0].channels, user_set_tx_ch,
5048 tx_ch_cnt, dai_link->id);
5049
5050 ret = snd_soc_dai_set_channel_map(cpu_dai,
5051 user_set_tx_ch, tx_ch, 0, 0);
5052 if (ret < 0)
5053 pr_err("%s: failed to set tx cpu chan map, err:%d\n",
5054 __func__, ret);
5055 }
5056
5057err:
5058 return ret;
5059}
5060
5061
5062static int msm_snd_cdc_dma_hw_params(struct snd_pcm_substream *substream,
5063 struct snd_pcm_hw_params *params)
5064{
5065 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5066 struct snd_soc_dai *codec_dai = rtd->codec_dai;
5067 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5068 struct snd_soc_dai_link *dai_link = rtd->dai_link;
5069
5070 int ret = 0;
5071 u32 rx_ch_cdc_dma, tx_ch_cdc_dma;
5072 u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
5073 u32 user_set_tx_ch = 0;
5074 u32 user_set_rx_ch = 0;
5075 u32 ch_id;
5076
5077 ret = snd_soc_dai_get_channel_map(codec_dai,
5078 &tx_ch_cnt, &tx_ch_cdc_dma, &rx_ch_cnt,
5079 &rx_ch_cdc_dma);
5080 if (ret < 0) {
5081 pr_err("%s: failed to get codec chan map, err:%d\n",
5082 __func__, ret);
5083 goto err;
5084 }
5085
5086 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
5087 switch (dai_link->id) {
5088 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
5089 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
5090 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
5091 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
5092 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
5093 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_3:
5094 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_4:
5095 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_5:
5096 {
5097 ch_id = msm_cdc_dma_get_idx_from_beid(dai_link->id);
5098 pr_debug("%s: id %d rx_ch=%d\n", __func__,
5099 ch_id, cdc_dma_rx_cfg[ch_id].channels);
5100 user_set_rx_ch = cdc_dma_rx_cfg[ch_id].channels;
5101 ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
5102 user_set_rx_ch, &rx_ch_cdc_dma);
5103 if (ret < 0) {
5104 pr_err("%s: failed to set cpu chan map, err:%d\n",
5105 __func__, ret);
5106 goto err;
5107 }
5108
5109 }
5110 break;
5111 }
5112 } else {
5113 switch (dai_link->id) {
5114 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
5115 {
5116 user_set_tx_ch = msm_vi_feed_tx_ch;
5117 }
5118 break;
5119 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
5120 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
5121 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
5122 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_1:
5123 {
5124 ch_id = msm_cdc_dma_get_idx_from_beid(dai_link->id);
5125 pr_debug("%s: id %d tx_ch=%d\n", __func__,
5126 ch_id, cdc_dma_tx_cfg[ch_id].channels);
5127 user_set_tx_ch = cdc_dma_tx_cfg[ch_id].channels;
5128 }
5129 break;
5130 }
5131
5132 ret = snd_soc_dai_set_channel_map(cpu_dai, user_set_tx_ch,
5133 &tx_ch_cdc_dma, 0, 0);
5134 if (ret < 0) {
5135 pr_err("%s: failed to set cpu chan map, err:%d\n",
5136 __func__, ret);
5137 goto err;
5138 }
5139 }
5140
5141err:
5142 return ret;
5143}
5144
5145static int msm_slimbus_2_hw_params(struct snd_pcm_substream *substream,
5146 struct snd_pcm_hw_params *params)
5147{
5148 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5149 struct snd_soc_dai *codec_dai = rtd->codec_dai;
5150 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5151 unsigned int rx_ch[SLIM_MAX_RX_PORTS], tx_ch[SLIM_MAX_TX_PORTS];
5152 unsigned int rx_ch_cnt = 0, tx_ch_cnt = 0;
5153 unsigned int num_tx_ch = 0;
5154 unsigned int num_rx_ch = 0;
5155 int ret = 0;
5156
5157 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
5158 num_rx_ch = params_channels(params);
5159 pr_debug("%s: %s rx_dai_id = %d num_ch = %d\n", __func__,
5160 codec_dai->name, codec_dai->id, num_rx_ch);
5161 ret = snd_soc_dai_get_channel_map(codec_dai,
5162 &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
5163 if (ret < 0) {
5164 pr_err("%s: failed to get codec chan map, err:%d\n",
5165 __func__, ret);
5166 goto err;
5167 }
5168 ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
5169 num_rx_ch, rx_ch);
5170 if (ret < 0) {
5171 pr_err("%s: failed to set cpu chan map, err:%d\n",
5172 __func__, ret);
5173 goto err;
5174 }
5175 } else {
5176 num_tx_ch = params_channels(params);
5177 pr_debug("%s: %s tx_dai_id = %d num_ch = %d\n", __func__,
5178 codec_dai->name, codec_dai->id, num_tx_ch);
5179 ret = snd_soc_dai_get_channel_map(codec_dai,
5180 &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
5181 if (ret < 0) {
5182 pr_err("%s: failed to get tx codec chan map, err:%d\n",
5183 __func__, ret);
5184 goto err;
5185 }
5186 ret = snd_soc_dai_set_channel_map(cpu_dai,
5187 num_tx_ch, tx_ch, 0, 0);
5188 if (ret < 0) {
5189 pr_err("%s: failed to set tx cpu chan map, err:%d\n",
5190 __func__, ret);
5191 goto err;
5192 }
5193 }
5194
5195err:
5196 return ret;
5197}
5198
5199static int msm_wcn_hw_params(struct snd_pcm_substream *substream,
5200 struct snd_pcm_hw_params *params)
5201{
5202 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5203 struct snd_soc_dai *codec_dai = rtd->codec_dai;
5204 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5205 struct snd_soc_dai_link *dai_link = rtd->dai_link;
5206 u32 rx_ch[WCN_CDC_SLIM_RX_CH_MAX], tx_ch[WCN_CDC_SLIM_TX_CH_MAX];
5207 u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
5208 int ret;
5209
5210 dev_dbg(rtd->dev, "%s: %s_tx_dai_id_%d\n", __func__,
5211 codec_dai->name, codec_dai->id);
5212 ret = snd_soc_dai_get_channel_map(codec_dai,
5213 &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
5214 if (ret) {
5215 dev_err(rtd->dev,
5216 "%s: failed to get BTFM codec chan map\n, err:%d\n",
5217 __func__, ret);
5218 goto err;
5219 }
5220
5221 dev_dbg(rtd->dev, "%s: tx_ch_cnt(%d) BE id %d\n",
5222 __func__, tx_ch_cnt, dai_link->id);
5223
5224 ret = snd_soc_dai_set_channel_map(cpu_dai,
5225 tx_ch_cnt, tx_ch, rx_ch_cnt, rx_ch);
5226 if (ret)
5227 dev_err(rtd->dev, "%s: failed to set cpu chan map, err:%d\n",
5228 __func__, ret);
5229
5230err:
5231 return ret;
5232}
5233
5234static int msm_get_port_id(int be_id)
5235{
5236 int afe_port_id;
5237
5238 switch (be_id) {
5239 case MSM_BACKEND_DAI_PRI_MI2S_RX:
5240 afe_port_id = AFE_PORT_ID_PRIMARY_MI2S_RX;
5241 break;
5242 case MSM_BACKEND_DAI_PRI_MI2S_TX:
5243 afe_port_id = AFE_PORT_ID_PRIMARY_MI2S_TX;
5244 break;
5245 case MSM_BACKEND_DAI_SECONDARY_MI2S_RX:
5246 afe_port_id = AFE_PORT_ID_SECONDARY_MI2S_RX;
5247 break;
5248 case MSM_BACKEND_DAI_SECONDARY_MI2S_TX:
5249 afe_port_id = AFE_PORT_ID_SECONDARY_MI2S_TX;
5250 break;
5251 case MSM_BACKEND_DAI_TERTIARY_MI2S_RX:
5252 afe_port_id = AFE_PORT_ID_TERTIARY_MI2S_RX;
5253 break;
5254 case MSM_BACKEND_DAI_TERTIARY_MI2S_TX:
5255 afe_port_id = AFE_PORT_ID_TERTIARY_MI2S_TX;
5256 break;
5257 case MSM_BACKEND_DAI_QUATERNARY_MI2S_RX:
5258 afe_port_id = AFE_PORT_ID_QUATERNARY_MI2S_RX;
5259 break;
5260 case MSM_BACKEND_DAI_QUATERNARY_MI2S_TX:
5261 afe_port_id = AFE_PORT_ID_QUATERNARY_MI2S_TX;
5262 break;
5263 case MSM_BACKEND_DAI_QUINARY_MI2S_RX:
5264 afe_port_id = AFE_PORT_ID_QUINARY_MI2S_RX;
5265 break;
5266 case MSM_BACKEND_DAI_QUINARY_MI2S_TX:
5267 afe_port_id = AFE_PORT_ID_QUINARY_MI2S_TX;
5268 break;
5269 default:
5270 pr_err("%s: Invalid BE id: %d\n", __func__, be_id);
5271 afe_port_id = -EINVAL;
5272 }
5273
5274 return afe_port_id;
5275}
5276
5277static u32 get_mi2s_bits_per_sample(u32 bit_format)
5278{
5279 u32 bit_per_sample;
5280
5281 switch (bit_format) {
5282 case SNDRV_PCM_FORMAT_S32_LE:
5283 case SNDRV_PCM_FORMAT_S24_3LE:
5284 case SNDRV_PCM_FORMAT_S24_LE:
5285 bit_per_sample = 32;
5286 break;
5287 case SNDRV_PCM_FORMAT_S16_LE:
5288 default:
5289 bit_per_sample = 16;
5290 break;
5291 }
5292
5293 return bit_per_sample;
5294}
5295
5296static void update_mi2s_clk_val(int dai_id, int stream)
5297{
5298 u32 bit_per_sample;
5299
5300 if (stream == SNDRV_PCM_STREAM_PLAYBACK) {
5301 bit_per_sample =
5302 get_mi2s_bits_per_sample(mi2s_rx_cfg[dai_id].bit_format);
5303 mi2s_clk[dai_id].clk_freq_in_hz =
5304 mi2s_rx_cfg[dai_id].sample_rate * 2 * bit_per_sample;
5305 } else {
5306 bit_per_sample =
5307 get_mi2s_bits_per_sample(mi2s_tx_cfg[dai_id].bit_format);
5308 mi2s_clk[dai_id].clk_freq_in_hz =
5309 mi2s_tx_cfg[dai_id].sample_rate * 2 * bit_per_sample;
5310 }
5311}
5312
5313static int msm_mi2s_set_sclk(struct snd_pcm_substream *substream, bool enable)
5314{
5315 int ret = 0;
5316 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5317 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5318 int port_id = 0;
5319 int index = cpu_dai->id;
5320
5321 port_id = msm_get_port_id(rtd->dai_link->id);
5322 if (port_id < 0) {
5323 dev_err(rtd->card->dev, "%s: Invalid port_id\n", __func__);
5324 ret = port_id;
5325 goto err;
5326 }
5327
5328 if (enable) {
5329 update_mi2s_clk_val(index, substream->stream);
5330 dev_dbg(rtd->card->dev, "%s: clock rate %ul\n", __func__,
5331 mi2s_clk[index].clk_freq_in_hz);
5332 }
5333
5334 mi2s_clk[index].enable = enable;
5335 ret = afe_set_lpass_clock_v2(port_id,
5336 &mi2s_clk[index]);
5337 if (ret < 0) {
5338 dev_err(rtd->card->dev,
5339 "%s: afe lpass clock failed for port 0x%x , err:%d\n",
5340 __func__, port_id, ret);
5341 goto err;
5342 }
5343
5344err:
5345 return ret;
5346}
5347
5348static int msm_set_pinctrl(struct msm_pinctrl_info *pinctrl_info,
5349 enum pinctrl_pin_state new_state)
5350{
5351 int ret = 0;
5352 int curr_state = 0;
5353
5354 if (pinctrl_info == NULL) {
5355 pr_err("%s: pinctrl_info is NULL\n", __func__);
5356 ret = -EINVAL;
5357 goto err;
5358 }
5359
5360 if (pinctrl_info->pinctrl == NULL) {
5361 pr_err("%s: pinctrl_info->pinctrl is NULL\n", __func__);
5362 ret = -EINVAL;
5363 goto err;
5364 }
5365
5366 curr_state = pinctrl_info->curr_state;
5367 pinctrl_info->curr_state = new_state;
5368 pr_debug("%s: curr_state = %s new_state = %s\n", __func__,
5369 pin_states[curr_state], pin_states[pinctrl_info->curr_state]);
5370
5371 if (curr_state == pinctrl_info->curr_state) {
5372 pr_debug("%s: Already in same state\n", __func__);
5373 goto err;
5374 }
5375
5376 if (curr_state != STATE_DISABLE &&
5377 pinctrl_info->curr_state != STATE_DISABLE) {
5378 pr_debug("%s: state already active cannot switch\n", __func__);
5379 ret = -EIO;
5380 goto err;
5381 }
5382
5383 switch (pinctrl_info->curr_state) {
5384 case STATE_MI2S_ACTIVE:
5385 ret = pinctrl_select_state(pinctrl_info->pinctrl,
5386 pinctrl_info->mi2s_active);
5387 if (ret) {
5388 pr_err("%s: MI2S state select failed with %d\n",
5389 __func__, ret);
5390 ret = -EIO;
5391 goto err;
5392 }
5393 break;
5394 case STATE_TDM_ACTIVE:
5395 ret = pinctrl_select_state(pinctrl_info->pinctrl,
5396 pinctrl_info->tdm_active);
5397 if (ret) {
5398 pr_err("%s: TDM state select failed with %d\n",
5399 __func__, ret);
5400 ret = -EIO;
5401 goto err;
5402 }
5403 break;
5404 case STATE_DISABLE:
5405 if (curr_state == STATE_MI2S_ACTIVE) {
5406 ret = pinctrl_select_state(pinctrl_info->pinctrl,
5407 pinctrl_info->mi2s_disable);
5408 } else {
5409 ret = pinctrl_select_state(pinctrl_info->pinctrl,
5410 pinctrl_info->tdm_disable);
5411 }
5412 if (ret) {
5413 pr_err("%s: state disable failed with %d\n",
5414 __func__, ret);
5415 ret = -EIO;
5416 goto err;
5417 }
5418 break;
5419 default:
5420 pr_err("%s: TLMM pin state is invalid\n", __func__);
5421 return -EINVAL;
5422 }
5423
5424err:
5425 return ret;
5426}
5427
5428static int msm_get_pinctrl(struct platform_device *pdev)
5429{
5430 struct snd_soc_card *card = platform_get_drvdata(pdev);
5431 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
5432 struct msm_pinctrl_info *pinctrl_info = NULL;
5433 struct pinctrl *pinctrl;
5434 int ret = 0;
5435
5436 pinctrl_info = &pdata->pinctrl_info;
5437
5438 if (pinctrl_info == NULL) {
5439 pr_err("%s: pinctrl_info is NULL\n", __func__);
5440 return -EINVAL;
5441 }
5442
5443 pinctrl = devm_pinctrl_get(&pdev->dev);
5444 if (IS_ERR_OR_NULL(pinctrl)) {
5445 pr_err("%s: Unable to get pinctrl handle\n", __func__);
5446 return -EINVAL;
5447 }
5448 pinctrl_info->pinctrl = pinctrl;
5449
5450 /* get all the states handles from Device Tree */
5451 pinctrl_info->mi2s_disable = pinctrl_lookup_state(pinctrl,
5452 "quat-mi2s-sleep");
5453 if (IS_ERR(pinctrl_info->mi2s_disable)) {
5454 pr_err("%s: could not get mi2s_disable pinstate\n", __func__);
5455 goto err;
5456 }
5457 pinctrl_info->mi2s_active = pinctrl_lookup_state(pinctrl,
5458 "quat-mi2s-active");
5459 if (IS_ERR(pinctrl_info->mi2s_active)) {
5460 pr_err("%s: could not get mi2s_active pinstate\n", __func__);
5461 goto err;
5462 }
5463 pinctrl_info->tdm_disable = pinctrl_lookup_state(pinctrl,
5464 "quat-tdm-sleep");
5465 if (IS_ERR(pinctrl_info->tdm_disable)) {
5466 pr_err("%s: could not get tdm_disable pinstate\n", __func__);
5467 goto err;
5468 }
5469 pinctrl_info->tdm_active = pinctrl_lookup_state(pinctrl,
5470 "quat-tdm-active");
5471 if (IS_ERR(pinctrl_info->tdm_active)) {
5472 pr_err("%s: could not get tdm_active pinstate\n",
5473 __func__);
5474 goto err;
5475 }
5476 /* Reset the TLMM pins to a default state */
5477 ret = pinctrl_select_state(pinctrl_info->pinctrl,
5478 pinctrl_info->mi2s_disable);
5479 if (ret != 0) {
5480 pr_err("%s: Disable TLMM pins failed with %d\n",
5481 __func__, ret);
5482 ret = -EIO;
5483 goto err;
5484 }
5485 pinctrl_info->curr_state = STATE_DISABLE;
5486
5487 return 0;
5488
5489err:
5490 devm_pinctrl_put(pinctrl);
5491 pinctrl_info->pinctrl = NULL;
5492 return -EINVAL;
5493}
5494
5495static int msm_tdm_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
5496 struct snd_pcm_hw_params *params)
5497{
5498 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5499 struct snd_interval *rate = hw_param_interval(params,
5500 SNDRV_PCM_HW_PARAM_RATE);
5501 struct snd_interval *channels = hw_param_interval(params,
5502 SNDRV_PCM_HW_PARAM_CHANNELS);
5503
5504 if (cpu_dai->id == AFE_PORT_ID_QUATERNARY_TDM_RX) {
5505 channels->min = channels->max =
5506 tdm_rx_cfg[TDM_QUAT][TDM_0].channels;
5507 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
5508 tdm_rx_cfg[TDM_QUAT][TDM_0].bit_format);
5509 rate->min = rate->max =
5510 tdm_rx_cfg[TDM_QUAT][TDM_0].sample_rate;
5511 } else if (cpu_dai->id == AFE_PORT_ID_SECONDARY_TDM_RX) {
5512 channels->min = channels->max =
5513 tdm_rx_cfg[TDM_SEC][TDM_0].channels;
5514 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
5515 tdm_rx_cfg[TDM_SEC][TDM_0].bit_format);
5516 rate->min = rate->max = tdm_rx_cfg[TDM_SEC][TDM_0].sample_rate;
5517 } else if (cpu_dai->id == AFE_PORT_ID_QUINARY_TDM_RX) {
5518 channels->min = channels->max =
5519 tdm_rx_cfg[TDM_QUIN][TDM_0].channels;
5520 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
5521 tdm_rx_cfg[TDM_QUIN][TDM_0].bit_format);
5522 rate->min = rate->max = tdm_rx_cfg[TDM_QUIN][TDM_0].sample_rate;
5523 } else {
5524 pr_err("%s: dai id 0x%x not supported\n",
5525 __func__, cpu_dai->id);
5526 return -EINVAL;
5527 }
5528
5529 pr_debug("%s: dai id = 0x%x channels = %d rate = %d format = 0x%x\n",
5530 __func__, cpu_dai->id, channels->max, rate->max,
5531 params_format(params));
5532
5533 return 0;
5534}
5535
5536static int sm6150_tdm_snd_hw_params(struct snd_pcm_substream *substream,
5537 struct snd_pcm_hw_params *params)
5538{
5539 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5540 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5541 int ret = 0;
5542 int slot_width = 32;
5543 int channels, slots;
5544 unsigned int slot_mask, rate, clk_freq;
5545 unsigned int slot_offset[8] = {0, 4, 8, 12, 16, 20, 24, 28};
5546
5547 pr_debug("%s: dai id = 0x%x\n", __func__, cpu_dai->id);
5548
5549 /* currently only supporting TDM_RX_0 and TDM_TX_0 */
5550 switch (cpu_dai->id) {
5551 case AFE_PORT_ID_PRIMARY_TDM_RX:
5552 slots = tdm_rx_cfg[TDM_PRI][TDM_0].channels;
5553 break;
5554 case AFE_PORT_ID_SECONDARY_TDM_RX:
5555 slots = tdm_rx_cfg[TDM_SEC][TDM_0].channels;
5556 break;
5557 case AFE_PORT_ID_TERTIARY_TDM_RX:
5558 slots = tdm_rx_cfg[TDM_TERT][TDM_0].channels;
5559 break;
5560 case AFE_PORT_ID_QUATERNARY_TDM_RX:
5561 slots = tdm_rx_cfg[TDM_QUAT][TDM_0].channels;
5562 break;
5563 case AFE_PORT_ID_QUINARY_TDM_RX:
5564 slots = tdm_rx_cfg[TDM_QUIN][TDM_0].channels;
5565 break;
5566 case AFE_PORT_ID_PRIMARY_TDM_TX:
5567 slots = tdm_tx_cfg[TDM_PRI][TDM_0].channels;
5568 break;
5569 case AFE_PORT_ID_SECONDARY_TDM_TX:
5570 slots = tdm_tx_cfg[TDM_SEC][TDM_0].channels;
5571 break;
5572 case AFE_PORT_ID_TERTIARY_TDM_TX:
5573 slots = tdm_tx_cfg[TDM_TERT][TDM_0].channels;
5574 break;
5575 case AFE_PORT_ID_QUATERNARY_TDM_TX:
5576 slots = tdm_tx_cfg[TDM_QUAT][TDM_0].channels;
5577 break;
5578 case AFE_PORT_ID_QUINARY_TDM_TX:
5579 slots = tdm_tx_cfg[TDM_QUIN][TDM_0].channels;
5580 break;
5581
5582 default:
5583 pr_err("%s: dai id 0x%x not supported\n",
5584 __func__, cpu_dai->id);
5585 return -EINVAL;
5586 }
5587
5588 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
5589 /*2 slot config - bits 0 and 1 set for the first two slots */
5590 slot_mask = 0x0000FFFF >> (16-slots);
5591 channels = slots;
5592
5593 pr_debug("%s: tdm rx slot_width %d slots %d\n",
5594 __func__, slot_width, slots);
5595
5596 ret = snd_soc_dai_set_tdm_slot(cpu_dai, 0, slot_mask,
5597 slots, slot_width);
5598 if (ret < 0) {
5599 pr_err("%s: failed to set tdm rx slot, err:%d\n",
5600 __func__, ret);
5601 goto end;
5602 }
5603
5604 ret = snd_soc_dai_set_channel_map(cpu_dai,
5605 0, NULL, channels, slot_offset);
5606 if (ret < 0) {
5607 pr_err("%s: failed to set tdm rx channel map, err:%d\n",
5608 __func__, ret);
5609 goto end;
5610 }
5611 } else if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
5612 /*2 slot config - bits 0 and 1 set for the first two slots */
5613 slot_mask = 0x0000FFFF >> (16-slots);
5614 channels = slots;
5615
5616 pr_debug("%s: tdm tx slot_width %d slots %d\n",
5617 __func__, slot_width, slots);
5618
5619 ret = snd_soc_dai_set_tdm_slot(cpu_dai, slot_mask, 0,
5620 slots, slot_width);
5621 if (ret < 0) {
5622 pr_err("%s: failed to set tdm tx slot, err:%d\n",
5623 __func__, ret);
5624 goto end;
5625 }
5626
5627 ret = snd_soc_dai_set_channel_map(cpu_dai,
5628 channels, slot_offset, 0, NULL);
5629 if (ret < 0) {
5630 pr_err("%s: failed to set tdm tx channel map, err:%d\n",
5631 __func__, ret);
5632 goto end;
5633 }
5634 } else {
5635 ret = -EINVAL;
5636 pr_err("%s: invalid use case, err:%d\n",
5637 __func__, ret);
5638 goto end;
5639 }
5640
5641 rate = params_rate(params);
5642 clk_freq = rate * slot_width * slots;
5643 ret = snd_soc_dai_set_sysclk(cpu_dai, 0, clk_freq, SND_SOC_CLOCK_OUT);
5644 if (ret < 0)
5645 pr_err("%s: failed to set tdm clk, err:%d\n",
5646 __func__, ret);
5647
5648end:
5649 return ret;
5650}
5651
5652static int sm6150_tdm_snd_startup(struct snd_pcm_substream *substream)
5653{
5654 int ret = 0;
5655 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5656 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5657 struct snd_soc_card *card = rtd->card;
5658 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
5659 struct msm_pinctrl_info *pinctrl_info = &pdata->pinctrl_info;
5660
5661 /* currently only supporting TDM_RX_0 and TDM_TX_0 */
5662 if ((cpu_dai->id == AFE_PORT_ID_QUATERNARY_TDM_RX) ||
5663 (cpu_dai->id == AFE_PORT_ID_QUATERNARY_TDM_TX)) {
5664 ret = msm_set_pinctrl(pinctrl_info, STATE_TDM_ACTIVE);
5665 if (ret)
5666 pr_err("%s: TDM TLMM pinctrl set failed with %d\n",
5667 __func__, ret);
5668 }
5669
5670 return ret;
5671}
5672
5673static void sm6150_tdm_snd_shutdown(struct snd_pcm_substream *substream)
5674{
5675 int ret = 0;
5676 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5677 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5678 struct snd_soc_card *card = rtd->card;
5679 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
5680 struct msm_pinctrl_info *pinctrl_info = &pdata->pinctrl_info;
5681
5682 /* currently only supporting TDM_RX_0 and TDM_TX_0 */
5683 if ((cpu_dai->id == AFE_PORT_ID_QUATERNARY_TDM_RX) ||
5684 (cpu_dai->id == AFE_PORT_ID_QUATERNARY_TDM_TX)) {
5685 ret = msm_set_pinctrl(pinctrl_info, STATE_DISABLE);
5686 if (ret)
5687 pr_err("%s: TDM TLMM pinctrl set failed with %d\n",
5688 __func__, ret);
5689 }
5690}
5691
5692static struct snd_soc_ops sm6150_tdm_be_ops = {
5693 .hw_params = sm6150_tdm_snd_hw_params,
5694 .startup = sm6150_tdm_snd_startup,
5695 .shutdown = sm6150_tdm_snd_shutdown
5696};
5697
5698static int msm_fe_qos_prepare(struct snd_pcm_substream *substream)
5699{
5700 cpumask_t mask;
5701
5702 if (pm_qos_request_active(&substream->latency_pm_qos_req))
5703 pm_qos_remove_request(&substream->latency_pm_qos_req);
5704
5705 cpumask_clear(&mask);
5706 cpumask_set_cpu(1, &mask); /* affine to core 1 */
5707 cpumask_set_cpu(2, &mask); /* affine to core 2 */
5708 cpumask_copy(&substream->latency_pm_qos_req.cpus_affine, &mask);
5709
5710 substream->latency_pm_qos_req.type = PM_QOS_REQ_AFFINE_CORES;
5711
5712 pm_qos_add_request(&substream->latency_pm_qos_req,
5713 PM_QOS_CPU_DMA_LATENCY,
5714 MSM_LL_QOS_VALUE);
5715 return 0;
5716}
5717
5718static struct snd_soc_ops msm_fe_qos_ops = {
5719 .prepare = msm_fe_qos_prepare,
5720};
5721
5722static int msm_mi2s_snd_startup(struct snd_pcm_substream *substream)
5723{
5724 int ret = 0;
5725 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5726 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5727 int index = cpu_dai->id;
5728 unsigned int fmt = SND_SOC_DAIFMT_CBS_CFS;
5729 struct snd_soc_card *card = rtd->card;
5730 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
5731 struct msm_pinctrl_info *pinctrl_info = &pdata->pinctrl_info;
5732 int ret_pinctrl = 0;
5733
5734 dev_dbg(rtd->card->dev,
5735 "%s: substream = %s stream = %d, dai name %s, dai ID %d\n",
5736 __func__, substream->name, substream->stream,
5737 cpu_dai->name, cpu_dai->id);
5738
5739 if (index < PRIM_MI2S || index >= MI2S_MAX) {
5740 ret = -EINVAL;
5741 dev_err(rtd->card->dev,
5742 "%s: CPU DAI id (%d) out of range\n",
5743 __func__, cpu_dai->id);
5744 goto err;
5745 }
5746 /*
5747 * Mutex protection in case the same MI2S
5748 * interface using for both TX and RX so
5749 * that the same clock won't be enable twice.
5750 */
5751 mutex_lock(&mi2s_intf_conf[index].lock);
5752 if (++mi2s_intf_conf[index].ref_cnt == 1) {
5753 /* Check if msm needs to provide the clock to the interface */
5754 if (!mi2s_intf_conf[index].msm_is_mi2s_master) {
5755 mi2s_clk[index].clk_id = mi2s_ebit_clk[index];
5756 fmt = SND_SOC_DAIFMT_CBM_CFM;
5757 }
5758 ret = msm_mi2s_set_sclk(substream, true);
5759 if (ret < 0) {
5760 dev_err(rtd->card->dev,
5761 "%s: afe lpass clock failed to enable MI2S clock, err:%d\n",
5762 __func__, ret);
5763 goto clean_up;
5764 }
5765
5766 ret = snd_soc_dai_set_fmt(cpu_dai, fmt);
5767 if (ret < 0) {
5768 pr_err("%s: set fmt cpu dai failed for MI2S (%d), err:%d\n",
5769 __func__, index, ret);
5770 goto clk_off;
5771 }
5772 if (index == QUAT_MI2S) {
5773 ret_pinctrl = msm_set_pinctrl(pinctrl_info,
5774 STATE_MI2S_ACTIVE);
5775 if (ret_pinctrl)
5776 pr_err("%s: MI2S TLMM pinctrl set failed with %d\n",
5777 __func__, ret_pinctrl);
5778 }
5779 }
5780clk_off:
5781 if (ret < 0)
5782 msm_mi2s_set_sclk(substream, false);
5783clean_up:
5784 if (ret < 0)
5785 mi2s_intf_conf[index].ref_cnt--;
5786 mutex_unlock(&mi2s_intf_conf[index].lock);
5787err:
5788 return ret;
5789}
5790
5791static void msm_mi2s_snd_shutdown(struct snd_pcm_substream *substream)
5792{
5793 int ret;
5794 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5795 int index = rtd->cpu_dai->id;
5796 struct snd_soc_card *card = rtd->card;
5797 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
5798 struct msm_pinctrl_info *pinctrl_info = &pdata->pinctrl_info;
5799 int ret_pinctrl = 0;
5800
5801 pr_debug("%s(): substream = %s stream = %d\n", __func__,
5802 substream->name, substream->stream);
5803 if (index < PRIM_MI2S || index >= MI2S_MAX) {
5804 pr_err("%s:invalid MI2S DAI(%d)\n", __func__, index);
5805 return;
5806 }
5807
5808 mutex_lock(&mi2s_intf_conf[index].lock);
5809 if (--mi2s_intf_conf[index].ref_cnt == 0) {
5810 ret = msm_mi2s_set_sclk(substream, false);
5811 if (ret < 0)
5812 pr_err("%s:clock disable failed for MI2S (%d); ret=%d\n",
5813 __func__, index, ret);
5814 if (index == QUAT_MI2S) {
5815 ret_pinctrl = msm_set_pinctrl(pinctrl_info,
5816 STATE_DISABLE);
5817 if (ret_pinctrl)
5818 pr_err("%s: MI2S TLMM pinctrl set failed with %d\n",
5819 __func__, ret_pinctrl);
5820 }
5821 }
5822 mutex_unlock(&mi2s_intf_conf[index].lock);
5823}
5824
5825static struct snd_soc_ops msm_mi2s_be_ops = {
5826 .startup = msm_mi2s_snd_startup,
5827 .shutdown = msm_mi2s_snd_shutdown,
5828};
5829
5830static struct snd_soc_ops msm_cdc_dma_be_ops = {
5831 .hw_params = msm_snd_cdc_dma_hw_params,
5832};
5833
5834static struct snd_soc_ops msm_be_ops = {
5835 .hw_params = msm_snd_hw_params,
5836};
5837
5838static struct snd_soc_ops msm_slimbus_2_be_ops = {
5839 .hw_params = msm_slimbus_2_hw_params,
5840};
5841
5842static struct snd_soc_ops msm_wcn_ops = {
5843 .hw_params = msm_wcn_hw_params,
5844};
5845
5846
5847/* Digital audio interface glue - connects codec <---> CPU */
5848static struct snd_soc_dai_link msm_common_dai_links[] = {
5849 /* FrontEnd DAI Links */
5850 {
5851 .name = MSM_DAILINK_NAME(Media1),
5852 .stream_name = "MultiMedia1",
5853 .cpu_dai_name = "MultiMedia1",
5854 .platform_name = "msm-pcm-dsp.0",
5855 .dynamic = 1,
5856 .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
5857 .dpcm_playback = 1,
5858 .dpcm_capture = 1,
5859 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5860 SND_SOC_DPCM_TRIGGER_POST},
5861 .codec_dai_name = "snd-soc-dummy-dai",
5862 .codec_name = "snd-soc-dummy",
5863 .ignore_suspend = 1,
5864 /* this dainlink has playback support */
5865 .ignore_pmdown_time = 1,
5866 .id = MSM_FRONTEND_DAI_MULTIMEDIA1
5867 },
5868 {
5869 .name = MSM_DAILINK_NAME(Media2),
5870 .stream_name = "MultiMedia2",
5871 .cpu_dai_name = "MultiMedia2",
5872 .platform_name = "msm-pcm-dsp.0",
5873 .dynamic = 1,
5874 .dpcm_playback = 1,
5875 .dpcm_capture = 1,
5876 .codec_dai_name = "snd-soc-dummy-dai",
5877 .codec_name = "snd-soc-dummy",
5878 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5879 SND_SOC_DPCM_TRIGGER_POST},
5880 .ignore_suspend = 1,
5881 /* this dainlink has playback support */
5882 .ignore_pmdown_time = 1,
5883 .id = MSM_FRONTEND_DAI_MULTIMEDIA2,
5884 },
5885 {
5886 .name = "VoiceMMode1",
5887 .stream_name = "VoiceMMode1",
5888 .cpu_dai_name = "VoiceMMode1",
5889 .platform_name = "msm-pcm-voice",
5890 .dynamic = 1,
5891 .dpcm_playback = 1,
5892 .dpcm_capture = 1,
5893 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5894 SND_SOC_DPCM_TRIGGER_POST},
5895 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5896 .ignore_suspend = 1,
5897 .ignore_pmdown_time = 1,
5898 .codec_dai_name = "snd-soc-dummy-dai",
5899 .codec_name = "snd-soc-dummy",
5900 .id = MSM_FRONTEND_DAI_VOICEMMODE1,
5901 },
5902 {
5903 .name = "MSM VoIP",
5904 .stream_name = "VoIP",
5905 .cpu_dai_name = "VoIP",
5906 .platform_name = "msm-voip-dsp",
5907 .dynamic = 1,
5908 .dpcm_playback = 1,
5909 .dpcm_capture = 1,
5910 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5911 SND_SOC_DPCM_TRIGGER_POST},
5912 .codec_dai_name = "snd-soc-dummy-dai",
5913 .codec_name = "snd-soc-dummy",
5914 .ignore_suspend = 1,
5915 /* this dainlink has playback support */
5916 .ignore_pmdown_time = 1,
5917 .id = MSM_FRONTEND_DAI_VOIP,
5918 },
5919 {
5920 .name = MSM_DAILINK_NAME(ULL),
5921 .stream_name = "MultiMedia3",
5922 .cpu_dai_name = "MultiMedia3",
5923 .platform_name = "msm-pcm-dsp.2",
5924 .dynamic = 1,
5925 .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
5926 .dpcm_playback = 1,
5927 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5928 SND_SOC_DPCM_TRIGGER_POST},
5929 .codec_dai_name = "snd-soc-dummy-dai",
5930 .codec_name = "snd-soc-dummy",
5931 .ignore_suspend = 1,
5932 /* this dainlink has playback support */
5933 .ignore_pmdown_time = 1,
5934 .id = MSM_FRONTEND_DAI_MULTIMEDIA3,
5935 },
5936 /* Hostless PCM purpose */
5937 {
5938 .name = "SLIMBUS_0 Hostless",
5939 .stream_name = "SLIMBUS_0 Hostless",
5940 .cpu_dai_name = "SLIMBUS0_HOSTLESS",
5941 .platform_name = "msm-pcm-hostless",
5942 .dynamic = 1,
5943 .dpcm_playback = 1,
5944 .dpcm_capture = 1,
5945 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5946 SND_SOC_DPCM_TRIGGER_POST},
5947 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5948 .ignore_suspend = 1,
5949 /* this dailink has playback support */
5950 .ignore_pmdown_time = 1,
5951 .codec_dai_name = "snd-soc-dummy-dai",
5952 .codec_name = "snd-soc-dummy",
5953 },
5954 {
5955 .name = "MSM AFE-PCM RX",
5956 .stream_name = "AFE-PROXY RX",
5957 .cpu_dai_name = "msm-dai-q6-dev.241",
5958 .codec_name = "msm-stub-codec.1",
5959 .codec_dai_name = "msm-stub-rx",
5960 .platform_name = "msm-pcm-afe",
5961 .dpcm_playback = 1,
5962 .ignore_suspend = 1,
5963 /* this dainlink has playback support */
5964 .ignore_pmdown_time = 1,
5965 },
5966 {
5967 .name = "MSM AFE-PCM TX",
5968 .stream_name = "AFE-PROXY TX",
5969 .cpu_dai_name = "msm-dai-q6-dev.240",
5970 .codec_name = "msm-stub-codec.1",
5971 .codec_dai_name = "msm-stub-tx",
5972 .platform_name = "msm-pcm-afe",
5973 .dpcm_capture = 1,
5974 .ignore_suspend = 1,
5975 },
5976 {
5977 .name = MSM_DAILINK_NAME(Compress1),
5978 .stream_name = "Compress1",
5979 .cpu_dai_name = "MultiMedia4",
5980 .platform_name = "msm-compress-dsp",
5981 .dynamic = 1,
5982 .async_ops = ASYNC_DPCM_SND_SOC_HW_PARAMS,
5983 .dpcm_playback = 1,
5984 .dpcm_capture = 1,
5985 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5986 SND_SOC_DPCM_TRIGGER_POST},
5987 .codec_dai_name = "snd-soc-dummy-dai",
5988 .codec_name = "snd-soc-dummy",
5989 .ignore_suspend = 1,
5990 .ignore_pmdown_time = 1,
5991 /* this dainlink has playback support */
5992 .id = MSM_FRONTEND_DAI_MULTIMEDIA4,
5993 },
5994 {
5995 .name = "AUXPCM Hostless",
5996 .stream_name = "AUXPCM Hostless",
5997 .cpu_dai_name = "AUXPCM_HOSTLESS",
5998 .platform_name = "msm-pcm-hostless",
5999 .dynamic = 1,
6000 .dpcm_playback = 1,
6001 .dpcm_capture = 1,
6002 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6003 SND_SOC_DPCM_TRIGGER_POST},
6004 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6005 .ignore_suspend = 1,
6006 /* this dainlink has playback support */
6007 .ignore_pmdown_time = 1,
6008 .codec_dai_name = "snd-soc-dummy-dai",
6009 .codec_name = "snd-soc-dummy",
6010 },
6011 {
6012 .name = "SLIMBUS_1 Hostless",
6013 .stream_name = "SLIMBUS_1 Hostless",
6014 .cpu_dai_name = "SLIMBUS1_HOSTLESS",
6015 .platform_name = "msm-pcm-hostless",
6016 .dynamic = 1,
6017 .dpcm_playback = 1,
6018 .dpcm_capture = 1,
6019 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6020 SND_SOC_DPCM_TRIGGER_POST},
6021 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6022 .ignore_suspend = 1,
6023 /* this dailink has playback support */
6024 .ignore_pmdown_time = 1,
6025 .codec_dai_name = "snd-soc-dummy-dai",
6026 .codec_name = "snd-soc-dummy",
6027 },
6028 {
6029 .name = "SLIMBUS_3 Hostless",
6030 .stream_name = "SLIMBUS_3 Hostless",
6031 .cpu_dai_name = "SLIMBUS3_HOSTLESS",
6032 .platform_name = "msm-pcm-hostless",
6033 .dynamic = 1,
6034 .dpcm_playback = 1,
6035 .dpcm_capture = 1,
6036 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6037 SND_SOC_DPCM_TRIGGER_POST},
6038 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6039 .ignore_suspend = 1,
6040 /* this dailink has playback support */
6041 .ignore_pmdown_time = 1,
6042 .codec_dai_name = "snd-soc-dummy-dai",
6043 .codec_name = "snd-soc-dummy",
6044 },
6045 {
6046 .name = "SLIMBUS_4 Hostless",
6047 .stream_name = "SLIMBUS_4 Hostless",
6048 .cpu_dai_name = "SLIMBUS4_HOSTLESS",
6049 .platform_name = "msm-pcm-hostless",
6050 .dynamic = 1,
6051 .dpcm_playback = 1,
6052 .dpcm_capture = 1,
6053 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6054 SND_SOC_DPCM_TRIGGER_POST},
6055 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6056 .ignore_suspend = 1,
6057 /* this dailink has playback support */
6058 .ignore_pmdown_time = 1,
6059 .codec_dai_name = "snd-soc-dummy-dai",
6060 .codec_name = "snd-soc-dummy",
6061 },
6062 {
6063 .name = MSM_DAILINK_NAME(LowLatency),
6064 .stream_name = "MultiMedia5",
6065 .cpu_dai_name = "MultiMedia5",
6066 .platform_name = "msm-pcm-dsp.1",
6067 .dynamic = 1,
6068 .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
6069 .dpcm_playback = 1,
6070 .dpcm_capture = 1,
6071 .codec_dai_name = "snd-soc-dummy-dai",
6072 .codec_name = "snd-soc-dummy",
6073 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6074 SND_SOC_DPCM_TRIGGER_POST},
6075 .ignore_suspend = 1,
6076 /* this dainlink has playback support */
6077 .ignore_pmdown_time = 1,
6078 .id = MSM_FRONTEND_DAI_MULTIMEDIA5,
6079 .ops = &msm_fe_qos_ops,
6080 },
6081 {
6082 .name = "Listen 1 Audio Service",
6083 .stream_name = "Listen 1 Audio Service",
6084 .cpu_dai_name = "LSM1",
6085 .platform_name = "msm-lsm-client",
6086 .dynamic = 1,
6087 .dpcm_capture = 1,
6088 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
6089 SND_SOC_DPCM_TRIGGER_POST },
6090 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6091 .ignore_suspend = 1,
6092 .codec_dai_name = "snd-soc-dummy-dai",
6093 .codec_name = "snd-soc-dummy",
6094 .id = MSM_FRONTEND_DAI_LSM1,
6095 },
6096 /* Multiple Tunnel instances */
6097 {
6098 .name = MSM_DAILINK_NAME(Compress2),
6099 .stream_name = "Compress2",
6100 .cpu_dai_name = "MultiMedia7",
6101 .platform_name = "msm-compress-dsp",
6102 .dynamic = 1,
6103 .dpcm_playback = 1,
6104 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6105 SND_SOC_DPCM_TRIGGER_POST},
6106 .codec_dai_name = "snd-soc-dummy-dai",
6107 .codec_name = "snd-soc-dummy",
6108 .ignore_suspend = 1,
6109 .ignore_pmdown_time = 1,
6110 /* this dainlink has playback support */
6111 .id = MSM_FRONTEND_DAI_MULTIMEDIA7,
6112 },
6113 {
6114 .name = MSM_DAILINK_NAME(MultiMedia10),
6115 .stream_name = "MultiMedia10",
6116 .cpu_dai_name = "MultiMedia10",
6117 .platform_name = "msm-pcm-dsp.1",
6118 .dynamic = 1,
6119 .dpcm_playback = 1,
6120 .dpcm_capture = 1,
6121 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6122 SND_SOC_DPCM_TRIGGER_POST},
6123 .codec_dai_name = "snd-soc-dummy-dai",
6124 .codec_name = "snd-soc-dummy",
6125 .ignore_suspend = 1,
6126 .ignore_pmdown_time = 1,
6127 /* this dainlink has playback support */
6128 .id = MSM_FRONTEND_DAI_MULTIMEDIA10,
6129 },
6130 {
6131 .name = MSM_DAILINK_NAME(ULL_NOIRQ),
6132 .stream_name = "MM_NOIRQ",
6133 .cpu_dai_name = "MultiMedia8",
6134 .platform_name = "msm-pcm-dsp-noirq",
6135 .dynamic = 1,
6136 .dpcm_playback = 1,
6137 .dpcm_capture = 1,
6138 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6139 SND_SOC_DPCM_TRIGGER_POST},
6140 .codec_dai_name = "snd-soc-dummy-dai",
6141 .codec_name = "snd-soc-dummy",
6142 .ignore_suspend = 1,
6143 .ignore_pmdown_time = 1,
6144 /* this dainlink has playback support */
6145 .id = MSM_FRONTEND_DAI_MULTIMEDIA8,
6146 .ops = &msm_fe_qos_ops,
6147 },
6148 /* HDMI Hostless */
6149 {
6150 .name = "HDMI_RX_HOSTLESS",
6151 .stream_name = "HDMI_RX_HOSTLESS",
6152 .cpu_dai_name = "HDMI_HOSTLESS",
6153 .platform_name = "msm-pcm-hostless",
6154 .dynamic = 1,
6155 .dpcm_playback = 1,
6156 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6157 SND_SOC_DPCM_TRIGGER_POST},
6158 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6159 .ignore_suspend = 1,
6160 .ignore_pmdown_time = 1,
6161 .codec_dai_name = "snd-soc-dummy-dai",
6162 .codec_name = "snd-soc-dummy",
6163 },
6164 {
6165 .name = "VoiceMMode2",
6166 .stream_name = "VoiceMMode2",
6167 .cpu_dai_name = "VoiceMMode2",
6168 .platform_name = "msm-pcm-voice",
6169 .dynamic = 1,
6170 .dpcm_playback = 1,
6171 .dpcm_capture = 1,
6172 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6173 SND_SOC_DPCM_TRIGGER_POST},
6174 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6175 .ignore_suspend = 1,
6176 .ignore_pmdown_time = 1,
6177 .codec_dai_name = "snd-soc-dummy-dai",
6178 .codec_name = "snd-soc-dummy",
6179 .id = MSM_FRONTEND_DAI_VOICEMMODE2,
6180 },
6181 /* LSM FE */
6182 {
6183 .name = "Listen 2 Audio Service",
6184 .stream_name = "Listen 2 Audio Service",
6185 .cpu_dai_name = "LSM2",
6186 .platform_name = "msm-lsm-client",
6187 .dynamic = 1,
6188 .dpcm_capture = 1,
6189 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
6190 SND_SOC_DPCM_TRIGGER_POST },
6191 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6192 .ignore_suspend = 1,
6193 .codec_dai_name = "snd-soc-dummy-dai",
6194 .codec_name = "snd-soc-dummy",
6195 .id = MSM_FRONTEND_DAI_LSM2,
6196 },
6197 {
6198 .name = "Listen 3 Audio Service",
6199 .stream_name = "Listen 3 Audio Service",
6200 .cpu_dai_name = "LSM3",
6201 .platform_name = "msm-lsm-client",
6202 .dynamic = 1,
6203 .dpcm_capture = 1,
6204 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
6205 SND_SOC_DPCM_TRIGGER_POST },
6206 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6207 .ignore_suspend = 1,
6208 .codec_dai_name = "snd-soc-dummy-dai",
6209 .codec_name = "snd-soc-dummy",
6210 .id = MSM_FRONTEND_DAI_LSM3,
6211 },
6212 {
6213 .name = "Listen 4 Audio Service",
6214 .stream_name = "Listen 4 Audio Service",
6215 .cpu_dai_name = "LSM4",
6216 .platform_name = "msm-lsm-client",
6217 .dynamic = 1,
6218 .dpcm_capture = 1,
6219 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
6220 SND_SOC_DPCM_TRIGGER_POST },
6221 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6222 .ignore_suspend = 1,
6223 .codec_dai_name = "snd-soc-dummy-dai",
6224 .codec_name = "snd-soc-dummy",
6225 .id = MSM_FRONTEND_DAI_LSM4,
6226 },
6227 {
6228 .name = "Listen 5 Audio Service",
6229 .stream_name = "Listen 5 Audio Service",
6230 .cpu_dai_name = "LSM5",
6231 .platform_name = "msm-lsm-client",
6232 .dynamic = 1,
6233 .dpcm_capture = 1,
6234 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
6235 SND_SOC_DPCM_TRIGGER_POST },
6236 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6237 .ignore_suspend = 1,
6238 .codec_dai_name = "snd-soc-dummy-dai",
6239 .codec_name = "snd-soc-dummy",
6240 .id = MSM_FRONTEND_DAI_LSM5,
6241 },
6242 {
6243 .name = "Listen 6 Audio Service",
6244 .stream_name = "Listen 6 Audio Service",
6245 .cpu_dai_name = "LSM6",
6246 .platform_name = "msm-lsm-client",
6247 .dynamic = 1,
6248 .dpcm_capture = 1,
6249 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
6250 SND_SOC_DPCM_TRIGGER_POST },
6251 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6252 .ignore_suspend = 1,
6253 .codec_dai_name = "snd-soc-dummy-dai",
6254 .codec_name = "snd-soc-dummy",
6255 .id = MSM_FRONTEND_DAI_LSM6,
6256 },
6257 {
6258 .name = "Listen 7 Audio Service",
6259 .stream_name = "Listen 7 Audio Service",
6260 .cpu_dai_name = "LSM7",
6261 .platform_name = "msm-lsm-client",
6262 .dynamic = 1,
6263 .dpcm_capture = 1,
6264 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
6265 SND_SOC_DPCM_TRIGGER_POST },
6266 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6267 .ignore_suspend = 1,
6268 .codec_dai_name = "snd-soc-dummy-dai",
6269 .codec_name = "snd-soc-dummy",
6270 .id = MSM_FRONTEND_DAI_LSM7,
6271 },
6272 {
6273 .name = "Listen 8 Audio Service",
6274 .stream_name = "Listen 8 Audio Service",
6275 .cpu_dai_name = "LSM8",
6276 .platform_name = "msm-lsm-client",
6277 .dynamic = 1,
6278 .dpcm_capture = 1,
6279 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
6280 SND_SOC_DPCM_TRIGGER_POST },
6281 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6282 .ignore_suspend = 1,
6283 .codec_dai_name = "snd-soc-dummy-dai",
6284 .codec_name = "snd-soc-dummy",
6285 .id = MSM_FRONTEND_DAI_LSM8,
6286 },
6287 {
6288 .name = MSM_DAILINK_NAME(Media9),
6289 .stream_name = "MultiMedia9",
6290 .cpu_dai_name = "MultiMedia9",
6291 .platform_name = "msm-pcm-dsp.0",
6292 .dynamic = 1,
6293 .dpcm_playback = 1,
6294 .dpcm_capture = 1,
6295 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6296 SND_SOC_DPCM_TRIGGER_POST},
6297 .codec_dai_name = "snd-soc-dummy-dai",
6298 .codec_name = "snd-soc-dummy",
6299 .ignore_suspend = 1,
6300 /* this dainlink has playback support */
6301 .ignore_pmdown_time = 1,
6302 .id = MSM_FRONTEND_DAI_MULTIMEDIA9,
6303 },
6304 {
6305 .name = MSM_DAILINK_NAME(Compress4),
6306 .stream_name = "Compress4",
6307 .cpu_dai_name = "MultiMedia11",
6308 .platform_name = "msm-compress-dsp",
6309 .dynamic = 1,
6310 .dpcm_playback = 1,
6311 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6312 SND_SOC_DPCM_TRIGGER_POST},
6313 .codec_dai_name = "snd-soc-dummy-dai",
6314 .codec_name = "snd-soc-dummy",
6315 .ignore_suspend = 1,
6316 .ignore_pmdown_time = 1,
6317 /* this dainlink has playback support */
6318 .id = MSM_FRONTEND_DAI_MULTIMEDIA11,
6319 },
6320 {
6321 .name = MSM_DAILINK_NAME(Compress5),
6322 .stream_name = "Compress5",
6323 .cpu_dai_name = "MultiMedia12",
6324 .platform_name = "msm-compress-dsp",
6325 .dynamic = 1,
6326 .dpcm_playback = 1,
6327 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6328 SND_SOC_DPCM_TRIGGER_POST},
6329 .codec_dai_name = "snd-soc-dummy-dai",
6330 .codec_name = "snd-soc-dummy",
6331 .ignore_suspend = 1,
6332 .ignore_pmdown_time = 1,
6333 /* this dainlink has playback support */
6334 .id = MSM_FRONTEND_DAI_MULTIMEDIA12,
6335 },
6336 {
6337 .name = MSM_DAILINK_NAME(Compress6),
6338 .stream_name = "Compress6",
6339 .cpu_dai_name = "MultiMedia13",
6340 .platform_name = "msm-compress-dsp",
6341 .dynamic = 1,
6342 .dpcm_playback = 1,
6343 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6344 SND_SOC_DPCM_TRIGGER_POST},
6345 .codec_dai_name = "snd-soc-dummy-dai",
6346 .codec_name = "snd-soc-dummy",
6347 .ignore_suspend = 1,
6348 .ignore_pmdown_time = 1,
6349 /* this dainlink has playback support */
6350 .id = MSM_FRONTEND_DAI_MULTIMEDIA13,
6351 },
6352 {
6353 .name = MSM_DAILINK_NAME(Compress7),
6354 .stream_name = "Compress7",
6355 .cpu_dai_name = "MultiMedia14",
6356 .platform_name = "msm-compress-dsp",
6357 .dynamic = 1,
6358 .dpcm_playback = 1,
6359 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6360 SND_SOC_DPCM_TRIGGER_POST},
6361 .codec_dai_name = "snd-soc-dummy-dai",
6362 .codec_name = "snd-soc-dummy",
6363 .ignore_suspend = 1,
6364 .ignore_pmdown_time = 1,
6365 /* this dainlink has playback support */
6366 .id = MSM_FRONTEND_DAI_MULTIMEDIA14,
6367 },
6368 {
6369 .name = MSM_DAILINK_NAME(Compress8),
6370 .stream_name = "Compress8",
6371 .cpu_dai_name = "MultiMedia15",
6372 .platform_name = "msm-compress-dsp",
6373 .dynamic = 1,
6374 .dpcm_playback = 1,
6375 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6376 SND_SOC_DPCM_TRIGGER_POST},
6377 .codec_dai_name = "snd-soc-dummy-dai",
6378 .codec_name = "snd-soc-dummy",
6379 .ignore_suspend = 1,
6380 .ignore_pmdown_time = 1,
6381 /* this dainlink has playback support */
6382 .id = MSM_FRONTEND_DAI_MULTIMEDIA15,
6383 },
6384 {
6385 .name = MSM_DAILINK_NAME(ULL_NOIRQ_2),
6386 .stream_name = "MM_NOIRQ_2",
6387 .cpu_dai_name = "MultiMedia16",
6388 .platform_name = "msm-pcm-dsp-noirq",
6389 .dynamic = 1,
6390 .dpcm_playback = 1,
6391 .dpcm_capture = 1,
6392 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6393 SND_SOC_DPCM_TRIGGER_POST},
6394 .codec_dai_name = "snd-soc-dummy-dai",
6395 .codec_name = "snd-soc-dummy",
6396 .ignore_suspend = 1,
6397 .ignore_pmdown_time = 1,
6398 /* this dainlink has playback support */
6399 .id = MSM_FRONTEND_DAI_MULTIMEDIA16,
6400 },
6401 {
6402 .name = "SLIMBUS_8 Hostless",
6403 .stream_name = "SLIMBUS8_HOSTLESS Capture",
6404 .cpu_dai_name = "SLIMBUS8_HOSTLESS",
6405 .platform_name = "msm-pcm-hostless",
6406 .dynamic = 1,
6407 .dpcm_capture = 1,
6408 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6409 SND_SOC_DPCM_TRIGGER_POST},
6410 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6411 .ignore_suspend = 1,
6412 .codec_dai_name = "snd-soc-dummy-dai",
6413 .codec_name = "snd-soc-dummy",
6414 },
6415};
6416
6417
6418static struct snd_soc_dai_link msm_tavil_fe_dai_links[] = {
6419 {
6420 .name = LPASS_BE_SLIMBUS_4_TX,
6421 .stream_name = "Slimbus4 Capture",
6422 .cpu_dai_name = "msm-dai-q6-dev.16393",
6423 .platform_name = "msm-pcm-hostless",
6424 .codec_name = "tavil_codec",
6425 .codec_dai_name = "tavil_vifeedback",
6426 .id = MSM_BACKEND_DAI_SLIMBUS_4_TX,
6427 .be_hw_params_fixup = msm_be_hw_params_fixup,
6428 .ops = &msm_be_ops,
6429 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6430 .ignore_suspend = 1,
6431 },
6432 /* Ultrasound RX DAI Link */
6433 {
6434 .name = "SLIMBUS_2 Hostless Playback",
6435 .stream_name = "SLIMBUS_2 Hostless Playback",
6436 .cpu_dai_name = "msm-dai-q6-dev.16388",
6437 .platform_name = "msm-pcm-hostless",
6438 .codec_name = "tavil_codec",
6439 .codec_dai_name = "tavil_rx2",
6440 .ignore_suspend = 1,
6441 .ignore_pmdown_time = 1,
6442 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6443 .ops = &msm_slimbus_2_be_ops,
6444 },
6445 /* Ultrasound TX DAI Link */
6446 {
6447 .name = "SLIMBUS_2 Hostless Capture",
6448 .stream_name = "SLIMBUS_2 Hostless Capture",
6449 .cpu_dai_name = "msm-dai-q6-dev.16389",
6450 .platform_name = "msm-pcm-hostless",
6451 .codec_name = "tavil_codec",
6452 .codec_dai_name = "tavil_tx2",
6453 .ignore_suspend = 1,
6454 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6455 .ops = &msm_slimbus_2_be_ops,
6456 },
6457};
6458
6459static struct snd_soc_dai_link msm_bolero_fe_dai_links[] = {
6460 {
6461 .name = LPASS_BE_WSA_CDC_DMA_TX_0,
6462 .stream_name = "WSA CDC DMA0 Capture",
6463 .cpu_dai_name = "msm-dai-cdc-dma-dev.45057",
6464 .platform_name = "msm-pcm-hostless",
6465 .codec_name = "bolero_codec",
6466 .codec_dai_name = "wsa_macro_vifeedback",
6467 .id = MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0,
6468 .be_hw_params_fixup = msm_be_hw_params_fixup,
6469 .ignore_suspend = 1,
6470 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6471 .ops = &msm_cdc_dma_be_ops,
6472 },
6473};
6474
6475static struct snd_soc_dai_link msm_common_misc_fe_dai_links[] = {
6476 {
6477 .name = MSM_DAILINK_NAME(ASM Loopback),
6478 .stream_name = "MultiMedia6",
6479 .cpu_dai_name = "MultiMedia6",
6480 .platform_name = "msm-pcm-loopback",
6481 .dynamic = 1,
6482 .dpcm_playback = 1,
6483 .dpcm_capture = 1,
6484 .codec_dai_name = "snd-soc-dummy-dai",
6485 .codec_name = "snd-soc-dummy",
6486 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6487 SND_SOC_DPCM_TRIGGER_POST},
6488 .ignore_suspend = 1,
6489 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6490 .ignore_pmdown_time = 1,
6491 .id = MSM_FRONTEND_DAI_MULTIMEDIA6,
6492 },
6493 {
6494 .name = "USB Audio Hostless",
6495 .stream_name = "USB Audio Hostless",
6496 .cpu_dai_name = "USBAUDIO_HOSTLESS",
6497 .platform_name = "msm-pcm-hostless",
6498 .dynamic = 1,
6499 .dpcm_playback = 1,
6500 .dpcm_capture = 1,
6501 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6502 SND_SOC_DPCM_TRIGGER_POST},
6503 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6504 .ignore_suspend = 1,
6505 .ignore_pmdown_time = 1,
6506 .codec_dai_name = "snd-soc-dummy-dai",
6507 .codec_name = "snd-soc-dummy",
6508 },
6509};
6510
6511static struct snd_soc_dai_link msm_common_be_dai_links[] = {
6512 /* Backend AFE DAI Links */
6513 {
6514 .name = LPASS_BE_AFE_PCM_RX,
6515 .stream_name = "AFE Playback",
6516 .cpu_dai_name = "msm-dai-q6-dev.224",
6517 .platform_name = "msm-pcm-routing",
6518 .codec_name = "msm-stub-codec.1",
6519 .codec_dai_name = "msm-stub-rx",
6520 .no_pcm = 1,
6521 .dpcm_playback = 1,
6522 .id = MSM_BACKEND_DAI_AFE_PCM_RX,
6523 .be_hw_params_fixup = msm_be_hw_params_fixup,
6524 /* this dainlink has playback support */
6525 .ignore_pmdown_time = 1,
6526 .ignore_suspend = 1,
6527 },
6528 {
6529 .name = LPASS_BE_AFE_PCM_TX,
6530 .stream_name = "AFE Capture",
6531 .cpu_dai_name = "msm-dai-q6-dev.225",
6532 .platform_name = "msm-pcm-routing",
6533 .codec_name = "msm-stub-codec.1",
6534 .codec_dai_name = "msm-stub-tx",
6535 .no_pcm = 1,
6536 .dpcm_capture = 1,
6537 .id = MSM_BACKEND_DAI_AFE_PCM_TX,
6538 .be_hw_params_fixup = msm_be_hw_params_fixup,
6539 .ignore_suspend = 1,
6540 },
6541 /* Incall Record Uplink BACK END DAI Link */
6542 {
6543 .name = LPASS_BE_INCALL_RECORD_TX,
6544 .stream_name = "Voice Uplink Capture",
6545 .cpu_dai_name = "msm-dai-q6-dev.32772",
6546 .platform_name = "msm-pcm-routing",
6547 .codec_name = "msm-stub-codec.1",
6548 .codec_dai_name = "msm-stub-tx",
6549 .no_pcm = 1,
6550 .dpcm_capture = 1,
6551 .id = MSM_BACKEND_DAI_INCALL_RECORD_TX,
6552 .be_hw_params_fixup = msm_be_hw_params_fixup,
6553 .ignore_suspend = 1,
6554 },
6555 /* Incall Record Downlink BACK END DAI Link */
6556 {
6557 .name = LPASS_BE_INCALL_RECORD_RX,
6558 .stream_name = "Voice Downlink Capture",
6559 .cpu_dai_name = "msm-dai-q6-dev.32771",
6560 .platform_name = "msm-pcm-routing",
6561 .codec_name = "msm-stub-codec.1",
6562 .codec_dai_name = "msm-stub-tx",
6563 .no_pcm = 1,
6564 .dpcm_capture = 1,
6565 .id = MSM_BACKEND_DAI_INCALL_RECORD_RX,
6566 .be_hw_params_fixup = msm_be_hw_params_fixup,
6567 .ignore_suspend = 1,
6568 },
6569 /* Incall Music BACK END DAI Link */
6570 {
6571 .name = LPASS_BE_VOICE_PLAYBACK_TX,
6572 .stream_name = "Voice Farend Playback",
6573 .cpu_dai_name = "msm-dai-q6-dev.32773",
6574 .platform_name = "msm-pcm-routing",
6575 .codec_name = "msm-stub-codec.1",
6576 .codec_dai_name = "msm-stub-rx",
6577 .no_pcm = 1,
6578 .dpcm_playback = 1,
6579 .id = MSM_BACKEND_DAI_VOICE_PLAYBACK_TX,
6580 .be_hw_params_fixup = msm_be_hw_params_fixup,
6581 .ignore_suspend = 1,
6582 .ignore_pmdown_time = 1,
6583 },
6584 /* Incall Music 2 BACK END DAI Link */
6585 {
6586 .name = LPASS_BE_VOICE2_PLAYBACK_TX,
6587 .stream_name = "Voice2 Farend Playback",
6588 .cpu_dai_name = "msm-dai-q6-dev.32770",
6589 .platform_name = "msm-pcm-routing",
6590 .codec_name = "msm-stub-codec.1",
6591 .codec_dai_name = "msm-stub-rx",
6592 .no_pcm = 1,
6593 .dpcm_playback = 1,
6594 .id = MSM_BACKEND_DAI_VOICE2_PLAYBACK_TX,
6595 .be_hw_params_fixup = msm_be_hw_params_fixup,
6596 .ignore_suspend = 1,
6597 .ignore_pmdown_time = 1,
6598 },
6599 {
6600 .name = LPASS_BE_USB_AUDIO_RX,
6601 .stream_name = "USB Audio Playback",
6602 .cpu_dai_name = "msm-dai-q6-dev.28672",
6603 .platform_name = "msm-pcm-routing",
6604 .codec_name = "msm-stub-codec.1",
6605 .codec_dai_name = "msm-stub-rx",
6606 .no_pcm = 1,
6607 .dpcm_playback = 1,
6608 .id = MSM_BACKEND_DAI_USB_RX,
6609 .be_hw_params_fixup = msm_be_hw_params_fixup,
6610 .ignore_pmdown_time = 1,
6611 .ignore_suspend = 1,
6612 },
6613 {
6614 .name = LPASS_BE_USB_AUDIO_TX,
6615 .stream_name = "USB Audio Capture",
6616 .cpu_dai_name = "msm-dai-q6-dev.28673",
6617 .platform_name = "msm-pcm-routing",
6618 .codec_name = "msm-stub-codec.1",
6619 .codec_dai_name = "msm-stub-tx",
6620 .no_pcm = 1,
6621 .dpcm_capture = 1,
6622 .id = MSM_BACKEND_DAI_USB_TX,
6623 .be_hw_params_fixup = msm_be_hw_params_fixup,
6624 .ignore_suspend = 1,
6625 },
6626 {
6627 .name = LPASS_BE_PRI_TDM_RX_0,
6628 .stream_name = "Primary TDM0 Playback",
6629 .cpu_dai_name = "msm-dai-q6-tdm.36864",
6630 .platform_name = "msm-pcm-routing",
6631 .codec_name = "msm-stub-codec.1",
6632 .codec_dai_name = "msm-stub-rx",
6633 .no_pcm = 1,
6634 .dpcm_playback = 1,
6635 .id = MSM_BACKEND_DAI_PRI_TDM_RX_0,
6636 .be_hw_params_fixup = msm_be_hw_params_fixup,
6637 .ops = &sm6150_tdm_be_ops,
6638 .ignore_suspend = 1,
6639 .ignore_pmdown_time = 1,
6640 },
6641 {
6642 .name = LPASS_BE_PRI_TDM_TX_0,
6643 .stream_name = "Primary TDM0 Capture",
6644 .cpu_dai_name = "msm-dai-q6-tdm.36865",
6645 .platform_name = "msm-pcm-routing",
6646 .codec_name = "msm-stub-codec.1",
6647 .codec_dai_name = "msm-stub-tx",
6648 .no_pcm = 1,
6649 .dpcm_capture = 1,
6650 .id = MSM_BACKEND_DAI_PRI_TDM_TX_0,
6651 .be_hw_params_fixup = msm_be_hw_params_fixup,
6652 .ops = &sm6150_tdm_be_ops,
6653 .ignore_suspend = 1,
6654 },
6655 {
6656 .name = LPASS_BE_SEC_TDM_RX_0,
6657 .stream_name = "Secondary TDM0 Playback",
6658 .cpu_dai_name = "msm-dai-q6-tdm.36880",
6659 .platform_name = "msm-pcm-routing",
6660 .codec_name = "msm-stub-codec.1",
6661 .codec_dai_name = "msm-stub-rx",
6662 .no_pcm = 1,
6663 .dpcm_playback = 1,
6664 .id = MSM_BACKEND_DAI_SEC_TDM_RX_0,
6665 .be_hw_params_fixup = msm_be_hw_params_fixup,
6666 .ops = &sm6150_tdm_be_ops,
6667 .ignore_suspend = 1,
6668 .ignore_pmdown_time = 1,
6669 },
6670 {
6671 .name = LPASS_BE_SEC_TDM_TX_0,
6672 .stream_name = "Secondary TDM0 Capture",
6673 .cpu_dai_name = "msm-dai-q6-tdm.36881",
6674 .platform_name = "msm-pcm-routing",
6675 .codec_name = "msm-stub-codec.1",
6676 .codec_dai_name = "msm-stub-tx",
6677 .no_pcm = 1,
6678 .dpcm_capture = 1,
6679 .id = MSM_BACKEND_DAI_SEC_TDM_TX_0,
6680 .be_hw_params_fixup = msm_be_hw_params_fixup,
6681 .ops = &sm6150_tdm_be_ops,
6682 .ignore_suspend = 1,
6683 },
6684 {
6685 .name = LPASS_BE_TERT_TDM_RX_0,
6686 .stream_name = "Tertiary TDM0 Playback",
6687 .cpu_dai_name = "msm-dai-q6-tdm.36896",
6688 .platform_name = "msm-pcm-routing",
6689 .codec_name = "msm-stub-codec.1",
6690 .codec_dai_name = "msm-stub-rx",
6691 .no_pcm = 1,
6692 .dpcm_playback = 1,
6693 .id = MSM_BACKEND_DAI_TERT_TDM_RX_0,
6694 .be_hw_params_fixup = msm_be_hw_params_fixup,
6695 .ops = &sm6150_tdm_be_ops,
6696 .ignore_suspend = 1,
6697 .ignore_pmdown_time = 1,
6698 },
6699 {
6700 .name = LPASS_BE_TERT_TDM_TX_0,
6701 .stream_name = "Tertiary TDM0 Capture",
6702 .cpu_dai_name = "msm-dai-q6-tdm.36897",
6703 .platform_name = "msm-pcm-routing",
6704 .codec_name = "msm-stub-codec.1",
6705 .codec_dai_name = "msm-stub-tx",
6706 .no_pcm = 1,
6707 .dpcm_capture = 1,
6708 .id = MSM_BACKEND_DAI_TERT_TDM_TX_0,
6709 .be_hw_params_fixup = msm_be_hw_params_fixup,
6710 .ops = &sm6150_tdm_be_ops,
6711 .ignore_suspend = 1,
6712 },
6713 {
6714 .name = LPASS_BE_QUAT_TDM_RX_0,
6715 .stream_name = "Quaternary TDM0 Playback",
6716 .cpu_dai_name = "msm-dai-q6-tdm.36912",
6717 .platform_name = "msm-pcm-routing",
6718 .codec_name = "msm-stub-codec.1",
6719 .codec_dai_name = "msm-stub-rx",
6720 .no_pcm = 1,
6721 .dpcm_playback = 1,
6722 .id = MSM_BACKEND_DAI_QUAT_TDM_RX_0,
6723 .be_hw_params_fixup = msm_tdm_be_hw_params_fixup,
6724 .ops = &sm6150_tdm_be_ops,
6725 .ignore_suspend = 1,
6726 .ignore_pmdown_time = 1,
6727 },
6728 {
6729 .name = LPASS_BE_QUAT_TDM_TX_0,
6730 .stream_name = "Quaternary TDM0 Capture",
6731 .cpu_dai_name = "msm-dai-q6-tdm.36913",
6732 .platform_name = "msm-pcm-routing",
6733 .codec_name = "msm-stub-codec.1",
6734 .codec_dai_name = "msm-stub-tx",
6735 .no_pcm = 1,
6736 .dpcm_capture = 1,
6737 .id = MSM_BACKEND_DAI_QUAT_TDM_TX_0,
6738 .be_hw_params_fixup = msm_be_hw_params_fixup,
6739 .ops = &sm6150_tdm_be_ops,
6740 .ignore_suspend = 1,
6741 },
6742};
6743
6744static struct snd_soc_dai_link msm_tavil_be_dai_links[] = {
6745 {
6746 .name = LPASS_BE_SLIMBUS_0_RX,
6747 .stream_name = "Slimbus Playback",
6748 .cpu_dai_name = "msm-dai-q6-dev.16384",
6749 .platform_name = "msm-pcm-routing",
6750 .codec_name = "tavil_codec",
6751 .codec_dai_name = "tavil_rx1",
6752 .no_pcm = 1,
6753 .dpcm_playback = 1,
6754 .id = MSM_BACKEND_DAI_SLIMBUS_0_RX,
6755 .init = &msm_audrx_tavil_init,
6756 .be_hw_params_fixup = msm_be_hw_params_fixup,
6757 /* this dainlink has playback support */
6758 .ignore_pmdown_time = 1,
6759 .ignore_suspend = 1,
6760 .ops = &msm_be_ops,
6761 },
6762 {
6763 .name = LPASS_BE_SLIMBUS_0_TX,
6764 .stream_name = "Slimbus Capture",
6765 .cpu_dai_name = "msm-dai-q6-dev.16385",
6766 .platform_name = "msm-pcm-routing",
6767 .codec_name = "tavil_codec",
6768 .codec_dai_name = "tavil_tx1",
6769 .no_pcm = 1,
6770 .dpcm_capture = 1,
6771 .id = MSM_BACKEND_DAI_SLIMBUS_0_TX,
6772 .be_hw_params_fixup = msm_be_hw_params_fixup,
6773 .ignore_suspend = 1,
6774 .ops = &msm_be_ops,
6775 },
6776 {
6777 .name = LPASS_BE_SLIMBUS_1_RX,
6778 .stream_name = "Slimbus1 Playback",
6779 .cpu_dai_name = "msm-dai-q6-dev.16386",
6780 .platform_name = "msm-pcm-routing",
6781 .codec_name = "tavil_codec",
6782 .codec_dai_name = "tavil_rx1",
6783 .no_pcm = 1,
6784 .dpcm_playback = 1,
6785 .id = MSM_BACKEND_DAI_SLIMBUS_1_RX,
6786 .be_hw_params_fixup = msm_be_hw_params_fixup,
6787 .ops = &msm_be_ops,
6788 /* dai link has playback support */
6789 .ignore_pmdown_time = 1,
6790 .ignore_suspend = 1,
6791 },
6792 {
6793 .name = LPASS_BE_SLIMBUS_1_TX,
6794 .stream_name = "Slimbus1 Capture",
6795 .cpu_dai_name = "msm-dai-q6-dev.16387",
6796 .platform_name = "msm-pcm-routing",
6797 .codec_name = "tavil_codec",
6798 .codec_dai_name = "tavil_tx3",
6799 .no_pcm = 1,
6800 .dpcm_capture = 1,
6801 .id = MSM_BACKEND_DAI_SLIMBUS_1_TX,
6802 .be_hw_params_fixup = msm_be_hw_params_fixup,
6803 .ops = &msm_be_ops,
6804 .ignore_suspend = 1,
6805 },
6806 {
6807 .name = LPASS_BE_SLIMBUS_2_RX,
6808 .stream_name = "Slimbus2 Playback",
6809 .cpu_dai_name = "msm-dai-q6-dev.16388",
6810 .platform_name = "msm-pcm-routing",
6811 .codec_name = "tavil_codec",
6812 .codec_dai_name = "tavil_rx2",
6813 .no_pcm = 1,
6814 .dpcm_playback = 1,
6815 .id = MSM_BACKEND_DAI_SLIMBUS_2_RX,
6816 .be_hw_params_fixup = msm_be_hw_params_fixup,
6817 .ops = &msm_be_ops,
6818 .ignore_pmdown_time = 1,
6819 .ignore_suspend = 1,
6820 },
6821 {
6822 .name = LPASS_BE_SLIMBUS_3_RX,
6823 .stream_name = "Slimbus3 Playback",
6824 .cpu_dai_name = "msm-dai-q6-dev.16390",
6825 .platform_name = "msm-pcm-routing",
6826 .codec_name = "tavil_codec",
6827 .codec_dai_name = "tavil_rx1",
6828 .no_pcm = 1,
6829 .dpcm_playback = 1,
6830 .id = MSM_BACKEND_DAI_SLIMBUS_3_RX,
6831 .be_hw_params_fixup = msm_be_hw_params_fixup,
6832 .ops = &msm_be_ops,
6833 /* dai link has playback support */
6834 .ignore_pmdown_time = 1,
6835 .ignore_suspend = 1,
6836 },
6837 {
6838 .name = LPASS_BE_SLIMBUS_3_TX,
6839 .stream_name = "Slimbus3 Capture",
6840 .cpu_dai_name = "msm-dai-q6-dev.16391",
6841 .platform_name = "msm-pcm-routing",
6842 .codec_name = "tavil_codec",
6843 .codec_dai_name = "tavil_tx1",
6844 .no_pcm = 1,
6845 .dpcm_capture = 1,
6846 .id = MSM_BACKEND_DAI_SLIMBUS_3_TX,
6847 .be_hw_params_fixup = msm_be_hw_params_fixup,
6848 .ops = &msm_be_ops,
6849 .ignore_suspend = 1,
6850 },
6851 {
6852 .name = LPASS_BE_SLIMBUS_4_RX,
6853 .stream_name = "Slimbus4 Playback",
6854 .cpu_dai_name = "msm-dai-q6-dev.16392",
6855 .platform_name = "msm-pcm-routing",
6856 .codec_name = "tavil_codec",
6857 .codec_dai_name = "tavil_rx1",
6858 .no_pcm = 1,
6859 .dpcm_playback = 1,
6860 .id = MSM_BACKEND_DAI_SLIMBUS_4_RX,
6861 .be_hw_params_fixup = msm_be_hw_params_fixup,
6862 .ops = &msm_be_ops,
6863 /* dai link has playback support */
6864 .ignore_pmdown_time = 1,
6865 .ignore_suspend = 1,
6866 },
6867 {
6868 .name = LPASS_BE_SLIMBUS_5_RX,
6869 .stream_name = "Slimbus5 Playback",
6870 .cpu_dai_name = "msm-dai-q6-dev.16394",
6871 .platform_name = "msm-pcm-routing",
6872 .codec_name = "tavil_codec",
6873 .codec_dai_name = "tavil_rx3",
6874 .no_pcm = 1,
6875 .dpcm_playback = 1,
6876 .id = MSM_BACKEND_DAI_SLIMBUS_5_RX,
6877 .be_hw_params_fixup = msm_be_hw_params_fixup,
6878 .ops = &msm_be_ops,
6879 /* dai link has playback support */
6880 .ignore_pmdown_time = 1,
6881 .ignore_suspend = 1,
6882 },
6883 /* MAD BE */
6884 {
6885 .name = LPASS_BE_SLIMBUS_5_TX,
6886 .stream_name = "Slimbus5 Capture",
6887 .cpu_dai_name = "msm-dai-q6-dev.16395",
6888 .platform_name = "msm-pcm-routing",
6889 .codec_name = "tavil_codec",
6890 .codec_dai_name = "tavil_mad1",
6891 .no_pcm = 1,
6892 .dpcm_capture = 1,
6893 .id = MSM_BACKEND_DAI_SLIMBUS_5_TX,
6894 .be_hw_params_fixup = msm_be_hw_params_fixup,
6895 .ops = &msm_be_ops,
6896 .ignore_suspend = 1,
6897 },
6898 {
6899 .name = LPASS_BE_SLIMBUS_6_RX,
6900 .stream_name = "Slimbus6 Playback",
6901 .cpu_dai_name = "msm-dai-q6-dev.16396",
6902 .platform_name = "msm-pcm-routing",
6903 .codec_name = "tavil_codec",
6904 .codec_dai_name = "tavil_rx4",
6905 .no_pcm = 1,
6906 .dpcm_playback = 1,
6907 .id = MSM_BACKEND_DAI_SLIMBUS_6_RX,
6908 .be_hw_params_fixup = msm_be_hw_params_fixup,
6909 .ops = &msm_be_ops,
6910 /* dai link has playback support */
6911 .ignore_pmdown_time = 1,
6912 .ignore_suspend = 1,
6913 },
6914 /* Slimbus VI Recording */
6915 {
6916 .name = LPASS_BE_SLIMBUS_TX_VI,
6917 .stream_name = "Slimbus4 Capture",
6918 .cpu_dai_name = "msm-dai-q6-dev.16393",
6919 .platform_name = "msm-pcm-routing",
6920 .codec_name = "tavil_codec",
6921 .codec_dai_name = "tavil_vifeedback",
6922 .id = MSM_BACKEND_DAI_SLIMBUS_4_TX,
6923 .be_hw_params_fixup = msm_be_hw_params_fixup,
6924 .ops = &msm_be_ops,
6925 .ignore_suspend = 1,
6926 .no_pcm = 1,
6927 .dpcm_capture = 1,
6928 },
6929};
6930
6931static struct snd_soc_dai_link msm_wcn_be_dai_links[] = {
6932 {
6933 .name = LPASS_BE_SLIMBUS_7_RX,
6934 .stream_name = "Slimbus7 Playback",
6935 .cpu_dai_name = "msm-dai-q6-dev.16398",
6936 .platform_name = "msm-pcm-routing",
6937 .codec_name = "btfmslim_slave",
6938 /* BT codec driver determines capabilities based on
6939 * dai name, bt codecdai name should always contains
6940 * supported usecase information
6941 */
6942 .codec_dai_name = "btfm_bt_sco_a2dp_slim_rx",
6943 .no_pcm = 1,
6944 .dpcm_playback = 1,
6945 .id = MSM_BACKEND_DAI_SLIMBUS_7_RX,
6946 .be_hw_params_fixup = msm_be_hw_params_fixup,
6947 .ops = &msm_wcn_ops,
6948 /* dai link has playback support */
6949 .ignore_pmdown_time = 1,
6950 .ignore_suspend = 1,
6951 },
6952 {
6953 .name = LPASS_BE_SLIMBUS_7_TX,
6954 .stream_name = "Slimbus7 Capture",
6955 .cpu_dai_name = "msm-dai-q6-dev.16399",
6956 .platform_name = "msm-pcm-routing",
6957 .codec_name = "btfmslim_slave",
6958 .codec_dai_name = "btfm_bt_sco_slim_tx",
6959 .no_pcm = 1,
6960 .dpcm_capture = 1,
6961 .id = MSM_BACKEND_DAI_SLIMBUS_7_TX,
6962 .be_hw_params_fixup = msm_be_hw_params_fixup,
6963 .ops = &msm_wcn_ops,
6964 .ignore_suspend = 1,
6965 },
6966 {
6967 .name = LPASS_BE_SLIMBUS_8_TX,
6968 .stream_name = "Slimbus8 Capture",
6969 .cpu_dai_name = "msm-dai-q6-dev.16401",
6970 .platform_name = "msm-pcm-routing",
6971 .codec_name = "btfmslim_slave",
6972 .codec_dai_name = "btfm_fm_slim_tx",
6973 .no_pcm = 1,
6974 .dpcm_capture = 1,
6975 .id = MSM_BACKEND_DAI_SLIMBUS_8_TX,
6976 .be_hw_params_fixup = msm_be_hw_params_fixup,
6977 .init = &msm_wcn_init,
6978 .ops = &msm_wcn_ops,
6979 .ignore_suspend = 1,
6980 },
6981};
6982
6983static struct snd_soc_dai_link ext_disp_be_dai_link[] = {
6984 /* DISP PORT BACK END DAI Link */
6985 {
6986 .name = LPASS_BE_DISPLAY_PORT,
6987 .stream_name = "Display Port Playback",
6988 .cpu_dai_name = "msm-dai-q6-dp.24608",
6989 .platform_name = "msm-pcm-routing",
6990 .codec_name = "msm-ext-disp-audio-codec-rx",
6991 .codec_dai_name = "msm_dp_audio_codec_rx_dai",
6992 .no_pcm = 1,
6993 .dpcm_playback = 1,
6994 .id = MSM_BACKEND_DAI_DISPLAY_PORT_RX,
6995 .be_hw_params_fixup = msm_be_hw_params_fixup,
6996 .ignore_pmdown_time = 1,
6997 .ignore_suspend = 1,
6998 },
6999};
7000
7001static struct snd_soc_dai_link msm_mi2s_be_dai_links[] = {
7002 {
7003 .name = LPASS_BE_PRI_MI2S_RX,
7004 .stream_name = "Primary MI2S Playback",
7005 .cpu_dai_name = "msm-dai-q6-mi2s.0",
7006 .platform_name = "msm-pcm-routing",
7007 .codec_name = "msm-stub-codec.1",
7008 .codec_dai_name = "msm-stub-rx",
7009 .no_pcm = 1,
7010 .dpcm_playback = 1,
7011 .id = MSM_BACKEND_DAI_PRI_MI2S_RX,
7012 .be_hw_params_fixup = msm_be_hw_params_fixup,
7013 .ops = &msm_mi2s_be_ops,
7014 .ignore_suspend = 1,
7015 .ignore_pmdown_time = 1,
7016 },
7017 {
7018 .name = LPASS_BE_PRI_MI2S_TX,
7019 .stream_name = "Primary MI2S Capture",
7020 .cpu_dai_name = "msm-dai-q6-mi2s.0",
7021 .platform_name = "msm-pcm-routing",
7022 .codec_name = "msm-stub-codec.1",
7023 .codec_dai_name = "msm-stub-tx",
7024 .no_pcm = 1,
7025 .dpcm_capture = 1,
7026 .id = MSM_BACKEND_DAI_PRI_MI2S_TX,
7027 .be_hw_params_fixup = msm_be_hw_params_fixup,
7028 .ops = &msm_mi2s_be_ops,
7029 .ignore_suspend = 1,
7030 },
7031 {
7032 .name = LPASS_BE_SEC_MI2S_RX,
7033 .stream_name = "Secondary MI2S Playback",
7034 .cpu_dai_name = "msm-dai-q6-mi2s.1",
7035 .platform_name = "msm-pcm-routing",
7036 .codec_name = "msm-stub-codec.1",
7037 .codec_dai_name = "msm-stub-rx",
7038 .no_pcm = 1,
7039 .dpcm_playback = 1,
7040 .id = MSM_BACKEND_DAI_SECONDARY_MI2S_RX,
7041 .be_hw_params_fixup = msm_be_hw_params_fixup,
7042 .ops = &msm_mi2s_be_ops,
7043 .ignore_suspend = 1,
7044 .ignore_pmdown_time = 1,
7045 },
7046 {
7047 .name = LPASS_BE_SEC_MI2S_TX,
7048 .stream_name = "Secondary MI2S Capture",
7049 .cpu_dai_name = "msm-dai-q6-mi2s.1",
7050 .platform_name = "msm-pcm-routing",
7051 .codec_name = "msm-stub-codec.1",
7052 .codec_dai_name = "msm-stub-tx",
7053 .no_pcm = 1,
7054 .dpcm_capture = 1,
7055 .id = MSM_BACKEND_DAI_SECONDARY_MI2S_TX,
7056 .be_hw_params_fixup = msm_be_hw_params_fixup,
7057 .ops = &msm_mi2s_be_ops,
7058 .ignore_suspend = 1,
7059 },
7060 {
7061 .name = LPASS_BE_TERT_MI2S_RX,
7062 .stream_name = "Tertiary MI2S Playback",
7063 .cpu_dai_name = "msm-dai-q6-mi2s.2",
7064 .platform_name = "msm-pcm-routing",
7065 .codec_name = "msm-stub-codec.1",
7066 .codec_dai_name = "msm-stub-rx",
7067 .no_pcm = 1,
7068 .dpcm_playback = 1,
7069 .id = MSM_BACKEND_DAI_TERTIARY_MI2S_RX,
7070 .be_hw_params_fixup = msm_be_hw_params_fixup,
7071 .ops = &msm_mi2s_be_ops,
7072 .ignore_suspend = 1,
7073 .ignore_pmdown_time = 1,
7074 },
7075 {
7076 .name = LPASS_BE_TERT_MI2S_TX,
7077 .stream_name = "Tertiary MI2S Capture",
7078 .cpu_dai_name = "msm-dai-q6-mi2s.2",
7079 .platform_name = "msm-pcm-routing",
7080 .codec_name = "msm-stub-codec.1",
7081 .codec_dai_name = "msm-stub-tx",
7082 .no_pcm = 1,
7083 .dpcm_capture = 1,
7084 .id = MSM_BACKEND_DAI_TERTIARY_MI2S_TX,
7085 .be_hw_params_fixup = msm_be_hw_params_fixup,
7086 .ops = &msm_mi2s_be_ops,
7087 .ignore_suspend = 1,
7088 },
7089 {
7090 .name = LPASS_BE_QUAT_MI2S_RX,
7091 .stream_name = "Quaternary MI2S Playback",
7092 .cpu_dai_name = "msm-dai-q6-mi2s.3",
7093 .platform_name = "msm-pcm-routing",
7094 .codec_name = "msm-stub-codec.1",
7095 .codec_dai_name = "msm-stub-rx",
7096 .no_pcm = 1,
7097 .dpcm_playback = 1,
7098 .id = MSM_BACKEND_DAI_QUATERNARY_MI2S_RX,
7099 .be_hw_params_fixup = msm_be_hw_params_fixup,
7100 .ops = &msm_mi2s_be_ops,
7101 .ignore_suspend = 1,
7102 .ignore_pmdown_time = 1,
7103 },
7104 {
7105 .name = LPASS_BE_QUAT_MI2S_TX,
7106 .stream_name = "Quaternary MI2S Capture",
7107 .cpu_dai_name = "msm-dai-q6-mi2s.3",
7108 .platform_name = "msm-pcm-routing",
7109 .codec_name = "msm-stub-codec.1",
7110 .codec_dai_name = "msm-stub-tx",
7111 .no_pcm = 1,
7112 .dpcm_capture = 1,
7113 .id = MSM_BACKEND_DAI_QUATERNARY_MI2S_TX,
7114 .be_hw_params_fixup = msm_be_hw_params_fixup,
7115 .ops = &msm_mi2s_be_ops,
7116 .ignore_suspend = 1,
7117 },
7118 {
7119 .name = LPASS_BE_QUIN_MI2S_RX,
7120 .stream_name = "Quinary MI2S Playback",
7121 .cpu_dai_name = "msm-dai-q6-mi2s.4",
7122 .platform_name = "msm-pcm-routing",
7123 .codec_name = "msm-stub-codec.1",
7124 .codec_dai_name = "msm-stub-rx",
7125 .no_pcm = 1,
7126 .dpcm_playback = 1,
7127 .id = MSM_BACKEND_DAI_QUINARY_MI2S_RX,
7128 .be_hw_params_fixup = msm_be_hw_params_fixup,
7129 .ops = &msm_mi2s_be_ops,
7130 .ignore_suspend = 1,
7131 .ignore_pmdown_time = 1,
7132 },
7133 {
7134 .name = LPASS_BE_QUIN_MI2S_TX,
7135 .stream_name = "Quinary MI2S Capture",
7136 .cpu_dai_name = "msm-dai-q6-mi2s.4",
7137 .platform_name = "msm-pcm-routing",
7138 .codec_name = "msm-stub-codec.1",
7139 .codec_dai_name = "msm-stub-tx",
7140 .no_pcm = 1,
7141 .dpcm_capture = 1,
7142 .id = MSM_BACKEND_DAI_QUINARY_MI2S_TX,
7143 .be_hw_params_fixup = msm_be_hw_params_fixup,
7144 .ops = &msm_mi2s_be_ops,
7145 .ignore_suspend = 1,
7146 },
7147
7148};
7149
7150static struct snd_soc_dai_link msm_auxpcm_be_dai_links[] = {
7151 /* Primary AUX PCM Backend DAI Links */
7152 {
7153 .name = LPASS_BE_AUXPCM_RX,
7154 .stream_name = "AUX PCM Playback",
7155 .cpu_dai_name = "msm-dai-q6-auxpcm.1",
7156 .platform_name = "msm-pcm-routing",
7157 .codec_name = "msm-stub-codec.1",
7158 .codec_dai_name = "msm-stub-rx",
7159 .no_pcm = 1,
7160 .dpcm_playback = 1,
7161 .id = MSM_BACKEND_DAI_AUXPCM_RX,
7162 .be_hw_params_fixup = msm_be_hw_params_fixup,
7163 .ignore_pmdown_time = 1,
7164 .ignore_suspend = 1,
7165 },
7166 {
7167 .name = LPASS_BE_AUXPCM_TX,
7168 .stream_name = "AUX PCM Capture",
7169 .cpu_dai_name = "msm-dai-q6-auxpcm.1",
7170 .platform_name = "msm-pcm-routing",
7171 .codec_name = "msm-stub-codec.1",
7172 .codec_dai_name = "msm-stub-tx",
7173 .no_pcm = 1,
7174 .dpcm_capture = 1,
7175 .id = MSM_BACKEND_DAI_AUXPCM_TX,
7176 .be_hw_params_fixup = msm_be_hw_params_fixup,
7177 .ignore_suspend = 1,
7178 },
7179 /* Secondary AUX PCM Backend DAI Links */
7180 {
7181 .name = LPASS_BE_SEC_AUXPCM_RX,
7182 .stream_name = "Sec AUX PCM Playback",
7183 .cpu_dai_name = "msm-dai-q6-auxpcm.2",
7184 .platform_name = "msm-pcm-routing",
7185 .codec_name = "msm-stub-codec.1",
7186 .codec_dai_name = "msm-stub-rx",
7187 .no_pcm = 1,
7188 .dpcm_playback = 1,
7189 .id = MSM_BACKEND_DAI_SEC_AUXPCM_RX,
7190 .be_hw_params_fixup = msm_be_hw_params_fixup,
7191 .ignore_pmdown_time = 1,
7192 .ignore_suspend = 1,
7193 },
7194 {
7195 .name = LPASS_BE_SEC_AUXPCM_TX,
7196 .stream_name = "Sec AUX PCM Capture",
7197 .cpu_dai_name = "msm-dai-q6-auxpcm.2",
7198 .platform_name = "msm-pcm-routing",
7199 .codec_name = "msm-stub-codec.1",
7200 .codec_dai_name = "msm-stub-tx",
7201 .no_pcm = 1,
7202 .dpcm_capture = 1,
7203 .id = MSM_BACKEND_DAI_SEC_AUXPCM_TX,
7204 .be_hw_params_fixup = msm_be_hw_params_fixup,
7205 .ignore_suspend = 1,
7206 },
7207 /* Tertiary AUX PCM Backend DAI Links */
7208 {
7209 .name = LPASS_BE_TERT_AUXPCM_RX,
7210 .stream_name = "Tert AUX PCM Playback",
7211 .cpu_dai_name = "msm-dai-q6-auxpcm.3",
7212 .platform_name = "msm-pcm-routing",
7213 .codec_name = "msm-stub-codec.1",
7214 .codec_dai_name = "msm-stub-rx",
7215 .no_pcm = 1,
7216 .dpcm_playback = 1,
7217 .id = MSM_BACKEND_DAI_TERT_AUXPCM_RX,
7218 .be_hw_params_fixup = msm_be_hw_params_fixup,
7219 .ignore_suspend = 1,
7220 },
7221 {
7222 .name = LPASS_BE_TERT_AUXPCM_TX,
7223 .stream_name = "Tert AUX PCM Capture",
7224 .cpu_dai_name = "msm-dai-q6-auxpcm.3",
7225 .platform_name = "msm-pcm-routing",
7226 .codec_name = "msm-stub-codec.1",
7227 .codec_dai_name = "msm-stub-tx",
7228 .no_pcm = 1,
7229 .dpcm_capture = 1,
7230 .id = MSM_BACKEND_DAI_TERT_AUXPCM_TX,
7231 .be_hw_params_fixup = msm_be_hw_params_fixup,
7232 .ignore_suspend = 1,
7233 },
7234 /* Quaternary AUX PCM Backend DAI Links */
7235 {
7236 .name = LPASS_BE_QUAT_AUXPCM_RX,
7237 .stream_name = "Quat AUX PCM Playback",
7238 .cpu_dai_name = "msm-dai-q6-auxpcm.4",
7239 .platform_name = "msm-pcm-routing",
7240 .codec_name = "msm-stub-codec.1",
7241 .codec_dai_name = "msm-stub-rx",
7242 .no_pcm = 1,
7243 .dpcm_playback = 1,
7244 .id = MSM_BACKEND_DAI_QUAT_AUXPCM_RX,
7245 .be_hw_params_fixup = msm_be_hw_params_fixup,
7246 .ignore_pmdown_time = 1,
7247 .ignore_suspend = 1,
7248 },
7249 {
7250 .name = LPASS_BE_QUAT_AUXPCM_TX,
7251 .stream_name = "Quat AUX PCM Capture",
7252 .cpu_dai_name = "msm-dai-q6-auxpcm.4",
7253 .platform_name = "msm-pcm-routing",
7254 .codec_name = "msm-stub-codec.1",
7255 .codec_dai_name = "msm-stub-tx",
7256 .no_pcm = 1,
7257 .dpcm_capture = 1,
7258 .id = MSM_BACKEND_DAI_QUAT_AUXPCM_TX,
7259 .be_hw_params_fixup = msm_be_hw_params_fixup,
7260 .ignore_suspend = 1,
7261 },
7262 /* Quinary AUX PCM Backend DAI Links */
7263 {
7264 .name = LPASS_BE_QUIN_AUXPCM_RX,
7265 .stream_name = "Quin AUX PCM Playback",
7266 .cpu_dai_name = "msm-dai-q6-auxpcm.5",
7267 .platform_name = "msm-pcm-routing",
7268 .codec_name = "msm-stub-codec.1",
7269 .codec_dai_name = "msm-stub-rx",
7270 .no_pcm = 1,
7271 .dpcm_playback = 1,
7272 .id = MSM_BACKEND_DAI_QUIN_AUXPCM_RX,
7273 .be_hw_params_fixup = msm_be_hw_params_fixup,
7274 .ignore_pmdown_time = 1,
7275 .ignore_suspend = 1,
7276 },
7277 {
7278 .name = LPASS_BE_QUIN_AUXPCM_TX,
7279 .stream_name = "Quin AUX PCM Capture",
7280 .cpu_dai_name = "msm-dai-q6-auxpcm.5",
7281 .platform_name = "msm-pcm-routing",
7282 .codec_name = "msm-stub-codec.1",
7283 .codec_dai_name = "msm-stub-tx",
7284 .no_pcm = 1,
7285 .dpcm_capture = 1,
7286 .id = MSM_BACKEND_DAI_QUIN_AUXPCM_TX,
7287 .be_hw_params_fixup = msm_be_hw_params_fixup,
7288 .ignore_suspend = 1,
7289 },
7290};
7291
7292static struct snd_soc_dai_link msm_wsa_cdc_dma_be_dai_links[] = {
7293 /* WSA CDC DMA Backend DAI Links */
7294 {
7295 .name = LPASS_BE_WSA_CDC_DMA_RX_0,
7296 .stream_name = "WSA CDC DMA0 Playback",
7297 .cpu_dai_name = "msm-dai-cdc-dma-dev.45056",
7298 .platform_name = "msm-pcm-routing",
7299 .codec_name = "bolero_codec",
7300 .codec_dai_name = "wsa_macro_rx1",
7301 .no_pcm = 1,
7302 .dpcm_playback = 1,
7303 .init = &msm_int_audrx_init,
7304 .id = MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0,
7305 .be_hw_params_fixup = msm_be_hw_params_fixup,
7306 .ignore_pmdown_time = 1,
7307 .ignore_suspend = 1,
7308 .ops = &msm_cdc_dma_be_ops,
7309 },
7310 {
7311 .name = LPASS_BE_WSA_CDC_DMA_RX_1,
7312 .stream_name = "WSA CDC DMA1 Playback",
7313 .cpu_dai_name = "msm-dai-cdc-dma-dev.45058",
7314 .platform_name = "msm-pcm-routing",
7315 .codec_name = "bolero_codec",
7316 .codec_dai_name = "wsa_macro_rx_mix",
7317 .no_pcm = 1,
7318 .dpcm_playback = 1,
7319 .id = MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1,
7320 .be_hw_params_fixup = msm_be_hw_params_fixup,
7321 .ignore_pmdown_time = 1,
7322 .ignore_suspend = 1,
7323 .ops = &msm_cdc_dma_be_ops,
7324 },
7325 {
7326 .name = LPASS_BE_WSA_CDC_DMA_TX_1,
7327 .stream_name = "WSA CDC DMA1 Capture",
7328 .cpu_dai_name = "msm-dai-cdc-dma-dev.45059",
7329 .platform_name = "msm-pcm-routing",
7330 .codec_name = "bolero_codec",
7331 .codec_dai_name = "wsa_macro_echo",
7332 .no_pcm = 1,
7333 .dpcm_capture = 1,
7334 .id = MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1,
7335 .be_hw_params_fixup = msm_be_hw_params_fixup,
7336 .ignore_suspend = 1,
7337 .ops = &msm_cdc_dma_be_ops,
7338 },
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7339};
7340
7341static struct snd_soc_dai_link msm_rx_tx_cdc_dma_be_dai_links[] = {
7342 /* RX CDC DMA Backend DAI Links */
7343 {
7344 .name = LPASS_BE_RX_CDC_DMA_RX_0,
7345 .stream_name = "RX CDC DMA0 Playback",
Ramprasad Katkamf83acfb2018-08-11 23:28:57 +0530[diff] [blame]7346 .cpu_dai_name = "msm-dai-cdc-dma-dev.45104",
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7347 .platform_name = "msm-pcm-routing",
7348 .codec_name = "bolero_codec",
7349 .codec_dai_name = "rx_macro_rx1",
7350 .no_pcm = 1,
7351 .dpcm_playback = 1,
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7352 .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_0,
7353 .be_hw_params_fixup = msm_be_hw_params_fixup,
7354 .ignore_pmdown_time = 1,
7355 .ignore_suspend = 1,
7356 .ops = &msm_cdc_dma_be_ops,
7357 },
7358 {
7359 .name = LPASS_BE_RX_CDC_DMA_RX_1,
7360 .stream_name = "RX CDC DMA1 Playback",
Ramprasad Katkamf83acfb2018-08-11 23:28:57 +0530[diff] [blame]7361 .cpu_dai_name = "msm-dai-cdc-dma-dev.45106",
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7362 .platform_name = "msm-pcm-routing",
7363 .codec_name = "bolero_codec",
7364 .codec_dai_name = "rx_macro_rx2",
7365 .no_pcm = 1,
7366 .dpcm_playback = 1,
7367 .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_1,
7368 .be_hw_params_fixup = msm_be_hw_params_fixup,
7369 .ignore_pmdown_time = 1,
7370 .ignore_suspend = 1,
7371 .ops = &msm_cdc_dma_be_ops,
7372 },
7373 {
7374 .name = LPASS_BE_RX_CDC_DMA_RX_2,
7375 .stream_name = "RX CDC DMA2 Playback",
Ramprasad Katkamf83acfb2018-08-11 23:28:57 +0530[diff] [blame]7376 .cpu_dai_name = "msm-dai-cdc-dma-dev.45108",
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7377 .platform_name = "msm-pcm-routing",
7378 .codec_name = "bolero_codec",
7379 .codec_dai_name = "rx_macro_rx3",
7380 .no_pcm = 1,
7381 .dpcm_playback = 1,
7382 .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_2,
7383 .be_hw_params_fixup = msm_be_hw_params_fixup,
7384 .ignore_pmdown_time = 1,
7385 .ignore_suspend = 1,
7386 .ops = &msm_cdc_dma_be_ops,
7387 },
7388 {
7389 .name = LPASS_BE_RX_CDC_DMA_RX_3,
7390 .stream_name = "RX CDC DMA3 Playback",
Ramprasad Katkamf83acfb2018-08-11 23:28:57 +0530[diff] [blame]7391 .cpu_dai_name = "msm-dai-cdc-dma-dev.45110",
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7392 .platform_name = "msm-pcm-routing",
7393 .codec_name = "bolero_codec",
7394 .codec_dai_name = "rx_macro_rx4",
7395 .no_pcm = 1,
7396 .dpcm_playback = 1,
7397 .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_3,
7398 .be_hw_params_fixup = msm_be_hw_params_fixup,
7399 .ignore_pmdown_time = 1,
7400 .ignore_suspend = 1,
7401 .ops = &msm_cdc_dma_be_ops,
7402 },
7403 /* TX CDC DMA Backend DAI Links */
7404 {
7405 .name = LPASS_BE_TX_CDC_DMA_TX_3,
7406 .stream_name = "TX CDC DMA3 Capture",
Ramprasad Katkamf83acfb2018-08-11 23:28:57 +0530[diff] [blame]7407 .cpu_dai_name = "msm-dai-cdc-dma-dev.45111",
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7408 .platform_name = "msm-pcm-routing",
7409 .codec_name = "bolero_codec",
7410 .codec_dai_name = "tx_macro_tx1",
7411 .no_pcm = 1,
7412 .dpcm_capture = 1,
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7413 .id = MSM_BACKEND_DAI_TX_CDC_DMA_TX_3,
7414 .be_hw_params_fixup = msm_be_hw_params_fixup,
7415 .ignore_suspend = 1,
7416 .ops = &msm_cdc_dma_be_ops,
7417 },
7418 {
7419 .name = LPASS_BE_TX_CDC_DMA_TX_4,
7420 .stream_name = "TX CDC DMA4 Capture",
Ramprasad Katkamf83acfb2018-08-11 23:28:57 +0530[diff] [blame]7421 .cpu_dai_name = "msm-dai-cdc-dma-dev.45113",
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7422 .platform_name = "msm-pcm-routing",
7423 .codec_name = "bolero_codec",
7424 .codec_dai_name = "tx_macro_tx2",
7425 .no_pcm = 1,
7426 .dpcm_capture = 1,
7427 .id = MSM_BACKEND_DAI_TX_CDC_DMA_TX_4,
7428 .be_hw_params_fixup = msm_be_hw_params_fixup,
7429 .ignore_suspend = 1,
7430 .ops = &msm_cdc_dma_be_ops,
7431 },
7432};
7433
7434static struct snd_soc_dai_link msm_sm6150_dai_links[
7435 ARRAY_SIZE(msm_common_dai_links) +
7436 ARRAY_SIZE(msm_tavil_fe_dai_links) +
7437 ARRAY_SIZE(msm_bolero_fe_dai_links) +
7438 ARRAY_SIZE(msm_common_misc_fe_dai_links) +
7439 ARRAY_SIZE(msm_common_be_dai_links) +
7440 ARRAY_SIZE(msm_tavil_be_dai_links) +
7441 ARRAY_SIZE(msm_wcn_be_dai_links) +
7442 ARRAY_SIZE(ext_disp_be_dai_link) +
7443 ARRAY_SIZE(msm_mi2s_be_dai_links) +
7444 ARRAY_SIZE(msm_auxpcm_be_dai_links) +
7445 ARRAY_SIZE(msm_wsa_cdc_dma_be_dai_links) +
7446 ARRAY_SIZE(msm_rx_tx_cdc_dma_be_dai_links)];
7447
7448static int msm_snd_card_tavil_late_probe(struct snd_soc_card *card)
7449{
7450 const char *be_dl_name = LPASS_BE_SLIMBUS_0_RX;
7451 struct snd_soc_pcm_runtime *rtd;
7452 int ret = 0;
7453 void *mbhc_calibration;
7454
7455 rtd = snd_soc_get_pcm_runtime(card, be_dl_name);
7456 if (!rtd) {
7457 dev_err(card->dev,
7458 "%s: snd_soc_get_pcm_runtime for %s failed!\n",
7459 __func__, be_dl_name);
7460 ret = -EINVAL;
7461 goto err_pcm_runtime;
7462 }
7463
7464 mbhc_calibration = def_wcd_mbhc_cal();
7465 if (!mbhc_calibration) {
7466 ret = -ENOMEM;
7467 goto err_mbhc_cal;
7468 }
7469 wcd_mbhc_cfg.calibration = mbhc_calibration;
7470 ret = tavil_mbhc_hs_detect(rtd->codec, &wcd_mbhc_cfg);
7471 if (ret) {
7472 dev_err(card->dev, "%s: mbhc hs detect failed, err:%d\n",
7473 __func__, ret);
7474 goto err_hs_detect;
7475 }
7476 return 0;
7477
7478err_hs_detect:
7479 kfree(mbhc_calibration);
7480err_mbhc_cal:
7481err_pcm_runtime:
7482 return ret;
7483}
7484
7485
7486static int msm_populate_dai_link_component_of_node(
7487 struct snd_soc_card *card)
7488{
7489 int i, index, ret = 0;
7490 struct device *cdev = card->dev;
7491 struct snd_soc_dai_link *dai_link = card->dai_link;
7492 struct device_node *np;
7493
7494 if (!cdev) {
7495 pr_err("%s: Sound card device memory NULL\n", __func__);
7496 return -ENODEV;
7497 }
7498
7499 for (i = 0; i < card->num_links; i++) {
7500 if (dai_link[i].platform_of_node && dai_link[i].cpu_of_node)
7501 continue;
7502
7503 /* populate platform_of_node for snd card dai links */
7504 if (dai_link[i].platform_name &&
7505 !dai_link[i].platform_of_node) {
7506 index = of_property_match_string(cdev->of_node,
7507 "asoc-platform-names",
7508 dai_link[i].platform_name);
7509 if (index < 0) {
7510 pr_err("%s: No match found for platform name: %s\n",
7511 __func__, dai_link[i].platform_name);
7512 ret = index;
7513 goto err;
7514 }
7515 np = of_parse_phandle(cdev->of_node, "asoc-platform",
7516 index);
7517 if (!np) {
7518 pr_err("%s: retrieving phandle for platform %s, index %d failed\n",
7519 __func__, dai_link[i].platform_name,
7520 index);
7521 ret = -ENODEV;
7522 goto err;
7523 }
7524 dai_link[i].platform_of_node = np;
7525 dai_link[i].platform_name = NULL;
7526 }
7527
7528 /* populate cpu_of_node for snd card dai links */
7529 if (dai_link[i].cpu_dai_name && !dai_link[i].cpu_of_node) {
7530 index = of_property_match_string(cdev->of_node,
7531 "asoc-cpu-names",
7532 dai_link[i].cpu_dai_name);
7533 if (index >= 0) {
7534 np = of_parse_phandle(cdev->of_node, "asoc-cpu",
7535 index);
7536 if (!np) {
7537 pr_err("%s: retrieving phandle for cpu dai %s failed\n",
7538 __func__,
7539 dai_link[i].cpu_dai_name);
7540 ret = -ENODEV;
7541 goto err;
7542 }
7543 dai_link[i].cpu_of_node = np;
7544 dai_link[i].cpu_dai_name = NULL;
7545 }
7546 }
7547
7548 /* populate codec_of_node for snd card dai links */
7549 if (dai_link[i].codec_name && !dai_link[i].codec_of_node) {
7550 index = of_property_match_string(cdev->of_node,
7551 "asoc-codec-names",
7552 dai_link[i].codec_name);
7553 if (index < 0)
7554 continue;
7555 np = of_parse_phandle(cdev->of_node, "asoc-codec",
7556 index);
7557 if (!np) {
7558 pr_err("%s: retrieving phandle for codec %s failed\n",
7559 __func__, dai_link[i].codec_name);
7560 ret = -ENODEV;
7561 goto err;
7562 }
7563 dai_link[i].codec_of_node = np;
7564 dai_link[i].codec_name = NULL;
7565 }
7566 }
7567
7568err:
7569 return ret;
7570}
7571
7572static int msm_audrx_stub_init(struct snd_soc_pcm_runtime *rtd)
7573{
7574 int ret = 0;
7575 struct snd_soc_codec *codec = rtd->codec;
7576
7577 ret = snd_soc_add_codec_controls(codec, msm_tavil_snd_controls,
7578 ARRAY_SIZE(msm_tavil_snd_controls));
7579 if (ret < 0) {
7580 dev_err(codec->dev,
7581 "%s: add_codec_controls failed, err = %d\n",
7582 __func__, ret);
7583 return ret;
7584 }
7585
7586 return 0;
7587}
7588
7589static int msm_snd_stub_hw_params(struct snd_pcm_substream *substream,
7590 struct snd_pcm_hw_params *params)
7591{
7592 struct snd_soc_pcm_runtime *rtd = substream->private_data;
7593 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
7594
7595 int ret = 0;
7596 unsigned int rx_ch[] = {144, 145, 146, 147, 148, 149, 150,
7597 151};
7598 unsigned int tx_ch[] = {128, 129, 130, 131, 132, 133,
7599 134, 135, 136, 137, 138, 139,
7600 140, 141, 142, 143};
7601
7602 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
7603 ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
7604 slim_rx_cfg[SLIM_RX_0].channels,
7605 rx_ch);
7606 if (ret < 0)
7607 pr_err("%s: RX failed to set cpu chan map error %d\n",
7608 __func__, ret);
7609 } else {
7610 ret = snd_soc_dai_set_channel_map(cpu_dai,
7611 slim_tx_cfg[SLIM_TX_0].channels,
7612 tx_ch, 0, 0);
7613 if (ret < 0)
7614 pr_err("%s: TX failed to set cpu chan map error %d\n",
7615 __func__, ret);
7616 }
7617
7618 return ret;
7619}
7620
7621static struct snd_soc_ops msm_stub_be_ops = {
7622 .hw_params = msm_snd_stub_hw_params,
7623};
7624
7625static struct snd_soc_dai_link msm_stub_fe_dai_links[] = {
7626
7627 /* FrontEnd DAI Links */
7628 {
7629 .name = "MSMSTUB Media1",
7630 .stream_name = "MultiMedia1",
7631 .cpu_dai_name = "MultiMedia1",
7632 .platform_name = "msm-pcm-dsp.0",
7633 .dynamic = 1,
7634 .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
7635 .dpcm_playback = 1,
7636 .dpcm_capture = 1,
7637 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
7638 SND_SOC_DPCM_TRIGGER_POST},
7639 .codec_dai_name = "snd-soc-dummy-dai",
7640 .codec_name = "snd-soc-dummy",
7641 .ignore_suspend = 1,
7642 /* this dainlink has playback support */
7643 .ignore_pmdown_time = 1,
7644 .id = MSM_FRONTEND_DAI_MULTIMEDIA1
7645 },
7646};
7647
7648static struct snd_soc_dai_link msm_stub_be_dai_links[] = {
7649
7650 /* Backend DAI Links */
7651 {
7652 .name = LPASS_BE_SLIMBUS_0_RX,
7653 .stream_name = "Slimbus Playback",
7654 .cpu_dai_name = "msm-dai-q6-dev.16384",
7655 .platform_name = "msm-pcm-routing",
7656 .codec_name = "msm-stub-codec.1",
7657 .codec_dai_name = "msm-stub-rx",
7658 .no_pcm = 1,
7659 .dpcm_playback = 1,
7660 .id = MSM_BACKEND_DAI_SLIMBUS_0_RX,
7661 .init = &msm_audrx_stub_init,
7662 .be_hw_params_fixup = msm_be_hw_params_fixup,
7663 .ignore_pmdown_time = 1, /* dai link has playback support */
7664 .ignore_suspend = 1,
7665 .ops = &msm_stub_be_ops,
7666 },
7667 {
7668 .name = LPASS_BE_SLIMBUS_0_TX,
7669 .stream_name = "Slimbus Capture",
7670 .cpu_dai_name = "msm-dai-q6-dev.16385",
7671 .platform_name = "msm-pcm-routing",
7672 .codec_name = "msm-stub-codec.1",
7673 .codec_dai_name = "msm-stub-tx",
7674 .no_pcm = 1,
7675 .dpcm_capture = 1,
7676 .id = MSM_BACKEND_DAI_SLIMBUS_0_TX,
7677 .be_hw_params_fixup = msm_be_hw_params_fixup,
7678 .ignore_suspend = 1,
7679 .ops = &msm_stub_be_ops,
7680 },
7681};
7682
7683static struct snd_soc_dai_link msm_stub_dai_links[
7684 ARRAY_SIZE(msm_stub_fe_dai_links) +
7685 ARRAY_SIZE(msm_stub_be_dai_links)];
7686
7687struct snd_soc_card snd_soc_card_stub_msm = {
7688 .name = "sm6150-stub-snd-card",
7689};
7690
7691static const struct of_device_id sm6150_asoc_machine_of_match[] = {
7692 { .compatible = "qcom,sm6150-asoc-snd",
7693 .data = "codec"},
7694 { .compatible = "qcom,sm6150-asoc-snd-stub",
7695 .data = "stub_codec"},
7696 {},
7697};
7698
7699static struct snd_soc_card *populate_snd_card_dailinks(struct device *dev)
7700{
7701 struct snd_soc_card *card = NULL;
7702 struct snd_soc_dai_link *dailink;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]7703 int total_links = 0, rc = 0;
7704 u32 tavil_codec = 0, auxpcm_audio_intf = 0;
7705 u32 mi2s_audio_intf = 0, ext_disp_audio_intf = 0;
7706 u32 wcn_btfm_intf = 0;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7707 const struct of_device_id *match;
7708
7709 match = of_match_node(sm6150_asoc_machine_of_match, dev->of_node);
7710 if (!match) {
7711 dev_err(dev, "%s: No DT match found for sound card\n",
7712 __func__);
7713 return NULL;
7714 }
7715
7716 if (!strcmp(match->data, "codec")) {
7717 card = &snd_soc_card_sm6150_msm;
7718 memcpy(msm_sm6150_dai_links + total_links,
7719 msm_common_dai_links,
7720 sizeof(msm_common_dai_links));
7721
7722 total_links += ARRAY_SIZE(msm_common_dai_links);
7723
7724 memcpy(msm_sm6150_dai_links + total_links,
7725 msm_common_misc_fe_dai_links,
7726 sizeof(msm_common_misc_fe_dai_links));
7727
7728 total_links += ARRAY_SIZE(msm_common_misc_fe_dai_links);
7729
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]7730 rc = of_property_read_u32(dev->of_node, "qcom,tavil_codec",
7731 &tavil_codec);
7732 if (rc) {
7733 dev_dbg(dev, "%s: No DT match for tavil codec\n",
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7734 __func__);
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]7735 } else {
7736 if (tavil_codec) {
7737 card->late_probe =
7738 msm_snd_card_tavil_late_probe;
7739 memcpy(msm_sm6150_dai_links + total_links,
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7740 msm_tavil_fe_dai_links,
7741 sizeof(msm_tavil_fe_dai_links));
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]7742 total_links +=
7743 ARRAY_SIZE(msm_tavil_fe_dai_links);
7744 }
7745 }
7746
7747 if (!tavil_codec) {
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7748 memcpy(msm_sm6150_dai_links + total_links,
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]7749 msm_bolero_fe_dai_links,
7750 sizeof(msm_bolero_fe_dai_links));
7751 total_links +=
7752 ARRAY_SIZE(msm_bolero_fe_dai_links);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7753 }
7754
7755 memcpy(msm_sm6150_dai_links + total_links,
7756 msm_common_be_dai_links,
7757 sizeof(msm_common_be_dai_links));
7758
7759 total_links += ARRAY_SIZE(msm_common_be_dai_links);
7760
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]7761 if (tavil_codec) {
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7762 memcpy(msm_sm6150_dai_links + total_links,
7763 msm_tavil_be_dai_links,
7764 sizeof(msm_tavil_be_dai_links));
7765 total_links += ARRAY_SIZE(msm_tavil_be_dai_links);
7766 } else {
7767 memcpy(msm_sm6150_dai_links + total_links,
7768 msm_wsa_cdc_dma_be_dai_links,
7769 sizeof(msm_wsa_cdc_dma_be_dai_links));
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]7770 total_links +=
7771 ARRAY_SIZE(msm_wsa_cdc_dma_be_dai_links);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7772
7773 memcpy(msm_sm6150_dai_links + total_links,
7774 msm_rx_tx_cdc_dma_be_dai_links,
7775 sizeof(msm_rx_tx_cdc_dma_be_dai_links));
7776 total_links +=
7777 ARRAY_SIZE(msm_rx_tx_cdc_dma_be_dai_links);
7778 }
7779
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]7780 rc = of_property_read_u32(dev->of_node,
7781 "qcom,ext-disp-audio-rx",
7782 &ext_disp_audio_intf);
7783 if (rc) {
7784 dev_dbg(dev, "%s: No DT match Ext Disp interface\n",
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7785 __func__);
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]7786 } else {
7787 if (auxpcm_audio_intf) {
7788 memcpy(msm_sm6150_dai_links + total_links,
7789 ext_disp_be_dai_link,
7790 sizeof(ext_disp_be_dai_link));
7791 total_links +=
7792 ARRAY_SIZE(ext_disp_be_dai_link);
7793 }
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7794 }
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]7795
7796 rc = of_property_read_u32(dev->of_node, "qcom,mi2s-audio-intf",
7797 &mi2s_audio_intf);
7798 if (rc) {
7799 dev_dbg(dev, "%s: No DT match MI2S audio interface\n",
7800 __func__);
7801 } else {
7802 if (mi2s_audio_intf) {
7803 memcpy(msm_sm6150_dai_links + total_links,
7804 msm_mi2s_be_dai_links,
7805 sizeof(msm_mi2s_be_dai_links));
7806 total_links +=
7807 ARRAY_SIZE(msm_mi2s_be_dai_links);
7808 }
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7809 }
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]7810
7811
7812 rc = of_property_read_u32(dev->of_node, "qcom,wcn-btfm",
7813 &wcn_btfm_intf);
7814 if (rc) {
7815 dev_dbg(dev, "%s: No DT match wcn btfm interface\n",
7816 __func__);
7817 } else {
7818 if (wcn_btfm_intf) {
7819 memcpy(msm_sm6150_dai_links + total_links,
7820 msm_wcn_be_dai_links,
7821 sizeof(msm_wcn_be_dai_links));
7822 total_links +=
7823 ARRAY_SIZE(msm_wcn_be_dai_links);
7824 }
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7825 }
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]7826
7827 rc = of_property_read_u32(dev->of_node,
7828 "qcom,auxpcm-audio-intf",
7829 &auxpcm_audio_intf);
7830 if (rc) {
7831 dev_dbg(dev, "%s: No DT match Aux PCM interface\n",
7832 __func__);
7833 } else {
7834 if (auxpcm_audio_intf) {
7835 memcpy(msm_sm6150_dai_links + total_links,
7836 msm_auxpcm_be_dai_links,
7837 sizeof(msm_auxpcm_be_dai_links));
7838 total_links +=
7839 ARRAY_SIZE(msm_auxpcm_be_dai_links);
7840 }
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7841 }
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]7842
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7843 dailink = msm_sm6150_dai_links;
7844 } else if (!strcmp(match->data, "stub_codec")) {
7845 card = &snd_soc_card_stub_msm;
7846
7847 memcpy(msm_stub_dai_links + total_links,
7848 msm_stub_fe_dai_links,
7849 sizeof(msm_stub_fe_dai_links));
7850 total_links += ARRAY_SIZE(msm_stub_fe_dai_links);
7851
7852 memcpy(msm_stub_dai_links + total_links,
7853 msm_stub_be_dai_links,
7854 sizeof(msm_stub_be_dai_links));
7855 total_links += ARRAY_SIZE(msm_stub_be_dai_links);
7856
7857 dailink = msm_stub_dai_links;
7858 }
7859
7860 if (card) {
7861 card->dai_link = dailink;
7862 card->num_links = total_links;
7863 }
7864
7865 return card;
7866}
7867
7868static int msm_wsa881x_init(struct snd_soc_component *component)
7869{
7870 u8 spkleft_ports[WSA881X_MAX_SWR_PORTS] = {0, 1, 2, 3};
7871 u8 spkright_ports[WSA881X_MAX_SWR_PORTS] = {0, 1, 2, 3};
7872 u8 spkleft_port_types[WSA881X_MAX_SWR_PORTS] = {SPKR_L, SPKR_L_COMP,
7873 SPKR_L_BOOST, SPKR_L_VI};
7874 u8 spkright_port_types[WSA881X_MAX_SWR_PORTS] = {SPKR_R, SPKR_R_COMP,
7875 SPKR_R_BOOST, SPKR_R_VI};
7876 unsigned int ch_rate[WSA881X_MAX_SWR_PORTS] = {2400, 600, 300, 1200};
7877 unsigned int ch_mask[WSA881X_MAX_SWR_PORTS] = {0x1, 0xF, 0x3, 0x3};
7878 struct snd_soc_codec *codec = snd_soc_component_to_codec(component);
7879 struct msm_asoc_mach_data *pdata;
7880 struct snd_soc_dapm_context *dapm;
7881 int ret = 0;
7882
7883 if (!codec) {
7884 pr_err("%s codec is NULL\n", __func__);
7885 return -EINVAL;
7886 }
7887
7888 dapm = snd_soc_codec_get_dapm(codec);
7889
7890 if (!strcmp(component->name_prefix, "SpkrLeft")) {
7891 dev_dbg(codec->dev, "%s: setting left ch map to codec %s\n",
7892 __func__, codec->component.name);
7893 wsa881x_set_channel_map(codec, &spkleft_ports[0],
7894 WSA881X_MAX_SWR_PORTS, &ch_mask[0],
7895 &ch_rate[0], &spkleft_port_types[0]);
7896 if (dapm->component) {
7897 snd_soc_dapm_ignore_suspend(dapm, "SpkrLeft IN");
7898 snd_soc_dapm_ignore_suspend(dapm, "SpkrLeft SPKR");
7899 }
7900 } else if (!strcmp(component->name_prefix, "SpkrRight")) {
7901 dev_dbg(codec->dev, "%s: setting right ch map to codec %s\n",
7902 __func__, codec->component.name);
7903 wsa881x_set_channel_map(codec, &spkright_ports[0],
7904 WSA881X_MAX_SWR_PORTS, &ch_mask[0],
7905 &ch_rate[0], &spkright_port_types[0]);
7906 if (dapm->component) {
7907 snd_soc_dapm_ignore_suspend(dapm, "SpkrRight IN");
7908 snd_soc_dapm_ignore_suspend(dapm, "SpkrRight SPKR");
7909 }
7910 } else {
7911 dev_err(codec->dev, "%s: wrong codec name %s\n", __func__,
7912 codec->component.name);
7913 ret = -EINVAL;
7914 goto err;
7915 }
7916 pdata = snd_soc_card_get_drvdata(component->card);
7917 if (pdata && pdata->codec_root)
7918 wsa881x_codec_info_create_codec_entry(pdata->codec_root,
7919 codec);
7920
7921err:
7922 return ret;
7923}
7924
7925static int msm_aux_codec_init(struct snd_soc_component *component)
7926{
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]7927 struct snd_soc_codec *codec = snd_soc_component_to_codec(component);
7928 struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
Ramprasad Katkam997da402018-08-17 20:20:06 +0530[diff] [blame^]7929 int ret = 0;
7930 void *mbhc_calibration;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]7931
7932 snd_soc_dapm_ignore_suspend(dapm, "EAR");
7933 snd_soc_dapm_ignore_suspend(dapm, "AUX");
7934 snd_soc_dapm_ignore_suspend(dapm, "HPHL");
7935 snd_soc_dapm_ignore_suspend(dapm, "HPHR");
7936 snd_soc_dapm_ignore_suspend(dapm, "AMIC1");
7937 snd_soc_dapm_ignore_suspend(dapm, "AMIC2");
7938 snd_soc_dapm_ignore_suspend(dapm, "AMIC3");
7939 snd_soc_dapm_ignore_suspend(dapm, "AMIC4");
7940 snd_soc_dapm_sync(dapm);
7941
Ramprasad Katkam997da402018-08-17 20:20:06 +0530[diff] [blame^]7942 mbhc_calibration = def_wcd_mbhc_cal();
7943 if (!mbhc_calibration) {
7944 return -ENOMEM;
7945 }
7946 wcd_mbhc_cfg.calibration = mbhc_calibration;
7947 ret = wcd937x_mbhc_hs_detect(codec, &wcd_mbhc_cfg);
7948
7949 return ret;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7950}
7951
7952static int msm_init_aux_dev(struct platform_device *pdev,
7953 struct snd_soc_card *card)
7954{
7955 struct device_node *wsa_of_node;
7956 struct device_node *aux_codec_of_node;
7957 u32 wsa_max_devs;
7958 u32 wsa_dev_cnt;
7959 u32 codec_aux_dev_cnt = 0;
7960 int i;
7961 struct msm_wsa881x_dev_info *wsa881x_dev_info;
7962 struct aux_codec_dev_info *aux_cdc_dev_info;
7963 const char *auxdev_name_prefix[1];
7964 char *dev_name_str = NULL;
7965 int found = 0;
7966 int codecs_found = 0;
7967 int ret = 0;
7968
7969 /* Get maximum WSA device count for this platform */
7970 ret = of_property_read_u32(pdev->dev.of_node,
7971 "qcom,wsa-max-devs", &wsa_max_devs);
7972 if (ret) {
7973 dev_info(&pdev->dev,
7974 "%s: wsa-max-devs property missing in DT %s, ret = %d\n",
7975 __func__, pdev->dev.of_node->full_name, ret);
7976 wsa_max_devs = 0;
7977 goto codec_aux_dev;
7978 }
7979 if (wsa_max_devs == 0) {
7980 dev_warn(&pdev->dev,
7981 "%s: Max WSA devices is 0 for this target?\n",
7982 __func__);
7983 goto codec_aux_dev;
7984 }
7985
7986 /* Get count of WSA device phandles for this platform */
7987 wsa_dev_cnt = of_count_phandle_with_args(pdev->dev.of_node,
7988 "qcom,wsa-devs", NULL);
7989 if (wsa_dev_cnt == -ENOENT) {
7990 dev_warn(&pdev->dev, "%s: No wsa device defined in DT.\n",
7991 __func__);
7992 goto err;
7993 } else if (wsa_dev_cnt <= 0) {
7994 dev_err(&pdev->dev,
7995 "%s: Error reading wsa device from DT. wsa_dev_cnt = %d\n",
7996 __func__, wsa_dev_cnt);
7997 ret = -EINVAL;
7998 goto err;
7999 }
8000
8001 /*
8002 * Expect total phandles count to be NOT less than maximum possible
8003 * WSA count. However, if it is less, then assign same value to
8004 * max count as well.
8005 */
8006 if (wsa_dev_cnt < wsa_max_devs) {
8007 dev_dbg(&pdev->dev,
8008 "%s: wsa_max_devs = %d cannot exceed wsa_dev_cnt = %d\n",
8009 __func__, wsa_max_devs, wsa_dev_cnt);
8010 wsa_max_devs = wsa_dev_cnt;
8011 }
8012
8013 /* Make sure prefix string passed for each WSA device */
8014 ret = of_property_count_strings(pdev->dev.of_node,
8015 "qcom,wsa-aux-dev-prefix");
8016 if (ret != wsa_dev_cnt) {
8017 dev_err(&pdev->dev,
8018 "%s: expecting %d wsa prefix. Defined only %d in DT\n",
8019 __func__, wsa_dev_cnt, ret);
8020 ret = -EINVAL;
8021 goto err;
8022 }
8023
8024 /*
8025 * Alloc mem to store phandle and index info of WSA device, if already
8026 * registered with ALSA core
8027 */
8028 wsa881x_dev_info = devm_kcalloc(&pdev->dev, wsa_max_devs,
8029 sizeof(struct msm_wsa881x_dev_info),
8030 GFP_KERNEL);
8031 if (!wsa881x_dev_info) {
8032 ret = -ENOMEM;
8033 goto err;
8034 }
8035
8036 /*
8037 * search and check whether all WSA devices are already
8038 * registered with ALSA core or not. If found a node, store
8039 * the node and the index in a local array of struct for later
8040 * use.
8041 */
8042 for (i = 0; i < wsa_dev_cnt; i++) {
8043 wsa_of_node = of_parse_phandle(pdev->dev.of_node,
8044 "qcom,wsa-devs", i);
8045 if (unlikely(!wsa_of_node)) {
8046 /* we should not be here */
8047 dev_err(&pdev->dev,
8048 "%s: wsa dev node is not present\n",
8049 __func__);
8050 ret = -EINVAL;
8051 goto err;
8052 }
8053 if (soc_find_component(wsa_of_node, NULL)) {
8054 /* WSA device registered with ALSA core */
8055 wsa881x_dev_info[found].of_node = wsa_of_node;
8056 wsa881x_dev_info[found].index = i;
8057 found++;
8058 if (found == wsa_max_devs)
8059 break;
8060 }
8061 }
8062
8063 if (found < wsa_max_devs) {
8064 dev_dbg(&pdev->dev,
8065 "%s: failed to find %d components. Found only %d\n",
8066 __func__, wsa_max_devs, found);
8067 return -EPROBE_DEFER;
8068 }
8069 dev_info(&pdev->dev,
8070 "%s: found %d wsa881x devices registered with ALSA core\n",
8071 __func__, found);
8072
8073codec_aux_dev:
8074 if (strcmp(card->name, "sm6150-tavil-snd-card")) {
8075 /* Get count of aux codec device phandles for this platform */
8076 codec_aux_dev_cnt = of_count_phandle_with_args(
8077 pdev->dev.of_node,
8078 "qcom,codec-aux-devs", NULL);
8079 if (codec_aux_dev_cnt == -ENOENT) {
8080 dev_warn(&pdev->dev, "%s: No aux codec defined in DT.\n",
8081 __func__);
8082 goto err;
8083 } else if (codec_aux_dev_cnt <= 0) {
8084 dev_err(&pdev->dev,
8085 "%s: Error reading aux codec device from DT, dev_cnt=%d\n",
8086 __func__, codec_aux_dev_cnt);
8087 ret = -EINVAL;
8088 goto err;
8089 }
8090
8091 /*
8092 * Alloc mem to store phandle and index info of aux codec
8093 * if already registered with ALSA core
8094 */
8095 aux_cdc_dev_info = devm_kcalloc(&pdev->dev, codec_aux_dev_cnt,
8096 sizeof(struct aux_codec_dev_info),
8097 GFP_KERNEL);
8098 if (!aux_cdc_dev_info) {
8099 ret = -ENOMEM;
8100 goto err;
8101 }
8102
8103 /*
8104 * search and check whether all aux codecs are already
8105 * registered with ALSA core or not. If found a node, store
8106 * the node and the index in a local array of struct for later
8107 * use.
8108 */
8109 for (i = 0; i < codec_aux_dev_cnt; i++) {
8110 aux_codec_of_node = of_parse_phandle(pdev->dev.of_node,
8111 "qcom,codec-aux-devs", i);
8112 if (unlikely(!aux_codec_of_node)) {
8113 /* we should not be here */
8114 dev_err(&pdev->dev,
8115 "%s: aux codec dev node is not present\n",
8116 __func__);
8117 ret = -EINVAL;
8118 goto err;
8119 }
8120 if (soc_find_component(aux_codec_of_node, NULL)) {
8121 /* AUX codec registered with ALSA core */
8122 aux_cdc_dev_info[codecs_found].of_node =
8123 aux_codec_of_node;
8124 aux_cdc_dev_info[codecs_found].index = i;
8125 codecs_found++;
8126 }
8127 }
8128
8129 if (codecs_found < codec_aux_dev_cnt) {
8130 dev_dbg(&pdev->dev,
8131 "%s: failed to find %d components. Found only %d\n",
8132 __func__, codec_aux_dev_cnt, codecs_found);
8133 return -EPROBE_DEFER;
8134 }
8135 dev_info(&pdev->dev,
8136 "%s: found %d AUX codecs registered with ALSA core\n",
8137 __func__, codecs_found);
8138
8139 }
8140
8141 card->num_aux_devs = wsa_max_devs + codec_aux_dev_cnt;
8142 card->num_configs = wsa_max_devs + codec_aux_dev_cnt;
8143
8144 /* Alloc array of AUX devs struct */
8145 msm_aux_dev = devm_kcalloc(&pdev->dev, card->num_aux_devs,
8146 sizeof(struct snd_soc_aux_dev),
8147 GFP_KERNEL);
8148 if (!msm_aux_dev) {
8149 ret = -ENOMEM;
8150 goto err;
8151 }
8152
8153 /* Alloc array of codec conf struct */
8154 msm_codec_conf = devm_kcalloc(&pdev->dev, card->num_configs,
8155 sizeof(struct snd_soc_codec_conf),
8156 GFP_KERNEL);
8157 if (!msm_codec_conf) {
8158 ret = -ENOMEM;
8159 goto err;
8160 }
8161
8162 for (i = 0; i < wsa_max_devs; i++) {
8163 dev_name_str = devm_kzalloc(&pdev->dev, DEV_NAME_STR_LEN,
8164 GFP_KERNEL);
8165 if (!dev_name_str) {
8166 ret = -ENOMEM;
8167 goto err;
8168 }
8169
8170 ret = of_property_read_string_index(pdev->dev.of_node,
8171 "qcom,wsa-aux-dev-prefix",
8172 wsa881x_dev_info[i].index,
8173 auxdev_name_prefix);
8174 if (ret) {
8175 dev_err(&pdev->dev,
8176 "%s: failed to read wsa aux dev prefix, ret = %d\n",
8177 __func__, ret);
8178 ret = -EINVAL;
8179 goto err;
8180 }
8181
8182 snprintf(dev_name_str, strlen("wsa881x.%d"), "wsa881x.%d", i);
8183 msm_aux_dev[i].name = dev_name_str;
8184 msm_aux_dev[i].codec_name = NULL;
8185 msm_aux_dev[i].codec_of_node =
8186 wsa881x_dev_info[i].of_node;
8187 msm_aux_dev[i].init = msm_wsa881x_init;
8188 msm_codec_conf[i].dev_name = NULL;
8189 msm_codec_conf[i].name_prefix = auxdev_name_prefix[0];
8190 msm_codec_conf[i].of_node =
8191 wsa881x_dev_info[i].of_node;
8192 }
8193
8194 for (i = 0; i < codec_aux_dev_cnt; i++) {
8195 msm_aux_dev[wsa_max_devs + i].name = NULL;
8196 msm_aux_dev[wsa_max_devs + i].codec_name = NULL;
8197 msm_aux_dev[wsa_max_devs + i].codec_of_node =
8198 aux_cdc_dev_info[i].of_node;
8199 msm_aux_dev[wsa_max_devs + i].init = msm_aux_codec_init;
8200 msm_codec_conf[wsa_max_devs + i].dev_name = NULL;
8201 msm_codec_conf[wsa_max_devs + i].name_prefix =
8202 NULL;
8203 msm_codec_conf[wsa_max_devs + i].of_node =
8204 aux_cdc_dev_info[i].of_node;
8205 }
8206
8207 card->codec_conf = msm_codec_conf;
8208 card->aux_dev = msm_aux_dev;
8209err:
8210 return ret;
8211}
8212
8213static void msm_i2s_auxpcm_init(struct platform_device *pdev)
8214{
8215 int count;
8216 u32 mi2s_master_slave[MI2S_MAX];
8217 int ret;
8218
8219 for (count = 0; count < MI2S_MAX; count++) {
8220 mutex_init(&mi2s_intf_conf[count].lock);
8221 mi2s_intf_conf[count].ref_cnt = 0;
8222 }
8223
8224 ret = of_property_read_u32_array(pdev->dev.of_node,
8225 "qcom,msm-mi2s-master",
8226 mi2s_master_slave, MI2S_MAX);
8227 if (ret) {
8228 dev_dbg(&pdev->dev, "%s: no qcom,msm-mi2s-master in DT node\n",
8229 __func__);
8230 } else {
8231 for (count = 0; count < MI2S_MAX; count++) {
8232 mi2s_intf_conf[count].msm_is_mi2s_master =
8233 mi2s_master_slave[count];
8234 }
8235 }
8236}
8237
8238static void msm_i2s_auxpcm_deinit(void)
8239{
8240 int count;
8241
8242 for (count = 0; count < MI2S_MAX; count++) {
8243 mutex_destroy(&mi2s_intf_conf[count].lock);
8244 mi2s_intf_conf[count].ref_cnt = 0;
8245 mi2s_intf_conf[count].msm_is_mi2s_master = 0;
8246 }
8247}
8248static int msm_asoc_machine_probe(struct platform_device *pdev)
8249{
8250 struct snd_soc_card *card;
8251 struct msm_asoc_mach_data *pdata;
8252 const char *mbhc_audio_jack_type = NULL;
8253 int ret;
8254
8255 if (!pdev->dev.of_node) {
8256 dev_err(&pdev->dev, "No platform supplied from device tree\n");
8257 return -EINVAL;
8258 }
8259
8260 pdata = devm_kzalloc(&pdev->dev,
8261 sizeof(struct msm_asoc_mach_data), GFP_KERNEL);
8262 if (!pdata)
8263 return -ENOMEM;
8264
8265 card = populate_snd_card_dailinks(&pdev->dev);
8266 if (!card) {
8267 dev_err(&pdev->dev, "%s: Card uninitialized\n", __func__);
8268 ret = -EINVAL;
8269 goto err;
8270 }
8271 card->dev = &pdev->dev;
8272 platform_set_drvdata(pdev, card);
8273 snd_soc_card_set_drvdata(card, pdata);
8274
8275 ret = snd_soc_of_parse_card_name(card, "qcom,model");
8276 if (ret) {
8277 dev_err(&pdev->dev, "parse card name failed, err:%d\n",
8278 ret);
8279 goto err;
8280 }
8281
8282 ret = snd_soc_of_parse_audio_routing(card, "qcom,audio-routing");
8283 if (ret) {
8284 dev_err(&pdev->dev, "parse audio routing failed, err:%d\n",
8285 ret);
8286 goto err;
8287 }
8288
8289 ret = msm_populate_dai_link_component_of_node(card);
8290 if (ret) {
8291 ret = -EPROBE_DEFER;
8292 goto err;
8293 }
8294
8295 ret = msm_init_aux_dev(pdev, card);
8296 if (ret)
8297 goto err;
8298
8299 ret = devm_snd_soc_register_card(&pdev->dev, card);
8300 if (ret == -EPROBE_DEFER) {
8301 if (codec_reg_done)
8302 ret = -EINVAL;
8303 goto err;
8304 } else if (ret) {
8305 dev_err(&pdev->dev, "snd_soc_register_card failed (%d)\n",
8306 ret);
8307 goto err;
8308 }
8309 dev_info(&pdev->dev, "Sound card %s registered\n", card->name);
8310 spdev = pdev;
8311
8312 pdata->hph_en1_gpio_p = of_parse_phandle(pdev->dev.of_node,
8313 "qcom,hph-en1-gpio", 0);
8314 if (!pdata->hph_en1_gpio_p) {
8315 dev_dbg(&pdev->dev, "property %s not detected in node %s\n",
8316 "qcom,hph-en1-gpio",
8317 pdev->dev.of_node->full_name);
8318 }
8319
8320 pdata->hph_en0_gpio_p = of_parse_phandle(pdev->dev.of_node,
8321 "qcom,hph-en0-gpio", 0);
8322 if (!pdata->hph_en0_gpio_p) {
8323 dev_dbg(&pdev->dev, "property %s not detected in node %s\n",
8324 "qcom,hph-en0-gpio",
8325 pdev->dev.of_node->full_name);
8326 }
8327
8328 ret = of_property_read_string(pdev->dev.of_node,
8329 "qcom,mbhc-audio-jack-type", &mbhc_audio_jack_type);
8330 if (ret) {
8331 dev_dbg(&pdev->dev, "Looking up %s property in node %s failed\n",
8332 "qcom,mbhc-audio-jack-type",
8333 pdev->dev.of_node->full_name);
8334 dev_dbg(&pdev->dev, "Jack type properties set to default\n");
8335 } else {
8336 if (!strcmp(mbhc_audio_jack_type, "4-pole-jack")) {
8337 wcd_mbhc_cfg.enable_anc_mic_detect = false;
8338 dev_dbg(&pdev->dev, "This hardware has 4 pole jack");
8339 } else if (!strcmp(mbhc_audio_jack_type, "5-pole-jack")) {
8340 wcd_mbhc_cfg.enable_anc_mic_detect = true;
8341 dev_dbg(&pdev->dev, "This hardware has 5 pole jack");
8342 } else if (!strcmp(mbhc_audio_jack_type, "6-pole-jack")) {
8343 wcd_mbhc_cfg.enable_anc_mic_detect = true;
8344 dev_dbg(&pdev->dev, "This hardware has 6 pole jack");
8345 } else {
8346 wcd_mbhc_cfg.enable_anc_mic_detect = false;
8347 dev_dbg(&pdev->dev, "Unknown value, set to default\n");
8348 }
8349 }
8350 /*
8351 * Parse US-Euro gpio info from DT. Report no error if us-euro
8352 * entry is not found in DT file as some targets do not support
8353 * US-Euro detection
8354 */
8355 pdata->us_euro_gpio_p = of_parse_phandle(pdev->dev.of_node,
8356 "qcom,us-euro-gpios", 0);
8357 if (!pdata->us_euro_gpio_p) {
8358 dev_dbg(&pdev->dev, "property %s not detected in node %s",
8359 "qcom,us-euro-gpios", pdev->dev.of_node->full_name);
8360 } else {
8361 dev_dbg(&pdev->dev, "%s detected\n",
8362 "qcom,us-euro-gpios");
8363 wcd_mbhc_cfg.swap_gnd_mic = msm_swap_gnd_mic;
8364 }
8365 /* Parse pinctrl info from devicetree */
8366 ret = msm_get_pinctrl(pdev);
8367 if (!ret) {
8368 pr_debug("%s: pinctrl parsing successful\n", __func__);
8369 } else {
8370 dev_dbg(&pdev->dev,
8371 "%s: Parsing pinctrl failed with %d. Cannot use Ports\n",
8372 __func__, ret);
8373 ret = 0;
8374 }
8375
8376 msm_i2s_auxpcm_init(pdev);
8377 if (!strcmp(card->name, "sm6150-tavil-snd-card")) {
8378 is_initial_boot = true;
8379 ret = audio_notifier_register("sm6150",
8380 AUDIO_NOTIFIER_ADSP_DOMAIN,
8381 &service_nb);
8382 if (ret < 0)
8383 pr_err("%s: Audio notifier register failed ret = %d\n",
8384 __func__, ret);
8385 } else {
8386 pdata->dmic01_gpio_p = of_parse_phandle(pdev->dev.of_node,
8387 "qcom,cdc-dmic01-gpios",
8388 0);
8389 pdata->dmic23_gpio_p = of_parse_phandle(pdev->dev.of_node,
8390 "qcom,cdc-dmic23-gpios",
8391 0);
8392 }
8393err:
8394 return ret;
8395}
8396
8397static int msm_asoc_machine_remove(struct platform_device *pdev)
8398{
8399 audio_notifier_deregister("sm6150");
8400 msm_i2s_auxpcm_deinit();
8401
8402 return 0;
8403}
8404
8405static struct platform_driver sm6150_asoc_machine_driver = {
8406 .driver = {
8407 .name = DRV_NAME,
8408 .owner = THIS_MODULE,
8409 .pm = &snd_soc_pm_ops,
8410 .of_match_table = sm6150_asoc_machine_of_match,
8411 },
8412 .probe = msm_asoc_machine_probe,
8413 .remove = msm_asoc_machine_remove,
8414};
8415module_platform_driver(sm6150_asoc_machine_driver);
8416
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]8417MODULE_DESCRIPTION("ALSA SoC SM6150 Machine driver");
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8418MODULE_LICENSE("GPL v2");
8419MODULE_ALIAS("platform:" DRV_NAME);
8420MODULE_DEVICE_TABLE(of, sm6150_asoc_machine_of_match);