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gerrit-public.fairphone.software / platform / vendor / opensource / audio-kernel / c65c7e4e60209c6117daa139aff56350085a97a4 / . / asoc / sm6150.c
blob: 40a9fd81e0fdd4a2d781cf542b2697f6448ddc47 [file] [log] [blame]
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1/*
2 * Copyright (c) 2018, The Linux Foundation. All rights reserved.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 and
6 * only version 2 as published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 */
13
14#include <linux/clk.h>
15#include <linux/delay.h>
16#include <linux/gpio.h>
17#include <linux/of_gpio.h>
18#include <linux/platform_device.h>
19#include <linux/slab.h>
20#include <linux/io.h>
21#include <linux/module.h>
22#include <linux/input.h>
23#include <linux/of_device.h>
24#include <linux/pm_qos.h>
25#include <sound/core.h>
26#include <sound/soc.h>
27#include <sound/soc-dapm.h>
28#include <sound/pcm.h>
29#include <sound/pcm_params.h>
30#include <sound/info.h>
31#include <dsp/audio_notifier.h>
32#include <dsp/q6afe-v2.h>
33#include <dsp/q6core.h>
34#include "device_event.h"
35#include "msm-pcm-routing-v2.h"
36#include "codecs/msm-cdc-pinctrl.h"
37#include "codecs/wcd934x/wcd934x.h"
38#include "codecs/wcd934x/wcd934x-mbhc.h"
39#include "codecs/wsa881x.h"
40#include "codecs/bolero/bolero-cdc.h"
41#include <dt-bindings/sound/audio-codec-port-types.h>
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]42#include "codecs/bolero/wsa-macro.h"
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]43
44#define DRV_NAME "sm6150-asoc-snd"
45
46#define __CHIPSET__ "SM6150 "
47#define MSM_DAILINK_NAME(name) (__CHIPSET__#name)
48
49#define SAMPLING_RATE_8KHZ 8000
50#define SAMPLING_RATE_11P025KHZ 11025
51#define SAMPLING_RATE_16KHZ 16000
52#define SAMPLING_RATE_22P05KHZ 22050
53#define SAMPLING_RATE_32KHZ 32000
54#define SAMPLING_RATE_44P1KHZ 44100
55#define SAMPLING_RATE_48KHZ 48000
56#define SAMPLING_RATE_88P2KHZ 88200
57#define SAMPLING_RATE_96KHZ 96000
58#define SAMPLING_RATE_176P4KHZ 176400
59#define SAMPLING_RATE_192KHZ 192000
60#define SAMPLING_RATE_352P8KHZ 352800
61#define SAMPLING_RATE_384KHZ 384000
62
63#define WCD9XXX_MBHC_DEF_BUTTONS 8
64#define WCD9XXX_MBHC_DEF_RLOADS 5
65#define CODEC_EXT_CLK_RATE 9600000
66#define ADSP_STATE_READY_TIMEOUT_MS 3000
67#define DEV_NAME_STR_LEN 32
68
69#define WSA8810_NAME_1 "wsa881x.20170211"
70#define WSA8810_NAME_2 "wsa881x.20170212"
71#define WCN_CDC_SLIM_RX_CH_MAX 2
72#define WCN_CDC_SLIM_TX_CH_MAX 3
73#define TDM_CHANNEL_MAX 8
74
75#define ADSP_STATE_READY_TIMEOUT_MS 3000
76#define MSM_LL_QOS_VALUE 300 /* time in us to ensure LPM doesn't go in C3/C4 */
77#define MSM_HIFI_ON 1
78
79enum {
80 SLIM_RX_0 = 0,
81 SLIM_RX_1,
82 SLIM_RX_2,
83 SLIM_RX_3,
84 SLIM_RX_4,
85 SLIM_RX_5,
86 SLIM_RX_6,
87 SLIM_RX_7,
88 SLIM_RX_MAX,
89};
90enum {
91 SLIM_TX_0 = 0,
92 SLIM_TX_1,
93 SLIM_TX_2,
94 SLIM_TX_3,
95 SLIM_TX_4,
96 SLIM_TX_5,
97 SLIM_TX_6,
98 SLIM_TX_7,
99 SLIM_TX_8,
100 SLIM_TX_MAX,
101};
102
103enum {
104 PRIM_MI2S = 0,
105 SEC_MI2S,
106 TERT_MI2S,
107 QUAT_MI2S,
108 QUIN_MI2S,
109 MI2S_MAX,
110};
111
112enum {
113 PRIM_AUX_PCM = 0,
114 SEC_AUX_PCM,
115 TERT_AUX_PCM,
116 QUAT_AUX_PCM,
117 QUIN_AUX_PCM,
118 AUX_PCM_MAX,
119};
120
121enum {
122 WSA_CDC_DMA_RX_0 = 0,
123 WSA_CDC_DMA_RX_1,
124 RX_CDC_DMA_RX_0,
125 RX_CDC_DMA_RX_1,
126 RX_CDC_DMA_RX_2,
127 RX_CDC_DMA_RX_3,
128 RX_CDC_DMA_RX_5,
129 CDC_DMA_RX_MAX,
130};
131
132enum {
133 WSA_CDC_DMA_TX_0 = 0,
134 WSA_CDC_DMA_TX_1,
135 WSA_CDC_DMA_TX_2,
136 TX_CDC_DMA_TX_0,
137 TX_CDC_DMA_TX_3,
138 TX_CDC_DMA_TX_4,
139 CDC_DMA_TX_MAX,
140};
141
142struct mi2s_conf {
143 struct mutex lock;
144 u32 ref_cnt;
145 u32 msm_is_mi2s_master;
146};
147
148static u32 mi2s_ebit_clk[MI2S_MAX] = {
149 Q6AFE_LPASS_CLK_ID_PRI_MI2S_EBIT,
150 Q6AFE_LPASS_CLK_ID_SEC_MI2S_EBIT,
151 Q6AFE_LPASS_CLK_ID_TER_MI2S_EBIT,
152 Q6AFE_LPASS_CLK_ID_QUAD_MI2S_EBIT,
153 Q6AFE_LPASS_CLK_ID_QUI_MI2S_EBIT
154};
155
156struct dev_config {
157 u32 sample_rate;
158 u32 bit_format;
159 u32 channels;
160};
161
162enum {
163 DP_RX_IDX = 0,
164 EXT_DISP_RX_IDX_MAX,
165};
166
167struct msm_wsa881x_dev_info {
168 struct device_node *of_node;
169 u32 index;
170};
171
172struct aux_codec_dev_info {
173 struct device_node *of_node;
174 u32 index;
175};
176
177enum pinctrl_pin_state {
178 STATE_DISABLE = 0, /* All pins are in sleep state */
179 STATE_MI2S_ACTIVE, /* I2S = active, TDM = sleep */
180 STATE_TDM_ACTIVE, /* I2S = sleep, TDM = active */
181};
182
183struct msm_pinctrl_info {
184 struct pinctrl *pinctrl;
185 struct pinctrl_state *mi2s_disable;
186 struct pinctrl_state *tdm_disable;
187 struct pinctrl_state *mi2s_active;
188 struct pinctrl_state *tdm_active;
189 enum pinctrl_pin_state curr_state;
190};
191
192struct msm_asoc_mach_data {
193 struct snd_info_entry *codec_root;
194 struct msm_pinctrl_info pinctrl_info;
195 int usbc_en2_gpio; /* used by gpio driver API */
196 struct device_node *dmic01_gpio_p; /* used by pinctrl API */
197 struct device_node *dmic23_gpio_p; /* used by pinctrl API */
198 struct device_node *us_euro_gpio_p; /* used by pinctrl API */
199 struct pinctrl *usbc_en2_gpio_p; /* used by pinctrl API */
200 struct device_node *hph_en1_gpio_p; /* used by pinctrl API */
201 struct device_node *hph_en0_gpio_p; /* used by pinctrl API */
202};
203
204struct msm_asoc_wcd93xx_codec {
205 void* (*get_afe_config_fn)(struct snd_soc_codec *codec,
206 enum afe_config_type config_type);
207};
208
209static const char *const pin_states[] = {"sleep", "i2s-active",
210 "tdm-active"};
211
212static struct snd_soc_card snd_soc_card_sm6150_msm;
213
214enum {
215 TDM_0 = 0,
216 TDM_1,
217 TDM_2,
218 TDM_3,
219 TDM_4,
220 TDM_5,
221 TDM_6,
222 TDM_7,
223 TDM_PORT_MAX,
224};
225
226enum {
227 TDM_PRI = 0,
228 TDM_SEC,
229 TDM_TERT,
230 TDM_QUAT,
231 TDM_QUIN,
232 TDM_INTERFACE_MAX,
233};
234
235struct tdm_port {
236 u32 mode;
237 u32 channel;
238};
239
240/* TDM default config */
241static struct dev_config tdm_rx_cfg[TDM_INTERFACE_MAX][TDM_PORT_MAX] = {
242 { /* PRI TDM */
243 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
244 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
245 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
246 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
247 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
248 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
249 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
250 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
251 },
252 { /* SEC TDM */
253 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
254 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
255 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
256 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
257 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
258 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
259 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
260 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
261 },
262 { /* TERT TDM */
263 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
264 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
265 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
266 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
267 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
268 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
269 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
270 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
271 },
272 { /* QUAT TDM */
273 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
274 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
275 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
276 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
277 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
278 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
279 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
280 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
281 },
282 { /* QUIN TDM */
283 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
284 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
285 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
286 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
287 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
288 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
289 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
290 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
291 }
292
293};
294
295/* TDM default config */
296static struct dev_config tdm_tx_cfg[TDM_INTERFACE_MAX][TDM_PORT_MAX] = {
297 { /* PRI TDM */
298 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
299 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
300 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
301 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
302 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
303 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
304 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
305 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
306 },
307 { /* SEC TDM */
308 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
309 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
310 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
311 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
312 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
313 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
314 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
315 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
316 },
317 { /* TERT TDM */
318 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
319 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
320 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
321 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
322 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
323 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
324 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
325 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
326 },
327 { /* QUAT TDM */
328 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
329 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
330 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
331 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
332 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
333 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
334 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
335 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
336 },
337 { /* QUIN TDM */
338 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
339 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
340 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
341 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
342 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
343 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
344 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
345 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
346 }
347};
348
349
350/* Default configuration of slimbus channels */
351static struct dev_config slim_rx_cfg[] = {
352 [SLIM_RX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
353 [SLIM_RX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
354 [SLIM_RX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
355 [SLIM_RX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
356 [SLIM_RX_4] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
357 [SLIM_RX_5] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
358 [SLIM_RX_6] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
359 [SLIM_RX_7] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
360};
361
362static struct dev_config slim_tx_cfg[] = {
363 [SLIM_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
364 [SLIM_TX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
365 [SLIM_TX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
366 [SLIM_TX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
367 [SLIM_TX_4] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
368 [SLIM_TX_5] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
369 [SLIM_TX_6] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
370 [SLIM_TX_7] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
371 [SLIM_TX_8] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
372};
373
374/* Default configuration of Codec DMA Interface Tx */
375static struct dev_config cdc_dma_rx_cfg[] = {
376 [WSA_CDC_DMA_RX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
377 [WSA_CDC_DMA_RX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
378 [RX_CDC_DMA_RX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
379 [RX_CDC_DMA_RX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
380 [RX_CDC_DMA_RX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
381 [RX_CDC_DMA_RX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
382 [RX_CDC_DMA_RX_5] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
383};
384
385/* Default configuration of Codec DMA Interface Rx */
386static struct dev_config cdc_dma_tx_cfg[] = {
387 [WSA_CDC_DMA_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
388 [WSA_CDC_DMA_TX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
389 [WSA_CDC_DMA_TX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
390 [TX_CDC_DMA_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
391 [TX_CDC_DMA_TX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
392 [TX_CDC_DMA_TX_4] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
393};
394
395/* Default configuration of external display BE */
396static struct dev_config ext_disp_rx_cfg[] = {
397 [DP_RX_IDX] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
398};
399
400static struct dev_config usb_rx_cfg = {
401 .sample_rate = SAMPLING_RATE_48KHZ,
402 .bit_format = SNDRV_PCM_FORMAT_S16_LE,
403 .channels = 2,
404};
405
406static struct dev_config usb_tx_cfg = {
407 .sample_rate = SAMPLING_RATE_48KHZ,
408 .bit_format = SNDRV_PCM_FORMAT_S16_LE,
409 .channels = 1,
410};
411
412static struct dev_config proxy_rx_cfg = {
413 .sample_rate = SAMPLING_RATE_48KHZ,
414 .bit_format = SNDRV_PCM_FORMAT_S16_LE,
415 .channels = 2,
416};
417
418/* Default configuration of MI2S channels */
419static struct dev_config mi2s_rx_cfg[] = {
420 [PRIM_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
421 [SEC_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
422 [TERT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
423 [QUAT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
424 [QUIN_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
425};
426
427static struct dev_config mi2s_tx_cfg[] = {
428 [PRIM_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
429 [SEC_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
430 [TERT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
431 [QUAT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
432 [QUIN_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
433};
434
435static struct dev_config aux_pcm_rx_cfg[] = {
436 [PRIM_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
437 [SEC_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
438 [TERT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
439 [QUAT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
440 [QUIN_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
441};
442
443static struct dev_config aux_pcm_tx_cfg[] = {
444 [PRIM_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
445 [SEC_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
446 [TERT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
447 [QUAT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
448 [QUIN_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
449};
450static int msm_vi_feed_tx_ch = 2;
451static const char *const slim_rx_ch_text[] = {"One", "Two"};
452static const char *const slim_tx_ch_text[] = {"One", "Two", "Three", "Four",
453 "Five", "Six", "Seven",
454 "Eight"};
455static const char *const vi_feed_ch_text[] = {"One", "Two"};
456static char const *bit_format_text[] = {"S16_LE", "S24_LE", "S24_3LE",
457 "S32_LE"};
458static char const *ext_disp_bit_format_text[] = {"S16_LE", "S24_LE",
459 "S24_3LE"};
460static char const *slim_sample_rate_text[] = {"KHZ_8", "KHZ_16",
461 "KHZ_32", "KHZ_44P1", "KHZ_48",
462 "KHZ_88P2", "KHZ_96", "KHZ_176P4",
463 "KHZ_192", "KHZ_352P8", "KHZ_384"};
464static char const *bt_sample_rate_text[] = {"KHZ_8", "KHZ_16",
465 "KHZ_44P1", "KHZ_48",
466 "KHZ_88P2", "KHZ_96"};
467static const char *const usb_ch_text[] = {"One", "Two", "Three", "Four",
468 "Five", "Six", "Seven",
469 "Eight"};
470static char const *ch_text[] = {"Two", "Three", "Four", "Five",
471 "Six", "Seven", "Eight"};
472static char const *usb_sample_rate_text[] = {"KHZ_8", "KHZ_11P025",
473 "KHZ_16", "KHZ_22P05",
474 "KHZ_32", "KHZ_44P1", "KHZ_48",
475 "KHZ_88P2", "KHZ_96", "KHZ_176P4",
476 "KHZ_192", "KHZ_352P8", "KHZ_384"};
477static char const *ext_disp_sample_rate_text[] = {"KHZ_48", "KHZ_96",
478 "KHZ_192", "KHZ_32", "KHZ_44P1",
479 "KHZ_88P2", "KHZ_176P4" };
480static char const *tdm_ch_text[] = {"One", "Two", "Three", "Four",
481 "Five", "Six", "Seven", "Eight"};
482static char const *tdm_bit_format_text[] = {"S16_LE", "S24_LE", "S32_LE"};
483static char const *tdm_sample_rate_text[] = {"KHZ_8", "KHZ_16", "KHZ_32",
484 "KHZ_48", "KHZ_176P4",
485 "KHZ_352P8"};
486static const char *const auxpcm_rate_text[] = {"KHZ_8", "KHZ_16"};
487static char const *mi2s_rate_text[] = {"KHZ_8", "KHZ_11P025", "KHZ_16",
488 "KHZ_22P05", "KHZ_32", "KHZ_44P1",
489 "KHZ_48", "KHZ_96", "KHZ_192"};
490static const char *const mi2s_ch_text[] = {"One", "Two", "Three", "Four",
491 "Five", "Six", "Seven",
492 "Eight"};
493static const char *const hifi_text[] = {"Off", "On"};
494static const char *const qos_text[] = {"Disable", "Enable"};
495
496static const char *const cdc_dma_rx_ch_text[] = {"One", "Two"};
497static const char *const cdc_dma_tx_ch_text[] = {"One", "Two", "Three", "Four",
498 "Five", "Six", "Seven",
499 "Eight"};
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]500static char const *cdc_dma_sample_rate_text[] = {"KHZ_8", "KHZ_11P025",
501 "KHZ_16", "KHZ_22P05",
502 "KHZ_32", "KHZ_44P1", "KHZ_48",
503 "KHZ_88P2", "KHZ_96",
504 "KHZ_176P4", "KHZ_192",
505 "KHZ_352P8", "KHZ_384"};
506
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]507
508static SOC_ENUM_SINGLE_EXT_DECL(slim_0_rx_chs, slim_rx_ch_text);
509static SOC_ENUM_SINGLE_EXT_DECL(slim_2_rx_chs, slim_rx_ch_text);
510static SOC_ENUM_SINGLE_EXT_DECL(slim_0_tx_chs, slim_tx_ch_text);
511static SOC_ENUM_SINGLE_EXT_DECL(slim_1_tx_chs, slim_tx_ch_text);
512static SOC_ENUM_SINGLE_EXT_DECL(slim_5_rx_chs, slim_rx_ch_text);
513static SOC_ENUM_SINGLE_EXT_DECL(slim_6_rx_chs, slim_rx_ch_text);
514static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_chs, usb_ch_text);
515static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_chs, usb_ch_text);
516static SOC_ENUM_SINGLE_EXT_DECL(vi_feed_tx_chs, vi_feed_ch_text);
517static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_chs, ch_text);
518static SOC_ENUM_SINGLE_EXT_DECL(proxy_rx_chs, ch_text);
519static SOC_ENUM_SINGLE_EXT_DECL(slim_0_rx_format, bit_format_text);
520static SOC_ENUM_SINGLE_EXT_DECL(slim_5_rx_format, bit_format_text);
521static SOC_ENUM_SINGLE_EXT_DECL(slim_6_rx_format, bit_format_text);
522static SOC_ENUM_SINGLE_EXT_DECL(slim_0_tx_format, bit_format_text);
523static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_format, bit_format_text);
524static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_format, bit_format_text);
525static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_format, ext_disp_bit_format_text);
526static SOC_ENUM_SINGLE_EXT_DECL(slim_0_rx_sample_rate, slim_sample_rate_text);
527static SOC_ENUM_SINGLE_EXT_DECL(slim_2_rx_sample_rate, slim_sample_rate_text);
528static SOC_ENUM_SINGLE_EXT_DECL(slim_0_tx_sample_rate, slim_sample_rate_text);
529static SOC_ENUM_SINGLE_EXT_DECL(slim_5_rx_sample_rate, slim_sample_rate_text);
530static SOC_ENUM_SINGLE_EXT_DECL(slim_6_rx_sample_rate, slim_sample_rate_text);
531static SOC_ENUM_SINGLE_EXT_DECL(bt_sample_rate, bt_sample_rate_text);
532static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_sample_rate, usb_sample_rate_text);
533static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_sample_rate, usb_sample_rate_text);
534static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_sample_rate,
535 ext_disp_sample_rate_text);
536static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_chs, tdm_ch_text);
537static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_format, tdm_bit_format_text);
538static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_sample_rate, tdm_sample_rate_text);
539static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_chs, tdm_ch_text);
540static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_format, tdm_bit_format_text);
541static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_sample_rate, tdm_sample_rate_text);
542static SOC_ENUM_SINGLE_EXT_DECL(prim_aux_pcm_rx_sample_rate, auxpcm_rate_text);
543static SOC_ENUM_SINGLE_EXT_DECL(sec_aux_pcm_rx_sample_rate, auxpcm_rate_text);
544static SOC_ENUM_SINGLE_EXT_DECL(tert_aux_pcm_rx_sample_rate, auxpcm_rate_text);
545static SOC_ENUM_SINGLE_EXT_DECL(quat_aux_pcm_rx_sample_rate, auxpcm_rate_text);
546static SOC_ENUM_SINGLE_EXT_DECL(quin_aux_pcm_rx_sample_rate, auxpcm_rate_text);
547static SOC_ENUM_SINGLE_EXT_DECL(prim_aux_pcm_tx_sample_rate, auxpcm_rate_text);
548static SOC_ENUM_SINGLE_EXT_DECL(sec_aux_pcm_tx_sample_rate, auxpcm_rate_text);
549static SOC_ENUM_SINGLE_EXT_DECL(tert_aux_pcm_tx_sample_rate, auxpcm_rate_text);
550static SOC_ENUM_SINGLE_EXT_DECL(quat_aux_pcm_tx_sample_rate, auxpcm_rate_text);
551static SOC_ENUM_SINGLE_EXT_DECL(quin_aux_pcm_tx_sample_rate, auxpcm_rate_text);
552static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_rx_sample_rate, mi2s_rate_text);
553static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_rx_sample_rate, mi2s_rate_text);
554static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_rx_sample_rate, mi2s_rate_text);
555static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_rx_sample_rate, mi2s_rate_text);
556static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_rx_sample_rate, mi2s_rate_text);
557static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_tx_sample_rate, mi2s_rate_text);
558static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_tx_sample_rate, mi2s_rate_text);
559static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_tx_sample_rate, mi2s_rate_text);
560static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_tx_sample_rate, mi2s_rate_text);
561static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_tx_sample_rate, mi2s_rate_text);
562static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_rx_chs, mi2s_ch_text);
563static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_tx_chs, mi2s_ch_text);
564static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_rx_chs, mi2s_ch_text);
565static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_tx_chs, mi2s_ch_text);
566static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_rx_chs, mi2s_ch_text);
567static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_tx_chs, mi2s_ch_text);
568static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_rx_chs, mi2s_ch_text);
569static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_tx_chs, mi2s_ch_text);
570static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_rx_chs, mi2s_ch_text);
571static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_tx_chs, mi2s_ch_text);
572static SOC_ENUM_SINGLE_EXT_DECL(mi2s_rx_format, bit_format_text);
573static SOC_ENUM_SINGLE_EXT_DECL(mi2s_tx_format, bit_format_text);
574static SOC_ENUM_SINGLE_EXT_DECL(aux_pcm_rx_format, bit_format_text);
575static SOC_ENUM_SINGLE_EXT_DECL(aux_pcm_tx_format, bit_format_text);
576static SOC_ENUM_SINGLE_EXT_DECL(hifi_function, hifi_text);
577static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_chs, cdc_dma_rx_ch_text);
578static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_chs, cdc_dma_rx_ch_text);
579static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_chs, cdc_dma_rx_ch_text);
580static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_chs, cdc_dma_rx_ch_text);
581static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_chs, cdc_dma_rx_ch_text);
582static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_chs, cdc_dma_rx_ch_text);
583static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_chs, cdc_dma_rx_ch_text);
584static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_0_chs, cdc_dma_tx_ch_text);
585static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_chs, cdc_dma_tx_ch_text);
586static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_chs, cdc_dma_tx_ch_text);
587static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_chs, cdc_dma_tx_ch_text);
588static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_chs, cdc_dma_tx_ch_text);
589static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_chs, cdc_dma_tx_ch_text);
590static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_format, bit_format_text);
591static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_format, bit_format_text);
592static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_format, bit_format_text);
593static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_format, bit_format_text);
594static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_format, bit_format_text);
595static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_format, bit_format_text);
596static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_format, bit_format_text);
597static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_format, bit_format_text);
598static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_format, bit_format_text);
599static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_format, bit_format_text);
600static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_format, bit_format_text);
601static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_format, bit_format_text);
602static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_sample_rate,
603 cdc_dma_sample_rate_text);
604static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_sample_rate,
605 cdc_dma_sample_rate_text);
606static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_sample_rate,
607 cdc_dma_sample_rate_text);
608static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_sample_rate,
609 cdc_dma_sample_rate_text);
610static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_sample_rate,
611 cdc_dma_sample_rate_text);
612static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_sample_rate,
613 cdc_dma_sample_rate_text);
614static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_sample_rate,
615 cdc_dma_sample_rate_text);
616static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_0_sample_rate,
617 cdc_dma_sample_rate_text);
618static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_sample_rate,
619 cdc_dma_sample_rate_text);
620static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_sample_rate,
621 cdc_dma_sample_rate_text);
622static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_sample_rate,
623 cdc_dma_sample_rate_text);
624static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_sample_rate,
625 cdc_dma_sample_rate_text);
626static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_sample_rate,
627 cdc_dma_sample_rate_text);
628
629static struct platform_device *spdev;
630
631static int msm_hifi_control;
632static bool is_initial_boot;
633static bool codec_reg_done;
634static struct snd_soc_aux_dev *msm_aux_dev;
635static struct snd_soc_codec_conf *msm_codec_conf;
636static struct msm_asoc_wcd93xx_codec msm_codec_fn;
637
638static int dmic_0_1_gpio_cnt;
639static int dmic_2_3_gpio_cnt;
640
641static void *def_wcd_mbhc_cal(void);
642static int msm_snd_enable_codec_ext_clk(struct snd_soc_codec *codec,
643 int enable, bool dapm);
644static int msm_wsa881x_init(struct snd_soc_component *component);
645static int msm_aux_codec_init(struct snd_soc_component *component);
646
647/*
648 * Need to report LINEIN
649 * if R/L channel impedance is larger than 5K ohm
650 */
651static struct wcd_mbhc_config wcd_mbhc_cfg = {
652 .read_fw_bin = false,
653 .calibration = NULL,
654 .detect_extn_cable = true,
655 .mono_stero_detection = false,
656 .swap_gnd_mic = NULL,
657 .hs_ext_micbias = true,
658 .key_code[0] = KEY_MEDIA,
659 .key_code[1] = KEY_VOICECOMMAND,
660 .key_code[2] = KEY_VOLUMEUP,
661 .key_code[3] = KEY_VOLUMEDOWN,
662 .key_code[4] = 0,
663 .key_code[5] = 0,
664 .key_code[6] = 0,
665 .key_code[7] = 0,
666 .linein_th = 5000,
667 .moisture_en = true,
668 .mbhc_micbias = MIC_BIAS_2,
669 .anc_micbias = MIC_BIAS_2,
670 .enable_anc_mic_detect = false,
671};
672
673static struct snd_soc_dapm_route wcd_audio_paths_tavil[] = {
674 {"MIC BIAS1", NULL, "MCLK TX"},
675 {"MIC BIAS2", NULL, "MCLK TX"},
676 {"MIC BIAS3", NULL, "MCLK TX"},
677 {"MIC BIAS4", NULL, "MCLK TX"},
678};
679
680static struct afe_clk_set mi2s_clk[MI2S_MAX] = {
681 {
682 AFE_API_VERSION_I2S_CONFIG,
683 Q6AFE_LPASS_CLK_ID_PRI_MI2S_IBIT,
684 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
685 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
686 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
687 0,
688 },
689 {
690 AFE_API_VERSION_I2S_CONFIG,
691 Q6AFE_LPASS_CLK_ID_SEC_MI2S_IBIT,
692 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
693 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
694 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
695 0,
696 },
697 {
698 AFE_API_VERSION_I2S_CONFIG,
699 Q6AFE_LPASS_CLK_ID_TER_MI2S_IBIT,
700 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
701 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
702 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
703 0,
704 },
705 {
706 AFE_API_VERSION_I2S_CONFIG,
707 Q6AFE_LPASS_CLK_ID_QUAD_MI2S_IBIT,
708 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
709 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
710 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
711 0,
712 },
713 {
714 AFE_API_VERSION_I2S_CONFIG,
715 Q6AFE_LPASS_CLK_ID_QUI_MI2S_IBIT,
716 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
717 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
718 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
719 0,
720 }
721
722};
723
724static struct mi2s_conf mi2s_intf_conf[MI2S_MAX];
725
726static int slim_get_sample_rate_val(int sample_rate)
727{
728 int sample_rate_val = 0;
729
730 switch (sample_rate) {
731 case SAMPLING_RATE_8KHZ:
732 sample_rate_val = 0;
733 break;
734 case SAMPLING_RATE_16KHZ:
735 sample_rate_val = 1;
736 break;
737 case SAMPLING_RATE_32KHZ:
738 sample_rate_val = 2;
739 break;
740 case SAMPLING_RATE_44P1KHZ:
741 sample_rate_val = 3;
742 break;
743 case SAMPLING_RATE_48KHZ:
744 sample_rate_val = 4;
745 break;
746 case SAMPLING_RATE_88P2KHZ:
747 sample_rate_val = 5;
748 break;
749 case SAMPLING_RATE_96KHZ:
750 sample_rate_val = 6;
751 break;
752 case SAMPLING_RATE_176P4KHZ:
753 sample_rate_val = 7;
754 break;
755 case SAMPLING_RATE_192KHZ:
756 sample_rate_val = 8;
757 break;
758 case SAMPLING_RATE_352P8KHZ:
759 sample_rate_val = 9;
760 break;
761 case SAMPLING_RATE_384KHZ:
762 sample_rate_val = 10;
763 break;
764 default:
765 sample_rate_val = 4;
766 break;
767 }
768 return sample_rate_val;
769}
770
771static int slim_get_sample_rate(int value)
772{
773 int sample_rate = 0;
774
775 switch (value) {
776 case 0:
777 sample_rate = SAMPLING_RATE_8KHZ;
778 break;
779 case 1:
780 sample_rate = SAMPLING_RATE_16KHZ;
781 break;
782 case 2:
783 sample_rate = SAMPLING_RATE_32KHZ;
784 break;
785 case 3:
786 sample_rate = SAMPLING_RATE_44P1KHZ;
787 break;
788 case 4:
789 sample_rate = SAMPLING_RATE_48KHZ;
790 break;
791 case 5:
792 sample_rate = SAMPLING_RATE_88P2KHZ;
793 break;
794 case 6:
795 sample_rate = SAMPLING_RATE_96KHZ;
796 break;
797 case 7:
798 sample_rate = SAMPLING_RATE_176P4KHZ;
799 break;
800 case 8:
801 sample_rate = SAMPLING_RATE_192KHZ;
802 break;
803 case 9:
804 sample_rate = SAMPLING_RATE_352P8KHZ;
805 break;
806 case 10:
807 sample_rate = SAMPLING_RATE_384KHZ;
808 break;
809 default:
810 sample_rate = SAMPLING_RATE_48KHZ;
811 break;
812 }
813 return sample_rate;
814}
815
816static int slim_get_bit_format_val(int bit_format)
817{
818 int val = 0;
819
820 switch (bit_format) {
821 case SNDRV_PCM_FORMAT_S32_LE:
822 val = 3;
823 break;
824 case SNDRV_PCM_FORMAT_S24_3LE:
825 val = 2;
826 break;
827 case SNDRV_PCM_FORMAT_S24_LE:
828 val = 1;
829 break;
830 case SNDRV_PCM_FORMAT_S16_LE:
831 default:
832 val = 0;
833 break;
834 }
835 return val;
836}
837
838static int slim_get_bit_format(int val)
839{
840 int bit_fmt = SNDRV_PCM_FORMAT_S16_LE;
841
842 switch (val) {
843 case 0:
844 bit_fmt = SNDRV_PCM_FORMAT_S16_LE;
845 break;
846 case 1:
847 bit_fmt = SNDRV_PCM_FORMAT_S24_LE;
848 break;
849 case 2:
850 bit_fmt = SNDRV_PCM_FORMAT_S24_3LE;
851 break;
852 case 3:
853 bit_fmt = SNDRV_PCM_FORMAT_S32_LE;
854 break;
855 default:
856 bit_fmt = SNDRV_PCM_FORMAT_S16_LE;
857 break;
858 }
859 return bit_fmt;
860}
861
862static int slim_get_port_idx(struct snd_kcontrol *kcontrol)
863{
864 int port_id = 0;
865
866 if (strnstr(kcontrol->id.name, "SLIM_0_RX", sizeof("SLIM_0_RX"))) {
867 port_id = SLIM_RX_0;
868 } else if (strnstr(kcontrol->id.name,
869 "SLIM_2_RX", sizeof("SLIM_2_RX"))) {
870 port_id = SLIM_RX_2;
871 } else if (strnstr(kcontrol->id.name,
872 "SLIM_5_RX", sizeof("SLIM_5_RX"))) {
873 port_id = SLIM_RX_5;
874 } else if (strnstr(kcontrol->id.name,
875 "SLIM_6_RX", sizeof("SLIM_6_RX"))) {
876 port_id = SLIM_RX_6;
877 } else if (strnstr(kcontrol->id.name,
878 "SLIM_0_TX", sizeof("SLIM_0_TX"))) {
879 port_id = SLIM_TX_0;
880 } else if (strnstr(kcontrol->id.name,
881 "SLIM_1_TX", sizeof("SLIM_1_TX"))) {
882 port_id = SLIM_TX_1;
883 } else {
884 pr_err("%s: unsupported channel: %s\n",
885 __func__, kcontrol->id.name);
886 return -EINVAL;
887 }
888
889 return port_id;
890}
891
892static int slim_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
893 struct snd_ctl_elem_value *ucontrol)
894{
895 int ch_num = slim_get_port_idx(kcontrol);
896
897 if (ch_num < 0)
898 return ch_num;
899
900 ucontrol->value.enumerated.item[0] =
901 slim_get_sample_rate_val(slim_rx_cfg[ch_num].sample_rate);
902
903 pr_debug("%s: slim[%d]_rx_sample_rate = %d, item = %d\n", __func__,
904 ch_num, slim_rx_cfg[ch_num].sample_rate,
905 ucontrol->value.enumerated.item[0]);
906
907 return 0;
908}
909
910static int slim_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
911 struct snd_ctl_elem_value *ucontrol)
912{
913 int ch_num = slim_get_port_idx(kcontrol);
914
915 if (ch_num < 0)
916 return ch_num;
917
918 slim_rx_cfg[ch_num].sample_rate =
919 slim_get_sample_rate(ucontrol->value.enumerated.item[0]);
920
921 pr_debug("%s: slim[%d]_rx_sample_rate = %d, item = %d\n", __func__,
922 ch_num, slim_rx_cfg[ch_num].sample_rate,
923 ucontrol->value.enumerated.item[0]);
924
925 return 0;
926}
927
928static int slim_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
929 struct snd_ctl_elem_value *ucontrol)
930{
931 int ch_num = slim_get_port_idx(kcontrol);
932
933 if (ch_num < 0)
934 return ch_num;
935
936 ucontrol->value.enumerated.item[0] =
937 slim_get_sample_rate_val(slim_tx_cfg[ch_num].sample_rate);
938
939 pr_debug("%s: slim[%d]_tx_sample_rate = %d, item = %d\n", __func__,
940 ch_num, slim_tx_cfg[ch_num].sample_rate,
941 ucontrol->value.enumerated.item[0]);
942
943 return 0;
944}
945
946static int slim_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
947 struct snd_ctl_elem_value *ucontrol)
948{
949 int sample_rate = 0;
950 int ch_num = slim_get_port_idx(kcontrol);
951
952 if (ch_num < 0)
953 return ch_num;
954
955 sample_rate = slim_get_sample_rate(ucontrol->value.enumerated.item[0]);
956 if (sample_rate == SAMPLING_RATE_44P1KHZ) {
957 pr_err("%s: Unsupported sample rate %d: for Tx path\n",
958 __func__, sample_rate);
959 return -EINVAL;
960 }
961 slim_tx_cfg[ch_num].sample_rate = sample_rate;
962
963 pr_debug("%s: slim[%d]_tx_sample_rate = %d, value = %d\n", __func__,
964 ch_num, slim_tx_cfg[ch_num].sample_rate,
965 ucontrol->value.enumerated.item[0]);
966
967 return 0;
968}
969
970static int slim_rx_bit_format_get(struct snd_kcontrol *kcontrol,
971 struct snd_ctl_elem_value *ucontrol)
972{
973 int ch_num = slim_get_port_idx(kcontrol);
974
975 if (ch_num < 0)
976 return ch_num;
977
978 ucontrol->value.enumerated.item[0] =
979 slim_get_bit_format_val(slim_rx_cfg[ch_num].bit_format);
980
981 pr_debug("%s: slim[%d]_rx_bit_format = %d, ucontrol value = %d\n",
982 __func__, ch_num, slim_rx_cfg[ch_num].bit_format,
983 ucontrol->value.enumerated.item[0]);
984
985 return 0;
986}
987
988static int slim_rx_bit_format_put(struct snd_kcontrol *kcontrol,
989 struct snd_ctl_elem_value *ucontrol)
990{
991 int ch_num = slim_get_port_idx(kcontrol);
992
993 if (ch_num < 0)
994 return ch_num;
995
996 slim_rx_cfg[ch_num].bit_format =
997 slim_get_bit_format(ucontrol->value.enumerated.item[0]);
998
999 pr_debug("%s: slim[%d]_rx_bit_format = %d, ucontrol value = %d\n",
1000 __func__, ch_num, slim_rx_cfg[ch_num].bit_format,
1001 ucontrol->value.enumerated.item[0]);
1002
1003 return 0;
1004}
1005
1006static int slim_tx_bit_format_get(struct snd_kcontrol *kcontrol,
1007 struct snd_ctl_elem_value *ucontrol)
1008{
1009 int ch_num = slim_get_port_idx(kcontrol);
1010
1011 if (ch_num < 0)
1012 return ch_num;
1013
1014 ucontrol->value.enumerated.item[0] =
1015 slim_get_bit_format_val(slim_tx_cfg[ch_num].bit_format);
1016
1017 pr_debug("%s: slim[%d]_tx_bit_format = %d, ucontrol value = %d\n",
1018 __func__, ch_num, slim_tx_cfg[ch_num].bit_format,
1019 ucontrol->value.enumerated.item[0]);
1020
1021 return 0;
1022}
1023
1024static int slim_tx_bit_format_put(struct snd_kcontrol *kcontrol,
1025 struct snd_ctl_elem_value *ucontrol)
1026{
1027 int ch_num = slim_get_port_idx(kcontrol);
1028
1029 if (ch_num < 0)
1030 return ch_num;
1031
1032 slim_tx_cfg[ch_num].bit_format =
1033 slim_get_bit_format(ucontrol->value.enumerated.item[0]);
1034
1035 pr_debug("%s: slim[%d]_tx_bit_format = %d, ucontrol value = %d\n",
1036 __func__, ch_num, slim_tx_cfg[ch_num].bit_format,
1037 ucontrol->value.enumerated.item[0]);
1038
1039 return 0;
1040}
1041
1042static int slim_rx_ch_get(struct snd_kcontrol *kcontrol,
1043 struct snd_ctl_elem_value *ucontrol)
1044{
1045 int ch_num = slim_get_port_idx(kcontrol);
1046
1047 if (ch_num < 0)
1048 return ch_num;
1049
1050 pr_debug("%s: msm_slim_[%d]_rx_ch = %d\n", __func__,
1051 ch_num, slim_rx_cfg[ch_num].channels);
1052 ucontrol->value.enumerated.item[0] = slim_rx_cfg[ch_num].channels - 1;
1053
1054 return 0;
1055}
1056
1057static int slim_rx_ch_put(struct snd_kcontrol *kcontrol,
1058 struct snd_ctl_elem_value *ucontrol)
1059{
1060 int ch_num = slim_get_port_idx(kcontrol);
1061
1062 if (ch_num < 0)
1063 return ch_num;
1064
1065 slim_rx_cfg[ch_num].channels = ucontrol->value.enumerated.item[0] + 1;
1066 pr_debug("%s: msm_slim_[%d]_rx_ch = %d\n", __func__,
1067 ch_num, slim_rx_cfg[ch_num].channels);
1068
1069 return 1;
1070}
1071
1072static int slim_tx_ch_get(struct snd_kcontrol *kcontrol,
1073 struct snd_ctl_elem_value *ucontrol)
1074{
1075 int ch_num = slim_get_port_idx(kcontrol);
1076
1077 if (ch_num < 0)
1078 return ch_num;
1079
1080 pr_debug("%s: msm_slim_[%d]_tx_ch = %d\n", __func__,
1081 ch_num, slim_tx_cfg[ch_num].channels);
1082 ucontrol->value.enumerated.item[0] = slim_tx_cfg[ch_num].channels - 1;
1083
1084 return 0;
1085}
1086
1087static int slim_tx_ch_put(struct snd_kcontrol *kcontrol,
1088 struct snd_ctl_elem_value *ucontrol)
1089{
1090 int ch_num = slim_get_port_idx(kcontrol);
1091
1092 if (ch_num < 0)
1093 return ch_num;
1094
1095 slim_tx_cfg[ch_num].channels = ucontrol->value.enumerated.item[0] + 1;
1096 pr_debug("%s: msm_slim_[%d]_tx_ch = %d\n", __func__,
1097 ch_num, slim_tx_cfg[ch_num].channels);
1098
1099 return 1;
1100}
1101
1102static int msm_vi_feed_tx_ch_get(struct snd_kcontrol *kcontrol,
1103 struct snd_ctl_elem_value *ucontrol)
1104{
1105 ucontrol->value.integer.value[0] = msm_vi_feed_tx_ch - 1;
1106 pr_debug("%s: msm_vi_feed_tx_ch = %ld\n", __func__,
1107 ucontrol->value.integer.value[0]);
1108 return 0;
1109}
1110
1111static int msm_vi_feed_tx_ch_put(struct snd_kcontrol *kcontrol,
1112 struct snd_ctl_elem_value *ucontrol)
1113{
1114 msm_vi_feed_tx_ch = ucontrol->value.integer.value[0] + 1;
1115
1116 pr_debug("%s: msm_vi_feed_tx_ch = %d\n", __func__, msm_vi_feed_tx_ch);
1117 return 1;
1118}
1119
1120static int msm_bt_sample_rate_get(struct snd_kcontrol *kcontrol,
1121 struct snd_ctl_elem_value *ucontrol)
1122{
1123 /*
1124 * Slimbus_7_Rx/Tx sample rate values should always be in sync (same)
1125 * when used for BT_SCO use case. Return either Rx or Tx sample rate
1126 * value.
1127 */
1128 switch (slim_rx_cfg[SLIM_RX_7].sample_rate) {
1129 case SAMPLING_RATE_96KHZ:
1130 ucontrol->value.integer.value[0] = 5;
1131 break;
1132 case SAMPLING_RATE_88P2KHZ:
1133 ucontrol->value.integer.value[0] = 4;
1134 break;
1135 case SAMPLING_RATE_48KHZ:
1136 ucontrol->value.integer.value[0] = 3;
1137 break;
1138 case SAMPLING_RATE_44P1KHZ:
1139 ucontrol->value.integer.value[0] = 2;
1140 break;
1141 case SAMPLING_RATE_16KHZ:
1142 ucontrol->value.integer.value[0] = 1;
1143 break;
1144 case SAMPLING_RATE_8KHZ:
1145 default:
1146 ucontrol->value.integer.value[0] = 0;
1147 break;
1148 }
1149 pr_debug("%s: sample rate = %d\n", __func__,
1150 slim_rx_cfg[SLIM_RX_7].sample_rate);
1151
1152 return 0;
1153}
1154
1155static int msm_bt_sample_rate_put(struct snd_kcontrol *kcontrol,
1156 struct snd_ctl_elem_value *ucontrol)
1157{
1158 switch (ucontrol->value.integer.value[0]) {
1159 case 1:
1160 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_16KHZ;
1161 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_16KHZ;
1162 break;
1163 case 2:
1164 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
1165 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
1166 break;
1167 case 3:
1168 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_48KHZ;
1169 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_48KHZ;
1170 break;
1171 case 4:
1172 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
1173 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
1174 break;
1175 case 5:
1176 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_96KHZ;
1177 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_96KHZ;
1178 break;
1179 case 0:
1180 default:
1181 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_8KHZ;
1182 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_8KHZ;
1183 break;
1184 }
1185 pr_debug("%s: sample rates: slim7_rx = %d, slim7_tx = %d, value = %d\n",
1186 __func__,
1187 slim_rx_cfg[SLIM_RX_7].sample_rate,
1188 slim_tx_cfg[SLIM_TX_7].sample_rate,
1189 ucontrol->value.enumerated.item[0]);
1190
1191 return 0;
1192}
1193
1194static int cdc_dma_get_port_idx(struct snd_kcontrol *kcontrol)
1195{
1196 int idx = 0;
1197
1198 if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_RX_0",
1199 sizeof("WSA_CDC_DMA_RX_0")))
1200 idx = WSA_CDC_DMA_RX_0;
1201 else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_RX_1",
1202 sizeof("WSA_CDC_DMA_RX_0")))
1203 idx = WSA_CDC_DMA_RX_1;
1204 else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_0",
1205 sizeof("RX_CDC_DMA_RX_0")))
1206 idx = RX_CDC_DMA_RX_0;
1207 else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_1",
1208 sizeof("RX_CDC_DMA_RX_1")))
1209 idx = RX_CDC_DMA_RX_1;
1210 else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_2",
1211 sizeof("RX_CDC_DMA_RX_2")))
1212 idx = RX_CDC_DMA_RX_2;
1213 else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_3",
1214 sizeof("RX_CDC_DMA_RX_3")))
1215 idx = RX_CDC_DMA_RX_3;
1216 else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_5",
1217 sizeof("RX_CDC_DMA_RX_5")))
1218 idx = RX_CDC_DMA_RX_5;
1219 else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_0",
1220 sizeof("WSA_CDC_DMA_TX_0")))
1221 idx = WSA_CDC_DMA_TX_0;
1222 else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_1",
1223 sizeof("WSA_CDC_DMA_TX_1")))
1224 idx = WSA_CDC_DMA_TX_1;
1225 else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_2",
1226 sizeof("WSA_CDC_DMA_TX_2")))
1227 idx = WSA_CDC_DMA_TX_2;
1228 else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_0",
1229 sizeof("TX_CDC_DMA_TX_0")))
1230 idx = TX_CDC_DMA_TX_0;
1231 else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_3",
1232 sizeof("TX_CDC_DMA_TX_3")))
1233 idx = TX_CDC_DMA_TX_3;
1234 else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_4",
1235 sizeof("TX_CDC_DMA_TX_4")))
1236 idx = TX_CDC_DMA_TX_4;
1237 else {
1238 pr_err("%s: unsupported channel: %s\n",
1239 __func__, kcontrol->id.name);
1240 return -EINVAL;
1241 }
1242
1243 return idx;
1244}
1245
1246static int cdc_dma_rx_ch_get(struct snd_kcontrol *kcontrol,
1247 struct snd_ctl_elem_value *ucontrol)
1248{
1249 int ch_num = cdc_dma_get_port_idx(kcontrol);
1250
1251 if (ch_num < 0)
1252 return ch_num;
1253
1254 pr_debug("%s: cdc_dma_rx_ch = %d\n", __func__,
1255 cdc_dma_rx_cfg[ch_num].channels - 1);
1256 ucontrol->value.integer.value[0] = cdc_dma_rx_cfg[ch_num].channels - 1;
1257 return 0;
1258}
1259
1260static int cdc_dma_rx_ch_put(struct snd_kcontrol *kcontrol,
1261 struct snd_ctl_elem_value *ucontrol)
1262{
1263 int ch_num = cdc_dma_get_port_idx(kcontrol);
1264
1265 if (ch_num < 0)
1266 return ch_num;
1267
1268 cdc_dma_rx_cfg[ch_num].channels = ucontrol->value.integer.value[0] + 1;
1269
1270 pr_debug("%s: cdc_dma_rx_ch = %d\n", __func__,
1271 cdc_dma_rx_cfg[ch_num].channels);
1272 return 1;
1273}
1274
1275static int cdc_dma_rx_format_get(struct snd_kcontrol *kcontrol,
1276 struct snd_ctl_elem_value *ucontrol)
1277{
1278 int ch_num = cdc_dma_get_port_idx(kcontrol);
1279
1280 switch (cdc_dma_rx_cfg[ch_num].bit_format) {
1281 case SNDRV_PCM_FORMAT_S32_LE:
1282 ucontrol->value.integer.value[0] = 3;
1283 break;
1284 case SNDRV_PCM_FORMAT_S24_3LE:
1285 ucontrol->value.integer.value[0] = 2;
1286 break;
1287 case SNDRV_PCM_FORMAT_S24_LE:
1288 ucontrol->value.integer.value[0] = 1;
1289 break;
1290 case SNDRV_PCM_FORMAT_S16_LE:
1291 default:
1292 ucontrol->value.integer.value[0] = 0;
1293 break;
1294 }
1295
1296 pr_debug("%s: cdc_dma_rx_format = %d, ucontrol value = %ld\n",
1297 __func__, cdc_dma_rx_cfg[ch_num].bit_format,
1298 ucontrol->value.integer.value[0]);
1299 return 0;
1300}
1301
1302static int cdc_dma_rx_format_put(struct snd_kcontrol *kcontrol,
1303 struct snd_ctl_elem_value *ucontrol)
1304{
1305 int rc = 0;
1306 int ch_num = cdc_dma_get_port_idx(kcontrol);
1307
1308 switch (ucontrol->value.integer.value[0]) {
1309 case 3:
1310 cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S32_LE;
1311 break;
1312 case 2:
1313 cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
1314 break;
1315 case 1:
1316 cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_LE;
1317 break;
1318 case 0:
1319 default:
1320 cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S16_LE;
1321 break;
1322 }
1323 pr_debug("%s: cdc_dma_rx_format = %d, ucontrol value = %ld\n",
1324 __func__, cdc_dma_rx_cfg[ch_num].bit_format,
1325 ucontrol->value.integer.value[0]);
1326
1327 return rc;
1328}
1329
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1330
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1331static int cdc_dma_get_sample_rate_val(int sample_rate)
1332{
1333 int sample_rate_val = 0;
1334
1335 switch (sample_rate) {
1336 case SAMPLING_RATE_8KHZ:
1337 sample_rate_val = 0;
1338 break;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1339 case SAMPLING_RATE_11P025KHZ:
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1340 sample_rate_val = 1;
1341 break;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1342 case SAMPLING_RATE_16KHZ:
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1343 sample_rate_val = 2;
1344 break;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1345 case SAMPLING_RATE_22P05KHZ:
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1346 sample_rate_val = 3;
1347 break;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1348 case SAMPLING_RATE_32KHZ:
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1349 sample_rate_val = 4;
1350 break;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1351 case SAMPLING_RATE_44P1KHZ:
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1352 sample_rate_val = 5;
1353 break;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1354 case SAMPLING_RATE_48KHZ:
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1355 sample_rate_val = 6;
1356 break;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1357 case SAMPLING_RATE_88P2KHZ:
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1358 sample_rate_val = 7;
1359 break;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1360 case SAMPLING_RATE_96KHZ:
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1361 sample_rate_val = 8;
1362 break;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1363 case SAMPLING_RATE_176P4KHZ:
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1364 sample_rate_val = 9;
1365 break;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1366 case SAMPLING_RATE_192KHZ:
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1367 sample_rate_val = 10;
1368 break;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1369 case SAMPLING_RATE_352P8KHZ:
1370 sample_rate_val = 11;
1371 break;
1372 case SAMPLING_RATE_384KHZ:
1373 sample_rate_val = 12;
1374 break;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1375 default:
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1376 sample_rate_val = 6;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1377 break;
1378 }
1379 return sample_rate_val;
1380}
1381
1382static int cdc_dma_get_sample_rate(int value)
1383{
1384 int sample_rate = 0;
1385
1386 switch (value) {
1387 case 0:
1388 sample_rate = SAMPLING_RATE_8KHZ;
1389 break;
1390 case 1:
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1391 sample_rate = SAMPLING_RATE_11P025KHZ;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1392 break;
1393 case 2:
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1394 sample_rate = SAMPLING_RATE_16KHZ;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1395 break;
1396 case 3:
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1397 sample_rate = SAMPLING_RATE_22P05KHZ;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1398 break;
1399 case 4:
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1400 sample_rate = SAMPLING_RATE_32KHZ;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1401 break;
1402 case 5:
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1403 sample_rate = SAMPLING_RATE_44P1KHZ;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1404 break;
1405 case 6:
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1406 sample_rate = SAMPLING_RATE_48KHZ;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1407 break;
1408 case 7:
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1409 sample_rate = SAMPLING_RATE_88P2KHZ;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1410 break;
1411 case 8:
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1412 sample_rate = SAMPLING_RATE_96KHZ;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1413 break;
1414 case 9:
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1415 sample_rate = SAMPLING_RATE_176P4KHZ;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1416 break;
1417 case 10:
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1418 sample_rate = SAMPLING_RATE_192KHZ;
1419 break;
1420 case 11:
1421 sample_rate = SAMPLING_RATE_352P8KHZ;
1422 break;
1423 case 12:
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1424 sample_rate = SAMPLING_RATE_384KHZ;
1425 break;
1426 default:
1427 sample_rate = SAMPLING_RATE_48KHZ;
1428 break;
1429 }
1430 return sample_rate;
1431}
1432
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1433static int cdc_dma_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
1434 struct snd_ctl_elem_value *ucontrol)
1435{
1436 int ch_num = cdc_dma_get_port_idx(kcontrol);
1437
1438 if (ch_num < 0)
1439 return ch_num;
1440
1441 ucontrol->value.enumerated.item[0] =
1442 cdc_dma_get_sample_rate_val(cdc_dma_rx_cfg[ch_num].sample_rate);
1443
1444 pr_debug("%s: cdc_dma_rx_sample_rate = %d\n", __func__,
1445 cdc_dma_rx_cfg[ch_num].sample_rate);
1446 return 0;
1447}
1448
1449static int cdc_dma_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
1450 struct snd_ctl_elem_value *ucontrol)
1451{
1452 int ch_num = cdc_dma_get_port_idx(kcontrol);
1453
1454 if (ch_num < 0)
1455 return ch_num;
1456
1457 cdc_dma_rx_cfg[ch_num].sample_rate =
1458 cdc_dma_get_sample_rate(ucontrol->value.enumerated.item[0]);
1459
1460
1461 pr_debug("%s: control value = %d, cdc_dma_rx_sample_rate = %d\n",
1462 __func__, ucontrol->value.enumerated.item[0],
1463 cdc_dma_rx_cfg[ch_num].sample_rate);
1464 return 0;
1465}
1466
1467static int cdc_dma_tx_ch_get(struct snd_kcontrol *kcontrol,
1468 struct snd_ctl_elem_value *ucontrol)
1469{
1470 int ch_num = cdc_dma_get_port_idx(kcontrol);
1471
1472 pr_debug("%s: cdc_dma_tx_ch = %d\n", __func__,
1473 cdc_dma_tx_cfg[ch_num].channels);
1474 ucontrol->value.integer.value[0] = cdc_dma_tx_cfg[ch_num].channels - 1;
1475 return 0;
1476}
1477
1478static int cdc_dma_tx_ch_put(struct snd_kcontrol *kcontrol,
1479 struct snd_ctl_elem_value *ucontrol)
1480{
1481 int ch_num = cdc_dma_get_port_idx(kcontrol);
1482
1483 cdc_dma_tx_cfg[ch_num].channels = ucontrol->value.integer.value[0] + 1;
1484
1485 pr_debug("%s: cdc_dma_tx_ch = %d\n", __func__,
1486 cdc_dma_tx_cfg[ch_num].channels);
1487 return 1;
1488}
1489
1490static int cdc_dma_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
1491 struct snd_ctl_elem_value *ucontrol)
1492{
1493 int sample_rate_val;
1494 int ch_num = cdc_dma_get_port_idx(kcontrol);
1495
1496 switch (cdc_dma_tx_cfg[ch_num].sample_rate) {
1497 case SAMPLING_RATE_384KHZ:
1498 sample_rate_val = 12;
1499 break;
1500 case SAMPLING_RATE_352P8KHZ:
1501 sample_rate_val = 11;
1502 break;
1503 case SAMPLING_RATE_192KHZ:
1504 sample_rate_val = 10;
1505 break;
1506 case SAMPLING_RATE_176P4KHZ:
1507 sample_rate_val = 9;
1508 break;
1509 case SAMPLING_RATE_96KHZ:
1510 sample_rate_val = 8;
1511 break;
1512 case SAMPLING_RATE_88P2KHZ:
1513 sample_rate_val = 7;
1514 break;
1515 case SAMPLING_RATE_48KHZ:
1516 sample_rate_val = 6;
1517 break;
1518 case SAMPLING_RATE_44P1KHZ:
1519 sample_rate_val = 5;
1520 break;
1521 case SAMPLING_RATE_32KHZ:
1522 sample_rate_val = 4;
1523 break;
1524 case SAMPLING_RATE_22P05KHZ:
1525 sample_rate_val = 3;
1526 break;
1527 case SAMPLING_RATE_16KHZ:
1528 sample_rate_val = 2;
1529 break;
1530 case SAMPLING_RATE_11P025KHZ:
1531 sample_rate_val = 1;
1532 break;
1533 case SAMPLING_RATE_8KHZ:
1534 sample_rate_val = 0;
1535 break;
1536 default:
1537 sample_rate_val = 6;
1538 break;
1539 }
1540
1541 ucontrol->value.integer.value[0] = sample_rate_val;
1542 pr_debug("%s: cdc_dma_tx_sample_rate = %d\n", __func__,
1543 cdc_dma_tx_cfg[ch_num].sample_rate);
1544 return 0;
1545}
1546
1547static int cdc_dma_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
1548 struct snd_ctl_elem_value *ucontrol)
1549{
1550 int ch_num = cdc_dma_get_port_idx(kcontrol);
1551
1552 switch (ucontrol->value.integer.value[0]) {
1553 case 12:
1554 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_384KHZ;
1555 break;
1556 case 11:
1557 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_352P8KHZ;
1558 break;
1559 case 10:
1560 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_192KHZ;
1561 break;
1562 case 9:
1563 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_176P4KHZ;
1564 break;
1565 case 8:
1566 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_96KHZ;
1567 break;
1568 case 7:
1569 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_88P2KHZ;
1570 break;
1571 case 6:
1572 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_48KHZ;
1573 break;
1574 case 5:
1575 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_44P1KHZ;
1576 break;
1577 case 4:
1578 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_32KHZ;
1579 break;
1580 case 3:
1581 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_22P05KHZ;
1582 break;
1583 case 2:
1584 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_16KHZ;
1585 break;
1586 case 1:
1587 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_11P025KHZ;
1588 break;
1589 case 0:
1590 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_8KHZ;
1591 break;
1592 default:
1593 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_48KHZ;
1594 break;
1595 }
1596
1597 pr_debug("%s: control value = %ld, cdc_dma_tx_sample_rate = %d\n",
1598 __func__, ucontrol->value.integer.value[0],
1599 cdc_dma_tx_cfg[ch_num].sample_rate);
1600 return 0;
1601}
1602
1603static int cdc_dma_tx_format_get(struct snd_kcontrol *kcontrol,
1604 struct snd_ctl_elem_value *ucontrol)
1605{
1606 int ch_num = cdc_dma_get_port_idx(kcontrol);
1607
1608 switch (cdc_dma_tx_cfg[ch_num].bit_format) {
1609 case SNDRV_PCM_FORMAT_S32_LE:
1610 ucontrol->value.integer.value[0] = 3;
1611 break;
1612 case SNDRV_PCM_FORMAT_S24_3LE:
1613 ucontrol->value.integer.value[0] = 2;
1614 break;
1615 case SNDRV_PCM_FORMAT_S24_LE:
1616 ucontrol->value.integer.value[0] = 1;
1617 break;
1618 case SNDRV_PCM_FORMAT_S16_LE:
1619 default:
1620 ucontrol->value.integer.value[0] = 0;
1621 break;
1622 }
1623
1624 pr_debug("%s: cdc_dma_tx_format = %d, ucontrol value = %ld\n",
1625 __func__, cdc_dma_tx_cfg[ch_num].bit_format,
1626 ucontrol->value.integer.value[0]);
1627 return 0;
1628}
1629
1630static int cdc_dma_tx_format_put(struct snd_kcontrol *kcontrol,
1631 struct snd_ctl_elem_value *ucontrol)
1632{
1633 int rc = 0;
1634 int ch_num = cdc_dma_get_port_idx(kcontrol);
1635
1636 switch (ucontrol->value.integer.value[0]) {
1637 case 3:
1638 cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S32_LE;
1639 break;
1640 case 2:
1641 cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
1642 break;
1643 case 1:
1644 cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_LE;
1645 break;
1646 case 0:
1647 default:
1648 cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S16_LE;
1649 break;
1650 }
1651 pr_debug("%s: cdc_dma_tx_format = %d, ucontrol value = %ld\n",
1652 __func__, cdc_dma_tx_cfg[ch_num].bit_format,
1653 ucontrol->value.integer.value[0]);
1654
1655 return rc;
1656}
1657
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1658static int usb_audio_rx_ch_get(struct snd_kcontrol *kcontrol,
1659 struct snd_ctl_elem_value *ucontrol)
1660{
1661 pr_debug("%s: usb_audio_rx_ch = %d\n", __func__,
1662 usb_rx_cfg.channels);
1663 ucontrol->value.integer.value[0] = usb_rx_cfg.channels - 1;
1664 return 0;
1665}
1666
1667static int usb_audio_rx_ch_put(struct snd_kcontrol *kcontrol,
1668 struct snd_ctl_elem_value *ucontrol)
1669{
1670 usb_rx_cfg.channels = ucontrol->value.integer.value[0] + 1;
1671
1672 pr_debug("%s: usb_audio_rx_ch = %d\n", __func__, usb_rx_cfg.channels);
1673 return 1;
1674}
1675
1676static int usb_audio_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
1677 struct snd_ctl_elem_value *ucontrol)
1678{
1679 int sample_rate_val;
1680
1681 switch (usb_rx_cfg.sample_rate) {
1682 case SAMPLING_RATE_384KHZ:
1683 sample_rate_val = 12;
1684 break;
1685 case SAMPLING_RATE_352P8KHZ:
1686 sample_rate_val = 11;
1687 break;
1688 case SAMPLING_RATE_192KHZ:
1689 sample_rate_val = 10;
1690 break;
1691 case SAMPLING_RATE_176P4KHZ:
1692 sample_rate_val = 9;
1693 break;
1694 case SAMPLING_RATE_96KHZ:
1695 sample_rate_val = 8;
1696 break;
1697 case SAMPLING_RATE_88P2KHZ:
1698 sample_rate_val = 7;
1699 break;
1700 case SAMPLING_RATE_48KHZ:
1701 sample_rate_val = 6;
1702 break;
1703 case SAMPLING_RATE_44P1KHZ:
1704 sample_rate_val = 5;
1705 break;
1706 case SAMPLING_RATE_32KHZ:
1707 sample_rate_val = 4;
1708 break;
1709 case SAMPLING_RATE_22P05KHZ:
1710 sample_rate_val = 3;
1711 break;
1712 case SAMPLING_RATE_16KHZ:
1713 sample_rate_val = 2;
1714 break;
1715 case SAMPLING_RATE_11P025KHZ:
1716 sample_rate_val = 1;
1717 break;
1718 case SAMPLING_RATE_8KHZ:
1719 default:
1720 sample_rate_val = 0;
1721 break;
1722 }
1723
1724 ucontrol->value.integer.value[0] = sample_rate_val;
1725 pr_debug("%s: usb_audio_rx_sample_rate = %d\n", __func__,
1726 usb_rx_cfg.sample_rate);
1727 return 0;
1728}
1729
1730static int usb_audio_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
1731 struct snd_ctl_elem_value *ucontrol)
1732{
1733 switch (ucontrol->value.integer.value[0]) {
1734 case 12:
1735 usb_rx_cfg.sample_rate = SAMPLING_RATE_384KHZ;
1736 break;
1737 case 11:
1738 usb_rx_cfg.sample_rate = SAMPLING_RATE_352P8KHZ;
1739 break;
1740 case 10:
1741 usb_rx_cfg.sample_rate = SAMPLING_RATE_192KHZ;
1742 break;
1743 case 9:
1744 usb_rx_cfg.sample_rate = SAMPLING_RATE_176P4KHZ;
1745 break;
1746 case 8:
1747 usb_rx_cfg.sample_rate = SAMPLING_RATE_96KHZ;
1748 break;
1749 case 7:
1750 usb_rx_cfg.sample_rate = SAMPLING_RATE_88P2KHZ;
1751 break;
1752 case 6:
1753 usb_rx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
1754 break;
1755 case 5:
1756 usb_rx_cfg.sample_rate = SAMPLING_RATE_44P1KHZ;
1757 break;
1758 case 4:
1759 usb_rx_cfg.sample_rate = SAMPLING_RATE_32KHZ;
1760 break;
1761 case 3:
1762 usb_rx_cfg.sample_rate = SAMPLING_RATE_22P05KHZ;
1763 break;
1764 case 2:
1765 usb_rx_cfg.sample_rate = SAMPLING_RATE_16KHZ;
1766 break;
1767 case 1:
1768 usb_rx_cfg.sample_rate = SAMPLING_RATE_11P025KHZ;
1769 break;
1770 case 0:
1771 usb_rx_cfg.sample_rate = SAMPLING_RATE_8KHZ;
1772 break;
1773 default:
1774 usb_rx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
1775 break;
1776 }
1777
1778 pr_debug("%s: control value = %ld, usb_audio_rx_sample_rate = %d\n",
1779 __func__, ucontrol->value.integer.value[0],
1780 usb_rx_cfg.sample_rate);
1781 return 0;
1782}
1783
1784static int usb_audio_rx_format_get(struct snd_kcontrol *kcontrol,
1785 struct snd_ctl_elem_value *ucontrol)
1786{
1787 switch (usb_rx_cfg.bit_format) {
1788 case SNDRV_PCM_FORMAT_S32_LE:
1789 ucontrol->value.integer.value[0] = 3;
1790 break;
1791 case SNDRV_PCM_FORMAT_S24_3LE:
1792 ucontrol->value.integer.value[0] = 2;
1793 break;
1794 case SNDRV_PCM_FORMAT_S24_LE:
1795 ucontrol->value.integer.value[0] = 1;
1796 break;
1797 case SNDRV_PCM_FORMAT_S16_LE:
1798 default:
1799 ucontrol->value.integer.value[0] = 0;
1800 break;
1801 }
1802
1803 pr_debug("%s: usb_audio_rx_format = %d, ucontrol value = %ld\n",
1804 __func__, usb_rx_cfg.bit_format,
1805 ucontrol->value.integer.value[0]);
1806 return 0;
1807}
1808
1809static int usb_audio_rx_format_put(struct snd_kcontrol *kcontrol,
1810 struct snd_ctl_elem_value *ucontrol)
1811{
1812 int rc = 0;
1813
1814 switch (ucontrol->value.integer.value[0]) {
1815 case 3:
1816 usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S32_LE;
1817 break;
1818 case 2:
1819 usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_3LE;
1820 break;
1821 case 1:
1822 usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_LE;
1823 break;
1824 case 0:
1825 default:
1826 usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S16_LE;
1827 break;
1828 }
1829 pr_debug("%s: usb_audio_rx_format = %d, ucontrol value = %ld\n",
1830 __func__, usb_rx_cfg.bit_format,
1831 ucontrol->value.integer.value[0]);
1832
1833 return rc;
1834}
1835
1836static int usb_audio_tx_ch_get(struct snd_kcontrol *kcontrol,
1837 struct snd_ctl_elem_value *ucontrol)
1838{
1839 pr_debug("%s: usb_audio_tx_ch = %d\n", __func__,
1840 usb_tx_cfg.channels);
1841 ucontrol->value.integer.value[0] = usb_tx_cfg.channels - 1;
1842 return 0;
1843}
1844
1845static int usb_audio_tx_ch_put(struct snd_kcontrol *kcontrol,
1846 struct snd_ctl_elem_value *ucontrol)
1847{
1848 usb_tx_cfg.channels = ucontrol->value.integer.value[0] + 1;
1849
1850 pr_debug("%s: usb_audio_tx_ch = %d\n", __func__, usb_tx_cfg.channels);
1851 return 1;
1852}
1853
1854static int usb_audio_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
1855 struct snd_ctl_elem_value *ucontrol)
1856{
1857 int sample_rate_val;
1858
1859 switch (usb_tx_cfg.sample_rate) {
1860 case SAMPLING_RATE_384KHZ:
1861 sample_rate_val = 12;
1862 break;
1863 case SAMPLING_RATE_352P8KHZ:
1864 sample_rate_val = 11;
1865 break;
1866 case SAMPLING_RATE_192KHZ:
1867 sample_rate_val = 10;
1868 break;
1869 case SAMPLING_RATE_176P4KHZ:
1870 sample_rate_val = 9;
1871 break;
1872 case SAMPLING_RATE_96KHZ:
1873 sample_rate_val = 8;
1874 break;
1875 case SAMPLING_RATE_88P2KHZ:
1876 sample_rate_val = 7;
1877 break;
1878 case SAMPLING_RATE_48KHZ:
1879 sample_rate_val = 6;
1880 break;
1881 case SAMPLING_RATE_44P1KHZ:
1882 sample_rate_val = 5;
1883 break;
1884 case SAMPLING_RATE_32KHZ:
1885 sample_rate_val = 4;
1886 break;
1887 case SAMPLING_RATE_22P05KHZ:
1888 sample_rate_val = 3;
1889 break;
1890 case SAMPLING_RATE_16KHZ:
1891 sample_rate_val = 2;
1892 break;
1893 case SAMPLING_RATE_11P025KHZ:
1894 sample_rate_val = 1;
1895 break;
1896 case SAMPLING_RATE_8KHZ:
1897 sample_rate_val = 0;
1898 break;
1899 default:
1900 sample_rate_val = 6;
1901 break;
1902 }
1903
1904 ucontrol->value.integer.value[0] = sample_rate_val;
1905 pr_debug("%s: usb_audio_tx_sample_rate = %d\n", __func__,
1906 usb_tx_cfg.sample_rate);
1907 return 0;
1908}
1909
1910static int usb_audio_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
1911 struct snd_ctl_elem_value *ucontrol)
1912{
1913 switch (ucontrol->value.integer.value[0]) {
1914 case 12:
1915 usb_tx_cfg.sample_rate = SAMPLING_RATE_384KHZ;
1916 break;
1917 case 11:
1918 usb_tx_cfg.sample_rate = SAMPLING_RATE_352P8KHZ;
1919 break;
1920 case 10:
1921 usb_tx_cfg.sample_rate = SAMPLING_RATE_192KHZ;
1922 break;
1923 case 9:
1924 usb_tx_cfg.sample_rate = SAMPLING_RATE_176P4KHZ;
1925 break;
1926 case 8:
1927 usb_tx_cfg.sample_rate = SAMPLING_RATE_96KHZ;
1928 break;
1929 case 7:
1930 usb_tx_cfg.sample_rate = SAMPLING_RATE_88P2KHZ;
1931 break;
1932 case 6:
1933 usb_tx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
1934 break;
1935 case 5:
1936 usb_tx_cfg.sample_rate = SAMPLING_RATE_44P1KHZ;
1937 break;
1938 case 4:
1939 usb_tx_cfg.sample_rate = SAMPLING_RATE_32KHZ;
1940 break;
1941 case 3:
1942 usb_tx_cfg.sample_rate = SAMPLING_RATE_22P05KHZ;
1943 break;
1944 case 2:
1945 usb_tx_cfg.sample_rate = SAMPLING_RATE_16KHZ;
1946 break;
1947 case 1:
1948 usb_tx_cfg.sample_rate = SAMPLING_RATE_11P025KHZ;
1949 break;
1950 case 0:
1951 usb_tx_cfg.sample_rate = SAMPLING_RATE_8KHZ;
1952 break;
1953 default:
1954 usb_tx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
1955 break;
1956 }
1957
1958 pr_debug("%s: control value = %ld, usb_audio_tx_sample_rate = %d\n",
1959 __func__, ucontrol->value.integer.value[0],
1960 usb_tx_cfg.sample_rate);
1961 return 0;
1962}
1963
1964static int usb_audio_tx_format_get(struct snd_kcontrol *kcontrol,
1965 struct snd_ctl_elem_value *ucontrol)
1966{
1967 switch (usb_tx_cfg.bit_format) {
1968 case SNDRV_PCM_FORMAT_S32_LE:
1969 ucontrol->value.integer.value[0] = 3;
1970 break;
1971 case SNDRV_PCM_FORMAT_S24_3LE:
1972 ucontrol->value.integer.value[0] = 2;
1973 break;
1974 case SNDRV_PCM_FORMAT_S24_LE:
1975 ucontrol->value.integer.value[0] = 1;
1976 break;
1977 case SNDRV_PCM_FORMAT_S16_LE:
1978 default:
1979 ucontrol->value.integer.value[0] = 0;
1980 break;
1981 }
1982
1983 pr_debug("%s: usb_audio_tx_format = %d, ucontrol value = %ld\n",
1984 __func__, usb_tx_cfg.bit_format,
1985 ucontrol->value.integer.value[0]);
1986 return 0;
1987}
1988
1989static int usb_audio_tx_format_put(struct snd_kcontrol *kcontrol,
1990 struct snd_ctl_elem_value *ucontrol)
1991{
1992 int rc = 0;
1993
1994 switch (ucontrol->value.integer.value[0]) {
1995 case 3:
1996 usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S32_LE;
1997 break;
1998 case 2:
1999 usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_3LE;
2000 break;
2001 case 1:
2002 usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_LE;
2003 break;
2004 case 0:
2005 default:
2006 usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S16_LE;
2007 break;
2008 }
2009 pr_debug("%s: usb_audio_tx_format = %d, ucontrol value = %ld\n",
2010 __func__, usb_tx_cfg.bit_format,
2011 ucontrol->value.integer.value[0]);
2012
2013 return rc;
2014}
2015
2016static int ext_disp_get_port_idx(struct snd_kcontrol *kcontrol)
2017{
2018 int idx;
2019
2020 if (strnstr(kcontrol->id.name, "Display Port RX",
2021 sizeof("Display Port RX"))) {
2022 idx = DP_RX_IDX;
2023 } else {
2024 pr_err("%s: unsupported BE: %s\n",
2025 __func__, kcontrol->id.name);
2026 idx = -EINVAL;
2027 }
2028
2029 return idx;
2030}
2031
2032static int ext_disp_rx_format_get(struct snd_kcontrol *kcontrol,
2033 struct snd_ctl_elem_value *ucontrol)
2034{
2035 int idx = ext_disp_get_port_idx(kcontrol);
2036
2037 if (idx < 0)
2038 return idx;
2039
2040 switch (ext_disp_rx_cfg[idx].bit_format) {
2041 case SNDRV_PCM_FORMAT_S24_3LE:
2042 ucontrol->value.integer.value[0] = 2;
2043 break;
2044 case SNDRV_PCM_FORMAT_S24_LE:
2045 ucontrol->value.integer.value[0] = 1;
2046 break;
2047 case SNDRV_PCM_FORMAT_S16_LE:
2048 default:
2049 ucontrol->value.integer.value[0] = 0;
2050 break;
2051 }
2052
2053 pr_debug("%s: ext_disp_rx[%d].format = %d, ucontrol value = %ld\n",
2054 __func__, idx, ext_disp_rx_cfg[idx].bit_format,
2055 ucontrol->value.integer.value[0]);
2056 return 0;
2057}
2058
2059static int ext_disp_rx_format_put(struct snd_kcontrol *kcontrol,
2060 struct snd_ctl_elem_value *ucontrol)
2061{
2062 int idx = ext_disp_get_port_idx(kcontrol);
2063
2064 if (idx < 0)
2065 return idx;
2066
2067 switch (ucontrol->value.integer.value[0]) {
2068 case 2:
2069 ext_disp_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
2070 break;
2071 case 1:
2072 ext_disp_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S24_LE;
2073 break;
2074 case 0:
2075 default:
2076 ext_disp_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S16_LE;
2077 break;
2078 }
2079 pr_debug("%s: ext_disp_rx[%d].format = %d, ucontrol value = %ld\n",
2080 __func__, idx, ext_disp_rx_cfg[idx].bit_format,
2081 ucontrol->value.integer.value[0]);
2082
2083 return 0;
2084}
2085
2086static int ext_disp_rx_ch_get(struct snd_kcontrol *kcontrol,
2087 struct snd_ctl_elem_value *ucontrol)
2088{
2089 int idx = ext_disp_get_port_idx(kcontrol);
2090
2091 if (idx < 0)
2092 return idx;
2093
2094 ucontrol->value.integer.value[0] =
2095 ext_disp_rx_cfg[idx].channels - 2;
2096
2097 pr_debug("%s: ext_disp_rx[%d].ch = %d\n", __func__,
2098 idx, ext_disp_rx_cfg[idx].channels);
2099
2100 return 0;
2101}
2102
2103static int ext_disp_rx_ch_put(struct snd_kcontrol *kcontrol,
2104 struct snd_ctl_elem_value *ucontrol)
2105{
2106 int idx = ext_disp_get_port_idx(kcontrol);
2107
2108 if (idx < 0)
2109 return idx;
2110
2111 ext_disp_rx_cfg[idx].channels =
2112 ucontrol->value.integer.value[0] + 2;
2113
2114 pr_debug("%s: ext_disp_rx[%d].ch = %d\n", __func__,
2115 idx, ext_disp_rx_cfg[idx].channels);
2116 return 1;
2117}
2118
2119static int ext_disp_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
2120 struct snd_ctl_elem_value *ucontrol)
2121{
2122 int sample_rate_val;
2123 int idx = ext_disp_get_port_idx(kcontrol);
2124
2125 if (idx < 0)
2126 return idx;
2127
2128 switch (ext_disp_rx_cfg[idx].sample_rate) {
2129 case SAMPLING_RATE_176P4KHZ:
2130 sample_rate_val = 6;
2131 break;
2132
2133 case SAMPLING_RATE_88P2KHZ:
2134 sample_rate_val = 5;
2135 break;
2136
2137 case SAMPLING_RATE_44P1KHZ:
2138 sample_rate_val = 4;
2139 break;
2140
2141 case SAMPLING_RATE_32KHZ:
2142 sample_rate_val = 3;
2143 break;
2144
2145 case SAMPLING_RATE_192KHZ:
2146 sample_rate_val = 2;
2147 break;
2148
2149 case SAMPLING_RATE_96KHZ:
2150 sample_rate_val = 1;
2151 break;
2152
2153 case SAMPLING_RATE_48KHZ:
2154 default:
2155 sample_rate_val = 0;
2156 break;
2157 }
2158
2159 ucontrol->value.integer.value[0] = sample_rate_val;
2160 pr_debug("%s: ext_disp_rx[%d].sample_rate = %d\n", __func__,
2161 idx, ext_disp_rx_cfg[idx].sample_rate);
2162
2163 return 0;
2164}
2165
2166static int ext_disp_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
2167 struct snd_ctl_elem_value *ucontrol)
2168{
2169 int idx = ext_disp_get_port_idx(kcontrol);
2170
2171 if (idx < 0)
2172 return idx;
2173
2174 switch (ucontrol->value.integer.value[0]) {
2175 case 6:
2176 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_176P4KHZ;
2177 break;
2178 case 5:
2179 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_88P2KHZ;
2180 break;
2181 case 4:
2182 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_44P1KHZ;
2183 break;
2184 case 3:
2185 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_32KHZ;
2186 break;
2187 case 2:
2188 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_192KHZ;
2189 break;
2190 case 1:
2191 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_96KHZ;
2192 break;
2193 case 0:
2194 default:
2195 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_48KHZ;
2196 break;
2197 }
2198
2199 pr_debug("%s: control value = %ld, ext_disp_rx[%d].sample_rate = %d\n",
2200 __func__, ucontrol->value.integer.value[0], idx,
2201 ext_disp_rx_cfg[idx].sample_rate);
2202 return 0;
2203}
2204
2205static int proxy_rx_ch_get(struct snd_kcontrol *kcontrol,
2206 struct snd_ctl_elem_value *ucontrol)
2207{
2208 pr_debug("%s: proxy_rx channels = %d\n",
2209 __func__, proxy_rx_cfg.channels);
2210 ucontrol->value.integer.value[0] = proxy_rx_cfg.channels - 2;
2211
2212 return 0;
2213}
2214
2215static int proxy_rx_ch_put(struct snd_kcontrol *kcontrol,
2216 struct snd_ctl_elem_value *ucontrol)
2217{
2218 proxy_rx_cfg.channels = ucontrol->value.integer.value[0] + 2;
2219 pr_debug("%s: proxy_rx channels = %d\n",
2220 __func__, proxy_rx_cfg.channels);
2221
2222 return 1;
2223}
2224
2225static int tdm_get_sample_rate(int value)
2226{
2227 int sample_rate = 0;
2228
2229 switch (value) {
2230 case 0:
2231 sample_rate = SAMPLING_RATE_8KHZ;
2232 break;
2233 case 1:
2234 sample_rate = SAMPLING_RATE_16KHZ;
2235 break;
2236 case 2:
2237 sample_rate = SAMPLING_RATE_32KHZ;
2238 break;
2239 case 3:
2240 sample_rate = SAMPLING_RATE_48KHZ;
2241 break;
2242 case 4:
2243 sample_rate = SAMPLING_RATE_176P4KHZ;
2244 break;
2245 case 5:
2246 sample_rate = SAMPLING_RATE_352P8KHZ;
2247 break;
2248 default:
2249 sample_rate = SAMPLING_RATE_48KHZ;
2250 break;
2251 }
2252 return sample_rate;
2253}
2254
2255static int aux_pcm_get_sample_rate(int value)
2256{
2257 int sample_rate;
2258
2259 switch (value) {
2260 case 1:
2261 sample_rate = SAMPLING_RATE_16KHZ;
2262 break;
2263 case 0:
2264 default:
2265 sample_rate = SAMPLING_RATE_8KHZ;
2266 break;
2267 }
2268 return sample_rate;
2269}
2270
2271static int tdm_get_sample_rate_val(int sample_rate)
2272{
2273 int sample_rate_val = 0;
2274
2275 switch (sample_rate) {
2276 case SAMPLING_RATE_8KHZ:
2277 sample_rate_val = 0;
2278 break;
2279 case SAMPLING_RATE_16KHZ:
2280 sample_rate_val = 1;
2281 break;
2282 case SAMPLING_RATE_32KHZ:
2283 sample_rate_val = 2;
2284 break;
2285 case SAMPLING_RATE_48KHZ:
2286 sample_rate_val = 3;
2287 break;
2288 case SAMPLING_RATE_176P4KHZ:
2289 sample_rate_val = 4;
2290 break;
2291 case SAMPLING_RATE_352P8KHZ:
2292 sample_rate_val = 5;
2293 break;
2294 default:
2295 sample_rate_val = 3;
2296 break;
2297 }
2298 return sample_rate_val;
2299}
2300
2301static int aux_pcm_get_sample_rate_val(int sample_rate)
2302{
2303 int sample_rate_val;
2304
2305 switch (sample_rate) {
2306 case SAMPLING_RATE_16KHZ:
2307 sample_rate_val = 1;
2308 break;
2309 case SAMPLING_RATE_8KHZ:
2310 default:
2311 sample_rate_val = 0;
2312 break;
2313 }
2314 return sample_rate_val;
2315}
2316
2317static int tdm_get_port_idx(struct snd_kcontrol *kcontrol,
2318 struct tdm_port *port)
2319{
2320 if (port) {
2321 if (strnstr(kcontrol->id.name, "PRI",
2322 sizeof(kcontrol->id.name))) {
2323 port->mode = TDM_PRI;
2324 } else if (strnstr(kcontrol->id.name, "SEC",
2325 sizeof(kcontrol->id.name))) {
2326 port->mode = TDM_SEC;
2327 } else if (strnstr(kcontrol->id.name, "TERT",
2328 sizeof(kcontrol->id.name))) {
2329 port->mode = TDM_TERT;
2330 } else if (strnstr(kcontrol->id.name, "QUAT",
2331 sizeof(kcontrol->id.name))) {
2332 port->mode = TDM_QUAT;
2333 } else if (strnstr(kcontrol->id.name, "QUIN",
2334 sizeof(kcontrol->id.name))) {
2335 port->mode = TDM_QUIN;
2336 } else {
2337 pr_err("%s: unsupported mode in: %s\n",
2338 __func__, kcontrol->id.name);
2339 return -EINVAL;
2340 }
2341
2342 if (strnstr(kcontrol->id.name, "RX_0",
2343 sizeof(kcontrol->id.name)) ||
2344 strnstr(kcontrol->id.name, "TX_0",
2345 sizeof(kcontrol->id.name))) {
2346 port->channel = TDM_0;
2347 } else if (strnstr(kcontrol->id.name, "RX_1",
2348 sizeof(kcontrol->id.name)) ||
2349 strnstr(kcontrol->id.name, "TX_1",
2350 sizeof(kcontrol->id.name))) {
2351 port->channel = TDM_1;
2352 } else if (strnstr(kcontrol->id.name, "RX_2",
2353 sizeof(kcontrol->id.name)) ||
2354 strnstr(kcontrol->id.name, "TX_2",
2355 sizeof(kcontrol->id.name))) {
2356 port->channel = TDM_2;
2357 } else if (strnstr(kcontrol->id.name, "RX_3",
2358 sizeof(kcontrol->id.name)) ||
2359 strnstr(kcontrol->id.name, "TX_3",
2360 sizeof(kcontrol->id.name))) {
2361 port->channel = TDM_3;
2362 } else if (strnstr(kcontrol->id.name, "RX_4",
2363 sizeof(kcontrol->id.name)) ||
2364 strnstr(kcontrol->id.name, "TX_4",
2365 sizeof(kcontrol->id.name))) {
2366 port->channel = TDM_4;
2367 } else if (strnstr(kcontrol->id.name, "RX_5",
2368 sizeof(kcontrol->id.name)) ||
2369 strnstr(kcontrol->id.name, "TX_5",
2370 sizeof(kcontrol->id.name))) {
2371 port->channel = TDM_5;
2372 } else if (strnstr(kcontrol->id.name, "RX_6",
2373 sizeof(kcontrol->id.name)) ||
2374 strnstr(kcontrol->id.name, "TX_6",
2375 sizeof(kcontrol->id.name))) {
2376 port->channel = TDM_6;
2377 } else if (strnstr(kcontrol->id.name, "RX_7",
2378 sizeof(kcontrol->id.name)) ||
2379 strnstr(kcontrol->id.name, "TX_7",
2380 sizeof(kcontrol->id.name))) {
2381 port->channel = TDM_7;
2382 } else {
2383 pr_err("%s: unsupported channel in: %s\n",
2384 __func__, kcontrol->id.name);
2385 return -EINVAL;
2386 }
2387 } else {
2388 return -EINVAL;
2389 }
2390 return 0;
2391}
2392
2393static int tdm_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
2394 struct snd_ctl_elem_value *ucontrol)
2395{
2396 struct tdm_port port;
2397 int ret = tdm_get_port_idx(kcontrol, &port);
2398
2399 if (ret) {
2400 pr_err("%s: unsupported control: %s\n",
2401 __func__, kcontrol->id.name);
2402 } else {
2403 ucontrol->value.enumerated.item[0] = tdm_get_sample_rate_val(
2404 tdm_rx_cfg[port.mode][port.channel].sample_rate);
2405
2406 pr_debug("%s: tdm_rx_sample_rate = %d, item = %d\n", __func__,
2407 tdm_rx_cfg[port.mode][port.channel].sample_rate,
2408 ucontrol->value.enumerated.item[0]);
2409 }
2410 return ret;
2411}
2412
2413static int tdm_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
2414 struct snd_ctl_elem_value *ucontrol)
2415{
2416 struct tdm_port port;
2417 int ret = tdm_get_port_idx(kcontrol, &port);
2418
2419 if (ret) {
2420 pr_err("%s: unsupported control: %s\n",
2421 __func__, kcontrol->id.name);
2422 } else {
2423 tdm_rx_cfg[port.mode][port.channel].sample_rate =
2424 tdm_get_sample_rate(ucontrol->value.enumerated.item[0]);
2425
2426 pr_debug("%s: tdm_rx_sample_rate = %d, item = %d\n", __func__,
2427 tdm_rx_cfg[port.mode][port.channel].sample_rate,
2428 ucontrol->value.enumerated.item[0]);
2429 }
2430 return ret;
2431}
2432
2433static int tdm_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
2434 struct snd_ctl_elem_value *ucontrol)
2435{
2436 struct tdm_port port;
2437 int ret = tdm_get_port_idx(kcontrol, &port);
2438
2439 if (ret) {
2440 pr_err("%s: unsupported control: %s\n",
2441 __func__, kcontrol->id.name);
2442 } else {
2443 ucontrol->value.enumerated.item[0] = tdm_get_sample_rate_val(
2444 tdm_tx_cfg[port.mode][port.channel].sample_rate);
2445
2446 pr_debug("%s: tdm_tx_sample_rate = %d, item = %d\n", __func__,
2447 tdm_tx_cfg[port.mode][port.channel].sample_rate,
2448 ucontrol->value.enumerated.item[0]);
2449 }
2450 return ret;
2451}
2452
2453static int tdm_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
2454 struct snd_ctl_elem_value *ucontrol)
2455{
2456 struct tdm_port port;
2457 int ret = tdm_get_port_idx(kcontrol, &port);
2458
2459 if (ret) {
2460 pr_err("%s: unsupported control: %s\n",
2461 __func__, kcontrol->id.name);
2462 } else {
2463 tdm_tx_cfg[port.mode][port.channel].sample_rate =
2464 tdm_get_sample_rate(ucontrol->value.enumerated.item[0]);
2465
2466 pr_debug("%s: tdm_tx_sample_rate = %d, item = %d\n", __func__,
2467 tdm_tx_cfg[port.mode][port.channel].sample_rate,
2468 ucontrol->value.enumerated.item[0]);
2469 }
2470 return ret;
2471}
2472
2473static int tdm_get_format(int value)
2474{
2475 int format = 0;
2476
2477 switch (value) {
2478 case 0:
2479 format = SNDRV_PCM_FORMAT_S16_LE;
2480 break;
2481 case 1:
2482 format = SNDRV_PCM_FORMAT_S24_LE;
2483 break;
2484 case 2:
2485 format = SNDRV_PCM_FORMAT_S32_LE;
2486 break;
2487 default:
2488 format = SNDRV_PCM_FORMAT_S16_LE;
2489 break;
2490 }
2491 return format;
2492}
2493
2494static int tdm_get_format_val(int format)
2495{
2496 int value = 0;
2497
2498 switch (format) {
2499 case SNDRV_PCM_FORMAT_S16_LE:
2500 value = 0;
2501 break;
2502 case SNDRV_PCM_FORMAT_S24_LE:
2503 value = 1;
2504 break;
2505 case SNDRV_PCM_FORMAT_S32_LE:
2506 value = 2;
2507 break;
2508 default:
2509 value = 0;
2510 break;
2511 }
2512 return value;
2513}
2514
2515static int tdm_rx_format_get(struct snd_kcontrol *kcontrol,
2516 struct snd_ctl_elem_value *ucontrol)
2517{
2518 struct tdm_port port;
2519 int ret = tdm_get_port_idx(kcontrol, &port);
2520
2521 if (ret) {
2522 pr_err("%s: unsupported control: %s\n",
2523 __func__, kcontrol->id.name);
2524 } else {
2525 ucontrol->value.enumerated.item[0] = tdm_get_format_val(
2526 tdm_rx_cfg[port.mode][port.channel].bit_format);
2527
2528 pr_debug("%s: tdm_rx_bit_format = %d, item = %d\n", __func__,
2529 tdm_rx_cfg[port.mode][port.channel].bit_format,
2530 ucontrol->value.enumerated.item[0]);
2531 }
2532 return ret;
2533}
2534
2535static int tdm_rx_format_put(struct snd_kcontrol *kcontrol,
2536 struct snd_ctl_elem_value *ucontrol)
2537{
2538 struct tdm_port port;
2539 int ret = tdm_get_port_idx(kcontrol, &port);
2540
2541 if (ret) {
2542 pr_err("%s: unsupported control: %s\n",
2543 __func__, kcontrol->id.name);
2544 } else {
2545 tdm_rx_cfg[port.mode][port.channel].bit_format =
2546 tdm_get_format(ucontrol->value.enumerated.item[0]);
2547
2548 pr_debug("%s: tdm_rx_bit_format = %d, item = %d\n", __func__,
2549 tdm_rx_cfg[port.mode][port.channel].bit_format,
2550 ucontrol->value.enumerated.item[0]);
2551 }
2552 return ret;
2553}
2554
2555static int tdm_tx_format_get(struct snd_kcontrol *kcontrol,
2556 struct snd_ctl_elem_value *ucontrol)
2557{
2558 struct tdm_port port;
2559 int ret = tdm_get_port_idx(kcontrol, &port);
2560
2561 if (ret) {
2562 pr_err("%s: unsupported control: %s\n",
2563 __func__, kcontrol->id.name);
2564 } else {
2565 ucontrol->value.enumerated.item[0] = tdm_get_format_val(
2566 tdm_tx_cfg[port.mode][port.channel].bit_format);
2567
2568 pr_debug("%s: tdm_tx_bit_format = %d, item = %d\n", __func__,
2569 tdm_tx_cfg[port.mode][port.channel].bit_format,
2570 ucontrol->value.enumerated.item[0]);
2571 }
2572 return ret;
2573}
2574
2575static int tdm_tx_format_put(struct snd_kcontrol *kcontrol,
2576 struct snd_ctl_elem_value *ucontrol)
2577{
2578 struct tdm_port port;
2579 int ret = tdm_get_port_idx(kcontrol, &port);
2580
2581 if (ret) {
2582 pr_err("%s: unsupported control: %s\n",
2583 __func__, kcontrol->id.name);
2584 } else {
2585 tdm_tx_cfg[port.mode][port.channel].bit_format =
2586 tdm_get_format(ucontrol->value.enumerated.item[0]);
2587
2588 pr_debug("%s: tdm_tx_bit_format = %d, item = %d\n", __func__,
2589 tdm_tx_cfg[port.mode][port.channel].bit_format,
2590 ucontrol->value.enumerated.item[0]);
2591 }
2592 return ret;
2593}
2594
2595static int tdm_rx_ch_get(struct snd_kcontrol *kcontrol,
2596 struct snd_ctl_elem_value *ucontrol)
2597{
2598 struct tdm_port port;
2599 int ret = tdm_get_port_idx(kcontrol, &port);
2600
2601 if (ret) {
2602 pr_err("%s: unsupported control: %s\n",
2603 __func__, kcontrol->id.name);
2604 } else {
2605
2606 ucontrol->value.enumerated.item[0] =
2607 tdm_rx_cfg[port.mode][port.channel].channels - 1;
2608
2609 pr_debug("%s: tdm_rx_ch = %d, item = %d\n", __func__,
2610 tdm_rx_cfg[port.mode][port.channel].channels - 1,
2611 ucontrol->value.enumerated.item[0]);
2612 }
2613 return ret;
2614}
2615
2616static int tdm_rx_ch_put(struct snd_kcontrol *kcontrol,
2617 struct snd_ctl_elem_value *ucontrol)
2618{
2619 struct tdm_port port;
2620 int ret = tdm_get_port_idx(kcontrol, &port);
2621
2622 if (ret) {
2623 pr_err("%s: unsupported control: %s\n",
2624 __func__, kcontrol->id.name);
2625 } else {
2626 tdm_rx_cfg[port.mode][port.channel].channels =
2627 ucontrol->value.enumerated.item[0] + 1;
2628
2629 pr_debug("%s: tdm_rx_ch = %d, item = %d\n", __func__,
2630 tdm_rx_cfg[port.mode][port.channel].channels,
2631 ucontrol->value.enumerated.item[0] + 1);
2632 }
2633 return ret;
2634}
2635
2636static int tdm_tx_ch_get(struct snd_kcontrol *kcontrol,
2637 struct snd_ctl_elem_value *ucontrol)
2638{
2639 struct tdm_port port;
2640 int ret = tdm_get_port_idx(kcontrol, &port);
2641
2642 if (ret) {
2643 pr_err("%s: unsupported control: %s\n",
2644 __func__, kcontrol->id.name);
2645 } else {
2646 ucontrol->value.enumerated.item[0] =
2647 tdm_tx_cfg[port.mode][port.channel].channels - 1;
2648
2649 pr_debug("%s: tdm_tx_ch = %d, item = %d\n", __func__,
2650 tdm_tx_cfg[port.mode][port.channel].channels - 1,
2651 ucontrol->value.enumerated.item[0]);
2652 }
2653 return ret;
2654}
2655
2656static int tdm_tx_ch_put(struct snd_kcontrol *kcontrol,
2657 struct snd_ctl_elem_value *ucontrol)
2658{
2659 struct tdm_port port;
2660 int ret = tdm_get_port_idx(kcontrol, &port);
2661
2662 if (ret) {
2663 pr_err("%s: unsupported control: %s\n",
2664 __func__, kcontrol->id.name);
2665 } else {
2666 tdm_tx_cfg[port.mode][port.channel].channels =
2667 ucontrol->value.enumerated.item[0] + 1;
2668
2669 pr_debug("%s: tdm_tx_ch = %d, item = %d\n", __func__,
2670 tdm_tx_cfg[port.mode][port.channel].channels,
2671 ucontrol->value.enumerated.item[0] + 1);
2672 }
2673 return ret;
2674}
2675
2676static int aux_pcm_get_port_idx(struct snd_kcontrol *kcontrol)
2677{
2678 int idx;
2679
2680 if (strnstr(kcontrol->id.name, "PRIM_AUX_PCM",
2681 sizeof("PRIM_AUX_PCM"))) {
2682 idx = PRIM_AUX_PCM;
2683 } else if (strnstr(kcontrol->id.name, "SEC_AUX_PCM",
2684 sizeof("SEC_AUX_PCM"))) {
2685 idx = SEC_AUX_PCM;
2686 } else if (strnstr(kcontrol->id.name, "TERT_AUX_PCM",
2687 sizeof("TERT_AUX_PCM"))) {
2688 idx = TERT_AUX_PCM;
2689 } else if (strnstr(kcontrol->id.name, "QUAT_AUX_PCM",
2690 sizeof("QUAT_AUX_PCM"))) {
2691 idx = QUAT_AUX_PCM;
2692 } else if (strnstr(kcontrol->id.name, "QUIN_AUX_PCM",
2693 sizeof("QUIN_AUX_PCM"))) {
2694 idx = QUIN_AUX_PCM;
2695 } else {
2696 pr_err("%s: unsupported port: %s\n",
2697 __func__, kcontrol->id.name);
2698 idx = -EINVAL;
2699 }
2700
2701 return idx;
2702}
2703
2704static int aux_pcm_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
2705 struct snd_ctl_elem_value *ucontrol)
2706{
2707 int idx = aux_pcm_get_port_idx(kcontrol);
2708
2709 if (idx < 0)
2710 return idx;
2711
2712 aux_pcm_rx_cfg[idx].sample_rate =
2713 aux_pcm_get_sample_rate(ucontrol->value.enumerated.item[0]);
2714
2715 pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
2716 idx, aux_pcm_rx_cfg[idx].sample_rate,
2717 ucontrol->value.enumerated.item[0]);
2718
2719 return 0;
2720}
2721
2722static int aux_pcm_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
2723 struct snd_ctl_elem_value *ucontrol)
2724{
2725 int idx = aux_pcm_get_port_idx(kcontrol);
2726
2727 if (idx < 0)
2728 return idx;
2729
2730 ucontrol->value.enumerated.item[0] =
2731 aux_pcm_get_sample_rate_val(aux_pcm_rx_cfg[idx].sample_rate);
2732
2733 pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
2734 idx, aux_pcm_rx_cfg[idx].sample_rate,
2735 ucontrol->value.enumerated.item[0]);
2736
2737 return 0;
2738}
2739
2740static int aux_pcm_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
2741 struct snd_ctl_elem_value *ucontrol)
2742{
2743 int idx = aux_pcm_get_port_idx(kcontrol);
2744
2745 if (idx < 0)
2746 return idx;
2747
2748 aux_pcm_tx_cfg[idx].sample_rate =
2749 aux_pcm_get_sample_rate(ucontrol->value.enumerated.item[0]);
2750
2751 pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
2752 idx, aux_pcm_tx_cfg[idx].sample_rate,
2753 ucontrol->value.enumerated.item[0]);
2754
2755 return 0;
2756}
2757
2758static int aux_pcm_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
2759 struct snd_ctl_elem_value *ucontrol)
2760{
2761 int idx = aux_pcm_get_port_idx(kcontrol);
2762
2763 if (idx < 0)
2764 return idx;
2765
2766 ucontrol->value.enumerated.item[0] =
2767 aux_pcm_get_sample_rate_val(aux_pcm_tx_cfg[idx].sample_rate);
2768
2769 pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
2770 idx, aux_pcm_tx_cfg[idx].sample_rate,
2771 ucontrol->value.enumerated.item[0]);
2772
2773 return 0;
2774}
2775
2776static int mi2s_get_port_idx(struct snd_kcontrol *kcontrol)
2777{
2778 int idx;
2779
2780 if (strnstr(kcontrol->id.name, "PRIM_MI2S_RX",
2781 sizeof("PRIM_MI2S_RX"))) {
2782 idx = PRIM_MI2S;
2783 } else if (strnstr(kcontrol->id.name, "SEC_MI2S_RX",
2784 sizeof("SEC_MI2S_RX"))) {
2785 idx = SEC_MI2S;
2786 } else if (strnstr(kcontrol->id.name, "TERT_MI2S_RX",
2787 sizeof("TERT_MI2S_RX"))) {
2788 idx = TERT_MI2S;
2789 } else if (strnstr(kcontrol->id.name, "QUAT_MI2S_RX",
2790 sizeof("QUAT_MI2S_RX"))) {
2791 idx = QUAT_MI2S;
2792 } else if (strnstr(kcontrol->id.name, "QUIN_MI2S_RX",
2793 sizeof("QUIN_MI2S_RX"))) {
2794 idx = QUIN_MI2S;
2795 } else if (strnstr(kcontrol->id.name, "PRIM_MI2S_TX",
2796 sizeof("PRIM_MI2S_TX"))) {
2797 idx = PRIM_MI2S;
2798 } else if (strnstr(kcontrol->id.name, "SEC_MI2S_TX",
2799 sizeof("SEC_MI2S_TX"))) {
2800 idx = SEC_MI2S;
2801 } else if (strnstr(kcontrol->id.name, "TERT_MI2S_TX",
2802 sizeof("TERT_MI2S_TX"))) {
2803 idx = TERT_MI2S;
2804 } else if (strnstr(kcontrol->id.name, "QUAT_MI2S_TX",
2805 sizeof("QUAT_MI2S_TX"))) {
2806 idx = QUAT_MI2S;
2807 } else if (strnstr(kcontrol->id.name, "QUIN_MI2S_TX",
2808 sizeof("QUIN_MI2S_TX"))) {
2809 idx = QUIN_MI2S;
2810 } else {
2811 pr_err("%s: unsupported channel: %s\n",
2812 __func__, kcontrol->id.name);
2813 idx = -EINVAL;
2814 }
2815
2816 return idx;
2817}
2818
2819static int mi2s_get_sample_rate_val(int sample_rate)
2820{
2821 int sample_rate_val;
2822
2823 switch (sample_rate) {
2824 case SAMPLING_RATE_8KHZ:
2825 sample_rate_val = 0;
2826 break;
2827 case SAMPLING_RATE_11P025KHZ:
2828 sample_rate_val = 1;
2829 break;
2830 case SAMPLING_RATE_16KHZ:
2831 sample_rate_val = 2;
2832 break;
2833 case SAMPLING_RATE_22P05KHZ:
2834 sample_rate_val = 3;
2835 break;
2836 case SAMPLING_RATE_32KHZ:
2837 sample_rate_val = 4;
2838 break;
2839 case SAMPLING_RATE_44P1KHZ:
2840 sample_rate_val = 5;
2841 break;
2842 case SAMPLING_RATE_48KHZ:
2843 sample_rate_val = 6;
2844 break;
2845 case SAMPLING_RATE_96KHZ:
2846 sample_rate_val = 7;
2847 break;
2848 case SAMPLING_RATE_192KHZ:
2849 sample_rate_val = 8;
2850 break;
2851 default:
2852 sample_rate_val = 6;
2853 break;
2854 }
2855 return sample_rate_val;
2856}
2857
2858static int mi2s_get_sample_rate(int value)
2859{
2860 int sample_rate;
2861
2862 switch (value) {
2863 case 0:
2864 sample_rate = SAMPLING_RATE_8KHZ;
2865 break;
2866 case 1:
2867 sample_rate = SAMPLING_RATE_11P025KHZ;
2868 break;
2869 case 2:
2870 sample_rate = SAMPLING_RATE_16KHZ;
2871 break;
2872 case 3:
2873 sample_rate = SAMPLING_RATE_22P05KHZ;
2874 break;
2875 case 4:
2876 sample_rate = SAMPLING_RATE_32KHZ;
2877 break;
2878 case 5:
2879 sample_rate = SAMPLING_RATE_44P1KHZ;
2880 break;
2881 case 6:
2882 sample_rate = SAMPLING_RATE_48KHZ;
2883 break;
2884 case 7:
2885 sample_rate = SAMPLING_RATE_96KHZ;
2886 break;
2887 case 8:
2888 sample_rate = SAMPLING_RATE_192KHZ;
2889 break;
2890 default:
2891 sample_rate = SAMPLING_RATE_48KHZ;
2892 break;
2893 }
2894 return sample_rate;
2895}
2896
2897static int mi2s_auxpcm_get_format(int value)
2898{
2899 int format;
2900
2901 switch (value) {
2902 case 0:
2903 format = SNDRV_PCM_FORMAT_S16_LE;
2904 break;
2905 case 1:
2906 format = SNDRV_PCM_FORMAT_S24_LE;
2907 break;
2908 case 2:
2909 format = SNDRV_PCM_FORMAT_S24_3LE;
2910 break;
2911 case 3:
2912 format = SNDRV_PCM_FORMAT_S32_LE;
2913 break;
2914 default:
2915 format = SNDRV_PCM_FORMAT_S16_LE;
2916 break;
2917 }
2918 return format;
2919}
2920
2921static int mi2s_auxpcm_get_format_value(int format)
2922{
2923 int value;
2924
2925 switch (format) {
2926 case SNDRV_PCM_FORMAT_S16_LE:
2927 value = 0;
2928 break;
2929 case SNDRV_PCM_FORMAT_S24_LE:
2930 value = 1;
2931 break;
2932 case SNDRV_PCM_FORMAT_S24_3LE:
2933 value = 2;
2934 break;
2935 case SNDRV_PCM_FORMAT_S32_LE:
2936 value = 3;
2937 break;
2938 default:
2939 value = 0;
2940 break;
2941 }
2942 return value;
2943}
2944
2945static int mi2s_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
2946 struct snd_ctl_elem_value *ucontrol)
2947{
2948 int idx = mi2s_get_port_idx(kcontrol);
2949
2950 if (idx < 0)
2951 return idx;
2952
2953 mi2s_rx_cfg[idx].sample_rate =
2954 mi2s_get_sample_rate(ucontrol->value.enumerated.item[0]);
2955
2956 pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
2957 idx, mi2s_rx_cfg[idx].sample_rate,
2958 ucontrol->value.enumerated.item[0]);
2959
2960 return 0;
2961}
2962
2963static int mi2s_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
2964 struct snd_ctl_elem_value *ucontrol)
2965{
2966 int idx = mi2s_get_port_idx(kcontrol);
2967
2968 if (idx < 0)
2969 return idx;
2970
2971 ucontrol->value.enumerated.item[0] =
2972 mi2s_get_sample_rate_val(mi2s_rx_cfg[idx].sample_rate);
2973
2974 pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
2975 idx, mi2s_rx_cfg[idx].sample_rate,
2976 ucontrol->value.enumerated.item[0]);
2977
2978 return 0;
2979}
2980
2981static int mi2s_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
2982 struct snd_ctl_elem_value *ucontrol)
2983{
2984 int idx = mi2s_get_port_idx(kcontrol);
2985
2986 if (idx < 0)
2987 return idx;
2988
2989 mi2s_tx_cfg[idx].sample_rate =
2990 mi2s_get_sample_rate(ucontrol->value.enumerated.item[0]);
2991
2992 pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
2993 idx, mi2s_tx_cfg[idx].sample_rate,
2994 ucontrol->value.enumerated.item[0]);
2995
2996 return 0;
2997}
2998
2999static int mi2s_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
3000 struct snd_ctl_elem_value *ucontrol)
3001{
3002 int idx = mi2s_get_port_idx(kcontrol);
3003
3004 if (idx < 0)
3005 return idx;
3006
3007 ucontrol->value.enumerated.item[0] =
3008 mi2s_get_sample_rate_val(mi2s_tx_cfg[idx].sample_rate);
3009
3010 pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
3011 idx, mi2s_tx_cfg[idx].sample_rate,
3012 ucontrol->value.enumerated.item[0]);
3013
3014 return 0;
3015}
3016
3017static int msm_mi2s_rx_ch_get(struct snd_kcontrol *kcontrol,
3018 struct snd_ctl_elem_value *ucontrol)
3019{
3020 int idx = mi2s_get_port_idx(kcontrol);
3021
3022 if (idx < 0)
3023 return idx;
3024
3025 pr_debug("%s: msm_mi2s_[%d]_rx_ch = %d\n", __func__,
3026 idx, mi2s_rx_cfg[idx].channels);
3027 ucontrol->value.enumerated.item[0] = mi2s_rx_cfg[idx].channels - 1;
3028
3029 return 0;
3030}
3031
3032static int msm_mi2s_rx_ch_put(struct snd_kcontrol *kcontrol,
3033 struct snd_ctl_elem_value *ucontrol)
3034{
3035 int idx = mi2s_get_port_idx(kcontrol);
3036
3037 if (idx < 0)
3038 return idx;
3039
3040 mi2s_rx_cfg[idx].channels = ucontrol->value.enumerated.item[0] + 1;
3041 pr_debug("%s: msm_mi2s_[%d]_rx_ch = %d\n", __func__,
3042 idx, mi2s_rx_cfg[idx].channels);
3043
3044 return 1;
3045}
3046
3047static int msm_mi2s_tx_ch_get(struct snd_kcontrol *kcontrol,
3048 struct snd_ctl_elem_value *ucontrol)
3049{
3050 int idx = mi2s_get_port_idx(kcontrol);
3051
3052 if (idx < 0)
3053 return idx;
3054
3055 pr_debug("%s: msm_mi2s_[%d]_tx_ch = %d\n", __func__,
3056 idx, mi2s_tx_cfg[idx].channels);
3057 ucontrol->value.enumerated.item[0] = mi2s_tx_cfg[idx].channels - 1;
3058
3059 return 0;
3060}
3061
3062static int msm_mi2s_tx_ch_put(struct snd_kcontrol *kcontrol,
3063 struct snd_ctl_elem_value *ucontrol)
3064{
3065 int idx = mi2s_get_port_idx(kcontrol);
3066
3067 if (idx < 0)
3068 return idx;
3069
3070 mi2s_tx_cfg[idx].channels = ucontrol->value.enumerated.item[0] + 1;
3071 pr_debug("%s: msm_mi2s_[%d]_tx_ch = %d\n", __func__,
3072 idx, mi2s_tx_cfg[idx].channels);
3073
3074 return 1;
3075}
3076
3077static int msm_mi2s_rx_format_get(struct snd_kcontrol *kcontrol,
3078 struct snd_ctl_elem_value *ucontrol)
3079{
3080 int idx = mi2s_get_port_idx(kcontrol);
3081
3082 if (idx < 0)
3083 return idx;
3084
3085 ucontrol->value.enumerated.item[0] =
3086 mi2s_auxpcm_get_format_value(mi2s_rx_cfg[idx].bit_format);
3087
3088 pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
3089 idx, mi2s_rx_cfg[idx].bit_format,
3090 ucontrol->value.enumerated.item[0]);
3091
3092 return 0;
3093}
3094
3095static int msm_mi2s_rx_format_put(struct snd_kcontrol *kcontrol,
3096 struct snd_ctl_elem_value *ucontrol)
3097{
3098 int idx = mi2s_get_port_idx(kcontrol);
3099
3100 if (idx < 0)
3101 return idx;
3102
3103 mi2s_rx_cfg[idx].bit_format =
3104 mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
3105
3106 pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
3107 idx, mi2s_rx_cfg[idx].bit_format,
3108 ucontrol->value.enumerated.item[0]);
3109
3110 return 0;
3111}
3112
3113static int msm_mi2s_tx_format_get(struct snd_kcontrol *kcontrol,
3114 struct snd_ctl_elem_value *ucontrol)
3115{
3116 int idx = mi2s_get_port_idx(kcontrol);
3117
3118 if (idx < 0)
3119 return idx;
3120
3121 ucontrol->value.enumerated.item[0] =
3122 mi2s_auxpcm_get_format_value(mi2s_tx_cfg[idx].bit_format);
3123
3124 pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
3125 idx, mi2s_tx_cfg[idx].bit_format,
3126 ucontrol->value.enumerated.item[0]);
3127
3128 return 0;
3129}
3130
3131static int msm_mi2s_tx_format_put(struct snd_kcontrol *kcontrol,
3132 struct snd_ctl_elem_value *ucontrol)
3133{
3134 int idx = mi2s_get_port_idx(kcontrol);
3135
3136 if (idx < 0)
3137 return idx;
3138
3139 mi2s_tx_cfg[idx].bit_format =
3140 mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
3141
3142 pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
3143 idx, mi2s_tx_cfg[idx].bit_format,
3144 ucontrol->value.enumerated.item[0]);
3145
3146 return 0;
3147}
3148
3149static int msm_aux_pcm_rx_format_get(struct snd_kcontrol *kcontrol,
3150 struct snd_ctl_elem_value *ucontrol)
3151{
3152 int idx = aux_pcm_get_port_idx(kcontrol);
3153
3154 if (idx < 0)
3155 return idx;
3156
3157 ucontrol->value.enumerated.item[0] =
3158 mi2s_auxpcm_get_format_value(aux_pcm_rx_cfg[idx].bit_format);
3159
3160 pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
3161 idx, aux_pcm_rx_cfg[idx].bit_format,
3162 ucontrol->value.enumerated.item[0]);
3163
3164 return 0;
3165}
3166
3167static int msm_aux_pcm_rx_format_put(struct snd_kcontrol *kcontrol,
3168 struct snd_ctl_elem_value *ucontrol)
3169{
3170 int idx = aux_pcm_get_port_idx(kcontrol);
3171
3172 if (idx < 0)
3173 return idx;
3174
3175 aux_pcm_rx_cfg[idx].bit_format =
3176 mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
3177
3178 pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
3179 idx, aux_pcm_rx_cfg[idx].bit_format,
3180 ucontrol->value.enumerated.item[0]);
3181
3182 return 0;
3183}
3184
3185static int msm_aux_pcm_tx_format_get(struct snd_kcontrol *kcontrol,
3186 struct snd_ctl_elem_value *ucontrol)
3187{
3188 int idx = aux_pcm_get_port_idx(kcontrol);
3189
3190 if (idx < 0)
3191 return idx;
3192
3193 ucontrol->value.enumerated.item[0] =
3194 mi2s_auxpcm_get_format_value(aux_pcm_tx_cfg[idx].bit_format);
3195
3196 pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
3197 idx, aux_pcm_tx_cfg[idx].bit_format,
3198 ucontrol->value.enumerated.item[0]);
3199
3200 return 0;
3201}
3202
3203static int msm_aux_pcm_tx_format_put(struct snd_kcontrol *kcontrol,
3204 struct snd_ctl_elem_value *ucontrol)
3205{
3206 int idx = aux_pcm_get_port_idx(kcontrol);
3207
3208 if (idx < 0)
3209 return idx;
3210
3211 aux_pcm_tx_cfg[idx].bit_format =
3212 mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
3213
3214 pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
3215 idx, aux_pcm_tx_cfg[idx].bit_format,
3216 ucontrol->value.enumerated.item[0]);
3217
3218 return 0;
3219}
3220
3221static int msm_hifi_ctrl(struct snd_soc_codec *codec)
3222{
3223 struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
3224 struct snd_soc_card *card = codec->component.card;
3225 struct msm_asoc_mach_data *pdata =
3226 snd_soc_card_get_drvdata(card);
3227
3228 dev_dbg(codec->dev, "%s: msm_hifi_control = %d\n", __func__,
3229 msm_hifi_control);
3230
3231 if (!pdata || !pdata->hph_en1_gpio_p) {
3232 dev_err(codec->dev, "%s: hph_en1_gpio is invalid\n", __func__);
3233 return -EINVAL;
3234 }
3235 if (msm_hifi_control == MSM_HIFI_ON) {
3236 msm_cdc_pinctrl_select_active_state(pdata->hph_en1_gpio_p);
3237 /* 5msec delay needed as per HW requirement */
3238 usleep_range(5000, 5010);
3239 } else {
3240 msm_cdc_pinctrl_select_sleep_state(pdata->hph_en1_gpio_p);
3241 }
3242 snd_soc_dapm_sync(dapm);
3243
3244 return 0;
3245}
3246
3247static int msm_hifi_get(struct snd_kcontrol *kcontrol,
3248 struct snd_ctl_elem_value *ucontrol)
3249{
3250 pr_debug("%s: msm_hifi_control = %d\n",
3251 __func__, msm_hifi_control);
3252 ucontrol->value.integer.value[0] = msm_hifi_control;
3253
3254 return 0;
3255}
3256
3257static int msm_hifi_put(struct snd_kcontrol *kcontrol,
3258 struct snd_ctl_elem_value *ucontrol)
3259{
3260 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
3261
3262 dev_dbg(codec->dev, "%s: ucontrol->value.integer.value[0] = %ld\n",
3263 __func__, ucontrol->value.integer.value[0]);
3264
3265 msm_hifi_control = ucontrol->value.integer.value[0];
3266 msm_hifi_ctrl(codec);
3267
3268 return 0;
3269}
3270
3271static const struct snd_kcontrol_new msm_int_snd_controls[] = {
3272 SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 Channels", wsa_cdc_dma_rx_0_chs,
3273 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3274 SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 Channels", wsa_cdc_dma_rx_1_chs,
3275 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3276 SOC_ENUM_EXT("RX_CDC_DMA_RX_0 Channels", rx_cdc_dma_rx_0_chs,
3277 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3278 SOC_ENUM_EXT("RX_CDC_DMA_RX_1 Channels", rx_cdc_dma_rx_1_chs,
3279 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3280 SOC_ENUM_EXT("RX_CDC_DMA_RX_2 Channels", rx_cdc_dma_rx_2_chs,
3281 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3282 SOC_ENUM_EXT("RX_CDC_DMA_RX_3 Channels", rx_cdc_dma_rx_3_chs,
3283 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3284 SOC_ENUM_EXT("RX_CDC_DMA_RX_5 Channels", rx_cdc_dma_rx_5_chs,
3285 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3286 SOC_ENUM_EXT("WSA_CDC_DMA_TX_0 Channels", wsa_cdc_dma_tx_0_chs,
3287 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3288 SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 Channels", wsa_cdc_dma_tx_1_chs,
3289 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3290 SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 Channels", wsa_cdc_dma_tx_2_chs,
3291 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3292 SOC_ENUM_EXT("TX_CDC_DMA_TX_0 Channels", tx_cdc_dma_tx_0_chs,
3293 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3294 SOC_ENUM_EXT("TX_CDC_DMA_TX_3 Channels", tx_cdc_dma_tx_3_chs,
3295 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3296 SOC_ENUM_EXT("TX_CDC_DMA_TX_4 Channels", tx_cdc_dma_tx_4_chs,
3297 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3298 SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 Format", wsa_cdc_dma_rx_0_format,
3299 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3300 SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 Format", wsa_cdc_dma_rx_1_format,
3301 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3302 SOC_ENUM_EXT("RX_CDC_DMA_RX_0 Format", rx_cdc_dma_rx_0_format,
3303 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3304 SOC_ENUM_EXT("RX_CDC_DMA_RX_1 Format", rx_cdc_dma_rx_1_format,
3305 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3306 SOC_ENUM_EXT("RX_CDC_DMA_RX_2 Format", rx_cdc_dma_rx_2_format,
3307 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3308 SOC_ENUM_EXT("RX_CDC_DMA_RX_3 Format", rx_cdc_dma_rx_3_format,
3309 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3310 SOC_ENUM_EXT("RX_CDC_DMA_RX_5 Format", rx_cdc_dma_rx_5_format,
3311 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3312 SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 Format", wsa_cdc_dma_tx_1_format,
3313 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
3314 SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 Format", wsa_cdc_dma_tx_2_format,
3315 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
3316 SOC_ENUM_EXT("TX_CDC_DMA_TX_0 Format", tx_cdc_dma_tx_0_format,
3317 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
3318 SOC_ENUM_EXT("TX_CDC_DMA_TX_3 Format", tx_cdc_dma_tx_3_format,
3319 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
3320 SOC_ENUM_EXT("TX_CDC_DMA_TX_4 Format", tx_cdc_dma_tx_4_format,
3321 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
3322 SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 SampleRate",
3323 wsa_cdc_dma_rx_0_sample_rate,
3324 cdc_dma_rx_sample_rate_get,
3325 cdc_dma_rx_sample_rate_put),
3326 SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 SampleRate",
3327 wsa_cdc_dma_rx_1_sample_rate,
3328 cdc_dma_rx_sample_rate_get,
3329 cdc_dma_rx_sample_rate_put),
3330 SOC_ENUM_EXT("RX_CDC_DMA_RX_0 SampleRate",
3331 rx_cdc_dma_rx_0_sample_rate,
3332 cdc_dma_rx_sample_rate_get,
3333 cdc_dma_rx_sample_rate_put),
3334 SOC_ENUM_EXT("RX_CDC_DMA_RX_1 SampleRate",
3335 rx_cdc_dma_rx_1_sample_rate,
3336 cdc_dma_rx_sample_rate_get,
3337 cdc_dma_rx_sample_rate_put),
3338 SOC_ENUM_EXT("RX_CDC_DMA_RX_2 SampleRate",
3339 rx_cdc_dma_rx_2_sample_rate,
3340 cdc_dma_rx_sample_rate_get,
3341 cdc_dma_rx_sample_rate_put),
3342 SOC_ENUM_EXT("RX_CDC_DMA_RX_3 SampleRate",
3343 rx_cdc_dma_rx_3_sample_rate,
3344 cdc_dma_rx_sample_rate_get,
3345 cdc_dma_rx_sample_rate_put),
3346 SOC_ENUM_EXT("RX_CDC_DMA_RX_5 SampleRate",
3347 rx_cdc_dma_rx_5_sample_rate,
3348 cdc_dma_rx_sample_rate_get,
3349 cdc_dma_rx_sample_rate_put),
3350 SOC_ENUM_EXT("WSA_CDC_DMA_TX_0 SampleRate",
3351 wsa_cdc_dma_tx_0_sample_rate,
3352 cdc_dma_tx_sample_rate_get,
3353 cdc_dma_tx_sample_rate_put),
3354 SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 SampleRate",
3355 wsa_cdc_dma_tx_1_sample_rate,
3356 cdc_dma_tx_sample_rate_get,
3357 cdc_dma_tx_sample_rate_put),
3358 SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 SampleRate",
3359 wsa_cdc_dma_tx_2_sample_rate,
3360 cdc_dma_tx_sample_rate_get,
3361 cdc_dma_tx_sample_rate_put),
3362 SOC_ENUM_EXT("TX_CDC_DMA_TX_0 SampleRate",
3363 tx_cdc_dma_tx_0_sample_rate,
3364 cdc_dma_tx_sample_rate_get,
3365 cdc_dma_tx_sample_rate_put),
3366 SOC_ENUM_EXT("TX_CDC_DMA_TX_3 SampleRate",
3367 tx_cdc_dma_tx_3_sample_rate,
3368 cdc_dma_tx_sample_rate_get,
3369 cdc_dma_tx_sample_rate_put),
3370 SOC_ENUM_EXT("TX_CDC_DMA_TX_4 SampleRate",
3371 tx_cdc_dma_tx_4_sample_rate,
3372 cdc_dma_tx_sample_rate_get,
3373 cdc_dma_tx_sample_rate_put),
3374};
3375
3376static const struct snd_kcontrol_new msm_tavil_snd_controls[] = {
3377 SOC_ENUM_EXT("SLIM_0_RX Channels", slim_0_rx_chs,
3378 slim_rx_ch_get, slim_rx_ch_put),
3379 SOC_ENUM_EXT("SLIM_2_RX Channels", slim_2_rx_chs,
3380 slim_rx_ch_get, slim_rx_ch_put),
3381 SOC_ENUM_EXT("SLIM_0_TX Channels", slim_0_tx_chs,
3382 slim_tx_ch_get, slim_tx_ch_put),
3383 SOC_ENUM_EXT("SLIM_1_TX Channels", slim_1_tx_chs,
3384 slim_tx_ch_get, slim_tx_ch_put),
3385 SOC_ENUM_EXT("SLIM_5_RX Channels", slim_5_rx_chs,
3386 slim_rx_ch_get, slim_rx_ch_put),
3387 SOC_ENUM_EXT("SLIM_6_RX Channels", slim_6_rx_chs,
3388 slim_rx_ch_get, slim_rx_ch_put),
3389 SOC_ENUM_EXT("VI_FEED_TX Channels", vi_feed_tx_chs,
3390 msm_vi_feed_tx_ch_get, msm_vi_feed_tx_ch_put),
3391 SOC_ENUM_EXT("SLIM_0_RX Format", slim_0_rx_format,
3392 slim_rx_bit_format_get, slim_rx_bit_format_put),
3393 SOC_ENUM_EXT("SLIM_5_RX Format", slim_5_rx_format,
3394 slim_rx_bit_format_get, slim_rx_bit_format_put),
3395 SOC_ENUM_EXT("SLIM_6_RX Format", slim_6_rx_format,
3396 slim_rx_bit_format_get, slim_rx_bit_format_put),
3397 SOC_ENUM_EXT("SLIM_0_TX Format", slim_0_tx_format,
3398 slim_tx_bit_format_get, slim_tx_bit_format_put),
3399 SOC_ENUM_EXT("SLIM_0_RX SampleRate", slim_0_rx_sample_rate,
3400 slim_rx_sample_rate_get, slim_rx_sample_rate_put),
3401 SOC_ENUM_EXT("SLIM_2_RX SampleRate", slim_2_rx_sample_rate,
3402 slim_rx_sample_rate_get, slim_rx_sample_rate_put),
3403 SOC_ENUM_EXT("SLIM_0_TX SampleRate", slim_0_tx_sample_rate,
3404 slim_tx_sample_rate_get, slim_tx_sample_rate_put),
3405 SOC_ENUM_EXT("SLIM_5_RX SampleRate", slim_5_rx_sample_rate,
3406 slim_rx_sample_rate_get, slim_rx_sample_rate_put),
3407 SOC_ENUM_EXT("SLIM_6_RX SampleRate", slim_6_rx_sample_rate,
3408 slim_rx_sample_rate_get, slim_rx_sample_rate_put),
3409};
3410
3411static const struct snd_kcontrol_new msm_common_snd_controls[] = {
3412 SOC_ENUM_EXT("USB_AUDIO_RX Channels", usb_rx_chs,
3413 usb_audio_rx_ch_get, usb_audio_rx_ch_put),
3414 SOC_ENUM_EXT("USB_AUDIO_TX Channels", usb_tx_chs,
3415 usb_audio_tx_ch_get, usb_audio_tx_ch_put),
3416 SOC_ENUM_EXT("Display Port RX Channels", ext_disp_rx_chs,
3417 ext_disp_rx_ch_get, ext_disp_rx_ch_put),
3418 SOC_ENUM_EXT("PROXY_RX Channels", proxy_rx_chs,
3419 proxy_rx_ch_get, proxy_rx_ch_put),
3420 SOC_ENUM_EXT("USB_AUDIO_RX Format", usb_rx_format,
3421 usb_audio_rx_format_get, usb_audio_rx_format_put),
3422 SOC_ENUM_EXT("USB_AUDIO_TX Format", usb_tx_format,
3423 usb_audio_tx_format_get, usb_audio_tx_format_put),
3424 SOC_ENUM_EXT("Display Port RX Bit Format", ext_disp_rx_format,
3425 ext_disp_rx_format_get, ext_disp_rx_format_put),
3426 SOC_ENUM_EXT("USB_AUDIO_RX SampleRate", usb_rx_sample_rate,
3427 usb_audio_rx_sample_rate_get,
3428 usb_audio_rx_sample_rate_put),
3429 SOC_ENUM_EXT("USB_AUDIO_TX SampleRate", usb_tx_sample_rate,
3430 usb_audio_tx_sample_rate_get,
3431 usb_audio_tx_sample_rate_put),
3432 SOC_ENUM_EXT("Display Port RX SampleRate", ext_disp_rx_sample_rate,
3433 ext_disp_rx_sample_rate_get,
3434 ext_disp_rx_sample_rate_put),
3435 SOC_ENUM_EXT("PRI_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3436 tdm_rx_sample_rate_get,
3437 tdm_rx_sample_rate_put),
3438 SOC_ENUM_EXT("PRI_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3439 tdm_tx_sample_rate_get,
3440 tdm_tx_sample_rate_put),
3441 SOC_ENUM_EXT("PRI_TDM_RX_0 Format", tdm_rx_format,
3442 tdm_rx_format_get,
3443 tdm_rx_format_put),
3444 SOC_ENUM_EXT("PRI_TDM_TX_0 Format", tdm_tx_format,
3445 tdm_tx_format_get,
3446 tdm_tx_format_put),
3447 SOC_ENUM_EXT("PRI_TDM_RX_0 Channels", tdm_rx_chs,
3448 tdm_rx_ch_get,
3449 tdm_rx_ch_put),
3450 SOC_ENUM_EXT("PRI_TDM_TX_0 Channels", tdm_tx_chs,
3451 tdm_tx_ch_get,
3452 tdm_tx_ch_put),
3453 SOC_ENUM_EXT("SEC_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3454 tdm_rx_sample_rate_get,
3455 tdm_rx_sample_rate_put),
3456 SOC_ENUM_EXT("SEC_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3457 tdm_tx_sample_rate_get,
3458 tdm_tx_sample_rate_put),
3459 SOC_ENUM_EXT("SEC_TDM_RX_0 Format", tdm_rx_format,
3460 tdm_rx_format_get,
3461 tdm_rx_format_put),
3462 SOC_ENUM_EXT("SEC_TDM_TX_0 Format", tdm_tx_format,
3463 tdm_tx_format_get,
3464 tdm_tx_format_put),
3465 SOC_ENUM_EXT("SEC_TDM_RX_0 Channels", tdm_rx_chs,
3466 tdm_rx_ch_get,
3467 tdm_rx_ch_put),
3468 SOC_ENUM_EXT("SEC_TDM_TX_0 Channels", tdm_tx_chs,
3469 tdm_tx_ch_get,
3470 tdm_tx_ch_put),
3471 SOC_ENUM_EXT("TERT_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3472 tdm_rx_sample_rate_get,
3473 tdm_rx_sample_rate_put),
3474 SOC_ENUM_EXT("TERT_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3475 tdm_tx_sample_rate_get,
3476 tdm_tx_sample_rate_put),
3477 SOC_ENUM_EXT("TERT_TDM_RX_0 Format", tdm_rx_format,
3478 tdm_rx_format_get,
3479 tdm_rx_format_put),
3480 SOC_ENUM_EXT("TERT_TDM_TX_0 Format", tdm_tx_format,
3481 tdm_tx_format_get,
3482 tdm_tx_format_put),
3483 SOC_ENUM_EXT("TERT_TDM_RX_0 Channels", tdm_rx_chs,
3484 tdm_rx_ch_get,
3485 tdm_rx_ch_put),
3486 SOC_ENUM_EXT("TERT_TDM_TX_0 Channels", tdm_tx_chs,
3487 tdm_tx_ch_get,
3488 tdm_tx_ch_put),
3489 SOC_ENUM_EXT("QUAT_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3490 tdm_rx_sample_rate_get,
3491 tdm_rx_sample_rate_put),
3492 SOC_ENUM_EXT("QUAT_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3493 tdm_tx_sample_rate_get,
3494 tdm_tx_sample_rate_put),
3495 SOC_ENUM_EXT("QUAT_TDM_RX_0 Format", tdm_rx_format,
3496 tdm_rx_format_get,
3497 tdm_rx_format_put),
3498 SOC_ENUM_EXT("QUAT_TDM_TX_0 Format", tdm_tx_format,
3499 tdm_tx_format_get,
3500 tdm_tx_format_put),
3501 SOC_ENUM_EXT("QUAT_TDM_RX_0 Channels", tdm_rx_chs,
3502 tdm_rx_ch_get,
3503 tdm_rx_ch_put),
3504 SOC_ENUM_EXT("QUAT_TDM_TX_0 Channels", tdm_tx_chs,
3505 tdm_tx_ch_get,
3506 tdm_tx_ch_put),
3507 SOC_ENUM_EXT("QUIN_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3508 tdm_rx_sample_rate_get,
3509 tdm_rx_sample_rate_put),
3510 SOC_ENUM_EXT("QUIN_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3511 tdm_tx_sample_rate_get,
3512 tdm_tx_sample_rate_put),
3513 SOC_ENUM_EXT("QUIN_TDM_RX_0 Format", tdm_rx_format,
3514 tdm_rx_format_get,
3515 tdm_rx_format_put),
3516 SOC_ENUM_EXT("QUIN_TDM_TX_0 Format", tdm_tx_format,
3517 tdm_tx_format_get,
3518 tdm_tx_format_put),
3519 SOC_ENUM_EXT("QUIN_TDM_RX_0 Channels", tdm_rx_chs,
3520 tdm_rx_ch_get,
3521 tdm_rx_ch_put),
3522 SOC_ENUM_EXT("QUIN_TDM_TX_0 Channels", tdm_tx_chs,
3523 tdm_tx_ch_get,
3524 tdm_tx_ch_put),
3525 SOC_ENUM_EXT("PRIM_AUX_PCM_RX SampleRate", prim_aux_pcm_rx_sample_rate,
3526 aux_pcm_rx_sample_rate_get,
3527 aux_pcm_rx_sample_rate_put),
3528 SOC_ENUM_EXT("SEC_AUX_PCM_RX SampleRate", sec_aux_pcm_rx_sample_rate,
3529 aux_pcm_rx_sample_rate_get,
3530 aux_pcm_rx_sample_rate_put),
3531 SOC_ENUM_EXT("TERT_AUX_PCM_RX SampleRate", tert_aux_pcm_rx_sample_rate,
3532 aux_pcm_rx_sample_rate_get,
3533 aux_pcm_rx_sample_rate_put),
3534 SOC_ENUM_EXT("QUAT_AUX_PCM_RX SampleRate", quat_aux_pcm_rx_sample_rate,
3535 aux_pcm_rx_sample_rate_get,
3536 aux_pcm_rx_sample_rate_put),
3537 SOC_ENUM_EXT("QUIN_AUX_PCM_RX SampleRate", quin_aux_pcm_rx_sample_rate,
3538 aux_pcm_rx_sample_rate_get,
3539 aux_pcm_rx_sample_rate_put),
3540 SOC_ENUM_EXT("PRIM_AUX_PCM_TX SampleRate", prim_aux_pcm_tx_sample_rate,
3541 aux_pcm_tx_sample_rate_get,
3542 aux_pcm_tx_sample_rate_put),
3543 SOC_ENUM_EXT("SEC_AUX_PCM_TX SampleRate", sec_aux_pcm_tx_sample_rate,
3544 aux_pcm_tx_sample_rate_get,
3545 aux_pcm_tx_sample_rate_put),
3546 SOC_ENUM_EXT("TERT_AUX_PCM_TX SampleRate", tert_aux_pcm_tx_sample_rate,
3547 aux_pcm_tx_sample_rate_get,
3548 aux_pcm_tx_sample_rate_put),
3549 SOC_ENUM_EXT("QUAT_AUX_PCM_TX SampleRate", quat_aux_pcm_tx_sample_rate,
3550 aux_pcm_tx_sample_rate_get,
3551 aux_pcm_tx_sample_rate_put),
3552 SOC_ENUM_EXT("QUIN_AUX_PCM_TX SampleRate", quin_aux_pcm_tx_sample_rate,
3553 aux_pcm_tx_sample_rate_get,
3554 aux_pcm_tx_sample_rate_put),
3555 SOC_ENUM_EXT("PRIM_MI2S_RX SampleRate", prim_mi2s_rx_sample_rate,
3556 mi2s_rx_sample_rate_get,
3557 mi2s_rx_sample_rate_put),
3558 SOC_ENUM_EXT("SEC_MI2S_RX SampleRate", sec_mi2s_rx_sample_rate,
3559 mi2s_rx_sample_rate_get,
3560 mi2s_rx_sample_rate_put),
3561 SOC_ENUM_EXT("TERT_MI2S_RX SampleRate", tert_mi2s_rx_sample_rate,
3562 mi2s_rx_sample_rate_get,
3563 mi2s_rx_sample_rate_put),
3564 SOC_ENUM_EXT("QUAT_MI2S_RX SampleRate", quat_mi2s_rx_sample_rate,
3565 mi2s_rx_sample_rate_get,
3566 mi2s_rx_sample_rate_put),
3567 SOC_ENUM_EXT("QUIN_MI2S_RX SampleRate", quin_mi2s_rx_sample_rate,
3568 mi2s_rx_sample_rate_get,
3569 mi2s_rx_sample_rate_put),
3570 SOC_ENUM_EXT("PRIM_MI2S_TX SampleRate", prim_mi2s_tx_sample_rate,
3571 mi2s_tx_sample_rate_get,
3572 mi2s_tx_sample_rate_put),
3573 SOC_ENUM_EXT("SEC_MI2S_TX SampleRate", sec_mi2s_tx_sample_rate,
3574 mi2s_tx_sample_rate_get,
3575 mi2s_tx_sample_rate_put),
3576 SOC_ENUM_EXT("TERT_MI2S_TX SampleRate", tert_mi2s_tx_sample_rate,
3577 mi2s_tx_sample_rate_get,
3578 mi2s_tx_sample_rate_put),
3579 SOC_ENUM_EXT("QUAT_MI2S_TX SampleRate", quat_mi2s_tx_sample_rate,
3580 mi2s_tx_sample_rate_get,
3581 mi2s_tx_sample_rate_put),
3582 SOC_ENUM_EXT("QUIN_MI2S_TX SampleRate", quin_mi2s_tx_sample_rate,
3583 mi2s_tx_sample_rate_get,
3584 mi2s_tx_sample_rate_put),
3585 SOC_ENUM_EXT("PRIM_MI2S_RX Channels", prim_mi2s_rx_chs,
3586 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
3587 SOC_ENUM_EXT("PRIM_MI2S_TX Channels", prim_mi2s_tx_chs,
3588 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
3589 SOC_ENUM_EXT("SEC_MI2S_RX Channels", sec_mi2s_rx_chs,
3590 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
3591 SOC_ENUM_EXT("SEC_MI2S_TX Channels", sec_mi2s_tx_chs,
3592 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
3593 SOC_ENUM_EXT("TERT_MI2S_RX Channels", tert_mi2s_rx_chs,
3594 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
3595 SOC_ENUM_EXT("TERT_MI2S_TX Channels", tert_mi2s_tx_chs,
3596 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
3597 SOC_ENUM_EXT("QUAT_MI2S_RX Channels", quat_mi2s_rx_chs,
3598 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
3599 SOC_ENUM_EXT("QUAT_MI2S_TX Channels", quat_mi2s_tx_chs,
3600 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
3601 SOC_ENUM_EXT("QUIN_MI2S_RX Channels", quin_mi2s_rx_chs,
3602 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
3603 SOC_ENUM_EXT("QUIN_MI2S_TX Channels", quin_mi2s_tx_chs,
3604 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
3605 SOC_ENUM_EXT("PRIM_MI2S_RX Format", mi2s_rx_format,
3606 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
3607 SOC_ENUM_EXT("PRIM_MI2S_TX Format", mi2s_tx_format,
3608 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
3609 SOC_ENUM_EXT("SEC_MI2S_RX Format", mi2s_rx_format,
3610 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
3611 SOC_ENUM_EXT("SEC_MI2S_TX Format", mi2s_tx_format,
3612 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
3613 SOC_ENUM_EXT("TERT_MI2S_RX Format", mi2s_rx_format,
3614 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
3615 SOC_ENUM_EXT("TERT_MI2S_TX Format", mi2s_tx_format,
3616 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
3617 SOC_ENUM_EXT("QUAT_MI2S_RX Format", mi2s_rx_format,
3618 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
3619 SOC_ENUM_EXT("QUAT_MI2S_TX Format", mi2s_tx_format,
3620 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
3621 SOC_ENUM_EXT("QUIN_MI2S_RX Format", mi2s_rx_format,
3622 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
3623 SOC_ENUM_EXT("QUIN_MI2S_TX Format", mi2s_tx_format,
3624 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
3625 SOC_ENUM_EXT("PRIM_AUX_PCM_RX Format", aux_pcm_rx_format,
3626 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3627 SOC_ENUM_EXT("PRIM_AUX_PCM_TX Format", aux_pcm_tx_format,
3628 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3629 SOC_ENUM_EXT("SEC_AUX_PCM_RX Format", aux_pcm_rx_format,
3630 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3631 SOC_ENUM_EXT("SEC_AUX_PCM_TX Format", aux_pcm_tx_format,
3632 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3633 SOC_ENUM_EXT("TERT_AUX_PCM_RX Format", aux_pcm_rx_format,
3634 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3635 SOC_ENUM_EXT("TERT_AUX_PCM_TX Format", aux_pcm_tx_format,
3636 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3637 SOC_ENUM_EXT("QUAT_AUX_PCM_RX Format", aux_pcm_rx_format,
3638 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3639 SOC_ENUM_EXT("QUAT_AUX_PCM_TX Format", aux_pcm_tx_format,
3640 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3641 SOC_ENUM_EXT("QUIN_AUX_PCM_RX Format", aux_pcm_rx_format,
3642 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3643 SOC_ENUM_EXT("QUIN_AUX_PCM_TX Format", aux_pcm_tx_format,
3644 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3645 SOC_ENUM_EXT("HiFi Function", hifi_function, msm_hifi_get,
3646 msm_hifi_put),
3647 SOC_ENUM_EXT("BT SampleRate", bt_sample_rate,
3648 msm_bt_sample_rate_get,
3649 msm_bt_sample_rate_put),
3650};
3651
3652static int msm_snd_enable_codec_ext_clk(struct snd_soc_codec *codec,
3653 int enable, bool dapm)
3654{
3655 int ret = 0;
3656
3657 if (!strcmp(dev_name(codec->dev), "tavil_codec")) {
3658 ret = tavil_cdc_mclk_enable(codec, enable);
3659 } else {
3660 dev_err(codec->dev, "%s: unknown codec to enable ext clk\n",
3661 __func__);
3662 ret = -EINVAL;
3663 }
3664 return ret;
3665}
3666
3667static int msm_snd_enable_codec_ext_tx_clk(struct snd_soc_codec *codec,
3668 int enable, bool dapm)
3669{
3670 int ret = 0;
3671
3672 if (!strcmp(dev_name(codec->dev), "tavil_codec")) {
3673 ret = tavil_cdc_mclk_tx_enable(codec, enable);
3674 } else {
3675 dev_err(codec->dev, "%s: unknown codec to enable TX ext clk\n",
3676 __func__);
3677 ret = -EINVAL;
3678 }
3679
3680 return ret;
3681}
3682
3683static int msm_mclk_tx_event(struct snd_soc_dapm_widget *w,
3684 struct snd_kcontrol *kcontrol, int event)
3685{
3686 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
3687
3688 pr_debug("%s: event = %d\n", __func__, event);
3689
3690 switch (event) {
3691 case SND_SOC_DAPM_PRE_PMU:
3692 return msm_snd_enable_codec_ext_tx_clk(codec, 1, true);
3693 case SND_SOC_DAPM_POST_PMD:
3694 return msm_snd_enable_codec_ext_tx_clk(codec, 0, true);
3695 }
3696 return 0;
3697}
3698
3699static int msm_mclk_event(struct snd_soc_dapm_widget *w,
3700 struct snd_kcontrol *kcontrol, int event)
3701{
3702 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
3703
3704 pr_debug("%s: event = %d\n", __func__, event);
3705
3706 switch (event) {
3707 case SND_SOC_DAPM_PRE_PMU:
3708 return msm_snd_enable_codec_ext_clk(codec, 1, true);
3709 case SND_SOC_DAPM_POST_PMD:
3710 return msm_snd_enable_codec_ext_clk(codec, 0, true);
3711 }
3712 return 0;
3713}
3714
3715static int msm_hifi_ctrl_event(struct snd_soc_dapm_widget *w,
3716 struct snd_kcontrol *k, int event)
3717{
3718 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
3719 struct snd_soc_card *card = codec->component.card;
3720 struct msm_asoc_mach_data *pdata =
3721 snd_soc_card_get_drvdata(card);
3722
3723 dev_dbg(codec->dev, "%s: msm_hifi_control = %d\n",
3724 __func__, msm_hifi_control);
3725
3726 if (!pdata || !pdata->hph_en0_gpio_p) {
3727 dev_err(codec->dev, "%s: hph_en0_gpio is invalid\n", __func__);
3728 return -EINVAL;
3729 }
3730
3731 if (msm_hifi_control != MSM_HIFI_ON) {
3732 dev_dbg(codec->dev, "%s: HiFi mixer control is not set\n",
3733 __func__);
3734 return 0;
3735 }
3736
3737 switch (event) {
3738 case SND_SOC_DAPM_POST_PMU:
3739 msm_cdc_pinctrl_select_active_state(pdata->hph_en0_gpio_p);
3740 break;
3741 case SND_SOC_DAPM_PRE_PMD:
3742 msm_cdc_pinctrl_select_sleep_state(pdata->hph_en0_gpio_p);
3743 break;
3744 }
3745
3746 return 0;
3747}
3748
3749static const struct snd_soc_dapm_widget msm_dapm_widgets_tavil[] = {
3750
3751 SND_SOC_DAPM_SUPPLY("MCLK", SND_SOC_NOPM, 0, 0,
3752 msm_mclk_event,
3753 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
3754
3755 SND_SOC_DAPM_SUPPLY("MCLK TX", SND_SOC_NOPM, 0, 0,
3756 msm_mclk_tx_event, SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
3757
3758 SND_SOC_DAPM_SPK("Lineout_1 amp", NULL),
3759 SND_SOC_DAPM_SPK("Lineout_2 amp", NULL),
3760 SND_SOC_DAPM_SPK("hifi amp", msm_hifi_ctrl_event),
3761 SND_SOC_DAPM_MIC("Handset Mic", NULL),
3762 SND_SOC_DAPM_MIC("Headset Mic", NULL),
3763 SND_SOC_DAPM_MIC("ANCRight Headset Mic", NULL),
3764 SND_SOC_DAPM_MIC("ANCLeft Headset Mic", NULL),
3765 SND_SOC_DAPM_MIC("Analog Mic5", NULL),
3766
3767 SND_SOC_DAPM_MIC("Digital Mic0", NULL),
3768 SND_SOC_DAPM_MIC("Digital Mic1", NULL),
3769 SND_SOC_DAPM_MIC("Digital Mic2", NULL),
3770 SND_SOC_DAPM_MIC("Digital Mic3", NULL),
3771 SND_SOC_DAPM_MIC("Digital Mic4", NULL),
3772 SND_SOC_DAPM_MIC("Digital Mic5", NULL),
3773};
3774
3775static int msm_dmic_event(struct snd_soc_dapm_widget *w,
3776 struct snd_kcontrol *kcontrol, int event)
3777{
3778 struct msm_asoc_mach_data *pdata = NULL;
3779 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
3780 int ret = 0;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]3781 u32 dmic_idx;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]3782 int *dmic_gpio_cnt;
3783 struct device_node *dmic_gpio;
3784 char *wname;
3785
3786 wname = strpbrk(w->name, "0123");
3787 if (!wname) {
3788 dev_err(codec->dev, "%s: widget not found\n", __func__);
3789 return -EINVAL;
3790 }
3791
3792 ret = kstrtouint(wname, 10, &dmic_idx);
3793 if (ret < 0) {
3794 dev_err(codec->dev, "%s: Invalid DMIC line on the codec\n",
3795 __func__);
3796 return -EINVAL;
3797 }
3798
3799 pdata = snd_soc_card_get_drvdata(codec->component.card);
3800
3801 switch (dmic_idx) {
3802 case 0:
3803 case 1:
3804 dmic_gpio_cnt = &dmic_0_1_gpio_cnt;
3805 dmic_gpio = pdata->dmic01_gpio_p;
3806 break;
3807 case 2:
3808 case 3:
3809 dmic_gpio_cnt = &dmic_2_3_gpio_cnt;
3810 dmic_gpio = pdata->dmic23_gpio_p;
3811 break;
3812 default:
3813 dev_err(codec->dev, "%s: Invalid DMIC Selection\n",
3814 __func__);
3815 return -EINVAL;
3816 }
3817
3818 dev_dbg(codec->dev, "%s: event %d DMIC%d dmic_gpio_cnt %d\n",
3819 __func__, event, dmic_idx, *dmic_gpio_cnt);
3820
3821 switch (event) {
3822 case SND_SOC_DAPM_PRE_PMU:
3823 (*dmic_gpio_cnt)++;
3824 if (*dmic_gpio_cnt == 1) {
3825 ret = msm_cdc_pinctrl_select_active_state(
3826 dmic_gpio);
3827 if (ret < 0) {
3828 pr_err("%s: gpio set cannot be activated %sd",
3829 __func__, "dmic_gpio");
3830 return ret;
3831 }
3832 }
3833
3834 break;
3835 case SND_SOC_DAPM_POST_PMD:
3836 (*dmic_gpio_cnt)--;
3837 if (*dmic_gpio_cnt == 0) {
3838 ret = msm_cdc_pinctrl_select_sleep_state(
3839 dmic_gpio);
3840 if (ret < 0) {
3841 pr_err("%s: gpio set cannot be de-activated %sd",
3842 __func__, "dmic_gpio");
3843 return ret;
3844 }
3845 }
3846 break;
3847 default:
3848 pr_err("%s: invalid DAPM event %d\n", __func__, event);
3849 return -EINVAL;
3850 }
3851 return 0;
3852}
3853
3854static const struct snd_soc_dapm_widget msm_int_dapm_widgets[] = {
3855 SND_SOC_DAPM_MIC("Analog Mic1", NULL),
3856 SND_SOC_DAPM_MIC("Analog Mic2", NULL),
3857 SND_SOC_DAPM_MIC("Analog Mic3", NULL),
3858 SND_SOC_DAPM_MIC("Analog Mic4", NULL),
3859 SND_SOC_DAPM_MIC("Digital Mic0", msm_dmic_event),
3860 SND_SOC_DAPM_MIC("Digital Mic1", msm_dmic_event),
3861 SND_SOC_DAPM_MIC("Digital Mic2", msm_dmic_event),
3862 SND_SOC_DAPM_MIC("Digital Mic3", msm_dmic_event),
3863};
3864
3865static inline int param_is_mask(int p)
3866{
3867 return (p >= SNDRV_PCM_HW_PARAM_FIRST_MASK) &&
3868 (p <= SNDRV_PCM_HW_PARAM_LAST_MASK);
3869}
3870
3871static inline struct snd_mask *param_to_mask(struct snd_pcm_hw_params *p,
3872 int n)
3873{
3874 return &(p->masks[n - SNDRV_PCM_HW_PARAM_FIRST_MASK]);
3875}
3876
3877static void param_set_mask(struct snd_pcm_hw_params *p, int n,
3878 unsigned int bit)
3879{
3880 if (bit >= SNDRV_MASK_MAX)
3881 return;
3882 if (param_is_mask(n)) {
3883 struct snd_mask *m = param_to_mask(p, n);
3884
3885 m->bits[0] = 0;
3886 m->bits[1] = 0;
3887 m->bits[bit >> 5] |= (1 << (bit & 31));
3888 }
3889}
3890
3891static int msm_slim_get_ch_from_beid(int32_t be_id)
3892{
3893 int ch_id = 0;
3894
3895 switch (be_id) {
3896 case MSM_BACKEND_DAI_SLIMBUS_0_RX:
3897 ch_id = SLIM_RX_0;
3898 break;
3899 case MSM_BACKEND_DAI_SLIMBUS_1_RX:
3900 ch_id = SLIM_RX_1;
3901 break;
3902 case MSM_BACKEND_DAI_SLIMBUS_2_RX:
3903 ch_id = SLIM_RX_2;
3904 break;
3905 case MSM_BACKEND_DAI_SLIMBUS_3_RX:
3906 ch_id = SLIM_RX_3;
3907 break;
3908 case MSM_BACKEND_DAI_SLIMBUS_4_RX:
3909 ch_id = SLIM_RX_4;
3910 break;
3911 case MSM_BACKEND_DAI_SLIMBUS_6_RX:
3912 ch_id = SLIM_RX_6;
3913 break;
3914 case MSM_BACKEND_DAI_SLIMBUS_0_TX:
3915 ch_id = SLIM_TX_0;
3916 break;
3917 case MSM_BACKEND_DAI_SLIMBUS_3_TX:
3918 ch_id = SLIM_TX_3;
3919 break;
3920 default:
3921 ch_id = SLIM_RX_0;
3922 break;
3923 }
3924
3925 return ch_id;
3926}
3927
3928static int msm_cdc_dma_get_idx_from_beid(int32_t be_id)
3929{
3930 int idx = 0;
3931
3932 switch (be_id) {
3933 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
3934 idx = WSA_CDC_DMA_RX_0;
3935 break;
3936 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
3937 idx = WSA_CDC_DMA_TX_0;
3938 break;
3939 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
3940 idx = WSA_CDC_DMA_RX_1;
3941 break;
3942 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
3943 idx = WSA_CDC_DMA_TX_1;
3944 break;
3945 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
3946 idx = WSA_CDC_DMA_TX_2;
3947 break;
3948 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
3949 idx = RX_CDC_DMA_RX_0;
3950 break;
3951 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
3952 idx = RX_CDC_DMA_RX_1;
3953 break;
3954 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
3955 idx = RX_CDC_DMA_RX_2;
3956 break;
3957 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_3:
3958 idx = RX_CDC_DMA_RX_3;
3959 break;
3960 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_5:
3961 idx = RX_CDC_DMA_RX_5;
3962 break;
3963 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
3964 idx = TX_CDC_DMA_TX_0;
3965 break;
3966 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
3967 idx = TX_CDC_DMA_TX_3;
3968 break;
3969 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
3970 idx = TX_CDC_DMA_TX_4;
3971 break;
3972 default:
3973 idx = RX_CDC_DMA_RX_0;
3974 break;
3975 }
3976
3977 return idx;
3978}
3979
3980static int msm_ext_disp_get_idx_from_beid(int32_t be_id)
3981{
3982 int idx = -EINVAL;
3983
3984 switch (be_id) {
3985 case MSM_BACKEND_DAI_DISPLAY_PORT_RX:
3986 idx = DP_RX_IDX;
3987 break;
3988 default:
3989 pr_err("%s: Incorrect ext_disp BE id %d\n", __func__, be_id);
3990 idx = -EINVAL;
3991 break;
3992 }
3993
3994 return idx;
3995}
3996
3997static int msm_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
3998 struct snd_pcm_hw_params *params)
3999{
4000 struct snd_soc_dai_link *dai_link = rtd->dai_link;
4001 struct snd_interval *rate = hw_param_interval(params,
4002 SNDRV_PCM_HW_PARAM_RATE);
4003 struct snd_interval *channels = hw_param_interval(params,
4004 SNDRV_PCM_HW_PARAM_CHANNELS);
4005 int rc = 0;
4006 int idx;
4007 void *config = NULL;
4008 struct snd_soc_codec *codec = NULL;
4009
4010 pr_debug("%s: format = %d, rate = %d\n",
4011 __func__, params_format(params), params_rate(params));
4012
4013 switch (dai_link->id) {
4014 case MSM_BACKEND_DAI_SLIMBUS_0_RX:
4015 case MSM_BACKEND_DAI_SLIMBUS_1_RX:
4016 case MSM_BACKEND_DAI_SLIMBUS_2_RX:
4017 case MSM_BACKEND_DAI_SLIMBUS_3_RX:
4018 case MSM_BACKEND_DAI_SLIMBUS_4_RX:
4019 case MSM_BACKEND_DAI_SLIMBUS_6_RX:
4020 idx = msm_slim_get_ch_from_beid(dai_link->id);
4021 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4022 slim_rx_cfg[idx].bit_format);
4023 rate->min = rate->max = slim_rx_cfg[idx].sample_rate;
4024 channels->min = channels->max = slim_rx_cfg[idx].channels;
4025 break;
4026
4027 case MSM_BACKEND_DAI_SLIMBUS_0_TX:
4028 case MSM_BACKEND_DAI_SLIMBUS_3_TX:
4029 idx = msm_slim_get_ch_from_beid(dai_link->id);
4030 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4031 slim_tx_cfg[idx].bit_format);
4032 rate->min = rate->max = slim_tx_cfg[idx].sample_rate;
4033 channels->min = channels->max = slim_tx_cfg[idx].channels;
4034 break;
4035
4036 case MSM_BACKEND_DAI_SLIMBUS_1_TX:
4037 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4038 slim_tx_cfg[1].bit_format);
4039 rate->min = rate->max = slim_tx_cfg[1].sample_rate;
4040 channels->min = channels->max = slim_tx_cfg[1].channels;
4041 break;
4042
4043 case MSM_BACKEND_DAI_SLIMBUS_4_TX:
4044 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4045 SNDRV_PCM_FORMAT_S32_LE);
4046 rate->min = rate->max = SAMPLING_RATE_8KHZ;
4047 channels->min = channels->max = msm_vi_feed_tx_ch;
4048 break;
4049
4050 case MSM_BACKEND_DAI_SLIMBUS_5_RX:
4051 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4052 slim_rx_cfg[5].bit_format);
4053 rate->min = rate->max = slim_rx_cfg[5].sample_rate;
4054 channels->min = channels->max = slim_rx_cfg[5].channels;
4055 break;
4056
4057 case MSM_BACKEND_DAI_SLIMBUS_5_TX:
4058 codec = rtd->codec;
4059 rate->min = rate->max = SAMPLING_RATE_16KHZ;
4060 channels->min = channels->max = 1;
4061
4062 config = msm_codec_fn.get_afe_config_fn(codec,
4063 AFE_SLIMBUS_SLAVE_PORT_CONFIG);
4064 if (config) {
4065 rc = afe_set_config(AFE_SLIMBUS_SLAVE_PORT_CONFIG,
4066 config, SLIMBUS_5_TX);
4067 if (rc)
4068 pr_err("%s: Failed to set slimbus slave port config %d\n",
4069 __func__, rc);
4070 }
4071 break;
4072
4073 case MSM_BACKEND_DAI_SLIMBUS_7_RX:
4074 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4075 slim_rx_cfg[SLIM_RX_7].bit_format);
4076 rate->min = rate->max = slim_rx_cfg[SLIM_RX_7].sample_rate;
4077 channels->min = channels->max =
4078 slim_rx_cfg[SLIM_RX_7].channels;
4079 break;
4080
4081 case MSM_BACKEND_DAI_SLIMBUS_7_TX:
4082 rate->min = rate->max = slim_tx_cfg[SLIM_TX_7].sample_rate;
4083 channels->min = channels->max =
4084 slim_tx_cfg[SLIM_TX_7].channels;
4085 break;
4086
4087 case MSM_BACKEND_DAI_SLIMBUS_8_TX:
4088 rate->min = rate->max = slim_tx_cfg[SLIM_TX_8].sample_rate;
4089 channels->min = channels->max =
4090 slim_tx_cfg[SLIM_TX_8].channels;
4091 break;
4092
4093 case MSM_BACKEND_DAI_USB_RX:
4094 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4095 usb_rx_cfg.bit_format);
4096 rate->min = rate->max = usb_rx_cfg.sample_rate;
4097 channels->min = channels->max = usb_rx_cfg.channels;
4098 break;
4099
4100 case MSM_BACKEND_DAI_USB_TX:
4101 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4102 usb_tx_cfg.bit_format);
4103 rate->min = rate->max = usb_tx_cfg.sample_rate;
4104 channels->min = channels->max = usb_tx_cfg.channels;
4105 break;
4106
4107 case MSM_BACKEND_DAI_DISPLAY_PORT_RX:
4108 idx = msm_ext_disp_get_idx_from_beid(dai_link->id);
4109 if (idx < 0) {
4110 pr_err("%s: Incorrect ext disp idx %d\n",
4111 __func__, idx);
4112 rc = idx;
4113 goto done;
4114 }
4115
4116 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4117 ext_disp_rx_cfg[idx].bit_format);
4118 rate->min = rate->max = ext_disp_rx_cfg[idx].sample_rate;
4119 channels->min = channels->max = ext_disp_rx_cfg[idx].channels;
4120 break;
4121
4122 case MSM_BACKEND_DAI_AFE_PCM_RX:
4123 channels->min = channels->max = proxy_rx_cfg.channels;
4124 rate->min = rate->max = SAMPLING_RATE_48KHZ;
4125 break;
4126
4127 case MSM_BACKEND_DAI_PRI_TDM_RX_0:
4128 channels->min = channels->max =
4129 tdm_rx_cfg[TDM_PRI][TDM_0].channels;
4130 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4131 tdm_rx_cfg[TDM_PRI][TDM_0].bit_format);
4132 rate->min = rate->max = tdm_rx_cfg[TDM_PRI][TDM_0].sample_rate;
4133 break;
4134
4135 case MSM_BACKEND_DAI_PRI_TDM_TX_0:
4136 channels->min = channels->max =
4137 tdm_tx_cfg[TDM_PRI][TDM_0].channels;
4138 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4139 tdm_tx_cfg[TDM_PRI][TDM_0].bit_format);
4140 rate->min = rate->max = tdm_tx_cfg[TDM_PRI][TDM_0].sample_rate;
4141 break;
4142
4143 case MSM_BACKEND_DAI_SEC_TDM_RX_0:
4144 channels->min = channels->max =
4145 tdm_rx_cfg[TDM_SEC][TDM_0].channels;
4146 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4147 tdm_rx_cfg[TDM_SEC][TDM_0].bit_format);
4148 rate->min = rate->max = tdm_rx_cfg[TDM_SEC][TDM_0].sample_rate;
4149 break;
4150
4151 case MSM_BACKEND_DAI_SEC_TDM_TX_0:
4152 channels->min = channels->max =
4153 tdm_tx_cfg[TDM_SEC][TDM_0].channels;
4154 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4155 tdm_tx_cfg[TDM_SEC][TDM_0].bit_format);
4156 rate->min = rate->max = tdm_tx_cfg[TDM_SEC][TDM_0].sample_rate;
4157 break;
4158
4159 case MSM_BACKEND_DAI_TERT_TDM_RX_0:
4160 channels->min = channels->max =
4161 tdm_rx_cfg[TDM_TERT][TDM_0].channels;
4162 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4163 tdm_rx_cfg[TDM_TERT][TDM_0].bit_format);
4164 rate->min = rate->max = tdm_rx_cfg[TDM_TERT][TDM_0].sample_rate;
4165 break;
4166
4167 case MSM_BACKEND_DAI_TERT_TDM_TX_0:
4168 channels->min = channels->max =
4169 tdm_tx_cfg[TDM_TERT][TDM_0].channels;
4170 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4171 tdm_tx_cfg[TDM_TERT][TDM_0].bit_format);
4172 rate->min = rate->max = tdm_tx_cfg[TDM_TERT][TDM_0].sample_rate;
4173 break;
4174
4175 case MSM_BACKEND_DAI_QUAT_TDM_RX_0:
4176 channels->min = channels->max =
4177 tdm_rx_cfg[TDM_QUAT][TDM_0].channels;
4178 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4179 tdm_rx_cfg[TDM_QUAT][TDM_0].bit_format);
4180 rate->min = rate->max = tdm_rx_cfg[TDM_QUAT][TDM_0].sample_rate;
4181 break;
4182
4183 case MSM_BACKEND_DAI_QUAT_TDM_TX_0:
4184 channels->min = channels->max =
4185 tdm_tx_cfg[TDM_QUAT][TDM_0].channels;
4186 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4187 tdm_tx_cfg[TDM_QUAT][TDM_0].bit_format);
4188 rate->min = rate->max = tdm_tx_cfg[TDM_QUAT][TDM_0].sample_rate;
4189 break;
4190
4191 case MSM_BACKEND_DAI_QUIN_TDM_RX_0:
4192 channels->min = channels->max =
4193 tdm_rx_cfg[TDM_QUIN][TDM_0].channels;
4194 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4195 tdm_rx_cfg[TDM_QUIN][TDM_0].bit_format);
4196 rate->min = rate->max = tdm_rx_cfg[TDM_QUIN][TDM_0].sample_rate;
4197 break;
4198
4199 case MSM_BACKEND_DAI_QUIN_TDM_TX_0:
4200 channels->min = channels->max =
4201 tdm_tx_cfg[TDM_QUIN][TDM_0].channels;
4202 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4203 tdm_tx_cfg[TDM_QUIN][TDM_0].bit_format);
4204 rate->min = rate->max = tdm_tx_cfg[TDM_QUIN][TDM_0].sample_rate;
4205 break;
4206
4207
4208 case MSM_BACKEND_DAI_AUXPCM_RX:
4209 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4210 aux_pcm_rx_cfg[PRIM_AUX_PCM].bit_format);
4211 rate->min = rate->max =
4212 aux_pcm_rx_cfg[PRIM_AUX_PCM].sample_rate;
4213 channels->min = channels->max =
4214 aux_pcm_rx_cfg[PRIM_AUX_PCM].channels;
4215 break;
4216
4217 case MSM_BACKEND_DAI_AUXPCM_TX:
4218 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4219 aux_pcm_tx_cfg[PRIM_AUX_PCM].bit_format);
4220 rate->min = rate->max =
4221 aux_pcm_tx_cfg[PRIM_AUX_PCM].sample_rate;
4222 channels->min = channels->max =
4223 aux_pcm_tx_cfg[PRIM_AUX_PCM].channels;
4224 break;
4225
4226 case MSM_BACKEND_DAI_SEC_AUXPCM_RX:
4227 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4228 aux_pcm_rx_cfg[SEC_AUX_PCM].bit_format);
4229 rate->min = rate->max =
4230 aux_pcm_rx_cfg[SEC_AUX_PCM].sample_rate;
4231 channels->min = channels->max =
4232 aux_pcm_rx_cfg[SEC_AUX_PCM].channels;
4233 break;
4234
4235 case MSM_BACKEND_DAI_SEC_AUXPCM_TX:
4236 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4237 aux_pcm_tx_cfg[SEC_AUX_PCM].bit_format);
4238 rate->min = rate->max =
4239 aux_pcm_tx_cfg[SEC_AUX_PCM].sample_rate;
4240 channels->min = channels->max =
4241 aux_pcm_tx_cfg[SEC_AUX_PCM].channels;
4242 break;
4243
4244 case MSM_BACKEND_DAI_TERT_AUXPCM_RX:
4245 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4246 aux_pcm_rx_cfg[TERT_AUX_PCM].bit_format);
4247 rate->min = rate->max =
4248 aux_pcm_rx_cfg[TERT_AUX_PCM].sample_rate;
4249 channels->min = channels->max =
4250 aux_pcm_rx_cfg[TERT_AUX_PCM].channels;
4251 break;
4252
4253 case MSM_BACKEND_DAI_TERT_AUXPCM_TX:
4254 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4255 aux_pcm_tx_cfg[TERT_AUX_PCM].bit_format);
4256 rate->min = rate->max =
4257 aux_pcm_tx_cfg[TERT_AUX_PCM].sample_rate;
4258 channels->min = channels->max =
4259 aux_pcm_tx_cfg[TERT_AUX_PCM].channels;
4260 break;
4261
4262 case MSM_BACKEND_DAI_QUAT_AUXPCM_RX:
4263 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4264 aux_pcm_rx_cfg[QUAT_AUX_PCM].bit_format);
4265 rate->min = rate->max =
4266 aux_pcm_rx_cfg[QUAT_AUX_PCM].sample_rate;
4267 channels->min = channels->max =
4268 aux_pcm_rx_cfg[QUAT_AUX_PCM].channels;
4269 break;
4270
4271 case MSM_BACKEND_DAI_QUAT_AUXPCM_TX:
4272 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4273 aux_pcm_tx_cfg[QUAT_AUX_PCM].bit_format);
4274 rate->min = rate->max =
4275 aux_pcm_tx_cfg[QUAT_AUX_PCM].sample_rate;
4276 channels->min = channels->max =
4277 aux_pcm_tx_cfg[QUAT_AUX_PCM].channels;
4278 break;
4279
4280 case MSM_BACKEND_DAI_QUIN_AUXPCM_RX:
4281 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4282 aux_pcm_rx_cfg[QUIN_AUX_PCM].bit_format);
4283 rate->min = rate->max =
4284 aux_pcm_rx_cfg[QUIN_AUX_PCM].sample_rate;
4285 channels->min = channels->max =
4286 aux_pcm_rx_cfg[QUIN_AUX_PCM].channels;
4287 break;
4288
4289 case MSM_BACKEND_DAI_QUIN_AUXPCM_TX:
4290 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4291 aux_pcm_tx_cfg[QUIN_AUX_PCM].bit_format);
4292 rate->min = rate->max =
4293 aux_pcm_tx_cfg[QUIN_AUX_PCM].sample_rate;
4294 channels->min = channels->max =
4295 aux_pcm_tx_cfg[QUIN_AUX_PCM].channels;
4296 break;
4297
4298 case MSM_BACKEND_DAI_PRI_MI2S_RX:
4299 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4300 mi2s_rx_cfg[PRIM_MI2S].bit_format);
4301 rate->min = rate->max = mi2s_rx_cfg[PRIM_MI2S].sample_rate;
4302 channels->min = channels->max =
4303 mi2s_rx_cfg[PRIM_MI2S].channels;
4304 break;
4305
4306 case MSM_BACKEND_DAI_PRI_MI2S_TX:
4307 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4308 mi2s_tx_cfg[PRIM_MI2S].bit_format);
4309 rate->min = rate->max = mi2s_tx_cfg[PRIM_MI2S].sample_rate;
4310 channels->min = channels->max =
4311 mi2s_tx_cfg[PRIM_MI2S].channels;
4312 break;
4313
4314 case MSM_BACKEND_DAI_SECONDARY_MI2S_RX:
4315 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4316 mi2s_rx_cfg[SEC_MI2S].bit_format);
4317 rate->min = rate->max = mi2s_rx_cfg[SEC_MI2S].sample_rate;
4318 channels->min = channels->max =
4319 mi2s_rx_cfg[SEC_MI2S].channels;
4320 break;
4321
4322 case MSM_BACKEND_DAI_SECONDARY_MI2S_TX:
4323 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4324 mi2s_tx_cfg[SEC_MI2S].bit_format);
4325 rate->min = rate->max = mi2s_tx_cfg[SEC_MI2S].sample_rate;
4326 channels->min = channels->max =
4327 mi2s_tx_cfg[SEC_MI2S].channels;
4328 break;
4329
4330 case MSM_BACKEND_DAI_TERTIARY_MI2S_RX:
4331 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4332 mi2s_rx_cfg[TERT_MI2S].bit_format);
4333 rate->min = rate->max = mi2s_rx_cfg[TERT_MI2S].sample_rate;
4334 channels->min = channels->max =
4335 mi2s_rx_cfg[TERT_MI2S].channels;
4336 break;
4337
4338 case MSM_BACKEND_DAI_TERTIARY_MI2S_TX:
4339 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4340 mi2s_tx_cfg[TERT_MI2S].bit_format);
4341 rate->min = rate->max = mi2s_tx_cfg[TERT_MI2S].sample_rate;
4342 channels->min = channels->max =
4343 mi2s_tx_cfg[TERT_MI2S].channels;
4344 break;
4345
4346 case MSM_BACKEND_DAI_QUATERNARY_MI2S_RX:
4347 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4348 mi2s_rx_cfg[QUAT_MI2S].bit_format);
4349 rate->min = rate->max = mi2s_rx_cfg[QUAT_MI2S].sample_rate;
4350 channels->min = channels->max =
4351 mi2s_rx_cfg[QUAT_MI2S].channels;
4352 break;
4353
4354 case MSM_BACKEND_DAI_QUATERNARY_MI2S_TX:
4355 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4356 mi2s_tx_cfg[QUAT_MI2S].bit_format);
4357 rate->min = rate->max = mi2s_tx_cfg[QUAT_MI2S].sample_rate;
4358 channels->min = channels->max =
4359 mi2s_tx_cfg[QUAT_MI2S].channels;
4360 break;
4361
4362 case MSM_BACKEND_DAI_QUINARY_MI2S_RX:
4363 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4364 mi2s_rx_cfg[QUIN_MI2S].bit_format);
4365 rate->min = rate->max = mi2s_rx_cfg[QUIN_MI2S].sample_rate;
4366 channels->min = channels->max =
4367 mi2s_rx_cfg[QUIN_MI2S].channels;
4368 break;
4369
4370 case MSM_BACKEND_DAI_QUINARY_MI2S_TX:
4371 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4372 mi2s_tx_cfg[QUIN_MI2S].bit_format);
4373 rate->min = rate->max = mi2s_tx_cfg[QUIN_MI2S].sample_rate;
4374 channels->min = channels->max =
4375 mi2s_tx_cfg[QUIN_MI2S].channels;
4376 break;
4377
4378 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
4379 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
4380 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
4381 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
4382 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
4383 idx = msm_cdc_dma_get_idx_from_beid(dai_link->id);
4384 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4385 cdc_dma_rx_cfg[idx].bit_format);
4386 rate->min = rate->max = cdc_dma_rx_cfg[idx].sample_rate;
4387 channels->min = channels->max = cdc_dma_rx_cfg[idx].channels;
4388 break;
4389
4390 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
4391 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
4392 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame^]4393 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
4394 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4395 idx = msm_cdc_dma_get_idx_from_beid(dai_link->id);
4396 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4397 cdc_dma_tx_cfg[idx].bit_format);
4398 rate->min = rate->max = cdc_dma_tx_cfg[idx].sample_rate;
4399 channels->min = channels->max = cdc_dma_tx_cfg[idx].channels;
4400 break;
4401
4402 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
4403 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4404 SNDRV_PCM_FORMAT_S32_LE);
4405 rate->min = rate->max = SAMPLING_RATE_8KHZ;
4406 channels->min = channels->max = msm_vi_feed_tx_ch;
4407 break;
4408
4409 default:
4410 rate->min = rate->max = SAMPLING_RATE_48KHZ;
4411 break;
4412 }
4413
4414done:
4415 return rc;
4416}
4417
4418static bool msm_usbc_swap_gnd_mic(struct snd_soc_codec *codec, bool active)
4419{
4420 int value = 0;
4421 bool ret = 0;
4422 struct snd_soc_card *card = codec->component.card;
4423 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
4424 struct pinctrl_state *en2_pinctrl_active;
4425 struct pinctrl_state *en2_pinctrl_sleep;
4426
4427 if (!pdata->usbc_en2_gpio_p) {
4428 if (active) {
4429 /* if active and usbc_en2_gpio undefined, get pin */
4430 pdata->usbc_en2_gpio_p = devm_pinctrl_get(card->dev);
4431 if (IS_ERR_OR_NULL(pdata->usbc_en2_gpio_p)) {
4432 dev_err(card->dev,
4433 "%s: Can't get EN2 gpio pinctrl:%ld\n",
4434 __func__,
4435 PTR_ERR(pdata->usbc_en2_gpio_p));
4436 pdata->usbc_en2_gpio_p = NULL;
4437 return false;
4438 }
4439 } else {
4440 /* if not active and usbc_en2_gpio undefined, return */
4441 return false;
4442 }
4443 }
4444
4445 pdata->usbc_en2_gpio = of_get_named_gpio(card->dev->of_node,
4446 "qcom,usbc-analog-en2-gpio", 0);
4447 if (!gpio_is_valid(pdata->usbc_en2_gpio)) {
4448 dev_err(card->dev, "%s, property %s not in node %s",
4449 __func__, "qcom,usbc-analog-en2-gpio",
4450 card->dev->of_node->full_name);
4451 return false;
4452 }
4453
4454 en2_pinctrl_active = pinctrl_lookup_state(
4455 pdata->usbc_en2_gpio_p, "aud_active");
4456 if (IS_ERR_OR_NULL(en2_pinctrl_active)) {
4457 dev_err(card->dev,
4458 "%s: Cannot get aud_active pinctrl state:%ld\n",
4459 __func__, PTR_ERR(en2_pinctrl_active));
4460 ret = false;
4461 goto err_lookup_state;
4462 }
4463
4464 en2_pinctrl_sleep = pinctrl_lookup_state(
4465 pdata->usbc_en2_gpio_p, "aud_sleep");
4466 if (IS_ERR_OR_NULL(en2_pinctrl_sleep)) {
4467 dev_err(card->dev,
4468 "%s: Cannot get aud_sleep pinctrl state:%ld\n",
4469 __func__, PTR_ERR(en2_pinctrl_sleep));
4470 ret = false;
4471 goto err_lookup_state;
4472 }
4473
4474 /* if active and usbc_en2_gpio_p defined, swap using usbc_en2_gpio_p */
4475 if (active) {
4476 dev_dbg(codec->dev, "%s: enter\n", __func__);
4477 if (pdata->usbc_en2_gpio_p) {
4478 value = gpio_get_value_cansleep(pdata->usbc_en2_gpio);
4479 if (value)
4480 pinctrl_select_state(pdata->usbc_en2_gpio_p,
4481 en2_pinctrl_sleep);
4482 else
4483 pinctrl_select_state(pdata->usbc_en2_gpio_p,
4484 en2_pinctrl_active);
4485 } else if (pdata->usbc_en2_gpio >= 0) {
4486 value = gpio_get_value_cansleep(pdata->usbc_en2_gpio);
4487 gpio_set_value_cansleep(pdata->usbc_en2_gpio, !value);
4488 }
4489 pr_debug("%s: swap select switch %d to %d\n", __func__,
4490 value, !value);
4491 ret = true;
4492 } else {
4493 /* if not active, release usbc_en2_gpio_p pin */
4494 pinctrl_select_state(pdata->usbc_en2_gpio_p,
4495 en2_pinctrl_sleep);
4496 }
4497
4498err_lookup_state:
4499 devm_pinctrl_put(pdata->usbc_en2_gpio_p);
4500 pdata->usbc_en2_gpio_p = NULL;
4501 return ret;
4502}
4503
4504static bool msm_swap_gnd_mic(struct snd_soc_codec *codec, bool active)
4505{
4506 int value = 0;
4507 bool ret = false;
4508 struct snd_soc_card *card;
4509 struct msm_asoc_mach_data *pdata;
4510
4511 if (!codec) {
4512 pr_err("%s codec is NULL\n", __func__);
4513 return false;
4514 }
4515 card = codec->component.card;
4516 pdata = snd_soc_card_get_drvdata(card);
4517
4518 if (!pdata)
4519 return false;
4520
4521 if (wcd_mbhc_cfg.enable_usbc_analog)
4522 return msm_usbc_swap_gnd_mic(codec, active);
4523
4524 /* if usbc is not defined, swap using us_euro_gpio_p */
4525 if (pdata->us_euro_gpio_p) {
4526 value = msm_cdc_pinctrl_get_state(
4527 pdata->us_euro_gpio_p);
4528 if (value)
4529 msm_cdc_pinctrl_select_sleep_state(
4530 pdata->us_euro_gpio_p);
4531 else
4532 msm_cdc_pinctrl_select_active_state(
4533 pdata->us_euro_gpio_p);
4534 dev_dbg(codec->dev, "%s: swap select switch %d to %d\n",
4535 __func__, value, !value);
4536 ret = true;
4537 }
4538 return ret;
4539}
4540
4541static int msm_afe_set_config(struct snd_soc_codec *codec)
4542{
4543 int ret = 0;
4544 void *config_data = NULL;
4545
4546 if (!msm_codec_fn.get_afe_config_fn) {
4547 dev_err(codec->dev, "%s: codec get afe config not init'ed\n",
4548 __func__);
4549 return -EINVAL;
4550 }
4551
4552 config_data = msm_codec_fn.get_afe_config_fn(codec,
4553 AFE_CDC_REGISTERS_CONFIG);
4554 if (config_data) {
4555 ret = afe_set_config(AFE_CDC_REGISTERS_CONFIG, config_data, 0);
4556 if (ret) {
4557 dev_err(codec->dev,
4558 "%s: Failed to set codec registers config %d\n",
4559 __func__, ret);
4560 return ret;
4561 }
4562 }
4563
4564 config_data = msm_codec_fn.get_afe_config_fn(codec,
4565 AFE_CDC_REGISTER_PAGE_CONFIG);
4566 if (config_data) {
4567 ret = afe_set_config(AFE_CDC_REGISTER_PAGE_CONFIG, config_data,
4568 0);
4569 if (ret)
4570 dev_err(codec->dev,
4571 "%s: Failed to set cdc register page config\n",
4572 __func__);
4573 }
4574
4575 config_data = msm_codec_fn.get_afe_config_fn(codec,
4576 AFE_SLIMBUS_SLAVE_CONFIG);
4577 if (config_data) {
4578 ret = afe_set_config(AFE_SLIMBUS_SLAVE_CONFIG, config_data, 0);
4579 if (ret) {
4580 dev_err(codec->dev,
4581 "%s: Failed to set slimbus slave config %d\n",
4582 __func__, ret);
4583 return ret;
4584 }
4585 }
4586
4587 return 0;
4588}
4589
4590static void msm_afe_clear_config(void)
4591{
4592 afe_clear_config(AFE_CDC_REGISTERS_CONFIG);
4593 afe_clear_config(AFE_SLIMBUS_SLAVE_CONFIG);
4594}
4595
4596static int msm_adsp_power_up_config(struct snd_soc_codec *codec,
4597 struct snd_card *card)
4598{
4599 int ret = 0;
4600 unsigned long timeout;
4601 int adsp_ready = 0;
4602 bool snd_card_online = 0;
4603
4604 timeout = jiffies +
4605 msecs_to_jiffies(ADSP_STATE_READY_TIMEOUT_MS);
4606
4607 do {
4608 if (!snd_card_online) {
4609 snd_card_online = snd_card_is_online_state(card);
4610 pr_debug("%s: Sound card is %s\n", __func__,
4611 snd_card_online ? "Online" : "Offline");
4612 }
4613 if (!adsp_ready) {
4614 adsp_ready = q6core_is_adsp_ready();
4615 pr_debug("%s: ADSP Audio is %s\n", __func__,
4616 adsp_ready ? "ready" : "not ready");
4617 }
4618 if (snd_card_online && adsp_ready)
4619 break;
4620
4621 /*
4622 * Sound card/ADSP will be coming up after subsystem restart and
4623 * it might not be fully up when the control reaches
4624 * here. So, wait for 50msec before checking ADSP state
4625 */
4626 msleep(50);
4627 } while (time_after(timeout, jiffies));
4628
4629 if (!snd_card_online || !adsp_ready) {
4630 pr_err("%s: Timeout. Sound card is %s, ADSP Audio is %s\n",
4631 __func__,
4632 snd_card_online ? "Online" : "Offline",
4633 adsp_ready ? "ready" : "not ready");
4634 ret = -ETIMEDOUT;
4635 goto err;
4636 }
4637
4638 ret = msm_afe_set_config(codec);
4639 if (ret)
4640 pr_err("%s: Failed to set AFE config. err %d\n",
4641 __func__, ret);
4642
4643 return 0;
4644
4645err:
4646 return ret;
4647}
4648
4649static int sm6150_notifier_service_cb(struct notifier_block *this,
4650 unsigned long opcode, void *ptr)
4651{
4652 int ret;
4653 struct snd_soc_card *card = NULL;
4654 const char *be_dl_name = LPASS_BE_SLIMBUS_0_RX;
4655 struct snd_soc_pcm_runtime *rtd;
4656 struct snd_soc_codec *codec;
4657
4658 pr_debug("%s: Service opcode 0x%lx\n", __func__, opcode);
4659
4660 switch (opcode) {
4661 case AUDIO_NOTIFIER_SERVICE_DOWN:
4662 /*
4663 * Use flag to ignore initial boot notifications
4664 * On initial boot msm_adsp_power_up_config is
4665 * called on init. There is no need to clear
4666 * and set the config again on initial boot.
4667 */
4668 if (is_initial_boot)
4669 break;
4670 msm_afe_clear_config();
4671 break;
4672 case AUDIO_NOTIFIER_SERVICE_UP:
4673 if (is_initial_boot) {
4674 is_initial_boot = false;
4675 break;
4676 }
4677 if (!spdev)
4678 return -EINVAL;
4679
4680 card = platform_get_drvdata(spdev);
4681 rtd = snd_soc_get_pcm_runtime(card, be_dl_name);
4682 if (!rtd) {
4683 dev_err(card->dev,
4684 "%s: snd_soc_get_pcm_runtime for %s failed!\n",
4685 __func__, be_dl_name);
4686 ret = -EINVAL;
4687 goto err;
4688 }
4689 codec = rtd->codec;
4690
4691 ret = msm_adsp_power_up_config(codec, card->snd_card);
4692 if (ret < 0) {
4693 dev_err(card->dev,
4694 "%s: msm_adsp_power_up_config failed ret = %d!\n",
4695 __func__, ret);
4696 goto err;
4697 }
4698 break;
4699 default:
4700 break;
4701 }
4702err:
4703 return NOTIFY_OK;
4704}
4705
4706static struct notifier_block service_nb = {
4707 .notifier_call = sm6150_notifier_service_cb,
4708 .priority = -INT_MAX,
4709};
4710
4711static int msm_audrx_tavil_init(struct snd_soc_pcm_runtime *rtd)
4712{
4713 int ret = 0;
4714 void *config_data;
4715 struct snd_soc_codec *codec = rtd->codec;
4716 struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
4717 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
4718 struct snd_soc_dai *codec_dai = rtd->codec_dai;
4719 struct snd_soc_component *aux_comp;
4720 struct snd_card *card;
4721 struct snd_info_entry *entry;
4722 struct msm_asoc_mach_data *pdata =
4723 snd_soc_card_get_drvdata(rtd->card);
4724
4725 /*
4726 * Codec SLIMBUS configuration
4727 * RX1, RX2, RX3, RX4, RX5, RX6, RX7, RX8
4728 * TX1, TX2, TX3, TX4, TX5, TX6, TX7, TX8, TX9, TX10, TX11, TX12, TX13
4729 * TX14, TX15, TX16
4730 */
4731 unsigned int rx_ch[WCD934X_RX_MAX] = {144, 145, 146, 147, 148, 149,
4732 150, 151};
4733 unsigned int tx_ch[WCD934X_TX_MAX] = {128, 129, 130, 131, 132, 133,
4734 134, 135, 136, 137, 138, 139,
4735 140, 141, 142, 143};
4736
4737 pr_info("%s: dev_name:%s\n", __func__, dev_name(cpu_dai->dev));
4738
4739 rtd->pmdown_time = 0;
4740
4741 ret = snd_soc_add_codec_controls(codec, msm_tavil_snd_controls,
4742 ARRAY_SIZE(msm_tavil_snd_controls));
4743 if (ret < 0) {
4744 pr_err("%s: add_codec_controls failed, err %d\n",
4745 __func__, ret);
4746 return ret;
4747 }
4748
4749 ret = snd_soc_add_codec_controls(codec, msm_common_snd_controls,
4750 ARRAY_SIZE(msm_common_snd_controls));
4751 if (ret < 0) {
4752 pr_err("%s: add_codec_controls failed, err %d\n",
4753 __func__, ret);
4754 return ret;
4755 }
4756
4757 snd_soc_dapm_new_controls(dapm, msm_dapm_widgets_tavil,
4758 ARRAY_SIZE(msm_dapm_widgets_tavil));
4759
4760 snd_soc_dapm_add_routes(dapm, wcd_audio_paths_tavil,
4761 ARRAY_SIZE(wcd_audio_paths_tavil));
4762
4763 snd_soc_dapm_ignore_suspend(dapm, "Handset Mic");
4764 snd_soc_dapm_ignore_suspend(dapm, "Headset Mic");
4765 snd_soc_dapm_ignore_suspend(dapm, "ANCRight Headset Mic");
4766 snd_soc_dapm_ignore_suspend(dapm, "ANCLeft Headset Mic");
4767 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic0");
4768 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic1");
4769 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic2");
4770 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic3");
4771 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic4");
4772 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic5");
4773 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic5");
4774 snd_soc_dapm_ignore_suspend(dapm, "MADINPUT");
4775 snd_soc_dapm_ignore_suspend(dapm, "MAD_CPE_INPUT");
4776 snd_soc_dapm_ignore_suspend(dapm, "MAD_CPE_OUT1");
4777 snd_soc_dapm_ignore_suspend(dapm, "MAD_CPE_OUT2");
4778 snd_soc_dapm_ignore_suspend(dapm, "EAR");
4779 snd_soc_dapm_ignore_suspend(dapm, "LINEOUT1");
4780 snd_soc_dapm_ignore_suspend(dapm, "LINEOUT2");
4781 snd_soc_dapm_ignore_suspend(dapm, "ANC EAR");
4782 snd_soc_dapm_ignore_suspend(dapm, "SPK1 OUT");
4783 snd_soc_dapm_ignore_suspend(dapm, "SPK2 OUT");
4784 snd_soc_dapm_ignore_suspend(dapm, "HPHL");
4785 snd_soc_dapm_ignore_suspend(dapm, "HPHR");
4786 snd_soc_dapm_ignore_suspend(dapm, "AIF4 VI");
4787 snd_soc_dapm_ignore_suspend(dapm, "VIINPUT");
4788 snd_soc_dapm_ignore_suspend(dapm, "ANC HPHL");
4789 snd_soc_dapm_ignore_suspend(dapm, "ANC HPHR");
4790
4791 snd_soc_dapm_sync(dapm);
4792
4793 snd_soc_dai_set_channel_map(codec_dai, ARRAY_SIZE(tx_ch),
4794 tx_ch, ARRAY_SIZE(rx_ch), rx_ch);
4795
4796 msm_codec_fn.get_afe_config_fn = tavil_get_afe_config;
4797
4798 ret = msm_adsp_power_up_config(codec, rtd->card->snd_card);
4799 if (ret) {
4800 pr_err("%s: Failed to set AFE config %d\n", __func__, ret);
4801 goto err;
4802 }
4803
4804 config_data = msm_codec_fn.get_afe_config_fn(codec,
4805 AFE_AANC_VERSION);
4806 if (config_data) {
4807 ret = afe_set_config(AFE_AANC_VERSION, config_data, 0);
4808 if (ret) {
4809 pr_err("%s: Failed to set aanc version %d\n",
4810 __func__, ret);
4811 goto err;
4812 }
4813 }
4814
4815 /*
4816 * Send speaker configuration only for WSA8810.
4817 * Default configuration is for WSA8815.
4818 */
4819 pr_debug("%s: Number of aux devices: %d\n",
4820 __func__, rtd->card->num_aux_devs);
4821 if (rtd->card->num_aux_devs &&
4822 !list_empty(&rtd->card->aux_comp_list)) {
4823 aux_comp = list_first_entry(&rtd->card->aux_comp_list,
4824 struct snd_soc_component, card_aux_list);
4825 if (!strcmp(aux_comp->name, WSA8810_NAME_1) ||
4826 !strcmp(aux_comp->name, WSA8810_NAME_2)) {
4827 tavil_set_spkr_mode(rtd->codec, WCD934X_SPKR_MODE_1);
4828 tavil_set_spkr_gain_offset(rtd->codec,
4829 WCD934X_RX_GAIN_OFFSET_M1P5_DB);
4830 }
4831 }
4832
4833 card = rtd->card->snd_card;
4834 entry = snd_info_create_subdir(card->module, "codecs",
4835 card->proc_root);
4836 if (!entry) {
4837 pr_debug("%s: Cannot create codecs module entry\n",
4838 __func__);
4839 ret = 0;
4840 goto err;
4841 }
4842 pdata->codec_root = entry;
4843 tavil_codec_info_create_codec_entry(pdata->codec_root, codec);
4844
4845 codec_reg_done = true;
4846 return 0;
4847err:
4848 return ret;
4849}
4850
4851static int msm_int_audrx_init(struct snd_soc_pcm_runtime *rtd)
4852{
4853 int ret = 0;
4854 struct snd_soc_codec *codec = rtd->codec;
4855 struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
4856 struct snd_card *card;
4857 struct snd_info_entry *entry;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]4858 struct snd_soc_component *aux_comp;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4859 struct msm_asoc_mach_data *pdata =
4860 snd_soc_card_get_drvdata(rtd->card);
4861
4862 ret = snd_soc_add_codec_controls(codec, msm_int_snd_controls,
4863 ARRAY_SIZE(msm_int_snd_controls));
4864 if (ret < 0) {
4865 pr_err("%s: add_codec_controls failed: %d\n",
4866 __func__, ret);
4867 return ret;
4868 }
4869 ret = snd_soc_add_codec_controls(codec, msm_common_snd_controls,
4870 ARRAY_SIZE(msm_common_snd_controls));
4871 if (ret < 0) {
4872 pr_err("%s: add common snd controls failed: %d\n",
4873 __func__, ret);
4874 return ret;
4875 }
4876
4877 snd_soc_dapm_new_controls(dapm, msm_int_dapm_widgets,
4878 ARRAY_SIZE(msm_int_dapm_widgets));
4879
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]4880 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic0");
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4881 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic1");
4882 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic2");
4883 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic3");
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4884
4885 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic1");
4886 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic2");
4887 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic3");
4888 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic4");
4889
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]4890 snd_soc_dapm_ignore_suspend(dapm, "WSA_SPK1 OUT");
4891 snd_soc_dapm_ignore_suspend(dapm, "WSA_SPK2 OUT");
4892 snd_soc_dapm_ignore_suspend(dapm, "WSA AIF VI");
4893 snd_soc_dapm_ignore_suspend(dapm, "VIINPUT_WSA");
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4894
4895 snd_soc_dapm_sync(dapm);
4896
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]4897 /*
4898 * Send speaker configuration only for WSA8810.
4899 * Default configuration is for WSA8815.
4900 */
4901 dev_dbg(codec->dev, "%s: Number of aux devices: %d\n",
4902 __func__, rtd->card->num_aux_devs);
4903 if (rtd->card->num_aux_devs &&
4904 !list_empty(&rtd->card->component_dev_list)) {
4905 aux_comp = list_first_entry(
4906 &rtd->card->component_dev_list,
4907 struct snd_soc_component,
4908 card_aux_list);
4909 if (!strcmp(aux_comp->name, WSA8810_NAME_1) ||
4910 !strcmp(aux_comp->name, WSA8810_NAME_2)) {
4911 wsa_macro_set_spkr_mode(rtd->codec,
4912 WSA_MACRO_SPKR_MODE_1);
4913 wsa_macro_set_spkr_gain_offset(rtd->codec,
4914 WSA_MACRO_GAIN_OFFSET_M1P5_DB);
4915 }
4916 }
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4917 card = rtd->card->snd_card;
4918 entry = snd_info_create_subdir(card->module, "codecs",
4919 card->proc_root);
4920 if (!entry) {
4921 pr_debug("%s: Cannot create codecs module entry\n",
4922 __func__);
4923 ret = 0;
4924 goto err;
4925 }
4926 pdata->codec_root = entry;
4927 bolero_info_create_codec_entry(pdata->codec_root, codec);
4928 codec_reg_done = true;
4929 return 0;
4930err:
4931 return ret;
4932}
4933
4934static int msm_wcn_init(struct snd_soc_pcm_runtime *rtd)
4935{
4936 unsigned int rx_ch[WCN_CDC_SLIM_RX_CH_MAX] = {157, 158};
4937 unsigned int tx_ch[WCN_CDC_SLIM_TX_CH_MAX] = {159, 160, 161};
4938 struct snd_soc_dai *codec_dai = rtd->codec_dai;
4939
4940 return snd_soc_dai_set_channel_map(codec_dai, ARRAY_SIZE(tx_ch),
4941 tx_ch, ARRAY_SIZE(rx_ch), rx_ch);
4942}
4943
4944static void *def_wcd_mbhc_cal(void)
4945{
4946 void *wcd_mbhc_cal;
4947 struct wcd_mbhc_btn_detect_cfg *btn_cfg;
4948 u16 *btn_high;
4949
4950 wcd_mbhc_cal = kzalloc(WCD_MBHC_CAL_SIZE(WCD_MBHC_DEF_BUTTONS,
4951 WCD9XXX_MBHC_DEF_RLOADS), GFP_KERNEL);
4952 if (!wcd_mbhc_cal)
4953 return NULL;
4954
4955#define S(X, Y) ((WCD_MBHC_CAL_PLUG_TYPE_PTR(wcd_mbhc_cal)->X) = (Y))
4956 S(v_hs_max, 1600);
4957#undef S
4958#define S(X, Y) ((WCD_MBHC_CAL_BTN_DET_PTR(wcd_mbhc_cal)->X) = (Y))
4959 S(num_btn, WCD_MBHC_DEF_BUTTONS);
4960#undef S
4961
4962 btn_cfg = WCD_MBHC_CAL_BTN_DET_PTR(wcd_mbhc_cal);
4963 btn_high = ((void *)&btn_cfg->_v_btn_low) +
4964 (sizeof(btn_cfg->_v_btn_low[0]) * btn_cfg->num_btn);
4965
4966 btn_high[0] = 75;
4967 btn_high[1] = 150;
4968 btn_high[2] = 237;
4969 btn_high[3] = 500;
4970 btn_high[4] = 500;
4971 btn_high[5] = 500;
4972 btn_high[6] = 500;
4973 btn_high[7] = 500;
4974
4975 return wcd_mbhc_cal;
4976}
4977
4978static int msm_snd_hw_params(struct snd_pcm_substream *substream,
4979 struct snd_pcm_hw_params *params)
4980{
4981 struct snd_soc_pcm_runtime *rtd = substream->private_data;
4982 struct snd_soc_dai *codec_dai = rtd->codec_dai;
4983 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
4984 struct snd_soc_dai_link *dai_link = rtd->dai_link;
4985
4986 int ret = 0;
4987 u32 rx_ch[SLIM_MAX_RX_PORTS], tx_ch[SLIM_MAX_TX_PORTS];
4988 u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
4989 u32 user_set_tx_ch = 0;
4990 u32 rx_ch_count;
4991
4992 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
4993 ret = snd_soc_dai_get_channel_map(codec_dai,
4994 &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
4995 if (ret < 0) {
4996 pr_err("%s: failed to get codec chan map, err:%d\n",
4997 __func__, ret);
4998 goto err;
4999 }
5000 if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_5_RX) {
5001 pr_debug("%s: rx_5_ch=%d\n", __func__,
5002 slim_rx_cfg[5].channels);
5003 rx_ch_count = slim_rx_cfg[5].channels;
5004 } else if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_2_RX) {
5005 pr_debug("%s: rx_2_ch=%d\n", __func__,
5006 slim_rx_cfg[2].channels);
5007 rx_ch_count = slim_rx_cfg[2].channels;
5008 } else if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_6_RX) {
5009 pr_debug("%s: rx_6_ch=%d\n", __func__,
5010 slim_rx_cfg[6].channels);
5011 rx_ch_count = slim_rx_cfg[6].channels;
5012 } else {
5013 pr_debug("%s: rx_0_ch=%d\n", __func__,
5014 slim_rx_cfg[0].channels);
5015 rx_ch_count = slim_rx_cfg[0].channels;
5016 }
5017 ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
5018 rx_ch_count, rx_ch);
5019 if (ret < 0) {
5020 pr_err("%s: failed to set cpu chan map, err:%d\n",
5021 __func__, ret);
5022 goto err;
5023 }
5024 } else {
5025
5026 pr_debug("%s: %s_tx_dai_id_%d_ch=%d\n", __func__,
5027 codec_dai->name, codec_dai->id, user_set_tx_ch);
5028 ret = snd_soc_dai_get_channel_map(codec_dai,
5029 &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
5030 if (ret < 0) {
5031 pr_err("%s: failed to get tx codec chan map, err:%d\n",
5032 __func__, ret);
5033 goto err;
5034 }
5035 /* For <codec>_tx1 case */
5036 if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_0_TX)
5037 user_set_tx_ch = slim_tx_cfg[0].channels;
5038 /* For <codec>_tx3 case */
5039 else if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_1_TX)
5040 user_set_tx_ch = slim_tx_cfg[1].channels;
5041 else if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_4_TX)
5042 user_set_tx_ch = msm_vi_feed_tx_ch;
5043 else
5044 user_set_tx_ch = tx_ch_cnt;
5045
5046 pr_debug("%s: msm_slim_0_tx_ch(%d) user_set_tx_ch(%d) tx_ch_cnt(%d), BE id (%d)\n",
5047 __func__, slim_tx_cfg[0].channels, user_set_tx_ch,
5048 tx_ch_cnt, dai_link->id);
5049
5050 ret = snd_soc_dai_set_channel_map(cpu_dai,
5051 user_set_tx_ch, tx_ch, 0, 0);
5052 if (ret < 0)
5053 pr_err("%s: failed to set tx cpu chan map, err:%d\n",
5054 __func__, ret);
5055 }
5056
5057err:
5058 return ret;
5059}
5060
5061
5062static int msm_snd_cdc_dma_hw_params(struct snd_pcm_substream *substream,
5063 struct snd_pcm_hw_params *params)
5064{
5065 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5066 struct snd_soc_dai *codec_dai = rtd->codec_dai;
5067 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5068 struct snd_soc_dai_link *dai_link = rtd->dai_link;
5069
5070 int ret = 0;
5071 u32 rx_ch_cdc_dma, tx_ch_cdc_dma;
5072 u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
5073 u32 user_set_tx_ch = 0;
5074 u32 user_set_rx_ch = 0;
5075 u32 ch_id;
5076
5077 ret = snd_soc_dai_get_channel_map(codec_dai,
5078 &tx_ch_cnt, &tx_ch_cdc_dma, &rx_ch_cnt,
5079 &rx_ch_cdc_dma);
5080 if (ret < 0) {
5081 pr_err("%s: failed to get codec chan map, err:%d\n",
5082 __func__, ret);
5083 goto err;
5084 }
5085
5086 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
5087 switch (dai_link->id) {
5088 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
5089 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
5090 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
5091 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
5092 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
5093 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_3:
5094 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_4:
5095 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_5:
5096 {
5097 ch_id = msm_cdc_dma_get_idx_from_beid(dai_link->id);
5098 pr_debug("%s: id %d rx_ch=%d\n", __func__,
5099 ch_id, cdc_dma_rx_cfg[ch_id].channels);
5100 user_set_rx_ch = cdc_dma_rx_cfg[ch_id].channels;
5101 ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
5102 user_set_rx_ch, &rx_ch_cdc_dma);
5103 if (ret < 0) {
5104 pr_err("%s: failed to set cpu chan map, err:%d\n",
5105 __func__, ret);
5106 goto err;
5107 }
5108
5109 }
5110 break;
5111 }
5112 } else {
5113 switch (dai_link->id) {
5114 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
5115 {
5116 user_set_tx_ch = msm_vi_feed_tx_ch;
5117 }
5118 break;
5119 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
5120 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
5121 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame^]5122 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
5123 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5124 {
5125 ch_id = msm_cdc_dma_get_idx_from_beid(dai_link->id);
5126 pr_debug("%s: id %d tx_ch=%d\n", __func__,
5127 ch_id, cdc_dma_tx_cfg[ch_id].channels);
5128 user_set_tx_ch = cdc_dma_tx_cfg[ch_id].channels;
5129 }
5130 break;
5131 }
5132
5133 ret = snd_soc_dai_set_channel_map(cpu_dai, user_set_tx_ch,
5134 &tx_ch_cdc_dma, 0, 0);
5135 if (ret < 0) {
5136 pr_err("%s: failed to set cpu chan map, err:%d\n",
5137 __func__, ret);
5138 goto err;
5139 }
5140 }
5141
5142err:
5143 return ret;
5144}
5145
5146static int msm_slimbus_2_hw_params(struct snd_pcm_substream *substream,
5147 struct snd_pcm_hw_params *params)
5148{
5149 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5150 struct snd_soc_dai *codec_dai = rtd->codec_dai;
5151 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5152 unsigned int rx_ch[SLIM_MAX_RX_PORTS], tx_ch[SLIM_MAX_TX_PORTS];
5153 unsigned int rx_ch_cnt = 0, tx_ch_cnt = 0;
5154 unsigned int num_tx_ch = 0;
5155 unsigned int num_rx_ch = 0;
5156 int ret = 0;
5157
5158 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
5159 num_rx_ch = params_channels(params);
5160 pr_debug("%s: %s rx_dai_id = %d num_ch = %d\n", __func__,
5161 codec_dai->name, codec_dai->id, num_rx_ch);
5162 ret = snd_soc_dai_get_channel_map(codec_dai,
5163 &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
5164 if (ret < 0) {
5165 pr_err("%s: failed to get codec chan map, err:%d\n",
5166 __func__, ret);
5167 goto err;
5168 }
5169 ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
5170 num_rx_ch, rx_ch);
5171 if (ret < 0) {
5172 pr_err("%s: failed to set cpu chan map, err:%d\n",
5173 __func__, ret);
5174 goto err;
5175 }
5176 } else {
5177 num_tx_ch = params_channels(params);
5178 pr_debug("%s: %s tx_dai_id = %d num_ch = %d\n", __func__,
5179 codec_dai->name, codec_dai->id, num_tx_ch);
5180 ret = snd_soc_dai_get_channel_map(codec_dai,
5181 &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
5182 if (ret < 0) {
5183 pr_err("%s: failed to get tx codec chan map, err:%d\n",
5184 __func__, ret);
5185 goto err;
5186 }
5187 ret = snd_soc_dai_set_channel_map(cpu_dai,
5188 num_tx_ch, tx_ch, 0, 0);
5189 if (ret < 0) {
5190 pr_err("%s: failed to set tx cpu chan map, err:%d\n",
5191 __func__, ret);
5192 goto err;
5193 }
5194 }
5195
5196err:
5197 return ret;
5198}
5199
5200static int msm_wcn_hw_params(struct snd_pcm_substream *substream,
5201 struct snd_pcm_hw_params *params)
5202{
5203 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5204 struct snd_soc_dai *codec_dai = rtd->codec_dai;
5205 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5206 struct snd_soc_dai_link *dai_link = rtd->dai_link;
5207 u32 rx_ch[WCN_CDC_SLIM_RX_CH_MAX], tx_ch[WCN_CDC_SLIM_TX_CH_MAX];
5208 u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
5209 int ret;
5210
5211 dev_dbg(rtd->dev, "%s: %s_tx_dai_id_%d\n", __func__,
5212 codec_dai->name, codec_dai->id);
5213 ret = snd_soc_dai_get_channel_map(codec_dai,
5214 &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
5215 if (ret) {
5216 dev_err(rtd->dev,
5217 "%s: failed to get BTFM codec chan map\n, err:%d\n",
5218 __func__, ret);
5219 goto err;
5220 }
5221
5222 dev_dbg(rtd->dev, "%s: tx_ch_cnt(%d) BE id %d\n",
5223 __func__, tx_ch_cnt, dai_link->id);
5224
5225 ret = snd_soc_dai_set_channel_map(cpu_dai,
5226 tx_ch_cnt, tx_ch, rx_ch_cnt, rx_ch);
5227 if (ret)
5228 dev_err(rtd->dev, "%s: failed to set cpu chan map, err:%d\n",
5229 __func__, ret);
5230
5231err:
5232 return ret;
5233}
5234
5235static int msm_get_port_id(int be_id)
5236{
5237 int afe_port_id;
5238
5239 switch (be_id) {
5240 case MSM_BACKEND_DAI_PRI_MI2S_RX:
5241 afe_port_id = AFE_PORT_ID_PRIMARY_MI2S_RX;
5242 break;
5243 case MSM_BACKEND_DAI_PRI_MI2S_TX:
5244 afe_port_id = AFE_PORT_ID_PRIMARY_MI2S_TX;
5245 break;
5246 case MSM_BACKEND_DAI_SECONDARY_MI2S_RX:
5247 afe_port_id = AFE_PORT_ID_SECONDARY_MI2S_RX;
5248 break;
5249 case MSM_BACKEND_DAI_SECONDARY_MI2S_TX:
5250 afe_port_id = AFE_PORT_ID_SECONDARY_MI2S_TX;
5251 break;
5252 case MSM_BACKEND_DAI_TERTIARY_MI2S_RX:
5253 afe_port_id = AFE_PORT_ID_TERTIARY_MI2S_RX;
5254 break;
5255 case MSM_BACKEND_DAI_TERTIARY_MI2S_TX:
5256 afe_port_id = AFE_PORT_ID_TERTIARY_MI2S_TX;
5257 break;
5258 case MSM_BACKEND_DAI_QUATERNARY_MI2S_RX:
5259 afe_port_id = AFE_PORT_ID_QUATERNARY_MI2S_RX;
5260 break;
5261 case MSM_BACKEND_DAI_QUATERNARY_MI2S_TX:
5262 afe_port_id = AFE_PORT_ID_QUATERNARY_MI2S_TX;
5263 break;
5264 case MSM_BACKEND_DAI_QUINARY_MI2S_RX:
5265 afe_port_id = AFE_PORT_ID_QUINARY_MI2S_RX;
5266 break;
5267 case MSM_BACKEND_DAI_QUINARY_MI2S_TX:
5268 afe_port_id = AFE_PORT_ID_QUINARY_MI2S_TX;
5269 break;
5270 default:
5271 pr_err("%s: Invalid BE id: %d\n", __func__, be_id);
5272 afe_port_id = -EINVAL;
5273 }
5274
5275 return afe_port_id;
5276}
5277
5278static u32 get_mi2s_bits_per_sample(u32 bit_format)
5279{
5280 u32 bit_per_sample;
5281
5282 switch (bit_format) {
5283 case SNDRV_PCM_FORMAT_S32_LE:
5284 case SNDRV_PCM_FORMAT_S24_3LE:
5285 case SNDRV_PCM_FORMAT_S24_LE:
5286 bit_per_sample = 32;
5287 break;
5288 case SNDRV_PCM_FORMAT_S16_LE:
5289 default:
5290 bit_per_sample = 16;
5291 break;
5292 }
5293
5294 return bit_per_sample;
5295}
5296
5297static void update_mi2s_clk_val(int dai_id, int stream)
5298{
5299 u32 bit_per_sample;
5300
5301 if (stream == SNDRV_PCM_STREAM_PLAYBACK) {
5302 bit_per_sample =
5303 get_mi2s_bits_per_sample(mi2s_rx_cfg[dai_id].bit_format);
5304 mi2s_clk[dai_id].clk_freq_in_hz =
5305 mi2s_rx_cfg[dai_id].sample_rate * 2 * bit_per_sample;
5306 } else {
5307 bit_per_sample =
5308 get_mi2s_bits_per_sample(mi2s_tx_cfg[dai_id].bit_format);
5309 mi2s_clk[dai_id].clk_freq_in_hz =
5310 mi2s_tx_cfg[dai_id].sample_rate * 2 * bit_per_sample;
5311 }
5312}
5313
5314static int msm_mi2s_set_sclk(struct snd_pcm_substream *substream, bool enable)
5315{
5316 int ret = 0;
5317 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5318 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5319 int port_id = 0;
5320 int index = cpu_dai->id;
5321
5322 port_id = msm_get_port_id(rtd->dai_link->id);
5323 if (port_id < 0) {
5324 dev_err(rtd->card->dev, "%s: Invalid port_id\n", __func__);
5325 ret = port_id;
5326 goto err;
5327 }
5328
5329 if (enable) {
5330 update_mi2s_clk_val(index, substream->stream);
5331 dev_dbg(rtd->card->dev, "%s: clock rate %ul\n", __func__,
5332 mi2s_clk[index].clk_freq_in_hz);
5333 }
5334
5335 mi2s_clk[index].enable = enable;
5336 ret = afe_set_lpass_clock_v2(port_id,
5337 &mi2s_clk[index]);
5338 if (ret < 0) {
5339 dev_err(rtd->card->dev,
5340 "%s: afe lpass clock failed for port 0x%x , err:%d\n",
5341 __func__, port_id, ret);
5342 goto err;
5343 }
5344
5345err:
5346 return ret;
5347}
5348
5349static int msm_set_pinctrl(struct msm_pinctrl_info *pinctrl_info,
5350 enum pinctrl_pin_state new_state)
5351{
5352 int ret = 0;
5353 int curr_state = 0;
5354
5355 if (pinctrl_info == NULL) {
5356 pr_err("%s: pinctrl_info is NULL\n", __func__);
5357 ret = -EINVAL;
5358 goto err;
5359 }
5360
5361 if (pinctrl_info->pinctrl == NULL) {
5362 pr_err("%s: pinctrl_info->pinctrl is NULL\n", __func__);
5363 ret = -EINVAL;
5364 goto err;
5365 }
5366
5367 curr_state = pinctrl_info->curr_state;
5368 pinctrl_info->curr_state = new_state;
5369 pr_debug("%s: curr_state = %s new_state = %s\n", __func__,
5370 pin_states[curr_state], pin_states[pinctrl_info->curr_state]);
5371
5372 if (curr_state == pinctrl_info->curr_state) {
5373 pr_debug("%s: Already in same state\n", __func__);
5374 goto err;
5375 }
5376
5377 if (curr_state != STATE_DISABLE &&
5378 pinctrl_info->curr_state != STATE_DISABLE) {
5379 pr_debug("%s: state already active cannot switch\n", __func__);
5380 ret = -EIO;
5381 goto err;
5382 }
5383
5384 switch (pinctrl_info->curr_state) {
5385 case STATE_MI2S_ACTIVE:
5386 ret = pinctrl_select_state(pinctrl_info->pinctrl,
5387 pinctrl_info->mi2s_active);
5388 if (ret) {
5389 pr_err("%s: MI2S state select failed with %d\n",
5390 __func__, ret);
5391 ret = -EIO;
5392 goto err;
5393 }
5394 break;
5395 case STATE_TDM_ACTIVE:
5396 ret = pinctrl_select_state(pinctrl_info->pinctrl,
5397 pinctrl_info->tdm_active);
5398 if (ret) {
5399 pr_err("%s: TDM state select failed with %d\n",
5400 __func__, ret);
5401 ret = -EIO;
5402 goto err;
5403 }
5404 break;
5405 case STATE_DISABLE:
5406 if (curr_state == STATE_MI2S_ACTIVE) {
5407 ret = pinctrl_select_state(pinctrl_info->pinctrl,
5408 pinctrl_info->mi2s_disable);
5409 } else {
5410 ret = pinctrl_select_state(pinctrl_info->pinctrl,
5411 pinctrl_info->tdm_disable);
5412 }
5413 if (ret) {
5414 pr_err("%s: state disable failed with %d\n",
5415 __func__, ret);
5416 ret = -EIO;
5417 goto err;
5418 }
5419 break;
5420 default:
5421 pr_err("%s: TLMM pin state is invalid\n", __func__);
5422 return -EINVAL;
5423 }
5424
5425err:
5426 return ret;
5427}
5428
5429static int msm_get_pinctrl(struct platform_device *pdev)
5430{
5431 struct snd_soc_card *card = platform_get_drvdata(pdev);
5432 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
5433 struct msm_pinctrl_info *pinctrl_info = NULL;
5434 struct pinctrl *pinctrl;
5435 int ret = 0;
5436
5437 pinctrl_info = &pdata->pinctrl_info;
5438
5439 if (pinctrl_info == NULL) {
5440 pr_err("%s: pinctrl_info is NULL\n", __func__);
5441 return -EINVAL;
5442 }
5443
5444 pinctrl = devm_pinctrl_get(&pdev->dev);
5445 if (IS_ERR_OR_NULL(pinctrl)) {
5446 pr_err("%s: Unable to get pinctrl handle\n", __func__);
5447 return -EINVAL;
5448 }
5449 pinctrl_info->pinctrl = pinctrl;
5450
5451 /* get all the states handles from Device Tree */
5452 pinctrl_info->mi2s_disable = pinctrl_lookup_state(pinctrl,
5453 "quat-mi2s-sleep");
5454 if (IS_ERR(pinctrl_info->mi2s_disable)) {
5455 pr_err("%s: could not get mi2s_disable pinstate\n", __func__);
5456 goto err;
5457 }
5458 pinctrl_info->mi2s_active = pinctrl_lookup_state(pinctrl,
5459 "quat-mi2s-active");
5460 if (IS_ERR(pinctrl_info->mi2s_active)) {
5461 pr_err("%s: could not get mi2s_active pinstate\n", __func__);
5462 goto err;
5463 }
5464 pinctrl_info->tdm_disable = pinctrl_lookup_state(pinctrl,
5465 "quat-tdm-sleep");
5466 if (IS_ERR(pinctrl_info->tdm_disable)) {
5467 pr_err("%s: could not get tdm_disable pinstate\n", __func__);
5468 goto err;
5469 }
5470 pinctrl_info->tdm_active = pinctrl_lookup_state(pinctrl,
5471 "quat-tdm-active");
5472 if (IS_ERR(pinctrl_info->tdm_active)) {
5473 pr_err("%s: could not get tdm_active pinstate\n",
5474 __func__);
5475 goto err;
5476 }
5477 /* Reset the TLMM pins to a default state */
5478 ret = pinctrl_select_state(pinctrl_info->pinctrl,
5479 pinctrl_info->mi2s_disable);
5480 if (ret != 0) {
5481 pr_err("%s: Disable TLMM pins failed with %d\n",
5482 __func__, ret);
5483 ret = -EIO;
5484 goto err;
5485 }
5486 pinctrl_info->curr_state = STATE_DISABLE;
5487
5488 return 0;
5489
5490err:
5491 devm_pinctrl_put(pinctrl);
5492 pinctrl_info->pinctrl = NULL;
5493 return -EINVAL;
5494}
5495
5496static int msm_tdm_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
5497 struct snd_pcm_hw_params *params)
5498{
5499 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5500 struct snd_interval *rate = hw_param_interval(params,
5501 SNDRV_PCM_HW_PARAM_RATE);
5502 struct snd_interval *channels = hw_param_interval(params,
5503 SNDRV_PCM_HW_PARAM_CHANNELS);
5504
5505 if (cpu_dai->id == AFE_PORT_ID_QUATERNARY_TDM_RX) {
5506 channels->min = channels->max =
5507 tdm_rx_cfg[TDM_QUAT][TDM_0].channels;
5508 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
5509 tdm_rx_cfg[TDM_QUAT][TDM_0].bit_format);
5510 rate->min = rate->max =
5511 tdm_rx_cfg[TDM_QUAT][TDM_0].sample_rate;
5512 } else if (cpu_dai->id == AFE_PORT_ID_SECONDARY_TDM_RX) {
5513 channels->min = channels->max =
5514 tdm_rx_cfg[TDM_SEC][TDM_0].channels;
5515 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
5516 tdm_rx_cfg[TDM_SEC][TDM_0].bit_format);
5517 rate->min = rate->max = tdm_rx_cfg[TDM_SEC][TDM_0].sample_rate;
5518 } else if (cpu_dai->id == AFE_PORT_ID_QUINARY_TDM_RX) {
5519 channels->min = channels->max =
5520 tdm_rx_cfg[TDM_QUIN][TDM_0].channels;
5521 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
5522 tdm_rx_cfg[TDM_QUIN][TDM_0].bit_format);
5523 rate->min = rate->max = tdm_rx_cfg[TDM_QUIN][TDM_0].sample_rate;
5524 } else {
5525 pr_err("%s: dai id 0x%x not supported\n",
5526 __func__, cpu_dai->id);
5527 return -EINVAL;
5528 }
5529
5530 pr_debug("%s: dai id = 0x%x channels = %d rate = %d format = 0x%x\n",
5531 __func__, cpu_dai->id, channels->max, rate->max,
5532 params_format(params));
5533
5534 return 0;
5535}
5536
5537static int sm6150_tdm_snd_hw_params(struct snd_pcm_substream *substream,
5538 struct snd_pcm_hw_params *params)
5539{
5540 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5541 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5542 int ret = 0;
5543 int slot_width = 32;
5544 int channels, slots;
5545 unsigned int slot_mask, rate, clk_freq;
5546 unsigned int slot_offset[8] = {0, 4, 8, 12, 16, 20, 24, 28};
5547
5548 pr_debug("%s: dai id = 0x%x\n", __func__, cpu_dai->id);
5549
5550 /* currently only supporting TDM_RX_0 and TDM_TX_0 */
5551 switch (cpu_dai->id) {
5552 case AFE_PORT_ID_PRIMARY_TDM_RX:
5553 slots = tdm_rx_cfg[TDM_PRI][TDM_0].channels;
5554 break;
5555 case AFE_PORT_ID_SECONDARY_TDM_RX:
5556 slots = tdm_rx_cfg[TDM_SEC][TDM_0].channels;
5557 break;
5558 case AFE_PORT_ID_TERTIARY_TDM_RX:
5559 slots = tdm_rx_cfg[TDM_TERT][TDM_0].channels;
5560 break;
5561 case AFE_PORT_ID_QUATERNARY_TDM_RX:
5562 slots = tdm_rx_cfg[TDM_QUAT][TDM_0].channels;
5563 break;
5564 case AFE_PORT_ID_QUINARY_TDM_RX:
5565 slots = tdm_rx_cfg[TDM_QUIN][TDM_0].channels;
5566 break;
5567 case AFE_PORT_ID_PRIMARY_TDM_TX:
5568 slots = tdm_tx_cfg[TDM_PRI][TDM_0].channels;
5569 break;
5570 case AFE_PORT_ID_SECONDARY_TDM_TX:
5571 slots = tdm_tx_cfg[TDM_SEC][TDM_0].channels;
5572 break;
5573 case AFE_PORT_ID_TERTIARY_TDM_TX:
5574 slots = tdm_tx_cfg[TDM_TERT][TDM_0].channels;
5575 break;
5576 case AFE_PORT_ID_QUATERNARY_TDM_TX:
5577 slots = tdm_tx_cfg[TDM_QUAT][TDM_0].channels;
5578 break;
5579 case AFE_PORT_ID_QUINARY_TDM_TX:
5580 slots = tdm_tx_cfg[TDM_QUIN][TDM_0].channels;
5581 break;
5582
5583 default:
5584 pr_err("%s: dai id 0x%x not supported\n",
5585 __func__, cpu_dai->id);
5586 return -EINVAL;
5587 }
5588
5589 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
5590 /*2 slot config - bits 0 and 1 set for the first two slots */
5591 slot_mask = 0x0000FFFF >> (16-slots);
5592 channels = slots;
5593
5594 pr_debug("%s: tdm rx slot_width %d slots %d\n",
5595 __func__, slot_width, slots);
5596
5597 ret = snd_soc_dai_set_tdm_slot(cpu_dai, 0, slot_mask,
5598 slots, slot_width);
5599 if (ret < 0) {
5600 pr_err("%s: failed to set tdm rx slot, err:%d\n",
5601 __func__, ret);
5602 goto end;
5603 }
5604
5605 ret = snd_soc_dai_set_channel_map(cpu_dai,
5606 0, NULL, channels, slot_offset);
5607 if (ret < 0) {
5608 pr_err("%s: failed to set tdm rx channel map, err:%d\n",
5609 __func__, ret);
5610 goto end;
5611 }
5612 } else if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
5613 /*2 slot config - bits 0 and 1 set for the first two slots */
5614 slot_mask = 0x0000FFFF >> (16-slots);
5615 channels = slots;
5616
5617 pr_debug("%s: tdm tx slot_width %d slots %d\n",
5618 __func__, slot_width, slots);
5619
5620 ret = snd_soc_dai_set_tdm_slot(cpu_dai, slot_mask, 0,
5621 slots, slot_width);
5622 if (ret < 0) {
5623 pr_err("%s: failed to set tdm tx slot, err:%d\n",
5624 __func__, ret);
5625 goto end;
5626 }
5627
5628 ret = snd_soc_dai_set_channel_map(cpu_dai,
5629 channels, slot_offset, 0, NULL);
5630 if (ret < 0) {
5631 pr_err("%s: failed to set tdm tx channel map, err:%d\n",
5632 __func__, ret);
5633 goto end;
5634 }
5635 } else {
5636 ret = -EINVAL;
5637 pr_err("%s: invalid use case, err:%d\n",
5638 __func__, ret);
5639 goto end;
5640 }
5641
5642 rate = params_rate(params);
5643 clk_freq = rate * slot_width * slots;
5644 ret = snd_soc_dai_set_sysclk(cpu_dai, 0, clk_freq, SND_SOC_CLOCK_OUT);
5645 if (ret < 0)
5646 pr_err("%s: failed to set tdm clk, err:%d\n",
5647 __func__, ret);
5648
5649end:
5650 return ret;
5651}
5652
5653static int sm6150_tdm_snd_startup(struct snd_pcm_substream *substream)
5654{
5655 int ret = 0;
5656 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5657 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5658 struct snd_soc_card *card = rtd->card;
5659 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
5660 struct msm_pinctrl_info *pinctrl_info = &pdata->pinctrl_info;
5661
5662 /* currently only supporting TDM_RX_0 and TDM_TX_0 */
5663 if ((cpu_dai->id == AFE_PORT_ID_QUATERNARY_TDM_RX) ||
5664 (cpu_dai->id == AFE_PORT_ID_QUATERNARY_TDM_TX)) {
5665 ret = msm_set_pinctrl(pinctrl_info, STATE_TDM_ACTIVE);
5666 if (ret)
5667 pr_err("%s: TDM TLMM pinctrl set failed with %d\n",
5668 __func__, ret);
5669 }
5670
5671 return ret;
5672}
5673
5674static void sm6150_tdm_snd_shutdown(struct snd_pcm_substream *substream)
5675{
5676 int ret = 0;
5677 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5678 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5679 struct snd_soc_card *card = rtd->card;
5680 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
5681 struct msm_pinctrl_info *pinctrl_info = &pdata->pinctrl_info;
5682
5683 /* currently only supporting TDM_RX_0 and TDM_TX_0 */
5684 if ((cpu_dai->id == AFE_PORT_ID_QUATERNARY_TDM_RX) ||
5685 (cpu_dai->id == AFE_PORT_ID_QUATERNARY_TDM_TX)) {
5686 ret = msm_set_pinctrl(pinctrl_info, STATE_DISABLE);
5687 if (ret)
5688 pr_err("%s: TDM TLMM pinctrl set failed with %d\n",
5689 __func__, ret);
5690 }
5691}
5692
5693static struct snd_soc_ops sm6150_tdm_be_ops = {
5694 .hw_params = sm6150_tdm_snd_hw_params,
5695 .startup = sm6150_tdm_snd_startup,
5696 .shutdown = sm6150_tdm_snd_shutdown
5697};
5698
5699static int msm_fe_qos_prepare(struct snd_pcm_substream *substream)
5700{
5701 cpumask_t mask;
5702
5703 if (pm_qos_request_active(&substream->latency_pm_qos_req))
5704 pm_qos_remove_request(&substream->latency_pm_qos_req);
5705
5706 cpumask_clear(&mask);
5707 cpumask_set_cpu(1, &mask); /* affine to core 1 */
5708 cpumask_set_cpu(2, &mask); /* affine to core 2 */
5709 cpumask_copy(&substream->latency_pm_qos_req.cpus_affine, &mask);
5710
5711 substream->latency_pm_qos_req.type = PM_QOS_REQ_AFFINE_CORES;
5712
5713 pm_qos_add_request(&substream->latency_pm_qos_req,
5714 PM_QOS_CPU_DMA_LATENCY,
5715 MSM_LL_QOS_VALUE);
5716 return 0;
5717}
5718
5719static struct snd_soc_ops msm_fe_qos_ops = {
5720 .prepare = msm_fe_qos_prepare,
5721};
5722
5723static int msm_mi2s_snd_startup(struct snd_pcm_substream *substream)
5724{
5725 int ret = 0;
5726 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5727 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5728 int index = cpu_dai->id;
5729 unsigned int fmt = SND_SOC_DAIFMT_CBS_CFS;
5730 struct snd_soc_card *card = rtd->card;
5731 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
5732 struct msm_pinctrl_info *pinctrl_info = &pdata->pinctrl_info;
5733 int ret_pinctrl = 0;
5734
5735 dev_dbg(rtd->card->dev,
5736 "%s: substream = %s stream = %d, dai name %s, dai ID %d\n",
5737 __func__, substream->name, substream->stream,
5738 cpu_dai->name, cpu_dai->id);
5739
5740 if (index < PRIM_MI2S || index >= MI2S_MAX) {
5741 ret = -EINVAL;
5742 dev_err(rtd->card->dev,
5743 "%s: CPU DAI id (%d) out of range\n",
5744 __func__, cpu_dai->id);
5745 goto err;
5746 }
5747 /*
5748 * Mutex protection in case the same MI2S
5749 * interface using for both TX and RX so
5750 * that the same clock won't be enable twice.
5751 */
5752 mutex_lock(&mi2s_intf_conf[index].lock);
5753 if (++mi2s_intf_conf[index].ref_cnt == 1) {
5754 /* Check if msm needs to provide the clock to the interface */
5755 if (!mi2s_intf_conf[index].msm_is_mi2s_master) {
5756 mi2s_clk[index].clk_id = mi2s_ebit_clk[index];
5757 fmt = SND_SOC_DAIFMT_CBM_CFM;
5758 }
5759 ret = msm_mi2s_set_sclk(substream, true);
5760 if (ret < 0) {
5761 dev_err(rtd->card->dev,
5762 "%s: afe lpass clock failed to enable MI2S clock, err:%d\n",
5763 __func__, ret);
5764 goto clean_up;
5765 }
5766
5767 ret = snd_soc_dai_set_fmt(cpu_dai, fmt);
5768 if (ret < 0) {
5769 pr_err("%s: set fmt cpu dai failed for MI2S (%d), err:%d\n",
5770 __func__, index, ret);
5771 goto clk_off;
5772 }
5773 if (index == QUAT_MI2S) {
5774 ret_pinctrl = msm_set_pinctrl(pinctrl_info,
5775 STATE_MI2S_ACTIVE);
5776 if (ret_pinctrl)
5777 pr_err("%s: MI2S TLMM pinctrl set failed with %d\n",
5778 __func__, ret_pinctrl);
5779 }
5780 }
5781clk_off:
5782 if (ret < 0)
5783 msm_mi2s_set_sclk(substream, false);
5784clean_up:
5785 if (ret < 0)
5786 mi2s_intf_conf[index].ref_cnt--;
5787 mutex_unlock(&mi2s_intf_conf[index].lock);
5788err:
5789 return ret;
5790}
5791
5792static void msm_mi2s_snd_shutdown(struct snd_pcm_substream *substream)
5793{
5794 int ret;
5795 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5796 int index = rtd->cpu_dai->id;
5797 struct snd_soc_card *card = rtd->card;
5798 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
5799 struct msm_pinctrl_info *pinctrl_info = &pdata->pinctrl_info;
5800 int ret_pinctrl = 0;
5801
5802 pr_debug("%s(): substream = %s stream = %d\n", __func__,
5803 substream->name, substream->stream);
5804 if (index < PRIM_MI2S || index >= MI2S_MAX) {
5805 pr_err("%s:invalid MI2S DAI(%d)\n", __func__, index);
5806 return;
5807 }
5808
5809 mutex_lock(&mi2s_intf_conf[index].lock);
5810 if (--mi2s_intf_conf[index].ref_cnt == 0) {
5811 ret = msm_mi2s_set_sclk(substream, false);
5812 if (ret < 0)
5813 pr_err("%s:clock disable failed for MI2S (%d); ret=%d\n",
5814 __func__, index, ret);
5815 if (index == QUAT_MI2S) {
5816 ret_pinctrl = msm_set_pinctrl(pinctrl_info,
5817 STATE_DISABLE);
5818 if (ret_pinctrl)
5819 pr_err("%s: MI2S TLMM pinctrl set failed with %d\n",
5820 __func__, ret_pinctrl);
5821 }
5822 }
5823 mutex_unlock(&mi2s_intf_conf[index].lock);
5824}
5825
5826static struct snd_soc_ops msm_mi2s_be_ops = {
5827 .startup = msm_mi2s_snd_startup,
5828 .shutdown = msm_mi2s_snd_shutdown,
5829};
5830
5831static struct snd_soc_ops msm_cdc_dma_be_ops = {
5832 .hw_params = msm_snd_cdc_dma_hw_params,
5833};
5834
5835static struct snd_soc_ops msm_be_ops = {
5836 .hw_params = msm_snd_hw_params,
5837};
5838
5839static struct snd_soc_ops msm_slimbus_2_be_ops = {
5840 .hw_params = msm_slimbus_2_hw_params,
5841};
5842
5843static struct snd_soc_ops msm_wcn_ops = {
5844 .hw_params = msm_wcn_hw_params,
5845};
5846
5847
5848/* Digital audio interface glue - connects codec <---> CPU */
5849static struct snd_soc_dai_link msm_common_dai_links[] = {
5850 /* FrontEnd DAI Links */
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame^]5851 {/* hw:x,0 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5852 .name = MSM_DAILINK_NAME(Media1),
5853 .stream_name = "MultiMedia1",
5854 .cpu_dai_name = "MultiMedia1",
5855 .platform_name = "msm-pcm-dsp.0",
5856 .dynamic = 1,
5857 .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
5858 .dpcm_playback = 1,
5859 .dpcm_capture = 1,
5860 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5861 SND_SOC_DPCM_TRIGGER_POST},
5862 .codec_dai_name = "snd-soc-dummy-dai",
5863 .codec_name = "snd-soc-dummy",
5864 .ignore_suspend = 1,
5865 /* this dainlink has playback support */
5866 .ignore_pmdown_time = 1,
5867 .id = MSM_FRONTEND_DAI_MULTIMEDIA1
5868 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame^]5869 {/* hw:x,1 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5870 .name = MSM_DAILINK_NAME(Media2),
5871 .stream_name = "MultiMedia2",
5872 .cpu_dai_name = "MultiMedia2",
5873 .platform_name = "msm-pcm-dsp.0",
5874 .dynamic = 1,
5875 .dpcm_playback = 1,
5876 .dpcm_capture = 1,
5877 .codec_dai_name = "snd-soc-dummy-dai",
5878 .codec_name = "snd-soc-dummy",
5879 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5880 SND_SOC_DPCM_TRIGGER_POST},
5881 .ignore_suspend = 1,
5882 /* this dainlink has playback support */
5883 .ignore_pmdown_time = 1,
5884 .id = MSM_FRONTEND_DAI_MULTIMEDIA2,
5885 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame^]5886 {/* hw:x,2 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5887 .name = "VoiceMMode1",
5888 .stream_name = "VoiceMMode1",
5889 .cpu_dai_name = "VoiceMMode1",
5890 .platform_name = "msm-pcm-voice",
5891 .dynamic = 1,
5892 .dpcm_playback = 1,
5893 .dpcm_capture = 1,
5894 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5895 SND_SOC_DPCM_TRIGGER_POST},
5896 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5897 .ignore_suspend = 1,
5898 .ignore_pmdown_time = 1,
5899 .codec_dai_name = "snd-soc-dummy-dai",
5900 .codec_name = "snd-soc-dummy",
5901 .id = MSM_FRONTEND_DAI_VOICEMMODE1,
5902 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame^]5903 {/* hw:x,3 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5904 .name = "MSM VoIP",
5905 .stream_name = "VoIP",
5906 .cpu_dai_name = "VoIP",
5907 .platform_name = "msm-voip-dsp",
5908 .dynamic = 1,
5909 .dpcm_playback = 1,
5910 .dpcm_capture = 1,
5911 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5912 SND_SOC_DPCM_TRIGGER_POST},
5913 .codec_dai_name = "snd-soc-dummy-dai",
5914 .codec_name = "snd-soc-dummy",
5915 .ignore_suspend = 1,
5916 /* this dainlink has playback support */
5917 .ignore_pmdown_time = 1,
5918 .id = MSM_FRONTEND_DAI_VOIP,
5919 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame^]5920 {/* hw:x,4 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5921 .name = MSM_DAILINK_NAME(ULL),
5922 .stream_name = "MultiMedia3",
5923 .cpu_dai_name = "MultiMedia3",
5924 .platform_name = "msm-pcm-dsp.2",
5925 .dynamic = 1,
5926 .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
5927 .dpcm_playback = 1,
5928 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5929 SND_SOC_DPCM_TRIGGER_POST},
5930 .codec_dai_name = "snd-soc-dummy-dai",
5931 .codec_name = "snd-soc-dummy",
5932 .ignore_suspend = 1,
5933 /* this dainlink has playback support */
5934 .ignore_pmdown_time = 1,
5935 .id = MSM_FRONTEND_DAI_MULTIMEDIA3,
5936 },
5937 /* Hostless PCM purpose */
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame^]5938 {/* hw:x,5 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5939 .name = "SLIMBUS_0 Hostless",
5940 .stream_name = "SLIMBUS_0 Hostless",
5941 .cpu_dai_name = "SLIMBUS0_HOSTLESS",
5942 .platform_name = "msm-pcm-hostless",
5943 .dynamic = 1,
5944 .dpcm_playback = 1,
5945 .dpcm_capture = 1,
5946 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5947 SND_SOC_DPCM_TRIGGER_POST},
5948 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5949 .ignore_suspend = 1,
5950 /* this dailink has playback support */
5951 .ignore_pmdown_time = 1,
5952 .codec_dai_name = "snd-soc-dummy-dai",
5953 .codec_name = "snd-soc-dummy",
5954 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame^]5955 {/* hw:x,6 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5956 .name = "MSM AFE-PCM RX",
5957 .stream_name = "AFE-PROXY RX",
5958 .cpu_dai_name = "msm-dai-q6-dev.241",
5959 .codec_name = "msm-stub-codec.1",
5960 .codec_dai_name = "msm-stub-rx",
5961 .platform_name = "msm-pcm-afe",
5962 .dpcm_playback = 1,
5963 .ignore_suspend = 1,
5964 /* this dainlink has playback support */
5965 .ignore_pmdown_time = 1,
5966 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame^]5967 {/* hw:x,7 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5968 .name = "MSM AFE-PCM TX",
5969 .stream_name = "AFE-PROXY TX",
5970 .cpu_dai_name = "msm-dai-q6-dev.240",
5971 .codec_name = "msm-stub-codec.1",
5972 .codec_dai_name = "msm-stub-tx",
5973 .platform_name = "msm-pcm-afe",
5974 .dpcm_capture = 1,
5975 .ignore_suspend = 1,
5976 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame^]5977 {/* hw:x,8 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5978 .name = MSM_DAILINK_NAME(Compress1),
5979 .stream_name = "Compress1",
5980 .cpu_dai_name = "MultiMedia4",
5981 .platform_name = "msm-compress-dsp",
5982 .dynamic = 1,
5983 .async_ops = ASYNC_DPCM_SND_SOC_HW_PARAMS,
5984 .dpcm_playback = 1,
5985 .dpcm_capture = 1,
5986 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5987 SND_SOC_DPCM_TRIGGER_POST},
5988 .codec_dai_name = "snd-soc-dummy-dai",
5989 .codec_name = "snd-soc-dummy",
5990 .ignore_suspend = 1,
5991 .ignore_pmdown_time = 1,
5992 /* this dainlink has playback support */
5993 .id = MSM_FRONTEND_DAI_MULTIMEDIA4,
5994 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame^]5995 {/* hw:x,9 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5996 .name = "AUXPCM Hostless",
5997 .stream_name = "AUXPCM Hostless",
5998 .cpu_dai_name = "AUXPCM_HOSTLESS",
5999 .platform_name = "msm-pcm-hostless",
6000 .dynamic = 1,
6001 .dpcm_playback = 1,
6002 .dpcm_capture = 1,
6003 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6004 SND_SOC_DPCM_TRIGGER_POST},
6005 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6006 .ignore_suspend = 1,
6007 /* this dainlink has playback support */
6008 .ignore_pmdown_time = 1,
6009 .codec_dai_name = "snd-soc-dummy-dai",
6010 .codec_name = "snd-soc-dummy",
6011 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame^]6012 {/* hw:x,10 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6013 .name = "SLIMBUS_1 Hostless",
6014 .stream_name = "SLIMBUS_1 Hostless",
6015 .cpu_dai_name = "SLIMBUS1_HOSTLESS",
6016 .platform_name = "msm-pcm-hostless",
6017 .dynamic = 1,
6018 .dpcm_playback = 1,
6019 .dpcm_capture = 1,
6020 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6021 SND_SOC_DPCM_TRIGGER_POST},
6022 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6023 .ignore_suspend = 1,
6024 /* this dailink has playback support */
6025 .ignore_pmdown_time = 1,
6026 .codec_dai_name = "snd-soc-dummy-dai",
6027 .codec_name = "snd-soc-dummy",
6028 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame^]6029 {/* hw:x,11 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6030 .name = "SLIMBUS_3 Hostless",
6031 .stream_name = "SLIMBUS_3 Hostless",
6032 .cpu_dai_name = "SLIMBUS3_HOSTLESS",
6033 .platform_name = "msm-pcm-hostless",
6034 .dynamic = 1,
6035 .dpcm_playback = 1,
6036 .dpcm_capture = 1,
6037 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6038 SND_SOC_DPCM_TRIGGER_POST},
6039 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6040 .ignore_suspend = 1,
6041 /* this dailink has playback support */
6042 .ignore_pmdown_time = 1,
6043 .codec_dai_name = "snd-soc-dummy-dai",
6044 .codec_name = "snd-soc-dummy",
6045 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame^]6046 {/* hw:x,12 */
6047 .name = "SLIMBUS_7 Hostless",
6048 .stream_name = "SLIMBUS_7 Hostless",
6049 .cpu_dai_name = "SLIMBUS7_HOSTLESS",
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6050 .platform_name = "msm-pcm-hostless",
6051 .dynamic = 1,
6052 .dpcm_playback = 1,
6053 .dpcm_capture = 1,
6054 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6055 SND_SOC_DPCM_TRIGGER_POST},
6056 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6057 .ignore_suspend = 1,
6058 /* this dailink has playback support */
6059 .ignore_pmdown_time = 1,
6060 .codec_dai_name = "snd-soc-dummy-dai",
6061 .codec_name = "snd-soc-dummy",
6062 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame^]6063 {/* hw:x,13 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6064 .name = MSM_DAILINK_NAME(LowLatency),
6065 .stream_name = "MultiMedia5",
6066 .cpu_dai_name = "MultiMedia5",
6067 .platform_name = "msm-pcm-dsp.1",
6068 .dynamic = 1,
6069 .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
6070 .dpcm_playback = 1,
6071 .dpcm_capture = 1,
6072 .codec_dai_name = "snd-soc-dummy-dai",
6073 .codec_name = "snd-soc-dummy",
6074 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6075 SND_SOC_DPCM_TRIGGER_POST},
6076 .ignore_suspend = 1,
6077 /* this dainlink has playback support */
6078 .ignore_pmdown_time = 1,
6079 .id = MSM_FRONTEND_DAI_MULTIMEDIA5,
6080 .ops = &msm_fe_qos_ops,
6081 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame^]6082 {/* hw:x,14 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6083 .name = "Listen 1 Audio Service",
6084 .stream_name = "Listen 1 Audio Service",
6085 .cpu_dai_name = "LSM1",
6086 .platform_name = "msm-lsm-client",
6087 .dynamic = 1,
6088 .dpcm_capture = 1,
6089 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
6090 SND_SOC_DPCM_TRIGGER_POST },
6091 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6092 .ignore_suspend = 1,
6093 .codec_dai_name = "snd-soc-dummy-dai",
6094 .codec_name = "snd-soc-dummy",
6095 .id = MSM_FRONTEND_DAI_LSM1,
6096 },
6097 /* Multiple Tunnel instances */
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame^]6098 {/* hw:x,15 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6099 .name = MSM_DAILINK_NAME(Compress2),
6100 .stream_name = "Compress2",
6101 .cpu_dai_name = "MultiMedia7",
6102 .platform_name = "msm-compress-dsp",
6103 .dynamic = 1,
6104 .dpcm_playback = 1,
6105 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6106 SND_SOC_DPCM_TRIGGER_POST},
6107 .codec_dai_name = "snd-soc-dummy-dai",
6108 .codec_name = "snd-soc-dummy",
6109 .ignore_suspend = 1,
6110 .ignore_pmdown_time = 1,
6111 /* this dainlink has playback support */
6112 .id = MSM_FRONTEND_DAI_MULTIMEDIA7,
6113 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame^]6114 {/* hw:x,16 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6115 .name = MSM_DAILINK_NAME(MultiMedia10),
6116 .stream_name = "MultiMedia10",
6117 .cpu_dai_name = "MultiMedia10",
6118 .platform_name = "msm-pcm-dsp.1",
6119 .dynamic = 1,
6120 .dpcm_playback = 1,
6121 .dpcm_capture = 1,
6122 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6123 SND_SOC_DPCM_TRIGGER_POST},
6124 .codec_dai_name = "snd-soc-dummy-dai",
6125 .codec_name = "snd-soc-dummy",
6126 .ignore_suspend = 1,
6127 .ignore_pmdown_time = 1,
6128 /* this dainlink has playback support */
6129 .id = MSM_FRONTEND_DAI_MULTIMEDIA10,
6130 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame^]6131 {/* hw:x,17 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6132 .name = MSM_DAILINK_NAME(ULL_NOIRQ),
6133 .stream_name = "MM_NOIRQ",
6134 .cpu_dai_name = "MultiMedia8",
6135 .platform_name = "msm-pcm-dsp-noirq",
6136 .dynamic = 1,
6137 .dpcm_playback = 1,
6138 .dpcm_capture = 1,
6139 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6140 SND_SOC_DPCM_TRIGGER_POST},
6141 .codec_dai_name = "snd-soc-dummy-dai",
6142 .codec_name = "snd-soc-dummy",
6143 .ignore_suspend = 1,
6144 .ignore_pmdown_time = 1,
6145 /* this dainlink has playback support */
6146 .id = MSM_FRONTEND_DAI_MULTIMEDIA8,
6147 .ops = &msm_fe_qos_ops,
6148 },
6149 /* HDMI Hostless */
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame^]6150 {/* hw:x,18 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6151 .name = "HDMI_RX_HOSTLESS",
6152 .stream_name = "HDMI_RX_HOSTLESS",
6153 .cpu_dai_name = "HDMI_HOSTLESS",
6154 .platform_name = "msm-pcm-hostless",
6155 .dynamic = 1,
6156 .dpcm_playback = 1,
6157 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6158 SND_SOC_DPCM_TRIGGER_POST},
6159 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6160 .ignore_suspend = 1,
6161 .ignore_pmdown_time = 1,
6162 .codec_dai_name = "snd-soc-dummy-dai",
6163 .codec_name = "snd-soc-dummy",
6164 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame^]6165 {/* hw:x,19 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6166 .name = "VoiceMMode2",
6167 .stream_name = "VoiceMMode2",
6168 .cpu_dai_name = "VoiceMMode2",
6169 .platform_name = "msm-pcm-voice",
6170 .dynamic = 1,
6171 .dpcm_playback = 1,
6172 .dpcm_capture = 1,
6173 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6174 SND_SOC_DPCM_TRIGGER_POST},
6175 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6176 .ignore_suspend = 1,
6177 .ignore_pmdown_time = 1,
6178 .codec_dai_name = "snd-soc-dummy-dai",
6179 .codec_name = "snd-soc-dummy",
6180 .id = MSM_FRONTEND_DAI_VOICEMMODE2,
6181 },
6182 /* LSM FE */
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame^]6183 {/* hw:x,20 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6184 .name = "Listen 2 Audio Service",
6185 .stream_name = "Listen 2 Audio Service",
6186 .cpu_dai_name = "LSM2",
6187 .platform_name = "msm-lsm-client",
6188 .dynamic = 1,
6189 .dpcm_capture = 1,
6190 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
6191 SND_SOC_DPCM_TRIGGER_POST },
6192 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6193 .ignore_suspend = 1,
6194 .codec_dai_name = "snd-soc-dummy-dai",
6195 .codec_name = "snd-soc-dummy",
6196 .id = MSM_FRONTEND_DAI_LSM2,
6197 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame^]6198 {/* hw:x,21 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6199 .name = "Listen 3 Audio Service",
6200 .stream_name = "Listen 3 Audio Service",
6201 .cpu_dai_name = "LSM3",
6202 .platform_name = "msm-lsm-client",
6203 .dynamic = 1,
6204 .dpcm_capture = 1,
6205 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
6206 SND_SOC_DPCM_TRIGGER_POST },
6207 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6208 .ignore_suspend = 1,
6209 .codec_dai_name = "snd-soc-dummy-dai",
6210 .codec_name = "snd-soc-dummy",
6211 .id = MSM_FRONTEND_DAI_LSM3,
6212 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame^]6213 {/* hw:x,22 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6214 .name = "Listen 4 Audio Service",
6215 .stream_name = "Listen 4 Audio Service",
6216 .cpu_dai_name = "LSM4",
6217 .platform_name = "msm-lsm-client",
6218 .dynamic = 1,
6219 .dpcm_capture = 1,
6220 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
6221 SND_SOC_DPCM_TRIGGER_POST },
6222 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6223 .ignore_suspend = 1,
6224 .codec_dai_name = "snd-soc-dummy-dai",
6225 .codec_name = "snd-soc-dummy",
6226 .id = MSM_FRONTEND_DAI_LSM4,
6227 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame^]6228 {/* hw:x,23 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6229 .name = "Listen 5 Audio Service",
6230 .stream_name = "Listen 5 Audio Service",
6231 .cpu_dai_name = "LSM5",
6232 .platform_name = "msm-lsm-client",
6233 .dynamic = 1,
6234 .dpcm_capture = 1,
6235 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
6236 SND_SOC_DPCM_TRIGGER_POST },
6237 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6238 .ignore_suspend = 1,
6239 .codec_dai_name = "snd-soc-dummy-dai",
6240 .codec_name = "snd-soc-dummy",
6241 .id = MSM_FRONTEND_DAI_LSM5,
6242 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame^]6243 {/* hw:x,24 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6244 .name = "Listen 6 Audio Service",
6245 .stream_name = "Listen 6 Audio Service",
6246 .cpu_dai_name = "LSM6",
6247 .platform_name = "msm-lsm-client",
6248 .dynamic = 1,
6249 .dpcm_capture = 1,
6250 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
6251 SND_SOC_DPCM_TRIGGER_POST },
6252 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6253 .ignore_suspend = 1,
6254 .codec_dai_name = "snd-soc-dummy-dai",
6255 .codec_name = "snd-soc-dummy",
6256 .id = MSM_FRONTEND_DAI_LSM6,
6257 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame^]6258 {/* hw:x,25 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6259 .name = "Listen 7 Audio Service",
6260 .stream_name = "Listen 7 Audio Service",
6261 .cpu_dai_name = "LSM7",
6262 .platform_name = "msm-lsm-client",
6263 .dynamic = 1,
6264 .dpcm_capture = 1,
6265 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
6266 SND_SOC_DPCM_TRIGGER_POST },
6267 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6268 .ignore_suspend = 1,
6269 .codec_dai_name = "snd-soc-dummy-dai",
6270 .codec_name = "snd-soc-dummy",
6271 .id = MSM_FRONTEND_DAI_LSM7,
6272 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame^]6273 {/* hw:x,26 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6274 .name = "Listen 8 Audio Service",
6275 .stream_name = "Listen 8 Audio Service",
6276 .cpu_dai_name = "LSM8",
6277 .platform_name = "msm-lsm-client",
6278 .dynamic = 1,
6279 .dpcm_capture = 1,
6280 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
6281 SND_SOC_DPCM_TRIGGER_POST },
6282 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6283 .ignore_suspend = 1,
6284 .codec_dai_name = "snd-soc-dummy-dai",
6285 .codec_name = "snd-soc-dummy",
6286 .id = MSM_FRONTEND_DAI_LSM8,
6287 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame^]6288 {/* hw:x,27 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6289 .name = MSM_DAILINK_NAME(Media9),
6290 .stream_name = "MultiMedia9",
6291 .cpu_dai_name = "MultiMedia9",
6292 .platform_name = "msm-pcm-dsp.0",
6293 .dynamic = 1,
6294 .dpcm_playback = 1,
6295 .dpcm_capture = 1,
6296 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6297 SND_SOC_DPCM_TRIGGER_POST},
6298 .codec_dai_name = "snd-soc-dummy-dai",
6299 .codec_name = "snd-soc-dummy",
6300 .ignore_suspend = 1,
6301 /* this dainlink has playback support */
6302 .ignore_pmdown_time = 1,
6303 .id = MSM_FRONTEND_DAI_MULTIMEDIA9,
6304 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame^]6305 {/* hw:x,28 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6306 .name = MSM_DAILINK_NAME(Compress4),
6307 .stream_name = "Compress4",
6308 .cpu_dai_name = "MultiMedia11",
6309 .platform_name = "msm-compress-dsp",
6310 .dynamic = 1,
6311 .dpcm_playback = 1,
6312 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6313 SND_SOC_DPCM_TRIGGER_POST},
6314 .codec_dai_name = "snd-soc-dummy-dai",
6315 .codec_name = "snd-soc-dummy",
6316 .ignore_suspend = 1,
6317 .ignore_pmdown_time = 1,
6318 /* this dainlink has playback support */
6319 .id = MSM_FRONTEND_DAI_MULTIMEDIA11,
6320 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame^]6321 {/* hw:x,29 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6322 .name = MSM_DAILINK_NAME(Compress5),
6323 .stream_name = "Compress5",
6324 .cpu_dai_name = "MultiMedia12",
6325 .platform_name = "msm-compress-dsp",
6326 .dynamic = 1,
6327 .dpcm_playback = 1,
6328 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6329 SND_SOC_DPCM_TRIGGER_POST},
6330 .codec_dai_name = "snd-soc-dummy-dai",
6331 .codec_name = "snd-soc-dummy",
6332 .ignore_suspend = 1,
6333 .ignore_pmdown_time = 1,
6334 /* this dainlink has playback support */
6335 .id = MSM_FRONTEND_DAI_MULTIMEDIA12,
6336 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame^]6337 {/* hw:x,30 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6338 .name = MSM_DAILINK_NAME(Compress6),
6339 .stream_name = "Compress6",
6340 .cpu_dai_name = "MultiMedia13",
6341 .platform_name = "msm-compress-dsp",
6342 .dynamic = 1,
6343 .dpcm_playback = 1,
6344 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6345 SND_SOC_DPCM_TRIGGER_POST},
6346 .codec_dai_name = "snd-soc-dummy-dai",
6347 .codec_name = "snd-soc-dummy",
6348 .ignore_suspend = 1,
6349 .ignore_pmdown_time = 1,
6350 /* this dainlink has playback support */
6351 .id = MSM_FRONTEND_DAI_MULTIMEDIA13,
6352 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame^]6353 {/* hw:x,31 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6354 .name = MSM_DAILINK_NAME(Compress7),
6355 .stream_name = "Compress7",
6356 .cpu_dai_name = "MultiMedia14",
6357 .platform_name = "msm-compress-dsp",
6358 .dynamic = 1,
6359 .dpcm_playback = 1,
6360 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6361 SND_SOC_DPCM_TRIGGER_POST},
6362 .codec_dai_name = "snd-soc-dummy-dai",
6363 .codec_name = "snd-soc-dummy",
6364 .ignore_suspend = 1,
6365 .ignore_pmdown_time = 1,
6366 /* this dainlink has playback support */
6367 .id = MSM_FRONTEND_DAI_MULTIMEDIA14,
6368 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame^]6369 {/* hw:x,32 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6370 .name = MSM_DAILINK_NAME(Compress8),
6371 .stream_name = "Compress8",
6372 .cpu_dai_name = "MultiMedia15",
6373 .platform_name = "msm-compress-dsp",
6374 .dynamic = 1,
6375 .dpcm_playback = 1,
6376 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6377 SND_SOC_DPCM_TRIGGER_POST},
6378 .codec_dai_name = "snd-soc-dummy-dai",
6379 .codec_name = "snd-soc-dummy",
6380 .ignore_suspend = 1,
6381 .ignore_pmdown_time = 1,
6382 /* this dainlink has playback support */
6383 .id = MSM_FRONTEND_DAI_MULTIMEDIA15,
6384 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame^]6385 {/* hw:x,33 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6386 .name = MSM_DAILINK_NAME(ULL_NOIRQ_2),
6387 .stream_name = "MM_NOIRQ_2",
6388 .cpu_dai_name = "MultiMedia16",
6389 .platform_name = "msm-pcm-dsp-noirq",
6390 .dynamic = 1,
6391 .dpcm_playback = 1,
6392 .dpcm_capture = 1,
6393 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6394 SND_SOC_DPCM_TRIGGER_POST},
6395 .codec_dai_name = "snd-soc-dummy-dai",
6396 .codec_name = "snd-soc-dummy",
6397 .ignore_suspend = 1,
6398 .ignore_pmdown_time = 1,
6399 /* this dainlink has playback support */
6400 .id = MSM_FRONTEND_DAI_MULTIMEDIA16,
6401 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame^]6402 {/* hw:x,34 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6403 .name = "SLIMBUS_8 Hostless",
6404 .stream_name = "SLIMBUS8_HOSTLESS Capture",
6405 .cpu_dai_name = "SLIMBUS8_HOSTLESS",
6406 .platform_name = "msm-pcm-hostless",
6407 .dynamic = 1,
6408 .dpcm_capture = 1,
6409 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6410 SND_SOC_DPCM_TRIGGER_POST},
6411 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6412 .ignore_suspend = 1,
6413 .codec_dai_name = "snd-soc-dummy-dai",
6414 .codec_name = "snd-soc-dummy",
6415 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame^]6416 {/* hw:x,35 */
6417 .name = "CDC_DMA Hostless",
6418 .stream_name = "CDC_DMA Hostless",
6419 .cpu_dai_name = "CDC_DMA_HOSTLESS",
6420 .platform_name = "msm-pcm-hostless",
6421 .dynamic = 1,
6422 .dpcm_playback = 1,
6423 .dpcm_capture = 1,
6424 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6425 SND_SOC_DPCM_TRIGGER_POST},
6426 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6427 .ignore_suspend = 1,
6428 /* this dailink has playback support */
6429 .ignore_pmdown_time = 1,
6430 .codec_dai_name = "snd-soc-dummy-dai",
6431 .codec_name = "snd-soc-dummy",
6432 },
6433 {/* hw:x,36 */
6434 .name = "TX3_CDC_DMA Hostless",
6435 .stream_name = "TX3_CDC_DMA Hostless",
6436 .cpu_dai_name = "TX3_CDC_DMA_HOSTLESS",
6437 .platform_name = "msm-pcm-hostless",
6438 .dynamic = 1,
6439 .dpcm_capture = 1,
6440 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6441 SND_SOC_DPCM_TRIGGER_POST},
6442 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6443 .ignore_suspend = 1,
6444 .codec_dai_name = "snd-soc-dummy-dai",
6445 .codec_name = "snd-soc-dummy",
6446 },
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6447};
6448
6449
6450static struct snd_soc_dai_link msm_tavil_fe_dai_links[] = {
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame^]6451 {/* hw:x,37 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6452 .name = LPASS_BE_SLIMBUS_4_TX,
6453 .stream_name = "Slimbus4 Capture",
6454 .cpu_dai_name = "msm-dai-q6-dev.16393",
6455 .platform_name = "msm-pcm-hostless",
6456 .codec_name = "tavil_codec",
6457 .codec_dai_name = "tavil_vifeedback",
6458 .id = MSM_BACKEND_DAI_SLIMBUS_4_TX,
6459 .be_hw_params_fixup = msm_be_hw_params_fixup,
6460 .ops = &msm_be_ops,
6461 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6462 .ignore_suspend = 1,
6463 },
6464 /* Ultrasound RX DAI Link */
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame^]6465 {/* hw:x,38 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6466 .name = "SLIMBUS_2 Hostless Playback",
6467 .stream_name = "SLIMBUS_2 Hostless Playback",
6468 .cpu_dai_name = "msm-dai-q6-dev.16388",
6469 .platform_name = "msm-pcm-hostless",
6470 .codec_name = "tavil_codec",
6471 .codec_dai_name = "tavil_rx2",
6472 .ignore_suspend = 1,
6473 .ignore_pmdown_time = 1,
6474 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6475 .ops = &msm_slimbus_2_be_ops,
6476 },
6477 /* Ultrasound TX DAI Link */
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame^]6478 {/* hw:x,39 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6479 .name = "SLIMBUS_2 Hostless Capture",
6480 .stream_name = "SLIMBUS_2 Hostless Capture",
6481 .cpu_dai_name = "msm-dai-q6-dev.16389",
6482 .platform_name = "msm-pcm-hostless",
6483 .codec_name = "tavil_codec",
6484 .codec_dai_name = "tavil_tx2",
6485 .ignore_suspend = 1,
6486 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6487 .ops = &msm_slimbus_2_be_ops,
6488 },
6489};
6490
6491static struct snd_soc_dai_link msm_bolero_fe_dai_links[] = {
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame^]6492 {/* hw:x,37 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6493 .name = LPASS_BE_WSA_CDC_DMA_TX_0,
6494 .stream_name = "WSA CDC DMA0 Capture",
6495 .cpu_dai_name = "msm-dai-cdc-dma-dev.45057",
6496 .platform_name = "msm-pcm-hostless",
6497 .codec_name = "bolero_codec",
6498 .codec_dai_name = "wsa_macro_vifeedback",
6499 .id = MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0,
6500 .be_hw_params_fixup = msm_be_hw_params_fixup,
6501 .ignore_suspend = 1,
6502 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6503 .ops = &msm_cdc_dma_be_ops,
6504 },
6505};
6506
6507static struct snd_soc_dai_link msm_common_misc_fe_dai_links[] = {
6508 {
6509 .name = MSM_DAILINK_NAME(ASM Loopback),
6510 .stream_name = "MultiMedia6",
6511 .cpu_dai_name = "MultiMedia6",
6512 .platform_name = "msm-pcm-loopback",
6513 .dynamic = 1,
6514 .dpcm_playback = 1,
6515 .dpcm_capture = 1,
6516 .codec_dai_name = "snd-soc-dummy-dai",
6517 .codec_name = "snd-soc-dummy",
6518 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6519 SND_SOC_DPCM_TRIGGER_POST},
6520 .ignore_suspend = 1,
6521 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6522 .ignore_pmdown_time = 1,
6523 .id = MSM_FRONTEND_DAI_MULTIMEDIA6,
6524 },
6525 {
6526 .name = "USB Audio Hostless",
6527 .stream_name = "USB Audio Hostless",
6528 .cpu_dai_name = "USBAUDIO_HOSTLESS",
6529 .platform_name = "msm-pcm-hostless",
6530 .dynamic = 1,
6531 .dpcm_playback = 1,
6532 .dpcm_capture = 1,
6533 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6534 SND_SOC_DPCM_TRIGGER_POST},
6535 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6536 .ignore_suspend = 1,
6537 .ignore_pmdown_time = 1,
6538 .codec_dai_name = "snd-soc-dummy-dai",
6539 .codec_name = "snd-soc-dummy",
6540 },
6541};
6542
6543static struct snd_soc_dai_link msm_common_be_dai_links[] = {
6544 /* Backend AFE DAI Links */
6545 {
6546 .name = LPASS_BE_AFE_PCM_RX,
6547 .stream_name = "AFE Playback",
6548 .cpu_dai_name = "msm-dai-q6-dev.224",
6549 .platform_name = "msm-pcm-routing",
6550 .codec_name = "msm-stub-codec.1",
6551 .codec_dai_name = "msm-stub-rx",
6552 .no_pcm = 1,
6553 .dpcm_playback = 1,
6554 .id = MSM_BACKEND_DAI_AFE_PCM_RX,
6555 .be_hw_params_fixup = msm_be_hw_params_fixup,
6556 /* this dainlink has playback support */
6557 .ignore_pmdown_time = 1,
6558 .ignore_suspend = 1,
6559 },
6560 {
6561 .name = LPASS_BE_AFE_PCM_TX,
6562 .stream_name = "AFE Capture",
6563 .cpu_dai_name = "msm-dai-q6-dev.225",
6564 .platform_name = "msm-pcm-routing",
6565 .codec_name = "msm-stub-codec.1",
6566 .codec_dai_name = "msm-stub-tx",
6567 .no_pcm = 1,
6568 .dpcm_capture = 1,
6569 .id = MSM_BACKEND_DAI_AFE_PCM_TX,
6570 .be_hw_params_fixup = msm_be_hw_params_fixup,
6571 .ignore_suspend = 1,
6572 },
6573 /* Incall Record Uplink BACK END DAI Link */
6574 {
6575 .name = LPASS_BE_INCALL_RECORD_TX,
6576 .stream_name = "Voice Uplink Capture",
6577 .cpu_dai_name = "msm-dai-q6-dev.32772",
6578 .platform_name = "msm-pcm-routing",
6579 .codec_name = "msm-stub-codec.1",
6580 .codec_dai_name = "msm-stub-tx",
6581 .no_pcm = 1,
6582 .dpcm_capture = 1,
6583 .id = MSM_BACKEND_DAI_INCALL_RECORD_TX,
6584 .be_hw_params_fixup = msm_be_hw_params_fixup,
6585 .ignore_suspend = 1,
6586 },
6587 /* Incall Record Downlink BACK END DAI Link */
6588 {
6589 .name = LPASS_BE_INCALL_RECORD_RX,
6590 .stream_name = "Voice Downlink Capture",
6591 .cpu_dai_name = "msm-dai-q6-dev.32771",
6592 .platform_name = "msm-pcm-routing",
6593 .codec_name = "msm-stub-codec.1",
6594 .codec_dai_name = "msm-stub-tx",
6595 .no_pcm = 1,
6596 .dpcm_capture = 1,
6597 .id = MSM_BACKEND_DAI_INCALL_RECORD_RX,
6598 .be_hw_params_fixup = msm_be_hw_params_fixup,
6599 .ignore_suspend = 1,
6600 },
6601 /* Incall Music BACK END DAI Link */
6602 {
6603 .name = LPASS_BE_VOICE_PLAYBACK_TX,
6604 .stream_name = "Voice Farend Playback",
6605 .cpu_dai_name = "msm-dai-q6-dev.32773",
6606 .platform_name = "msm-pcm-routing",
6607 .codec_name = "msm-stub-codec.1",
6608 .codec_dai_name = "msm-stub-rx",
6609 .no_pcm = 1,
6610 .dpcm_playback = 1,
6611 .id = MSM_BACKEND_DAI_VOICE_PLAYBACK_TX,
6612 .be_hw_params_fixup = msm_be_hw_params_fixup,
6613 .ignore_suspend = 1,
6614 .ignore_pmdown_time = 1,
6615 },
6616 /* Incall Music 2 BACK END DAI Link */
6617 {
6618 .name = LPASS_BE_VOICE2_PLAYBACK_TX,
6619 .stream_name = "Voice2 Farend Playback",
6620 .cpu_dai_name = "msm-dai-q6-dev.32770",
6621 .platform_name = "msm-pcm-routing",
6622 .codec_name = "msm-stub-codec.1",
6623 .codec_dai_name = "msm-stub-rx",
6624 .no_pcm = 1,
6625 .dpcm_playback = 1,
6626 .id = MSM_BACKEND_DAI_VOICE2_PLAYBACK_TX,
6627 .be_hw_params_fixup = msm_be_hw_params_fixup,
6628 .ignore_suspend = 1,
6629 .ignore_pmdown_time = 1,
6630 },
6631 {
6632 .name = LPASS_BE_USB_AUDIO_RX,
6633 .stream_name = "USB Audio Playback",
6634 .cpu_dai_name = "msm-dai-q6-dev.28672",
6635 .platform_name = "msm-pcm-routing",
6636 .codec_name = "msm-stub-codec.1",
6637 .codec_dai_name = "msm-stub-rx",
6638 .no_pcm = 1,
6639 .dpcm_playback = 1,
6640 .id = MSM_BACKEND_DAI_USB_RX,
6641 .be_hw_params_fixup = msm_be_hw_params_fixup,
6642 .ignore_pmdown_time = 1,
6643 .ignore_suspend = 1,
6644 },
6645 {
6646 .name = LPASS_BE_USB_AUDIO_TX,
6647 .stream_name = "USB Audio Capture",
6648 .cpu_dai_name = "msm-dai-q6-dev.28673",
6649 .platform_name = "msm-pcm-routing",
6650 .codec_name = "msm-stub-codec.1",
6651 .codec_dai_name = "msm-stub-tx",
6652 .no_pcm = 1,
6653 .dpcm_capture = 1,
6654 .id = MSM_BACKEND_DAI_USB_TX,
6655 .be_hw_params_fixup = msm_be_hw_params_fixup,
6656 .ignore_suspend = 1,
6657 },
6658 {
6659 .name = LPASS_BE_PRI_TDM_RX_0,
6660 .stream_name = "Primary TDM0 Playback",
6661 .cpu_dai_name = "msm-dai-q6-tdm.36864",
6662 .platform_name = "msm-pcm-routing",
6663 .codec_name = "msm-stub-codec.1",
6664 .codec_dai_name = "msm-stub-rx",
6665 .no_pcm = 1,
6666 .dpcm_playback = 1,
6667 .id = MSM_BACKEND_DAI_PRI_TDM_RX_0,
6668 .be_hw_params_fixup = msm_be_hw_params_fixup,
6669 .ops = &sm6150_tdm_be_ops,
6670 .ignore_suspend = 1,
6671 .ignore_pmdown_time = 1,
6672 },
6673 {
6674 .name = LPASS_BE_PRI_TDM_TX_0,
6675 .stream_name = "Primary TDM0 Capture",
6676 .cpu_dai_name = "msm-dai-q6-tdm.36865",
6677 .platform_name = "msm-pcm-routing",
6678 .codec_name = "msm-stub-codec.1",
6679 .codec_dai_name = "msm-stub-tx",
6680 .no_pcm = 1,
6681 .dpcm_capture = 1,
6682 .id = MSM_BACKEND_DAI_PRI_TDM_TX_0,
6683 .be_hw_params_fixup = msm_be_hw_params_fixup,
6684 .ops = &sm6150_tdm_be_ops,
6685 .ignore_suspend = 1,
6686 },
6687 {
6688 .name = LPASS_BE_SEC_TDM_RX_0,
6689 .stream_name = "Secondary TDM0 Playback",
6690 .cpu_dai_name = "msm-dai-q6-tdm.36880",
6691 .platform_name = "msm-pcm-routing",
6692 .codec_name = "msm-stub-codec.1",
6693 .codec_dai_name = "msm-stub-rx",
6694 .no_pcm = 1,
6695 .dpcm_playback = 1,
6696 .id = MSM_BACKEND_DAI_SEC_TDM_RX_0,
6697 .be_hw_params_fixup = msm_be_hw_params_fixup,
6698 .ops = &sm6150_tdm_be_ops,
6699 .ignore_suspend = 1,
6700 .ignore_pmdown_time = 1,
6701 },
6702 {
6703 .name = LPASS_BE_SEC_TDM_TX_0,
6704 .stream_name = "Secondary TDM0 Capture",
6705 .cpu_dai_name = "msm-dai-q6-tdm.36881",
6706 .platform_name = "msm-pcm-routing",
6707 .codec_name = "msm-stub-codec.1",
6708 .codec_dai_name = "msm-stub-tx",
6709 .no_pcm = 1,
6710 .dpcm_capture = 1,
6711 .id = MSM_BACKEND_DAI_SEC_TDM_TX_0,
6712 .be_hw_params_fixup = msm_be_hw_params_fixup,
6713 .ops = &sm6150_tdm_be_ops,
6714 .ignore_suspend = 1,
6715 },
6716 {
6717 .name = LPASS_BE_TERT_TDM_RX_0,
6718 .stream_name = "Tertiary TDM0 Playback",
6719 .cpu_dai_name = "msm-dai-q6-tdm.36896",
6720 .platform_name = "msm-pcm-routing",
6721 .codec_name = "msm-stub-codec.1",
6722 .codec_dai_name = "msm-stub-rx",
6723 .no_pcm = 1,
6724 .dpcm_playback = 1,
6725 .id = MSM_BACKEND_DAI_TERT_TDM_RX_0,
6726 .be_hw_params_fixup = msm_be_hw_params_fixup,
6727 .ops = &sm6150_tdm_be_ops,
6728 .ignore_suspend = 1,
6729 .ignore_pmdown_time = 1,
6730 },
6731 {
6732 .name = LPASS_BE_TERT_TDM_TX_0,
6733 .stream_name = "Tertiary TDM0 Capture",
6734 .cpu_dai_name = "msm-dai-q6-tdm.36897",
6735 .platform_name = "msm-pcm-routing",
6736 .codec_name = "msm-stub-codec.1",
6737 .codec_dai_name = "msm-stub-tx",
6738 .no_pcm = 1,
6739 .dpcm_capture = 1,
6740 .id = MSM_BACKEND_DAI_TERT_TDM_TX_0,
6741 .be_hw_params_fixup = msm_be_hw_params_fixup,
6742 .ops = &sm6150_tdm_be_ops,
6743 .ignore_suspend = 1,
6744 },
6745 {
6746 .name = LPASS_BE_QUAT_TDM_RX_0,
6747 .stream_name = "Quaternary TDM0 Playback",
6748 .cpu_dai_name = "msm-dai-q6-tdm.36912",
6749 .platform_name = "msm-pcm-routing",
6750 .codec_name = "msm-stub-codec.1",
6751 .codec_dai_name = "msm-stub-rx",
6752 .no_pcm = 1,
6753 .dpcm_playback = 1,
6754 .id = MSM_BACKEND_DAI_QUAT_TDM_RX_0,
6755 .be_hw_params_fixup = msm_tdm_be_hw_params_fixup,
6756 .ops = &sm6150_tdm_be_ops,
6757 .ignore_suspend = 1,
6758 .ignore_pmdown_time = 1,
6759 },
6760 {
6761 .name = LPASS_BE_QUAT_TDM_TX_0,
6762 .stream_name = "Quaternary TDM0 Capture",
6763 .cpu_dai_name = "msm-dai-q6-tdm.36913",
6764 .platform_name = "msm-pcm-routing",
6765 .codec_name = "msm-stub-codec.1",
6766 .codec_dai_name = "msm-stub-tx",
6767 .no_pcm = 1,
6768 .dpcm_capture = 1,
6769 .id = MSM_BACKEND_DAI_QUAT_TDM_TX_0,
6770 .be_hw_params_fixup = msm_be_hw_params_fixup,
6771 .ops = &sm6150_tdm_be_ops,
6772 .ignore_suspend = 1,
6773 },
6774};
6775
6776static struct snd_soc_dai_link msm_tavil_be_dai_links[] = {
6777 {
6778 .name = LPASS_BE_SLIMBUS_0_RX,
6779 .stream_name = "Slimbus Playback",
6780 .cpu_dai_name = "msm-dai-q6-dev.16384",
6781 .platform_name = "msm-pcm-routing",
6782 .codec_name = "tavil_codec",
6783 .codec_dai_name = "tavil_rx1",
6784 .no_pcm = 1,
6785 .dpcm_playback = 1,
6786 .id = MSM_BACKEND_DAI_SLIMBUS_0_RX,
6787 .init = &msm_audrx_tavil_init,
6788 .be_hw_params_fixup = msm_be_hw_params_fixup,
6789 /* this dainlink has playback support */
6790 .ignore_pmdown_time = 1,
6791 .ignore_suspend = 1,
6792 .ops = &msm_be_ops,
6793 },
6794 {
6795 .name = LPASS_BE_SLIMBUS_0_TX,
6796 .stream_name = "Slimbus Capture",
6797 .cpu_dai_name = "msm-dai-q6-dev.16385",
6798 .platform_name = "msm-pcm-routing",
6799 .codec_name = "tavil_codec",
6800 .codec_dai_name = "tavil_tx1",
6801 .no_pcm = 1,
6802 .dpcm_capture = 1,
6803 .id = MSM_BACKEND_DAI_SLIMBUS_0_TX,
6804 .be_hw_params_fixup = msm_be_hw_params_fixup,
6805 .ignore_suspend = 1,
6806 .ops = &msm_be_ops,
6807 },
6808 {
6809 .name = LPASS_BE_SLIMBUS_1_RX,
6810 .stream_name = "Slimbus1 Playback",
6811 .cpu_dai_name = "msm-dai-q6-dev.16386",
6812 .platform_name = "msm-pcm-routing",
6813 .codec_name = "tavil_codec",
6814 .codec_dai_name = "tavil_rx1",
6815 .no_pcm = 1,
6816 .dpcm_playback = 1,
6817 .id = MSM_BACKEND_DAI_SLIMBUS_1_RX,
6818 .be_hw_params_fixup = msm_be_hw_params_fixup,
6819 .ops = &msm_be_ops,
6820 /* dai link has playback support */
6821 .ignore_pmdown_time = 1,
6822 .ignore_suspend = 1,
6823 },
6824 {
6825 .name = LPASS_BE_SLIMBUS_1_TX,
6826 .stream_name = "Slimbus1 Capture",
6827 .cpu_dai_name = "msm-dai-q6-dev.16387",
6828 .platform_name = "msm-pcm-routing",
6829 .codec_name = "tavil_codec",
6830 .codec_dai_name = "tavil_tx3",
6831 .no_pcm = 1,
6832 .dpcm_capture = 1,
6833 .id = MSM_BACKEND_DAI_SLIMBUS_1_TX,
6834 .be_hw_params_fixup = msm_be_hw_params_fixup,
6835 .ops = &msm_be_ops,
6836 .ignore_suspend = 1,
6837 },
6838 {
6839 .name = LPASS_BE_SLIMBUS_2_RX,
6840 .stream_name = "Slimbus2 Playback",
6841 .cpu_dai_name = "msm-dai-q6-dev.16388",
6842 .platform_name = "msm-pcm-routing",
6843 .codec_name = "tavil_codec",
6844 .codec_dai_name = "tavil_rx2",
6845 .no_pcm = 1,
6846 .dpcm_playback = 1,
6847 .id = MSM_BACKEND_DAI_SLIMBUS_2_RX,
6848 .be_hw_params_fixup = msm_be_hw_params_fixup,
6849 .ops = &msm_be_ops,
6850 .ignore_pmdown_time = 1,
6851 .ignore_suspend = 1,
6852 },
6853 {
6854 .name = LPASS_BE_SLIMBUS_3_RX,
6855 .stream_name = "Slimbus3 Playback",
6856 .cpu_dai_name = "msm-dai-q6-dev.16390",
6857 .platform_name = "msm-pcm-routing",
6858 .codec_name = "tavil_codec",
6859 .codec_dai_name = "tavil_rx1",
6860 .no_pcm = 1,
6861 .dpcm_playback = 1,
6862 .id = MSM_BACKEND_DAI_SLIMBUS_3_RX,
6863 .be_hw_params_fixup = msm_be_hw_params_fixup,
6864 .ops = &msm_be_ops,
6865 /* dai link has playback support */
6866 .ignore_pmdown_time = 1,
6867 .ignore_suspend = 1,
6868 },
6869 {
6870 .name = LPASS_BE_SLIMBUS_3_TX,
6871 .stream_name = "Slimbus3 Capture",
6872 .cpu_dai_name = "msm-dai-q6-dev.16391",
6873 .platform_name = "msm-pcm-routing",
6874 .codec_name = "tavil_codec",
6875 .codec_dai_name = "tavil_tx1",
6876 .no_pcm = 1,
6877 .dpcm_capture = 1,
6878 .id = MSM_BACKEND_DAI_SLIMBUS_3_TX,
6879 .be_hw_params_fixup = msm_be_hw_params_fixup,
6880 .ops = &msm_be_ops,
6881 .ignore_suspend = 1,
6882 },
6883 {
6884 .name = LPASS_BE_SLIMBUS_4_RX,
6885 .stream_name = "Slimbus4 Playback",
6886 .cpu_dai_name = "msm-dai-q6-dev.16392",
6887 .platform_name = "msm-pcm-routing",
6888 .codec_name = "tavil_codec",
6889 .codec_dai_name = "tavil_rx1",
6890 .no_pcm = 1,
6891 .dpcm_playback = 1,
6892 .id = MSM_BACKEND_DAI_SLIMBUS_4_RX,
6893 .be_hw_params_fixup = msm_be_hw_params_fixup,
6894 .ops = &msm_be_ops,
6895 /* dai link has playback support */
6896 .ignore_pmdown_time = 1,
6897 .ignore_suspend = 1,
6898 },
6899 {
6900 .name = LPASS_BE_SLIMBUS_5_RX,
6901 .stream_name = "Slimbus5 Playback",
6902 .cpu_dai_name = "msm-dai-q6-dev.16394",
6903 .platform_name = "msm-pcm-routing",
6904 .codec_name = "tavil_codec",
6905 .codec_dai_name = "tavil_rx3",
6906 .no_pcm = 1,
6907 .dpcm_playback = 1,
6908 .id = MSM_BACKEND_DAI_SLIMBUS_5_RX,
6909 .be_hw_params_fixup = msm_be_hw_params_fixup,
6910 .ops = &msm_be_ops,
6911 /* dai link has playback support */
6912 .ignore_pmdown_time = 1,
6913 .ignore_suspend = 1,
6914 },
6915 /* MAD BE */
6916 {
6917 .name = LPASS_BE_SLIMBUS_5_TX,
6918 .stream_name = "Slimbus5 Capture",
6919 .cpu_dai_name = "msm-dai-q6-dev.16395",
6920 .platform_name = "msm-pcm-routing",
6921 .codec_name = "tavil_codec",
6922 .codec_dai_name = "tavil_mad1",
6923 .no_pcm = 1,
6924 .dpcm_capture = 1,
6925 .id = MSM_BACKEND_DAI_SLIMBUS_5_TX,
6926 .be_hw_params_fixup = msm_be_hw_params_fixup,
6927 .ops = &msm_be_ops,
6928 .ignore_suspend = 1,
6929 },
6930 {
6931 .name = LPASS_BE_SLIMBUS_6_RX,
6932 .stream_name = "Slimbus6 Playback",
6933 .cpu_dai_name = "msm-dai-q6-dev.16396",
6934 .platform_name = "msm-pcm-routing",
6935 .codec_name = "tavil_codec",
6936 .codec_dai_name = "tavil_rx4",
6937 .no_pcm = 1,
6938 .dpcm_playback = 1,
6939 .id = MSM_BACKEND_DAI_SLIMBUS_6_RX,
6940 .be_hw_params_fixup = msm_be_hw_params_fixup,
6941 .ops = &msm_be_ops,
6942 /* dai link has playback support */
6943 .ignore_pmdown_time = 1,
6944 .ignore_suspend = 1,
6945 },
6946 /* Slimbus VI Recording */
6947 {
6948 .name = LPASS_BE_SLIMBUS_TX_VI,
6949 .stream_name = "Slimbus4 Capture",
6950 .cpu_dai_name = "msm-dai-q6-dev.16393",
6951 .platform_name = "msm-pcm-routing",
6952 .codec_name = "tavil_codec",
6953 .codec_dai_name = "tavil_vifeedback",
6954 .id = MSM_BACKEND_DAI_SLIMBUS_4_TX,
6955 .be_hw_params_fixup = msm_be_hw_params_fixup,
6956 .ops = &msm_be_ops,
6957 .ignore_suspend = 1,
6958 .no_pcm = 1,
6959 .dpcm_capture = 1,
6960 },
6961};
6962
6963static struct snd_soc_dai_link msm_wcn_be_dai_links[] = {
6964 {
6965 .name = LPASS_BE_SLIMBUS_7_RX,
6966 .stream_name = "Slimbus7 Playback",
6967 .cpu_dai_name = "msm-dai-q6-dev.16398",
6968 .platform_name = "msm-pcm-routing",
6969 .codec_name = "btfmslim_slave",
6970 /* BT codec driver determines capabilities based on
6971 * dai name, bt codecdai name should always contains
6972 * supported usecase information
6973 */
6974 .codec_dai_name = "btfm_bt_sco_a2dp_slim_rx",
6975 .no_pcm = 1,
6976 .dpcm_playback = 1,
6977 .id = MSM_BACKEND_DAI_SLIMBUS_7_RX,
6978 .be_hw_params_fixup = msm_be_hw_params_fixup,
6979 .ops = &msm_wcn_ops,
6980 /* dai link has playback support */
6981 .ignore_pmdown_time = 1,
6982 .ignore_suspend = 1,
6983 },
6984 {
6985 .name = LPASS_BE_SLIMBUS_7_TX,
6986 .stream_name = "Slimbus7 Capture",
6987 .cpu_dai_name = "msm-dai-q6-dev.16399",
6988 .platform_name = "msm-pcm-routing",
6989 .codec_name = "btfmslim_slave",
6990 .codec_dai_name = "btfm_bt_sco_slim_tx",
6991 .no_pcm = 1,
6992 .dpcm_capture = 1,
6993 .id = MSM_BACKEND_DAI_SLIMBUS_7_TX,
6994 .be_hw_params_fixup = msm_be_hw_params_fixup,
6995 .ops = &msm_wcn_ops,
6996 .ignore_suspend = 1,
6997 },
6998 {
6999 .name = LPASS_BE_SLIMBUS_8_TX,
7000 .stream_name = "Slimbus8 Capture",
7001 .cpu_dai_name = "msm-dai-q6-dev.16401",
7002 .platform_name = "msm-pcm-routing",
7003 .codec_name = "btfmslim_slave",
7004 .codec_dai_name = "btfm_fm_slim_tx",
7005 .no_pcm = 1,
7006 .dpcm_capture = 1,
7007 .id = MSM_BACKEND_DAI_SLIMBUS_8_TX,
7008 .be_hw_params_fixup = msm_be_hw_params_fixup,
7009 .init = &msm_wcn_init,
7010 .ops = &msm_wcn_ops,
7011 .ignore_suspend = 1,
7012 },
7013};
7014
7015static struct snd_soc_dai_link ext_disp_be_dai_link[] = {
7016 /* DISP PORT BACK END DAI Link */
7017 {
7018 .name = LPASS_BE_DISPLAY_PORT,
7019 .stream_name = "Display Port Playback",
7020 .cpu_dai_name = "msm-dai-q6-dp.24608",
7021 .platform_name = "msm-pcm-routing",
7022 .codec_name = "msm-ext-disp-audio-codec-rx",
7023 .codec_dai_name = "msm_dp_audio_codec_rx_dai",
7024 .no_pcm = 1,
7025 .dpcm_playback = 1,
7026 .id = MSM_BACKEND_DAI_DISPLAY_PORT_RX,
7027 .be_hw_params_fixup = msm_be_hw_params_fixup,
7028 .ignore_pmdown_time = 1,
7029 .ignore_suspend = 1,
7030 },
7031};
7032
7033static struct snd_soc_dai_link msm_mi2s_be_dai_links[] = {
7034 {
7035 .name = LPASS_BE_PRI_MI2S_RX,
7036 .stream_name = "Primary MI2S Playback",
7037 .cpu_dai_name = "msm-dai-q6-mi2s.0",
7038 .platform_name = "msm-pcm-routing",
7039 .codec_name = "msm-stub-codec.1",
7040 .codec_dai_name = "msm-stub-rx",
7041 .no_pcm = 1,
7042 .dpcm_playback = 1,
7043 .id = MSM_BACKEND_DAI_PRI_MI2S_RX,
7044 .be_hw_params_fixup = msm_be_hw_params_fixup,
7045 .ops = &msm_mi2s_be_ops,
7046 .ignore_suspend = 1,
7047 .ignore_pmdown_time = 1,
7048 },
7049 {
7050 .name = LPASS_BE_PRI_MI2S_TX,
7051 .stream_name = "Primary MI2S Capture",
7052 .cpu_dai_name = "msm-dai-q6-mi2s.0",
7053 .platform_name = "msm-pcm-routing",
7054 .codec_name = "msm-stub-codec.1",
7055 .codec_dai_name = "msm-stub-tx",
7056 .no_pcm = 1,
7057 .dpcm_capture = 1,
7058 .id = MSM_BACKEND_DAI_PRI_MI2S_TX,
7059 .be_hw_params_fixup = msm_be_hw_params_fixup,
7060 .ops = &msm_mi2s_be_ops,
7061 .ignore_suspend = 1,
7062 },
7063 {
7064 .name = LPASS_BE_SEC_MI2S_RX,
7065 .stream_name = "Secondary MI2S Playback",
7066 .cpu_dai_name = "msm-dai-q6-mi2s.1",
7067 .platform_name = "msm-pcm-routing",
7068 .codec_name = "msm-stub-codec.1",
7069 .codec_dai_name = "msm-stub-rx",
7070 .no_pcm = 1,
7071 .dpcm_playback = 1,
7072 .id = MSM_BACKEND_DAI_SECONDARY_MI2S_RX,
7073 .be_hw_params_fixup = msm_be_hw_params_fixup,
7074 .ops = &msm_mi2s_be_ops,
7075 .ignore_suspend = 1,
7076 .ignore_pmdown_time = 1,
7077 },
7078 {
7079 .name = LPASS_BE_SEC_MI2S_TX,
7080 .stream_name = "Secondary MI2S Capture",
7081 .cpu_dai_name = "msm-dai-q6-mi2s.1",
7082 .platform_name = "msm-pcm-routing",
7083 .codec_name = "msm-stub-codec.1",
7084 .codec_dai_name = "msm-stub-tx",
7085 .no_pcm = 1,
7086 .dpcm_capture = 1,
7087 .id = MSM_BACKEND_DAI_SECONDARY_MI2S_TX,
7088 .be_hw_params_fixup = msm_be_hw_params_fixup,
7089 .ops = &msm_mi2s_be_ops,
7090 .ignore_suspend = 1,
7091 },
7092 {
7093 .name = LPASS_BE_TERT_MI2S_RX,
7094 .stream_name = "Tertiary MI2S Playback",
7095 .cpu_dai_name = "msm-dai-q6-mi2s.2",
7096 .platform_name = "msm-pcm-routing",
7097 .codec_name = "msm-stub-codec.1",
7098 .codec_dai_name = "msm-stub-rx",
7099 .no_pcm = 1,
7100 .dpcm_playback = 1,
7101 .id = MSM_BACKEND_DAI_TERTIARY_MI2S_RX,
7102 .be_hw_params_fixup = msm_be_hw_params_fixup,
7103 .ops = &msm_mi2s_be_ops,
7104 .ignore_suspend = 1,
7105 .ignore_pmdown_time = 1,
7106 },
7107 {
7108 .name = LPASS_BE_TERT_MI2S_TX,
7109 .stream_name = "Tertiary MI2S Capture",
7110 .cpu_dai_name = "msm-dai-q6-mi2s.2",
7111 .platform_name = "msm-pcm-routing",
7112 .codec_name = "msm-stub-codec.1",
7113 .codec_dai_name = "msm-stub-tx",
7114 .no_pcm = 1,
7115 .dpcm_capture = 1,
7116 .id = MSM_BACKEND_DAI_TERTIARY_MI2S_TX,
7117 .be_hw_params_fixup = msm_be_hw_params_fixup,
7118 .ops = &msm_mi2s_be_ops,
7119 .ignore_suspend = 1,
7120 },
7121 {
7122 .name = LPASS_BE_QUAT_MI2S_RX,
7123 .stream_name = "Quaternary MI2S Playback",
7124 .cpu_dai_name = "msm-dai-q6-mi2s.3",
7125 .platform_name = "msm-pcm-routing",
7126 .codec_name = "msm-stub-codec.1",
7127 .codec_dai_name = "msm-stub-rx",
7128 .no_pcm = 1,
7129 .dpcm_playback = 1,
7130 .id = MSM_BACKEND_DAI_QUATERNARY_MI2S_RX,
7131 .be_hw_params_fixup = msm_be_hw_params_fixup,
7132 .ops = &msm_mi2s_be_ops,
7133 .ignore_suspend = 1,
7134 .ignore_pmdown_time = 1,
7135 },
7136 {
7137 .name = LPASS_BE_QUAT_MI2S_TX,
7138 .stream_name = "Quaternary MI2S Capture",
7139 .cpu_dai_name = "msm-dai-q6-mi2s.3",
7140 .platform_name = "msm-pcm-routing",
7141 .codec_name = "msm-stub-codec.1",
7142 .codec_dai_name = "msm-stub-tx",
7143 .no_pcm = 1,
7144 .dpcm_capture = 1,
7145 .id = MSM_BACKEND_DAI_QUATERNARY_MI2S_TX,
7146 .be_hw_params_fixup = msm_be_hw_params_fixup,
7147 .ops = &msm_mi2s_be_ops,
7148 .ignore_suspend = 1,
7149 },
7150 {
7151 .name = LPASS_BE_QUIN_MI2S_RX,
7152 .stream_name = "Quinary MI2S Playback",
7153 .cpu_dai_name = "msm-dai-q6-mi2s.4",
7154 .platform_name = "msm-pcm-routing",
7155 .codec_name = "msm-stub-codec.1",
7156 .codec_dai_name = "msm-stub-rx",
7157 .no_pcm = 1,
7158 .dpcm_playback = 1,
7159 .id = MSM_BACKEND_DAI_QUINARY_MI2S_RX,
7160 .be_hw_params_fixup = msm_be_hw_params_fixup,
7161 .ops = &msm_mi2s_be_ops,
7162 .ignore_suspend = 1,
7163 .ignore_pmdown_time = 1,
7164 },
7165 {
7166 .name = LPASS_BE_QUIN_MI2S_TX,
7167 .stream_name = "Quinary MI2S Capture",
7168 .cpu_dai_name = "msm-dai-q6-mi2s.4",
7169 .platform_name = "msm-pcm-routing",
7170 .codec_name = "msm-stub-codec.1",
7171 .codec_dai_name = "msm-stub-tx",
7172 .no_pcm = 1,
7173 .dpcm_capture = 1,
7174 .id = MSM_BACKEND_DAI_QUINARY_MI2S_TX,
7175 .be_hw_params_fixup = msm_be_hw_params_fixup,
7176 .ops = &msm_mi2s_be_ops,
7177 .ignore_suspend = 1,
7178 },
7179
7180};
7181
7182static struct snd_soc_dai_link msm_auxpcm_be_dai_links[] = {
7183 /* Primary AUX PCM Backend DAI Links */
7184 {
7185 .name = LPASS_BE_AUXPCM_RX,
7186 .stream_name = "AUX PCM Playback",
7187 .cpu_dai_name = "msm-dai-q6-auxpcm.1",
7188 .platform_name = "msm-pcm-routing",
7189 .codec_name = "msm-stub-codec.1",
7190 .codec_dai_name = "msm-stub-rx",
7191 .no_pcm = 1,
7192 .dpcm_playback = 1,
7193 .id = MSM_BACKEND_DAI_AUXPCM_RX,
7194 .be_hw_params_fixup = msm_be_hw_params_fixup,
7195 .ignore_pmdown_time = 1,
7196 .ignore_suspend = 1,
7197 },
7198 {
7199 .name = LPASS_BE_AUXPCM_TX,
7200 .stream_name = "AUX PCM Capture",
7201 .cpu_dai_name = "msm-dai-q6-auxpcm.1",
7202 .platform_name = "msm-pcm-routing",
7203 .codec_name = "msm-stub-codec.1",
7204 .codec_dai_name = "msm-stub-tx",
7205 .no_pcm = 1,
7206 .dpcm_capture = 1,
7207 .id = MSM_BACKEND_DAI_AUXPCM_TX,
7208 .be_hw_params_fixup = msm_be_hw_params_fixup,
7209 .ignore_suspend = 1,
7210 },
7211 /* Secondary AUX PCM Backend DAI Links */
7212 {
7213 .name = LPASS_BE_SEC_AUXPCM_RX,
7214 .stream_name = "Sec AUX PCM Playback",
7215 .cpu_dai_name = "msm-dai-q6-auxpcm.2",
7216 .platform_name = "msm-pcm-routing",
7217 .codec_name = "msm-stub-codec.1",
7218 .codec_dai_name = "msm-stub-rx",
7219 .no_pcm = 1,
7220 .dpcm_playback = 1,
7221 .id = MSM_BACKEND_DAI_SEC_AUXPCM_RX,
7222 .be_hw_params_fixup = msm_be_hw_params_fixup,
7223 .ignore_pmdown_time = 1,
7224 .ignore_suspend = 1,
7225 },
7226 {
7227 .name = LPASS_BE_SEC_AUXPCM_TX,
7228 .stream_name = "Sec AUX PCM Capture",
7229 .cpu_dai_name = "msm-dai-q6-auxpcm.2",
7230 .platform_name = "msm-pcm-routing",
7231 .codec_name = "msm-stub-codec.1",
7232 .codec_dai_name = "msm-stub-tx",
7233 .no_pcm = 1,
7234 .dpcm_capture = 1,
7235 .id = MSM_BACKEND_DAI_SEC_AUXPCM_TX,
7236 .be_hw_params_fixup = msm_be_hw_params_fixup,
7237 .ignore_suspend = 1,
7238 },
7239 /* Tertiary AUX PCM Backend DAI Links */
7240 {
7241 .name = LPASS_BE_TERT_AUXPCM_RX,
7242 .stream_name = "Tert AUX PCM Playback",
7243 .cpu_dai_name = "msm-dai-q6-auxpcm.3",
7244 .platform_name = "msm-pcm-routing",
7245 .codec_name = "msm-stub-codec.1",
7246 .codec_dai_name = "msm-stub-rx",
7247 .no_pcm = 1,
7248 .dpcm_playback = 1,
7249 .id = MSM_BACKEND_DAI_TERT_AUXPCM_RX,
7250 .be_hw_params_fixup = msm_be_hw_params_fixup,
7251 .ignore_suspend = 1,
7252 },
7253 {
7254 .name = LPASS_BE_TERT_AUXPCM_TX,
7255 .stream_name = "Tert AUX PCM Capture",
7256 .cpu_dai_name = "msm-dai-q6-auxpcm.3",
7257 .platform_name = "msm-pcm-routing",
7258 .codec_name = "msm-stub-codec.1",
7259 .codec_dai_name = "msm-stub-tx",
7260 .no_pcm = 1,
7261 .dpcm_capture = 1,
7262 .id = MSM_BACKEND_DAI_TERT_AUXPCM_TX,
7263 .be_hw_params_fixup = msm_be_hw_params_fixup,
7264 .ignore_suspend = 1,
7265 },
7266 /* Quaternary AUX PCM Backend DAI Links */
7267 {
7268 .name = LPASS_BE_QUAT_AUXPCM_RX,
7269 .stream_name = "Quat AUX PCM Playback",
7270 .cpu_dai_name = "msm-dai-q6-auxpcm.4",
7271 .platform_name = "msm-pcm-routing",
7272 .codec_name = "msm-stub-codec.1",
7273 .codec_dai_name = "msm-stub-rx",
7274 .no_pcm = 1,
7275 .dpcm_playback = 1,
7276 .id = MSM_BACKEND_DAI_QUAT_AUXPCM_RX,
7277 .be_hw_params_fixup = msm_be_hw_params_fixup,
7278 .ignore_pmdown_time = 1,
7279 .ignore_suspend = 1,
7280 },
7281 {
7282 .name = LPASS_BE_QUAT_AUXPCM_TX,
7283 .stream_name = "Quat AUX PCM Capture",
7284 .cpu_dai_name = "msm-dai-q6-auxpcm.4",
7285 .platform_name = "msm-pcm-routing",
7286 .codec_name = "msm-stub-codec.1",
7287 .codec_dai_name = "msm-stub-tx",
7288 .no_pcm = 1,
7289 .dpcm_capture = 1,
7290 .id = MSM_BACKEND_DAI_QUAT_AUXPCM_TX,
7291 .be_hw_params_fixup = msm_be_hw_params_fixup,
7292 .ignore_suspend = 1,
7293 },
7294 /* Quinary AUX PCM Backend DAI Links */
7295 {
7296 .name = LPASS_BE_QUIN_AUXPCM_RX,
7297 .stream_name = "Quin AUX PCM Playback",
7298 .cpu_dai_name = "msm-dai-q6-auxpcm.5",
7299 .platform_name = "msm-pcm-routing",
7300 .codec_name = "msm-stub-codec.1",
7301 .codec_dai_name = "msm-stub-rx",
7302 .no_pcm = 1,
7303 .dpcm_playback = 1,
7304 .id = MSM_BACKEND_DAI_QUIN_AUXPCM_RX,
7305 .be_hw_params_fixup = msm_be_hw_params_fixup,
7306 .ignore_pmdown_time = 1,
7307 .ignore_suspend = 1,
7308 },
7309 {
7310 .name = LPASS_BE_QUIN_AUXPCM_TX,
7311 .stream_name = "Quin AUX PCM Capture",
7312 .cpu_dai_name = "msm-dai-q6-auxpcm.5",
7313 .platform_name = "msm-pcm-routing",
7314 .codec_name = "msm-stub-codec.1",
7315 .codec_dai_name = "msm-stub-tx",
7316 .no_pcm = 1,
7317 .dpcm_capture = 1,
7318 .id = MSM_BACKEND_DAI_QUIN_AUXPCM_TX,
7319 .be_hw_params_fixup = msm_be_hw_params_fixup,
7320 .ignore_suspend = 1,
7321 },
7322};
7323
7324static struct snd_soc_dai_link msm_wsa_cdc_dma_be_dai_links[] = {
7325 /* WSA CDC DMA Backend DAI Links */
7326 {
7327 .name = LPASS_BE_WSA_CDC_DMA_RX_0,
7328 .stream_name = "WSA CDC DMA0 Playback",
7329 .cpu_dai_name = "msm-dai-cdc-dma-dev.45056",
7330 .platform_name = "msm-pcm-routing",
7331 .codec_name = "bolero_codec",
7332 .codec_dai_name = "wsa_macro_rx1",
7333 .no_pcm = 1,
7334 .dpcm_playback = 1,
7335 .init = &msm_int_audrx_init,
7336 .id = MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0,
7337 .be_hw_params_fixup = msm_be_hw_params_fixup,
7338 .ignore_pmdown_time = 1,
7339 .ignore_suspend = 1,
7340 .ops = &msm_cdc_dma_be_ops,
7341 },
7342 {
7343 .name = LPASS_BE_WSA_CDC_DMA_RX_1,
7344 .stream_name = "WSA CDC DMA1 Playback",
7345 .cpu_dai_name = "msm-dai-cdc-dma-dev.45058",
7346 .platform_name = "msm-pcm-routing",
7347 .codec_name = "bolero_codec",
7348 .codec_dai_name = "wsa_macro_rx_mix",
7349 .no_pcm = 1,
7350 .dpcm_playback = 1,
7351 .id = MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1,
7352 .be_hw_params_fixup = msm_be_hw_params_fixup,
7353 .ignore_pmdown_time = 1,
7354 .ignore_suspend = 1,
7355 .ops = &msm_cdc_dma_be_ops,
7356 },
7357 {
7358 .name = LPASS_BE_WSA_CDC_DMA_TX_1,
7359 .stream_name = "WSA CDC DMA1 Capture",
7360 .cpu_dai_name = "msm-dai-cdc-dma-dev.45059",
7361 .platform_name = "msm-pcm-routing",
7362 .codec_name = "bolero_codec",
7363 .codec_dai_name = "wsa_macro_echo",
7364 .no_pcm = 1,
7365 .dpcm_capture = 1,
7366 .id = MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1,
7367 .be_hw_params_fixup = msm_be_hw_params_fixup,
7368 .ignore_suspend = 1,
7369 .ops = &msm_cdc_dma_be_ops,
7370 },
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7371};
7372
7373static struct snd_soc_dai_link msm_rx_tx_cdc_dma_be_dai_links[] = {
7374 /* RX CDC DMA Backend DAI Links */
7375 {
7376 .name = LPASS_BE_RX_CDC_DMA_RX_0,
7377 .stream_name = "RX CDC DMA0 Playback",
Ramprasad Katkamf83acfb2018-08-11 23:28:57 +0530[diff] [blame]7378 .cpu_dai_name = "msm-dai-cdc-dma-dev.45104",
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7379 .platform_name = "msm-pcm-routing",
7380 .codec_name = "bolero_codec",
7381 .codec_dai_name = "rx_macro_rx1",
7382 .no_pcm = 1,
7383 .dpcm_playback = 1,
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7384 .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_0,
7385 .be_hw_params_fixup = msm_be_hw_params_fixup,
7386 .ignore_pmdown_time = 1,
7387 .ignore_suspend = 1,
7388 .ops = &msm_cdc_dma_be_ops,
7389 },
7390 {
7391 .name = LPASS_BE_RX_CDC_DMA_RX_1,
7392 .stream_name = "RX CDC DMA1 Playback",
Ramprasad Katkamf83acfb2018-08-11 23:28:57 +0530[diff] [blame]7393 .cpu_dai_name = "msm-dai-cdc-dma-dev.45106",
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7394 .platform_name = "msm-pcm-routing",
7395 .codec_name = "bolero_codec",
7396 .codec_dai_name = "rx_macro_rx2",
7397 .no_pcm = 1,
7398 .dpcm_playback = 1,
7399 .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_1,
7400 .be_hw_params_fixup = msm_be_hw_params_fixup,
7401 .ignore_pmdown_time = 1,
7402 .ignore_suspend = 1,
7403 .ops = &msm_cdc_dma_be_ops,
7404 },
7405 {
7406 .name = LPASS_BE_RX_CDC_DMA_RX_2,
7407 .stream_name = "RX CDC DMA2 Playback",
Ramprasad Katkamf83acfb2018-08-11 23:28:57 +0530[diff] [blame]7408 .cpu_dai_name = "msm-dai-cdc-dma-dev.45108",
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7409 .platform_name = "msm-pcm-routing",
7410 .codec_name = "bolero_codec",
7411 .codec_dai_name = "rx_macro_rx3",
7412 .no_pcm = 1,
7413 .dpcm_playback = 1,
7414 .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_2,
7415 .be_hw_params_fixup = msm_be_hw_params_fixup,
7416 .ignore_pmdown_time = 1,
7417 .ignore_suspend = 1,
7418 .ops = &msm_cdc_dma_be_ops,
7419 },
7420 {
7421 .name = LPASS_BE_RX_CDC_DMA_RX_3,
7422 .stream_name = "RX CDC DMA3 Playback",
Ramprasad Katkamf83acfb2018-08-11 23:28:57 +0530[diff] [blame]7423 .cpu_dai_name = "msm-dai-cdc-dma-dev.45110",
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7424 .platform_name = "msm-pcm-routing",
7425 .codec_name = "bolero_codec",
7426 .codec_dai_name = "rx_macro_rx4",
7427 .no_pcm = 1,
7428 .dpcm_playback = 1,
7429 .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_3,
7430 .be_hw_params_fixup = msm_be_hw_params_fixup,
7431 .ignore_pmdown_time = 1,
7432 .ignore_suspend = 1,
7433 .ops = &msm_cdc_dma_be_ops,
7434 },
7435 /* TX CDC DMA Backend DAI Links */
7436 {
7437 .name = LPASS_BE_TX_CDC_DMA_TX_3,
7438 .stream_name = "TX CDC DMA3 Capture",
Ramprasad Katkamf83acfb2018-08-11 23:28:57 +0530[diff] [blame]7439 .cpu_dai_name = "msm-dai-cdc-dma-dev.45111",
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7440 .platform_name = "msm-pcm-routing",
7441 .codec_name = "bolero_codec",
7442 .codec_dai_name = "tx_macro_tx1",
7443 .no_pcm = 1,
7444 .dpcm_capture = 1,
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7445 .id = MSM_BACKEND_DAI_TX_CDC_DMA_TX_3,
7446 .be_hw_params_fixup = msm_be_hw_params_fixup,
7447 .ignore_suspend = 1,
7448 .ops = &msm_cdc_dma_be_ops,
7449 },
7450 {
7451 .name = LPASS_BE_TX_CDC_DMA_TX_4,
7452 .stream_name = "TX CDC DMA4 Capture",
Ramprasad Katkamf83acfb2018-08-11 23:28:57 +0530[diff] [blame]7453 .cpu_dai_name = "msm-dai-cdc-dma-dev.45113",
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7454 .platform_name = "msm-pcm-routing",
7455 .codec_name = "bolero_codec",
7456 .codec_dai_name = "tx_macro_tx2",
7457 .no_pcm = 1,
7458 .dpcm_capture = 1,
7459 .id = MSM_BACKEND_DAI_TX_CDC_DMA_TX_4,
7460 .be_hw_params_fixup = msm_be_hw_params_fixup,
7461 .ignore_suspend = 1,
7462 .ops = &msm_cdc_dma_be_ops,
7463 },
7464};
7465
7466static struct snd_soc_dai_link msm_sm6150_dai_links[
7467 ARRAY_SIZE(msm_common_dai_links) +
7468 ARRAY_SIZE(msm_tavil_fe_dai_links) +
7469 ARRAY_SIZE(msm_bolero_fe_dai_links) +
7470 ARRAY_SIZE(msm_common_misc_fe_dai_links) +
7471 ARRAY_SIZE(msm_common_be_dai_links) +
7472 ARRAY_SIZE(msm_tavil_be_dai_links) +
7473 ARRAY_SIZE(msm_wcn_be_dai_links) +
7474 ARRAY_SIZE(ext_disp_be_dai_link) +
7475 ARRAY_SIZE(msm_mi2s_be_dai_links) +
7476 ARRAY_SIZE(msm_auxpcm_be_dai_links) +
7477 ARRAY_SIZE(msm_wsa_cdc_dma_be_dai_links) +
7478 ARRAY_SIZE(msm_rx_tx_cdc_dma_be_dai_links)];
7479
7480static int msm_snd_card_tavil_late_probe(struct snd_soc_card *card)
7481{
7482 const char *be_dl_name = LPASS_BE_SLIMBUS_0_RX;
7483 struct snd_soc_pcm_runtime *rtd;
7484 int ret = 0;
7485 void *mbhc_calibration;
7486
7487 rtd = snd_soc_get_pcm_runtime(card, be_dl_name);
7488 if (!rtd) {
7489 dev_err(card->dev,
7490 "%s: snd_soc_get_pcm_runtime for %s failed!\n",
7491 __func__, be_dl_name);
7492 ret = -EINVAL;
7493 goto err_pcm_runtime;
7494 }
7495
7496 mbhc_calibration = def_wcd_mbhc_cal();
7497 if (!mbhc_calibration) {
7498 ret = -ENOMEM;
7499 goto err_mbhc_cal;
7500 }
7501 wcd_mbhc_cfg.calibration = mbhc_calibration;
7502 ret = tavil_mbhc_hs_detect(rtd->codec, &wcd_mbhc_cfg);
7503 if (ret) {
7504 dev_err(card->dev, "%s: mbhc hs detect failed, err:%d\n",
7505 __func__, ret);
7506 goto err_hs_detect;
7507 }
7508 return 0;
7509
7510err_hs_detect:
7511 kfree(mbhc_calibration);
7512err_mbhc_cal:
7513err_pcm_runtime:
7514 return ret;
7515}
7516
7517
7518static int msm_populate_dai_link_component_of_node(
7519 struct snd_soc_card *card)
7520{
7521 int i, index, ret = 0;
7522 struct device *cdev = card->dev;
7523 struct snd_soc_dai_link *dai_link = card->dai_link;
7524 struct device_node *np;
7525
7526 if (!cdev) {
7527 pr_err("%s: Sound card device memory NULL\n", __func__);
7528 return -ENODEV;
7529 }
7530
7531 for (i = 0; i < card->num_links; i++) {
7532 if (dai_link[i].platform_of_node && dai_link[i].cpu_of_node)
7533 continue;
7534
7535 /* populate platform_of_node for snd card dai links */
7536 if (dai_link[i].platform_name &&
7537 !dai_link[i].platform_of_node) {
7538 index = of_property_match_string(cdev->of_node,
7539 "asoc-platform-names",
7540 dai_link[i].platform_name);
7541 if (index < 0) {
7542 pr_err("%s: No match found for platform name: %s\n",
7543 __func__, dai_link[i].platform_name);
7544 ret = index;
7545 goto err;
7546 }
7547 np = of_parse_phandle(cdev->of_node, "asoc-platform",
7548 index);
7549 if (!np) {
7550 pr_err("%s: retrieving phandle for platform %s, index %d failed\n",
7551 __func__, dai_link[i].platform_name,
7552 index);
7553 ret = -ENODEV;
7554 goto err;
7555 }
7556 dai_link[i].platform_of_node = np;
7557 dai_link[i].platform_name = NULL;
7558 }
7559
7560 /* populate cpu_of_node for snd card dai links */
7561 if (dai_link[i].cpu_dai_name && !dai_link[i].cpu_of_node) {
7562 index = of_property_match_string(cdev->of_node,
7563 "asoc-cpu-names",
7564 dai_link[i].cpu_dai_name);
7565 if (index >= 0) {
7566 np = of_parse_phandle(cdev->of_node, "asoc-cpu",
7567 index);
7568 if (!np) {
7569 pr_err("%s: retrieving phandle for cpu dai %s failed\n",
7570 __func__,
7571 dai_link[i].cpu_dai_name);
7572 ret = -ENODEV;
7573 goto err;
7574 }
7575 dai_link[i].cpu_of_node = np;
7576 dai_link[i].cpu_dai_name = NULL;
7577 }
7578 }
7579
7580 /* populate codec_of_node for snd card dai links */
7581 if (dai_link[i].codec_name && !dai_link[i].codec_of_node) {
7582 index = of_property_match_string(cdev->of_node,
7583 "asoc-codec-names",
7584 dai_link[i].codec_name);
7585 if (index < 0)
7586 continue;
7587 np = of_parse_phandle(cdev->of_node, "asoc-codec",
7588 index);
7589 if (!np) {
7590 pr_err("%s: retrieving phandle for codec %s failed\n",
7591 __func__, dai_link[i].codec_name);
7592 ret = -ENODEV;
7593 goto err;
7594 }
7595 dai_link[i].codec_of_node = np;
7596 dai_link[i].codec_name = NULL;
7597 }
7598 }
7599
7600err:
7601 return ret;
7602}
7603
7604static int msm_audrx_stub_init(struct snd_soc_pcm_runtime *rtd)
7605{
7606 int ret = 0;
7607 struct snd_soc_codec *codec = rtd->codec;
7608
7609 ret = snd_soc_add_codec_controls(codec, msm_tavil_snd_controls,
7610 ARRAY_SIZE(msm_tavil_snd_controls));
7611 if (ret < 0) {
7612 dev_err(codec->dev,
7613 "%s: add_codec_controls failed, err = %d\n",
7614 __func__, ret);
7615 return ret;
7616 }
7617
7618 return 0;
7619}
7620
7621static int msm_snd_stub_hw_params(struct snd_pcm_substream *substream,
7622 struct snd_pcm_hw_params *params)
7623{
7624 struct snd_soc_pcm_runtime *rtd = substream->private_data;
7625 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
7626
7627 int ret = 0;
7628 unsigned int rx_ch[] = {144, 145, 146, 147, 148, 149, 150,
7629 151};
7630 unsigned int tx_ch[] = {128, 129, 130, 131, 132, 133,
7631 134, 135, 136, 137, 138, 139,
7632 140, 141, 142, 143};
7633
7634 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
7635 ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
7636 slim_rx_cfg[SLIM_RX_0].channels,
7637 rx_ch);
7638 if (ret < 0)
7639 pr_err("%s: RX failed to set cpu chan map error %d\n",
7640 __func__, ret);
7641 } else {
7642 ret = snd_soc_dai_set_channel_map(cpu_dai,
7643 slim_tx_cfg[SLIM_TX_0].channels,
7644 tx_ch, 0, 0);
7645 if (ret < 0)
7646 pr_err("%s: TX failed to set cpu chan map error %d\n",
7647 __func__, ret);
7648 }
7649
7650 return ret;
7651}
7652
7653static struct snd_soc_ops msm_stub_be_ops = {
7654 .hw_params = msm_snd_stub_hw_params,
7655};
7656
7657static struct snd_soc_dai_link msm_stub_fe_dai_links[] = {
7658
7659 /* FrontEnd DAI Links */
7660 {
7661 .name = "MSMSTUB Media1",
7662 .stream_name = "MultiMedia1",
7663 .cpu_dai_name = "MultiMedia1",
7664 .platform_name = "msm-pcm-dsp.0",
7665 .dynamic = 1,
7666 .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
7667 .dpcm_playback = 1,
7668 .dpcm_capture = 1,
7669 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
7670 SND_SOC_DPCM_TRIGGER_POST},
7671 .codec_dai_name = "snd-soc-dummy-dai",
7672 .codec_name = "snd-soc-dummy",
7673 .ignore_suspend = 1,
7674 /* this dainlink has playback support */
7675 .ignore_pmdown_time = 1,
7676 .id = MSM_FRONTEND_DAI_MULTIMEDIA1
7677 },
7678};
7679
7680static struct snd_soc_dai_link msm_stub_be_dai_links[] = {
7681
7682 /* Backend DAI Links */
7683 {
7684 .name = LPASS_BE_SLIMBUS_0_RX,
7685 .stream_name = "Slimbus Playback",
7686 .cpu_dai_name = "msm-dai-q6-dev.16384",
7687 .platform_name = "msm-pcm-routing",
7688 .codec_name = "msm-stub-codec.1",
7689 .codec_dai_name = "msm-stub-rx",
7690 .no_pcm = 1,
7691 .dpcm_playback = 1,
7692 .id = MSM_BACKEND_DAI_SLIMBUS_0_RX,
7693 .init = &msm_audrx_stub_init,
7694 .be_hw_params_fixup = msm_be_hw_params_fixup,
7695 .ignore_pmdown_time = 1, /* dai link has playback support */
7696 .ignore_suspend = 1,
7697 .ops = &msm_stub_be_ops,
7698 },
7699 {
7700 .name = LPASS_BE_SLIMBUS_0_TX,
7701 .stream_name = "Slimbus Capture",
7702 .cpu_dai_name = "msm-dai-q6-dev.16385",
7703 .platform_name = "msm-pcm-routing",
7704 .codec_name = "msm-stub-codec.1",
7705 .codec_dai_name = "msm-stub-tx",
7706 .no_pcm = 1,
7707 .dpcm_capture = 1,
7708 .id = MSM_BACKEND_DAI_SLIMBUS_0_TX,
7709 .be_hw_params_fixup = msm_be_hw_params_fixup,
7710 .ignore_suspend = 1,
7711 .ops = &msm_stub_be_ops,
7712 },
7713};
7714
7715static struct snd_soc_dai_link msm_stub_dai_links[
7716 ARRAY_SIZE(msm_stub_fe_dai_links) +
7717 ARRAY_SIZE(msm_stub_be_dai_links)];
7718
7719struct snd_soc_card snd_soc_card_stub_msm = {
7720 .name = "sm6150-stub-snd-card",
7721};
7722
7723static const struct of_device_id sm6150_asoc_machine_of_match[] = {
7724 { .compatible = "qcom,sm6150-asoc-snd",
7725 .data = "codec"},
7726 { .compatible = "qcom,sm6150-asoc-snd-stub",
7727 .data = "stub_codec"},
7728 {},
7729};
7730
7731static struct snd_soc_card *populate_snd_card_dailinks(struct device *dev)
7732{
7733 struct snd_soc_card *card = NULL;
7734 struct snd_soc_dai_link *dailink;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]7735 int total_links = 0, rc = 0;
7736 u32 tavil_codec = 0, auxpcm_audio_intf = 0;
7737 u32 mi2s_audio_intf = 0, ext_disp_audio_intf = 0;
7738 u32 wcn_btfm_intf = 0;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7739 const struct of_device_id *match;
7740
7741 match = of_match_node(sm6150_asoc_machine_of_match, dev->of_node);
7742 if (!match) {
7743 dev_err(dev, "%s: No DT match found for sound card\n",
7744 __func__);
7745 return NULL;
7746 }
7747
7748 if (!strcmp(match->data, "codec")) {
7749 card = &snd_soc_card_sm6150_msm;
7750 memcpy(msm_sm6150_dai_links + total_links,
7751 msm_common_dai_links,
7752 sizeof(msm_common_dai_links));
7753
7754 total_links += ARRAY_SIZE(msm_common_dai_links);
7755
7756 memcpy(msm_sm6150_dai_links + total_links,
7757 msm_common_misc_fe_dai_links,
7758 sizeof(msm_common_misc_fe_dai_links));
7759
7760 total_links += ARRAY_SIZE(msm_common_misc_fe_dai_links);
7761
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]7762 rc = of_property_read_u32(dev->of_node, "qcom,tavil_codec",
7763 &tavil_codec);
7764 if (rc) {
7765 dev_dbg(dev, "%s: No DT match for tavil codec\n",
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7766 __func__);
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]7767 } else {
7768 if (tavil_codec) {
7769 card->late_probe =
7770 msm_snd_card_tavil_late_probe;
7771 memcpy(msm_sm6150_dai_links + total_links,
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7772 msm_tavil_fe_dai_links,
7773 sizeof(msm_tavil_fe_dai_links));
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]7774 total_links +=
7775 ARRAY_SIZE(msm_tavil_fe_dai_links);
7776 }
7777 }
7778
7779 if (!tavil_codec) {
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7780 memcpy(msm_sm6150_dai_links + total_links,
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]7781 msm_bolero_fe_dai_links,
7782 sizeof(msm_bolero_fe_dai_links));
7783 total_links +=
7784 ARRAY_SIZE(msm_bolero_fe_dai_links);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7785 }
7786
7787 memcpy(msm_sm6150_dai_links + total_links,
7788 msm_common_be_dai_links,
7789 sizeof(msm_common_be_dai_links));
7790
7791 total_links += ARRAY_SIZE(msm_common_be_dai_links);
7792
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]7793 if (tavil_codec) {
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7794 memcpy(msm_sm6150_dai_links + total_links,
7795 msm_tavil_be_dai_links,
7796 sizeof(msm_tavil_be_dai_links));
7797 total_links += ARRAY_SIZE(msm_tavil_be_dai_links);
7798 } else {
7799 memcpy(msm_sm6150_dai_links + total_links,
7800 msm_wsa_cdc_dma_be_dai_links,
7801 sizeof(msm_wsa_cdc_dma_be_dai_links));
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]7802 total_links +=
7803 ARRAY_SIZE(msm_wsa_cdc_dma_be_dai_links);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7804
7805 memcpy(msm_sm6150_dai_links + total_links,
7806 msm_rx_tx_cdc_dma_be_dai_links,
7807 sizeof(msm_rx_tx_cdc_dma_be_dai_links));
7808 total_links +=
7809 ARRAY_SIZE(msm_rx_tx_cdc_dma_be_dai_links);
7810 }
7811
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]7812 rc = of_property_read_u32(dev->of_node,
7813 "qcom,ext-disp-audio-rx",
7814 &ext_disp_audio_intf);
7815 if (rc) {
7816 dev_dbg(dev, "%s: No DT match Ext Disp interface\n",
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7817 __func__);
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]7818 } else {
7819 if (auxpcm_audio_intf) {
7820 memcpy(msm_sm6150_dai_links + total_links,
7821 ext_disp_be_dai_link,
7822 sizeof(ext_disp_be_dai_link));
7823 total_links +=
7824 ARRAY_SIZE(ext_disp_be_dai_link);
7825 }
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7826 }
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]7827
7828 rc = of_property_read_u32(dev->of_node, "qcom,mi2s-audio-intf",
7829 &mi2s_audio_intf);
7830 if (rc) {
7831 dev_dbg(dev, "%s: No DT match MI2S audio interface\n",
7832 __func__);
7833 } else {
7834 if (mi2s_audio_intf) {
7835 memcpy(msm_sm6150_dai_links + total_links,
7836 msm_mi2s_be_dai_links,
7837 sizeof(msm_mi2s_be_dai_links));
7838 total_links +=
7839 ARRAY_SIZE(msm_mi2s_be_dai_links);
7840 }
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7841 }
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]7842
7843
7844 rc = of_property_read_u32(dev->of_node, "qcom,wcn-btfm",
7845 &wcn_btfm_intf);
7846 if (rc) {
7847 dev_dbg(dev, "%s: No DT match wcn btfm interface\n",
7848 __func__);
7849 } else {
7850 if (wcn_btfm_intf) {
7851 memcpy(msm_sm6150_dai_links + total_links,
7852 msm_wcn_be_dai_links,
7853 sizeof(msm_wcn_be_dai_links));
7854 total_links +=
7855 ARRAY_SIZE(msm_wcn_be_dai_links);
7856 }
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7857 }
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]7858
7859 rc = of_property_read_u32(dev->of_node,
7860 "qcom,auxpcm-audio-intf",
7861 &auxpcm_audio_intf);
7862 if (rc) {
7863 dev_dbg(dev, "%s: No DT match Aux PCM interface\n",
7864 __func__);
7865 } else {
7866 if (auxpcm_audio_intf) {
7867 memcpy(msm_sm6150_dai_links + total_links,
7868 msm_auxpcm_be_dai_links,
7869 sizeof(msm_auxpcm_be_dai_links));
7870 total_links +=
7871 ARRAY_SIZE(msm_auxpcm_be_dai_links);
7872 }
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7873 }
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]7874
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7875 dailink = msm_sm6150_dai_links;
7876 } else if (!strcmp(match->data, "stub_codec")) {
7877 card = &snd_soc_card_stub_msm;
7878
7879 memcpy(msm_stub_dai_links + total_links,
7880 msm_stub_fe_dai_links,
7881 sizeof(msm_stub_fe_dai_links));
7882 total_links += ARRAY_SIZE(msm_stub_fe_dai_links);
7883
7884 memcpy(msm_stub_dai_links + total_links,
7885 msm_stub_be_dai_links,
7886 sizeof(msm_stub_be_dai_links));
7887 total_links += ARRAY_SIZE(msm_stub_be_dai_links);
7888
7889 dailink = msm_stub_dai_links;
7890 }
7891
7892 if (card) {
7893 card->dai_link = dailink;
7894 card->num_links = total_links;
7895 }
7896
7897 return card;
7898}
7899
7900static int msm_wsa881x_init(struct snd_soc_component *component)
7901{
7902 u8 spkleft_ports[WSA881X_MAX_SWR_PORTS] = {0, 1, 2, 3};
7903 u8 spkright_ports[WSA881X_MAX_SWR_PORTS] = {0, 1, 2, 3};
7904 u8 spkleft_port_types[WSA881X_MAX_SWR_PORTS] = {SPKR_L, SPKR_L_COMP,
7905 SPKR_L_BOOST, SPKR_L_VI};
7906 u8 spkright_port_types[WSA881X_MAX_SWR_PORTS] = {SPKR_R, SPKR_R_COMP,
7907 SPKR_R_BOOST, SPKR_R_VI};
7908 unsigned int ch_rate[WSA881X_MAX_SWR_PORTS] = {2400, 600, 300, 1200};
7909 unsigned int ch_mask[WSA881X_MAX_SWR_PORTS] = {0x1, 0xF, 0x3, 0x3};
7910 struct snd_soc_codec *codec = snd_soc_component_to_codec(component);
7911 struct msm_asoc_mach_data *pdata;
7912 struct snd_soc_dapm_context *dapm;
7913 int ret = 0;
7914
7915 if (!codec) {
7916 pr_err("%s codec is NULL\n", __func__);
7917 return -EINVAL;
7918 }
7919
7920 dapm = snd_soc_codec_get_dapm(codec);
7921
7922 if (!strcmp(component->name_prefix, "SpkrLeft")) {
7923 dev_dbg(codec->dev, "%s: setting left ch map to codec %s\n",
7924 __func__, codec->component.name);
7925 wsa881x_set_channel_map(codec, &spkleft_ports[0],
7926 WSA881X_MAX_SWR_PORTS, &ch_mask[0],
7927 &ch_rate[0], &spkleft_port_types[0]);
7928 if (dapm->component) {
7929 snd_soc_dapm_ignore_suspend(dapm, "SpkrLeft IN");
7930 snd_soc_dapm_ignore_suspend(dapm, "SpkrLeft SPKR");
7931 }
7932 } else if (!strcmp(component->name_prefix, "SpkrRight")) {
7933 dev_dbg(codec->dev, "%s: setting right ch map to codec %s\n",
7934 __func__, codec->component.name);
7935 wsa881x_set_channel_map(codec, &spkright_ports[0],
7936 WSA881X_MAX_SWR_PORTS, &ch_mask[0],
7937 &ch_rate[0], &spkright_port_types[0]);
7938 if (dapm->component) {
7939 snd_soc_dapm_ignore_suspend(dapm, "SpkrRight IN");
7940 snd_soc_dapm_ignore_suspend(dapm, "SpkrRight SPKR");
7941 }
7942 } else {
7943 dev_err(codec->dev, "%s: wrong codec name %s\n", __func__,
7944 codec->component.name);
7945 ret = -EINVAL;
7946 goto err;
7947 }
7948 pdata = snd_soc_card_get_drvdata(component->card);
7949 if (pdata && pdata->codec_root)
7950 wsa881x_codec_info_create_codec_entry(pdata->codec_root,
7951 codec);
7952
7953err:
7954 return ret;
7955}
7956
7957static int msm_aux_codec_init(struct snd_soc_component *component)
7958{
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]7959 struct snd_soc_codec *codec = snd_soc_component_to_codec(component);
7960 struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
7961
7962 snd_soc_dapm_ignore_suspend(dapm, "EAR");
7963 snd_soc_dapm_ignore_suspend(dapm, "AUX");
7964 snd_soc_dapm_ignore_suspend(dapm, "HPHL");
7965 snd_soc_dapm_ignore_suspend(dapm, "HPHR");
7966 snd_soc_dapm_ignore_suspend(dapm, "AMIC1");
7967 snd_soc_dapm_ignore_suspend(dapm, "AMIC2");
7968 snd_soc_dapm_ignore_suspend(dapm, "AMIC3");
7969 snd_soc_dapm_ignore_suspend(dapm, "AMIC4");
7970 snd_soc_dapm_sync(dapm);
7971
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7972 return 0;
7973}
7974
7975static int msm_init_aux_dev(struct platform_device *pdev,
7976 struct snd_soc_card *card)
7977{
7978 struct device_node *wsa_of_node;
7979 struct device_node *aux_codec_of_node;
7980 u32 wsa_max_devs;
7981 u32 wsa_dev_cnt;
7982 u32 codec_aux_dev_cnt = 0;
7983 int i;
7984 struct msm_wsa881x_dev_info *wsa881x_dev_info;
7985 struct aux_codec_dev_info *aux_cdc_dev_info;
7986 const char *auxdev_name_prefix[1];
7987 char *dev_name_str = NULL;
7988 int found = 0;
7989 int codecs_found = 0;
7990 int ret = 0;
7991
7992 /* Get maximum WSA device count for this platform */
7993 ret = of_property_read_u32(pdev->dev.of_node,
7994 "qcom,wsa-max-devs", &wsa_max_devs);
7995 if (ret) {
7996 dev_info(&pdev->dev,
7997 "%s: wsa-max-devs property missing in DT %s, ret = %d\n",
7998 __func__, pdev->dev.of_node->full_name, ret);
7999 wsa_max_devs = 0;
8000 goto codec_aux_dev;
8001 }
8002 if (wsa_max_devs == 0) {
8003 dev_warn(&pdev->dev,
8004 "%s: Max WSA devices is 0 for this target?\n",
8005 __func__);
8006 goto codec_aux_dev;
8007 }
8008
8009 /* Get count of WSA device phandles for this platform */
8010 wsa_dev_cnt = of_count_phandle_with_args(pdev->dev.of_node,
8011 "qcom,wsa-devs", NULL);
8012 if (wsa_dev_cnt == -ENOENT) {
8013 dev_warn(&pdev->dev, "%s: No wsa device defined in DT.\n",
8014 __func__);
8015 goto err;
8016 } else if (wsa_dev_cnt <= 0) {
8017 dev_err(&pdev->dev,
8018 "%s: Error reading wsa device from DT. wsa_dev_cnt = %d\n",
8019 __func__, wsa_dev_cnt);
8020 ret = -EINVAL;
8021 goto err;
8022 }
8023
8024 /*
8025 * Expect total phandles count to be NOT less than maximum possible
8026 * WSA count. However, if it is less, then assign same value to
8027 * max count as well.
8028 */
8029 if (wsa_dev_cnt < wsa_max_devs) {
8030 dev_dbg(&pdev->dev,
8031 "%s: wsa_max_devs = %d cannot exceed wsa_dev_cnt = %d\n",
8032 __func__, wsa_max_devs, wsa_dev_cnt);
8033 wsa_max_devs = wsa_dev_cnt;
8034 }
8035
8036 /* Make sure prefix string passed for each WSA device */
8037 ret = of_property_count_strings(pdev->dev.of_node,
8038 "qcom,wsa-aux-dev-prefix");
8039 if (ret != wsa_dev_cnt) {
8040 dev_err(&pdev->dev,
8041 "%s: expecting %d wsa prefix. Defined only %d in DT\n",
8042 __func__, wsa_dev_cnt, ret);
8043 ret = -EINVAL;
8044 goto err;
8045 }
8046
8047 /*
8048 * Alloc mem to store phandle and index info of WSA device, if already
8049 * registered with ALSA core
8050 */
8051 wsa881x_dev_info = devm_kcalloc(&pdev->dev, wsa_max_devs,
8052 sizeof(struct msm_wsa881x_dev_info),
8053 GFP_KERNEL);
8054 if (!wsa881x_dev_info) {
8055 ret = -ENOMEM;
8056 goto err;
8057 }
8058
8059 /*
8060 * search and check whether all WSA devices are already
8061 * registered with ALSA core or not. If found a node, store
8062 * the node and the index in a local array of struct for later
8063 * use.
8064 */
8065 for (i = 0; i < wsa_dev_cnt; i++) {
8066 wsa_of_node = of_parse_phandle(pdev->dev.of_node,
8067 "qcom,wsa-devs", i);
8068 if (unlikely(!wsa_of_node)) {
8069 /* we should not be here */
8070 dev_err(&pdev->dev,
8071 "%s: wsa dev node is not present\n",
8072 __func__);
8073 ret = -EINVAL;
8074 goto err;
8075 }
8076 if (soc_find_component(wsa_of_node, NULL)) {
8077 /* WSA device registered with ALSA core */
8078 wsa881x_dev_info[found].of_node = wsa_of_node;
8079 wsa881x_dev_info[found].index = i;
8080 found++;
8081 if (found == wsa_max_devs)
8082 break;
8083 }
8084 }
8085
8086 if (found < wsa_max_devs) {
8087 dev_dbg(&pdev->dev,
8088 "%s: failed to find %d components. Found only %d\n",
8089 __func__, wsa_max_devs, found);
8090 return -EPROBE_DEFER;
8091 }
8092 dev_info(&pdev->dev,
8093 "%s: found %d wsa881x devices registered with ALSA core\n",
8094 __func__, found);
8095
8096codec_aux_dev:
8097 if (strcmp(card->name, "sm6150-tavil-snd-card")) {
8098 /* Get count of aux codec device phandles for this platform */
8099 codec_aux_dev_cnt = of_count_phandle_with_args(
8100 pdev->dev.of_node,
8101 "qcom,codec-aux-devs", NULL);
8102 if (codec_aux_dev_cnt == -ENOENT) {
8103 dev_warn(&pdev->dev, "%s: No aux codec defined in DT.\n",
8104 __func__);
8105 goto err;
8106 } else if (codec_aux_dev_cnt <= 0) {
8107 dev_err(&pdev->dev,
8108 "%s: Error reading aux codec device from DT, dev_cnt=%d\n",
8109 __func__, codec_aux_dev_cnt);
8110 ret = -EINVAL;
8111 goto err;
8112 }
8113
8114 /*
8115 * Alloc mem to store phandle and index info of aux codec
8116 * if already registered with ALSA core
8117 */
8118 aux_cdc_dev_info = devm_kcalloc(&pdev->dev, codec_aux_dev_cnt,
8119 sizeof(struct aux_codec_dev_info),
8120 GFP_KERNEL);
8121 if (!aux_cdc_dev_info) {
8122 ret = -ENOMEM;
8123 goto err;
8124 }
8125
8126 /*
8127 * search and check whether all aux codecs are already
8128 * registered with ALSA core or not. If found a node, store
8129 * the node and the index in a local array of struct for later
8130 * use.
8131 */
8132 for (i = 0; i < codec_aux_dev_cnt; i++) {
8133 aux_codec_of_node = of_parse_phandle(pdev->dev.of_node,
8134 "qcom,codec-aux-devs", i);
8135 if (unlikely(!aux_codec_of_node)) {
8136 /* we should not be here */
8137 dev_err(&pdev->dev,
8138 "%s: aux codec dev node is not present\n",
8139 __func__);
8140 ret = -EINVAL;
8141 goto err;
8142 }
8143 if (soc_find_component(aux_codec_of_node, NULL)) {
8144 /* AUX codec registered with ALSA core */
8145 aux_cdc_dev_info[codecs_found].of_node =
8146 aux_codec_of_node;
8147 aux_cdc_dev_info[codecs_found].index = i;
8148 codecs_found++;
8149 }
8150 }
8151
8152 if (codecs_found < codec_aux_dev_cnt) {
8153 dev_dbg(&pdev->dev,
8154 "%s: failed to find %d components. Found only %d\n",
8155 __func__, codec_aux_dev_cnt, codecs_found);
8156 return -EPROBE_DEFER;
8157 }
8158 dev_info(&pdev->dev,
8159 "%s: found %d AUX codecs registered with ALSA core\n",
8160 __func__, codecs_found);
8161
8162 }
8163
8164 card->num_aux_devs = wsa_max_devs + codec_aux_dev_cnt;
8165 card->num_configs = wsa_max_devs + codec_aux_dev_cnt;
8166
8167 /* Alloc array of AUX devs struct */
8168 msm_aux_dev = devm_kcalloc(&pdev->dev, card->num_aux_devs,
8169 sizeof(struct snd_soc_aux_dev),
8170 GFP_KERNEL);
8171 if (!msm_aux_dev) {
8172 ret = -ENOMEM;
8173 goto err;
8174 }
8175
8176 /* Alloc array of codec conf struct */
8177 msm_codec_conf = devm_kcalloc(&pdev->dev, card->num_configs,
8178 sizeof(struct snd_soc_codec_conf),
8179 GFP_KERNEL);
8180 if (!msm_codec_conf) {
8181 ret = -ENOMEM;
8182 goto err;
8183 }
8184
8185 for (i = 0; i < wsa_max_devs; i++) {
8186 dev_name_str = devm_kzalloc(&pdev->dev, DEV_NAME_STR_LEN,
8187 GFP_KERNEL);
8188 if (!dev_name_str) {
8189 ret = -ENOMEM;
8190 goto err;
8191 }
8192
8193 ret = of_property_read_string_index(pdev->dev.of_node,
8194 "qcom,wsa-aux-dev-prefix",
8195 wsa881x_dev_info[i].index,
8196 auxdev_name_prefix);
8197 if (ret) {
8198 dev_err(&pdev->dev,
8199 "%s: failed to read wsa aux dev prefix, ret = %d\n",
8200 __func__, ret);
8201 ret = -EINVAL;
8202 goto err;
8203 }
8204
8205 snprintf(dev_name_str, strlen("wsa881x.%d"), "wsa881x.%d", i);
8206 msm_aux_dev[i].name = dev_name_str;
8207 msm_aux_dev[i].codec_name = NULL;
8208 msm_aux_dev[i].codec_of_node =
8209 wsa881x_dev_info[i].of_node;
8210 msm_aux_dev[i].init = msm_wsa881x_init;
8211 msm_codec_conf[i].dev_name = NULL;
8212 msm_codec_conf[i].name_prefix = auxdev_name_prefix[0];
8213 msm_codec_conf[i].of_node =
8214 wsa881x_dev_info[i].of_node;
8215 }
8216
8217 for (i = 0; i < codec_aux_dev_cnt; i++) {
8218 msm_aux_dev[wsa_max_devs + i].name = NULL;
8219 msm_aux_dev[wsa_max_devs + i].codec_name = NULL;
8220 msm_aux_dev[wsa_max_devs + i].codec_of_node =
8221 aux_cdc_dev_info[i].of_node;
8222 msm_aux_dev[wsa_max_devs + i].init = msm_aux_codec_init;
8223 msm_codec_conf[wsa_max_devs + i].dev_name = NULL;
8224 msm_codec_conf[wsa_max_devs + i].name_prefix =
8225 NULL;
8226 msm_codec_conf[wsa_max_devs + i].of_node =
8227 aux_cdc_dev_info[i].of_node;
8228 }
8229
8230 card->codec_conf = msm_codec_conf;
8231 card->aux_dev = msm_aux_dev;
8232err:
8233 return ret;
8234}
8235
8236static void msm_i2s_auxpcm_init(struct platform_device *pdev)
8237{
8238 int count;
8239 u32 mi2s_master_slave[MI2S_MAX];
8240 int ret;
8241
8242 for (count = 0; count < MI2S_MAX; count++) {
8243 mutex_init(&mi2s_intf_conf[count].lock);
8244 mi2s_intf_conf[count].ref_cnt = 0;
8245 }
8246
8247 ret = of_property_read_u32_array(pdev->dev.of_node,
8248 "qcom,msm-mi2s-master",
8249 mi2s_master_slave, MI2S_MAX);
8250 if (ret) {
8251 dev_dbg(&pdev->dev, "%s: no qcom,msm-mi2s-master in DT node\n",
8252 __func__);
8253 } else {
8254 for (count = 0; count < MI2S_MAX; count++) {
8255 mi2s_intf_conf[count].msm_is_mi2s_master =
8256 mi2s_master_slave[count];
8257 }
8258 }
8259}
8260
8261static void msm_i2s_auxpcm_deinit(void)
8262{
8263 int count;
8264
8265 for (count = 0; count < MI2S_MAX; count++) {
8266 mutex_destroy(&mi2s_intf_conf[count].lock);
8267 mi2s_intf_conf[count].ref_cnt = 0;
8268 mi2s_intf_conf[count].msm_is_mi2s_master = 0;
8269 }
8270}
8271static int msm_asoc_machine_probe(struct platform_device *pdev)
8272{
8273 struct snd_soc_card *card;
8274 struct msm_asoc_mach_data *pdata;
8275 const char *mbhc_audio_jack_type = NULL;
8276 int ret;
8277
8278 if (!pdev->dev.of_node) {
8279 dev_err(&pdev->dev, "No platform supplied from device tree\n");
8280 return -EINVAL;
8281 }
8282
8283 pdata = devm_kzalloc(&pdev->dev,
8284 sizeof(struct msm_asoc_mach_data), GFP_KERNEL);
8285 if (!pdata)
8286 return -ENOMEM;
8287
8288 card = populate_snd_card_dailinks(&pdev->dev);
8289 if (!card) {
8290 dev_err(&pdev->dev, "%s: Card uninitialized\n", __func__);
8291 ret = -EINVAL;
8292 goto err;
8293 }
8294 card->dev = &pdev->dev;
8295 platform_set_drvdata(pdev, card);
8296 snd_soc_card_set_drvdata(card, pdata);
8297
8298 ret = snd_soc_of_parse_card_name(card, "qcom,model");
8299 if (ret) {
8300 dev_err(&pdev->dev, "parse card name failed, err:%d\n",
8301 ret);
8302 goto err;
8303 }
8304
8305 ret = snd_soc_of_parse_audio_routing(card, "qcom,audio-routing");
8306 if (ret) {
8307 dev_err(&pdev->dev, "parse audio routing failed, err:%d\n",
8308 ret);
8309 goto err;
8310 }
8311
8312 ret = msm_populate_dai_link_component_of_node(card);
8313 if (ret) {
8314 ret = -EPROBE_DEFER;
8315 goto err;
8316 }
8317
8318 ret = msm_init_aux_dev(pdev, card);
8319 if (ret)
8320 goto err;
8321
8322 ret = devm_snd_soc_register_card(&pdev->dev, card);
8323 if (ret == -EPROBE_DEFER) {
8324 if (codec_reg_done)
8325 ret = -EINVAL;
8326 goto err;
8327 } else if (ret) {
8328 dev_err(&pdev->dev, "snd_soc_register_card failed (%d)\n",
8329 ret);
8330 goto err;
8331 }
8332 dev_info(&pdev->dev, "Sound card %s registered\n", card->name);
8333 spdev = pdev;
8334
8335 pdata->hph_en1_gpio_p = of_parse_phandle(pdev->dev.of_node,
8336 "qcom,hph-en1-gpio", 0);
8337 if (!pdata->hph_en1_gpio_p) {
8338 dev_dbg(&pdev->dev, "property %s not detected in node %s\n",
8339 "qcom,hph-en1-gpio",
8340 pdev->dev.of_node->full_name);
8341 }
8342
8343 pdata->hph_en0_gpio_p = of_parse_phandle(pdev->dev.of_node,
8344 "qcom,hph-en0-gpio", 0);
8345 if (!pdata->hph_en0_gpio_p) {
8346 dev_dbg(&pdev->dev, "property %s not detected in node %s\n",
8347 "qcom,hph-en0-gpio",
8348 pdev->dev.of_node->full_name);
8349 }
8350
8351 ret = of_property_read_string(pdev->dev.of_node,
8352 "qcom,mbhc-audio-jack-type", &mbhc_audio_jack_type);
8353 if (ret) {
8354 dev_dbg(&pdev->dev, "Looking up %s property in node %s failed\n",
8355 "qcom,mbhc-audio-jack-type",
8356 pdev->dev.of_node->full_name);
8357 dev_dbg(&pdev->dev, "Jack type properties set to default\n");
8358 } else {
8359 if (!strcmp(mbhc_audio_jack_type, "4-pole-jack")) {
8360 wcd_mbhc_cfg.enable_anc_mic_detect = false;
8361 dev_dbg(&pdev->dev, "This hardware has 4 pole jack");
8362 } else if (!strcmp(mbhc_audio_jack_type, "5-pole-jack")) {
8363 wcd_mbhc_cfg.enable_anc_mic_detect = true;
8364 dev_dbg(&pdev->dev, "This hardware has 5 pole jack");
8365 } else if (!strcmp(mbhc_audio_jack_type, "6-pole-jack")) {
8366 wcd_mbhc_cfg.enable_anc_mic_detect = true;
8367 dev_dbg(&pdev->dev, "This hardware has 6 pole jack");
8368 } else {
8369 wcd_mbhc_cfg.enable_anc_mic_detect = false;
8370 dev_dbg(&pdev->dev, "Unknown value, set to default\n");
8371 }
8372 }
8373 /*
8374 * Parse US-Euro gpio info from DT. Report no error if us-euro
8375 * entry is not found in DT file as some targets do not support
8376 * US-Euro detection
8377 */
8378 pdata->us_euro_gpio_p = of_parse_phandle(pdev->dev.of_node,
8379 "qcom,us-euro-gpios", 0);
8380 if (!pdata->us_euro_gpio_p) {
8381 dev_dbg(&pdev->dev, "property %s not detected in node %s",
8382 "qcom,us-euro-gpios", pdev->dev.of_node->full_name);
8383 } else {
8384 dev_dbg(&pdev->dev, "%s detected\n",
8385 "qcom,us-euro-gpios");
8386 wcd_mbhc_cfg.swap_gnd_mic = msm_swap_gnd_mic;
8387 }
8388 /* Parse pinctrl info from devicetree */
8389 ret = msm_get_pinctrl(pdev);
8390 if (!ret) {
8391 pr_debug("%s: pinctrl parsing successful\n", __func__);
8392 } else {
8393 dev_dbg(&pdev->dev,
8394 "%s: Parsing pinctrl failed with %d. Cannot use Ports\n",
8395 __func__, ret);
8396 ret = 0;
8397 }
8398
8399 msm_i2s_auxpcm_init(pdev);
8400 if (!strcmp(card->name, "sm6150-tavil-snd-card")) {
8401 is_initial_boot = true;
8402 ret = audio_notifier_register("sm6150",
8403 AUDIO_NOTIFIER_ADSP_DOMAIN,
8404 &service_nb);
8405 if (ret < 0)
8406 pr_err("%s: Audio notifier register failed ret = %d\n",
8407 __func__, ret);
8408 } else {
8409 pdata->dmic01_gpio_p = of_parse_phandle(pdev->dev.of_node,
8410 "qcom,cdc-dmic01-gpios",
8411 0);
8412 pdata->dmic23_gpio_p = of_parse_phandle(pdev->dev.of_node,
8413 "qcom,cdc-dmic23-gpios",
8414 0);
8415 }
8416err:
8417 return ret;
8418}
8419
8420static int msm_asoc_machine_remove(struct platform_device *pdev)
8421{
8422 audio_notifier_deregister("sm6150");
8423 msm_i2s_auxpcm_deinit();
8424
8425 return 0;
8426}
8427
8428static struct platform_driver sm6150_asoc_machine_driver = {
8429 .driver = {
8430 .name = DRV_NAME,
8431 .owner = THIS_MODULE,
8432 .pm = &snd_soc_pm_ops,
8433 .of_match_table = sm6150_asoc_machine_of_match,
8434 },
8435 .probe = msm_asoc_machine_probe,
8436 .remove = msm_asoc_machine_remove,
8437};
8438module_platform_driver(sm6150_asoc_machine_driver);
8439
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]8440MODULE_DESCRIPTION("ALSA SoC SM6150 Machine driver");
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8441MODULE_LICENSE("GPL v2");
8442MODULE_ALIAS("platform:" DRV_NAME);
8443MODULE_DEVICE_TABLE(of, sm6150_asoc_machine_of_match);