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Iliyan Malchev202a77d2012-06-11 14:41:12 -07001/*
Ramkumar Radhakrishnandb89d1f2016-03-07 20:15:52 -08002 * Copyright (c) 2011 - 2016, The Linux Foundation. All rights reserved.
Iliyan Malchev202a77d2012-06-11 14:41:12 -07003
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions are
6 * met:
7 * * Redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer.
9 * * Redistributions in binary form must reproduce the above
10 * copyright notice, this list of conditions and the following
11 * disclaimer in the documentation and/or other materials provided
12 * with the distribution.
Duy Truong73d36df2013-02-09 20:33:23 -080013 * * Neither the name of The Linux Foundation nor the names of its
Iliyan Malchev202a77d2012-06-11 14:41:12 -070014 * contributors may be used to endorse or promote products derived
15 * from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
18 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
19 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT
20 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
21 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
22 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
23 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
24 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
25 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
26 * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
27 * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 */
29
30#include <cutils/log.h>
Iliyan Malchev202a77d2012-06-11 14:41:12 -070031#include <fcntl.h>
Naomi Luis01f5c8e2013-02-11 12:46:24 -080032#include <dlfcn.h>
Iliyan Malchev202a77d2012-06-11 14:41:12 -070033#include "gralloc_priv.h"
34#include "alloc_controller.h"
35#include "memalloc.h"
36#include "ionalloc.h"
Iliyan Malchev202a77d2012-06-11 14:41:12 -070037#include "gr.h"
Ramkumar Radhakrishnan29a36a52015-06-16 20:22:42 -070038#include "qd_utils.h"
Kaushik Kanetkar071aca62015-01-22 23:16:26 -070039#include <qdMetaData.h>
Ramkumar Radhakrishnan29a36a52015-06-16 20:22:42 -070040#include <utils/Singleton.h>
41#include <utils/Mutex.h>
42
Iliyan Malchev202a77d2012-06-11 14:41:12 -070043
Sushil Chauhanc6bd6d92012-12-12 12:33:01 -080044#ifdef VENUS_COLOR_FORMAT
45#include <media/msm_media_info.h>
46#else
47#define VENUS_Y_STRIDE(args...) 0
48#define VENUS_Y_SCANLINES(args...) 0
49#define VENUS_BUFFER_SIZE(args...) 0
50#endif
51
Naseer Ahmed63326f42013-12-18 02:45:48 -050052#define ASTC_BLOCK_SIZE 16
Naseer Ahmed63326f42013-12-18 02:45:48 -050053
Shalaj Jain3c490412015-04-22 16:52:03 -070054#ifndef ION_FLAG_CP_PIXEL
Shalaj Jain1f9725a2015-03-04 17:53:49 -080055#define ION_FLAG_CP_PIXEL 0
Shalaj Jain1f9725a2015-03-04 17:53:49 -080056#endif
57
58#ifndef ION_FLAG_ALLOW_NON_CONTIG
59#define ION_FLAG_ALLOW_NON_CONTIG 0
60#endif
61
Shalaj Jain3c490412015-04-22 16:52:03 -070062#ifdef MASTER_SIDE_CP
63#define CP_HEAP_ID ION_SECURE_HEAP_ID
Arun Kumar K.R7f0b24b2015-07-05 21:20:57 -070064#define SD_HEAP_ID ION_SECURE_DISPLAY_HEAP_ID
Shalaj Jain3c490412015-04-22 16:52:03 -070065#define ION_CP_FLAGS (ION_SECURE | ION_FLAG_CP_PIXEL)
Arun Kumar K.R7f0b24b2015-07-05 21:20:57 -070066#define ION_SD_FLAGS (ION_SECURE | ION_FLAG_CP_SEC_DISPLAY)
Shalaj Jain3c490412015-04-22 16:52:03 -070067#else // SLAVE_SIDE_CP
68#define CP_HEAP_ID ION_CP_MM_HEAP_ID
69#define SD_HEAP_ID CP_HEAP_ID
70#define ION_CP_FLAGS (ION_SECURE | ION_FLAG_ALLOW_NON_CONTIG)
71#define ION_SD_FLAGS ION_SECURE
72#endif
73
Iliyan Malchev202a77d2012-06-11 14:41:12 -070074using namespace gralloc;
Naseer Ahmeda87da602012-07-01 23:54:19 -070075using namespace qdutils;
Ramkumar Radhakrishnan29a36a52015-06-16 20:22:42 -070076using namespace android;
Iliyan Malchev202a77d2012-06-11 14:41:12 -070077
Naomi Luisa44100c2013-02-08 12:42:03 -080078ANDROID_SINGLETON_STATIC_INSTANCE(AdrenoMemInfo);
Ramakant Singhc85ccee2016-04-01 15:25:17 +053079ANDROID_SINGLETON_STATIC_INSTANCE(MDPCapabilityInfo);
Naomi Luisa44100c2013-02-08 12:42:03 -080080
Ramkumar Radhakrishnandb89d1f2016-03-07 20:15:52 -080081static void getYuvUBwcWidthHeight(int, int, int, int&, int&);
Sushil Chauhan65e26302015-01-14 10:48:57 -080082static unsigned int getUBwcSize(int, int, int, const int, const int);
83
Iliyan Malchev202a77d2012-06-11 14:41:12 -070084//Common functions
Iliyan Malchev202a77d2012-06-11 14:41:12 -070085
Saurabh Shah1adcafe2014-12-19 10:05:41 -080086/* The default policy is to return cached buffers unless the client explicity
87 * sets the PRIVATE_UNCACHED flag or indicates that the buffer will be rarely
88 * read or written in software. Any combination with a _RARELY_ flag will be
89 * treated as uncached. */
90static bool useUncached(const int& usage) {
91 if((usage & GRALLOC_USAGE_PRIVATE_UNCACHED) or
92 ((usage & GRALLOC_USAGE_SW_WRITE_MASK) ==
93 GRALLOC_USAGE_SW_WRITE_RARELY) or
94 ((usage & GRALLOC_USAGE_SW_READ_MASK) ==
95 GRALLOC_USAGE_SW_READ_RARELY))
96 return true;
97
98 return false;
99}
100
Ramakant Singhc85ccee2016-04-01 15:25:17 +0530101//------------- MDPCapabilityInfo-----------------------//
102MDPCapabilityInfo :: MDPCapabilityInfo() {
103 isMacroTileSupported = false;
104 qdutils::querySDEInfo(HAS_MACRO_TILE, &isMacroTileSupported);
105}
106
107int MDPCapabilityInfo :: isMacroTilingSupportedByMDP(){
108 return isMacroTileSupported;
109 }
110
111//------------- AdrenoMemInfo-----------------------//
Naomi Luis01f5c8e2013-02-11 12:46:24 -0800112AdrenoMemInfo::AdrenoMemInfo()
113{
Ramkumar Radhakrishnan473f4082013-11-04 14:29:18 -0800114 LINK_adreno_compute_aligned_width_and_height = NULL;
115 LINK_adreno_compute_padding = NULL;
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700116 LINK_adreno_isMacroTilingSupportedByGpu = NULL;
Jeykumar Sankaran2ba20512014-02-27 15:21:42 -0800117 LINK_adreno_compute_compressedfmt_aligned_width_and_height = NULL;
Sushil Chauhan082acd62015-01-14 16:49:29 -0800118 LINK_adreno_isUBWCSupportedByGpu = NULL;
Sushil Chauhan521ce352015-08-28 11:33:30 -0700119 LINK_adreno_get_gpu_pixel_alignment = NULL;
Ramkumar Radhakrishnan473f4082013-11-04 14:29:18 -0800120
Naomi Luis01f5c8e2013-02-11 12:46:24 -0800121 libadreno_utils = ::dlopen("libadreno_utils.so", RTLD_NOW);
122 if (libadreno_utils) {
Ramkumar Radhakrishnan473f4082013-11-04 14:29:18 -0800123 *(void **)&LINK_adreno_compute_aligned_width_and_height =
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700124 ::dlsym(libadreno_utils, "compute_aligned_width_and_height");
125 *(void **)&LINK_adreno_compute_padding =
126 ::dlsym(libadreno_utils, "compute_surface_padding");
127 *(void **)&LINK_adreno_isMacroTilingSupportedByGpu =
128 ::dlsym(libadreno_utils, "isMacroTilingSupportedByGpu");
Jeykumar Sankaran2ba20512014-02-27 15:21:42 -0800129 *(void **)&LINK_adreno_compute_compressedfmt_aligned_width_and_height =
130 ::dlsym(libadreno_utils,
131 "compute_compressedfmt_aligned_width_and_height");
Sushil Chauhan082acd62015-01-14 16:49:29 -0800132 *(void **)&LINK_adreno_isUBWCSupportedByGpu =
133 ::dlsym(libadreno_utils, "isUBWCSupportedByGpu");
Sushil Chauhan521ce352015-08-28 11:33:30 -0700134 *(void **)&LINK_adreno_get_gpu_pixel_alignment =
135 ::dlsym(libadreno_utils, "get_gpu_pixel_alignment");
Naomi Luis01f5c8e2013-02-11 12:46:24 -0800136 }
Mohan Maiyacbeab9e2015-04-20 09:20:44 -0700137
138 // Check if the overriding property debug.gralloc.gfx_ubwc_disable
139 // that disables UBWC allocations for the graphics stack is set
140 gfx_ubwc_disable = 0;
141 char property[PROPERTY_VALUE_MAX];
142 property_get("debug.gralloc.gfx_ubwc_disable", property, "0");
143 if(!(strncmp(property, "1", PROPERTY_VALUE_MAX)) ||
144 !(strncmp(property, "true", PROPERTY_VALUE_MAX))) {
145 gfx_ubwc_disable = 1;
146 }
Naomi Luis01f5c8e2013-02-11 12:46:24 -0800147}
148
149AdrenoMemInfo::~AdrenoMemInfo()
150{
151 if (libadreno_utils) {
152 ::dlclose(libadreno_utils);
153 }
154}
155
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700156int AdrenoMemInfo::isMacroTilingSupportedByGPU()
157{
158 if ((libadreno_utils)) {
159 if(LINK_adreno_isMacroTilingSupportedByGpu) {
160 return LINK_adreno_isMacroTilingSupportedByGpu();
161 }
162 }
163 return 0;
164}
165
Manoj Kumar AVM8e1aa182015-08-05 19:45:16 -0700166void AdrenoMemInfo::getAlignedWidthAndHeight(const private_handle_t *hnd, int& aligned_w,
167 int& aligned_h) {
168 MetaData_t *metadata = (MetaData_t *)hnd->base_metadata;
169 if(metadata && metadata->operation & UPDATE_BUFFER_GEOMETRY) {
170 int w = metadata->bufferDim.sliceWidth;
171 int h = metadata->bufferDim.sliceHeight;
172 int f = hnd->format;
173 int usage = 0;
174
175 if (hnd->flags & private_handle_t::PRIV_FLAGS_UBWC_ALIGNED) {
176 usage = GRALLOC_USAGE_PRIVATE_ALLOC_UBWC;
177 }
178
179 getAlignedWidthAndHeight(w, h, f, usage, aligned_w, aligned_h);
180 } else {
181 aligned_w = hnd->width;
182 aligned_h = hnd->height;
183 }
184
185}
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700186
Naomi Luiscffc5bd2015-08-28 14:57:31 -0700187bool isUncompressedRgbFormat(int format)
188{
189 bool is_rgb_format = false;
190
191 switch (format)
192 {
193 case HAL_PIXEL_FORMAT_RGBA_8888:
194 case HAL_PIXEL_FORMAT_RGBX_8888:
195 case HAL_PIXEL_FORMAT_RGB_888:
196 case HAL_PIXEL_FORMAT_RGB_565:
Kaushik Kanetkar4cb337c2015-08-29 20:16:54 -0600197 case HAL_PIXEL_FORMAT_BGR_565:
Naomi Luiscffc5bd2015-08-28 14:57:31 -0700198 case HAL_PIXEL_FORMAT_BGRA_8888:
199 case HAL_PIXEL_FORMAT_RGBA_5551:
200 case HAL_PIXEL_FORMAT_RGBA_4444:
201 case HAL_PIXEL_FORMAT_R_8:
202 case HAL_PIXEL_FORMAT_RG_88:
Ramkumar Radhakrishnandb89d1f2016-03-07 20:15:52 -0800203 case HAL_PIXEL_FORMAT_BGRX_8888:
204 case HAL_PIXEL_FORMAT_RGBA_1010102:
205 case HAL_PIXEL_FORMAT_ARGB_2101010:
206 case HAL_PIXEL_FORMAT_RGBX_1010102:
207 case HAL_PIXEL_FORMAT_XRGB_2101010:
208 case HAL_PIXEL_FORMAT_BGRA_1010102:
209 case HAL_PIXEL_FORMAT_ABGR_2101010:
210 case HAL_PIXEL_FORMAT_BGRX_1010102:
211 case HAL_PIXEL_FORMAT_XBGR_2101010: // Intentional fallthrough
Naomi Luiscffc5bd2015-08-28 14:57:31 -0700212 is_rgb_format = true;
213 break;
214 default:
215 break;
216 }
217
218 return is_rgb_format;
219}
220
Ramkumar Radhakrishnan473f4082013-11-04 14:29:18 -0800221void AdrenoMemInfo::getAlignedWidthAndHeight(int width, int height, int format,
Sushil Chauhan65e26302015-01-14 10:48:57 -0800222 int usage, int& aligned_w, int& aligned_h)
Naomi Luisa44100c2013-02-08 12:42:03 -0800223{
Sushil Chauhane61fac52015-04-30 17:14:37 -0700224 bool ubwc_enabled = isUBwcEnabled(format, usage);
225
Naomi Luis01f5c8e2013-02-11 12:46:24 -0800226 // Currently surface padding is only computed for RGB* surfaces.
Naomi Luiscffc5bd2015-08-28 14:57:31 -0700227 if (isUncompressedRgbFormat(format) == true) {
Sushil Chauhane61fac52015-04-30 17:14:37 -0700228 int tileEnabled = ubwc_enabled || isMacroTileEnabled(format, usage);
Manoj Kumar AVM8e1aa182015-08-05 19:45:16 -0700229 getGpuAlignedWidthHeight(width, height, format, tileEnabled, aligned_w, aligned_h);
Ramkumar Radhakrishnandb89d1f2016-03-07 20:15:52 -0800230 } else if (ubwc_enabled) {
231 getYuvUBwcWidthHeight(width, height, format, aligned_w, aligned_h);
232 } else {
233 aligned_w = width;
234 aligned_h = height;
235 int alignment = 32;
236 switch (format)
237 {
238 case HAL_PIXEL_FORMAT_YCrCb_420_SP:
239 case HAL_PIXEL_FORMAT_YCbCr_420_SP:
240 if (LINK_adreno_get_gpu_pixel_alignment) {
241 alignment = LINK_adreno_get_gpu_pixel_alignment();
242 }
243 aligned_w = ALIGN(width, alignment);
244 break;
245 case HAL_PIXEL_FORMAT_YCrCb_420_SP_ADRENO:
246 aligned_w = ALIGN(width, alignment);
247 break;
248 case HAL_PIXEL_FORMAT_RAW16:
249 aligned_w = ALIGN(width, 16);
250 break;
251 case HAL_PIXEL_FORMAT_RAW10:
252 aligned_w = ALIGN(width * 10 / 8, 8);
253 break;
254 case HAL_PIXEL_FORMAT_YCbCr_420_SP_TILED:
255 aligned_w = ALIGN(width, 128);
256 break;
257 case HAL_PIXEL_FORMAT_YV12:
258 case HAL_PIXEL_FORMAT_YCbCr_422_SP:
259 case HAL_PIXEL_FORMAT_YCrCb_422_SP:
260 case HAL_PIXEL_FORMAT_YCbCr_422_I:
261 case HAL_PIXEL_FORMAT_YCrCb_422_I:
262 aligned_w = ALIGN(width, 16);
263 break;
264 case HAL_PIXEL_FORMAT_YCbCr_420_SP_VENUS:
265 case HAL_PIXEL_FORMAT_NV12_ENCODEABLE:
266 aligned_w = VENUS_Y_STRIDE(COLOR_FMT_NV12, width);
267 aligned_h = VENUS_Y_SCANLINES(COLOR_FMT_NV12, height);
268 break;
269 case HAL_PIXEL_FORMAT_YCrCb_420_SP_VENUS:
270 aligned_w = VENUS_Y_STRIDE(COLOR_FMT_NV21, width);
271 aligned_h = VENUS_Y_SCANLINES(COLOR_FMT_NV21, height);
272 break;
273 case HAL_PIXEL_FORMAT_BLOB:
274 break;
275 case HAL_PIXEL_FORMAT_NV21_ZSL:
276 aligned_w = ALIGN(width, 64);
277 aligned_h = ALIGN(height, 64);
278 break;
279 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_4x4_KHR:
280 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_4x4_KHR:
281 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_5x4_KHR:
282 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_5x4_KHR:
283 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_5x5_KHR:
284 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_5x5_KHR:
285 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_6x5_KHR:
286 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_6x5_KHR:
287 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_6x6_KHR:
288 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_6x6_KHR:
289 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_8x5_KHR:
290 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_8x5_KHR:
291 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_8x6_KHR:
292 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_8x6_KHR:
293 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_8x8_KHR:
294 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_8x8_KHR:
295 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_10x5_KHR:
296 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_10x5_KHR:
297 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_10x6_KHR:
298 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_10x6_KHR:
299 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_10x8_KHR:
300 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_10x8_KHR:
301 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_10x10_KHR:
302 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_10x10_KHR:
303 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_12x10_KHR:
304 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_12x10_KHR:
305 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_12x12_KHR:
306 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_12x12_KHR:
307 if(LINK_adreno_compute_compressedfmt_aligned_width_and_height) {
308 int bytesPerPixel = 0;
309 int raster_mode = 0; //Adreno unknown raster mode.
310 int padding_threshold = 512; //Threshold for padding
311 //surfaces.
Sushil Chauhan65e26302015-01-14 10:48:57 -0800312
Ramkumar Radhakrishnandb89d1f2016-03-07 20:15:52 -0800313 LINK_adreno_compute_compressedfmt_aligned_width_and_height(
314 width, height, format, 0,raster_mode, padding_threshold,
315 &aligned_w, &aligned_h, &bytesPerPixel);
316 } else {
317 ALOGW("%s: Warning!! Symbols" \
318 " compute_compressedfmt_aligned_width_and_height" \
319 " not found", __FUNCTION__);
320 }
321 break;
322 default: break;
323 }
Sushil Chauhan65e26302015-01-14 10:48:57 -0800324 }
325}
326
327void AdrenoMemInfo::getGpuAlignedWidthHeight(int width, int height, int format,
328 int tile_enabled, int& aligned_w, int& aligned_h)
329{
330 aligned_w = ALIGN(width, 32);
331 aligned_h = ALIGN(height, 32);
332
333 // Don't add any additional padding if debug.gralloc.map_fb_memory
334 // is enabled
335 char property[PROPERTY_VALUE_MAX];
336 if((property_get("debug.gralloc.map_fb_memory", property, NULL) > 0) &&
337 (!strncmp(property, "1", PROPERTY_VALUE_MAX ) ||
338 (!strncasecmp(property,"true", PROPERTY_VALUE_MAX )))) {
339 return;
340 }
341
342 int bpp = 4;
343 switch(format)
344 {
345 case HAL_PIXEL_FORMAT_RGB_888:
346 bpp = 3;
347 break;
348 case HAL_PIXEL_FORMAT_RGB_565:
Kaushik Kanetkar4cb337c2015-08-29 20:16:54 -0600349 case HAL_PIXEL_FORMAT_BGR_565:
Sushil Chauhan65e26302015-01-14 10:48:57 -0800350 case HAL_PIXEL_FORMAT_RGBA_5551:
351 case HAL_PIXEL_FORMAT_RGBA_4444:
352 bpp = 2;
353 break;
354 default: break;
355 }
356
357 if (libadreno_utils) {
358 int raster_mode = 0; // Adreno unknown raster mode.
359 int padding_threshold = 512; // Threshold for padding surfaces.
360 // the function below computes aligned width and aligned height
361 // based on linear or macro tile mode selected.
362 if(LINK_adreno_compute_aligned_width_and_height) {
363 LINK_adreno_compute_aligned_width_and_height(width,
364 height, bpp, tile_enabled,
365 raster_mode, padding_threshold,
366 &aligned_w, &aligned_h);
367
368 } else if(LINK_adreno_compute_padding) {
369 int surface_tile_height = 1; // Linear surface
370 aligned_w = LINK_adreno_compute_padding(width, bpp,
371 surface_tile_height, raster_mode,
372 padding_threshold);
373 ALOGW("%s: Warning!! Old GFX API is used to calculate stride",
374 __FUNCTION__);
375 } else {
376 ALOGW("%s: Warning!! Symbols compute_surface_padding and " \
377 "compute_aligned_width_and_height not found", __FUNCTION__);
378 }
379 }
380}
381
382int AdrenoMemInfo::isUBWCSupportedByGPU(int format)
383{
Mohan Maiyacbeab9e2015-04-20 09:20:44 -0700384 if (!gfx_ubwc_disable && libadreno_utils) {
Sushil Chauhan082acd62015-01-14 16:49:29 -0800385 if (LINK_adreno_isUBWCSupportedByGpu) {
386 ADRENOPIXELFORMAT gpu_format = getGpuPixelFormat(format);
387 return LINK_adreno_isUBWCSupportedByGpu(gpu_format);
388 }
389 }
Sushil Chauhan65e26302015-01-14 10:48:57 -0800390 return 0;
Naomi Luisa44100c2013-02-08 12:42:03 -0800391}
392
Sushil Chauhan082acd62015-01-14 16:49:29 -0800393ADRENOPIXELFORMAT AdrenoMemInfo::getGpuPixelFormat(int hal_format)
394{
395 switch (hal_format) {
396 case HAL_PIXEL_FORMAT_RGBA_8888:
397 return ADRENO_PIXELFORMAT_R8G8B8A8;
Sushil Chauhan6686c802015-04-15 11:30:39 -0700398 case HAL_PIXEL_FORMAT_RGBX_8888:
399 return ADRENO_PIXELFORMAT_R8G8B8X8;
Sushil Chauhan082acd62015-01-14 16:49:29 -0800400 case HAL_PIXEL_FORMAT_RGB_565:
401 return ADRENO_PIXELFORMAT_B5G6R5;
Kaushik Kanetkar4cb337c2015-08-29 20:16:54 -0600402 case HAL_PIXEL_FORMAT_BGR_565:
403 return ADRENO_PIXELFORMAT_R5G6B5;
Sushil Chauhan082acd62015-01-14 16:49:29 -0800404 case HAL_PIXEL_FORMAT_NV12_ENCODEABLE:
Sushil Chauhana9d47002015-02-18 14:55:03 -0800405 return ADRENO_PIXELFORMAT_NV12;
Sushil Chauhan082acd62015-01-14 16:49:29 -0800406 case HAL_PIXEL_FORMAT_YCbCr_420_SP_VENUS:
407 case HAL_PIXEL_FORMAT_YCbCr_420_SP_VENUS_UBWC:
Sushil Chauhana9d47002015-02-18 14:55:03 -0800408 return ADRENO_PIXELFORMAT_NV12_EXT;
Ramkumar Radhakrishnandb89d1f2016-03-07 20:15:52 -0800409 case HAL_PIXEL_FORMAT_YCbCr_420_TP10_UBWC:
410 return ADRENO_PIXELFORMAT_TP10;
411 case HAL_PIXEL_FORMAT_RGBA_1010102:
412 return ADRENO_PIXELFORMAT_R10G10B10A2_UNORM;
413 case HAL_PIXEL_FORMAT_RGBX_1010102:
414 return ADRENO_PIXELFORMAT_R10G10B10X2_UNORM;
415 case HAL_PIXEL_FORMAT_ABGR_2101010:
416 return ADRENO_PIXELFORMAT_A2B10G10R10_UNORM;
Sushil Chauhan082acd62015-01-14 16:49:29 -0800417 default:
418 ALOGE("%s: No map for format: 0x%x", __FUNCTION__, hal_format);
419 break;
420 }
421 return ADRENO_PIXELFORMAT_UNKNOWN;
422}
423
Naomi Luisa44100c2013-02-08 12:42:03 -0800424//-------------- IAllocController-----------------------//
Naseer Ahmed01d3fd32012-07-14 21:08:13 -0700425IAllocController* IAllocController::sController = NULL;
426IAllocController* IAllocController::getInstance(void)
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700427{
428 if(sController == NULL) {
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700429 sController = new IonController();
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700430 }
431 return sController;
432}
433
434
435//-------------- IonController-----------------------//
436IonController::IonController()
437{
Praveena Pachipulusu2005e8f2014-05-07 20:01:54 +0530438 allocateIonMem();
Manikanta Kanamarlapudicb44d972016-02-03 17:49:55 +0530439
440 char property[PROPERTY_VALUE_MAX];
441 property_get("video.disable.ubwc", property, "0");
442 mDisableUBWCForEncode = atoi(property);
Praveena Pachipulusu2005e8f2014-05-07 20:01:54 +0530443}
444
445void IonController::allocateIonMem()
446{
447 mIonAlloc = new IonAlloc();
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700448}
449
Naseer Ahmed01d3fd32012-07-14 21:08:13 -0700450int IonController::allocate(alloc_data& data, int usage)
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700451{
452 int ionFlags = 0;
Naseer Ahmed8d0d72a2014-12-19 16:25:09 -0500453 int ionHeapId = 0;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700454 int ret;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700455
456 data.uncached = useUncached(usage);
Naseer Ahmed29a26812012-06-14 00:56:20 -0700457 data.allocType = 0;
458
Prabhanjan Kandula92896b82013-05-07 19:58:24 +0530459 if(usage & GRALLOC_USAGE_PROTECTED) {
Naseer Ahmed934a4c32016-04-11 17:20:02 -0400460 if (usage & GRALLOC_USAGE_PRIVATE_SECURE_DISPLAY) {
461 ionHeapId = ION_HEAP(SD_HEAP_ID);
462 /*
463 * There is currently no flag in ION for Secure Display
464 * VM. Please add it to the define once available.
465 */
466 ionFlags |= ION_SD_FLAGS;
Prabhanjan Kandula92896b82013-05-07 19:58:24 +0530467 } else {
Naseer Ahmed934a4c32016-04-11 17:20:02 -0400468 ionHeapId = ION_HEAP(CP_HEAP_ID);
469 ionFlags |= ION_CP_FLAGS;
Naseer Ahmedc5e6fb02013-03-07 13:42:20 -0500470 }
Prabhanjan Kandula92896b82013-05-07 19:58:24 +0530471 } else if(usage & GRALLOC_USAGE_PRIVATE_MM_HEAP) {
472 //MM Heap is exclusively a secure heap.
473 //If it is used for non secure cases, fallback to IOMMU heap
474 ALOGW("GRALLOC_USAGE_PRIVATE_MM_HEAP \
475 cannot be used as an insecure heap!\
Naseer Ahmed8d0d72a2014-12-19 16:25:09 -0500476 trying to use system heap instead !!");
477 ionHeapId |= ION_HEAP(ION_SYSTEM_HEAP_ID);
Naseer Ahmedc5e6fb02013-03-07 13:42:20 -0500478 }
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700479
Arun Kumar K.Rff78b892013-05-24 12:37:51 -0700480 if(usage & GRALLOC_USAGE_PRIVATE_CAMERA_HEAP)
Naseer Ahmed8d0d72a2014-12-19 16:25:09 -0500481 ionHeapId |= ION_HEAP(ION_CAMERA_HEAP_ID);
Arun Kumar K.Rff78b892013-05-24 12:37:51 -0700482
Arun Kumar K.R0daaa992013-03-12 15:08:29 -0700483 if(usage & GRALLOC_USAGE_PRIVATE_ADSP_HEAP)
Naseer Ahmed8d0d72a2014-12-19 16:25:09 -0500484 ionHeapId |= ION_HEAP(ION_ADSP_HEAP_ID);
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700485
Prabhanjan Kandula92896b82013-05-07 19:58:24 +0530486 if(ionFlags & ION_SECURE)
Naseer Ahmedc5e6fb02013-03-07 13:42:20 -0500487 data.allocType |= private_handle_t::PRIV_FLAGS_SECURE_BUFFER;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700488
Naseer Ahmed8d0d72a2014-12-19 16:25:09 -0500489 // if no ion heap flags are set, default to system heap
490 if(!ionHeapId)
491 ionHeapId = ION_HEAP(ION_SYSTEM_HEAP_ID);
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700492
Naseer Ahmed8d0d72a2014-12-19 16:25:09 -0500493 //At this point we should have the right heap set, there is no fallback
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700494 data.flags = ionFlags;
Naseer Ahmed8d0d72a2014-12-19 16:25:09 -0500495 data.heapId = ionHeapId;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700496 ret = mIonAlloc->alloc_buffer(data);
Naseer Ahmed29a26812012-06-14 00:56:20 -0700497
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700498 if(ret >= 0 ) {
Naseer Ahmed29a26812012-06-14 00:56:20 -0700499 data.allocType |= private_handle_t::PRIV_FLAGS_USES_ION;
Naseer Ahmed8d0d72a2014-12-19 16:25:09 -0500500 } else {
501 ALOGE("%s: Failed to allocate buffer - heap: 0x%x flags: 0x%x",
502 __FUNCTION__, ionHeapId, ionFlags);
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700503 }
504
505 return ret;
506}
507
Naseer Ahmed01d3fd32012-07-14 21:08:13 -0700508IMemAlloc* IonController::getAllocator(int flags)
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700509{
Naseer Ahmedb16edac2012-07-15 23:56:21 -0700510 IMemAlloc* memalloc = NULL;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700511 if (flags & private_handle_t::PRIV_FLAGS_USES_ION) {
512 memalloc = mIonAlloc;
513 } else {
514 ALOGE("%s: Invalid flags passed: 0x%x", __FUNCTION__, flags);
515 }
516
517 return memalloc;
518}
519
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700520bool isMacroTileEnabled(int format, int usage)
521{
522 bool tileEnabled = false;
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700523 // Check whether GPU & MDSS supports MacroTiling feature
524 if(AdrenoMemInfo::getInstance().isMacroTilingSupportedByGPU() &&
Ramakant Singhc85ccee2016-04-01 15:25:17 +0530525 MDPCapabilityInfo::getInstance().isMacroTilingSupportedByMDP())
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700526 {
527 // check the format
528 switch(format)
529 {
530 case HAL_PIXEL_FORMAT_RGBA_8888:
531 case HAL_PIXEL_FORMAT_RGBX_8888:
532 case HAL_PIXEL_FORMAT_BGRA_8888:
Manoj Kumar AVM5a5529b2014-02-24 18:16:37 -0800533 case HAL_PIXEL_FORMAT_RGB_565:
Kaushik Kanetkar4cb337c2015-08-29 20:16:54 -0600534 case HAL_PIXEL_FORMAT_BGR_565:
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700535 {
536 tileEnabled = true;
537 // check the usage flags
538 if (usage & (GRALLOC_USAGE_SW_READ_MASK |
539 GRALLOC_USAGE_SW_WRITE_MASK)) {
540 // Application intends to use CPU for rendering
541 tileEnabled = false;
542 }
543 break;
544 }
545 default:
546 break;
547 }
548 }
549 return tileEnabled;
550}
551
552// helper function
Sushil Chauhan65e26302015-01-14 10:48:57 -0800553unsigned int getSize(int format, int width, int height, int usage,
554 const int alignedw, const int alignedh) {
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700555
Sushil Chauhan65e26302015-01-14 10:48:57 -0800556 if (isUBwcEnabled(format, usage)) {
557 return getUBwcSize(width, height, format, alignedw, alignedh);
558 }
559
560 unsigned int size = 0;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700561 switch (format) {
562 case HAL_PIXEL_FORMAT_RGBA_8888:
563 case HAL_PIXEL_FORMAT_RGBX_8888:
564 case HAL_PIXEL_FORMAT_BGRA_8888:
Ramkumar Radhakrishnandb89d1f2016-03-07 20:15:52 -0800565 case HAL_PIXEL_FORMAT_RGBA_1010102:
566 case HAL_PIXEL_FORMAT_ARGB_2101010:
567 case HAL_PIXEL_FORMAT_RGBX_1010102:
568 case HAL_PIXEL_FORMAT_XRGB_2101010:
569 case HAL_PIXEL_FORMAT_BGRA_1010102:
570 case HAL_PIXEL_FORMAT_ABGR_2101010:
571 case HAL_PIXEL_FORMAT_BGRX_1010102:
572 case HAL_PIXEL_FORMAT_XBGR_2101010:
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700573 size = alignedw * alignedh * 4;
574 break;
575 case HAL_PIXEL_FORMAT_RGB_888:
576 size = alignedw * alignedh * 3;
577 break;
578 case HAL_PIXEL_FORMAT_RGB_565:
Kaushik Kanetkar4cb337c2015-08-29 20:16:54 -0600579 case HAL_PIXEL_FORMAT_BGR_565:
Ramkumar Radhakrishnan96439522014-10-09 13:37:52 -0700580 case HAL_PIXEL_FORMAT_RGBA_5551:
581 case HAL_PIXEL_FORMAT_RGBA_4444:
Ajay Dudani4dc06492015-03-26 07:28:11 -0700582 case HAL_PIXEL_FORMAT_RAW16:
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700583 size = alignedw * alignedh * 2;
584 break;
Mansoor Aftabe9912a62014-07-15 01:40:26 -0700585 case HAL_PIXEL_FORMAT_RAW10:
586 size = ALIGN(alignedw * alignedh, 4096);
587 break;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700588
589 // adreno formats
590 case HAL_PIXEL_FORMAT_YCrCb_420_SP_ADRENO: // NV21
591 size = ALIGN(alignedw*alignedh, 4096);
592 size += ALIGN(2 * ALIGN(width/2, 32) * ALIGN(height/2, 32), 4096);
593 break;
594 case HAL_PIXEL_FORMAT_YCbCr_420_SP_TILED: // NV12
595 // The chroma plane is subsampled,
596 // but the pitch in bytes is unchanged
597 // The GPU needs 4K alignment, but the video decoder needs 8K
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700598 size = ALIGN( alignedw * alignedh, 8192);
599 size += ALIGN( alignedw * ALIGN(height/2, 32), 8192);
600 break;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700601 case HAL_PIXEL_FORMAT_YV12:
602 if ((format == HAL_PIXEL_FORMAT_YV12) && ((width&1) || (height&1))) {
603 ALOGE("w or h is odd for the YV12 format");
Saurabh Shahd0b0d8f2014-01-31 11:45:56 -0800604 return 0;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700605 }
Naseer Ahmedce0c9502013-08-15 13:07:24 -0400606 size = alignedw*alignedh +
Naseer Ahmed29a26812012-06-14 00:56:20 -0700607 (ALIGN(alignedw/2, 16) * (alignedh/2))*2;
Saurabh Shah8f0ea6f2014-05-19 16:48:53 -0700608 size = ALIGN(size, (unsigned int)4096);
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700609 break;
Ramkumar Radhakrishnan73f952a2013-03-05 14:14:24 -0800610 case HAL_PIXEL_FORMAT_YCbCr_420_SP:
611 case HAL_PIXEL_FORMAT_YCrCb_420_SP:
Naseer Ahmed2c215292013-09-18 23:47:42 -0400612 size = ALIGN((alignedw*alignedh) + (alignedw* alignedh)/2 + 1, 4096);
Ramkumar Radhakrishnan73f952a2013-03-05 14:14:24 -0800613 break;
Naseer Ahmed29a26812012-06-14 00:56:20 -0700614 case HAL_PIXEL_FORMAT_YCbCr_422_SP:
615 case HAL_PIXEL_FORMAT_YCrCb_422_SP:
Ramkumar Radhakrishnanb52399c2013-08-06 20:17:29 -0700616 case HAL_PIXEL_FORMAT_YCbCr_422_I:
617 case HAL_PIXEL_FORMAT_YCrCb_422_I:
Naseer Ahmed29a26812012-06-14 00:56:20 -0700618 if(width & 1) {
619 ALOGE("width is odd for the YUV422_SP format");
Saurabh Shahd0b0d8f2014-01-31 11:45:56 -0800620 return 0;
Naseer Ahmed29a26812012-06-14 00:56:20 -0700621 }
Naseer Ahmed29a26812012-06-14 00:56:20 -0700622 size = ALIGN(alignedw * alignedh * 2, 4096);
623 break;
Sushil Chauhanc5e61482012-08-22 17:13:32 -0700624 case HAL_PIXEL_FORMAT_YCbCr_420_SP_VENUS:
Naseer Ahmedce0c9502013-08-15 13:07:24 -0400625 case HAL_PIXEL_FORMAT_NV12_ENCODEABLE:
Sushil Chauhane8a01792012-11-01 16:25:45 -0700626 size = VENUS_BUFFER_SIZE(COLOR_FMT_NV12, width, height);
Sushil Chauhanc5e61482012-08-22 17:13:32 -0700627 break;
Raj Kamal8bb3b8f2015-03-24 16:22:17 +0530628 case HAL_PIXEL_FORMAT_YCrCb_420_SP_VENUS:
629 size = VENUS_BUFFER_SIZE(COLOR_FMT_NV21, width, height);
630 break;
Naseer Ahmed7669dae2013-04-17 20:23:53 -0400631 case HAL_PIXEL_FORMAT_BLOB:
632 if(height != 1) {
633 ALOGE("%s: Buffers with format HAL_PIXEL_FORMAT_BLOB \
634 must have height==1 ", __FUNCTION__);
Saurabh Shahd0b0d8f2014-01-31 11:45:56 -0800635 return 0;
Naseer Ahmed7669dae2013-04-17 20:23:53 -0400636 }
Naseer Ahmed7669dae2013-04-17 20:23:53 -0400637 size = width;
638 break;
Ramkumar Radhakrishnanff511022013-07-23 16:12:08 -0700639 case HAL_PIXEL_FORMAT_NV21_ZSL:
Ramkumar Radhakrishnanff511022013-07-23 16:12:08 -0700640 size = ALIGN((alignedw*alignedh) + (alignedw* alignedh)/2, 4096);
641 break;
Naseer Ahmed63326f42013-12-18 02:45:48 -0500642 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_4x4_KHR:
643 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_5x4_KHR:
644 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_5x5_KHR:
645 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_6x5_KHR:
646 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_6x6_KHR:
647 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_8x5_KHR:
648 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_8x6_KHR:
649 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_8x8_KHR:
650 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_10x5_KHR:
651 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_10x6_KHR:
652 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_10x8_KHR:
653 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_10x10_KHR:
654 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_12x10_KHR:
655 case HAL_PIXEL_FORMAT_COMPRESSED_RGBA_ASTC_12x12_KHR:
656 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_4x4_KHR:
657 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_5x4_KHR:
658 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_5x5_KHR:
659 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_6x5_KHR:
660 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_6x6_KHR:
661 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_8x5_KHR:
662 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_8x6_KHR:
663 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_8x8_KHR:
664 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_10x5_KHR:
665 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_10x6_KHR:
666 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_10x8_KHR:
667 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_10x10_KHR:
668 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_12x10_KHR:
Jeykumar Sankaran8f4585f2014-02-05 15:23:40 -0800669 case HAL_PIXEL_FORMAT_COMPRESSED_SRGB8_ALPHA8_ASTC_12x12_KHR:
Naseer Ahmed63326f42013-12-18 02:45:48 -0500670 size = alignedw * alignedh * ASTC_BLOCK_SIZE;
671 break;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700672 default:
Naseer Ahmedb8ecfbf2015-11-02 20:34:29 -0500673 ALOGE("%s: Unrecognized pixel format: 0x%x", __FUNCTION__, format);
Saurabh Shahd0b0d8f2014-01-31 11:45:56 -0800674 return 0;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700675 }
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700676 return size;
677}
678
Saurabh Shah8f0ea6f2014-05-19 16:48:53 -0700679unsigned int getBufferSizeAndDimensions(int width, int height, int format,
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700680 int& alignedw, int &alignedh)
681{
Saurabh Shah8f0ea6f2014-05-19 16:48:53 -0700682 unsigned int size;
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700683
684 AdrenoMemInfo::getInstance().getAlignedWidthAndHeight(width,
685 height,
686 format,
Sushil Chauhan65e26302015-01-14 10:48:57 -0800687 0,
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700688 alignedw,
689 alignedh);
690
Sushil Chauhan65e26302015-01-14 10:48:57 -0800691 size = getSize(format, width, height, 0 /* usage */, alignedw, alignedh);
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700692
693 return size;
694}
695
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700696
Saurabh Shah8f0ea6f2014-05-19 16:48:53 -0700697unsigned int getBufferSizeAndDimensions(int width, int height, int format,
698 int usage, int& alignedw, int &alignedh)
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700699{
Saurabh Shah8f0ea6f2014-05-19 16:48:53 -0700700 unsigned int size;
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700701
702 AdrenoMemInfo::getInstance().getAlignedWidthAndHeight(width,
703 height,
704 format,
Sushil Chauhan65e26302015-01-14 10:48:57 -0800705 usage,
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700706 alignedw,
707 alignedh);
708
Sushil Chauhan65e26302015-01-14 10:48:57 -0800709 size = getSize(format, width, height, usage, alignedw, alignedh);
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700710
711 return size;
712}
713
714
715void getBufferAttributes(int width, int height, int format, int usage,
Sushil Chauhane61fac52015-04-30 17:14:37 -0700716 int& alignedw, int &alignedh, int& tiled, unsigned int& size)
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700717{
Sushil Chauhane61fac52015-04-30 17:14:37 -0700718 tiled = isUBwcEnabled(format, usage) || isMacroTileEnabled(format, usage);
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700719
720 AdrenoMemInfo::getInstance().getAlignedWidthAndHeight(width,
721 height,
722 format,
Sushil Chauhan65e26302015-01-14 10:48:57 -0800723 usage,
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700724 alignedw,
725 alignedh);
Sushil Chauhan65e26302015-01-14 10:48:57 -0800726 size = getSize(format, width, height, usage, alignedw, alignedh);
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700727}
728
Ramkumar Radhakrishnan790357e2016-03-24 17:03:41 -0700729void getYuvUbwcSPPlaneInfo(uint64_t base, int width, int height,
730 int color_format, struct android_ycbcr* ycbcr)
Ramkumar Radhakrishnandb89d1f2016-03-07 20:15:52 -0800731{
732 // UBWC buffer has these 4 planes in the following sequence:
733 // Y_Meta_Plane, Y_Plane, UV_Meta_Plane, UV_Plane
734 unsigned int y_meta_stride, y_meta_height, y_meta_size;
735 unsigned int y_stride, y_height, y_size;
736 unsigned int c_meta_stride, c_meta_height, c_meta_size;
737 unsigned int alignment = 4096;
Ramkumar Radhakrishnandb89d1f2016-03-07 20:15:52 -0800738
739 y_meta_stride = VENUS_Y_META_STRIDE(color_format, width);
740 y_meta_height = VENUS_Y_META_SCANLINES(color_format, height);
741 y_meta_size = ALIGN((y_meta_stride * y_meta_height), alignment);
742
743 y_stride = VENUS_Y_STRIDE(color_format, width);
744 y_height = VENUS_Y_SCANLINES(color_format, height);
745 y_size = ALIGN((y_stride * y_height), alignment);
746
747 c_meta_stride = VENUS_UV_META_STRIDE(color_format, width);
748 c_meta_height = VENUS_UV_META_SCANLINES(color_format, height);
749 c_meta_size = ALIGN((c_meta_stride * c_meta_height), alignment);
750
Ramkumar Radhakrishnan790357e2016-03-24 17:03:41 -0700751 ycbcr->y = (void*)(base + y_meta_size);
752 ycbcr->cb = (void*)(base + y_meta_size + y_size + c_meta_size);
753 ycbcr->cr = (void*)(base + y_meta_size + y_size +
Ramkumar Radhakrishnandb89d1f2016-03-07 20:15:52 -0800754 c_meta_size + 1);
755 ycbcr->ystride = y_stride;
756 ycbcr->cstride = VENUS_UV_STRIDE(color_format, width);
757}
758
Ramkumar Radhakrishnan790357e2016-03-24 17:03:41 -0700759void getYuvSPPlaneInfo(uint64_t base, int width, int height, int bpp,
760 struct android_ycbcr* ycbcr)
Ramkumar Radhakrishnandb89d1f2016-03-07 20:15:52 -0800761{
Ramkumar Radhakrishnandb89d1f2016-03-07 20:15:52 -0800762 unsigned int ystride, cstride;
763
764 ystride = cstride = width * bpp;
Ramkumar Radhakrishnan790357e2016-03-24 17:03:41 -0700765 ycbcr->y = (void*)base;
766 ycbcr->cb = (void*)(base + ystride * height);
767 ycbcr->cr = (void*)(base + ystride * height + 1);
Ramkumar Radhakrishnandb89d1f2016-03-07 20:15:52 -0800768 ycbcr->ystride = ystride;
769 ycbcr->cstride = cstride;
770 ycbcr->chroma_step = 2 * bpp;
771}
772
Naseer Ahmedb29fdfd2014-04-08 20:23:47 -0400773int getYUVPlaneInfo(private_handle_t* hnd, struct android_ycbcr* ycbcr)
774{
775 int err = 0;
Kaushik Kanetkar071aca62015-01-22 23:16:26 -0700776 int width = hnd->width;
777 int height = hnd->height;
Sushil Chauhane7acc3c2015-06-23 16:22:30 -0700778 int format = hnd->format;
Manoj Kumar AVM8e1aa182015-08-05 19:45:16 -0700779
Saurabh Shah8f0ea6f2014-05-19 16:48:53 -0700780 unsigned int ystride, cstride;
Kaushik Kanetkar071aca62015-01-22 23:16:26 -0700781
Naseer Ahmedb29fdfd2014-04-08 20:23:47 -0400782 memset(ycbcr->reserved, 0, sizeof(ycbcr->reserved));
Sushil Chauhane7acc3c2015-06-23 16:22:30 -0700783 MetaData_t *metadata = (MetaData_t *)hnd->base_metadata;
784
785 // Check if UBWC buffer has been rendered in linear format.
786 if (metadata && (metadata->operation & LINEAR_FORMAT)) {
787 format = metadata->linearFormat;
788 }
Naseer Ahmedb29fdfd2014-04-08 20:23:47 -0400789
Kaushik Kanetkar071aca62015-01-22 23:16:26 -0700790 // Check metadata if the geometry has been updated.
Kaushik Kanetkar071aca62015-01-22 23:16:26 -0700791 if(metadata && metadata->operation & UPDATE_BUFFER_GEOMETRY) {
Manoj Kumar AVM8e1aa182015-08-05 19:45:16 -0700792 int usage = 0;
793
794 if (hnd->flags & private_handle_t::PRIV_FLAGS_UBWC_ALIGNED) {
795 usage = GRALLOC_USAGE_PRIVATE_ALLOC_UBWC;
796 }
797
Kaushik Kanetkar071aca62015-01-22 23:16:26 -0700798 AdrenoMemInfo::getInstance().getAlignedWidthAndHeight(metadata->bufferDim.sliceWidth,
Manoj Kumar AVM8e1aa182015-08-05 19:45:16 -0700799 metadata->bufferDim.sliceHeight, format, usage, width, height);
Kaushik Kanetkar071aca62015-01-22 23:16:26 -0700800 }
801
Naseer Ahmedb29fdfd2014-04-08 20:23:47 -0400802 // Get the chroma offsets from the handle width/height. We take advantage
803 // of the fact the width _is_ the stride
Sushil Chauhane7acc3c2015-06-23 16:22:30 -0700804 switch (format) {
Naseer Ahmedb29fdfd2014-04-08 20:23:47 -0400805 //Semiplanar
806 case HAL_PIXEL_FORMAT_YCbCr_420_SP:
807 case HAL_PIXEL_FORMAT_YCbCr_422_SP:
808 case HAL_PIXEL_FORMAT_YCbCr_420_SP_VENUS:
809 case HAL_PIXEL_FORMAT_NV12_ENCODEABLE: //Same as YCbCr_420_SP_VENUS
Ramkumar Radhakrishnan790357e2016-03-24 17:03:41 -0700810 getYuvSPPlaneInfo(hnd->base, width, height, 1, ycbcr);
Ramkumar Radhakrishnandb89d1f2016-03-07 20:15:52 -0800811 break;
812
813 case HAL_PIXEL_FORMAT_YCbCr_420_P010:
Ramkumar Radhakrishnan790357e2016-03-24 17:03:41 -0700814 getYuvSPPlaneInfo(hnd->base, width, height, 2, ycbcr);
Naseer Ahmedb29fdfd2014-04-08 20:23:47 -0400815 break;
816
Sushil Chauhan4686c972015-02-20 15:44:52 -0800817 case HAL_PIXEL_FORMAT_YCbCr_420_SP_VENUS_UBWC:
Ramkumar Radhakrishnan790357e2016-03-24 17:03:41 -0700818 getYuvUbwcSPPlaneInfo(hnd->base, width, height,
819 COLOR_FMT_NV12_UBWC, ycbcr);
Sushil Chauhan4686c972015-02-20 15:44:52 -0800820 ycbcr->chroma_step = 2;
821 break;
822
Ramkumar Radhakrishnandb89d1f2016-03-07 20:15:52 -0800823 case HAL_PIXEL_FORMAT_YCbCr_420_TP10_UBWC:
Ramkumar Radhakrishnan790357e2016-03-24 17:03:41 -0700824 getYuvUbwcSPPlaneInfo(hnd->base, width, height,
825 COLOR_FMT_NV12_BPP10_UBWC, ycbcr);
Ramkumar Radhakrishnandb89d1f2016-03-07 20:15:52 -0800826 ycbcr->chroma_step = 3;
827 break;
828
Naseer Ahmedb29fdfd2014-04-08 20:23:47 -0400829 case HAL_PIXEL_FORMAT_YCrCb_420_SP:
830 case HAL_PIXEL_FORMAT_YCrCb_422_SP:
831 case HAL_PIXEL_FORMAT_YCrCb_420_SP_ADRENO:
Raj Kamal8bb3b8f2015-03-24 16:22:17 +0530832 case HAL_PIXEL_FORMAT_YCrCb_420_SP_VENUS:
Naseer Ahmedb29fdfd2014-04-08 20:23:47 -0400833 case HAL_PIXEL_FORMAT_NV21_ZSL:
Ajay Dudani4dc06492015-03-26 07:28:11 -0700834 case HAL_PIXEL_FORMAT_RAW16:
Mansoor Aftabe9912a62014-07-15 01:40:26 -0700835 case HAL_PIXEL_FORMAT_RAW10:
Ramkumar Radhakrishnan790357e2016-03-24 17:03:41 -0700836 getYuvSPPlaneInfo(hnd->base, width, height, 1, ycbcr);
Ramkumar Radhakrishnandb89d1f2016-03-07 20:15:52 -0800837 std::swap(ycbcr->cb, ycbcr->cr);
Naseer Ahmedb29fdfd2014-04-08 20:23:47 -0400838 break;
839
840 //Planar
841 case HAL_PIXEL_FORMAT_YV12:
Kaushik Kanetkar071aca62015-01-22 23:16:26 -0700842 ystride = width;
843 cstride = ALIGN(width/2, 16);
Naseer Ahmedb29fdfd2014-04-08 20:23:47 -0400844 ycbcr->y = (void*)hnd->base;
Kaushik Kanetkar071aca62015-01-22 23:16:26 -0700845 ycbcr->cr = (void*)(hnd->base + ystride * height);
846 ycbcr->cb = (void*)(hnd->base + ystride * height +
847 cstride * height/2);
Naseer Ahmedb29fdfd2014-04-08 20:23:47 -0400848 ycbcr->ystride = ystride;
849 ycbcr->cstride = cstride;
850 ycbcr->chroma_step = 1;
Naseer Ahmedb29fdfd2014-04-08 20:23:47 -0400851 break;
852 //Unsupported formats
853 case HAL_PIXEL_FORMAT_YCbCr_422_I:
854 case HAL_PIXEL_FORMAT_YCrCb_422_I:
855 case HAL_PIXEL_FORMAT_YCbCr_420_SP_TILED:
856 default:
Sushil Chauhane7acc3c2015-06-23 16:22:30 -0700857 ALOGD("%s: Invalid format passed: 0x%x", __FUNCTION__, format);
Naseer Ahmedb29fdfd2014-04-08 20:23:47 -0400858 err = -EINVAL;
859 }
860 return err;
861
862}
863
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700864
865
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700866// Allocate buffer from width, height and format into a
867// private_handle_t. It is the responsibility of the caller
868// to free the buffer using the free_buffer function
869int alloc_buffer(private_handle_t **pHnd, int w, int h, int format, int usage)
870{
Naseer Ahmed29a26812012-06-14 00:56:20 -0700871 alloc_data data;
872 int alignedw, alignedh;
Naseer Ahmed01d3fd32012-07-14 21:08:13 -0700873 gralloc::IAllocController* sAlloc =
874 gralloc::IAllocController::getInstance();
Naseer Ahmed29a26812012-06-14 00:56:20 -0700875 data.base = 0;
876 data.fd = -1;
877 data.offset = 0;
Manoj Kumar AVM8a220812013-10-10 11:46:06 -0700878 data.size = getBufferSizeAndDimensions(w, h, format, usage, alignedw,
879 alignedh);
880
Naseer Ahmed29a26812012-06-14 00:56:20 -0700881 data.align = getpagesize();
882 data.uncached = useUncached(usage);
883 int allocFlags = usage;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700884
Naseer Ahmed01d3fd32012-07-14 21:08:13 -0700885 int err = sAlloc->allocate(data, allocFlags);
Naseer Ahmed29a26812012-06-14 00:56:20 -0700886 if (0 != err) {
887 ALOGE("%s: allocate failed", __FUNCTION__);
888 return -ENOMEM;
889 }
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700890
radhakrishnad7131e62015-10-13 12:32:30 +0530891 if(isUBwcEnabled(format, usage)) {
892 data.allocType |= private_handle_t::PRIV_FLAGS_UBWC_ALIGNED;
893 }
894
Naseer Ahmed29a26812012-06-14 00:56:20 -0700895 private_handle_t* hnd = new private_handle_t(data.fd, data.size,
Naseer Ahmed01d3fd32012-07-14 21:08:13 -0700896 data.allocType, 0, format,
897 alignedw, alignedh);
Saurabh Shah8f0ea6f2014-05-19 16:48:53 -0700898 hnd->base = (uint64_t) data.base;
Naseer Ahmed29a26812012-06-14 00:56:20 -0700899 hnd->offset = data.offset;
900 hnd->gpuaddr = 0;
901 *pHnd = hnd;
902 return 0;
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700903}
904
905void free_buffer(private_handle_t *hnd)
906{
Naseer Ahmed01d3fd32012-07-14 21:08:13 -0700907 gralloc::IAllocController* sAlloc =
908 gralloc::IAllocController::getInstance();
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700909 if (hnd && hnd->fd > 0) {
Naseer Ahmed01d3fd32012-07-14 21:08:13 -0700910 IMemAlloc* memalloc = sAlloc->getAllocator(hnd->flags);
Iliyan Malchev202a77d2012-06-11 14:41:12 -0700911 memalloc->free_buffer((void*)hnd->base, hnd->size, hnd->offset, hnd->fd);
912 }
913 if(hnd)
914 delete hnd;
915
916}
Sushil Chauhan65e26302015-01-14 10:48:57 -0800917
918// UBWC helper functions
919static bool isUBwcFormat(int format)
920{
921 // Explicitly defined UBWC formats
922 switch(format)
923 {
924 case HAL_PIXEL_FORMAT_YCbCr_420_SP_VENUS_UBWC:
Ramkumar Radhakrishnandb89d1f2016-03-07 20:15:52 -0800925 case HAL_PIXEL_FORMAT_YCbCr_420_TP10_UBWC:
Sushil Chauhan65e26302015-01-14 10:48:57 -0800926 return true;
927 default:
928 return false;
929 }
930}
931
932static bool isUBwcSupported(int format)
933{
934 // Existing HAL formats with UBWC support
935 switch(format)
936 {
Kaushik Kanetkar4cb337c2015-08-29 20:16:54 -0600937 case HAL_PIXEL_FORMAT_BGR_565:
Sushil Chauhan65e26302015-01-14 10:48:57 -0800938 case HAL_PIXEL_FORMAT_RGBA_8888:
Sushil Chauhan6686c802015-04-15 11:30:39 -0700939 case HAL_PIXEL_FORMAT_RGBX_8888:
Sushil Chauhan65e26302015-01-14 10:48:57 -0800940 case HAL_PIXEL_FORMAT_NV12_ENCODEABLE:
941 case HAL_PIXEL_FORMAT_YCbCr_420_SP_VENUS:
Ramkumar Radhakrishnandb89d1f2016-03-07 20:15:52 -0800942 case HAL_PIXEL_FORMAT_RGBA_1010102:
943 case HAL_PIXEL_FORMAT_RGBX_1010102:
Sushil Chauhan65e26302015-01-14 10:48:57 -0800944 return true;
945 default:
946 return false;
947 }
948}
949
950bool isUBwcEnabled(int format, int usage)
951{
Sushil Chauhan81594f62015-01-26 16:00:51 -0800952 // Allow UBWC, if client is using an explicitly defined UBWC pixel format.
953 if (isUBwcFormat(format))
954 return true;
955
Manikanta Kanamarlapudicb44d972016-02-03 17:49:55 +0530956 if ((usage & GRALLOC_USAGE_HW_VIDEO_ENCODER) &&
957 gralloc::IAllocController::getInstance()->isDisableUBWCForEncoder()) {
958 return false;
959 }
960
Sushil Chauhan7807d192015-08-13 10:10:48 -0700961 // Allow UBWC, if an OpenGL client sets UBWC usage flag and GPU plus MDP
962 // support the format. OR if a non-OpenGL client like Rotator, sets UBWC
963 // usage flag and MDP supports the format.
964 if ((usage & GRALLOC_USAGE_PRIVATE_ALLOC_UBWC) && isUBwcSupported(format)) {
965 bool enable = true;
966 // Query GPU for UBWC only if buffer is intended to be used by GPU.
967 if (usage & (GRALLOC_USAGE_HW_TEXTURE | GRALLOC_USAGE_HW_RENDER)) {
968 enable = AdrenoMemInfo::getInstance().isUBWCSupportedByGPU(format);
969 }
Sushil Chauhan81594f62015-01-26 16:00:51 -0800970 // Allow UBWC, only if CPU usage flags are not set
Sushil Chauhan7807d192015-08-13 10:10:48 -0700971 if (enable && !(usage & (GRALLOC_USAGE_SW_READ_MASK |
972 GRALLOC_USAGE_SW_WRITE_MASK))) {
Sushil Chauhan65e26302015-01-14 10:48:57 -0800973 return true;
974 }
975 }
976 return false;
977}
978
Ramkumar Radhakrishnandb89d1f2016-03-07 20:15:52 -0800979static void getYuvUBwcWidthHeight(int width, int height, int format,
Sushil Chauhan65e26302015-01-14 10:48:57 -0800980 int& aligned_w, int& aligned_h)
981{
982 switch (format)
983 {
984 case HAL_PIXEL_FORMAT_NV12_ENCODEABLE:
985 case HAL_PIXEL_FORMAT_YCbCr_420_SP_VENUS:
986 case HAL_PIXEL_FORMAT_YCbCr_420_SP_VENUS_UBWC:
987 aligned_w = VENUS_Y_STRIDE(COLOR_FMT_NV12_UBWC, width);
988 aligned_h = VENUS_Y_SCANLINES(COLOR_FMT_NV12_UBWC, height);
989 break;
Ramkumar Radhakrishnandb89d1f2016-03-07 20:15:52 -0800990 case HAL_PIXEL_FORMAT_YCbCr_420_TP10_UBWC:
991 aligned_w = VENUS_Y_STRIDE(COLOR_FMT_NV12_BPP10_UBWC, width);
992 aligned_h = VENUS_Y_SCANLINES(COLOR_FMT_NV12_BPP10_UBWC, height);
993 break;
Sushil Chauhan65e26302015-01-14 10:48:57 -0800994 default:
995 ALOGE("%s: Unsupported pixel format: 0x%x", __FUNCTION__, format);
996 aligned_w = 0;
997 aligned_h = 0;
998 break;
999 }
1000}
1001
Ramkumar Radhakrishnandb89d1f2016-03-07 20:15:52 -08001002static void getRgbUBwcBlockSize(int bpp, int& block_width, int& block_height)
Sushil Chauhan65e26302015-01-14 10:48:57 -08001003{
1004 block_width = 0;
1005 block_height = 0;
1006
1007 switch(bpp)
1008 {
1009 case 2:
1010 case 4:
1011 block_width = 16;
1012 block_height = 4;
1013 break;
1014 case 8:
1015 block_width = 8;
1016 block_height = 4;
1017 break;
1018 case 16:
1019 block_width = 4;
1020 block_height = 4;
1021 break;
1022 default:
1023 ALOGE("%s: Unsupported bpp: %d", __FUNCTION__, bpp);
1024 break;
1025 }
1026}
1027
Ramkumar Radhakrishnandb89d1f2016-03-07 20:15:52 -08001028static unsigned int getRgbUBwcMetaBufferSize(int width, int height, int bpp)
Sushil Chauhan65e26302015-01-14 10:48:57 -08001029{
1030 unsigned int size = 0;
1031 int meta_width, meta_height;
1032 int block_width, block_height;
1033
Ramkumar Radhakrishnandb89d1f2016-03-07 20:15:52 -08001034 getRgbUBwcBlockSize(bpp, block_width, block_height);
Sushil Chauhan65e26302015-01-14 10:48:57 -08001035
1036 if (!block_width || !block_height) {
1037 ALOGE("%s: Unsupported bpp: %d", __FUNCTION__, bpp);
1038 return size;
1039 }
1040
1041 // Align meta buffer height to 16 blocks
1042 meta_height = ALIGN(((height + block_height - 1) / block_height), 16);
1043
1044 // Align meta buffer width to 64 blocks
1045 meta_width = ALIGN(((width + block_width - 1) / block_width), 64);
1046
1047 // Align meta buffer size to 4K
Sushil Chauhanc85b65b2015-04-30 11:05:36 -07001048 size = ALIGN((meta_width * meta_height), 4096);
Sushil Chauhan65e26302015-01-14 10:48:57 -08001049 return size;
1050}
1051
1052static unsigned int getUBwcSize(int width, int height, int format,
1053 const int alignedw, const int alignedh) {
1054
1055 unsigned int size = 0;
1056 switch (format) {
Kaushik Kanetkar4cb337c2015-08-29 20:16:54 -06001057 case HAL_PIXEL_FORMAT_BGR_565:
Sushil Chauhan65e26302015-01-14 10:48:57 -08001058 size = alignedw * alignedh * 2;
Ramkumar Radhakrishnandb89d1f2016-03-07 20:15:52 -08001059 size += getRgbUBwcMetaBufferSize(width, height, 2);
Sushil Chauhan65e26302015-01-14 10:48:57 -08001060 break;
1061 case HAL_PIXEL_FORMAT_RGBA_8888:
Sushil Chauhan6686c802015-04-15 11:30:39 -07001062 case HAL_PIXEL_FORMAT_RGBX_8888:
Ramkumar Radhakrishnandb89d1f2016-03-07 20:15:52 -08001063 case HAL_PIXEL_FORMAT_RGBA_1010102:
1064 case HAL_PIXEL_FORMAT_RGBX_1010102:
Sushil Chauhan65e26302015-01-14 10:48:57 -08001065 size = alignedw * alignedh * 4;
Ramkumar Radhakrishnandb89d1f2016-03-07 20:15:52 -08001066 size += getRgbUBwcMetaBufferSize(width, height, 4);
Sushil Chauhan65e26302015-01-14 10:48:57 -08001067 break;
1068 case HAL_PIXEL_FORMAT_NV12_ENCODEABLE:
1069 case HAL_PIXEL_FORMAT_YCbCr_420_SP_VENUS:
1070 case HAL_PIXEL_FORMAT_YCbCr_420_SP_VENUS_UBWC:
1071 size = VENUS_BUFFER_SIZE(COLOR_FMT_NV12_UBWC, width, height);
1072 break;
Ramkumar Radhakrishnandb89d1f2016-03-07 20:15:52 -08001073 case HAL_PIXEL_FORMAT_YCbCr_420_TP10_UBWC:
1074 size = VENUS_BUFFER_SIZE(COLOR_FMT_NV12_BPP10_UBWC, width, height);
1075 break;
Sushil Chauhan65e26302015-01-14 10:48:57 -08001076 default:
1077 ALOGE("%s: Unsupported pixel format: 0x%x", __FUNCTION__, format);
1078 break;
1079 }
1080 return size;
1081}
Sushil Chauhan7dd3a432015-04-08 15:54:42 -07001082
Sushil Chauhanc85b65b2015-04-30 11:05:36 -07001083int getRgbDataAddress(private_handle_t* hnd, void** rgb_data)
Sushil Chauhan7dd3a432015-04-08 15:54:42 -07001084{
1085 int err = 0;
1086
1087 // This api is for RGB* formats
Kaushik Kanetkar4cb337c2015-08-29 20:16:54 -06001088 if (!isUncompressedRgbFormat(hnd->format)) {
Sushil Chauhan7dd3a432015-04-08 15:54:42 -07001089 return -EINVAL;
1090 }
1091
1092 // linear buffer
1093 if (!(hnd->flags & private_handle_t::PRIV_FLAGS_UBWC_ALIGNED)) {
Sushil Chauhanc85b65b2015-04-30 11:05:36 -07001094 *rgb_data = (void*)hnd->base;
Sushil Chauhan7dd3a432015-04-08 15:54:42 -07001095 return err;
1096 }
1097
1098 unsigned int meta_size = 0;
1099 switch (hnd->format) {
Kaushik Kanetkar4cb337c2015-08-29 20:16:54 -06001100 case HAL_PIXEL_FORMAT_BGR_565:
Ramkumar Radhakrishnandb89d1f2016-03-07 20:15:52 -08001101 meta_size = getRgbUBwcMetaBufferSize(hnd->width, hnd->height, 2);
Sushil Chauhan7dd3a432015-04-08 15:54:42 -07001102 break;
1103 case HAL_PIXEL_FORMAT_RGBA_8888:
1104 case HAL_PIXEL_FORMAT_RGBX_8888:
Ramkumar Radhakrishnandb89d1f2016-03-07 20:15:52 -08001105 meta_size = getRgbUBwcMetaBufferSize(hnd->width, hnd->height, 4);
Sushil Chauhan7dd3a432015-04-08 15:54:42 -07001106 break;
1107 default:
1108 ALOGE("%s:Unsupported RGB format: 0x%x", __FUNCTION__, hnd->format);
1109 err = -EINVAL;
1110 break;
1111 }
1112
Sushil Chauhanc85b65b2015-04-30 11:05:36 -07001113 *rgb_data = (void*)(hnd->base + meta_size);
Sushil Chauhan7dd3a432015-04-08 15:54:42 -07001114 return err;
1115}