blob: bbfde23c236b39711d5a6c72b8850292af47165b [file] [log] [blame]
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001/*
2 * Copyright (c) 2015 The Linux Foundation. All rights reserved.
3 *
4 * Previously licensed under the ISC license by Qualcomm Atheros, Inc.
5 *
6 *
7 * Permission to use, copy, modify, and/or distribute this software for
8 * any purpose with or without fee is hereby granted, provided that the
9 * above copyright notice and this permission notice appear in all
10 * copies.
11 *
12 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
13 * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
14 * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
15 * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
16 * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
17 * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
18 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
19 * PERFORMANCE OF THIS SOFTWARE.
20 */
21
22/*
23 * This file was originally distributed by Qualcomm Atheros, Inc.
24 * under proprietary terms before Copyright ownership was assigned
25 * to the Linux Foundation.
26 */
27
28#include <osdep.h>
29#include "a_types.h"
30#include "athdefs.h"
31#include "osapi_linux.h"
32#include "targcfg.h"
33#include "cdf_lock.h"
34#include "cdf_status.h"
35#include <cdf_atomic.h> /* cdf_atomic_read */
36#include <targaddrs.h>
37#include <bmi_msg.h>
38#include "hif_io32.h"
39#include <hif.h>
40#include <htc_services.h>
41#include "regtable.h"
42#define ATH_MODULE_NAME hif
43#include <a_debug.h>
44#include "hif_main.h"
45#include "hif_hw_version.h"
46#include "ce_api.h"
47#include "ce_tasklet.h"
48#include "cdf_trace.h"
49#include "cdf_status.h"
50#include "cds_api.h"
51#ifdef CONFIG_CNSS
52#include <net/cnss.h>
53#endif
54#include <cds_get_bin.h>
55#include "epping_main.h"
56#include "hif_debug.h"
57#include "mp_dev.h"
58#ifdef HIF_PCI
59#include "icnss_stub.h"
60#else
61#include <soc/qcom/icnss.h>
62#endif
63
64#ifndef REMOVE_PKT_LOG
65#include "pktlog_ac.h"
66#endif
67
68#define AGC_DUMP 1
69#define CHANINFO_DUMP 2
70#define BB_WATCHDOG_DUMP 3
71#ifdef CONFIG_ATH_PCIE_ACCESS_DEBUG
72#define PCIE_ACCESS_DUMP 4
73#endif
74
75void hif_dump(struct ol_softc *scn, uint8_t cmd_id, bool start)
76{
77 switch (cmd_id) {
78 case AGC_DUMP:
79 if (start)
80 priv_start_agc(scn);
81 else
82 priv_dump_agc(scn);
83 break;
84
85 case CHANINFO_DUMP:
86 if (start)
87 priv_start_cap_chaninfo(scn);
88 else
89 priv_dump_chaninfo(scn);
90 break;
91
92 case BB_WATCHDOG_DUMP:
93 priv_dump_bbwatchdog(scn);
94 break;
95
96#ifdef CONFIG_ATH_PCIE_ACCESS_DEBUG
97 case PCIE_ACCESS_DUMP:
98 hif_target_dump_access_log();
99 break;
100#endif
101 default:
102 HIF_ERROR("%s: Invalid htc dump command", __func__);
103 break;
104 }
105}
106
107/**
108 * hif_shut_down_device() - hif_shut_down_device
109 *
110 * SThis fucntion shuts down the device
111 *
112 * @scn: ol_softc
113 *
114 * Return: void
115 */
116void hif_shut_down_device(struct ol_softc *scn)
117{
118 if (scn && scn->hif_hdl) {
119 struct HIF_CE_state *hif_state =
120 (struct HIF_CE_state *)scn->hif_hdl;
121
122 hif_stop(scn);
123 cdf_mem_free(hif_state);
124 scn->hif_hdl = NULL;
125 }
126
127}
128
129
130
131/**
132 * hif_cancel_deferred_target_sleep() - cancel deferred target sleep
133 *
134 * This function cancels the defered target sleep
135 *
136 * @scn: ol_softc
137 *
138 * Return: void
139 */
140void hif_cancel_deferred_target_sleep(struct ol_softc *scn)
141{
142 hif_pci_cancel_deferred_target_sleep(scn);
143}
144
145/**
146 * hif_get_target_id(): hif_get_target_id
147 *
148 * Return the virtual memory base address to the caller
149 *
150 * @scn: ol_softc
151 *
152 * Return: A_target_id_t
153 */
154A_target_id_t hif_get_target_id(struct ol_softc *scn)
155{
156 return scn->mem;
157}
158
159/**
160 * hif_set_target_sleep(): hif_set_target_sleep
161 * @scn: scn
162 * @sleep_ok: sleep_ok
163 * @wait_for_it: wait
164 *
165 * Return: void
166 */
167void hif_set_target_sleep(struct ol_softc *scn,
168 bool sleep_ok, bool wait_for_it)
169{
170 hif_target_sleep_state_adjust(scn,
171 sleep_ok, wait_for_it);
172}
173
174/**
175 * hif_target_forced_awake(): hif_target_forced_awake
176 * @scn: scn
177 *
178 * Return: bool
179 */
180bool hif_target_forced_awake(struct ol_softc *scn)
181{
182 A_target_id_t addr = scn->mem;
183 bool awake;
184 bool forced_awake;
185
186 awake = hif_targ_is_awake(scn, addr);
187
188 forced_awake =
189 !!(hif_read32_mb
190 (addr + PCIE_LOCAL_BASE_ADDRESS +
191 PCIE_SOC_WAKE_ADDRESS) & PCIE_SOC_WAKE_V_MASK);
192
193 return awake && forced_awake;
194}
195
196/**
197 * hif_fw_interrupt_handler(): FW interrupt handler
198 *
199 * This function is the FW interrupt handlder
200 *
201 * @irq: irq number
202 * @arg: the user pointer
203 *
204 * Return: bool
205 */
206#ifndef QCA_WIFI_3_0
207irqreturn_t hif_fw_interrupt_handler(int irq, void *arg)
208{
209 struct ol_softc *scn = arg;
210 struct HIF_CE_state *hif_state = (struct HIF_CE_state *)scn->hif_hdl;
211 uint32_t fw_indicator_address, fw_indicator;
212
213 A_TARGET_ACCESS_BEGIN_RET(scn);
214
215 fw_indicator_address = hif_state->fw_indicator_address;
216 /* For sudden unplug this will return ~0 */
217 fw_indicator = A_TARGET_READ(scn, fw_indicator_address);
218
219 if ((fw_indicator != ~0) && (fw_indicator & FW_IND_EVENT_PENDING)) {
220 /* ACK: clear Target-side pending event */
221 A_TARGET_WRITE(scn, fw_indicator_address,
222 fw_indicator & ~FW_IND_EVENT_PENDING);
223 A_TARGET_ACCESS_END_RET(scn);
224
225 if (hif_state->started) {
226 /* Alert the Host-side service thread */
227 atomic_set(&hif_state->fw_event_pending, 1);
228 hif_completion_thread(hif_state);
229 } else {
230 /*
231 * Probable Target failure before we're prepared
232 * to handle it. Generally unexpected.
233 */
234 AR_DEBUG_PRINTF(ATH_DEBUG_ERR,
235 ("%s: Early firmware event indicated\n",
236 __func__));
237 }
238 } else {
239 A_TARGET_ACCESS_END_RET(scn);
240 }
241
242 return ATH_ISR_SCHED;
243}
244#else
245irqreturn_t hif_fw_interrupt_handler(int irq, void *arg)
246{
247 return ATH_ISR_SCHED;
248}
249#endif /* #ifdef QCA_WIFI_3_0 */
250
251/**
252 * hif_get_targetdef(): hif_get_targetdef
253 * @scn: scn
254 *
255 * Return: void *
256 */
257void *hif_get_targetdef(struct ol_softc *scn)
258{
259 return scn->targetdef;
260}
261
262/**
263 * hif_vote_link_down(): unvote for link up
264 *
265 * Call hif_vote_link_down to release a previous request made using
266 * hif_vote_link_up. A hif_vote_link_down call should only be made
267 * after a corresponding hif_vote_link_up, otherwise you could be
268 * negating a vote from another source. When no votes are present
269 * hif will not guarantee the linkstate after hif_bus_suspend.
270 *
271 * SYNCHRONIZE WITH hif_vote_link_up by only calling in MC thread
272 * and initialization deinitialization sequencences.
273 *
274 * Return: n/a
275 */
276void hif_vote_link_down(void)
277{
278 struct ol_softc *scn = cds_get_context(CDF_MODULE_ID_HIF);
279 CDF_BUG(scn);
280
281 scn->linkstate_vote--;
282 if (scn->linkstate_vote == 0)
283 hif_bus_prevent_linkdown(false);
284}
285
286/**
287 * hif_vote_link_up(): vote to prevent bus from suspending
288 *
289 * Makes hif guarantee that fw can message the host normally
290 * durring suspend.
291 *
292 * SYNCHRONIZE WITH hif_vote_link_up by only calling in MC thread
293 * and initialization deinitialization sequencences.
294 *
295 * Return: n/a
296 */
297void hif_vote_link_up(void)
298{
299 struct ol_softc *scn = cds_get_context(CDF_MODULE_ID_HIF);
300 CDF_BUG(scn);
301
302 scn->linkstate_vote++;
303 if (scn->linkstate_vote == 1)
304 hif_bus_prevent_linkdown(true);
305}
306
307/**
308 * hif_can_suspend_link(): query if hif is permitted to suspend the link
309 *
310 * Hif will ensure that the link won't be suspended if the upperlayers
311 * don't want it to.
312 *
313 * SYNCHRONIZATION: MC thread is stopped before bus suspend thus
314 * we don't need extra locking to ensure votes dont change while
315 * we are in the process of suspending or resuming.
316 *
317 * Return: false if hif will guarantee link up durring suspend.
318 */
319bool hif_can_suspend_link(void)
320{
321 struct ol_softc *scn = cds_get_context(CDF_MODULE_ID_HIF);
322 CDF_BUG(scn);
323
324 return scn->linkstate_vote == 0;
325}
326
327/**
328 * hif_hia_item_address(): hif_hia_item_address
329 * @target_type: target_type
330 * @item_offset: item_offset
331 *
332 * Return: n/a
333 */
334uint32_t hif_hia_item_address(uint32_t target_type, uint32_t item_offset)
335{
336 switch (target_type) {
337 case TARGET_TYPE_AR6002:
338 return AR6002_HOST_INTEREST_ADDRESS + item_offset;
339 case TARGET_TYPE_AR6003:
340 return AR6003_HOST_INTEREST_ADDRESS + item_offset;
341 case TARGET_TYPE_AR6004:
342 return AR6004_HOST_INTEREST_ADDRESS + item_offset;
343 case TARGET_TYPE_AR6006:
344 return AR6006_HOST_INTEREST_ADDRESS + item_offset;
345 case TARGET_TYPE_AR9888:
346 return AR9888_HOST_INTEREST_ADDRESS + item_offset;
347 case TARGET_TYPE_AR6320:
348 case TARGET_TYPE_AR6320V2:
349 return AR6320_HOST_INTEREST_ADDRESS + item_offset;
350 case TARGET_TYPE_QCA6180:
351 return QCA6180_HOST_INTEREST_ADDRESS + item_offset;
352 case TARGET_TYPE_ADRASTEA:
353 /* ADRASTEA doesn't have a host interest address */
354 ASSERT(0);
355 return 0;
356 default:
357 ASSERT(0);
358 return 0;
359 }
360}
361
362/**
363 * hif_max_num_receives_reached() - check max receive is reached
364 * @count: unsigned int.
365 *
366 * Output check status as bool
367 *
368 * Return: bool
369 */
370bool hif_max_num_receives_reached(unsigned int count)
371{
372 if (WLAN_IS_EPPING_ENABLED(cds_get_conparam()))
373 return count > 120;
374 else
375 return count > MAX_NUM_OF_RECEIVES;
376}
377
378/**
379 * init_buffer_count() - initial buffer count
380 * @maxSize: cdf_size_t
381 *
382 * routine to modify the initial buffer count to be allocated on an os
383 * platform basis. Platform owner will need to modify this as needed
384 *
385 * Return: cdf_size_t
386 */
387cdf_size_t init_buffer_count(cdf_size_t maxSize)
388{
389 return maxSize;
390}
391
392/**
393 * hif_init_cdf_ctx(): hif_init_cdf_ctx
394 * @hif_ctx: hif_ctx
395 *
396 * Return: int
397 */
398int hif_init_cdf_ctx(void *hif_ctx)
399{
400 cdf_device_t cdf_ctx;
401 struct ol_softc *scn = (struct ol_softc *)hif_ctx;
402
403 cdf_ctx = cds_get_context(CDF_MODULE_ID_CDF_DEVICE);
404 if (!cdf_ctx) {
405 HIF_ERROR("%s: CDF is NULL", __func__);
406 return -ENOMEM;
407 }
408
409 cdf_ctx->drv = &scn->aps_osdev;
410 cdf_ctx->drv_hdl = scn->aps_osdev.bdev;
411 cdf_ctx->dev = scn->aps_osdev.device;
412 scn->cdf_dev = cdf_ctx;
413 return 0;
414}
415
416/**
417 * hif_deinit_cdf_ctx(): hif_deinit_cdf_ctx
418 * @hif_ctx: hif_ctx
419 *
420 * Return: void
421 */
422void hif_deinit_cdf_ctx(void *hif_ctx)
423{
424 struct ol_softc *scn = (struct ol_softc *)hif_ctx;
425
426 if (scn == NULL || !scn->cdf_dev)
427 return;
428 scn->cdf_dev = NULL;
429}
430
431/**
432 * hif_save_htc_htt_config_endpoint():
433 * hif_save_htc_htt_config_endpoint
434 * @htc_endpoint: htc_endpoint
435 *
436 * Return: void
437 */
438void hif_save_htc_htt_config_endpoint(int htc_endpoint)
439{
440 struct ol_softc *scn = cds_get_context(CDF_MODULE_ID_HIF);
441
442 if (!scn) {
443 HIF_ERROR("%s: error: scn or scn->hif_sc is NULL!",
444 __func__);
445 return;
446 }
447
448 scn->htc_endpoint = htc_endpoint;
449}
450
451/**
452 * hif_get_hw_name(): get a human readable name for the hardware
453 *
454 * Return: human readible name for the underlying wifi hardware.
455 */
456const char *hif_get_hw_name(struct ol_softc *scn)
457{
458 int i;
459 for (i = 0; i < ARRAY_SIZE(qwlan_hw_list); i++) {
460 if (scn->target_version == qwlan_hw_list[i].id &&
461 scn->target_revision == qwlan_hw_list[i].subid) {
462 return qwlan_hw_list[i].name;
463 }
464 }
465
466 return "Unknown Device";
467}
468
469/**
470 * hif_get_hw_info(): hif_get_hw_info
471 * @scn: scn
472 * @version: version
473 * @revision: revision
474 *
475 * Return: n/a
476 */
477void hif_get_hw_info(void *scn, u32 *version, u32 *revision,
478 const char **target_name)
479{
480 *version = ((struct ol_softc *)scn)->target_version;
481 *revision = ((struct ol_softc *)scn)->target_revision;
482 *target_name = hif_get_hw_name((struct ol_softc *)scn);
483}
484
485/**
486 * hif_set_fw_info(): set the target_fw_version
487 * @scn: scn
488 * @target_fw_version: target_fw_version
489 *
490 * Return: n/a
491 */
492void hif_set_fw_info(void *scn, uint32_t target_fw_version)
493{
494 ((struct ol_softc *)scn)->target_fw_version = target_fw_version;
495}
496
497/**
498 * hif_open(): hif_open
499 *
500 * Return: scn
501 */
502CDF_STATUS hif_open(void)
503{
504 struct ol_softc *scn;
505 v_CONTEXT_t cds_context;
506 CDF_STATUS status = CDF_STATUS_SUCCESS;
507
508 cds_context = cds_get_global_context();
509 status = cds_alloc_context(cds_context, CDF_MODULE_ID_HIF,
510 (void **)&scn, sizeof(*scn));
511 if (status != CDF_STATUS_SUCCESS) {
512 HIF_ERROR("%s: cannot alloc ol_sc", __func__);
513 return status;
514 }
515
516 cdf_mem_zero(scn, sizeof(*scn));
517 scn->enableuartprint = 0;
518 scn->enablefwlog = 0;
519 scn->max_no_of_peers = 1;
520 scn->pkt_log_init = false;
521 cdf_atomic_init(&scn->wow_done);
522 cdf_atomic_init(&scn->active_tasklet_cnt);
523 cdf_atomic_init(&scn->link_suspended);
524 cdf_atomic_init(&scn->tasklet_from_intr);
525 init_waitqueue_head(&scn->aps_osdev.event_queue);
526 cdf_spinlock_init(&scn->target_lock);
527 scn->linkstate_vote = 0;
528 return status;
529}
530
531/**
532 * hif_close(): hif_close
533 * @hif_ctx: hif_ctx
534 *
535 * Return: n/a
536 */
537void hif_close(void *hif_ctx)
538{
539 struct ol_softc *scn = hif_ctx;
540
541 if (scn == NULL) {
542 HIF_ERROR("%s: ol_softc is NULL", __func__);
543 return;
544 }
545
546 if (scn->athdiag_procfs_inited) {
547 athdiag_procfs_remove();
548 scn->athdiag_procfs_inited = false;
549 }
550
551 if (scn->hif_hdl) {
552 cdf_mem_free(scn->hif_hdl);
553 scn->hif_hdl = NULL;
554 }
555 hif_bus_close(scn);
556 cds_free_context(cds_get_global_context(),
557 CDF_MODULE_ID_HIF, hif_ctx);
558}
559
560/**
561 * hif_enable(): hif_enable
562 * @hif_ctx: hif_ctx
563 * @dev: dev
564 * @bdev: bus dev
565 * @bid: bus ID
566 * @bus_type: bus type
567 * @type: enable type
568 *
569 * Return: CDF_STATUS
570 */
571CDF_STATUS hif_enable(void *hif_ctx, struct device *dev,
572 void *bdev, const hif_bus_id *bid,
573 enum ath_hal_bus_type bus_type,
574 enum hif_enable_type type)
575{
576 CDF_STATUS status;
577 struct ol_softc *scn = hif_ctx;
578
579 if (scn == NULL) {
580 HIF_ERROR("%s: hif_ctx = NULL", __func__);
581 return CDF_STATUS_E_NULL_VALUE;
582 }
583
584 status = hif_bus_open(scn, bus_type);
585 if (status != CDF_STATUS_SUCCESS) {
586 HIF_ERROR("%s: hif_bus_open error = %d, bus_type = %d",
587 __func__, status, bus_type);
588 return status;
589 }
590
591 status = hif_enable_bus(scn, dev, bdev, bid, type);
592 if (status != CDF_STATUS_SUCCESS) {
593 hif_bus_close(scn);
594 HIF_ERROR("%s: hif_enable_bus error = %d",
595 __func__, status);
596 return status;
597 }
598
599 if (ADRASTEA_BU)
600 hif_vote_link_up();
601
602 if (hif_config_ce(scn)) {
603 HIF_ERROR("%s: Target probe failed.", __func__);
604 hif_disable_bus(scn->aps_osdev.bdev);
605 hif_bus_close(scn);
606 status = CDF_STATUS_E_FAILURE;
607 return status;
608 }
609 /*
610 * Flag to avoid potential unallocated memory access from MSI
611 * interrupt handler which could get scheduled as soon as MSI
612 * is enabled, i.e to take care of the race due to the order
613 * in where MSI is enabled before the memory, that will be
614 * in interrupt handlers, is allocated.
615 */
616
617#ifdef HIF_PCI
618 status = hif_configure_irq(scn->hif_sc);
619 if (status < 0) {
620 HIF_ERROR("%s: ERROR - configure_IRQ_and_CE failed, status = %d",
621 __func__, status);
622 return CDF_STATUS_E_FAILURE;
623 }
624#endif
625
626 scn->hif_init_done = true;
627
628 HIF_TRACE("%s: X OK", __func__);
629
630 return CDF_STATUS_SUCCESS;
631}
632
633/**
634 * hif_pktlogmod_exit(): hif_pktlogmod_exit
635 * @scn: scn
636 *
637 * Return: n/a
638 */
639#ifndef REMOVE_PKT_LOG
640void hif_pktlogmod_exit(void *hif_ctx)
641{
642 struct ol_softc *scn = hif_ctx;
643
644 if (scn && cds_get_conparam() != CDF_FTM_MODE &&
645 !WLAN_IS_EPPING_ENABLED(cds_get_conparam()) && scn->pkt_log_init) {
646 pktlogmod_exit(scn);
647 scn->pkt_log_init = false;
648 }
649}
650#else
651void hif_pktlogmod_exit(void *hif_ctx)
652{
653}
654#endif
655
656#if ((!defined(QCA_WIFI_3_0_IHELIUM) && !defined(QCA_WIFI_3_0_ADRASTEA)) || defined(CONFIG_ICNSS))
657static inline void cnss_pcie_notify_q6(void)
658{
659 return;
660}
661#endif
662
663/**
664 * hif_wlan_disable(): call the platform driver to disable wlan
665 *
666 * This function passes the con_mode to platform driver to disable
667 * wlan.
668 *
669 * Return: void
670 */
671void hif_wlan_disable(void)
672{
673 enum icnss_driver_mode mode;
674 uint32_t con_mode = cds_get_conparam();
675
676 switch (con_mode) {
677 case CDF_FTM_MODE:
678 mode = ICNSS_FTM;
679 break;
680 case CDF_EPPING_MODE:
681 mode = ICNSS_EPPING;
682 break;
683 default:
684 mode = ICNSS_MISSION;
685 break;
686 }
687
688 icnss_wlan_disable(mode);
689}
690
691void hif_disable(void *hif_ctx, enum hif_disable_type type)
692{
693 struct ol_softc *scn = hif_ctx;
694
695 if (!scn)
696 return;
697
698 hif_nointrs(scn);
699 if (scn->hif_init_done == false)
700 hif_shut_down_device(scn);
701 else
702 hif_stop(scn);
703
704 if (ADRASTEA_BU)
705 hif_vote_link_down();
706
707 if (scn->aps_osdev.bdev)
708 hif_disable_bus(scn->aps_osdev.bdev);
709
710 if (IHELIUM_BU) {
711 cnss_pcie_notify_q6();
712 HIF_TRACE("%s: cnss_pcie_notify_q6 done, notice_send= %d",
713 __func__, scn->notice_send);
714 }
715
716 hif_wlan_disable();
717
718 scn->notice_send = false;
719
720 HIF_INFO("%s: X", __func__);
721}
722
723
724/**
725 * hif_crash_shutdown_dump_ce_register():
726 * hif_crash_shutdown_dump_ce_register
727 * @hif_ctx: hif_ctx
728 *
729 * Return: n/a
730 */
731#if defined(TARGET_RAMDUMP_AFTER_KERNEL_PANIC) \
732&& defined(HIF_PCI) && defined(DEBUG)
733
734static void hif_crash_shutdown_dump_ce_register(void *hif_ctx)
735{
736 struct ol_softc *scn = hif_ctx;
737
738 if (hif_check_soc_status(scn)
739 || dump_ce_register(scn)) {
740 return;
741 }
742
743 dump_ce_debug_register(scn);
744}
745
746/**
747 * hif_crash_shutdown(): hif_crash_shutdown
748 *
749 * This function is called by the platform driver to dump CE registers
750 *
751 * @hif_ctx: hif_ctx
752 *
753 * Return: n/a
754 */
755void hif_crash_shutdown(void *hif_ctx)
756{
757 struct ol_softc *scn = hif_ctx;
758 struct HIF_CE_state *hif_state;
759
760 if (!scn)
761 return;
762
763 hif_state = (struct HIF_CE_state *)scn->hif_hdl;
764 if (!hif_state)
765 return;
766
767
768 if (OL_TRGET_STATUS_RESET == scn->target_status) {
769 HIF_INFO_MED("%s: Target is already asserted, ignore!",
770 __func__);
771 return;
772 }
773
774 if (cds_is_load_unload_in_progress()) {
775 HIF_ERROR("%s: Load/unload is in progress, ignore!", __func__);
776 return;
777 }
778
779 cdf_spin_lock_irqsave(&scn->target_lock);
780
781 hif_crash_shutdown_dump_ce_register(hif_ctx);
782
783 if (ol_copy_ramdump(scn))
784 goto out;
785
786 HIF_INFO_MED("%s: RAM dump collecting completed!", __func__);
787
788out:
789 cdf_spin_unlock_irqrestore(&scn->target_lock);
790 return;
791}
792#else
793void hif_crash_shutdown(void *hif_ctx)
794{
795 HIF_INFO_MED("%s: Collecting target RAM dump disabled",
796 __func__);
797 return;
798}
799#endif /* TARGET_RAMDUMP_AFTER_KERNEL_PANIC */
800
801#ifdef QCA_WIFI_3_0
802/**
803 * hif_check_fw_reg(): hif_check_fw_reg
804 * @scn: scn
805 * @state:
806 *
807 * Return: int
808 */
809int hif_check_fw_reg(struct ol_softc *scn)
810{
811 return 0;
812}
813#endif
814
815#ifdef IPA_OFFLOAD
816/**
817 * hif_read_phy_mem_base(): hif_read_phy_mem_base
818 * @scn: scn
819 * @phy_mem_base: physical mem base
820 *
821 * Return: n/a
822 */
823void hif_read_phy_mem_base(struct ol_softc *scn, cdf_dma_addr_t *phy_mem_base)
824{
825 *phy_mem_base = scn->mem_pa;
826}
827#endif /* IPA_OFFLOAD */
828
829/**
830 * hif_get_device_type(): hif_get_device_type
831 * @device_id: device_id
832 * @revision_id: revision_id
833 * @hif_type: returned hif_type
834 * @target_type: returned target_type
835 *
836 * Return: int
837 */
838int hif_get_device_type(uint32_t device_id,
839 uint32_t revision_id,
840 uint32_t *hif_type, uint32_t *target_type)
841{
842 int ret = 0;
843
844 switch (device_id) {
845#ifdef QCA_WIFI_3_0_ADRASTEA
846 case ADRASTEA_DEVICE_ID:
847 case ADRASTEA_DEVICE_ID_P2_E12:
848
849 *hif_type = HIF_TYPE_ADRASTEA;
850 *target_type = TARGET_TYPE_ADRASTEA;
851 break;
852#else
853 case QCA6180_DEVICE_ID:
854 *hif_type = HIF_TYPE_QCA6180;
855 *target_type = TARGET_TYPE_QCA6180;
856 break;
857#endif
858
859 case AR9888_DEVICE_ID:
860 *hif_type = HIF_TYPE_AR9888;
861 *target_type = TARGET_TYPE_AR9888;
862 break;
863
864 case AR6320_DEVICE_ID:
865 switch (revision_id) {
866 case AR6320_FW_1_1:
867 case AR6320_FW_1_3:
868 *hif_type = HIF_TYPE_AR6320;
869 *target_type = TARGET_TYPE_AR6320;
870 break;
871
872 case AR6320_FW_2_0:
873 case AR6320_FW_3_0:
874 case AR6320_FW_3_2:
875 *hif_type = HIF_TYPE_AR6320V2;
876 *target_type = TARGET_TYPE_AR6320V2;
877 break;
878
879 default:
880 HIF_ERROR("%s: error - dev_id = 0x%x, rev_id = 0x%x",
881 __func__, device_id, revision_id);
882 ret = -ENODEV;
883 goto end;
884 }
885 break;
886
887 default:
888 HIF_ERROR("%s: Unsupported device ID!", __func__);
889 ret = -ENODEV;
890 break;
891 }
892end:
893 return ret;
894}