Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 1 | /* |
Nirav Shah | eb017be | 2018-02-15 11:20:58 +0530 | [diff] [blame] | 2 | * Copyright (c) 2011, 2014-2018 The Linux Foundation. All rights reserved. |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 3 | * |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 4 | * Permission to use, copy, modify, and/or distribute this software for |
| 5 | * any purpose with or without fee is hereby granted, provided that the |
| 6 | * above copyright notice and this permission notice appear in all |
| 7 | * copies. |
| 8 | * |
| 9 | * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL |
| 10 | * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED |
| 11 | * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE |
| 12 | * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL |
| 13 | * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR |
| 14 | * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER |
| 15 | * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR |
| 16 | * PERFORMANCE OF THIS SOFTWARE. |
| 17 | */ |
| 18 | |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 19 | #ifndef _HTT_INTERNAL__H_ |
| 20 | #define _HTT_INTERNAL__H_ |
| 21 | |
| 22 | #include <athdefs.h> /* A_STATUS */ |
Nirav Shah | cbc6d72 | 2016-03-01 16:24:53 +0530 | [diff] [blame] | 23 | #include <qdf_nbuf.h> /* qdf_nbuf_t */ |
Anurag Chouhan | c554842 | 2016-02-24 18:33:27 +0530 | [diff] [blame] | 24 | #include <qdf_util.h> /* qdf_assert */ |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 25 | #include <htc_api.h> /* HTC_PACKET */ |
| 26 | |
| 27 | #include <htt_types.h> |
| 28 | |
| 29 | #ifndef offsetof |
| 30 | #define offsetof(type, field) ((size_t)(&((type *)0)->field)) |
| 31 | #endif |
| 32 | |
| 33 | #undef MS |
| 34 | #define MS(_v, _f) (((_v) & _f ## _MASK) >> _f ## _LSB) |
| 35 | #undef SM |
| 36 | #define SM(_v, _f) (((_v) << _f ## _LSB) & _f ## _MASK) |
| 37 | #undef WO |
| 38 | #define WO(_f) ((_f ## _OFFSET) >> 2) |
| 39 | |
| 40 | #define GET_FIELD(_addr, _f) MS(*((A_UINT32 *)(_addr) + WO(_f)), _f) |
| 41 | |
| 42 | #include <rx_desc.h> |
| 43 | #include <wal_rx_desc.h> /* struct rx_attention, etc */ |
| 44 | |
| 45 | struct htt_host_fw_desc_base { |
| 46 | union { |
| 47 | struct fw_rx_desc_base val; |
| 48 | A_UINT32 dummy_pad; /* make sure it is DOWRD aligned */ |
| 49 | } u; |
| 50 | }; |
| 51 | |
Himanshu Agarwal | 053d455 | 2016-07-20 20:00:34 +0530 | [diff] [blame] | 52 | |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 53 | /* |
| 54 | * This struct defines the basic descriptor information used by host, |
| 55 | * which is written either by the 11ac HW MAC into the host Rx data |
| 56 | * buffer ring directly or generated by FW and copied from Rx indication |
| 57 | */ |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 58 | struct htt_host_rx_desc_base { |
| 59 | struct htt_host_fw_desc_base fw_desc; |
| 60 | struct rx_attention attention; |
| 61 | struct rx_frag_info frag_info; |
| 62 | struct rx_mpdu_start mpdu_start; |
| 63 | struct rx_msdu_start msdu_start; |
| 64 | struct rx_msdu_end msdu_end; |
| 65 | struct rx_mpdu_end mpdu_end; |
| 66 | struct rx_ppdu_start ppdu_start; |
| 67 | struct rx_ppdu_end ppdu_end; |
Manjunathappa Prakash | 70ea728 | 2016-06-17 15:42:45 -0700 | [diff] [blame] | 68 | #ifdef QCA_WIFI_3_0_ADRASTEA |
| 69 | /* Increased to support some of offload features */ |
| 70 | #define RX_HTT_HDR_STATUS_LEN 256 |
| 71 | #else |
| 72 | #define RX_HTT_HDR_STATUS_LEN 64 |
| 73 | #endif |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 74 | char rx_hdr_status[RX_HTT_HDR_STATUS_LEN]; |
| 75 | }; |
| 76 | |
Himanshu Agarwal | 5f5e166 | 2017-05-24 12:37:09 +0530 | [diff] [blame] | 77 | #define RX_DESC_ATTN_MPDU_LEN_ERR_BIT 0x08000000 |
| 78 | |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 79 | #define RX_STD_DESC_ATTN_OFFSET \ |
| 80 | (offsetof(struct htt_host_rx_desc_base, attention)) |
| 81 | #define RX_STD_DESC_FRAG_INFO_OFFSET \ |
| 82 | (offsetof(struct htt_host_rx_desc_base, frag_info)) |
| 83 | #define RX_STD_DESC_MPDU_START_OFFSET \ |
| 84 | (offsetof(struct htt_host_rx_desc_base, mpdu_start)) |
| 85 | #define RX_STD_DESC_MSDU_START_OFFSET \ |
| 86 | (offsetof(struct htt_host_rx_desc_base, msdu_start)) |
| 87 | #define RX_STD_DESC_MSDU_END_OFFSET \ |
| 88 | (offsetof(struct htt_host_rx_desc_base, msdu_end)) |
| 89 | #define RX_STD_DESC_MPDU_END_OFFSET \ |
| 90 | (offsetof(struct htt_host_rx_desc_base, mpdu_end)) |
| 91 | #define RX_STD_DESC_PPDU_START_OFFSET \ |
| 92 | (offsetof(struct htt_host_rx_desc_base, ppdu_start)) |
| 93 | #define RX_STD_DESC_PPDU_END_OFFSET \ |
| 94 | (offsetof(struct htt_host_rx_desc_base, ppdu_end)) |
| 95 | #define RX_STD_DESC_HDR_STATUS_OFFSET \ |
| 96 | (offsetof(struct htt_host_rx_desc_base, rx_hdr_status)) |
| 97 | |
| 98 | #define RX_STD_DESC_FW_MSDU_OFFSET \ |
| 99 | (offsetof(struct htt_host_rx_desc_base, fw_desc)) |
| 100 | |
| 101 | #define RX_STD_DESC_SIZE (sizeof(struct htt_host_rx_desc_base)) |
| 102 | |
| 103 | #define RX_DESC_ATTN_OFFSET32 (RX_STD_DESC_ATTN_OFFSET >> 2) |
| 104 | #define RX_DESC_FRAG_INFO_OFFSET32 (RX_STD_DESC_FRAG_INFO_OFFSET >> 2) |
| 105 | #define RX_DESC_MPDU_START_OFFSET32 (RX_STD_DESC_MPDU_START_OFFSET >> 2) |
| 106 | #define RX_DESC_MSDU_START_OFFSET32 (RX_STD_DESC_MSDU_START_OFFSET >> 2) |
| 107 | #define RX_DESC_MSDU_END_OFFSET32 (RX_STD_DESC_MSDU_END_OFFSET >> 2) |
| 108 | #define RX_DESC_MPDU_END_OFFSET32 (RX_STD_DESC_MPDU_END_OFFSET >> 2) |
| 109 | #define RX_DESC_PPDU_START_OFFSET32 (RX_STD_DESC_PPDU_START_OFFSET >> 2) |
| 110 | #define RX_DESC_PPDU_END_OFFSET32 (RX_STD_DESC_PPDU_END_OFFSET >> 2) |
| 111 | #define RX_DESC_HDR_STATUS_OFFSET32 (RX_STD_DESC_HDR_STATUS_OFFSET >> 2) |
| 112 | |
| 113 | #define RX_STD_DESC_SIZE_DWORD (RX_STD_DESC_SIZE >> 2) |
| 114 | |
| 115 | /* |
| 116 | * Make sure there is a minimum headroom provided in the rx netbufs |
| 117 | * for use by the OS shim and OS and rx data consumers. |
| 118 | */ |
| 119 | #define HTT_RX_BUF_OS_MIN_HEADROOM 32 |
| 120 | #define HTT_RX_STD_DESC_RESERVATION \ |
| 121 | ((HTT_RX_BUF_OS_MIN_HEADROOM > RX_STD_DESC_SIZE) ? \ |
| 122 | HTT_RX_BUF_OS_MIN_HEADROOM : RX_STD_DESC_SIZE) |
| 123 | #define HTT_RX_DESC_RESERVATION32 \ |
| 124 | (HTT_RX_STD_DESC_RESERVATION >> 2) |
| 125 | |
| 126 | #define HTT_RX_DESC_ALIGN_MASK 7 /* 8-byte alignment */ |
Manjunathappa Prakash | c8e7564 | 2016-06-03 19:32:27 -0700 | [diff] [blame] | 127 | |
Govind Singh | d79e134 | 2015-11-03 16:20:02 +0530 | [diff] [blame] | 128 | #ifdef DEBUG_RX_RING_BUFFER |
Manjunathappa Prakash | c8e7564 | 2016-06-03 19:32:27 -0700 | [diff] [blame] | 129 | #define NBUF_MAP_ID(skb) \ |
Manjunathappa Prakash | 794366e | 2017-11-07 09:59:21 -0800 | [diff] [blame] | 130 | (((struct qdf_nbuf_cb *)((skb)->cb))->u.rx.dev.priv_cb_m.map_index) |
Manjunathappa Prakash | c8e7564 | 2016-06-03 19:32:27 -0700 | [diff] [blame] | 131 | |
Leo Chang | 9872676 | 2016-10-28 11:07:18 -0700 | [diff] [blame] | 132 | #ifdef MSM_PLATFORM |
| 133 | #define HTT_ADDRESS_MASK 0xfffffffffffffffe |
| 134 | #else |
| 135 | #define HTT_ADDRESS_MASK 0xfffffffe |
| 136 | #endif /* MSM_PLATFORM */ |
| 137 | |
Orhan K AKYILDIZ | 0c1b6bf | 2016-11-28 18:47:24 -0800 | [diff] [blame] | 138 | /** |
| 139 | * rx_buf_debug: rx_ring history |
| 140 | * |
| 141 | * There are three types of entries in history: |
| 142 | * 1) rx-descriptors posted (and received) |
| 143 | * Both of these events are stored on the same entry |
| 144 | * @paddr : physical address posted on the ring |
| 145 | * @nbuf : virtual address of nbuf containing data |
| 146 | * @ndata : virual address of data (corresponds to physical address) |
| 147 | * @posted: time-stamp when the buffer is posted to the ring |
| 148 | * @recved: time-stamp when the buffer is received (rx_in_order_ind) |
| 149 | * : or 0, if the buffer has not been received yet |
| 150 | * 2) ring alloc-index (fill-index) updates |
| 151 | * @paddr : = 0 |
| 152 | * @nbuf : = 0 |
| 153 | * @ndata : = 0 |
| 154 | * posted : time-stamp when alloc index was updated |
| 155 | * recved : value of alloc index |
| 156 | * 3) htt_rx_in_order_indication reception |
| 157 | * @paddr : = 0 |
| 158 | * @nbuf : = 0 |
Orhan K AKYILDIZ | fdd74de | 2016-12-15 12:08:04 -0800 | [diff] [blame] | 159 | * @ndata : msdu_cnt |
Orhan K AKYILDIZ | 0c1b6bf | 2016-11-28 18:47:24 -0800 | [diff] [blame] | 160 | * @posted: time-stamp when HTT message is recived |
| 161 | * @recvd : 0x48545452584D5367 ('HTTRXMSG') |
Yun Park | 4afce84 | 2017-04-05 07:09:26 -0700 | [diff] [blame] | 162 | */ |
Orhan K AKYILDIZ | fdd74de | 2016-12-15 12:08:04 -0800 | [diff] [blame] | 163 | #define HTT_RX_RING_BUFF_DBG_LIST (2 * 1024) |
Govind Singh | d79e134 | 2015-11-03 16:20:02 +0530 | [diff] [blame] | 164 | struct rx_buf_debug { |
Manjunathappa Prakash | c8e7564 | 2016-06-03 19:32:27 -0700 | [diff] [blame] | 165 | qdf_dma_addr_t paddr; |
| 166 | qdf_nbuf_t nbuf; |
Orhan K AKYILDIZ | 0c1b6bf | 2016-11-28 18:47:24 -0800 | [diff] [blame] | 167 | void *nbuf_data; |
| 168 | uint64_t posted; /* timetamp */ |
| 169 | uint64_t recved; /* timestamp */ |
Orhan K AKYILDIZ | fdd74de | 2016-12-15 12:08:04 -0800 | [diff] [blame] | 170 | int cpu; |
Orhan K AKYILDIZ | a8e2e6f | 2016-10-13 22:24:12 -0700 | [diff] [blame] | 171 | |
Govind Singh | d79e134 | 2015-11-03 16:20:02 +0530 | [diff] [blame] | 172 | }; |
| 173 | #endif |
Manjunathappa Prakash | c8e7564 | 2016-06-03 19:32:27 -0700 | [diff] [blame] | 174 | |
Nirav Shah | cbc6d72 | 2016-03-01 16:24:53 +0530 | [diff] [blame] | 175 | static inline struct htt_host_rx_desc_base *htt_rx_desc(qdf_nbuf_t msdu) |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 176 | { |
| 177 | return (struct htt_host_rx_desc_base *) |
Nirav Shah | cbc6d72 | 2016-03-01 16:24:53 +0530 | [diff] [blame] | 178 | (((size_t) (qdf_nbuf_head(msdu) + HTT_RX_DESC_ALIGN_MASK)) & |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 179 | ~HTT_RX_DESC_ALIGN_MASK); |
| 180 | } |
| 181 | |
Manjunathappa Prakash | 7b0ad46 | 2018-04-15 00:37:16 -0700 | [diff] [blame^] | 182 | #if defined(HELIUMPLUS) |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 183 | /** |
| 184 | * htt_print_rx_desc_lro() - print LRO information in the rx |
| 185 | * descriptor |
| 186 | * @rx_desc: HTT rx descriptor |
| 187 | * |
| 188 | * Prints the LRO related fields in the HTT rx descriptor |
| 189 | * |
| 190 | * Return: none |
| 191 | */ |
| 192 | static inline void htt_print_rx_desc_lro(struct htt_host_rx_desc_base *rx_desc) |
| 193 | { |
Anurag Chouhan | 6d76066 | 2016-02-20 16:05:43 +0530 | [diff] [blame] | 194 | qdf_print |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 195 | ("----------------------RX DESC LRO----------------------\n"); |
Anurag Chouhan | 6d76066 | 2016-02-20 16:05:43 +0530 | [diff] [blame] | 196 | qdf_print("msdu_end.lro_eligible:0x%x\n", |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 197 | rx_desc->msdu_end.lro_eligible); |
Anurag Chouhan | 6d76066 | 2016-02-20 16:05:43 +0530 | [diff] [blame] | 198 | qdf_print("msdu_start.tcp_only_ack:0x%x\n", |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 199 | rx_desc->msdu_start.tcp_only_ack); |
Anurag Chouhan | 6d76066 | 2016-02-20 16:05:43 +0530 | [diff] [blame] | 200 | qdf_print("msdu_end.tcp_udp_chksum:0x%x\n", |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 201 | rx_desc->msdu_end.tcp_udp_chksum); |
Anurag Chouhan | 6d76066 | 2016-02-20 16:05:43 +0530 | [diff] [blame] | 202 | qdf_print("msdu_end.tcp_seq_number:0x%x\n", |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 203 | rx_desc->msdu_end.tcp_seq_number); |
Anurag Chouhan | 6d76066 | 2016-02-20 16:05:43 +0530 | [diff] [blame] | 204 | qdf_print("msdu_end.tcp_ack_number:0x%x\n", |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 205 | rx_desc->msdu_end.tcp_ack_number); |
Anurag Chouhan | 6d76066 | 2016-02-20 16:05:43 +0530 | [diff] [blame] | 206 | qdf_print("msdu_start.tcp_proto:0x%x\n", |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 207 | rx_desc->msdu_start.tcp_proto); |
Anurag Chouhan | 6d76066 | 2016-02-20 16:05:43 +0530 | [diff] [blame] | 208 | qdf_print("msdu_start.ipv6_proto:0x%x\n", |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 209 | rx_desc->msdu_start.ipv6_proto); |
Anurag Chouhan | 6d76066 | 2016-02-20 16:05:43 +0530 | [diff] [blame] | 210 | qdf_print("msdu_start.ipv4_proto:0x%x\n", |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 211 | rx_desc->msdu_start.ipv4_proto); |
Anurag Chouhan | 6d76066 | 2016-02-20 16:05:43 +0530 | [diff] [blame] | 212 | qdf_print("msdu_start.l3_offset:0x%x\n", |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 213 | rx_desc->msdu_start.l3_offset); |
Anurag Chouhan | 6d76066 | 2016-02-20 16:05:43 +0530 | [diff] [blame] | 214 | qdf_print("msdu_start.l4_offset:0x%x\n", |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 215 | rx_desc->msdu_start.l4_offset); |
Anurag Chouhan | 6d76066 | 2016-02-20 16:05:43 +0530 | [diff] [blame] | 216 | qdf_print("msdu_start.flow_id_toeplitz:0x%x\n", |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 217 | rx_desc->msdu_start.flow_id_toeplitz); |
Anurag Chouhan | 6d76066 | 2016-02-20 16:05:43 +0530 | [diff] [blame] | 218 | qdf_print |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 219 | ("---------------------------------------------------------\n"); |
| 220 | } |
| 221 | |
| 222 | /** |
| 223 | * htt_print_rx_desc_lro() - extract LRO information from the rx |
| 224 | * descriptor |
| 225 | * @msdu: network buffer |
| 226 | * @rx_desc: HTT rx descriptor |
| 227 | * |
| 228 | * Extracts the LRO related fields from the HTT rx descriptor |
| 229 | * and stores them in the network buffer's control block |
| 230 | * |
| 231 | * Return: none |
| 232 | */ |
Nirav Shah | cbc6d72 | 2016-03-01 16:24:53 +0530 | [diff] [blame] | 233 | static inline void htt_rx_extract_lro_info(qdf_nbuf_t msdu, |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 234 | struct htt_host_rx_desc_base *rx_desc) |
| 235 | { |
Poddar, Siddarth | 37a302d | 2017-06-27 14:19:23 +0530 | [diff] [blame] | 236 | if (rx_desc->attention.tcp_udp_chksum_fail) |
| 237 | QDF_NBUF_CB_RX_LRO_ELIGIBLE(msdu) = 0; |
| 238 | else |
| 239 | QDF_NBUF_CB_RX_LRO_ELIGIBLE(msdu) = |
| 240 | rx_desc->msdu_end.lro_eligible; |
| 241 | |
| 242 | if (QDF_NBUF_CB_RX_LRO_ELIGIBLE(msdu)) { |
Yun Park | 4afce84 | 2017-04-05 07:09:26 -0700 | [diff] [blame] | 243 | QDF_NBUF_CB_RX_TCP_PURE_ACK(msdu) = |
| 244 | rx_desc->msdu_start.tcp_only_ack; |
| 245 | QDF_NBUF_CB_RX_TCP_CHKSUM(msdu) = |
| 246 | rx_desc->msdu_end.tcp_udp_chksum; |
| 247 | QDF_NBUF_CB_RX_TCP_SEQ_NUM(msdu) = |
| 248 | rx_desc->msdu_end.tcp_seq_number; |
| 249 | QDF_NBUF_CB_RX_TCP_ACK_NUM(msdu) = |
| 250 | rx_desc->msdu_end.tcp_ack_number; |
| 251 | QDF_NBUF_CB_RX_TCP_WIN(msdu) = |
| 252 | rx_desc->msdu_end.window_size; |
| 253 | QDF_NBUF_CB_RX_TCP_PROTO(msdu) = |
| 254 | rx_desc->msdu_start.tcp_proto; |
| 255 | QDF_NBUF_CB_RX_IPV6_PROTO(msdu) = |
| 256 | rx_desc->msdu_start.ipv6_proto; |
| 257 | QDF_NBUF_CB_RX_TCP_OFFSET(msdu) = |
| 258 | rx_desc->msdu_start.l4_offset; |
Manjunathappa Prakash | 794366e | 2017-11-07 09:59:21 -0800 | [diff] [blame] | 259 | QDF_NBUF_CB_RX_FLOW_ID(msdu) = |
Poddar, Siddarth | 37a302d | 2017-06-27 14:19:23 +0530 | [diff] [blame] | 260 | rx_desc->msdu_start.flow_id_toeplitz; |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 261 | } |
| 262 | } |
| 263 | #else |
| 264 | static inline void htt_print_rx_desc_lro(struct htt_host_rx_desc_base *rx_desc) |
| 265 | {} |
Nirav Shah | cbc6d72 | 2016-03-01 16:24:53 +0530 | [diff] [blame] | 266 | static inline void htt_rx_extract_lro_info(qdf_nbuf_t msdu, |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 267 | struct htt_host_rx_desc_base *rx_desc) {} |
Manjunathappa Prakash | 7b0ad46 | 2018-04-15 00:37:16 -0700 | [diff] [blame^] | 268 | #endif /* HELIUMPLUS */ |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 269 | |
| 270 | static inline void htt_print_rx_desc(struct htt_host_rx_desc_base *rx_desc) |
| 271 | { |
Anurag Chouhan | 6d76066 | 2016-02-20 16:05:43 +0530 | [diff] [blame] | 272 | qdf_print |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 273 | ("----------------------RX DESC----------------------------\n"); |
Anurag Chouhan | 6d76066 | 2016-02-20 16:05:43 +0530 | [diff] [blame] | 274 | qdf_print("attention: %#010x\n", |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 275 | (unsigned int)(*(uint32_t *) &rx_desc->attention)); |
Anurag Chouhan | 6d76066 | 2016-02-20 16:05:43 +0530 | [diff] [blame] | 276 | qdf_print("frag_info: %#010x\n", |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 277 | (unsigned int)(*(uint32_t *) &rx_desc->frag_info)); |
Anurag Chouhan | 6d76066 | 2016-02-20 16:05:43 +0530 | [diff] [blame] | 278 | qdf_print("mpdu_start: %#010x %#010x %#010x\n", |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 279 | (unsigned int)(((uint32_t *) &rx_desc->mpdu_start)[0]), |
| 280 | (unsigned int)(((uint32_t *) &rx_desc->mpdu_start)[1]), |
| 281 | (unsigned int)(((uint32_t *) &rx_desc->mpdu_start)[2])); |
Anurag Chouhan | 6d76066 | 2016-02-20 16:05:43 +0530 | [diff] [blame] | 282 | qdf_print("msdu_start: %#010x %#010x %#010x\n", |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 283 | (unsigned int)(((uint32_t *) &rx_desc->msdu_start)[0]), |
| 284 | (unsigned int)(((uint32_t *) &rx_desc->msdu_start)[1]), |
| 285 | (unsigned int)(((uint32_t *) &rx_desc->msdu_start)[2])); |
Anurag Chouhan | 6d76066 | 2016-02-20 16:05:43 +0530 | [diff] [blame] | 286 | qdf_print("msdu_end: %#010x %#010x %#010x %#010x %#010x\n", |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 287 | (unsigned int)(((uint32_t *) &rx_desc->msdu_end)[0]), |
| 288 | (unsigned int)(((uint32_t *) &rx_desc->msdu_end)[1]), |
| 289 | (unsigned int)(((uint32_t *) &rx_desc->msdu_end)[2]), |
| 290 | (unsigned int)(((uint32_t *) &rx_desc->msdu_end)[3]), |
| 291 | (unsigned int)(((uint32_t *) &rx_desc->msdu_end)[4])); |
Anurag Chouhan | 6d76066 | 2016-02-20 16:05:43 +0530 | [diff] [blame] | 292 | qdf_print("mpdu_end: %#010x\n", |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 293 | (unsigned int)(*(uint32_t *) &rx_desc->mpdu_end)); |
Yun Park | 4afce84 | 2017-04-05 07:09:26 -0700 | [diff] [blame] | 294 | qdf_print("ppdu_start: %#010x %#010x %#010x %#010x %#010x\n" |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 295 | "%#010x %#010x %#010x %#010x %#010x\n", |
| 296 | (unsigned int)(((uint32_t *) &rx_desc->ppdu_start)[0]), |
| 297 | (unsigned int)(((uint32_t *) &rx_desc->ppdu_start)[1]), |
| 298 | (unsigned int)(((uint32_t *) &rx_desc->ppdu_start)[2]), |
| 299 | (unsigned int)(((uint32_t *) &rx_desc->ppdu_start)[3]), |
| 300 | (unsigned int)(((uint32_t *) &rx_desc->ppdu_start)[4]), |
| 301 | (unsigned int)(((uint32_t *) &rx_desc->ppdu_start)[5]), |
| 302 | (unsigned int)(((uint32_t *) &rx_desc->ppdu_start)[6]), |
| 303 | (unsigned int)(((uint32_t *) &rx_desc->ppdu_start)[7]), |
| 304 | (unsigned int)(((uint32_t *) &rx_desc->ppdu_start)[8]), |
| 305 | (unsigned int)(((uint32_t *) &rx_desc->ppdu_start)[9])); |
Yun Park | 4afce84 | 2017-04-05 07:09:26 -0700 | [diff] [blame] | 306 | qdf_print("ppdu_end: %#010x %#010x %#010x %#010x %#010x\n" |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 307 | "%#010x %#010x %#010x %#010x %#010x\n" |
| 308 | "%#010x,%#010x %#010x %#010x %#010x\n" |
| 309 | "%#010x %#010x %#010x %#010x %#010x\n" "%#010x %#010x\n", |
| 310 | (unsigned int)(((uint32_t *) &rx_desc->ppdu_end)[0]), |
| 311 | (unsigned int)(((uint32_t *) &rx_desc->ppdu_end)[1]), |
| 312 | (unsigned int)(((uint32_t *) &rx_desc->ppdu_end)[2]), |
| 313 | (unsigned int)(((uint32_t *) &rx_desc->ppdu_end)[3]), |
| 314 | (unsigned int)(((uint32_t *) &rx_desc->ppdu_end)[4]), |
| 315 | (unsigned int)(((uint32_t *) &rx_desc->ppdu_end)[5]), |
| 316 | (unsigned int)(((uint32_t *) &rx_desc->ppdu_end)[6]), |
| 317 | (unsigned int)(((uint32_t *) &rx_desc->ppdu_end)[7]), |
| 318 | (unsigned int)(((uint32_t *) &rx_desc->ppdu_end)[8]), |
| 319 | (unsigned int)(((uint32_t *) &rx_desc->ppdu_end)[9]), |
| 320 | (unsigned int)(((uint32_t *) &rx_desc->ppdu_end)[10]), |
| 321 | (unsigned int)(((uint32_t *) &rx_desc->ppdu_end)[11]), |
| 322 | (unsigned int)(((uint32_t *) &rx_desc->ppdu_end)[12]), |
| 323 | (unsigned int)(((uint32_t *) &rx_desc->ppdu_end)[13]), |
| 324 | (unsigned int)(((uint32_t *) &rx_desc->ppdu_end)[14]), |
| 325 | (unsigned int)(((uint32_t *) &rx_desc->ppdu_end)[15]), |
| 326 | (unsigned int)(((uint32_t *) &rx_desc->ppdu_end)[16]), |
| 327 | (unsigned int)(((uint32_t *) &rx_desc->ppdu_end)[17]), |
| 328 | (unsigned int)(((uint32_t *) &rx_desc->ppdu_end)[18]), |
| 329 | (unsigned int)(((uint32_t *) &rx_desc->ppdu_end)[19]), |
| 330 | (unsigned int)(((uint32_t *) &rx_desc->ppdu_end)[20]), |
| 331 | (unsigned int)(((uint32_t *) &rx_desc->ppdu_end)[21])); |
Anurag Chouhan | 6d76066 | 2016-02-20 16:05:43 +0530 | [diff] [blame] | 332 | qdf_print |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 333 | ("---------------------------------------------------------\n"); |
| 334 | } |
| 335 | |
| 336 | #ifndef HTT_ASSERT_LEVEL |
| 337 | #define HTT_ASSERT_LEVEL 3 |
| 338 | #endif |
| 339 | |
Anurag Chouhan | c554842 | 2016-02-24 18:33:27 +0530 | [diff] [blame] | 340 | #define HTT_ASSERT_ALWAYS(condition) qdf_assert_always((condition)) |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 341 | |
Anurag Chouhan | c554842 | 2016-02-24 18:33:27 +0530 | [diff] [blame] | 342 | #define HTT_ASSERT0(condition) qdf_assert((condition)) |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 343 | #if HTT_ASSERT_LEVEL > 0 |
Anurag Chouhan | c554842 | 2016-02-24 18:33:27 +0530 | [diff] [blame] | 344 | #define HTT_ASSERT1(condition) qdf_assert((condition)) |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 345 | #else |
| 346 | #define HTT_ASSERT1(condition) |
| 347 | #endif |
| 348 | |
| 349 | #if HTT_ASSERT_LEVEL > 1 |
Anurag Chouhan | c554842 | 2016-02-24 18:33:27 +0530 | [diff] [blame] | 350 | #define HTT_ASSERT2(condition) qdf_assert((condition)) |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 351 | #else |
| 352 | #define HTT_ASSERT2(condition) |
| 353 | #endif |
| 354 | |
| 355 | #if HTT_ASSERT_LEVEL > 2 |
Anurag Chouhan | c554842 | 2016-02-24 18:33:27 +0530 | [diff] [blame] | 356 | #define HTT_ASSERT3(condition) qdf_assert((condition)) |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 357 | #else |
| 358 | #define HTT_ASSERT3(condition) |
| 359 | #endif |
| 360 | |
| 361 | #define HTT_MAC_ADDR_LEN 6 |
| 362 | |
| 363 | /* |
| 364 | * HTT_MAX_SEND_QUEUE_DEPTH - |
| 365 | * How many packets HTC should allow to accumulate in a send queue |
| 366 | * before calling the EpSendFull callback to see whether to retain |
| 367 | * or drop packets. |
| 368 | * This is not relevant for LL, where tx descriptors should be immediately |
| 369 | * downloaded to the target. |
| 370 | * This is not very relevant for HL either, since it is anticipated that |
| 371 | * the HL tx download scheduler will not work this far in advance - rather, |
| 372 | * it will make its decisions just-in-time, so it can be responsive to |
| 373 | * changing conditions. |
| 374 | * Hence, this queue depth threshold spec is mostly just a formality. |
| 375 | */ |
| 376 | #define HTT_MAX_SEND_QUEUE_DEPTH 64 |
| 377 | |
| 378 | #define IS_PWR2(value) (((value) ^ ((value)-1)) == ((value) << 1) - 1) |
| 379 | |
Manjunathappa Prakash | 70ea728 | 2016-06-17 15:42:45 -0700 | [diff] [blame] | 380 | /* Max rx MSDU size including L2 headers */ |
| 381 | #define MSDU_SIZE 1560 |
| 382 | /* Rounding up to a cache line size. */ |
| 383 | #define HTT_RX_BUF_SIZE roundup(MSDU_SIZE + \ |
| 384 | sizeof(struct htt_host_rx_desc_base), \ |
| 385 | QDF_CACHE_LINE_SZ) |
Manjunathappa Prakash | b757372 | 2016-04-21 11:24:07 -0700 | [diff] [blame] | 386 | #define MAX_RX_PAYLOAD_SZ (HTT_RX_BUF_SIZE - RX_STD_DESC_SIZE) |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 387 | /* |
| 388 | * DMA_MAP expects the buffer to be an integral number of cache lines. |
| 389 | * Rather than checking the actual cache line size, this code makes a |
| 390 | * conservative estimate of what the cache line size could be. |
| 391 | */ |
| 392 | #define HTT_LOG2_MAX_CACHE_LINE_SIZE 7 /* 2^7 = 128 */ |
| 393 | #define HTT_MAX_CACHE_LINE_SIZE_MASK ((1 << HTT_LOG2_MAX_CACHE_LINE_SIZE) - 1) |
| 394 | |
| 395 | #ifdef BIG_ENDIAN_HOST |
| 396 | /* |
| 397 | * big-endian: bytes within a 4-byte "word" are swapped: |
| 398 | * pre-swap post-swap |
| 399 | * index index |
| 400 | * 0 3 |
| 401 | * 1 2 |
| 402 | * 2 1 |
| 403 | * 3 0 |
| 404 | * 4 7 |
| 405 | * 5 6 |
| 406 | * etc. |
| 407 | * To compute the post-swap index from the pre-swap index, compute |
| 408 | * the byte offset for the start of the word (index & ~0x3) and add |
| 409 | * the swapped byte offset within the word (3 - (index & 0x3)). |
| 410 | */ |
| 411 | #define HTT_ENDIAN_BYTE_IDX_SWAP(idx) (((idx) & ~0x3) + (3 - ((idx) & 0x3))) |
| 412 | #else |
| 413 | /* little-endian: no adjustment needed */ |
| 414 | #define HTT_ENDIAN_BYTE_IDX_SWAP(idx) idx |
| 415 | #endif |
| 416 | |
| 417 | #define HTT_TX_MUTEX_INIT(_mutex) \ |
Anurag Chouhan | a37b5b7 | 2016-02-21 14:53:42 +0530 | [diff] [blame] | 418 | qdf_spinlock_create(_mutex) |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 419 | |
| 420 | #define HTT_TX_MUTEX_ACQUIRE(_mutex) \ |
Anurag Chouhan | a37b5b7 | 2016-02-21 14:53:42 +0530 | [diff] [blame] | 421 | qdf_spin_lock_bh(_mutex) |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 422 | |
| 423 | #define HTT_TX_MUTEX_RELEASE(_mutex) \ |
Anurag Chouhan | a37b5b7 | 2016-02-21 14:53:42 +0530 | [diff] [blame] | 424 | qdf_spin_unlock_bh(_mutex) |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 425 | |
| 426 | #define HTT_TX_MUTEX_DESTROY(_mutex) \ |
Anurag Chouhan | a37b5b7 | 2016-02-21 14:53:42 +0530 | [diff] [blame] | 427 | qdf_spinlock_destroy(_mutex) |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 428 | |
| 429 | #define HTT_TX_DESC_PADDR(_pdev, _tx_desc_vaddr) \ |
| 430 | ((_pdev)->tx_descs.pool_paddr + (uint32_t) \ |
| 431 | ((char *)(_tx_desc_vaddr) - \ |
| 432 | (char *)((_pdev)->tx_descs.pool_vaddr))) |
| 433 | |
| 434 | #ifdef ATH_11AC_TXCOMPACT |
| 435 | |
| 436 | #define HTT_TX_NBUF_QUEUE_MUTEX_INIT(_pdev) \ |
Anurag Chouhan | a37b5b7 | 2016-02-21 14:53:42 +0530 | [diff] [blame] | 437 | qdf_spinlock_create(&_pdev->txnbufq_mutex) |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 438 | |
| 439 | #define HTT_TX_NBUF_QUEUE_MUTEX_DESTROY(_pdev) \ |
| 440 | HTT_TX_MUTEX_DESTROY(&_pdev->txnbufq_mutex) |
| 441 | |
| 442 | #define HTT_TX_NBUF_QUEUE_REMOVE(_pdev, _msdu) do { \ |
| 443 | HTT_TX_MUTEX_ACQUIRE(&_pdev->txnbufq_mutex); \ |
Nirav Shah | cbc6d72 | 2016-03-01 16:24:53 +0530 | [diff] [blame] | 444 | _msdu = qdf_nbuf_queue_remove(&_pdev->txnbufq);\ |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 445 | HTT_TX_MUTEX_RELEASE(&_pdev->txnbufq_mutex); \ |
| 446 | } while (0) |
| 447 | |
| 448 | #define HTT_TX_NBUF_QUEUE_ADD(_pdev, _msdu) do { \ |
| 449 | HTT_TX_MUTEX_ACQUIRE(&_pdev->txnbufq_mutex); \ |
Nirav Shah | cbc6d72 | 2016-03-01 16:24:53 +0530 | [diff] [blame] | 450 | qdf_nbuf_queue_add(&_pdev->txnbufq, _msdu); \ |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 451 | HTT_TX_MUTEX_RELEASE(&_pdev->txnbufq_mutex); \ |
| 452 | } while (0) |
| 453 | |
| 454 | #define HTT_TX_NBUF_QUEUE_INSERT_HEAD(_pdev, _msdu) do { \ |
| 455 | HTT_TX_MUTEX_ACQUIRE(&_pdev->txnbufq_mutex); \ |
Nirav Shah | cbc6d72 | 2016-03-01 16:24:53 +0530 | [diff] [blame] | 456 | qdf_nbuf_queue_insert_head(&_pdev->txnbufq, _msdu);\ |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 457 | HTT_TX_MUTEX_RELEASE(&_pdev->txnbufq_mutex); \ |
| 458 | } while (0) |
| 459 | #else |
| 460 | |
| 461 | #define HTT_TX_NBUF_QUEUE_MUTEX_INIT(_pdev) |
| 462 | #define HTT_TX_NBUF_QUEUE_REMOVE(_pdev, _msdu) |
| 463 | #define HTT_TX_NBUF_QUEUE_ADD(_pdev, _msdu) |
| 464 | #define HTT_TX_NBUF_QUEUE_INSERT_HEAD(_pdev, _msdu) |
| 465 | #define HTT_TX_NBUF_QUEUE_MUTEX_DESTROY(_pdev) |
| 466 | |
| 467 | #endif |
| 468 | |
Siddarth Poddar | 1df1cd8 | 2016-04-27 17:32:21 +0530 | [diff] [blame] | 469 | #ifdef CONFIG_HL_SUPPORT |
| 470 | |
| 471 | static inline void htt_tx_resume_handler(void *context) |
| 472 | { |
Siddarth Poddar | 1df1cd8 | 2016-04-27 17:32:21 +0530 | [diff] [blame] | 473 | } |
| 474 | #else |
| 475 | |
Yun Park | 4afce84 | 2017-04-05 07:09:26 -0700 | [diff] [blame] | 476 | void htt_tx_resume_handler(void *context); |
Siddarth Poddar | 1df1cd8 | 2016-04-27 17:32:21 +0530 | [diff] [blame] | 477 | #endif |
| 478 | |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 479 | #ifdef ATH_11AC_TXCOMPACT |
| 480 | #define HTT_TX_SCHED htt_tx_sched |
| 481 | #else |
| 482 | #define HTT_TX_SCHED(pdev) /* no-op */ |
| 483 | #endif |
| 484 | |
| 485 | int htt_tx_attach(struct htt_pdev_t *pdev, int desc_pool_elems); |
| 486 | |
| 487 | void htt_tx_detach(struct htt_pdev_t *pdev); |
| 488 | |
| 489 | int htt_rx_attach(struct htt_pdev_t *pdev); |
| 490 | |
Siddarth Poddar | 1df1cd8 | 2016-04-27 17:32:21 +0530 | [diff] [blame] | 491 | #if defined(CONFIG_HL_SUPPORT) |
| 492 | |
| 493 | static inline void htt_rx_detach(struct htt_pdev_t *pdev) |
| 494 | { |
Siddarth Poddar | 1df1cd8 | 2016-04-27 17:32:21 +0530 | [diff] [blame] | 495 | } |
| 496 | #else |
| 497 | |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 498 | void htt_rx_detach(struct htt_pdev_t *pdev); |
Siddarth Poddar | 1df1cd8 | 2016-04-27 17:32:21 +0530 | [diff] [blame] | 499 | #endif |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 500 | |
Houston Hoffman | 23e76f9 | 2016-02-26 12:19:11 -0800 | [diff] [blame] | 501 | int htt_htc_attach(struct htt_pdev_t *pdev, uint16_t service_id); |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 502 | |
| 503 | void htt_t2h_msg_handler(void *context, HTC_PACKET *pkt); |
Manjunathappa Prakash | 585178d | 2016-04-14 01:11:18 -0700 | [diff] [blame] | 504 | #ifdef WLAN_FEATURE_FASTPATH |
| 505 | void htt_t2h_msg_handler_fast(void *htt_pdev, qdf_nbuf_t *cmpl_msdus, |
| 506 | uint32_t num_cmpls); |
| 507 | #else |
| 508 | static inline void htt_t2h_msg_handler_fast(void *htt_pdev, |
| 509 | qdf_nbuf_t *cmpl_msdus, |
| 510 | uint32_t num_cmpls) |
| 511 | { |
| 512 | } |
| 513 | #endif |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 514 | |
| 515 | void htt_h2t_send_complete(void *context, HTC_PACKET *pkt); |
| 516 | |
Rakesh Pillai | 7fb7a1f | 2017-06-23 14:46:36 +0530 | [diff] [blame] | 517 | QDF_STATUS htt_h2t_ver_req_msg(struct htt_pdev_t *pdev); |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 518 | |
Himanshu Agarwal | 18d6b8c | 2017-03-01 16:41:04 +0530 | [diff] [blame] | 519 | #if defined(HELIUMPLUS) |
Rakesh Pillai | 7fb7a1f | 2017-06-23 14:46:36 +0530 | [diff] [blame] | 520 | QDF_STATUS |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 521 | htt_h2t_frag_desc_bank_cfg_msg(struct htt_pdev_t *pdev); |
Himanshu Agarwal | 18d6b8c | 2017-03-01 16:41:04 +0530 | [diff] [blame] | 522 | #endif /* defined(HELIUMPLUS) */ |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 523 | |
Siddarth Poddar | 1df1cd8 | 2016-04-27 17:32:21 +0530 | [diff] [blame] | 524 | extern QDF_STATUS htt_h2t_rx_ring_cfg_msg_ll(struct htt_pdev_t *pdev); |
| 525 | |
Manjunathappa Prakash | fff753c | 2016-09-01 19:34:56 -0700 | [diff] [blame] | 526 | extern QDF_STATUS htt_h2t_rx_ring_rfs_cfg_msg_ll(struct htt_pdev_t *pdev); |
| 527 | |
| 528 | extern QDF_STATUS htt_h2t_rx_ring_rfs_cfg_msg_hl(struct htt_pdev_t *pdev); |
| 529 | |
Siddarth Poddar | 1df1cd8 | 2016-04-27 17:32:21 +0530 | [diff] [blame] | 530 | extern QDF_STATUS htt_h2t_rx_ring_cfg_msg_hl(struct htt_pdev_t *pdev); |
| 531 | |
| 532 | extern QDF_STATUS (*htt_h2t_rx_ring_cfg_msg)(struct htt_pdev_t *pdev); |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 533 | |
Manikandan Mohan | 83c939c | 2017-04-13 20:23:07 -0700 | [diff] [blame] | 534 | enum htc_send_full_action htt_h2t_full(void *context, HTC_PACKET *pkt); |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 535 | |
| 536 | struct htt_htc_pkt *htt_htc_pkt_alloc(struct htt_pdev_t *pdev); |
| 537 | |
| 538 | void htt_htc_pkt_free(struct htt_pdev_t *pdev, struct htt_htc_pkt *pkt); |
| 539 | |
| 540 | void htt_htc_pkt_pool_free(struct htt_pdev_t *pdev); |
| 541 | |
| 542 | #ifdef ATH_11AC_TXCOMPACT |
Yun Park | eea1c9c | 2017-03-08 11:26:37 -0800 | [diff] [blame] | 543 | void htt_htc_misc_pkt_list_trim(struct htt_pdev_t *pdev, int level); |
| 544 | |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 545 | void |
| 546 | htt_htc_misc_pkt_list_add(struct htt_pdev_t *pdev, struct htt_htc_pkt *pkt); |
| 547 | |
| 548 | void htt_htc_misc_pkt_pool_free(struct htt_pdev_t *pdev); |
| 549 | #endif |
| 550 | |
Nirav Shah | eb017be | 2018-02-15 11:20:58 +0530 | [diff] [blame] | 551 | #ifdef CONFIG_HL_SUPPORT |
| 552 | static inline int |
| 553 | htt_rx_hash_list_insert(struct htt_pdev_t *pdev, |
| 554 | qdf_dma_addr_t paddr, |
| 555 | qdf_nbuf_t netbuf) |
| 556 | { |
| 557 | return 0; |
| 558 | } |
| 559 | #else |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 560 | int |
Orhan K AKYILDIZ | 4c878ed | 2017-03-23 13:12:46 -0700 | [diff] [blame] | 561 | htt_rx_hash_list_insert(struct htt_pdev_t *pdev, |
| 562 | qdf_dma_addr_t paddr, |
Nirav Shah | cbc6d72 | 2016-03-01 16:24:53 +0530 | [diff] [blame] | 563 | qdf_nbuf_t netbuf); |
Nirav Shah | eb017be | 2018-02-15 11:20:58 +0530 | [diff] [blame] | 564 | #endif |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 565 | |
Orhan K AKYILDIZ | 4c878ed | 2017-03-23 13:12:46 -0700 | [diff] [blame] | 566 | qdf_nbuf_t |
| 567 | htt_rx_hash_list_lookup(struct htt_pdev_t *pdev, qdf_dma_addr_t paddr); |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 568 | |
| 569 | #ifdef IPA_OFFLOAD |
| 570 | int |
| 571 | htt_tx_ipa_uc_attach(struct htt_pdev_t *pdev, |
| 572 | unsigned int uc_tx_buf_sz, |
| 573 | unsigned int uc_tx_buf_cnt, |
| 574 | unsigned int uc_tx_partition_base); |
| 575 | |
| 576 | int |
| 577 | htt_rx_ipa_uc_attach(struct htt_pdev_t *pdev, unsigned int rx_ind_ring_size); |
| 578 | |
| 579 | int htt_tx_ipa_uc_detach(struct htt_pdev_t *pdev); |
| 580 | |
| 581 | int htt_rx_ipa_uc_detach(struct htt_pdev_t *pdev); |
Sravan Kumar Kairam | b664b6c | 2018-02-27 17:43:10 +0530 | [diff] [blame] | 582 | |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 583 | #else |
Leo Chang | 8e07361 | 2015-11-13 10:55:34 -0800 | [diff] [blame] | 584 | /** |
| 585 | * htt_tx_ipa_uc_attach() - attach htt ipa uc tx resource |
| 586 | * @pdev: htt context |
| 587 | * @uc_tx_buf_sz: single tx buffer size |
| 588 | * @uc_tx_buf_cnt: total tx buffer count |
| 589 | * @uc_tx_partition_base: tx buffer partition start |
| 590 | * |
| 591 | * Return: 0 success |
| 592 | */ |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 593 | static inline int |
| 594 | htt_tx_ipa_uc_attach(struct htt_pdev_t *pdev, |
| 595 | unsigned int uc_tx_buf_sz, |
| 596 | unsigned int uc_tx_buf_cnt, |
| 597 | unsigned int uc_tx_partition_base) |
| 598 | { |
| 599 | return 0; |
| 600 | } |
| 601 | |
Leo Chang | 8e07361 | 2015-11-13 10:55:34 -0800 | [diff] [blame] | 602 | /** |
| 603 | * htt_rx_ipa_uc_attach() - attach htt ipa uc rx resource |
| 604 | * @pdev: htt context |
| 605 | * @rx_ind_ring_size: rx ring size |
| 606 | * |
| 607 | * Return: 0 success |
| 608 | */ |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 609 | static inline int |
| 610 | htt_rx_ipa_uc_attach(struct htt_pdev_t *pdev, unsigned int rx_ind_ring_size) |
| 611 | { |
| 612 | return 0; |
| 613 | } |
| 614 | |
| 615 | static inline int htt_tx_ipa_uc_detach(struct htt_pdev_t *pdev) |
| 616 | { |
| 617 | return 0; |
| 618 | } |
| 619 | |
| 620 | static inline int htt_rx_ipa_uc_detach(struct htt_pdev_t *pdev) |
| 621 | { |
| 622 | return 0; |
| 623 | } |
Sravan Kumar Kairam | b664b6c | 2018-02-27 17:43:10 +0530 | [diff] [blame] | 624 | |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 625 | #endif /* IPA_OFFLOAD */ |
Manjunathappa Prakash | c8e7564 | 2016-06-03 19:32:27 -0700 | [diff] [blame] | 626 | |
Siddarth Poddar | 1df1cd8 | 2016-04-27 17:32:21 +0530 | [diff] [blame] | 627 | /* Maximum Outstanding Bus Download */ |
| 628 | #define HTT_MAX_BUS_CREDIT 33 |
| 629 | |
| 630 | #ifdef CONFIG_HL_SUPPORT |
| 631 | |
| 632 | /** |
| 633 | * htt_tx_credit_update() - check for diff in bus delta and target delta |
| 634 | * @pdev: pointer to htt device. |
| 635 | * |
| 636 | * Return: min of bus delta and target delta |
| 637 | */ |
| 638 | int |
| 639 | htt_tx_credit_update(struct htt_pdev_t *pdev); |
| 640 | #else |
| 641 | |
| 642 | static inline int |
| 643 | htt_tx_credit_update(struct htt_pdev_t *pdev) |
| 644 | { |
| 645 | return 0; |
| 646 | } |
| 647 | #endif |
| 648 | |
| 649 | |
| 650 | #ifdef FEATURE_HL_GROUP_CREDIT_FLOW_CONTROL |
| 651 | |
| 652 | #define HTT_TX_GROUP_INDEX_OFFSET \ |
| 653 | (sizeof(struct htt_txq_group) / sizeof(u_int32_t)) |
| 654 | |
| 655 | void htt_tx_group_credit_process(struct htt_pdev_t *pdev, u_int32_t *msg_word); |
| 656 | #else |
| 657 | |
| 658 | static inline |
| 659 | void htt_tx_group_credit_process(struct htt_pdev_t *pdev, u_int32_t *msg_word) |
| 660 | { |
Siddarth Poddar | 1df1cd8 | 2016-04-27 17:32:21 +0530 | [diff] [blame] | 661 | } |
| 662 | #endif |
| 663 | |
Govind Singh | d79e134 | 2015-11-03 16:20:02 +0530 | [diff] [blame] | 664 | #ifdef DEBUG_RX_RING_BUFFER |
| 665 | /** |
| 666 | * htt_rx_dbg_rxbuf_init() - init debug rx buff list |
| 667 | * @pdev: pdev handle |
| 668 | * |
Orhan K AKYILDIZ | 3d926d8 | 2017-02-28 18:05:41 -0800 | [diff] [blame] | 669 | * Allocation is done from bss segment. This uses vmalloc and has a bit |
| 670 | * of an overhead compared to kmalloc (which qdf_mem_alloc wraps). The impact |
| 671 | * of the overhead to performance will need to be quantified. |
| 672 | * |
Govind Singh | d79e134 | 2015-11-03 16:20:02 +0530 | [diff] [blame] | 673 | * Return: none |
| 674 | */ |
Orhan K AKYILDIZ | 3d926d8 | 2017-02-28 18:05:41 -0800 | [diff] [blame] | 675 | static struct rx_buf_debug rx_buff_list_bss[HTT_RX_RING_BUFF_DBG_LIST]; |
Govind Singh | d79e134 | 2015-11-03 16:20:02 +0530 | [diff] [blame] | 676 | static inline |
| 677 | void htt_rx_dbg_rxbuf_init(struct htt_pdev_t *pdev) |
| 678 | { |
Orhan K AKYILDIZ | 3d926d8 | 2017-02-28 18:05:41 -0800 | [diff] [blame] | 679 | pdev->rx_buff_list = rx_buff_list_bss; |
| 680 | qdf_spinlock_create(&(pdev->rx_buff_list_lock)); |
| 681 | pdev->rx_buff_index = 0; |
| 682 | pdev->rx_buff_posted_cum = 0; |
| 683 | pdev->rx_buff_recvd_cum = 0; |
| 684 | pdev->rx_buff_recvd_err = 0; |
| 685 | pdev->refill_retry_timer_starts = 0; |
| 686 | pdev->refill_retry_timer_calls = 0; |
| 687 | pdev->refill_retry_timer_doubles = 0; |
Govind Singh | d79e134 | 2015-11-03 16:20:02 +0530 | [diff] [blame] | 688 | } |
Manjunathappa Prakash | c8e7564 | 2016-06-03 19:32:27 -0700 | [diff] [blame] | 689 | |
Mohit Khanna | c19888f | 2017-02-09 12:50:15 -0800 | [diff] [blame] | 690 | /** |
| 691 | * htt_display_rx_buf_debug() - display debug rx buff list and some counters |
| 692 | * @pdev: pdev handle |
| 693 | * |
| 694 | * Return: Success |
| 695 | */ |
Orhan K AKYILDIZ | fdd74de | 2016-12-15 12:08:04 -0800 | [diff] [blame] | 696 | static inline int htt_display_rx_buf_debug(struct htt_pdev_t *pdev) |
| 697 | { |
| 698 | int i; |
| 699 | struct rx_buf_debug *buf; |
| 700 | |
| 701 | if ((pdev != NULL) && |
| 702 | (pdev->rx_buff_list != NULL)) { |
| 703 | buf = pdev->rx_buff_list; |
| 704 | for (i = 0; i < HTT_RX_RING_BUFF_DBG_LIST; i++) { |
| 705 | if (buf[i].posted != 0) |
| 706 | QDF_TRACE(QDF_MODULE_ID_TXRX, |
| 707 | QDF_TRACE_LEVEL_ERROR, |
Jeff Johnson | c13bfe0 | 2017-09-18 08:16:17 -0700 | [diff] [blame] | 708 | "[%d][0x%x] %pK %lu %pK %llu %llu", |
Orhan K AKYILDIZ | fdd74de | 2016-12-15 12:08:04 -0800 | [diff] [blame] | 709 | i, buf[i].cpu, |
| 710 | buf[i].nbuf_data, |
| 711 | (unsigned long)buf[i].paddr, |
| 712 | buf[i].nbuf, |
| 713 | buf[i].posted, |
| 714 | buf[i].recved); |
| 715 | } |
Mohit Khanna | c68622e | 2017-01-31 21:07:12 -0800 | [diff] [blame] | 716 | |
Orhan K AKYILDIZ | fdd74de | 2016-12-15 12:08:04 -0800 | [diff] [blame] | 717 | QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR, |
Mohit Khanna | c68622e | 2017-01-31 21:07:12 -0800 | [diff] [blame] | 718 | "rxbuf_idx %d all_posted: %d all_recvd: %d recv_err: %d", |
Orhan K AKYILDIZ | fdd74de | 2016-12-15 12:08:04 -0800 | [diff] [blame] | 719 | pdev->rx_buff_index, |
| 720 | pdev->rx_buff_posted_cum, |
| 721 | pdev->rx_buff_recvd_cum, |
Mohit Khanna | c68622e | 2017-01-31 21:07:12 -0800 | [diff] [blame] | 722 | pdev->rx_buff_recvd_err); |
| 723 | |
| 724 | QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR, |
| 725 | "timer kicks :%d actual :%d restarts:%d debtors: %d fill_n: %d", |
Orhan K AKYILDIZ | fdd74de | 2016-12-15 12:08:04 -0800 | [diff] [blame] | 726 | pdev->refill_retry_timer_starts, |
Mohit Khanna | c68622e | 2017-01-31 21:07:12 -0800 | [diff] [blame] | 727 | pdev->refill_retry_timer_calls, |
| 728 | pdev->refill_retry_timer_doubles, |
| 729 | pdev->rx_buff_debt_invoked, |
| 730 | pdev->rx_buff_fill_n_invoked); |
Orhan K AKYILDIZ | fdd74de | 2016-12-15 12:08:04 -0800 | [diff] [blame] | 731 | } else |
| 732 | return -EINVAL; |
| 733 | return 0; |
| 734 | } |
| 735 | |
Govind Singh | d79e134 | 2015-11-03 16:20:02 +0530 | [diff] [blame] | 736 | /** |
| 737 | * htt_rx_dbg_rxbuf_set() - set element of rx buff list |
| 738 | * @pdev: pdev handle |
| 739 | * @paddr: physical address of netbuf |
| 740 | * @rx_netbuf: received netbuf |
| 741 | * |
| 742 | * Return: none |
| 743 | */ |
| 744 | static inline |
Manjunathappa Prakash | c8e7564 | 2016-06-03 19:32:27 -0700 | [diff] [blame] | 745 | void htt_rx_dbg_rxbuf_set(struct htt_pdev_t *pdev, qdf_dma_addr_t paddr, |
| 746 | qdf_nbuf_t rx_netbuf) |
Govind Singh | d79e134 | 2015-11-03 16:20:02 +0530 | [diff] [blame] | 747 | { |
| 748 | if (pdev->rx_buff_list) { |
Orhan K AKYILDIZ | a8e2e6f | 2016-10-13 22:24:12 -0700 | [diff] [blame] | 749 | qdf_spin_lock_bh(&(pdev->rx_buff_list_lock)); |
Manjunathappa Prakash | c8e7564 | 2016-06-03 19:32:27 -0700 | [diff] [blame] | 750 | pdev->rx_buff_list[pdev->rx_buff_index].paddr = paddr; |
Orhan K AKYILDIZ | 0c1b6bf | 2016-11-28 18:47:24 -0800 | [diff] [blame] | 751 | pdev->rx_buff_list[pdev->rx_buff_index].nbuf = rx_netbuf; |
Manjunathappa Prakash | c8e7564 | 2016-06-03 19:32:27 -0700 | [diff] [blame] | 752 | pdev->rx_buff_list[pdev->rx_buff_index].nbuf_data = |
| 753 | rx_netbuf->data; |
Orhan K AKYILDIZ | 0c1b6bf | 2016-11-28 18:47:24 -0800 | [diff] [blame] | 754 | pdev->rx_buff_list[pdev->rx_buff_index].posted = |
Orhan K AKYILDIZ | a8e2e6f | 2016-10-13 22:24:12 -0700 | [diff] [blame] | 755 | qdf_get_log_timestamp(); |
Orhan K AKYILDIZ | fdd74de | 2016-12-15 12:08:04 -0800 | [diff] [blame] | 756 | pdev->rx_buff_posted_cum++; |
Orhan K AKYILDIZ | 0c1b6bf | 2016-11-28 18:47:24 -0800 | [diff] [blame] | 757 | pdev->rx_buff_list[pdev->rx_buff_index].recved = 0; |
Orhan K AKYILDIZ | fdd74de | 2016-12-15 12:08:04 -0800 | [diff] [blame] | 758 | pdev->rx_buff_list[pdev->rx_buff_index].cpu = |
| 759 | (1 << qdf_get_cpu()); |
Govind Singh | d79e134 | 2015-11-03 16:20:02 +0530 | [diff] [blame] | 760 | NBUF_MAP_ID(rx_netbuf) = pdev->rx_buff_index; |
Orhan K AKYILDIZ | 0c1b6bf | 2016-11-28 18:47:24 -0800 | [diff] [blame] | 761 | if (++pdev->rx_buff_index >= |
Govind Singh | d79e134 | 2015-11-03 16:20:02 +0530 | [diff] [blame] | 762 | HTT_RX_RING_BUFF_DBG_LIST) |
| 763 | pdev->rx_buff_index = 0; |
Orhan K AKYILDIZ | a8e2e6f | 2016-10-13 22:24:12 -0700 | [diff] [blame] | 764 | qdf_spin_unlock_bh(&(pdev->rx_buff_list_lock)); |
Govind Singh | d79e134 | 2015-11-03 16:20:02 +0530 | [diff] [blame] | 765 | } |
| 766 | } |
Manjunathappa Prakash | c8e7564 | 2016-06-03 19:32:27 -0700 | [diff] [blame] | 767 | |
Govind Singh | d79e134 | 2015-11-03 16:20:02 +0530 | [diff] [blame] | 768 | /** |
| 769 | * htt_rx_dbg_rxbuf_set() - reset element of rx buff list |
| 770 | * @pdev: pdev handle |
| 771 | * @netbuf: rx sk_buff |
| 772 | * Return: none |
| 773 | */ |
| 774 | static inline |
| 775 | void htt_rx_dbg_rxbuf_reset(struct htt_pdev_t *pdev, |
Nirav Shah | cbc6d72 | 2016-03-01 16:24:53 +0530 | [diff] [blame] | 776 | qdf_nbuf_t netbuf) |
Govind Singh | d79e134 | 2015-11-03 16:20:02 +0530 | [diff] [blame] | 777 | { |
| 778 | uint32_t index; |
| 779 | |
| 780 | if (pdev->rx_buff_list) { |
Orhan K AKYILDIZ | a8e2e6f | 2016-10-13 22:24:12 -0700 | [diff] [blame] | 781 | qdf_spin_lock_bh(&(pdev->rx_buff_list_lock)); |
Govind Singh | d79e134 | 2015-11-03 16:20:02 +0530 | [diff] [blame] | 782 | index = NBUF_MAP_ID(netbuf); |
| 783 | if (index < HTT_RX_RING_BUFF_DBG_LIST) { |
Orhan K AKYILDIZ | 0c1b6bf | 2016-11-28 18:47:24 -0800 | [diff] [blame] | 784 | pdev->rx_buff_list[index].recved = |
Orhan K AKYILDIZ | a8e2e6f | 2016-10-13 22:24:12 -0700 | [diff] [blame] | 785 | qdf_get_log_timestamp(); |
Orhan K AKYILDIZ | fdd74de | 2016-12-15 12:08:04 -0800 | [diff] [blame] | 786 | pdev->rx_buff_recvd_cum++; |
| 787 | } else { |
| 788 | pdev->rx_buff_recvd_err++; |
Govind Singh | d79e134 | 2015-11-03 16:20:02 +0530 | [diff] [blame] | 789 | } |
Orhan K AKYILDIZ | fdd74de | 2016-12-15 12:08:04 -0800 | [diff] [blame] | 790 | pdev->rx_buff_list[pdev->rx_buff_index].cpu |= |
| 791 | (1 << qdf_get_cpu()); |
Orhan K AKYILDIZ | a8e2e6f | 2016-10-13 22:24:12 -0700 | [diff] [blame] | 792 | qdf_spin_unlock_bh(&(pdev->rx_buff_list_lock)); |
Govind Singh | d79e134 | 2015-11-03 16:20:02 +0530 | [diff] [blame] | 793 | } |
| 794 | } |
Govind Singh | c5ce290 | 2015-10-26 14:32:43 +0530 | [diff] [blame] | 795 | /** |
Orhan K AKYILDIZ | 0c1b6bf | 2016-11-28 18:47:24 -0800 | [diff] [blame] | 796 | * htt_rx_dbg_rxbuf_indupd() - add a record for alloc index update |
| 797 | * @pdev: pdev handle |
| 798 | * @idx : value of the index |
| 799 | * |
| 800 | * Return: none |
| 801 | */ |
| 802 | static inline |
| 803 | void htt_rx_dbg_rxbuf_indupd(struct htt_pdev_t *pdev, int alloc_index) |
| 804 | { |
| 805 | if (pdev->rx_buff_list) { |
| 806 | qdf_spin_lock_bh(&(pdev->rx_buff_list_lock)); |
| 807 | pdev->rx_buff_list[pdev->rx_buff_index].paddr = 0; |
| 808 | pdev->rx_buff_list[pdev->rx_buff_index].nbuf = 0; |
| 809 | pdev->rx_buff_list[pdev->rx_buff_index].nbuf_data = 0; |
| 810 | pdev->rx_buff_list[pdev->rx_buff_index].posted = |
| 811 | qdf_get_log_timestamp(); |
| 812 | pdev->rx_buff_list[pdev->rx_buff_index].recved = |
| 813 | (uint64_t)alloc_index; |
Orhan K AKYILDIZ | fdd74de | 2016-12-15 12:08:04 -0800 | [diff] [blame] | 814 | pdev->rx_buff_list[pdev->rx_buff_index].cpu = |
| 815 | (1 << qdf_get_cpu()); |
Orhan K AKYILDIZ | 0c1b6bf | 2016-11-28 18:47:24 -0800 | [diff] [blame] | 816 | if (++pdev->rx_buff_index >= |
| 817 | HTT_RX_RING_BUFF_DBG_LIST) |
| 818 | pdev->rx_buff_index = 0; |
| 819 | qdf_spin_unlock_bh(&(pdev->rx_buff_list_lock)); |
| 820 | } |
| 821 | } |
| 822 | /** |
| 823 | * htt_rx_dbg_rxbuf_httrxind() - add a record for recipt of htt rx_ind msg |
| 824 | * @pdev: pdev handle |
| 825 | * |
| 826 | * Return: none |
| 827 | */ |
| 828 | static inline |
Orhan K AKYILDIZ | fdd74de | 2016-12-15 12:08:04 -0800 | [diff] [blame] | 829 | void htt_rx_dbg_rxbuf_httrxind(struct htt_pdev_t *pdev, unsigned int msdu_cnt) |
Orhan K AKYILDIZ | 0c1b6bf | 2016-11-28 18:47:24 -0800 | [diff] [blame] | 830 | { |
| 831 | if (pdev->rx_buff_list) { |
| 832 | qdf_spin_lock_bh(&(pdev->rx_buff_list_lock)); |
Orhan K AKYILDIZ | fdd74de | 2016-12-15 12:08:04 -0800 | [diff] [blame] | 833 | pdev->rx_buff_list[pdev->rx_buff_index].paddr = msdu_cnt; |
Orhan K AKYILDIZ | 0c1b6bf | 2016-11-28 18:47:24 -0800 | [diff] [blame] | 834 | pdev->rx_buff_list[pdev->rx_buff_index].nbuf = 0; |
| 835 | pdev->rx_buff_list[pdev->rx_buff_index].nbuf_data = 0; |
| 836 | pdev->rx_buff_list[pdev->rx_buff_index].posted = |
| 837 | qdf_get_log_timestamp(); |
| 838 | pdev->rx_buff_list[pdev->rx_buff_index].recved = |
| 839 | (uint64_t)0x48545452584D5347; /* 'HTTRXMSG' */ |
Orhan K AKYILDIZ | fdd74de | 2016-12-15 12:08:04 -0800 | [diff] [blame] | 840 | pdev->rx_buff_list[pdev->rx_buff_index].cpu = |
| 841 | (1 << qdf_get_cpu()); |
Orhan K AKYILDIZ | 0c1b6bf | 2016-11-28 18:47:24 -0800 | [diff] [blame] | 842 | if (++pdev->rx_buff_index >= |
| 843 | HTT_RX_RING_BUFF_DBG_LIST) |
| 844 | pdev->rx_buff_index = 0; |
| 845 | qdf_spin_unlock_bh(&(pdev->rx_buff_list_lock)); |
| 846 | } |
| 847 | } |
| 848 | |
| 849 | /** |
Govind Singh | c5ce290 | 2015-10-26 14:32:43 +0530 | [diff] [blame] | 850 | * htt_rx_dbg_rxbuf_deinit() - deinit debug rx buff list |
| 851 | * @pdev: pdev handle |
| 852 | * |
| 853 | * Return: none |
| 854 | */ |
| 855 | static inline |
| 856 | void htt_rx_dbg_rxbuf_deinit(struct htt_pdev_t *pdev) |
| 857 | { |
| 858 | if (pdev->rx_buff_list) |
Orhan K AKYILDIZ | 3d926d8 | 2017-02-28 18:05:41 -0800 | [diff] [blame] | 859 | pdev->rx_buff_list = NULL; |
Houston Hoffman | 2eac7c4 | 2016-12-12 12:22:52 -0800 | [diff] [blame] | 860 | qdf_spinlock_destroy(&(pdev->rx_buff_list_lock)); |
Govind Singh | c5ce290 | 2015-10-26 14:32:43 +0530 | [diff] [blame] | 861 | } |
Govind Singh | d79e134 | 2015-11-03 16:20:02 +0530 | [diff] [blame] | 862 | #else |
| 863 | static inline |
| 864 | void htt_rx_dbg_rxbuf_init(struct htt_pdev_t *pdev) |
| 865 | { |
Govind Singh | d79e134 | 2015-11-03 16:20:02 +0530 | [diff] [blame] | 866 | } |
Mohit Khanna | c19888f | 2017-02-09 12:50:15 -0800 | [diff] [blame] | 867 | static inline int htt_display_rx_buf_debug(struct htt_pdev_t *pdev) |
| 868 | { |
| 869 | return 0; |
| 870 | } |
| 871 | |
Govind Singh | d79e134 | 2015-11-03 16:20:02 +0530 | [diff] [blame] | 872 | static inline |
| 873 | void htt_rx_dbg_rxbuf_set(struct htt_pdev_t *pdev, |
| 874 | uint32_t paddr, |
Nirav Shah | cbc6d72 | 2016-03-01 16:24:53 +0530 | [diff] [blame] | 875 | qdf_nbuf_t rx_netbuf) |
Govind Singh | d79e134 | 2015-11-03 16:20:02 +0530 | [diff] [blame] | 876 | { |
Govind Singh | d79e134 | 2015-11-03 16:20:02 +0530 | [diff] [blame] | 877 | } |
| 878 | static inline |
| 879 | void htt_rx_dbg_rxbuf_reset(struct htt_pdev_t *pdev, |
Nirav Shah | cbc6d72 | 2016-03-01 16:24:53 +0530 | [diff] [blame] | 880 | qdf_nbuf_t netbuf) |
Govind Singh | d79e134 | 2015-11-03 16:20:02 +0530 | [diff] [blame] | 881 | { |
Govind Singh | d79e134 | 2015-11-03 16:20:02 +0530 | [diff] [blame] | 882 | } |
Govind Singh | c5ce290 | 2015-10-26 14:32:43 +0530 | [diff] [blame] | 883 | static inline |
Orhan K AKYILDIZ | ba81c51 | 2016-12-21 16:13:07 -0800 | [diff] [blame] | 884 | void htt_rx_dbg_rxbuf_indupd(struct htt_pdev_t *pdev, |
Orhan K AKYILDIZ | 0c1b6bf | 2016-11-28 18:47:24 -0800 | [diff] [blame] | 885 | int alloc_index) |
| 886 | { |
Orhan K AKYILDIZ | 0c1b6bf | 2016-11-28 18:47:24 -0800 | [diff] [blame] | 887 | } |
| 888 | static inline |
Orhan K AKYILDIZ | fdd74de | 2016-12-15 12:08:04 -0800 | [diff] [blame] | 889 | void htt_rx_dbg_rxbuf_httrxind(struct htt_pdev_t *pdev, |
| 890 | unsigned int msdu_cnt) |
Orhan K AKYILDIZ | 0c1b6bf | 2016-11-28 18:47:24 -0800 | [diff] [blame] | 891 | { |
Orhan K AKYILDIZ | 0c1b6bf | 2016-11-28 18:47:24 -0800 | [diff] [blame] | 892 | } |
| 893 | static inline |
Govind Singh | c5ce290 | 2015-10-26 14:32:43 +0530 | [diff] [blame] | 894 | void htt_rx_dbg_rxbuf_deinit(struct htt_pdev_t *pdev) |
| 895 | { |
| 896 | return; |
| 897 | } |
Govind Singh | d79e134 | 2015-11-03 16:20:02 +0530 | [diff] [blame] | 898 | #endif |
Prakash Dhavali | 7090c5f | 2015-11-02 17:55:19 -0800 | [diff] [blame] | 899 | #endif /* _HTT_INTERNAL__H_ */ |