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Krunal Soni4274f362016-12-14 19:55:25 -08001/*
Amar Singhalef59eee2018-01-02 12:46:35 -08002 * Copyright (c) 2013-2018 The Linux Foundation. All rights reserved.
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08003 *
4 * Previously licensed under the ISC license by Qualcomm Atheros, Inc.
5 *
6 *
7 * Permission to use, copy, modify, and/or distribute this software for
8 * any purpose with or without fee is hereby granted, provided that the
9 * above copyright notice and this permission notice appear in all
10 * copies.
11 *
12 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
13 * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
14 * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
15 * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
16 * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
17 * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
18 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
19 * PERFORMANCE OF THIS SOFTWARE.
20 */
21
22/*
23 * This file was originally distributed by Qualcomm Atheros, Inc.
24 * under proprietary terms before Copyright ownership was assigned
25 * to the Linux Foundation.
26 */
27
28#ifndef WMA_H
29#define WMA_H
30
31#include "a_types.h"
Anurag Chouhan6d760662016-02-20 16:05:43 +053032#include "qdf_types.h"
Prakash Dhavali7090c5f2015-11-02 17:55:19 -080033#include "osapi_linux.h"
34#include "htc_packet.h"
Anurag Chouhance0dc992016-02-16 18:18:03 +053035#include "i_qdf_event.h"
Prakash Dhavali7090c5f2015-11-02 17:55:19 -080036#include "wmi_services.h"
37#include "wmi_unified.h"
38#include "wmi_version.h"
Anurag Chouhan6d760662016-02-20 16:05:43 +053039#include "qdf_types.h"
Prakash Dhavali7090c5f2015-11-02 17:55:19 -080040#include "cfg_api.h"
Anurag Chouhance0dc992016-02-16 18:18:03 +053041#include "qdf_status.h"
Prakash Dhavali7090c5f2015-11-02 17:55:19 -080042#include "cds_sched.h"
Varun Reddy Yeturuba1942a2017-06-20 15:32:19 -070043#include "cds_config.h"
Prakash Dhavali7090c5f2015-11-02 17:55:19 -080044#include "sir_mac_prot_def.h"
45#include "wma_types.h"
Prakash Dhavali7090c5f2015-11-02 17:55:19 -080046#include <linux/workqueue.h>
47#include "utils_api.h"
48#include "lim_types.h"
49#include "wmi_unified_api.h"
Dhanashri Atre12a08392016-02-17 13:10:34 -080050#include "cdp_txrx_cmn.h"
Govind Singh8c46db92016-05-10 14:17:16 +053051#include "dbglog.h"
Leo Chang96464902016-10-28 11:10:54 -070052#include "cds_ieee80211_common.h"
Selvaraj, Sridhar0672a122016-12-29 16:11:48 +053053#include "wlan_objmgr_psoc_obj.h"
Venkata Sharath Chandra Manchala0d44d452016-11-23 17:48:15 -080054#include <cdp_txrx_handle.h>
Tushnim Bhattacharyya51258a72017-03-13 12:55:02 -070055#include <wlan_policy_mgr_api.h>
Tushnim Bhattacharyya9e81b4c2017-02-15 17:11:14 -080056
Prakash Dhavali7090c5f2015-11-02 17:55:19 -080057/* Platform specific configuration for max. no. of fragments */
58#define QCA_OL_11AC_TX_MAX_FRAGS 2
59
60/* Private */
61
Rajeev Kumardaf1c612016-04-05 02:56:41 -070062#define WMA_READY_EVENTID_TIMEOUT 6000
63#define WMA_SERVICE_READY_EXT_TIMEOUT 6000
Prakash Dhavali7090c5f2015-11-02 17:55:19 -080064#define WMA_TGT_SUSPEND_COMPLETE_TIMEOUT 6000
Dustin Brownd0a76562017-10-13 14:48:37 -070065#define WMA_WAKE_LOCK_TIMEOUT WAKELOCK_DURATION_RECOMMENDED
Yuanyuan Liuc7432032016-11-09 11:34:45 -080066#define WMA_RESUME_TIMEOUT 25000
Prakash Dhavali7090c5f2015-11-02 17:55:19 -080067#define MAX_MEM_CHUNKS 32
Sandeep Puligilla4a58f7f2017-05-16 16:36:56 -070068#define NAN_CLUSTER_ID_BYTES 4
Prakash Dhavali7090c5f2015-11-02 17:55:19 -080069
Prakash Dhavali7090c5f2015-11-02 17:55:19 -080070#define WMA_CRASH_INJECT_TIMEOUT 5000
71
Govind Singhefc5ccd2016-04-25 11:11:55 +053072/* MAC ID to PDEV ID mapping is as given below
73 * MAC_ID PDEV_ID
74 * 0 1
75 * 1 2
76 * SOC Level WMI_PDEV_ID_SOC
77 */
78#define WMA_MAC_TO_PDEV_MAP(x) ((x) + (1))
79#define WMA_PDEV_TO_MAC_MAP(x) ((x) - (1))
80
Prakash Dhavali7090c5f2015-11-02 17:55:19 -080081/* In prima 12 HW stations are supported including BCAST STA(staId 0)
82 * and SELF STA(staId 1) so total ASSOC stations which can connect to Prima
83 * SoftAP = 12 - 1(Self STa) - 1(Bcast Sta) = 10 Stations.
84 */
85
86#ifdef WLAN_SOFTAP_VSTA_FEATURE
87#define WMA_MAX_SUPPORTED_STAS 38
88#else
89#define WMA_MAX_SUPPORTED_STAS 12
90#endif
Naveen Rawatb0c5b6b2017-11-27 17:37:40 -080091#define WMA_MAX_SUPPORTED_BSS SIR_MAX_SUPPORTED_BSS
Prakash Dhavali7090c5f2015-11-02 17:55:19 -080092
Vignesh Viswanathan56f26252017-08-31 15:26:01 +053093#define WMA_MAX_MGMT_MPDU_LEN 2000
94
Prakash Dhavali7090c5f2015-11-02 17:55:19 -080095#define FRAGMENT_SIZE 3072
96
Kapil Gupta10800b92017-05-31 19:14:47 +053097#define MAX_PRINT_FAILURE_CNT 50
98
Prakash Dhavali7090c5f2015-11-02 17:55:19 -080099#define WMA_INVALID_VDEV_ID 0xFF
100#define MAX_MEM_CHUNKS 32
101#define WMA_MAX_VDEV_SIZE 20
102#define WMA_VDEV_TBL_ENTRY_ADD 1
103#define WMA_VDEV_TBL_ENTRY_DEL 0
104
105/* 11A/G channel boundary */
106#define WMA_11A_CHANNEL_BEGIN 34
107#define WMA_11A_CHANNEL_END 165
108#define WMA_11G_CHANNEL_BEGIN 1
109#define WMA_11G_CHANNEL_END 14
110
111#define WMA_11P_CHANNEL_BEGIN (170)
112#define WMA_11P_CHANNEL_END (184)
113
114#define WMA_LOGD(args ...) \
Anurag Chouhanb2dc16f2016-02-25 11:47:37 +0530115 QDF_TRACE(QDF_MODULE_ID_WMA, QDF_TRACE_LEVEL_DEBUG, ## args)
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800116#define WMA_LOGI(args ...) \
Anurag Chouhanb2dc16f2016-02-25 11:47:37 +0530117 QDF_TRACE(QDF_MODULE_ID_WMA, QDF_TRACE_LEVEL_INFO, ## args)
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800118#define WMA_LOGW(args ...) \
Anurag Chouhanb2dc16f2016-02-25 11:47:37 +0530119 QDF_TRACE(QDF_MODULE_ID_WMA, QDF_TRACE_LEVEL_WARN, ## args)
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800120#define WMA_LOGE(args ...) \
Anurag Chouhanb2dc16f2016-02-25 11:47:37 +0530121 QDF_TRACE(QDF_MODULE_ID_WMA, QDF_TRACE_LEVEL_ERROR, ## args)
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800122#define WMA_LOGP(args ...) \
Anurag Chouhanb2dc16f2016-02-25 11:47:37 +0530123 QDF_TRACE(QDF_MODULE_ID_WMA, QDF_TRACE_LEVEL_FATAL, ## args)
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800124
125#define WMA_DEBUG_ALWAYS
126
127#ifdef WMA_DEBUG_ALWAYS
128#define WMA_LOGA(args ...) \
Anurag Chouhanb2dc16f2016-02-25 11:47:37 +0530129 QDF_TRACE(QDF_MODULE_ID_WMA, QDF_TRACE_LEVEL_FATAL, ## args)
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800130#else
131#define WMA_LOGA(args ...)
132#endif
133
134#define ALIGNED_WORD_SIZE 4
135#define WLAN_HAL_MSG_TYPE_MAX_ENUM_SIZE 0x7FFF
Govind Singhd76a5b02016-03-08 15:12:14 +0530136#define WMA_WILDCARD_PDEV_ID 0x0
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800137
138/* Prefix used by scan req ids generated on the host */
139#define WMA_HOST_SCAN_REQID_PREFIX 0xA000
140/* Prefix used by roam scan req ids generated on the host */
141#define WMA_HOST_ROAM_SCAN_REQID_PREFIX 0xA800
142/* Prefix used by scan requestor id on host */
143#define WMA_HOST_SCAN_REQUESTOR_ID_PREFIX 0xA000
144
145#define WMA_HW_DEF_SCAN_MAX_DURATION 30000 /* 30 secs */
146
147/* Max offchannel duration */
148#define WMA_BURST_SCAN_MAX_NUM_OFFCHANNELS (3)
149#define WMA_SCAN_NPROBES_DEFAULT (2)
150#define WMA_SCAN_IDLE_TIME_DEFAULT (25)
151#define WMA_P2P_SCAN_MAX_BURST_DURATION (180)
152#define WMA_CTS_DURATION_MS_MAX (32)
153#define WMA_GO_MIN_ACTIVE_SCAN_BURST_DURATION (40)
154#define WMA_GO_MAX_ACTIVE_SCAN_BURST_DURATION (120)
155#define WMA_DWELL_TIME_PASSIVE_DEFAULT (110)
156#define WMA_DWELL_TIME_PROBE_TIME_MAP_SIZE (11)
157#define WMA_3PORT_CONC_SCAN_MAX_BURST_DURATION (25)
158
159#define WMA_SEC_TO_USEC (1000000)
160
161#define BEACON_TX_BUFFER_SIZE (512)
162
163/* WMA_ETHER_TYPE_OFFSET = sa(6) + da(6) */
164#define WMA_ETHER_TYPE_OFFSET (6 + 6)
165/* WMA_ICMP_V6_HEADER_OFFSET = sa(6) + da(6) + eth_type(2) + icmp_v6_hdr(6)*/
166#define WMA_ICMP_V6_HEADER_OFFSET (6 + 6 + 2 + 6)
167/* WMA_ICMP_V6_TYPE_OFFSET = sa(6) + da(6) + eth_type(2) + 40 */
168#define WMA_ICMP_V6_TYPE_OFFSET (6 + 6 + 2 + 40)
Sreelakshmi Konamkie1cd51f2016-08-19 16:58:24 +0530169/* WMA_IPV4_PROTOCOL = sa(6) + da(6) + eth_type(2) + 9 */
170#define WMA_IPV4_PROTOCOL (6 + 6 + 2 + 9)
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800171#define WMA_ICMP_V6_HEADER_TYPE (0x3A)
172#define WMA_ICMP_V6_RA_TYPE (0x86)
173#define WMA_ICMP_V6_NS_TYPE (0x87)
174#define WMA_ICMP_V6_NA_TYPE (0x88)
175#define WMA_BCAST_MAC_ADDR (0xFF)
176#define WMA_MCAST_IPV4_MAC_ADDR (0x01)
177#define WMA_MCAST_IPV6_MAC_ADDR (0x33)
Sreelakshmi Konamkie1cd51f2016-08-19 16:58:24 +0530178#define WMA_ICMP_PROTOCOL (0x01)
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800179
Himanshu Agarwal82de9042016-07-20 18:11:03 +0530180#define WMA_IS_EAPOL_GET_MIN_LEN 14
181#define WMA_EAPOL_SUBTYPE_GET_MIN_LEN 21
182#define WMA_EAPOL_INFO_GET_MIN_LEN 23
183#define WMA_IS_DHCP_GET_MIN_LEN 38
184#define WMA_DHCP_SUBTYPE_GET_MIN_LEN 0x11D
185#define WMA_DHCP_INFO_GET_MIN_LEN 50
186#define WMA_IS_ARP_GET_MIN_LEN 14
187#define WMA_ARP_SUBTYPE_GET_MIN_LEN 22
188#define WMA_IPV4_PROTO_GET_MIN_LEN 24
189#define WMA_IPV4_PKT_INFO_GET_MIN_LEN 42
190#define WMA_ICMP_SUBTYPE_GET_MIN_LEN 35
191#define WMA_IPV6_PROTO_GET_MIN_LEN 21
192#define WMA_IPV6_PKT_INFO_GET_MIN_LEN 62
193#define WMA_ICMPV6_SUBTYPE_GET_MIN_LEN 55
Jiachao Wu712d4fd2017-08-23 16:52:34 +0800194
195/* Beacon tx rate */
196#define WMA_BEACON_TX_RATE_1_M 10
197#define WMA_BEACON_TX_RATE_2_M 20
198#define WMA_BEACON_TX_RATE_5_5_M 55
199#define WMA_BEACON_TX_RATE_11_M 110
200#define WMA_BEACON_TX_RATE_6_M 60
201#define WMA_BEACON_TX_RATE_9_M 90
202#define WMA_BEACON_TX_RATE_12_M 120
203#define WMA_BEACON_TX_RATE_18_M 180
204#define WMA_BEACON_TX_RATE_24_M 240
205#define WMA_BEACON_TX_RATE_36_M 360
206#define WMA_BEACON_TX_RATE_48_M 480
207#define WMA_BEACON_TX_RATE_54_M 540
208
Himanshu Agarwaldd356df2016-07-20 19:04:39 +0530209/**
210 * ds_mode: distribution system mode
211 * @IEEE80211_NO_DS: NO DS at either side
212 * @IEEE80211_TO_DS: DS at receiver side
213 * @IEEE80211_FROM_DS: DS at sender side
214 * @IEEE80211_DS_TO_DS: DS at both sender and revceiver side
215 */
216enum ds_mode {
217 IEEE80211_NO_DS,
218 IEEE80211_TO_DS,
219 IEEE80211_FROM_DS,
220 IEEE80211_DS_TO_DS
221};
222
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800223/* Roaming default values
224 * All time and period values are in milliseconds.
225 * All rssi values are in dB except for WMA_NOISE_FLOOR_DBM_DEFAULT.
226 */
227
228#define WMA_ROAM_SCAN_CHANNEL_SWITCH_TIME (4)
229#define WMA_NOISE_FLOOR_DBM_DEFAULT (-96)
230#define WMA_ROAM_RSSI_DIFF_DEFAULT (5)
231#define WMA_ROAM_DWELL_TIME_ACTIVE_DEFAULT (100)
232#define WMA_ROAM_DWELL_TIME_PASSIVE_DEFAULT (110)
233#define WMA_ROAM_MIN_REST_TIME_DEFAULT (50)
234#define WMA_ROAM_MAX_REST_TIME_DEFAULT (500)
235#define WMA_ROAM_LOW_RSSI_TRIGGER_DEFAULT (20)
236#define WMA_ROAM_LOW_RSSI_TRIGGER_VERYLOW (10)
237#define WMA_ROAM_BEACON_WEIGHT_DEFAULT (14)
238#define WMA_ROAM_OPP_SCAN_PERIOD_DEFAULT (120000)
Manikandan Mohan1dd8b5d2017-04-18 15:54:09 -0700239#define WMA_ROAM_OPP_SCAN_AGING_PERIOD_DEFAULT \
240 (WMA_ROAM_OPP_SCAN_PERIOD_DEFAULT * 5)
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800241#define WMA_ROAM_BMISS_FIRST_BCNT_DEFAULT (10)
242#define WMA_ROAM_BMISS_FINAL_BCNT_DEFAULT (10)
243#define WMA_ROAM_BMISS_FIRST_BCNT_DEFAULT_P2P (15)
244#define WMA_ROAM_BMISS_FINAL_BCNT_DEFAULT_P2P (45)
245
246#define WMA_INVALID_KEY_IDX 0xff
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800247
248#define WMA_MAX_RF_CHAINS(x) ((1 << x) - 1)
249#define WMA_MIN_RF_CHAINS (1)
Abhishek Singh9100cc82017-04-17 11:03:55 +0530250#define WMA_MAX_NSS (2)
251
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800252
253#ifdef FEATURE_WLAN_EXTSCAN
254#define WMA_MAX_EXTSCAN_MSG_SIZE 1536
255#define WMA_EXTSCAN_REST_TIME 100
256#define WMA_EXTSCAN_MAX_SCAN_TIME 50000
257#define WMA_EXTSCAN_BURST_DURATION 150
258#endif
259
gaoleze5108942017-03-31 16:56:42 +0800260#define WMA_CHAN_START_RESP 0
261#define WMA_CHAN_END_RESP 1
262
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800263#define WMA_BCN_BUF_MAX_SIZE 2500
264#define WMA_NOA_IE_SIZE(num_desc) (2 + (13 * (num_desc)))
265#define WMA_MAX_NOA_DESCRIPTORS 4
266
267#define WMA_TIM_SUPPORTED_PVB_LENGTH ((HAL_NUM_STA / 8) + 1)
268
269#define WMA_WOW_PTRN_MASK_VALID 0xFF
270#define WMA_NUM_BITS_IN_BYTE 8
271
272#define WMA_AP_WOW_DEFAULT_PTRN_MAX 4
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800273
274#define WMA_BSS_STATUS_STARTED 0x1
275#define WMA_BSS_STATUS_STOPPED 0x2
276
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800277#define WMA_TARGET_REQ_TYPE_VDEV_START 0x1
278#define WMA_TARGET_REQ_TYPE_VDEV_STOP 0x2
279#define WMA_TARGET_REQ_TYPE_VDEV_DEL 0x3
280
281#define WMA_PEER_ASSOC_CNF_START 0x01
Sandeep Puligillaafa52892016-10-26 19:03:16 -0700282#define WMA_PEER_ASSOC_TIMEOUT (6000) /* 6 seconds */
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800283
Sandeep Puligilla19ddda22016-01-05 12:18:02 -0800284#define WMA_DELETE_STA_RSP_START 0x02
285#define WMA_DELETE_STA_TIMEOUT (6000) /* 6 seconds */
286
287#define WMA_DEL_P2P_SELF_STA_RSP_START 0x03
Sandeep Puligillabbee8172017-04-07 19:26:33 -0700288#define WMA_SET_LINK_PEER_RSP 0x04
Abhishek Singhe8be9a62017-05-30 12:13:29 +0530289#define WMA_DELETE_PEER_RSP 0x05
Tushnim Bhattacharyya86294892017-10-25 16:29:11 -0700290
291#define WMA_PDEV_SET_HW_MODE_RESP 0x06
292
Dustin Brownd0a76562017-10-13 14:48:37 -0700293#define WMA_VDEV_START_REQUEST_TIMEOUT 6000 /* 6s */
294#define WMA_VDEV_STOP_REQUEST_TIMEOUT 6000 /* 6s */
295#define WMA_VDEV_HW_MODE_REQUEST_TIMEOUT 5000 /* 5s */
296#define WMA_VDEV_PLCY_MGR_CMD_TIMEOUT 3000 /* 3s */
297#define WMA_VDEV_SET_KEY_WAKELOCK_TIMEOUT WAKELOCK_DURATION_RECOMMENDED
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800298
Hanumanth Reddy Pothula90051782017-05-04 22:14:43 +0530299#define WMA_TGT_INVALID_SNR (0)
300
Naveen Rawatf440a132017-05-05 12:27:39 -0700301#define WMA_TGT_IS_VALID_SNR(x) ((x) >= 0 && (x) < WMA_TGT_MAX_SNR)
Hanumanth Reddy Pothula90051782017-05-04 22:14:43 +0530302#define WMA_TGT_IS_INVALID_SNR(x) (!WMA_TGT_IS_VALID_SNR(x))
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800303
304#define WMA_TX_Q_RECHECK_TIMER_WAIT 2 /* 2 ms */
305#define WMA_TX_Q_RECHECK_TIMER_MAX_WAIT 20 /* 20 ms */
306#define WMA_MAX_NUM_ARGS 8
307
308#define WMA_SMPS_MASK_LOWER_16BITS 0xFF
309#define WMA_SMPS_MASK_UPPER_3BITS 0x7
310#define WMA_SMPS_PARAM_VALUE_S 29
311
312#define WMA_MAX_SCAN_ID 0x00FF
313
314/*
315 * Setting the Tx Comp Timeout to 1 secs.
316 * TODO: Need to Revist the Timing
317 */
318#define WMA_TX_FRAME_COMPLETE_TIMEOUT 1000
319#define WMA_TX_FRAME_BUFFER_NO_FREE 0
320#define WMA_TX_FRAME_BUFFER_FREE 1
321
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800322/* Default InActivity Time is 200 ms */
323#define POWERSAVE_DEFAULT_INACTIVITY_TIME 200
324
Mukul Sharmaed92f2f2017-04-20 00:06:28 +0530325/* Default WOW InActivity Time is 50 ms */
326#define WOW_POWERSAVE_DEFAULT_INACTIVITY_TIME 50
327
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800328/* Default Listen Interval */
329#define POWERSAVE_DEFAULT_LISTEN_INTERVAL 1
330
331/*
332 * TODO: Add WMI_CMD_ID_MAX as part of WMI_CMD_ID
333 * instead of assigning it to the last valid wmi
334 * cmd+1 to avoid updating this when a command is
335 * added/deleted.
336 */
337#define WMI_CMDID_MAX (WMI_TXBF_CMDID + 1)
338
339#define WMA_NLO_FREQ_THRESH 1000 /* in MHz */
340#define WMA_SEC_TO_MSEC(sec) (sec * 1000) /* sec to msec */
341#define WMA_MSEC_TO_USEC(msec) (msec * 1000) /* msec to usec */
342
343/* Default rssi threshold defined in CFG80211 */
344#define WMA_RSSI_THOLD_DEFAULT -300
345
Dustin Brownd0a76562017-10-13 14:48:37 -0700346#define WMA_AUTH_REQ_RECV_WAKE_LOCK_TIMEOUT WAKELOCK_DURATION_RECOMMENDED
347#define WMA_ASSOC_REQ_RECV_WAKE_LOCK_DURATION WAKELOCK_DURATION_RECOMMENDED
348#define WMA_DEAUTH_RECV_WAKE_LOCK_DURATION WAKELOCK_DURATION_RECOMMENDED
349#define WMA_DISASSOC_RECV_WAKE_LOCK_DURATION WAKELOCK_DURATION_RECOMMENDED
yeshwanth sriram guntuka37c09822017-01-24 18:30:15 +0530350#define WMA_ROAM_HO_WAKE_LOCK_DURATION (500) /* in msec */
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800351#ifdef FEATURE_WLAN_AUTO_SHUTDOWN
Dustin Brownd0a76562017-10-13 14:48:37 -0700352#define WMA_AUTO_SHUTDOWN_WAKE_LOCK_DURATION WAKELOCK_DURATION_RECOMMENDED
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800353#endif
Dustin Brownd0a76562017-10-13 14:48:37 -0700354#define WMA_BMISS_EVENT_WAKE_LOCK_DURATION WAKELOCK_DURATION_RECOMMENDED
355#define WMA_FW_RSP_EVENT_WAKE_LOCK_DURATION WAKELOCK_DURATION_MAX
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800356
357#define WMA_TXMIC_LEN 8
358#define WMA_RXMIC_LEN 8
359
360/*
361 * Length = (2 octets for Index and CTWin/Opp PS) and
362 * (13 octets for each NOA Descriptors)
363 */
364
365#define WMA_P2P_NOA_IE_OPP_PS_SET (0x80)
366#define WMA_P2P_NOA_IE_CTWIN_MASK (0x7F)
367
368#define WMA_P2P_IE_ID 0xdd
369#define WMA_P2P_WFA_OUI { 0x50, 0x6f, 0x9a }
370#define WMA_P2P_WFA_VER 0x09 /* ver 1.0 */
371#define WMA_WSC_OUI { 0x00, 0x50, 0xF2 } /* Microsoft WSC OUI byte */
372
373/* P2P Sub element defintions (according to table 5 of Wifi's P2P spec) */
374#define WMA_P2P_SUB_ELEMENT_STATUS 0
375#define WMA_P2P_SUB_ELEMENT_MINOR_REASON 1
376#define WMA_P2P_SUB_ELEMENT_CAPABILITY 2
377#define WMA_P2P_SUB_ELEMENT_DEVICE_ID 3
378#define WMA_P2P_SUB_ELEMENT_GO_INTENT 4
379#define WMA_P2P_SUB_ELEMENT_CONFIGURATION_TIMEOUT 5
380#define WMA_P2P_SUB_ELEMENT_LISTEN_CHANNEL 6
381#define WMA_P2P_SUB_ELEMENT_GROUP_BSSID 7
382#define WMA_P2P_SUB_ELEMENT_EXTENDED_LISTEN_TIMING 8
383#define WMA_P2P_SUB_ELEMENT_INTENDED_INTERFACE_ADDR 9
384#define WMA_P2P_SUB_ELEMENT_MANAGEABILITY 10
385#define WMA_P2P_SUB_ELEMENT_CHANNEL_LIST 11
386#define WMA_P2P_SUB_ELEMENT_NOA 12
387#define WMA_P2P_SUB_ELEMENT_DEVICE_INFO 13
388#define WMA_P2P_SUB_ELEMENT_GROUP_INFO 14
389#define WMA_P2P_SUB_ELEMENT_GROUP_ID 15
390#define WMA_P2P_SUB_ELEMENT_INTERFACE 16
391#define WMA_P2P_SUB_ELEMENT_OP_CHANNEL 17
392#define WMA_P2P_SUB_ELEMENT_INVITATION_FLAGS 18
393#define WMA_P2P_SUB_ELEMENT_VENDOR 221
394
395/* Macros for handling unaligned memory accesses */
396#define P2PIE_PUT_LE16(a, val) \
397 do { \
398 (a)[1] = ((u16) (val)) >> 8; \
399 (a)[0] = ((u16) (val)) & 0xff; \
400 } while (0)
401
402#define P2PIE_PUT_LE32(a, val) \
403 do { \
404 (a)[3] = (u8) ((((u32) (val)) >> 24) & 0xff); \
405 (a)[2] = (u8) ((((u32) (val)) >> 16) & 0xff); \
406 (a)[1] = (u8) ((((u32) (val)) >> 8) & 0xff); \
407 (a)[0] = (u8) (((u32) (val)) & 0xff); \
408 } while (0)
409
410
411#define WMA_DEFAULT_MAX_PSPOLL_BEFORE_WAKE 1
412
413#define WMA_DEFAULT_QPOWER_MAX_PSPOLL_BEFORE_WAKE 1
414#define WMA_DEFAULT_QPOWER_TX_WAKE_THRESHOLD 2
415#define WMA_DEFAULT_SIFS_BURST_DURATION 8160
416
417#define WMA_VHT_PPS_PAID_MATCH 1
418#define WMA_VHT_PPS_GID_MATCH 2
419#define WMA_VHT_PPS_DELIM_CRC_FAIL 3
420
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800421#define WMA_DEFAULT_HW_MODE_INDEX 0xFFFF
Agrawal, Ashish4e5fa1c2016-09-21 19:03:43 +0530422#define TWO_THIRD (2/3)
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800423
424/**
Nitesh Shah5b7bae02016-09-28 18:58:33 +0530425 * WMA hardware mode list bit-mask definitions.
426 * Bits 4:0, 31:29 are unused.
427 *
428 * The below definitions are added corresponding to WMI DBS HW mode
429 * list to make it independent of firmware changes for WMI definitions.
430 * Currently these definitions have dependency with BIT positions of
431 * the existing WMI macros. Thus, if the BIT positions are changed for
432 * WMI macros, then these macros' BIT definitions are also need to be
433 * changed.
434 */
435#define WMA_HW_MODE_MAC0_TX_STREAMS_BITPOS (28)
436#define WMA_HW_MODE_MAC0_RX_STREAMS_BITPOS (24)
437#define WMA_HW_MODE_MAC1_TX_STREAMS_BITPOS (20)
438#define WMA_HW_MODE_MAC1_RX_STREAMS_BITPOS (16)
439#define WMA_HW_MODE_MAC0_BANDWIDTH_BITPOS (12)
440#define WMA_HW_MODE_MAC1_BANDWIDTH_BITPOS (8)
441#define WMA_HW_MODE_DBS_MODE_BITPOS (7)
442#define WMA_HW_MODE_AGILE_DFS_MODE_BITPOS (6)
443#define WMA_HW_MODE_SBS_MODE_BITPOS (5)
444
445#define WMA_HW_MODE_MAC0_TX_STREAMS_MASK \
446 (0xf << WMA_HW_MODE_MAC0_TX_STREAMS_BITPOS)
447#define WMA_HW_MODE_MAC0_RX_STREAMS_MASK \
448 (0xf << WMA_HW_MODE_MAC0_RX_STREAMS_BITPOS)
449#define WMA_HW_MODE_MAC1_TX_STREAMS_MASK \
450 (0xf << WMA_HW_MODE_MAC1_TX_STREAMS_BITPOS)
451#define WMA_HW_MODE_MAC1_RX_STREAMS_MASK \
452 (0xf << WMA_HW_MODE_MAC1_RX_STREAMS_BITPOS)
453#define WMA_HW_MODE_MAC0_BANDWIDTH_MASK \
454 (0xf << WMA_HW_MODE_MAC0_BANDWIDTH_BITPOS)
455#define WMA_HW_MODE_MAC1_BANDWIDTH_MASK \
456 (0xf << WMA_HW_MODE_MAC1_BANDWIDTH_BITPOS)
457#define WMA_HW_MODE_DBS_MODE_MASK \
458 (0x1 << WMA_HW_MODE_DBS_MODE_BITPOS)
459#define WMA_HW_MODE_AGILE_DFS_MODE_MASK \
460 (0x1 << WMA_HW_MODE_AGILE_DFS_MODE_BITPOS)
461#define WMA_HW_MODE_SBS_MODE_MASK \
462 (0x1 << WMA_HW_MODE_SBS_MODE_BITPOS)
463
464#define WMA_HW_MODE_MAC0_TX_STREAMS_SET(hw_mode, value) \
465 WMI_SET_BITS(hw_mode, WMA_HW_MODE_MAC0_TX_STREAMS_BITPOS, 4, value)
466#define WMA_HW_MODE_MAC0_RX_STREAMS_SET(hw_mode, value) \
467 WMI_SET_BITS(hw_mode, WMA_HW_MODE_MAC0_RX_STREAMS_BITPOS, 4, value)
468#define WMA_HW_MODE_MAC1_TX_STREAMS_SET(hw_mode, value) \
469 WMI_SET_BITS(hw_mode, WMA_HW_MODE_MAC1_TX_STREAMS_BITPOS, 4, value)
470#define WMA_HW_MODE_MAC1_RX_STREAMS_SET(hw_mode, value) \
471 WMI_SET_BITS(hw_mode, WMA_HW_MODE_MAC1_RX_STREAMS_BITPOS, 4, value)
472#define WMA_HW_MODE_MAC0_BANDWIDTH_SET(hw_mode, value) \
473 WMI_SET_BITS(hw_mode, WMA_HW_MODE_MAC0_BANDWIDTH_BITPOS, 4, value)
474#define WMA_HW_MODE_MAC1_BANDWIDTH_SET(hw_mode, value) \
475 WMI_SET_BITS(hw_mode, WMA_HW_MODE_MAC1_BANDWIDTH_BITPOS, 4, value)
476#define WMA_HW_MODE_DBS_MODE_SET(hw_mode, value) \
477 WMI_SET_BITS(hw_mode, WMA_HW_MODE_DBS_MODE_BITPOS, 1, value)
478#define WMA_HW_MODE_AGILE_DFS_SET(hw_mode, value) \
479 WMI_SET_BITS(hw_mode, WMA_HW_MODE_AGILE_DFS_MODE_BITPOS, 1, value)
480#define WMA_HW_MODE_SBS_MODE_SET(hw_mode, value) \
481 WMI_SET_BITS(hw_mode, WMA_HW_MODE_SBS_MODE_BITPOS, 1, value)
482
483#define WMA_HW_MODE_MAC0_TX_STREAMS_GET(hw_mode) \
484 ((hw_mode & WMA_HW_MODE_MAC0_TX_STREAMS_MASK) >> \
485 WMA_HW_MODE_MAC0_TX_STREAMS_BITPOS)
486#define WMA_HW_MODE_MAC0_RX_STREAMS_GET(hw_mode) \
487 ((hw_mode & WMA_HW_MODE_MAC0_RX_STREAMS_MASK) >> \
488 WMA_HW_MODE_MAC0_RX_STREAMS_BITPOS)
489#define WMA_HW_MODE_MAC1_TX_STREAMS_GET(hw_mode) \
490 ((hw_mode & WMA_HW_MODE_MAC1_TX_STREAMS_MASK) >> \
491 WMA_HW_MODE_MAC1_TX_STREAMS_BITPOS)
492#define WMA_HW_MODE_MAC1_RX_STREAMS_GET(hw_mode) \
493 ((hw_mode & WMA_HW_MODE_MAC1_RX_STREAMS_MASK) >> \
494 WMA_HW_MODE_MAC1_RX_STREAMS_BITPOS)
495#define WMA_HW_MODE_MAC0_BANDWIDTH_GET(hw_mode) \
496 ((hw_mode & WMA_HW_MODE_MAC0_BANDWIDTH_MASK) >> \
497 WMA_HW_MODE_MAC0_BANDWIDTH_BITPOS)
498#define WMA_HW_MODE_MAC1_BANDWIDTH_GET(hw_mode) \
499 ((hw_mode & WMA_HW_MODE_MAC1_BANDWIDTH_MASK) >> \
500 WMA_HW_MODE_MAC1_BANDWIDTH_BITPOS)
501#define WMA_HW_MODE_DBS_MODE_GET(hw_mode) \
502 ((hw_mode & WMA_HW_MODE_DBS_MODE_MASK) >> \
503 WMA_HW_MODE_DBS_MODE_BITPOS)
504#define WMA_HW_MODE_AGILE_DFS_GET(hw_mode) \
505 ((hw_mode & WMA_HW_MODE_AGILE_DFS_MODE_MASK) >> \
506 WMA_HW_MODE_AGILE_DFS_MODE_BITPOS)
507#define WMA_HW_MODE_SBS_MODE_GET(hw_mode) \
508 ((hw_mode & WMA_HW_MODE_SBS_MODE_MASK) >> \
509 WMA_HW_MODE_SBS_MODE_BITPOS)
510
511
Nitesh Shah0f3fce52016-10-13 22:01:41 +0530512#define WMA_SCAN_END_EVENT (WMI_SCAN_EVENT_COMPLETED | \
513 WMI_SCAN_EVENT_DEQUEUED | \
514 WMI_SCAN_EVENT_START_FAILED)
Sridhar Selvaraj87309212017-06-28 17:41:50 +0530515/*
516 * PROBE_REQ_TX_DELAY
517 * param to specify probe request Tx delay for scans triggered on this VDEV
518 */
519#define PROBE_REQ_TX_DELAY 10
520
521/* PROBE_REQ_TX_TIME_GAP
522 * param to specify the time gap between each set of probe request transmission.
523 * The number of probe requests in each set depends on the ssid_list and,
524 * bssid_list in the scan request. This parameter will get applied only,
525 * for the scans triggered on this VDEV.
526 */
527#define PROBE_REQ_TX_TIME_GAP 20
Nitesh Shah0f3fce52016-10-13 22:01:41 +0530528
Nitesh Shah5b7bae02016-09-28 18:58:33 +0530529/**
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800530 * struct probeTime_dwellTime - probe time, dwell time map
531 * @dwell_time: dwell time
532 * @probe_time: repeat probe time
533 */
534typedef struct probeTime_dwellTime {
535 uint8_t dwell_time;
536 uint8_t probe_time;
537} t_probeTime_dwellTime;
538
539static const t_probeTime_dwellTime
540 probe_time_dwell_time_map[WMA_DWELL_TIME_PROBE_TIME_MAP_SIZE] = {
Liangwei Dong271f92f2016-09-28 06:05:08 -0400541 {28, 11}, /* 0 SSID */
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800542 {28, 20}, /* 1 SSID */
543 {28, 20}, /* 2 SSID */
544 {28, 20}, /* 3 SSID */
545 {28, 20}, /* 4 SSID */
546 {28, 20}, /* 5 SSID */
547 {28, 20}, /* 6 SSID */
548 {28, 11}, /* 7 SSID */
549 {28, 11}, /* 8 SSID */
550 {28, 11}, /* 9 SSID */
551 {28, 8} /* 10 SSID */
552};
553
Rajeev Kumar8e3e2832015-11-06 16:02:54 -0800554typedef void (*txFailIndCallback)(uint8_t *peer_mac, uint8_t seqNo);
555
Himanshu Agarwalf65bd4c2016-12-05 17:21:12 +0530556typedef void (*tp_wma_packetdump_cb)(qdf_nbuf_t netbuf,
557 uint8_t status, uint8_t vdev_id, uint8_t type);
558
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800559#ifdef FEATURE_WLAN_TDLS
560/**
Kabilan Kannan421714b2015-11-23 04:44:59 -0800561 * enum t_wma_tdls_mode - TDLS mode
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800562 * @WMA_TDLS_SUPPORT_NOT_ENABLED: tdls is disable
563 * @WMA_TDLS_SUPPORT_DISABLED: suppress implicit trigger and not respond to peer
564 * @WMA_TDLS_SUPPORT_EXPLICIT_TRIGGER_ONLY: suppress implicit trigger,
565 * but respond to the peer
566 * @WMA_TDLS_SUPPORT_ENABLED: implicit trigger
Kabilan Kannan421714b2015-11-23 04:44:59 -0800567 * @WMA_TDLS_SUPPORT_ACTIVE_EXTERNAL_CONTROL: External control means
568 * implicit trigger but only to a peer mac configured by user space.
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800569 */
570typedef enum {
571 WMA_TDLS_SUPPORT_NOT_ENABLED = 0,
572 WMA_TDLS_SUPPORT_DISABLED,
573 WMA_TDLS_SUPPORT_EXPLICIT_TRIGGER_ONLY,
574 WMA_TDLS_SUPPORT_ENABLED,
Kabilan Kannan421714b2015-11-23 04:44:59 -0800575 WMA_TDLS_SUPPORT_ACTIVE_EXTERNAL_CONTROL,
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800576} t_wma_tdls_mode;
577
578/**
579 * enum wma_tdls_peer_notification - TDLS events
580 * @WMA_TDLS_SHOULD_DISCOVER: tdls discovery recommended for peer (always based
581 * on tx bytes per second > tx_discover threshold
582 * NB: notification will be re-sent after
583 * discovery_request_interval_ms
584 * @WMA_TDLS_SHOULD_TEARDOWN: tdls link tear down recommended for peer
585 * due to tx bytes per second below
586 * tx_teardown_threshold
587 * NB: this notification sent once
588 * @WMA_TDLS_PEER_DISCONNECTED: tx peer TDLS link tear down complete
589 */
590enum wma_tdls_peer_notification {
591 WMA_TDLS_SHOULD_DISCOVER,
592 WMA_TDLS_SHOULD_TEARDOWN,
593 WMA_TDLS_PEER_DISCONNECTED,
594};
595
596/**
597 * enum wma_tdls_peer_reason - TDLS peer reason
598 * @WMA_TDLS_TEARDOWN_REASON_TX: tdls teardown recommended due to low transmits
599 * @WMA_TDLS_TEARDOWN_REASON_RATE: tdls tear down recommended due to
600 * packet rates < AP rates
601 * @WMA_TDLS_TEARDOWN_REASON_RSSI: tdls link tear down recommended
602 * due to poor RSSI
603 * @WMA_TDLS_TEARDOWN_REASON_SCAN: tdls link tear down recommended
604 * due to offchannel scan
605 * @WMA_TDLS_DISCONNECTED_REASON_PEER_DELETE: tdls peer disconnected
606 * due to peer deletion
607 */
608enum wma_tdls_peer_reason {
609 WMA_TDLS_TEARDOWN_REASON_TX,
610 WMA_TDLS_TEARDOWN_REASON_RATE,
611 WMA_TDLS_TEARDOWN_REASON_RSSI,
612 WMA_TDLS_TEARDOWN_REASON_SCAN,
613 WMA_TDLS_DISCONNECTED_REASON_PEER_DELETE,
614};
615#endif /* FEATURE_WLAN_TDLS */
616
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800617/**
Govind Singhd76a5b02016-03-08 15:12:14 +0530618 * enum wma_rx_exec_ctx - wma rx execution context
619 * @WMA_RX_WORK_CTX: work queue context execution
620 * @WMA_RX_TASKLET_CTX: tasklet context execution
621 * @WMA_RX_SERIALIZER_CTX: MC thread context execution
622 *
623 */
624enum wma_rx_exec_ctx {
625 WMA_RX_WORK_CTX,
626 WMA_RX_TASKLET_CTX,
627 WMA_RX_SERIALIZER_CTX
628};
Krunal Soni2e48d012016-05-02 16:55:26 -0700629
630/**
631 * enum wma_phy_idx
632 * @PHY1: to notify caller that PHY1 specific param needed
633 * @PHY2: to notify caller that PHY2 specific param needed
634 * @PHY1_PHY2: to notify caller that both PHY's param needed
635 * Note: Firmware sends phy map in terms of bitmask, so enum
636 * also needs to be defined that way.
637 *
638 * For example, 0x3 = 0011 = BIT0 corresponds to one phy and
639 * BIT1 coresponds to another phy. There is no direct relation between
640 * each bit to particular PHY (ex. PHYA or PHYB).
641 *
642 * In simple terms, 3 means referring both PHYs & 1 or 2 means
643 * referring to either PHYA or PHYB.
644 */
645enum wma_phy_idx {
646 PHY1 = 0x1, /* 0x1 */
647 PHY2, /* 0x2 */
648 PHY1_PHY2, /* 0x3 */
649};
650
Govind Singhd76a5b02016-03-08 15:12:14 +0530651/**
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800652 * struct wma_mem_chunk - memory chunks
653 * @vaddr: virtual address
654 * @paddr: physical address
655 * @memctx: dma mapped memory
656 * @len: length of data
657 * @req_id: request id
658 *
659 * memory chunck allocated by Host to be managed by FW
660 * used only for low latency interfaces like pcie
661 */
662struct wma_mem_chunk {
663 uint32_t *vaddr;
664 uint32_t paddr;
Manikandan Mohan1dd8b5d2017-04-18 15:54:09 -0700665
Anurag Chouhan6d760662016-02-20 16:05:43 +0530666 qdf_dma_mem_context(memctx);
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800667 uint32_t len;
668 uint32_t req_id;
669};
670
671/**
672 * struct p2p_scan_param - p2p scan listen parameters
673 * @scan_id: scan id
674 * @p2p_scan_type: p2p scan type
675 */
676struct p2p_scan_param {
677 uint32_t scan_id;
678 tSirP2pScanType p2p_scan_type;
679};
680
681/**
682 * struct scan_param - scan parameters
683 * @scan_id: scan id
684 * @scan_requestor_id: scan requestor id
685 * @p2p_scan_type: p2p scan type
686 */
687struct scan_param {
688 uint32_t scan_id;
689 uint32_t scan_requestor_id;
690 tSirP2pScanType p2p_scan_type;
Deepak Dhamdhered97bfb32015-10-11 15:16:18 -0700691 uint32_t chan_freq;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800692};
693
694/**
695 * struct beacon_info - structure to store beacon template
696 * @buf: skb ptr
697 * @len: length
698 * @dma_mapped: is it dma mapped or not
699 * @tim_ie_offset: TIM IE offset
700 * @dtim_count: DTIM count
701 * @seq_no: sequence no
702 * @noa_sub_ie: NOA sub IE
703 * @noa_sub_ie_len: NOA sub IE length
704 * @noa_ie: NOA IE
705 * @p2p_ie_offset: p2p IE offset
706 * @lock: lock
707 */
708struct beacon_info {
Nirav Shahcbc6d722016-03-01 16:24:53 +0530709 qdf_nbuf_t buf;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800710 uint32_t len;
711 uint8_t dma_mapped;
712 uint32_t tim_ie_offset;
713 uint8_t dtim_count;
714 uint16_t seq_no;
715 uint8_t noa_sub_ie[2 + WMA_NOA_IE_SIZE(WMA_MAX_NOA_DESCRIPTORS)];
716 uint16_t noa_sub_ie_len;
717 uint8_t *noa_ie;
718 uint16_t p2p_ie_offset;
Anurag Chouhana37b5b72016-02-21 14:53:42 +0530719 qdf_spinlock_t lock;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800720};
721
722/**
723 * struct beacon_tim_ie - structure to store TIM IE of beacon
724 * @tim_ie: tim ie
725 * @tim_len: tim ie length
726 * @dtim_count: dtim count
727 * @dtim_period: dtim period
728 * @tim_bitctl: tim bit control
729 * @tim_bitmap: tim bitmap
730 */
731struct beacon_tim_ie {
732 uint8_t tim_ie;
733 uint8_t tim_len;
734 uint8_t dtim_count;
735 uint8_t dtim_period;
736 uint8_t tim_bitctl;
737 uint8_t tim_bitmap[1];
738} __ATTRIB_PACK;
739
740/**
741 * struct pps - packet power save parameter
742 * @paid_match_enable: paid match enable
743 * @gid_match_enable: gid match enable
744 * @tim_clear: time clear
745 * @dtim_clear: dtim clear
746 * @eof_delim: eof delim
747 * @mac_match: mac match
748 * @delim_fail: delim fail
749 * @nsts_zero: nsts zero
750 * @rssi_chk: RSSI check
751 * @ebt_5g: ebt 5GHz
752 */
753struct pps {
754 bool paid_match_enable;
755 bool gid_match_enable;
756 bool tim_clear;
757 bool dtim_clear;
758 bool eof_delim;
759 bool mac_match;
760 bool delim_fail;
761 bool nsts_zero;
762 bool rssi_chk;
763 bool ebt_5g;
764};
765
766/**
767 * struct qpower_params - qpower related parameters
768 * @max_ps_poll_cnt: max ps poll count
769 * @max_tx_before_wake: max tx before wake
770 * @spec_ps_poll_wake_interval: ps poll wake interval
771 * @max_spec_nodata_ps_poll: no data ps poll
772 */
773struct qpower_params {
774 uint32_t max_ps_poll_cnt;
775 uint32_t max_tx_before_wake;
776 uint32_t spec_ps_poll_wake_interval;
777 uint32_t max_spec_nodata_ps_poll;
778};
779
780
781/**
782 * struct gtx_config_t - GTX config
783 * @gtxRTMask: for HT and VHT rate masks
784 * @gtxUsrcfg: host request for GTX mask
785 * @gtxPERThreshold: PER Threshold (default: 10%)
786 * @gtxPERMargin: PER margin (default: 2%)
787 * @gtxTPCstep: TCP step (default: 1)
788 * @gtxTPCMin: TCP min (default: 5)
789 * @gtxBWMask: BW mask (20/40/80/160 Mhz)
790 */
791typedef struct {
792 uint32_t gtxRTMask[2];
793 uint32_t gtxUsrcfg;
794 uint32_t gtxPERThreshold;
795 uint32_t gtxPERMargin;
796 uint32_t gtxTPCstep;
797 uint32_t gtxTPCMin;
798 uint32_t gtxBWMask;
799} gtx_config_t;
800
801/**
802 * struct pdev_cli_config_t - store pdev parameters
803 * @ani_enable: ANI is enabled/disable on target
804 * @ani_poll_len: store ANI polling period
805 * @ani_listen_len: store ANI listening period
806 * @ani_ofdm_level: store ANI OFDM immunity level
807 * @ani_cck_level: store ANI CCK immunity level
808 * @cwmenable: Dynamic bw is enable/disable in fw
809 * @txchainmask: tx chain mask
810 * @rxchainmask: rx chain mask
811 * @txpow2g: tx power limit for 2GHz
812 * @txpow5g: tx power limit for 5GHz
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800813 * @burst_enable: is burst enable/disable
814 * @burst_dur: burst duration
815 *
816 * This structure stores pdev parameters.
817 * Some of these parameters are set in fw and some
818 * parameters are only maintained in host.
819 */
820typedef struct {
821 uint32_t ani_enable;
822 uint32_t ani_poll_len;
823 uint32_t ani_listen_len;
824 uint32_t ani_ofdm_level;
825 uint32_t ani_cck_level;
826 uint32_t cwmenable;
827 uint32_t cts_cbw;
828 uint32_t txchainmask;
829 uint32_t rxchainmask;
830 uint32_t txpow2g;
831 uint32_t txpow5g;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800832 uint32_t burst_enable;
833 uint32_t burst_dur;
834} pdev_cli_config_t;
835
836/**
837 * struct vdev_cli_config_t - store vdev parameters
838 * @nss: nss width
839 * @ldpc: is ldpc is enable/disable
840 * @tx_stbc: TX STBC is enable/disable
841 * @rx_stbc: RX STBC is enable/disable
842 * @shortgi: short gi is enable/disable
843 * @rtscts_en: RTS/CTS is enable/disable
844 * @chwidth: channel width
845 * @tx_rate: tx rate
846 * @ampdu: ampdu size
847 * @amsdu: amsdu size
848 * @erx_adjust: enable/disable early rx enable
849 * @erx_bmiss_num: target bmiss number per sample
850 * @erx_bmiss_cycle: sample cycle
851 * @erx_slop_step: slop_step value
852 * @erx_init_slop: init slop
853 * @erx_adj_pause: pause adjust enable/disable
854 * @erx_dri_sample: enable/disable drift sample
855 * @pps_params: packet power save parameters
856 * @qpower_params: qpower parameters
857 * @gtx_info: GTX offload info
Krishna Kumaar Natarajan1a71ec72017-03-23 12:26:31 -0700858 * @dcm: DCM enable/disable
Krishna Kumaar Natarajan150cd012017-03-23 12:29:10 -0700859 * @range_ext: HE range extension enable/disable
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800860 *
861 * This structure stores vdev parameters.
862 * Some of these parameters are set in fw and some
863 * parameters are only maintained in host.
864 */
865typedef struct {
866 uint32_t nss;
867 uint32_t ldpc;
868 uint32_t tx_stbc;
869 uint32_t rx_stbc;
870 uint32_t shortgi;
871 uint32_t rtscts_en;
872 uint32_t chwidth;
873 uint32_t tx_rate;
874 uint32_t ampdu;
875 uint32_t amsdu;
876 uint32_t erx_adjust;
877 uint32_t erx_bmiss_num;
878 uint32_t erx_bmiss_cycle;
879 uint32_t erx_slop_step;
880 uint32_t erx_init_slop;
881 uint32_t erx_adj_pause;
882 uint32_t erx_dri_sample;
883 struct pps pps_params;
884 struct qpower_params qpower_params;
885 gtx_config_t gtx_info;
Krishna Kumaar Natarajan1a71ec72017-03-23 12:26:31 -0700886#ifdef WLAN_FEATURE_11AX
887 uint8_t dcm;
Krishna Kumaar Natarajan150cd012017-03-23 12:29:10 -0700888 uint8_t range_ext;
Krishna Kumaar Natarajan1a71ec72017-03-23 12:26:31 -0700889#endif
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800890} vdev_cli_config_t;
891
892/**
Mukul Sharma5ff3c582016-09-12 15:23:35 +0530893 * struct wma_version_info - Store wmi version info
894 * @major: wmi major version
895 * @minor: wmi minor version
896 * @revision: wmi revision number
897 */
898struct wma_version_info {
899 u_int32_t major;
900 u_int32_t minor;
901 u_int32_t revision;
902};
903
904/**
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800905 * struct wma_wow - store wow patterns
906 * @magic_ptrn_enable: magic pattern enable/disable
907 * @wow_enable: wow enable/disable
908 * @wow_enable_cmd_sent: is wow enable command sent to fw
909 * @deauth_enable: is deauth wakeup enable/disable
910 * @disassoc_enable: is disassoc wakeup enable/disable
911 * @bmiss_enable: is bmiss wakeup enable/disable
912 * @gtk_pdev_enable: is GTK based wakeup enable/disable
913 * @gtk_err_enable: is GTK error wakeup enable/disable
914 * @lphb_cache: lphb cache
915 *
916 * This structure stores wow patterns and
917 * wow related parameters in host.
918 */
919struct wma_wow {
920 bool magic_ptrn_enable;
921 bool wow_enable;
922 bool wow_enable_cmd_sent;
923 bool deauth_enable;
924 bool disassoc_enable;
925 bool bmiss_enable;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800926 bool gtk_err_enable[WMA_MAX_SUPPORTED_BSS];
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800927};
928
929#ifdef WLAN_FEATURE_11W
930#define CMAC_IPN_LEN (6)
931#define WMA_IGTK_KEY_INDEX_4 (4)
932#define WMA_IGTK_KEY_INDEX_5 (5)
933
934/**
935 * struct wma_igtk_ipn_t - GTK IPN info
936 * @ipn: IPN info
937 */
938typedef struct {
939 uint8_t ipn[CMAC_IPN_LEN];
940} wma_igtk_ipn_t;
941
942/**
943 * struct wma_igtk_key_t - GTK key
944 * @key_length: key length
945 * @key: key
946 * @key_id: key id
947 */
948typedef struct {
949 uint16_t key_length;
Padma, Santhosh Kumar0ab78172017-12-18 19:26:17 +0530950 uint8_t key[CSR_AES_GMAC_256_KEY_LEN];
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800951
952 /* IPN is maintained per iGTK keyID
953 * 0th index for iGTK keyID = 4;
954 * 1st index for iGTK KeyID = 5
955 */
956 wma_igtk_ipn_t key_id[2];
Padma, Santhosh Kumar0ab78172017-12-18 19:26:17 +0530957 uint32_t key_cipher;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800958} wma_igtk_key_t;
959#endif
960
961/**
962 * struct vdev_restart_params_t - vdev restart parameters
963 * @vdev_id: vdev id
964 * @ssid: ssid
965 * @flags: flags
966 * @requestor_id: requestor id
967 * @chan: channel
968 * @hidden_ssid_restart_in_progress: hidden ssid restart flag
969 * @ssidHidden: is ssid hidden or not
970 */
971typedef struct {
972 A_UINT32 vdev_id;
973 wmi_ssid ssid;
974 A_UINT32 flags;
975 A_UINT32 requestor_id;
976 A_UINT32 disable_hw_ack;
977 wmi_channel chan;
Anurag Chouhan8e0ccd32016-02-19 15:30:20 +0530978 qdf_atomic_t hidden_ssid_restart_in_progress;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800979 uint8_t ssidHidden;
980} vdev_restart_params_t;
981
Padma, Santhosh Kumaraa2433e2017-10-06 14:34:46 +0530982struct roam_synch_frame_ind {
983 uint32_t bcn_probe_rsp_len;
984 uint8_t *bcn_probe_rsp;
985 uint8_t is_beacon;
986 uint32_t reassoc_req_len;
987 uint8_t *reassoc_req;
988 uint32_t reassoc_rsp_len;
989 uint8_t *reassoc_rsp;
990};
991
992
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800993/**
994 * struct wma_txrx_node - txrx node
995 * @addr: mac address
996 * @bssid: bssid
997 * @handle: wma handle
998 * @beacon: beacon info
999 * @vdev_restart_params: vdev restart parameters
1000 * @config: per vdev config parameters
1001 * @scan_info: scan info
1002 * @type: type
1003 * @sub_type: sub type
1004 * @nlo_match_evt_received: is nlo match event received or not
1005 * @pno_in_progress: is pno in progress or not
1006 * @plm_in_progress: is plm in progress or not
1007 * @ptrn_match_enable: is pattern match is enable or not
1008 * @num_wow_default_patterns: number of default wow patterns configured for vdev
1009 * @num_wow_user_patterns: number of user wow patterns configured for vdev
1010 * @conn_state: connection state
1011 * @beaconInterval: beacon interval
1012 * @llbCoexist: 11b coexist
1013 * @shortSlotTimeSupported: is short slot time supported or not
1014 * @dtimPeriod: DTIM period
1015 * @chanmode: channel mode
1016 * @vht_capable: VHT capablity flag
1017 * @ht_capable: HT capablity flag
1018 * @mhz: channel frequency in KHz
Tushnim Bhattacharyya7624a182016-03-30 13:30:46 -07001019 * @chan_width: channel bandwidth
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001020 * @vdev_up: is vdev up or not
1021 * @tsfadjust: TSF adjust
1022 * @addBssStaContext: add bss context
1023 * @aid: association id
1024 * @rmfEnabled: Robust Management Frame (RMF) enabled/disabled
1025 * @key: GTK key
1026 * @uapsd_cached_val: uapsd cached value
1027 * @stats_rsp: stats response
1028 * @fw_stats_set: fw stats value
1029 * @del_staself_req: delete sta self request
1030 * @bss_status: bss status
1031 * @rate_flags: rate flags
1032 * @nss: nss value
1033 * @is_channel_switch: is channel switch
1034 * @pause_bitmap: pause bitmap
1035 * @tx_power: tx power in dbm
1036 * @max_tx_power: max tx power in dbm
1037 * @nwType: network type (802.11a/b/g/n/ac)
1038 * @staKeyParams: sta key parameters
1039 * @ps_enabled: is powersave enable/disable
Kiran Kumar Lokere1e8e4f02017-02-02 18:08:44 -08001040 * @restore_dtim_setting: DTIM settings restore flag
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001041 * @peer_count: peer count
1042 * @roam_synch_in_progress: flag is in progress or not
1043 * @plink_status_req: link status request
1044 * @psnr_req: snr request
1045 * @delay_before_vdev_stop: delay
Mukul Sharma6398b252017-05-01 17:58:12 +05301046 * @override_li: dynamically user configured listen interval
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001047 * @tx_streams: number of tx streams can be used by the vdev
1048 * @rx_streams: number of rx streams can be used by the vdev
1049 * @chain_mask: chain mask can be used by the vdev
1050 * @mac_id: the mac on which vdev is on
Masti, Narayanraddiab712a72016-08-04 11:59:11 +05301051 * @wep_default_key_idx: wep default index for group key
Mukul Sharma8d2d9ec2016-09-08 13:05:35 +05301052 * @arp_offload_req: cached arp offload request
1053 * @ns_offload_req: cached ns offload request
Dustin Brown9d797d62017-01-11 16:39:12 -08001054 * @wow_stats: stat counters for WoW related events
Rajeev Kumar Sirasanagandla996e5292016-11-22 21:20:33 +05301055 * @rcpi_req: rcpi request
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001056 * It stores parameters per vdev in wma.
Ravi Kumar Bokka05c14e52017-03-27 14:48:23 +05301057 * @in_bmps : Whether bmps for this interface has been enabled
Dustin Brownec2c92e2017-07-26 11:13:49 -07001058 * @vdev_start_wakelock: wakelock to protect vdev start op with firmware
1059 * @vdev_stop_wakelock: wakelock to protect vdev stop op with firmware
Rajeev Kumar155a3e42017-10-10 15:31:17 -07001060 * @vdev_set_key_wakelock: wakelock to protect vdev set key op with firmware
Yeshwanth Sriram Guntukaa3f8d572018-03-14 11:10:23 +05301061 * @channel: channel
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001062 */
1063struct wma_txrx_node {
1064 uint8_t addr[IEEE80211_ADDR_LEN];
1065 uint8_t bssid[IEEE80211_ADDR_LEN];
Venkata Sharath Chandra Manchala0d44d452016-11-23 17:48:15 -08001066 struct cdp_vdev *handle;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001067 struct beacon_info *beacon;
1068 vdev_restart_params_t vdev_restart_params;
1069 vdev_cli_config_t config;
1070 struct scan_param scan_info;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001071 uint32_t type;
1072 uint32_t sub_type;
Srinivas Girigowda515a9ef2015-12-11 11:00:48 -08001073#ifdef FEATURE_WLAN_ESE
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001074 bool plm_in_progress;
1075#endif
1076 bool ptrn_match_enable;
1077 uint8_t num_wow_default_patterns;
1078 uint8_t num_wow_user_patterns;
1079 bool conn_state;
1080 tSirMacBeaconInterval beaconInterval;
1081 uint8_t llbCoexist;
1082 uint8_t shortSlotTimeSupported;
1083 uint8_t dtimPeriod;
1084 WLAN_PHY_MODE chanmode;
1085 uint8_t vht_capable;
1086 uint8_t ht_capable;
1087 A_UINT32 mhz;
Tushnim Bhattacharyya7624a182016-03-30 13:30:46 -07001088 enum phy_ch_width chan_width;
Selvaraj, Sridhar171e2252016-06-22 22:33:26 +05301089 bool vdev_active;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001090 uint64_t tsfadjust;
1091 void *addBssStaContext;
1092 uint8_t aid;
1093 uint8_t rmfEnabled;
1094#ifdef WLAN_FEATURE_11W
1095 wma_igtk_key_t key;
1096#endif /* WLAN_FEATURE_11W */
1097 uint32_t uapsd_cached_val;
1098 tAniGetPEStatsRsp *stats_rsp;
1099 uint8_t fw_stats_set;
1100 void *del_staself_req;
Abhishek Singh0d74f9e2017-09-26 14:02:42 +05301101 bool is_del_sta_defered;
Anurag Chouhan8e0ccd32016-02-19 15:30:20 +05301102 qdf_atomic_t bss_status;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001103 uint8_t rate_flags;
1104 uint8_t nss;
1105 bool is_channel_switch;
1106 uint16_t pause_bitmap;
Amar Singhala297bfa2015-10-15 15:07:29 -07001107 int8_t tx_power;
1108 int8_t max_tx_power;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001109 uint32_t nwType;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001110 void *staKeyParams;
Kiran Kumar Lokere1e8e4f02017-02-02 18:08:44 -08001111 bool restore_dtim_setting;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001112 uint32_t peer_count;
Min Liua9df1ff2018-02-09 02:44:13 +08001113 qdf_atomic_t fw_peer_count;
Min Liu22202b72018-02-12 14:01:24 +08001114 qdf_event_t fw_peer_delete_completion;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001115 bool roam_synch_in_progress;
1116 void *plink_status_req;
1117 void *psnr_req;
1118 uint8_t delay_before_vdev_stop;
1119#ifdef FEATURE_WLAN_EXTSCAN
1120 bool extscan_in_progress;
1121#endif
1122 uint32_t alt_modulated_dtim;
1123 bool alt_modulated_dtim_enabled;
Mukul Sharma6398b252017-05-01 17:58:12 +05301124 uint32_t override_li;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001125 uint32_t tx_streams;
1126 uint32_t rx_streams;
1127 uint32_t chain_mask;
1128 uint32_t mac_id;
Varun Reddy Yeturu30bc42c2016-02-04 10:07:30 -08001129 bool roaming_in_progress;
Varun Reddy Yeturu5ab47462016-05-08 18:08:11 -07001130 int32_t roam_synch_delay;
Kiran Kumar Lokere666bf852016-05-02 12:23:02 -07001131 uint8_t nss_2g;
1132 uint8_t nss_5g;
Peng Xu8fdaa492016-06-22 10:20:47 -07001133 bool p2p_lo_in_progress;
Masti, Narayanraddiab712a72016-08-04 11:59:11 +05301134 uint8_t wep_default_key_idx;
Mukul Sharma8d2d9ec2016-09-08 13:05:35 +05301135 tSirHostOffloadReq arp_offload_req;
1136 tSirHostOffloadReq ns_offload_req;
Bhargav Shaha89d3b42016-04-20 13:04:56 +05301137 bool is_vdev_valid;
Dustin Brown9d797d62017-01-11 16:39:12 -08001138 struct sir_vdev_wow_stats wow_stats;
Rajeev Kumar Sirasanagandla996e5292016-11-22 21:20:33 +05301139 struct sme_rcpi_req *rcpi_req;
Krishna Kumaar Natarajan0103ef82017-02-17 18:15:56 -08001140#ifdef WLAN_FEATURE_11AX
1141 bool he_capable;
1142 uint32_t he_ops;
1143#endif
Ravi Kumar Bokka05c14e52017-03-27 14:48:23 +05301144 bool in_bmps;
Kiran Kumar Lokeref9dc7912017-06-28 18:10:58 -07001145 struct beacon_filter_param beacon_filter;
1146 bool beacon_filter_enabled;
Dustin Brownec2c92e2017-07-26 11:13:49 -07001147 qdf_wake_lock_t vdev_start_wakelock;
1148 qdf_wake_lock_t vdev_stop_wakelock;
Rajeev Kumar155a3e42017-10-10 15:31:17 -07001149 qdf_wake_lock_t vdev_set_key_wakelock;
Padma, Santhosh Kumaraa2433e2017-10-06 14:34:46 +05301150 struct roam_synch_frame_ind roam_synch_frame_ind;
Naveen Rawatd7734142017-10-27 10:02:40 -07001151 bool is_waiting_for_key;
Yeshwanth Sriram Guntukaa3f8d572018-03-14 11:10:23 +05301152 uint8_t channel;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001153};
1154
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001155/**
1156 * struct scan_timer_info - scan timer info
1157 * @vdev_id: vdev id
1158 * @scan_id: scan id
1159 */
1160typedef struct {
1161 uint8_t vdev_id;
1162 uint32_t scan_id;
1163} scan_timer_info;
1164
1165/**
1166 * struct ibss_power_save_params - IBSS power save parameters
1167 * @atimWindowLength: ATIM window length
1168 * @isPowerSaveAllowed: is power save allowed
1169 * @isPowerCollapseAllowed: is power collapsed allowed
1170 * @isAwakeonTxRxEnabled: is awake on tx/rx enabled
1171 * @inactivityCount: inactivity count
1172 * @txSPEndInactivityTime: tx SP end inactivity time
1173 * @ibssPsWarmupTime: IBSS power save warm up time
1174 * @ibssPs1RxChainInAtimEnable: IBSS power save rx chain in ATIM enable
1175 */
1176typedef struct {
1177 uint32_t atimWindowLength;
1178 uint32_t isPowerSaveAllowed;
1179 uint32_t isPowerCollapseAllowed;
1180 uint32_t isAwakeonTxRxEnabled;
1181 uint32_t inactivityCount;
1182 uint32_t txSPEndInactivityTime;
1183 uint32_t ibssPsWarmupTime;
1184 uint32_t ibssPs1RxChainInAtimEnable;
1185} ibss_power_save_params;
1186
1187/**
Nitesh Shah877ad5d2016-09-22 19:27:58 +05301188 * struct mac_ss_bw_info - hw_mode_list PHY/MAC params for each MAC
1189 * @mac_tx_stream: Max TX stream
1190 * @mac_rx_stream: Max RX stream
1191 * @mac_bw: Max bandwidth
1192 */
1193struct mac_ss_bw_info {
1194 uint32_t mac_tx_stream;
1195 uint32_t mac_rx_stream;
1196 uint32_t mac_bw;
1197};
1198
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001199/**
Komal Seelam02d09342016-02-23 18:03:19 +05301200 * struct wma_ini_config - Structure to hold wma ini configuration
1201 * @max_no_of_peers: Max Number of supported
1202 *
1203 * Placeholder for WMA ini parameters.
1204 */
1205struct wma_ini_config {
1206 uint8_t max_no_of_peers;
1207};
1208
1209/**
Manishekar Chandrasekaran7009f252016-04-21 19:14:15 +05301210 * struct wmi_valid_channels - Channel details part of WMI_SCAN_CHAN_LIST_CMDID
1211 * @num_channels: Number of channels
1212 * @channel_list: Channel list
1213 */
1214struct wma_valid_channels {
1215 uint8_t num_channels;
1216 uint8_t channel_list[MAX_NUM_CHAN];
1217};
1218
Krunal Soni2e48d012016-05-02 16:55:26 -07001219/**
1220 * struct hw_mode_idx_to_mac_cap_idx - map between hw_mode to capabilities
1221 * @num_of_macs: number of macs/PHYs for given hw_mode through hw_mode_id
1222 * @mac_cap_idx: index of the mac/PHY for given hw_mode through hw_mode_id
1223 * @hw_mode_id: given hw_mode id
1224 */
1225struct hw_mode_idx_to_mac_cap_idx {
1226 uint8_t num_of_macs;
1227 uint8_t mac_cap_idx;
1228 uint8_t hw_mode_id;
1229};
1230
1231/**
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001232 * struct t_wma_handle - wma context
1233 * @wmi_handle: wmi handle
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001234 * @cds_context: cds handle
1235 * @mac_context: mac context
Selvaraj, Sridhar0672a122016-12-29 16:11:48 +05301236 * @psoc: psoc context
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001237 * @wma_resume_event: wma resume event
1238 * @target_suspend: target suspend event
1239 * @recovery_event: wma FW recovery event
1240 * @max_station: max stations
1241 * @max_bssid: max bssid
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001242 * @driver_type: driver type
1243 * @myaddr: current mac address
1244 * @hwaddr: mac address from EEPROM
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001245 * @lpss_support: LPSS feature is supported in target or not
Ryan Hsu3c8f79f2015-12-02 16:45:09 -08001246 * @egap_support: Enhanced Green AP support flag
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001247 * @wmi_ready: wmi status flag
1248 * @wlan_init_status: wlan init status
Anurag Chouhanf04e84f2016-03-03 10:12:12 +05301249 * @qdf_dev: qdf device
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001250 * @wmi_service_bitmap: wmi services bitmap received from Target
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001251 * @frameTransRequired: frame transmission required
1252 * @wmaGlobalSystemRole: global system role
1253 * @tx_frm_download_comp_cb: Tx Frame Compl Cb registered by umac
1254 * @tx_frm_download_comp_event: Event to wait for tx download completion
1255 * @tx_queue_empty_event: wait for tx queue to get flushed
1256 * @umac_ota_ack_cb: Ack Complete Callback registered by umac
1257 * @umac_data_ota_ack_cb: ack complete callback
1258 * @last_umac_data_ota_timestamp: timestamp when OTA of last umac data was done
1259 * @last_umac_data_nbuf: cache nbuf ptr for the last umac data buf
1260 * @needShutdown: is shutdown needed or not
1261 * @num_mem_chunks: number of memory chunk
1262 * @mem_chunks: memory chunks
1263 * @tgt_cfg_update_cb: configuration update callback
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001264 * @reg_cap: regulatory capablities
1265 * @scan_id: scan id
1266 * @interfaces: txrx nodes(per vdev)
1267 * @pdevconfig: pdev related configrations
1268 * @vdev_resp_queue: vdev response queue
1269 * @vdev_respq_lock: vdev response queue lock
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001270 * @vht_supp_mcs: VHT supported MCS
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001271 * @is_fw_assert: is fw asserted
1272 * @wow: wow related patterns & parameters
1273 * @no_of_suspend_ind: number of suspend indications
1274 * @no_of_resume_ind: number of resume indications
1275 * @mArpInfo: arp info
1276 * @powersave_mode: power save mode
1277 * @ptrn_match_enable_all_vdev: is pattern match is enable/disable
1278 * @pGetRssiReq: get RSSI request
1279 * @thermal_mgmt_info: Thermal mitigation related info
1280 * @roam_offload_enabled: is roam offload enable/disable
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001281 * @ssdp: ssdp flag
Komal Seelam9764a842016-05-24 11:07:23 +05301282 * @enable_mc_list : To Check if Multicast list filtering is enabled in FW
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001283 * @ibss_started: is IBSS started or not
1284 * @ibsskey_info: IBSS key info
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001285 * @hddTxFailCb: tx fail indication callback
1286 * @pno_wake_lock: PNO wake lock
1287 * @extscan_wake_lock: extscan wake lock
1288 * @wow_wake_lock: wow wake lock
Mukul Sharmae44d0542017-05-23 21:50:56 +05301289 * @wow_auth_req_wl: wow wake lock for auth req
1290 * @wow_assoc_req_wl: wow wake lock for assoc req
1291 * @wow_deauth_rec_wl: wow wake lock for deauth req
1292 * @wow_disassoc_rec_wl: wow wake lock for disassoc req
1293 * @wow_ap_assoc_lost_wl: wow wake lock for assoc lost req
1294 * @wow_auto_shutdown_wl: wow wake lock for shutdown req
1295 * @roam_ho_wl: wake lock for roam handoff req
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001296 * @wow_nack: wow negative ack flag
1297 * @ap_client_cnt: ap client count
1298 * @is_wow_bus_suspended: is wow bus suspended flag
1299 * @wma_scan_comp_timer: scan completion timer
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001300 * @suitable_ap_hb_failure: better ap found
Sreelakshmi Konamki58c72432016-11-09 17:06:44 +05301301 * @suitable_ap_hb_failure_rssi: record the RSSI when suitable_ap_hb_failure
1302 * for later usage to report RSSI at beacon miss scenario
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001303 * @wma_ibss_power_save_params: IBSS Power Save config Parameters
1304 * @IsRArateLimitEnabled: RA rate limiti s enabled or not
1305 * @RArateLimitInterval: RA rate limit interval
1306 * @is_lpass_enabled: Flag to indicate if LPASS feature is enabled or not
1307 * @is_nan_enabled: Flag to indicate if NaN feature is enabled or not
1308 * @staMaxLIModDtim: station max listen interval
1309 * @staModDtim: station mode DTIM
1310 * @staDynamicDtim: station dynamic DTIM
1311 * @enable_mhf_offload: is MHF offload enable/disable
1312 * @last_mhf_entries_timestamp: timestamp when last entries where set
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001313 * @hw_bd_id: hardware board id
1314 * @hw_bd_info: hardware board info
1315 * @in_d0wow: D0WOW is enable/disable
1316 * @miracast_value: miracast value
1317 * @log_completion_timer: log completion timer
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001318 * @num_dbs_hw_modes: Number of HW modes supported by the FW
1319 * @dbs_mode: DBS HW mode list
1320 * @old_hw_mode_index: Previous configured HW mode index
1321 * @new_hw_mode_index: Current configured HW mode index
Krunal Soni2e48d012016-05-02 16:55:26 -07001322 * @extended_caps phy_caps: extended caps per hw mode
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001323 * @peer_authorized_cb: peer authorized hdd callback
1324 * @ocb_callback: callback to OCB commands
1325 * @ocb_resp: response to OCB commands
1326 * @wow_pno_match_wake_up_count: PNO match wake up count
1327 * @wow_pno_complete_wake_up_count: PNO complete wake up count
1328 * @wow_gscan_wake_up_count: Gscan wake up count
1329 * @wow_low_rssi_wake_up_count: Low rssi wake up count
1330 * @wow_rssi_breach_wake_up_count: RSSI breach wake up count
1331 * @wow_ucast_wake_up_count: WoW unicast packet wake up count
1332 * @wow_bcast_wake_up_count: WoW brodcast packet wake up count
1333 * @wow_ipv4_mcast_wake_up_count: WoW IPV4 mcast packet wake up count
1334 * @wow_ipv6_mcast_wake_up_count: WoW IPV6 mcast packet wake up count
1335 * @wow_ipv6_mcast_ra_stats: WoW IPV6 mcast RA packet wake up count
1336 * @wow_ipv6_mcast_ns_stats: WoW IPV6 mcast NS packet wake up count
1337 * @wow_ipv6_mcast_na_stats: WoW IPV6 mcast NA packet wake up count
Sreelakshmi Konamkie1cd51f2016-08-19 16:58:24 +05301338 * @wow_icmpv4_count: WoW ipv4 icmp packet wake up count
Himanshu Agarwal4574e282016-08-10 15:22:45 +05301339 * @wow_icmpv6_count: WoW ipv6 icmp packet wake up count
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001340 * @dual_mac_cfg: Dual mac configuration params for scan and fw mode
1341 *
1342 * @max_scan: maximum scan requests than can be queued
1343 * This structure is global wma context
1344 * It contains global wma module parameters and
1345 * handle of other modules.
Dustin Brown13995f02017-01-12 15:38:42 -08001346 * @bpf_packet_filter_enable: BPF filter enabled or not
Hanumanth Reddy Pothulae87621b2017-04-12 20:53:35 +05301347 * @active_uc_bpf_mode: Setting that determines how BPF is applied in active
1348 * mode for uc packets
1349 * @active_mc_bc_bpf_mode: Setting that determines how BPF is applied in
1350 * active mode for MC/BC packets
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001351 * @service_ready_ext_evt: Wait event for service ready ext
Sandeep Puligilla19ddda22016-01-05 12:18:02 -08001352 * @wmi_cmd_rsp_wake_lock: wmi command response wake lock
1353 * @wmi_cmd_rsp_runtime_lock: wmi command response bus lock
Manishekar Chandrasekaran7009f252016-04-21 19:14:15 +05301354 * @saved_chan: saved channel list sent as part of WMI_SCAN_CHAN_LIST_CMDID
Arif Hussaind54b62c2018-03-01 13:31:37 -08001355 * @is_dfs_offloaded: dfs and cac timer offload
Sandeep Puligilla819d94f2017-10-10 18:33:56 -07001356 * @bandcapability: band capability configured through ini
Ashish Kumar Dhanotiya9335d812017-06-30 16:57:20 +05301357 * @ito_repeat_count: Indicates ito repeated count
Dustin Brown05557182017-10-12 14:44:49 -07001358 * @critical_events_in_flight: number of suspend preventing events in flight
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001359 */
1360typedef struct {
1361 void *wmi_handle;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001362 void *cds_context;
1363 void *mac_context;
Selvaraj, Sridhar0672a122016-12-29 16:11:48 +05301364 struct wlan_objmgr_psoc *psoc;
Kiran Kumar Lokerea3de2262017-04-12 12:15:04 -07001365 struct wlan_objmgr_pdev *pdev;
Anurag Chouhance0dc992016-02-16 18:18:03 +05301366 qdf_event_t wma_resume_event;
1367 qdf_event_t target_suspend;
1368 qdf_event_t runtime_suspend;
1369 qdf_event_t recovery_event;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001370 uint16_t max_station;
1371 uint16_t max_bssid;
Srinivas Girigowda35b00312017-06-27 21:52:03 -07001372 enum qdf_driver_type driver_type;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001373 uint8_t myaddr[IEEE80211_ADDR_LEN];
1374 uint8_t hwaddr[IEEE80211_ADDR_LEN];
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001375#ifdef WLAN_FEATURE_LPSS
1376 uint8_t lpss_support;
1377#endif
1378 uint8_t ap_arpns_support;
1379 bool wmi_ready;
1380 uint32_t wlan_init_status;
Anurag Chouhandf2b2682016-02-29 14:15:27 +05301381 qdf_device_t qdf_dev;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001382 uint32_t wmi_service_bitmap[WMI_SERVICE_BM_SIZE];
Vignesh Viswanathan731186f2017-09-18 13:47:37 +05301383 uint32_t wmi_service_ext_offset;
1384 uint32_t wmi_service_ext_bitmap[WMI_SERVICE_SEGMENT_BM_SIZE32];
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001385 uint32_t frameTransRequired;
1386 tBssSystemRole wmaGlobalSystemRole;
Himanshu Agarwal2fdf77a2016-12-29 11:41:00 +05301387 wma_tx_dwnld_comp_callback tx_frm_download_comp_cb;
Anurag Chouhance0dc992016-02-16 18:18:03 +05301388 qdf_event_t tx_frm_download_comp_event;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001389 /*
1390 * Dummy event to wait for draining MSDUs left in hardware tx
1391 * queue and before requesting VDEV_STOP. Nobody will set this
1392 * and wait will timeout, and code will poll the pending tx
1393 * descriptors number to be zero.
1394 */
Anurag Chouhance0dc992016-02-16 18:18:03 +05301395 qdf_event_t tx_queue_empty_event;
Himanshu Agarwal2fdf77a2016-12-29 11:41:00 +05301396 wma_tx_ota_comp_callback umac_ota_ack_cb[SIR_MAC_MGMT_RESERVED15];
1397 wma_tx_ota_comp_callback umac_data_ota_ack_cb;
Anurag Chouhan6d760662016-02-20 16:05:43 +05301398 unsigned long last_umac_data_ota_timestamp;
Nirav Shahcbc6d722016-03-01 16:24:53 +05301399 qdf_nbuf_t last_umac_data_nbuf;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001400 bool needShutdown;
1401 uint32_t num_mem_chunks;
Govind Singhf25a0f12016-03-08 16:09:48 +05301402 struct wmi_host_mem_chunk mem_chunks[MAX_MEM_CHUNKS];
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001403 wma_tgt_cfg_cb tgt_cfg_update_cb;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001404 HAL_REG_CAPABILITIES reg_cap;
1405 uint32_t scan_id;
1406 struct wma_txrx_node *interfaces;
1407 pdev_cli_config_t pdevconfig;
Anurag Chouhanffb21542016-02-17 14:33:03 +05301408 qdf_list_t vdev_resp_queue;
Anurag Chouhana37b5b72016-02-21 14:53:42 +05301409 qdf_spinlock_t vdev_respq_lock;
Anurag Chouhanffb21542016-02-17 14:33:03 +05301410 qdf_list_t wma_hold_req_queue;
Anurag Chouhana37b5b72016-02-21 14:53:42 +05301411 qdf_spinlock_t wma_hold_req_q_lock;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001412 uint32_t vht_supp_mcs;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001413 uint8_t is_fw_assert;
1414 struct wma_wow wow;
1415 uint8_t no_of_suspend_ind;
1416 uint8_t no_of_resume_ind;
1417 /* Have a back up of arp info to send along
1418 * with ns info suppose if ns also enabled
1419 */
1420 tSirHostOffloadReq mArpInfo;
1421 struct wma_tx_ack_work_ctx *ack_work_ctx;
1422 uint8_t powersave_mode;
1423 bool ptrn_match_enable_all_vdev;
1424 void *pGetRssiReq;
Will Huanga9814592017-05-24 15:47:58 +08001425 bool get_one_peer_info;
1426 bool get_sta_peer_info;
1427 struct qdf_mac_addr peer_macaddr;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001428 t_thermal_mgmt thermal_mgmt_info;
1429 bool roam_offload_enabled;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001430 bool ssdp;
Komal Seelam9764a842016-05-24 11:07:23 +05301431 bool enable_mc_list;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001432 uint8_t ibss_started;
1433 tSetBssKeyParams ibsskey_info;
Rajeev Kumar8e3e2832015-11-06 16:02:54 -08001434 txFailIndCallback hddTxFailCb;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001435#ifdef FEATURE_WLAN_EXTSCAN
Anurag Chouhana37b5b72016-02-21 14:53:42 +05301436 qdf_wake_lock_t extscan_wake_lock;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001437#endif
Anurag Chouhana37b5b72016-02-21 14:53:42 +05301438 qdf_wake_lock_t wow_wake_lock;
Mukul Sharmae44d0542017-05-23 21:50:56 +05301439 qdf_wake_lock_t wow_auth_req_wl;
1440 qdf_wake_lock_t wow_assoc_req_wl;
1441 qdf_wake_lock_t wow_deauth_rec_wl;
1442 qdf_wake_lock_t wow_disassoc_rec_wl;
1443 qdf_wake_lock_t wow_ap_assoc_lost_wl;
1444 qdf_wake_lock_t wow_auto_shutdown_wl;
1445 qdf_wake_lock_t roam_ho_wl;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001446 int wow_nack;
Anurag Chouhan8e0ccd32016-02-19 15:30:20 +05301447 qdf_atomic_t is_wow_bus_suspended;
Anurag Chouhan210db072016-02-22 18:42:15 +05301448 qdf_mc_timer_t wma_scan_comp_timer;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001449 bool suitable_ap_hb_failure;
Sreelakshmi Konamki58c72432016-11-09 17:06:44 +05301450 uint32_t suitable_ap_hb_failure_rssi;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001451 ibss_power_save_params wma_ibss_power_save_params;
1452#ifdef FEATURE_WLAN_RA_FILTERING
1453 bool IsRArateLimitEnabled;
1454 uint16_t RArateLimitInterval;
1455#endif
1456#ifdef WLAN_FEATURE_LPSS
1457 bool is_lpass_enabled;
1458#endif
1459#ifdef WLAN_FEATURE_NAN
1460 bool is_nan_enabled;
1461#endif
1462 uint8_t staMaxLIModDtim;
1463 uint8_t staModDtim;
1464 uint8_t staDynamicDtim;
Rajeev Kumar8e3e2832015-11-06 16:02:54 -08001465 uint8_t enable_mhf_offload;
1466 unsigned long last_mhf_entries_timestamp;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001467 uint32_t hw_bd_id;
1468 uint32_t hw_bd_info[HW_BD_INFO_SIZE];
1469 uint32_t miracast_value;
Anurag Chouhan210db072016-02-22 18:42:15 +05301470 qdf_mc_timer_t log_completion_timer;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001471 uint32_t num_dbs_hw_modes;
1472 struct dbs_hw_mode_info hw_mode;
1473 uint32_t old_hw_mode_index;
1474 uint32_t new_hw_mode_index;
Anurag Chouhan8e0ccd32016-02-19 15:30:20 +05301475 qdf_atomic_t scan_id_counter;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001476 wma_peer_authorized_fp peer_authorized_cb;
Dustin Brown9d797d62017-01-11 16:39:12 -08001477 uint32_t wow_unspecified_wake_count;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001478
1479 /* OCB request contexts */
1480 struct sir_ocb_config *ocb_config_req;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001481 uint8_t max_scan;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001482 uint16_t self_gen_frm_pwr;
1483 bool tx_chain_mask_cck;
Chandrasekaran, Manishekarc8416922015-10-14 11:19:00 +05301484 /* Going with a timer instead of wait event because on receiving the
1485 * service ready event, we will be waiting on the MC thread for the
1486 * service extended ready event which is also processed in MC thread.
1487 * This leads to MC thread being stuck. Alternative was to process
1488 * these events in tasklet/workqueue context. But, this leads to
1489 * race conditions when the events are processed in two different
1490 * context. So, processing ready event and extended ready event in
1491 * the serialized MC thread context with a timer.
1492 */
Anurag Chouhan210db072016-02-22 18:42:15 +05301493 qdf_mc_timer_t service_ready_ext_timer;
Manikandan Mohan1dd8b5d2017-04-18 15:54:09 -07001494
Varun Reddy Yeturu88f123c2017-03-14 18:24:32 -07001495 QDF_STATUS (*csr_roam_synch_cb)(tpAniSirGlobal mac,
Varun Reddy Yeturud5939f82015-12-24 18:14:02 -08001496 roam_offload_synch_ind *roam_synch_data,
Varun Reddy Yeturuf907f912016-03-21 15:06:22 -07001497 tpSirBssDescription bss_desc_ptr,
1498 enum sir_roam_op_code reason);
Anurag Chouhanfb54ab02016-02-18 18:00:46 +05301499 QDF_STATUS (*pe_roam_synch_cb)(tpAniSirGlobal mac,
Varun Reddy Yeturud5939f82015-12-24 18:14:02 -08001500 roam_offload_synch_ind *roam_synch_data,
Varun Reddy Yeturub5d858e2017-12-15 16:08:13 -08001501 tpSirBssDescription bss_desc_ptr,
1502 enum sir_roam_op_code reason);
Anurag Chouhana37b5b72016-02-21 14:53:42 +05301503 qdf_wake_lock_t wmi_cmd_rsp_wake_lock;
1504 qdf_runtime_lock_t wmi_cmd_rsp_runtime_lock;
Rajeev Kumare5a16822016-07-27 13:11:42 -07001505 bool bpf_enabled;
Anurag Chouhan04dbf6d2016-09-08 15:32:52 +05301506 bool bpf_packet_filter_enable;
Hanumanth Reddy Pothulae87621b2017-04-12 20:53:35 +05301507 enum active_bpf_mode active_uc_bpf_mode;
1508 enum active_bpf_mode active_mc_bc_bpf_mode;
Komal Seelam02d09342016-02-23 18:03:19 +05301509 struct wma_ini_config ini_config;
Manishekar Chandrasekaran7009f252016-04-21 19:14:15 +05301510 struct wma_valid_channels saved_chan;
Deepak Dhamdhere13230d32016-05-26 00:46:53 -07001511 /* NAN datapath support enabled in firmware */
1512 bool nan_datapath_enabled;
Naveen Rawat0fc3f692016-06-22 14:30:54 -07001513 QDF_STATUS (*pe_ndp_event_handler)(tpAniSirGlobal mac_ctx,
Rajeev Kumarb60abe42017-01-21 15:39:31 -08001514 struct scheduler_msg *msg);
Sandeep Puligillaafa52892016-10-26 19:03:16 -07001515 bool fw_timeout_crash;
Naveen Rawat64e477e2016-05-20 10:34:56 -07001516 bool sub_20_support;
Arif Hussaind54b62c2018-03-01 13:31:37 -08001517 bool is_dfs_offloaded;
Himanshu Agarwalf65bd4c2016-12-05 17:21:12 +05301518 tp_wma_packetdump_cb wma_mgmt_tx_packetdump_cb;
1519 tp_wma_packetdump_cb wma_mgmt_rx_packetdump_cb;
Rajeev Kumar Sirasanagandla996e5292016-11-22 21:20:33 +05301520 bool rcpi_enabled;
Srinivas Girigowdaad874a82016-10-25 14:08:00 -07001521 tSirLLStatsResults *link_stats_results;
Kapil Gupta10800b92017-05-31 19:14:47 +05301522 uint64_t tx_fail_cnt;
Krishna Kumaar Natarajanf5676502017-03-06 10:28:44 -08001523#ifdef WLAN_FEATURE_11AX
1524 struct he_capability he_cap;
1525#endif
Sandeep Puligilla819d94f2017-10-10 18:33:56 -07001526 uint8_t bandcapability;
Nachiket Kukade8b4bfd82017-05-25 18:34:48 +05301527 bool tx_bfee_8ss_enabled;
Ravi Kumar Bokka05c14e52017-03-27 14:48:23 +05301528 bool in_imps;
Ashish Kumar Dhanotiya9335d812017-06-30 16:57:20 +05301529 uint8_t ito_repeat_count;
gaurank kathpalia85f8a612018-02-21 18:55:24 +05301530 qdf_mc_timer_t wma_fw_time_sync_timer;
Dustin Brown05557182017-10-12 14:44:49 -07001531 qdf_atomic_t critical_events_in_flight;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001532} t_wma_handle, *tp_wma_handle;
1533
1534/**
1535 * struct wma_target_cap - target capabality
1536 * @wmi_service_bitmap: wmi services bitmap
1537 * @wlan_resource_config: resource config
1538 */
1539struct wma_target_cap {
Anurag Chouhance0dc992016-02-16 18:18:03 +05301540 /* wmi services bitmap received from Target */
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001541 uint32_t wmi_service_bitmap[WMI_SERVICE_BM_SIZE];
Anurag Chouhance0dc992016-02-16 18:18:03 +05301542 /* default resource config,the os shim can overwrite it */
Mukul Sharmab10c8c72017-11-02 17:25:59 +05301543 target_resource_config wlan_resource_config;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001544};
1545
1546/**
1547 * struct t_wma_start_req - wma start request parameters
1548 * @pConfigBuffer: config buffer
1549 * @usConfigBufferLen: Length of the config buffer above
1550 * @driver_type: Production or FTM driver
1551 * @pUserData: user data
1552 * @pIndUserData: indication function pointer to send to UMAC
1553 *
1554 * The shared memory between WDI and HAL is 4K so maximum data can be
1555 * transferred from WDI to HAL is 4K
1556 */
1557typedef struct {
1558 void *pConfigBuffer;
1559 uint16_t usConfigBufferLen;
Srinivas Girigowda35b00312017-06-27 21:52:03 -07001560 enum qdf_driver_type driver_type;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001561 void *pUserData;
1562 void *pIndUserData;
1563} t_wma_start_req;
1564
1565/* Enumeration for Version */
1566typedef enum {
1567 WLAN_HAL_MSG_VERSION0 = 0,
1568 WLAN_HAL_MSG_VERSION1 = 1,
1569 WLAN_HAL_MSG_WCNSS_CTRL_VERSION = 0x7FFF, /*define as 2 bytes data */
1570 WLAN_HAL_MSG_VERSION_MAX_FIELD = WLAN_HAL_MSG_WCNSS_CTRL_VERSION
1571} tHalHostMsgVersion;
1572
1573/**
1574 * struct sHalMacStartParameter - mac start request parameters
1575 * @driverType: driver type (production/FTM)
1576 * @uConfigBufferLen: length of config buffer
1577 */
Anurag Chouhan6d760662016-02-20 16:05:43 +05301578typedef struct qdf_packed sHalMacStartParameter {
Srinivas Girigowda35b00312017-06-27 21:52:03 -07001579 enum qdf_driver_type driverType;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001580 uint32_t uConfigBufferLen;
1581
1582 /* Following this there is a TLV formatted buffer of length
1583 * "uConfigBufferLen" bytes containing all config values.
1584 * The TLV is expected to be formatted like this:
1585 * 0 15 31 31+CFG_LEN-1 length-1
1586 * | CFG_ID | CFG_LEN | CFG_BODY | CFG_ID |......|
1587 */
1588} tHalMacStartParameter, *tpHalMacStartParameter;
1589
Jeff Johnsonf7ab8142017-09-13 09:04:23 -07001590extern void cds_wma_complete_cback(void);
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001591extern void wma_send_regdomain_info_to_fw(uint32_t reg_dmn, uint16_t regdmn2G,
Rajeev Kumar Sirasanagandla873b6d92017-06-06 13:11:17 +05301592 uint16_t regdmn5G, uint8_t ctl2G,
1593 uint8_t ctl5G);
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001594/**
1595 * enum frame_index - Frame index
1596 * @GENERIC_NODOWNLD_NOACK_COMP_INDEX: Frame index for no download comp no ack
1597 * @GENERIC_DOWNLD_COMP_NOACK_COMP_INDEX: Frame index for download comp no ack
1598 * @GENERIC_DOWNLD_COMP_ACK_COMP_INDEX: Frame index for download comp and ack
1599 * @GENERIC_NODOWLOAD_ACK_COMP_INDEX: Frame index for no download comp and ack
1600 * @FRAME_INDEX_MAX: maximum frame index
1601 */
1602enum frame_index {
1603 GENERIC_NODOWNLD_NOACK_COMP_INDEX,
1604 GENERIC_DOWNLD_COMP_NOACK_COMP_INDEX,
1605 GENERIC_DOWNLD_COMP_ACK_COMP_INDEX,
1606 GENERIC_NODOWLOAD_ACK_COMP_INDEX,
1607 FRAME_INDEX_MAX
1608};
1609
1610/**
1611 * struct wma_tx_ack_work_ctx - tx ack work context
1612 * @wma_handle: wma handle
1613 * @sub_type: sub type
1614 * @status: status
1615 * @ack_cmp_work: work structure
1616 */
1617struct wma_tx_ack_work_ctx {
1618 tp_wma_handle wma_handle;
1619 uint16_t sub_type;
1620 int32_t status;
Anurag Chouhan42958bb2016-02-19 15:43:11 +05301621 qdf_work_t ack_cmp_work;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001622};
1623
1624/**
1625 * struct wma_target_req - target request parameters
1626 * @event_timeout: event timeout
1627 * @node: list
1628 * @user_data: user data
1629 * @msg_type: message type
1630 * @vdev_id: vdev id
1631 * @type: type
1632 */
1633struct wma_target_req {
Anurag Chouhan210db072016-02-22 18:42:15 +05301634 qdf_mc_timer_t event_timeout;
Anurag Chouhanffb21542016-02-17 14:33:03 +05301635 qdf_list_node_t node;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001636 void *user_data;
1637 uint32_t msg_type;
1638 uint8_t vdev_id;
1639 uint8_t type;
1640};
1641
1642/**
1643 * struct wma_vdev_start_req - vdev start request parameters
1644 * @beacon_intval: beacon interval
1645 * @dtim_period: dtim period
1646 * @max_txpow: max tx power
1647 * @chan_offset: channel offset
1648 * @is_dfs: is dfs supported or not
1649 * @vdev_id: vdev id
1650 * @chan: channel
1651 * @oper_mode: operating mode
1652 * @ssid: ssid
1653 * @hidden_ssid: hidden ssid
1654 * @pmf_enabled: is pmf enabled or not
1655 * @vht_capable: VHT capabality
1656 * @ht_capable: HT capabality
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001657 * @dot11_mode: 802.11 mode
1658 * @is_half_rate: is the channel operating at 10MHz
1659 * @is_quarter_rate: is the channel operating at 5MHz
1660 * @preferred_tx_streams: policy manager indicates the preferred
1661 * number of transmit streams
1662 * @preferred_rx_streams: policy manager indicates the preferred
1663 * number of receive streams
Jiachao Wu712d4fd2017-08-23 16:52:34 +08001664 * @beacon_tx_rate: beacon tx rate
Krishna Kumaar Natarajan4f1d7722017-03-03 21:12:51 -08001665 * @he_capable: HE capability
Krishna Kumaar Natarajan0103ef82017-02-17 18:15:56 -08001666 * @he_ops: HE operation
Arif Hussain671a1902017-03-17 09:08:32 -07001667 * @cac_duration_ms: cac duration in milliseconds
1668 * @dfs_regdomain: dfs region
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001669 */
1670struct wma_vdev_start_req {
1671 uint32_t beacon_intval;
1672 uint32_t dtim_period;
1673 int32_t max_txpow;
Kiran Kumar Lokere13644672016-02-29 15:40:10 -08001674 enum phy_ch_width chan_width;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001675 bool is_dfs;
1676 uint8_t vdev_id;
1677 uint8_t chan;
1678 uint8_t oper_mode;
1679 tSirMacSSid ssid;
1680 uint8_t hidden_ssid;
1681 uint8_t pmf_enabled;
1682 uint8_t vht_capable;
1683 uint8_t ch_center_freq_seg0;
1684 uint8_t ch_center_freq_seg1;
1685 uint8_t ht_capable;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001686 uint8_t dot11_mode;
1687 bool is_half_rate;
1688 bool is_quarter_rate;
1689 uint32_t preferred_tx_streams;
1690 uint32_t preferred_rx_streams;
Jiachao Wu712d4fd2017-08-23 16:52:34 +08001691 uint16_t beacon_tx_rate;
Krishna Kumaar Natarajan0103ef82017-02-17 18:15:56 -08001692#ifdef WLAN_FEATURE_11AX
Krishna Kumaar Natarajan4f1d7722017-03-03 21:12:51 -08001693 bool he_capable;
Krishna Kumaar Natarajan0103ef82017-02-17 18:15:56 -08001694 uint32_t he_ops;
1695#endif
Arif Hussain671a1902017-03-17 09:08:32 -07001696 uint32_t cac_duration_ms;
1697 uint32_t dfs_regdomain;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001698};
1699
1700/**
1701 * struct wma_set_key_params - set key parameters
1702 * @vdev_id: vdev id
1703 * @def_key_idx: used to see if we have to read the key from cfg
1704 * @key_len: key length
1705 * @peer_mac: peer mac address
1706 * @singl_tid_rc: 1=Single TID based Replay Count, 0=Per TID based RC
1707 * @key_type: key type
1708 * @key_idx: key index
1709 * @unicast: unicast flag
1710 * @key_data: key data
1711 */
1712struct wma_set_key_params {
1713 uint8_t vdev_id;
1714 /* def_key_idx can be used to see if we have to read the key from cfg */
1715 uint32_t def_key_idx;
1716 uint16_t key_len;
1717 uint8_t peer_mac[IEEE80211_ADDR_LEN];
1718 uint8_t singl_tid_rc;
1719 enum eAniEdType key_type;
1720 uint32_t key_idx;
1721 bool unicast;
1722 uint8_t key_data[SIR_MAC_MAX_KEY_LENGTH];
Krunal Soni8afae9b2017-10-20 20:15:54 -07001723 uint8_t key_rsc[SIR_MAC_MAX_KEY_RSC_LEN];
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001724};
1725
1726/**
1727 * struct t_thermal_cmd_params - thermal command parameters
1728 * @minTemp: minimum temprature
1729 * @maxTemp: maximum temprature
1730 * @thermalEnable: thermal enable
1731 */
1732typedef struct {
1733 uint16_t minTemp;
1734 uint16_t maxTemp;
1735 uint8_t thermalEnable;
1736} t_thermal_cmd_params, *tp_thermal_cmd_params;
1737
1738/**
1739 * enum wma_cfg_cmd_id - wma cmd ids
1740 * @WMA_VDEV_TXRX_FWSTATS_ENABLE_CMDID: txrx firmware stats enable command
1741 * @WMA_VDEV_TXRX_FWSTATS_RESET_CMDID: txrx firmware stats reset command
1742 * @WMA_VDEV_MCC_SET_TIME_LATENCY: set MCC latency time
1743 * @WMA_VDEV_MCC_SET_TIME_QUOTA: set MCC time quota
1744 * @WMA_VDEV_IBSS_SET_ATIM_WINDOW_SIZE: set IBSS ATIM window size
1745 * @WMA_VDEV_IBSS_SET_POWER_SAVE_ALLOWED: set IBSS enable power save
1746 * @WMA_VDEV_IBSS_SET_POWER_COLLAPSE_ALLOWED: set IBSS power collapse enable
1747 * @WMA_VDEV_IBSS_SET_AWAKE_ON_TX_RX: awake IBSS on TX/RX
1748 * @WMA_VDEV_IBSS_SET_INACTIVITY_TIME: set IBSS inactivity time
1749 * @WMA_VDEV_IBSS_SET_TXSP_END_INACTIVITY_TIME: set IBSS TXSP
1750 * @WMA_VDEV_IBSS_PS_SET_WARMUP_TIME_SECS: set IBSS power save warmup time
1751 * @WMA_VDEV_IBSS_PS_SET_1RX_CHAIN_IN_ATIM_WINDOW: set IBSS power save ATIM
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001752 * @WMA_VDEV_TXRX_GET_IPA_UC_FW_STATS_CMDID: get IPA microcontroller fw stats
Yun Park637d6482016-10-05 10:51:33 -07001753 * @WMA_VDEV_TXRX_GET_IPA_UC_SHARING_STATS_CMDID: get IPA uC wifi-sharing stats
1754 * @WMA_VDEV_TXRX_SET_IPA_UC_QUOTA_CMDID: set IPA uC quota limit
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001755 *
1756 * wma command ids for configuration request which
1757 * does not involve sending a wmi command.
1758 */
1759enum wma_cfg_cmd_id {
1760 WMA_VDEV_TXRX_FWSTATS_ENABLE_CMDID = WMI_CMDID_MAX,
1761 WMA_VDEV_TXRX_FWSTATS_RESET_CMDID,
1762 WMA_VDEV_MCC_SET_TIME_LATENCY,
1763 WMA_VDEV_MCC_SET_TIME_QUOTA,
1764 WMA_VDEV_IBSS_SET_ATIM_WINDOW_SIZE,
1765 WMA_VDEV_IBSS_SET_POWER_SAVE_ALLOWED,
1766 WMA_VDEV_IBSS_SET_POWER_COLLAPSE_ALLOWED,
1767 WMA_VDEV_IBSS_SET_AWAKE_ON_TX_RX,
1768 WMA_VDEV_IBSS_SET_INACTIVITY_TIME,
1769 WMA_VDEV_IBSS_SET_TXSP_END_INACTIVITY_TIME,
1770 WMA_VDEV_IBSS_PS_SET_WARMUP_TIME_SECS,
1771 WMA_VDEV_IBSS_PS_SET_1RX_CHAIN_IN_ATIM_WINDOW,
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001772 WMA_VDEV_TXRX_GET_IPA_UC_FW_STATS_CMDID,
Yun Park637d6482016-10-05 10:51:33 -07001773 WMA_VDEV_TXRX_GET_IPA_UC_SHARING_STATS_CMDID,
1774 WMA_VDEV_TXRX_SET_IPA_UC_QUOTA_CMDID,
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001775 WMA_CMD_ID_MAX
1776};
1777
1778/**
1779 * struct wma_trigger_uapsd_params - trigger uapsd parameters
1780 * @wmm_ac: wmm access catagory
1781 * @user_priority: user priority
1782 * @service_interval: service interval
1783 * @suspend_interval: suspend interval
1784 * @delay_interval: delay interval
1785 */
1786typedef struct wma_trigger_uapsd_params {
1787 uint32_t wmm_ac;
1788 uint32_t user_priority;
1789 uint32_t service_interval;
1790 uint32_t suspend_interval;
1791 uint32_t delay_interval;
1792} t_wma_trigger_uapsd_params, *tp_wma_trigger_uapsd_params;
1793
1794/**
1795 * enum uapsd_peer_param_max_sp - U-APSD maximum service period of peer station
1796 * @UAPSD_MAX_SP_LEN_UNLIMITED: unlimited max service period
1797 * @UAPSD_MAX_SP_LEN_2: max service period = 2
1798 * @UAPSD_MAX_SP_LEN_4: max service period = 4
1799 * @UAPSD_MAX_SP_LEN_6: max service period = 6
1800 */
1801enum uapsd_peer_param_max_sp {
1802 UAPSD_MAX_SP_LEN_UNLIMITED = 0,
1803 UAPSD_MAX_SP_LEN_2 = 2,
1804 UAPSD_MAX_SP_LEN_4 = 4,
1805 UAPSD_MAX_SP_LEN_6 = 6
1806};
1807
1808/**
1809 * enum uapsd_peer_param_enabled_ac - U-APSD Enabled AC's of peer station
1810 * @UAPSD_VO_ENABLED: enable uapsd for voice
1811 * @UAPSD_VI_ENABLED: enable uapsd for video
1812 * @UAPSD_BK_ENABLED: enable uapsd for background
1813 * @UAPSD_BE_ENABLED: enable uapsd for best effort
1814 */
1815enum uapsd_peer_param_enabled_ac {
1816 UAPSD_VO_ENABLED = 0x01,
1817 UAPSD_VI_ENABLED = 0x02,
1818 UAPSD_BK_ENABLED = 0x04,
1819 UAPSD_BE_ENABLED = 0x08
1820};
1821
1822/**
Govind Singha471e5e2015-10-12 17:11:14 +05301823 * enum profile_id_t - Firmware profiling index
1824 * @PROF_CPU_IDLE: cpu idle profile
1825 * @PROF_PPDU_PROC: ppdu processing profile
1826 * @PROF_PPDU_POST: ppdu post profile
1827 * @PROF_HTT_TX_INPUT: htt tx input profile
1828 * @PROF_MSDU_ENQ: msdu enqueue profile
1829 * @PROF_PPDU_POST_HAL: ppdu post profile
1830 * @PROF_COMPUTE_TX_TIME: tx time profile
1831 * @PROF_MAX_ID: max profile index
1832 */
1833enum profile_id_t {
1834 PROF_CPU_IDLE,
1835 PROF_PPDU_PROC,
1836 PROF_PPDU_POST,
1837 PROF_HTT_TX_INPUT,
1838 PROF_MSDU_ENQ,
1839 PROF_PPDU_POST_HAL,
1840 PROF_COMPUTE_TX_TIME,
1841 PROF_MAX_ID,
1842};
1843
1844/**
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001845 * struct p2p_ie - P2P IE structural definition.
1846 * @p2p_id: p2p id
1847 * @p2p_len: p2p length
1848 * @p2p_oui: p2p OUI
1849 * @p2p_oui_type: p2p OUI type
1850 */
1851struct p2p_ie {
1852 uint8_t p2p_id;
1853 uint8_t p2p_len;
1854 uint8_t p2p_oui[3];
1855 uint8_t p2p_oui_type;
1856} __packed;
1857
1858/**
1859 * struct p2p_noa_descriptor - noa descriptor
1860 * @type_count: 255: continuous schedule, 0: reserved
1861 * @duration: Absent period duration in micro seconds
1862 * @interval: Absent period interval in micro seconds
1863 * @start_time: 32 bit tsf time when in starts
1864 */
1865struct p2p_noa_descriptor {
1866 uint8_t type_count;
1867 uint32_t duration;
1868 uint32_t interval;
1869 uint32_t start_time;
1870} __packed;
1871
1872/**
1873 * struct p2p_sub_element_noa - p2p noa element
1874 * @p2p_sub_id: p2p sub id
1875 * @p2p_sub_len: p2p sub length
1876 * @index: identifies instance of NOA su element
1877 * @oppPS: oppPS state of the AP
1878 * @ctwindow: ctwindow in TUs
1879 * @num_descriptors: number of NOA descriptors
1880 * @noa_descriptors: noa descriptors
1881 */
1882struct p2p_sub_element_noa {
1883 uint8_t p2p_sub_id;
1884 uint8_t p2p_sub_len;
1885 uint8_t index; /* identifies instance of NOA su element */
1886 uint8_t oppPS:1, /* oppPS state of the AP */
1887 ctwindow:7; /* ctwindow in TUs */
1888 uint8_t num_descriptors; /* number of NOA descriptors */
1889 struct p2p_noa_descriptor noa_descriptors[WMA_MAX_NOA_DESCRIPTORS];
1890};
1891
1892/**
1893 * struct wma_decap_info_t - decapsulation info
1894 * @hdr: header
1895 * @hdr_len: header length
1896 */
1897struct wma_decap_info_t {
1898 uint8_t hdr[sizeof(struct ieee80211_qosframe_addr4)];
1899 int32_t hdr_len;
1900};
1901
1902/**
1903 * enum packet_power_save - packet power save params
1904 * @WMI_VDEV_PPS_PAID_MATCH: paid match param
1905 * @WMI_VDEV_PPS_GID_MATCH: gid match param
1906 * @WMI_VDEV_PPS_EARLY_TIM_CLEAR: early tim clear param
1907 * @WMI_VDEV_PPS_EARLY_DTIM_CLEAR: early dtim clear param
1908 * @WMI_VDEV_PPS_EOF_PAD_DELIM: eof pad delim param
1909 * @WMI_VDEV_PPS_MACADDR_MISMATCH: macaddr mismatch param
1910 * @WMI_VDEV_PPS_DELIM_CRC_FAIL: delim CRC fail param
1911 * @WMI_VDEV_PPS_GID_NSTS_ZERO: gid nsts zero param
1912 * @WMI_VDEV_PPS_RSSI_CHECK: RSSI check param
1913 * @WMI_VDEV_PPS_5G_EBT: 5G ebt param
1914 */
1915typedef enum {
1916 WMI_VDEV_PPS_PAID_MATCH = 0,
1917 WMI_VDEV_PPS_GID_MATCH = 1,
1918 WMI_VDEV_PPS_EARLY_TIM_CLEAR = 2,
1919 WMI_VDEV_PPS_EARLY_DTIM_CLEAR = 3,
1920 WMI_VDEV_PPS_EOF_PAD_DELIM = 4,
1921 WMI_VDEV_PPS_MACADDR_MISMATCH = 5,
1922 WMI_VDEV_PPS_DELIM_CRC_FAIL = 6,
1923 WMI_VDEV_PPS_GID_NSTS_ZERO = 7,
1924 WMI_VDEV_PPS_RSSI_CHECK = 8,
1925 WMI_VDEV_VHT_SET_GID_MGMT = 9,
1926 WMI_VDEV_PPS_5G_EBT = 10
1927} packet_power_save;
1928
1929/**
1930 * enum green_tx_param - green tx parameters
1931 * @WMI_VDEV_PARAM_GTX_HT_MCS: ht mcs param
1932 * @WMI_VDEV_PARAM_GTX_VHT_MCS: vht mcs param
1933 * @WMI_VDEV_PARAM_GTX_USR_CFG: user cfg param
1934 * @WMI_VDEV_PARAM_GTX_THRE: thre param
1935 * @WMI_VDEV_PARAM_GTX_MARGIN: green tx margin param
1936 * @WMI_VDEV_PARAM_GTX_STEP: green tx step param
1937 * @WMI_VDEV_PARAM_GTX_MINTPC: mintpc param
1938 * @WMI_VDEV_PARAM_GTX_BW_MASK: bandwidth mask
1939 */
1940typedef enum {
1941 WMI_VDEV_PARAM_GTX_HT_MCS,
1942 WMI_VDEV_PARAM_GTX_VHT_MCS,
1943 WMI_VDEV_PARAM_GTX_USR_CFG,
1944 WMI_VDEV_PARAM_GTX_THRE,
1945 WMI_VDEV_PARAM_GTX_MARGIN,
1946 WMI_VDEV_PARAM_GTX_STEP,
1947 WMI_VDEV_PARAM_GTX_MINTPC,
1948 WMI_VDEV_PARAM_GTX_BW_MASK,
1949} green_tx_param;
1950
1951#ifdef FEATURE_WLAN_TDLS
1952/**
1953 * struct wma_tdls_params - TDLS parameters
1954 * @vdev_id: vdev id
1955 * @tdls_state: TDLS state
1956 * @notification_interval_ms: notification inerval
1957 * @tx_discovery_threshold: tx discovery threshold
1958 * @tx_teardown_threshold: tx teardown threashold
1959 * @rssi_teardown_threshold: RSSI teardown threshold
1960 * @rssi_delta: RSSI delta
1961 * @tdls_options: TDLS options
1962 * @peer_traffic_ind_window: raffic indication window
1963 * @peer_traffic_response_timeout: traffic response timeout
1964 * @puapsd_mask: uapsd mask
1965 * @puapsd_inactivity_time: uapsd inactivity time
1966 * @puapsd_rx_frame_threshold: uapsd rx frame threshold
Kabilan Kannanca670be2015-11-23 01:56:12 -08001967 * @teardown_notification_ms: tdls teardown notification interval
Kabilan Kannan421714b2015-11-23 04:44:59 -08001968 * @tdls_peer_kickout_threshold: tdls packet threshold for
1969 * peer kickout operation
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001970 */
1971typedef struct wma_tdls_params {
1972 uint32_t vdev_id;
1973 uint32_t tdls_state;
1974 uint32_t notification_interval_ms;
1975 uint32_t tx_discovery_threshold;
1976 uint32_t tx_teardown_threshold;
1977 int32_t rssi_teardown_threshold;
1978 int32_t rssi_delta;
1979 uint32_t tdls_options;
1980 uint32_t peer_traffic_ind_window;
1981 uint32_t peer_traffic_response_timeout;
1982 uint32_t puapsd_mask;
1983 uint32_t puapsd_inactivity_time;
1984 uint32_t puapsd_rx_frame_threshold;
Kabilan Kannanca670be2015-11-23 01:56:12 -08001985 uint32_t teardown_notification_ms;
Kabilan Kannan421714b2015-11-23 04:44:59 -08001986 uint32_t tdls_peer_kickout_threshold;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001987} t_wma_tdls_params;
1988
1989/**
1990 * struct wma_tdls_peer_event - TDLS peer event
1991 * @vdev_id: vdev id
1992 * @peer_macaddr: peer MAC address
1993 * @peer_status: TDLS peer status
1994 * @peer_reason: TDLS peer reason
1995 */
1996typedef struct {
1997 A_UINT32 vdev_id;
1998 wmi_mac_addr peer_macaddr;
1999 A_UINT32 peer_status;
2000 A_UINT32 peer_reason;
2001} wma_tdls_peer_event;
2002
2003#endif /* FEATURE_WLAN_TDLS */
2004
2005/**
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08002006 * enum uapsd_ac - U-APSD Access Categories
2007 * @UAPSD_BE: best effort
2008 * @UAPSD_BK: back ground
2009 * @UAPSD_VI: video
2010 * @UAPSD_VO: voice
2011 */
2012enum uapsd_ac {
2013 UAPSD_BE,
2014 UAPSD_BK,
2015 UAPSD_VI,
2016 UAPSD_VO
2017};
2018
Anurag Chouhanfb54ab02016-02-18 18:00:46 +05302019QDF_STATUS wma_disable_uapsd_per_ac(tp_wma_handle wma_handle,
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08002020 uint32_t vdev_id, enum uapsd_ac ac);
2021
2022/**
2023 * enum uapsd_up - U-APSD User Priorities
2024 * @UAPSD_UP_BE: best effort
2025 * @UAPSD_UP_BK: back ground
2026 * @UAPSD_UP_RESV: reserve
2027 * @UAPSD_UP_EE: Excellent Effort
2028 * @UAPSD_UP_CL: Critical Applications
2029 * @UAPSD_UP_VI: video
2030 * @UAPSD_UP_VO: voice
2031 * @UAPSD_UP_NC: Network Control
2032 */
2033enum uapsd_up {
2034 UAPSD_UP_BE,
2035 UAPSD_UP_BK,
2036 UAPSD_UP_RESV,
2037 UAPSD_UP_EE,
2038 UAPSD_UP_CL,
2039 UAPSD_UP_VI,
2040 UAPSD_UP_VO,
2041 UAPSD_UP_NC,
2042 UAPSD_UP_MAX
2043};
2044
2045/**
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08002046 * struct wma_roam_invoke_cmd - roam invoke command
2047 * @vdev_id: vdev id
2048 * @bssid: mac address
2049 * @channel: channel
Naveen Rawat664a7cb2017-01-19 17:58:14 -08002050 * @frame_len: frame length, includs mac header, fixed params and ies
2051 * @frame_buf: buffer contaning probe response or beacon
Krunal Soni332f4af2017-06-01 14:36:17 -07002052 * @is_same_bssid: flag to indicate if roaming is requested for same bssid
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08002053 */
2054struct wma_roam_invoke_cmd {
2055 uint32_t vdev_id;
2056 uint8_t bssid[IEEE80211_ADDR_LEN];
2057 uint32_t channel;
Naveen Rawat664a7cb2017-01-19 17:58:14 -08002058 uint32_t frame_len;
2059 uint8_t *frame_buf;
Krunal Soni332f4af2017-06-01 14:36:17 -07002060 uint8_t is_same_bssid;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08002061};
2062
2063/**
2064 * struct wma_process_fw_event_params - fw event parameters
2065 * @wmi_handle: wmi handle
2066 * @evt_buf: event buffer
2067 */
2068typedef struct {
2069 void *wmi_handle;
2070 void *evt_buf;
2071} wma_process_fw_event_params;
2072
Govind Singhd76a5b02016-03-08 15:12:14 +05302073int wma_process_fw_event_handler(void *ctx, void *ev, uint8_t rx_ctx);
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08002074
2075A_UINT32 e_csr_auth_type_to_rsn_authmode(eCsrAuthType authtype,
2076 eCsrEncryptionType encr);
2077A_UINT32 e_csr_encryption_type_to_rsn_cipherset(eCsrEncryptionType encr);
2078
Anurag Chouhanfb54ab02016-02-18 18:00:46 +05302079QDF_STATUS wma_trigger_uapsd_params(tp_wma_handle wma_handle, uint32_t vdev_id,
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08002080 tp_wma_trigger_uapsd_params
2081 trigger_uapsd_params);
2082
2083/* added to get average snr for both data and beacon */
Anurag Chouhanfb54ab02016-02-18 18:00:46 +05302084QDF_STATUS wma_send_snr_request(tp_wma_handle wma_handle, void *pGetRssiReq);
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08002085
2086
Anurag Chouhanfb54ab02016-02-18 18:00:46 +05302087QDF_STATUS wma_update_vdev_tbl(tp_wma_handle wma_handle, uint8_t vdev_id,
Leo Chang96464902016-10-28 11:10:54 -07002088 void *tx_rx_vdev_handle,
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08002089 uint8_t *mac, uint32_t vdev_type, bool add_del);
2090
2091void wma_send_flush_logs_to_fw(tp_wma_handle wma_handle);
2092void wma_log_completion_timeout(void *data);
2093
Anurag Chouhanfb54ab02016-02-18 18:00:46 +05302094QDF_STATUS wma_set_rssi_monitoring(tp_wma_handle wma,
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08002095 struct rssi_monitor_req *req);
2096
Manishekar Chandrasekaran7009f252016-04-21 19:14:15 +05302097QDF_STATUS wma_send_pdev_set_pcl_cmd(tp_wma_handle wma_handle,
2098 struct wmi_pcl_chan_weights *msg);
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08002099
Manishekar Chandrasekarand9640342016-04-27 12:28:26 +05302100QDF_STATUS wma_send_pdev_set_hw_mode_cmd(tp_wma_handle wma_handle,
Tushnim Bhattacharyya51258a72017-03-13 12:55:02 -07002101 struct policy_mgr_hw_mode *msg);
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08002102
Manishekar Chandrasekaran5d46f702016-04-27 12:50:52 +05302103QDF_STATUS wma_send_pdev_set_dual_mac_config(tp_wma_handle wma_handle,
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08002104 struct sir_dual_mac_config *msg);
Archana Ramachandrand41c3ed2016-02-10 15:48:06 -08002105QDF_STATUS wma_send_pdev_set_antenna_mode(tp_wma_handle wma_handle,
2106 struct sir_antenna_mode_param *msg);
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08002107
2108struct wma_target_req *wma_fill_vdev_req(tp_wma_handle wma,
2109 uint8_t vdev_id,
2110 uint32_t msg_type, uint8_t type,
2111 void *params, uint32_t timeout);
2112struct wma_target_req *wma_fill_hold_req(tp_wma_handle wma,
2113 uint8_t vdev_id, uint32_t msg_type,
2114 uint8_t type, void *params,
2115 uint32_t timeout);
2116
Anurag Chouhanfb54ab02016-02-18 18:00:46 +05302117QDF_STATUS wma_vdev_start(tp_wma_handle wma,
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08002118 struct wma_vdev_start_req *req, bool isRestart);
2119
2120void wma_remove_vdev_req(tp_wma_handle wma, uint8_t vdev_id,
2121 uint8_t type);
2122
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08002123int wma_mgmt_tx_completion_handler(void *handle, uint8_t *cmpl_event_params,
2124 uint32_t len);
Nirav Shah20489972016-06-16 19:20:28 +05302125int wma_mgmt_tx_bundle_completion_handler(void *handle,
2126 uint8_t *cmpl_event_params, uint32_t len);
Naveen Rawatc0c91cd2015-11-05 14:27:37 -08002127uint32_t wma_get_vht_ch_width(void);
Govind Singhd76a5b02016-03-08 15:12:14 +05302128QDF_STATUS
2129wma_config_debug_module_cmd(wmi_unified_t wmi_handle, A_UINT32 param,
2130 A_UINT32 val, A_UINT32 *module_id_bitmap,
2131 A_UINT32 bitmap_len);
Ravi Joshi61c3c7a2015-11-09 18:41:20 -08002132#ifdef FEATURE_LFR_SUBNET_DETECTION
Anurag Chouhanfb54ab02016-02-18 18:00:46 +05302133QDF_STATUS wma_set_gateway_params(tp_wma_handle wma,
Ravi Joshi61c3c7a2015-11-09 18:41:20 -08002134 struct gateway_param_update_req *req);
2135#else
Anurag Chouhanfb54ab02016-02-18 18:00:46 +05302136static inline QDF_STATUS wma_set_gateway_params(tp_wma_handle wma,
Ravi Joshi61c3c7a2015-11-09 18:41:20 -08002137 struct gateway_param_update_req *req)
2138{
Anurag Chouhanfb54ab02016-02-18 18:00:46 +05302139 return QDF_STATUS_SUCCESS;
Ravi Joshi61c3c7a2015-11-09 18:41:20 -08002140}
2141#endif /* FEATURE_LFR_SUBNET_DETECTION */
2142
Dhanashri Atre09828f12016-11-13 10:36:58 -08002143QDF_STATUS wma_lro_config_cmd(void *handle,
2144 struct cdp_lro_hash_config *wma_lro_cmd);
2145
Dhanashri Atre1f0cbe42015-11-19 10:56:53 -08002146void
2147wma_indicate_err(enum ol_rx_err_type err_type,
2148 struct ol_error_info *err_info);
Sandeep Puligillae0875662016-02-12 16:09:21 -08002149
jiadcd49ec72017-12-05 13:33:11 +08002150/**
2151 * wma_rx_mic_error_ind() - indicate mic error to the protocol stack
2152 * @scn_handle: pdev handle from osif layer
2153 * @vdev_id: vdev id
2154 * @wh: pointer to ieee80211_frame structure
2155 *
2156 * This function indicates TKIP MIC errors encountered in the RX data path
2157 * to the protocol stack
2158 *
2159 * Return: none
2160 */
2161void wma_rx_mic_error_ind(void *scn_handle, uint16_t vdev_id, void *wh);
2162
Sandeep Puligillae0875662016-02-12 16:09:21 -08002163QDF_STATUS wma_ht40_stop_obss_scan(tp_wma_handle wma_handle,
2164 int32_t vdev_id);
Anurag Chouhanbf5e0e22016-09-12 12:54:09 +05302165
2166void wma_process_fw_test_cmd(WMA_HANDLE handle,
2167 struct set_fwtest_params *wma_fwtest);
2168
Sandeep Puligillae0875662016-02-12 16:09:21 -08002169QDF_STATUS wma_send_ht40_obss_scanind(tp_wma_handle wma,
2170 struct obss_ht40_scanind *req);
Arun Khandavalli2476ef52016-04-26 20:19:43 +05302171
2172int wma_get_bpf_caps_event_handler(void *handle,
2173 u_int8_t *cmd_param_info,
2174 u_int32_t len);
Krunal Soniaa664da2016-06-15 23:46:40 -07002175uint32_t wma_get_num_of_setbits_from_bitmask(uint32_t mask);
Arun Khandavalli2476ef52016-04-26 20:19:43 +05302176QDF_STATUS wma_get_bpf_capabilities(tp_wma_handle wma);
2177QDF_STATUS wma_set_bpf_instructions(tp_wma_handle wma,
2178 struct sir_bpf_set_offload *bpf_set_offload);
Kiran Kumar Lokere666bf852016-05-02 12:23:02 -07002179void wma_process_set_pdev_ie_req(tp_wma_handle wma,
2180 struct set_ie_param *ie_params);
2181void wma_process_set_pdev_ht_ie_req(tp_wma_handle wma,
2182 struct set_ie_param *ie_params);
2183void wma_process_set_pdev_vht_ie_req(tp_wma_handle wma,
2184 struct set_ie_param *ie_params);
Mukul Sharma3ba26b82017-01-12 21:59:41 +05302185
Deepak Dhamdhere13983f22016-05-31 19:06:09 -07002186void wma_remove_peer(tp_wma_handle wma, u_int8_t *bssid,
Leo Chang96464902016-10-28 11:10:54 -07002187 u_int8_t vdev_id, void *peer,
Deepak Dhamdhere13983f22016-05-31 19:06:09 -07002188 bool roam_synch_in_progress);
Naveen Rawate82c1f32016-06-22 15:34:36 -07002189
Venkata Sharath Chandra Manchala0d44d452016-11-23 17:48:15 -08002190QDF_STATUS wma_create_peer(tp_wma_handle wma, struct cdp_pdev *pdev,
Mukul Sharma00058692017-01-28 19:04:32 +05302191 struct cdp_vdev *vdev, u8 peer_addr[6],
Deepak Dhamdhere0f076bd2016-06-02 11:29:21 -07002192 u_int32_t peer_type, u_int8_t vdev_id,
2193 bool roam_synch_in_progress);
Naveen Rawate82c1f32016-06-22 15:34:36 -07002194
Padma, Santhosh Kumar16dacfb2017-03-21 19:05:40 +05302195/**
2196 * wma_get_cca_stats() - send request to fw to get CCA
2197 * @wmi_hdl: wma handle
2198 * @vdev_id: vdev id
2199 *
2200 * Return: QDF status
2201 */
2202QDF_STATUS wma_get_cca_stats(tp_wma_handle wma_handle,
2203 uint8_t vdev_id);
2204
Komal Seelam02d09342016-02-23 18:03:19 +05302205struct wma_ini_config *wma_get_ini_handle(tp_wma_handle wma_handle);
Abhishek Singh1c676222016-05-09 14:20:28 +05302206WLAN_PHY_MODE wma_chan_phy_mode(u8 chan, enum phy_ch_width chan_width,
2207 u8 dot11_mode);
Krishna Kumaar Natarajanc5e06ac2016-06-30 16:49:19 -07002208
2209#ifdef FEATURE_OEM_DATA_SUPPORT
2210QDF_STATUS wma_start_oem_data_req(tp_wma_handle wma_handle,
Krishna Kumaar Natarajanc1fa17d2016-08-03 14:19:20 -07002211 struct oem_data_req *oem_req);
Krishna Kumaar Natarajanc5e06ac2016-06-30 16:49:19 -07002212#endif
Selvaraj, Sridharebda0f22016-08-29 16:05:23 +05302213
2214QDF_STATUS wma_enable_disable_caevent_ind(tp_wma_handle wma_handle,
2215 uint8_t val);
Himanshu Agarwalf65bd4c2016-12-05 17:21:12 +05302216void wma_register_packetdump_callback(
2217 tp_wma_packetdump_cb wma_mgmt_tx_packetdump_cb,
2218 tp_wma_packetdump_cb wma_mgmt_rx_packetdump_cb);
2219void wma_deregister_packetdump_callback(void);
Agrawal, Ashish4e5fa1c2016-09-21 19:03:43 +05302220void wma_update_sta_inactivity_timeout(tp_wma_handle wma,
2221 struct sme_sta_inactivity_timeout *sta_inactivity_timer);
Leo Chang96464902016-10-28 11:10:54 -07002222void wma_peer_set_default_routing(void *scn_handle, uint8_t *peer_macaddr,
2223 uint8_t vdev_id, bool hash_based, uint8_t ring_num);
2224int wma_peer_rx_reorder_queue_setup(void *scn_handle,
2225 uint8_t vdev_id, uint8_t *peer_macaddr, qdf_dma_addr_t hw_qdesc,
2226 int tid, uint16_t queue_no);
2227int wma_peer_rx_reorder_queue_remove(void *scn_handle,
2228 uint8_t vdev_id, uint8_t *peer_macaddr, uint32_t peer_tid_bitmap);
Himanshu Agarwal2fdf77a2016-12-29 11:41:00 +05302229
2230/**
2231 * wma_form_rx_packet() - form rx cds packet
2232 * @buf: buffer
2233 * @mgmt_rx_params: mgmt rx params
2234 * @rx_pkt: cds packet
2235 *
2236 * This functions forms a cds packet from the rx mgmt frame received.
2237 *
2238 * Return: 0 for success or error code
2239 */
2240int wma_form_rx_packet(qdf_nbuf_t buf,
Himanshu Agarwald2e6cde2017-01-10 14:47:04 +05302241 struct mgmt_rx_event_params *mgmt_rx_params,
Himanshu Agarwal2fdf77a2016-12-29 11:41:00 +05302242 cds_pkt_t *rx_pkt);
2243
2244/**
2245 * wma_mgmt_unified_cmd_send() - send the mgmt tx packet
2246 * @vdev: objmgr vdev
2247 * @buf: buffer
2248 * @desc_id: desc id
2249 * @mgmt_tx_params: mgmt rx params
2250 *
2251 * This functions sends mgmt tx packet to WMI layer.
2252 *
2253 * Return: 0 for success or error code
2254 */
2255QDF_STATUS wma_mgmt_unified_cmd_send(struct wlan_objmgr_vdev *vdev,
2256 qdf_nbuf_t buf, uint32_t desc_id,
2257 void *mgmt_tx_params);
Kapil Gupta4f0c0c12017-02-07 15:21:15 +05302258
2259/**
2260 * wma_chan_info_event_handler() - chan info event handler
2261 * @handle: wma handle
2262 * @event_buf: event handler data
2263 * @len: length of @event_buf
2264 *
2265 * this function will handle the WMI_CHAN_INFO_EVENTID
2266 *
2267 * Return: int
2268 */
2269int wma_chan_info_event_handler(void *handle, uint8_t *event_buf,
2270 uint32_t len);
Mukul Sharmaf9047232017-03-02 16:58:56 +05302271
2272/**
2273 * wma_vdev_set_mlme_state() - Set vdev mlme state
2274 * @wma: wma handle
2275 * @vdev_id: the Id of the vdev to configure
2276 * @state: vdev state
2277 *
2278 * Return: None
2279 */
2280static inline
2281void wma_vdev_set_mlme_state(tp_wma_handle wma, uint8_t vdev_id,
2282 enum wlan_vdev_state state)
2283{
2284 struct wlan_objmgr_vdev *vdev;
2285
2286 if (!wma) {
2287 WMA_LOGE("%s: WMA context is invald!", __func__);
2288 return;
2289 }
2290
2291 vdev = wlan_objmgr_get_vdev_by_id_from_psoc(wma->psoc, vdev_id,
2292 WLAN_LEGACY_WMA_ID);
2293 if (vdev) {
2294 wlan_vdev_obj_lock(vdev);
2295 wlan_vdev_mlme_set_state(vdev, state);
2296 wlan_vdev_obj_unlock(vdev);
2297 wlan_objmgr_vdev_release_ref(vdev, WLAN_LEGACY_WMA_ID);
2298 }
2299}
Mukul Sharma6411bb82017-03-01 15:57:07 +05302300
2301/**
2302 * wma_update_vdev_pause_bitmap() - update vdev pause bitmap
2303 * @vdev_id: the Id of the vdev to configure
2304 * @value: value pause bitmap value
2305 *
2306 * Return: None
2307 */
2308static inline
2309void wma_vdev_update_pause_bitmap(uint8_t vdev_id, uint16_t value)
2310{
2311 tp_wma_handle wma = (tp_wma_handle)cds_get_context(QDF_MODULE_ID_WMA);
2312 struct wma_txrx_node *iface;
2313
Mukul Sharma6411bb82017-03-01 15:57:07 +05302314 if (!wma) {
2315 WMA_LOGE("%s: WMA context is invald!", __func__);
2316 return;
2317 }
2318
Amar Singhalef59eee2018-01-02 12:46:35 -08002319 if (vdev_id >= wma->max_bssid) {
2320 WMA_LOGE("%s: Invalid vdev_id: %d", __func__, vdev_id);
2321 return;
2322 }
2323
Mukul Sharma6411bb82017-03-01 15:57:07 +05302324 iface = &wma->interfaces[vdev_id];
Amar Singhalef59eee2018-01-02 12:46:35 -08002325
2326 if (!iface) {
2327 WMA_LOGE("%s: Failed to get iface: NULL",
2328 __func__);
2329 return;
2330 }
2331
2332 if (!iface->handle) {
2333 WMA_LOGE("%s: Failed to get iface handle: NULL",
2334 __func__);
Mukul Sharma6411bb82017-03-01 15:57:07 +05302335 return;
2336 }
2337
2338 iface->pause_bitmap = value;
2339}
2340
2341/**
2342 * wma_vdev_get_pause_bitmap() - Get vdev pause bitmap
2343 * @vdev_id: the Id of the vdev to configure
2344 *
2345 * Return: Vdev pause bitmap value else 0 on error
2346 */
2347static inline
2348uint16_t wma_vdev_get_pause_bitmap(uint8_t vdev_id)
2349{
2350 tp_wma_handle wma = (tp_wma_handle)cds_get_context(QDF_MODULE_ID_WMA);
2351 struct wma_txrx_node *iface;
2352
2353 if (!wma) {
2354 WMA_LOGE("%s: WMA context is invald!", __func__);
2355 return 0;
2356 }
2357
2358 iface = &wma->interfaces[vdev_id];
Amar Singhalef59eee2018-01-02 12:46:35 -08002359
2360 if (!iface) {
2361 WMA_LOGE("%s: Failed to get iface: NULL",
2362 __func__);
2363 return 0;
2364 }
2365
2366 if (!iface->handle) {
2367 WMA_LOGE("%s: Failed to get iface handle: NULL",
2368 __func__);
Mukul Sharma6411bb82017-03-01 15:57:07 +05302369 return 0;
2370 }
2371
2372 return iface->pause_bitmap;
2373}
2374
2375/**
Ravi Kumar Bokka05c14e52017-03-27 14:48:23 +05302376 * wma_vdev_is_device_in_low_pwr_mode - is device in power save mode
2377 * @vdev_id: the Id of the vdev to configure
2378 *
2379 * Return: true if device is in low power mode else false
2380 */
2381static inline bool wma_vdev_is_device_in_low_pwr_mode(uint8_t vdev_id)
2382{
2383 tp_wma_handle wma = (tp_wma_handle)cds_get_context(QDF_MODULE_ID_WMA);
2384 struct wma_txrx_node *iface;
2385
2386 if (!wma) {
2387 WMA_LOGE("%s: WMA context is invald!", __func__);
2388 return 0;
2389 }
2390
2391 iface = &wma->interfaces[vdev_id];
Amar Singhalef59eee2018-01-02 12:46:35 -08002392
2393 if (!iface) {
2394 WMA_LOGE("%s: Failed to get iface: NULL",
2395 __func__);
2396 return 0;
2397 }
2398
2399 if (!iface->handle) {
2400 WMA_LOGE("%s: Failed to get iface handle:NULL",
2401 __func__);
Ravi Kumar Bokka05c14e52017-03-27 14:48:23 +05302402 return 0;
2403 }
2404
2405 return iface->in_bmps || wma->in_imps;
2406}
2407
2408/**
Mukul Sharma6411bb82017-03-01 15:57:07 +05302409 * wma_vdev_set_pause_bit() - Set a bit in vdev pause bitmap
2410 * @vdev_id: the Id of the vdev to configure
2411 * @bit_pos: set bit position in pause bitmap
2412 *
2413 * Return: None
2414 */
2415static inline
2416void wma_vdev_set_pause_bit(uint8_t vdev_id, wmi_tx_pause_type bit_pos)
2417{
2418 tp_wma_handle wma = (tp_wma_handle)cds_get_context(QDF_MODULE_ID_WMA);
2419 struct wma_txrx_node *iface;
2420
2421 if (!wma) {
2422 WMA_LOGE("%s: WMA context is invald!", __func__);
2423 return;
2424 }
2425
2426 iface = &wma->interfaces[vdev_id];
Amar Singhalef59eee2018-01-02 12:46:35 -08002427
2428 if (!iface) {
2429 WMA_LOGE("%s: Failed to get iface: NULL",
2430 __func__);
2431 return;
2432 }
2433
2434 if (!iface->handle) {
2435 WMA_LOGE("%s: Failed to get iface handle: NULL",
2436 __func__);
Mukul Sharma6411bb82017-03-01 15:57:07 +05302437 return;
2438 }
2439
2440 iface->pause_bitmap |= (1 << bit_pos);
2441}
2442
2443/**
2444 * wma_vdev_clear_pause_bit() - Clear a bit from vdev pause bitmap
2445 * @vdev_id: the Id of the vdev to configure
2446 * @bit_pos: set bit position in pause bitmap
2447 *
2448 * Return: None
2449 */
2450static inline
2451void wma_vdev_clear_pause_bit(uint8_t vdev_id, wmi_tx_pause_type bit_pos)
2452{
2453 tp_wma_handle wma = (tp_wma_handle)cds_get_context(QDF_MODULE_ID_WMA);
2454 struct wma_txrx_node *iface;
2455
2456 if (!wma) {
2457 WMA_LOGE("%s: WMA context is invald!", __func__);
2458 return;
2459 }
2460
2461 iface = &wma->interfaces[vdev_id];
Amar Singhalef59eee2018-01-02 12:46:35 -08002462
2463 if (!iface) {
2464 WMA_LOGE("%s: Failed to get iface: NULL",
2465 __func__);
2466 return;
2467 }
2468
2469 if (!iface->handle) {
2470 WMA_LOGE("%s: Failed to get iface handle: NULL",
2471 __func__);
Mukul Sharma6411bb82017-03-01 15:57:07 +05302472 return;
2473 }
2474
2475 iface->pause_bitmap &= ~(1 << bit_pos);
2476}
2477
Naveen Rawat5c35ae42017-04-18 15:35:07 -07002478/**
Kiran Kumar Lokeref7662e52018-02-05 09:04:07 -08002479 * chanmode_to_chanwidth() - get channel width through channel mode
2480 * @chanmode: channel phy mode
2481 *
2482 * Return: channel width
2483 */
2484wmi_channel_width chanmode_to_chanwidth(WLAN_PHY_MODE chanmode);
2485
2486/**
Naveen Rawat5c35ae42017-04-18 15:35:07 -07002487 * wma_process_roaming_config() - process roam request
2488 * @wma_handle: wma handle
2489 * @roam_req: roam request parameters
2490 *
2491 * Main routine to handle ROAM commands coming from CSR module.
2492 *
2493 * Return: QDF status
2494 */
2495QDF_STATUS wma_process_roaming_config(tp_wma_handle wma_handle,
2496 tSirRoamOffloadScanReq *roam_req);
2497
Dustin Brown8d2d0f52017-04-03 17:02:08 -07002498#ifdef WMI_INTERFACE_EVENT_LOGGING
2499static inline void wma_print_wmi_cmd_log(uint32_t count,
2500 qdf_abstract_print *print,
2501 void *print_priv)
2502{
2503 t_wma_handle *wma = cds_get_context(QDF_MODULE_ID_WMA);
2504
Rachit Kankaneb1035622018-01-24 18:41:35 +05302505 if (wma) {
2506 print(print_priv, "Command Log (count %u)", count);
Dustin Brown8d2d0f52017-04-03 17:02:08 -07002507 wmi_print_cmd_log(wma->wmi_handle, count, print, print_priv);
Rachit Kankaneb1035622018-01-24 18:41:35 +05302508 }
Dustin Brown8d2d0f52017-04-03 17:02:08 -07002509}
2510
2511static inline void wma_print_wmi_cmd_tx_cmp_log(uint32_t count,
2512 qdf_abstract_print *print,
2513 void *print_priv)
2514{
2515 t_wma_handle *wma = cds_get_context(QDF_MODULE_ID_WMA);
2516
Rachit Kankaneb1035622018-01-24 18:41:35 +05302517 if (wma) {
2518 print(print_priv, "Command Tx Complete Log (count %u)", count);
Dustin Brown8d2d0f52017-04-03 17:02:08 -07002519 wmi_print_cmd_tx_cmp_log(wma->wmi_handle, count, print,
2520 print_priv);
Rachit Kankaneb1035622018-01-24 18:41:35 +05302521 }
Dustin Brown8d2d0f52017-04-03 17:02:08 -07002522}
2523
2524static inline void wma_print_wmi_mgmt_cmd_log(uint32_t count,
2525 qdf_abstract_print *print,
2526 void *print_priv)
2527{
2528 t_wma_handle *wma = cds_get_context(QDF_MODULE_ID_WMA);
2529
Rachit Kankaneb1035622018-01-24 18:41:35 +05302530 if (wma) {
2531 print(print_priv, "Management Command Log (count %u)", count);
Dustin Brown8d2d0f52017-04-03 17:02:08 -07002532 wmi_print_mgmt_cmd_log(wma->wmi_handle, count, print,
2533 print_priv);
Rachit Kankaneb1035622018-01-24 18:41:35 +05302534 }
Dustin Brown8d2d0f52017-04-03 17:02:08 -07002535}
2536
2537static inline void wma_print_wmi_mgmt_cmd_tx_cmp_log(uint32_t count,
2538 qdf_abstract_print *print,
2539 void *print_priv)
2540{
2541 t_wma_handle *wma = cds_get_context(QDF_MODULE_ID_WMA);
2542
Rachit Kankaneb1035622018-01-24 18:41:35 +05302543 if (wma) {
2544 print(print_priv,
2545 "Management Command Tx Complete Log (count %u)", count);
Dustin Brown8d2d0f52017-04-03 17:02:08 -07002546 wmi_print_mgmt_cmd_tx_cmp_log(wma->wmi_handle, count, print,
2547 print_priv);
Rachit Kankaneb1035622018-01-24 18:41:35 +05302548 }
Dustin Brown8d2d0f52017-04-03 17:02:08 -07002549}
2550
2551static inline void wma_print_wmi_event_log(uint32_t count,
2552 qdf_abstract_print *print,
2553 void *print_priv)
2554{
2555 t_wma_handle *wma = cds_get_context(QDF_MODULE_ID_WMA);
2556
Rachit Kankaneb1035622018-01-24 18:41:35 +05302557 if (wma) {
2558 print(print_priv, "Event Log (count %u)", count);
Dustin Brown8d2d0f52017-04-03 17:02:08 -07002559 wmi_print_event_log(wma->wmi_handle, count, print, print_priv);
Rachit Kankaneb1035622018-01-24 18:41:35 +05302560 }
Dustin Brown8d2d0f52017-04-03 17:02:08 -07002561}
2562
2563static inline void wma_print_wmi_rx_event_log(uint32_t count,
2564 qdf_abstract_print *print,
2565 void *print_priv)
2566{
2567 t_wma_handle *wma = cds_get_context(QDF_MODULE_ID_WMA);
2568
Rachit Kankaneb1035622018-01-24 18:41:35 +05302569 if (wma) {
2570 print(print_priv, "Rx Event Log (count %u)", count);
Dustin Brown8d2d0f52017-04-03 17:02:08 -07002571 wmi_print_rx_event_log(wma->wmi_handle, count, print,
2572 print_priv);
Rachit Kankaneb1035622018-01-24 18:41:35 +05302573 }
Dustin Brown8d2d0f52017-04-03 17:02:08 -07002574}
2575
2576static inline void wma_print_wmi_mgmt_event_log(uint32_t count,
2577 qdf_abstract_print *print,
2578 void *print_priv)
2579{
2580 t_wma_handle *wma = cds_get_context(QDF_MODULE_ID_WMA);
2581
Rachit Kankaneb1035622018-01-24 18:41:35 +05302582 if (wma) {
2583 print(print_priv, "Management Event Log (count %u)", count);
Dustin Brown8d2d0f52017-04-03 17:02:08 -07002584 wmi_print_mgmt_event_log(wma->wmi_handle, count, print,
2585 print_priv);
Rachit Kankaneb1035622018-01-24 18:41:35 +05302586 }
2587}
2588#else
2589
2590static inline void wma_print_wmi_cmd_log(uint32_t count,
2591 qdf_abstract_print *print,
2592 void *print_priv)
2593{
2594}
2595
2596static inline void wma_print_wmi_cmd_tx_cmp_log(uint32_t count,
2597 qdf_abstract_print *print,
2598 void *print_priv)
2599{
2600}
2601
2602static inline void wma_print_wmi_mgmt_cmd_log(uint32_t count,
2603 qdf_abstract_print *print,
2604 void *print_priv)
2605{
2606}
2607
2608static inline void wma_print_wmi_mgmt_cmd_tx_cmp_log(uint32_t count,
2609 qdf_abstract_print *print,
2610 void *print_priv)
2611{
2612}
2613
2614static inline void wma_print_wmi_event_log(uint32_t count,
2615 qdf_abstract_print *print,
2616 void *print_priv)
2617{
2618}
2619
2620static inline void wma_print_wmi_rx_event_log(uint32_t count,
2621 qdf_abstract_print *print,
2622 void *print_priv)
2623{
2624}
2625
2626static inline void wma_print_wmi_mgmt_event_log(uint32_t count,
2627 qdf_abstract_print *print,
2628 void *print_priv)
2629{
Dustin Brown8d2d0f52017-04-03 17:02:08 -07002630}
2631#endif /* WMI_INTERFACE_EVENT_LOGGING */
2632
Sandeep Puligillaf587adf2017-04-27 19:53:21 -07002633/**
2634 * wma_ipa_uc_stat_request() - set ipa config parameters
2635 * @privcmd: private command
2636 *
2637 * Return: None
2638 */
2639void wma_ipa_uc_stat_request(wma_cli_set_cmd_t *privcmd);
2640
lifeng66831662017-05-19 16:01:35 +08002641/**
2642 * wma_set_rx_reorder_timeout_val() - set rx recorder timeout value
2643 * @wma_handle: pointer to wma handle
2644 * @reorder_timeout: rx reorder timeout value
2645 *
2646 * Return: VOS_STATUS_SUCCESS for success or error code.
2647 */
2648QDF_STATUS wma_set_rx_reorder_timeout_val(tp_wma_handle wma_handle,
2649 struct sir_set_rx_reorder_timeout_val *reorder_timeout);
2650
2651/**
2652 * wma_set_rx_blocksize() - set rx blocksize
2653 * @wma_handle: pointer to wma handle
2654 * @peer_rx_blocksize: rx blocksize for peer mac
2655 *
2656 * Return: QDF_STATUS_SUCCESS for success or error code.
2657 */
2658QDF_STATUS wma_set_rx_blocksize(tp_wma_handle wma_handle,
2659 struct sir_peer_set_rx_blocksize *peer_rx_blocksize);
Ashish Kumar Dhanotiyab28338c2017-07-21 20:12:34 +05302660/**
2661 * wma_configure_smps_params() - Configures the smps parameters to set
2662 * @vdev_id: Virtual device for the command
2663 * @param_id: SMPS parameter ID
2664 * @param_val: Value to be set for the parameter
2665 * Return: QDF_STATUS_SUCCESS or non-zero on failure
2666 */
2667QDF_STATUS wma_configure_smps_params(uint32_t vdev_id, uint32_t param_id,
2668 uint32_t param_val);
lifeng66831662017-05-19 16:01:35 +08002669
Ravi Kumar Bokka05c14e52017-03-27 14:48:23 +05302670/*
2671 * wma_chip_power_save_failure_detected_handler() - chip pwr save fail detected
2672 * event handler
2673 * @handle: wma handle
2674 * @cmd_param_info: event handler data
2675 * @len: length of @cmd_param_info
2676 *
2677 * Return: QDF_STATUS_SUCCESS on success; error code otherwise
2678 */
2679int wma_chip_power_save_failure_detected_handler(void *handle,
2680 uint8_t *cmd_param_info,
2681 uint32_t len);
lifengd217d192017-05-09 19:44:16 +08002682
2683/**
2684 * wma_get_chain_rssi() - send wmi cmd to get chain rssi
2685 * @wma_handle: wma handler
2686 * @req_params: requset params
2687 *
2688 * Return: Return QDF_STATUS
2689 */
2690QDF_STATUS wma_get_chain_rssi(tp_wma_handle wma_handle,
2691 struct get_chain_rssi_req_params *req_params);
2692
Nachiket Kukadeaaf8a712017-07-27 19:15:36 +05302693/**
2694 * wma_config_bmiss_bcnt_params() - set bmiss config parameters
2695 * @vdev_id: virtual device for the command
2696 * @first_cnt: bmiss first value
2697 * @final_cnt: bmiss final value
2698 *
2699 * Return: QDF_STATUS_SUCCESS or non-zero on failure
2700 */
2701QDF_STATUS wma_config_bmiss_bcnt_params(uint32_t vdev_id, uint32_t first_cnt,
2702 uint32_t final_cnt);
2703
Naveen Rawatd7734142017-10-27 10:02:40 -07002704/**
2705 * wma_check_and_set_wake_timer(): checks all interfaces and if any interface
2706 * has install_key pending, sets timer pattern in fw to wake up host after
2707 * specified time has elapsed.
2708 * @time: time after which host wants to be awaken.
2709 *
2710 * Return: None
2711 */
2712void wma_check_and_set_wake_timer(uint32_t time);
Min Liu22202b72018-02-12 14:01:24 +08002713
2714/**
2715 * wma_vdev_wait_for_peer_delete_completion() - wait for all peers of the vdev
2716 * to be deleted.
2717 * @wma_handle: wma handle
2718 * @vdev_id: vdev id
2719 *
2720 * Return: None
2721 */
2722void wma_vdev_wait_for_peer_delete_completion(tp_wma_handle wma_handle,
2723 uint8_t vdev_id);
2724
Himanshu Agarwal2fdf77a2016-12-29 11:41:00 +05302725#endif