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Yi Konga44c4d72014-06-27 21:25:42 +00001/*===---- arm_acle.h - ARM Non-Neon intrinsics -----------------------------===
2 *
3 * Permission is hereby granted, free of charge, to any person obtaining a copy
4 * of this software and associated documentation files (the "Software"), to deal
5 * in the Software without restriction, including without limitation the rights
6 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
7 * copies of the Software, and to permit persons to whom the Software is
8 * furnished to do so, subject to the following conditions:
9 *
10 * The above copyright notice and this permission notice shall be included in
11 * all copies or substantial portions of the Software.
12 *
13 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
14 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
15 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
16 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
17 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
18 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
19 * THE SOFTWARE.
20 *
21 *===-----------------------------------------------------------------------===
22 */
23
24#ifndef __ARM_ACLE_H
25#define __ARM_ACLE_H
26
27#ifndef __ARM_ACLE
28#error "ACLE intrinsics support not enabled."
29#endif
30
31#include <stdint.h>
32
Saleem Abdulrasool60df0612014-07-08 05:46:00 +000033#if defined(__cplusplus)
34extern "C" {
35#endif
Yi Kong28d7b022014-07-17 12:45:17 +000036
Yi Kong472e5212014-07-14 15:32:29 +000037/* 8 SYNCHRONIZATION, BARRIER AND HINT INTRINSICS */
Yi Kong28d7b022014-07-17 12:45:17 +000038/* 8.3 Memory barriers */
39#if !defined(_MSC_VER)
40#define __dmb(i) __builtin_arm_dmb(i)
41#define __dsb(i) __builtin_arm_dsb(i)
42#define __isb(i) __builtin_arm_isb(i)
43#endif
44
Yi Kong472e5212014-07-14 15:32:29 +000045/* 8.4 Hints */
Saleem Abdulrasool07257fe2014-07-12 23:27:26 +000046
47#if !defined(_MSC_VER)
48static __inline__ void __attribute__((always_inline, nodebug)) __wfi(void) {
49 __builtin_arm_wfi();
50}
51
52static __inline__ void __attribute__((always_inline, nodebug)) __wfe(void) {
53 __builtin_arm_wfe();
54}
55
56static __inline__ void __attribute__((always_inline, nodebug)) __sev(void) {
57 __builtin_arm_sev();
58}
59
60static __inline__ void __attribute__((always_inline, nodebug)) __sevl(void) {
61 __builtin_arm_sevl();
62}
63
64static __inline__ void __attribute__((always_inline, nodebug)) __yield(void) {
65 __builtin_arm_yield();
66}
67#endif
68
Yi Kong0705e002014-08-26 09:50:54 +000069/* 8.5 Swap */
70static __inline__ uint32_t __attribute__((always_inline, nodebug))
71 __swp(uint32_t x, volatile uint32_t *p) {
72 uint32_t v;
73 do v = __builtin_arm_ldrex(p); while (__builtin_arm_strex(x, p));
74 return v;
75}
76
Yi Kong45a09312014-08-13 23:20:15 +000077/* 8.6 Memory prefetch intrinsics */
78/* 8.6.1 Data prefetch */
79#define __pld(addr) __pldx(0, 0, 0, addr)
80
81#if __ARM_32BIT_STATE
82#define __pldx(access_kind, cache_level, retention_policy, addr) \
83 __builtin_arm_prefetch(addr, access_kind, 1)
84#else
85#define __pldx(access_kind, cache_level, retention_policy, addr) \
86 __builtin_arm_prefetch(addr, access_kind, cache_level, retention_policy, 1)
87#endif
88
89/* 8.6.2 Instruction prefetch */
90#define __pli(addr) __plix(0, 0, addr)
91
92#if __ARM_32BIT_STATE
93#define __plix(cache_level, retention_policy, addr) \
94 __builtin_arm_prefetch(addr, 0, 0)
95#else
96#define __plix(cache_level, retention_policy, addr) \
97 __builtin_arm_prefetch(addr, 0, cache_level, retention_policy, 0)
98#endif
99
Yi Kong472e5212014-07-14 15:32:29 +0000100/* 8.7 NOP */
101static __inline__ void __attribute__((always_inline, nodebug)) __nop(void) {
102 __builtin_arm_nop();
103}
104
Yi Kong4e00ce72014-07-12 22:48:13 +0000105/* 9 DATA-PROCESSING INTRINSICS */
106/* 9.2 Miscellaneous data-processing intrinsics */
Yi Konga44c4d72014-06-27 21:25:42 +0000107static __inline__ uint32_t __attribute__((always_inline, nodebug))
108 __clz(uint32_t t) {
109 return __builtin_clz(t);
110}
111
112static __inline__ unsigned long __attribute__((always_inline, nodebug))
113 __clzl(unsigned long t) {
114 return __builtin_clzl(t);
115}
116
117static __inline__ uint64_t __attribute__((always_inline, nodebug))
118 __clzll(uint64_t t) {
Yi Konga44c4d72014-06-27 21:25:42 +0000119 return __builtin_clzll(t);
Yi Konga44c4d72014-06-27 21:25:42 +0000120}
121
122static __inline__ uint32_t __attribute__((always_inline, nodebug))
123 __rev(uint32_t t) {
124 return __builtin_bswap32(t);
125}
126
127static __inline__ unsigned long __attribute__((always_inline, nodebug))
128 __revl(unsigned long t) {
129#if __SIZEOF_LONG__ == 4
130 return __builtin_bswap32(t);
131#else
132 return __builtin_bswap64(t);
133#endif
134}
135
136static __inline__ uint64_t __attribute__((always_inline, nodebug))
137 __revll(uint64_t t) {
138 return __builtin_bswap64(t);
139}
140
Yi Konga44c4d72014-06-27 21:25:42 +0000141/*
Yi Kong4e00ce72014-07-12 22:48:13 +0000142 * 9.4 Saturating intrinsics
Yi Konga44c4d72014-06-27 21:25:42 +0000143 *
144 * FIXME: Change guard to their corrosponding __ARM_FEATURE flag when Q flag
145 * intrinsics are implemented and the flag is enabled.
146 */
Yi Kong4e00ce72014-07-12 22:48:13 +0000147/* 9.4.1 Width-specified saturation intrinsics */
Yi Konga44c4d72014-06-27 21:25:42 +0000148#if __ARM_32BIT_STATE
149#define __ssat(x, y) __builtin_arm_ssat(x, y)
150#define __usat(x, y) __builtin_arm_usat(x, y)
Yi Kong4e00ce72014-07-12 22:48:13 +0000151#endif
Yi Konga44c4d72014-06-27 21:25:42 +0000152
Yi Kong4e00ce72014-07-12 22:48:13 +0000153/* 9.4.2 Saturating addition and subtraction intrinsics */
154#if __ARM_32BIT_STATE
Yi Konga44c4d72014-06-27 21:25:42 +0000155static __inline__ int32_t __attribute__((always_inline, nodebug))
156 __qadd(int32_t t, int32_t v) {
157 return __builtin_arm_qadd(t, v);
158}
159
160static __inline__ int32_t __attribute__((always_inline, nodebug))
161 __qsub(int32_t t, int32_t v) {
162 return __builtin_arm_qsub(t, v);
163}
Renato Golin47843ef2014-07-03 10:14:52 +0000164
165static __inline__ int32_t __attribute__((always_inline, nodebug))
166__qdbl(int32_t t) {
167 return __builtin_arm_qadd(t, t);
168}
Yi Konga44c4d72014-06-27 21:25:42 +0000169#endif
170
Yi Kong4e00ce72014-07-12 22:48:13 +0000171/* 9.7 CRC32 intrinsics */
Yi Konga44c4d72014-06-27 21:25:42 +0000172#if __ARM_FEATURE_CRC32
173static __inline__ uint32_t __attribute__((always_inline, nodebug))
174 __crc32b(uint32_t a, uint8_t b) {
175 return __builtin_arm_crc32b(a, b);
176}
177
178static __inline__ uint32_t __attribute__((always_inline, nodebug))
179 __crc32h(uint32_t a, uint16_t b) {
180 return __builtin_arm_crc32h(a, b);
181}
182
183static __inline__ uint32_t __attribute__((always_inline, nodebug))
184 __crc32w(uint32_t a, uint32_t b) {
185 return __builtin_arm_crc32w(a, b);
186}
187
188static __inline__ uint32_t __attribute__((always_inline, nodebug))
189 __crc32d(uint32_t a, uint64_t b) {
190 return __builtin_arm_crc32d(a, b);
191}
192
193static __inline__ uint32_t __attribute__((always_inline, nodebug))
194 __crc32cb(uint32_t a, uint8_t b) {
195 return __builtin_arm_crc32cb(a, b);
196}
197
198static __inline__ uint32_t __attribute__((always_inline, nodebug))
199 __crc32ch(uint32_t a, uint16_t b) {
200 return __builtin_arm_crc32ch(a, b);
201}
202
203static __inline__ uint32_t __attribute__((always_inline, nodebug))
204 __crc32cw(uint32_t a, uint32_t b) {
205 return __builtin_arm_crc32cw(a, b);
206}
207
208static __inline__ uint32_t __attribute__((always_inline, nodebug))
209 __crc32cd(uint32_t a, uint64_t b) {
210 return __builtin_arm_crc32cd(a, b);
211}
212#endif
213
Saleem Abdulrasool60df0612014-07-08 05:46:00 +0000214#if defined(__cplusplus)
215}
216#endif
217
Yi Konga44c4d72014-06-27 21:25:42 +0000218#endif /* __ARM_ACLE_H */