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Dan Gohmana3624b62009-11-23 17:16:22 +00001//===-- FunctionLoweringInfo.cpp ------------------------------------------===//
2//
3// The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This implements routines for translating functions from LLVM IR into
11// Machine IR.
12//
13//===----------------------------------------------------------------------===//
14
Dan Gohmane7846162010-07-07 16:01:37 +000015#include "llvm/CodeGen/FunctionLoweringInfo.h"
Chandler Carruthed0881b2012-12-03 16:50:05 +000016#include "llvm/ADT/PostOrderIterator.h"
17#include "llvm/CodeGen/Analysis.h"
18#include "llvm/CodeGen/MachineFrameInfo.h"
19#include "llvm/CodeGen/MachineFunction.h"
20#include "llvm/CodeGen/MachineInstrBuilder.h"
21#include "llvm/CodeGen/MachineModuleInfo.h"
22#include "llvm/CodeGen/MachineRegisterInfo.h"
David Majnemercde33032015-03-30 22:58:10 +000023#include "llvm/CodeGen/WinEHFuncInfo.h"
Chandler Carruth9fb823b2013-01-02 11:36:10 +000024#include "llvm/IR/DataLayout.h"
Chandler Carruth9a4c9e52014-03-06 00:46:21 +000025#include "llvm/IR/DebugInfo.h"
Chandler Carruth9fb823b2013-01-02 11:36:10 +000026#include "llvm/IR/DerivedTypes.h"
27#include "llvm/IR/Function.h"
28#include "llvm/IR/Instructions.h"
29#include "llvm/IR/IntrinsicInst.h"
30#include "llvm/IR/LLVMContext.h"
31#include "llvm/IR/Module.h"
Dan Gohmana3624b62009-11-23 17:16:22 +000032#include "llvm/Support/Debug.h"
33#include "llvm/Support/ErrorHandling.h"
34#include "llvm/Support/MathExtras.h"
Benjamin Kramer799003b2015-03-23 19:32:43 +000035#include "llvm/Support/raw_ostream.h"
Hans Wennborgacb842d2014-03-05 02:43:26 +000036#include "llvm/Target/TargetFrameLowering.h"
Chandler Carruth92051402014-03-05 10:30:38 +000037#include "llvm/Target/TargetInstrInfo.h"
Chandler Carruthed0881b2012-12-03 16:50:05 +000038#include "llvm/Target/TargetLowering.h"
39#include "llvm/Target/TargetOptions.h"
40#include "llvm/Target/TargetRegisterInfo.h"
Eric Christopherd9134482014-08-04 21:25:23 +000041#include "llvm/Target/TargetSubtargetInfo.h"
Dan Gohmana3624b62009-11-23 17:16:22 +000042#include <algorithm>
43using namespace llvm;
44
Chandler Carruth1b9dde02014-04-22 02:02:50 +000045#define DEBUG_TYPE "function-lowering-info"
46
Dan Gohmana3624b62009-11-23 17:16:22 +000047/// isUsedOutsideOfDefiningBlock - Return true if this instruction is used by
48/// PHI nodes or outside of the basic block that defines it, or used by a
49/// switch or atomic instruction, which may expand to multiple basic blocks.
Dan Gohman913c9982010-04-15 04:33:49 +000050static bool isUsedOutsideOfDefiningBlock(const Instruction *I) {
Dan Gohman7c845e42010-04-20 14:50:13 +000051 if (I->use_empty()) return false;
Dan Gohmana3624b62009-11-23 17:16:22 +000052 if (isa<PHINode>(I)) return true;
Dan Gohman913c9982010-04-15 04:33:49 +000053 const BasicBlock *BB = I->getParent();
Chandler Carruthcdf47882014-03-09 03:16:01 +000054 for (const User *U : I->users())
Gabor Greif52617fc2010-07-09 16:08:33 +000055 if (cast<Instruction>(U)->getParent() != BB || isa<PHINode>(U))
Dan Gohmana3624b62009-11-23 17:16:22 +000056 return true;
Chandler Carruthcdf47882014-03-09 03:16:01 +000057
Dan Gohmana3624b62009-11-23 17:16:22 +000058 return false;
59}
60
Jiangning Liuffbc6902014-09-19 05:30:35 +000061static ISD::NodeType getPreferredExtendForValue(const Value *V) {
62 // For the users of the source value being used for compare instruction, if
63 // the number of signed predicate is greater than unsigned predicate, we
64 // prefer to use SIGN_EXTEND.
65 //
66 // With this optimization, we would be able to reduce some redundant sign or
67 // zero extension instruction, and eventually more machine CSE opportunities
68 // can be exposed.
69 ISD::NodeType ExtendKind = ISD::ANY_EXTEND;
70 unsigned NumOfSigned = 0, NumOfUnsigned = 0;
71 for (const User *U : V->users()) {
72 if (const auto *CI = dyn_cast<CmpInst>(U)) {
73 NumOfSigned += CI->isSigned();
74 NumOfUnsigned += CI->isUnsigned();
75 }
76 }
77 if (NumOfSigned > NumOfUnsigned)
78 ExtendKind = ISD::SIGN_EXTEND;
79
80 return ExtendKind;
81}
82
Hans Wennborgacb842d2014-03-05 02:43:26 +000083void FunctionLoweringInfo::set(const Function &fn, MachineFunction &mf,
84 SelectionDAG *DAG) {
Dan Gohmana3624b62009-11-23 17:16:22 +000085 Fn = &fn;
86 MF = &mf;
Eric Christopher2ae2de72014-10-09 00:57:31 +000087 TLI = MF->getSubtarget().getTargetLowering();
Dan Gohmana3624b62009-11-23 17:16:22 +000088 RegInfo = &MF->getRegInfo();
David Majnemercde33032015-03-30 22:58:10 +000089 MachineModuleInfo &MMI = MF->getMMI();
Jonas Paulssonf12b9252015-11-28 11:02:32 +000090 const TargetFrameLowering *TFI = MF->getSubtarget().getFrameLowering();
Dan Gohmana3624b62009-11-23 17:16:22 +000091
Dan Gohmand7b5ce32010-07-10 09:00:22 +000092 // Check whether the function can return without sret-demotion.
93 SmallVector<ISD::OutputArg, 4> Outs;
Mehdi Amini56228da2015-07-09 01:57:34 +000094 GetReturnInfo(Fn->getReturnType(), Fn->getAttributes(), Outs, *TLI,
95 mf.getDataLayout());
Bill Wendling8db01cb2013-06-06 00:11:39 +000096 CanLowerReturn = TLI->CanLowerReturn(Fn->getCallingConv(), *MF,
Eric Christopher2ae2de72014-10-09 00:57:31 +000097 Fn->isVarArg(), Outs, Fn->getContext());
Dan Gohmand7b5ce32010-07-10 09:00:22 +000098
Dan Gohmana3624b62009-11-23 17:16:22 +000099 // Initialize the mapping of values to registers. This is only set up for
100 // instruction values that are used outside of the block that defines
101 // them.
Dan Gohman913c9982010-04-15 04:33:49 +0000102 Function::const_iterator BB = Fn->begin(), EB = Fn->end();
Dan Gohmana3624b62009-11-23 17:16:22 +0000103 for (; BB != EB; ++BB)
Eric Christopher219d51d2012-02-24 01:59:01 +0000104 for (BasicBlock::const_iterator I = BB->begin(), E = BB->end();
105 I != E; ++I) {
Hans Wennborgacb842d2014-03-05 02:43:26 +0000106 if (const AllocaInst *AI = dyn_cast<AllocaInst>(I)) {
Jonas Paulssonf12b9252015-11-28 11:02:32 +0000107 Type *Ty = AI->getAllocatedType();
108 unsigned Align =
109 std::max((unsigned)MF->getDataLayout().getPrefTypeAlignment(Ty),
110 AI->getAlignment());
111 unsigned StackAlign = TFI->getStackAlignment();
112
113 // Static allocas can be folded into the initial stack frame
114 // adjustment. For targets that don't realign the stack, don't
115 // do this if there is an extra alignment requirement.
116 if (AI->isStaticAlloca() &&
117 (TFI->isStackRealignable() || (Align <= StackAlign))) {
Reid Kleckner0b2bccc2014-09-02 18:42:44 +0000118 const ConstantInt *CUI = cast<ConstantInt>(AI->getArraySize());
Mehdi Amini8ac7a9d2015-07-07 19:07:19 +0000119 uint64_t TySize = MF->getDataLayout().getTypeAllocSize(Ty);
Reid Kleckner0b2bccc2014-09-02 18:42:44 +0000120
121 TySize *= CUI->getZExtValue(); // Get total allocated size.
122 if (TySize == 0) TySize = 1; // Don't create zero-sized stack objects.
123
124 StaticAllocaMap[AI] =
125 MF->getFrameInfo()->CreateStackObject(TySize, Align, false, AI);
Reid Kleckner0b2bccc2014-09-02 18:42:44 +0000126 } else {
Jonas Paulssonf12b9252015-11-28 11:02:32 +0000127 // FIXME: Overaligned static allocas should be grouped into
128 // a single dynamic allocation instead of using a separate
129 // stack allocation for each one.
Hans Wennborgacb842d2014-03-05 02:43:26 +0000130 if (Align <= StackAlign)
131 Align = 0;
132 // Inform the Frame Information that we have variable-sized objects.
133 MF->getFrameInfo()->CreateVariableSizedObject(Align ? Align : 1, AI);
134 }
135 }
136
137 // Look for inline asm that clobbers the SP register.
138 if (isa<CallInst>(I) || isa<InvokeInst>(I)) {
Duncan P. N. Exon Smithe400a7d2015-10-13 19:47:46 +0000139 ImmutableCallSite CS(&*I);
Hans Wennborg0c72fd22014-03-05 03:21:23 +0000140 if (isa<InlineAsm>(CS.getCalledValue())) {
Hans Wennborgacb842d2014-03-05 02:43:26 +0000141 unsigned SP = TLI->getStackPointerRegisterToSaveRestore();
Eric Christopher11e4df72015-02-26 22:38:43 +0000142 const TargetRegisterInfo *TRI = MF->getSubtarget().getRegisterInfo();
Hans Wennborgacb842d2014-03-05 02:43:26 +0000143 std::vector<TargetLowering::AsmOperandInfo> Ops =
Mehdi Amini8ac7a9d2015-07-07 19:07:19 +0000144 TLI->ParseConstraints(Fn->getParent()->getDataLayout(), TRI, CS);
Hans Wennborgacb842d2014-03-05 02:43:26 +0000145 for (size_t I = 0, E = Ops.size(); I != E; ++I) {
146 TargetLowering::AsmOperandInfo &Op = Ops[I];
147 if (Op.Type == InlineAsm::isClobber) {
148 // Clobbers don't have SDValue operands, hence SDValue().
149 TLI->ComputeConstraintToUse(Op, SDValue(), DAG);
Eric Christopher2ae2de72014-10-09 00:57:31 +0000150 std::pair<unsigned, const TargetRegisterClass *> PhysReg =
Eric Christopher11e4df72015-02-26 22:38:43 +0000151 TLI->getRegForInlineAsmConstraint(TRI, Op.ConstraintCode,
152 Op.ConstraintVT);
Hans Wennborgacb842d2014-03-05 02:43:26 +0000153 if (PhysReg.first == SP)
Reid Klecknere69bdb82015-07-07 23:45:58 +0000154 MF->getFrameInfo()->setHasOpaqueSPAdjustment(true);
Hans Wennborgacb842d2014-03-05 02:43:26 +0000155 }
156 }
157 }
158 }
159
Reid Kleckner2d9bb652014-08-22 21:59:26 +0000160 // Look for calls to the @llvm.va_start intrinsic. We can omit some
161 // prologue boilerplate for variadic functions that don't examine their
162 // arguments.
163 if (const auto *II = dyn_cast<IntrinsicInst>(I)) {
164 if (II->getIntrinsicID() == Intrinsic::vastart)
165 MF->getFrameInfo()->setHasVAStart(true);
166 }
167
Eric Christopherbfba5722015-12-16 23:10:53 +0000168 // If we have a musttail call in a variadic function, we need to ensure we
Reid Kleckner16e55412014-08-29 21:42:08 +0000169 // forward implicit register parameters.
Reid Klecknerdccd0cb2014-08-29 21:42:21 +0000170 if (const auto *CI = dyn_cast<CallInst>(I)) {
Reid Kleckner16e55412014-08-29 21:42:08 +0000171 if (CI->isMustTailCall() && Fn->isVarArg())
172 MF->getFrameInfo()->setHasMustTailInVarArgFunc(true);
173 }
174
Dan Gohman1e9362772010-07-16 17:54:27 +0000175 // Mark values used outside their block as exported, by allocating
176 // a virtual register for them.
Duncan P. N. Exon Smithe400a7d2015-10-13 19:47:46 +0000177 if (isUsedOutsideOfDefiningBlock(&*I))
178 if (!isa<AllocaInst>(I) || !StaticAllocaMap.count(cast<AllocaInst>(I)))
179 InitializeRegForValue(&*I);
Dan Gohmana3624b62009-11-23 17:16:22 +0000180
Dan Gohman1e9362772010-07-16 17:54:27 +0000181 // Collect llvm.dbg.declare information. This is done now instead of
182 // during the initial isel pass through the IR so that it is done
183 // in a predictable order.
184 if (const DbgDeclareInst *DI = dyn_cast<DbgDeclareInst>(I)) {
Duncan P. N. Exon Smithd4a19a32015-04-21 18:24:23 +0000185 assert(DI->getVariable() && "Missing variable");
186 assert(DI->getDebugLoc() && "Missing location");
187 if (MMI.hasDebugInfo()) {
Dan Gohman1e9362772010-07-16 17:54:27 +0000188 // Don't handle byval struct arguments or VLAs, for example.
189 // Non-byval arguments are handled here (they refer to the stack
190 // temporary alloca at this point).
191 const Value *Address = DI->getAddress();
192 if (Address) {
193 if (const BitCastInst *BCI = dyn_cast<BitCastInst>(Address))
194 Address = BCI->getOperand(0);
195 if (const AllocaInst *AI = dyn_cast<AllocaInst>(Address)) {
196 DenseMap<const AllocaInst *, int>::iterator SI =
197 StaticAllocaMap.find(AI);
198 if (SI != StaticAllocaMap.end()) { // Check for VLAs.
199 int FI = SI->second;
Adrian Prantl87b7eb92014-10-01 18:55:02 +0000200 MMI.setVariableDbgInfo(DI->getVariable(), DI->getExpression(),
Dan Gohman1e9362772010-07-16 17:54:27 +0000201 FI, DI->getDebugLoc());
202 }
203 }
204 }
205 }
206 }
Jiangning Liuffbc6902014-09-19 05:30:35 +0000207
208 // Decide the preferred extend type for a value.
Duncan P. N. Exon Smithe400a7d2015-10-13 19:47:46 +0000209 PreferredExtendType[&*I] = getPreferredExtendForValue(&*I);
Dan Gohman1e9362772010-07-16 17:54:27 +0000210 }
211
Dan Gohmana3624b62009-11-23 17:16:22 +0000212 // Create an initial MachineBasicBlock for each LLVM BasicBlock in F. This
213 // also creates the initial PHI MachineInstrs, though none of the input
214 // operands are populated.
Dan Gohmanf57117d2010-04-14 16:30:40 +0000215 for (BB = Fn->begin(); BB != EB; ++BB) {
Reid Kleckner51189f0a2015-09-08 23:28:38 +0000216 // Don't create MachineBasicBlocks for imaginary EH pad blocks. These blocks
217 // are really data, and no instructions can live here.
218 if (BB->isEHPad()) {
219 const Instruction *I = BB->getFirstNonPHI();
Reid Kleckner6ddae312015-11-05 21:09:49 +0000220 // If this is a non-landingpad EH pad, mark this function as using
David Majnemer7735a6d2015-10-06 23:31:59 +0000221 // funclets.
Reid Kleckner6ddae312015-11-05 21:09:49 +0000222 // FIXME: SEH catchpads do not create funclets, so we could avoid setting
223 // this in such cases in order to improve frame layout.
224 if (!isa<LandingPadInst>(I)) {
Reid Kleckner51189f0a2015-09-08 23:28:38 +0000225 MMI.setHasEHFunclets(true);
Reid Kleckner6ddae312015-11-05 21:09:49 +0000226 MF->getFrameInfo()->setHasOpaqueSPAdjustment(true);
227 }
David Majnemer8a1c45d2015-12-12 05:38:55 +0000228 if (isa<CatchSwitchInst>(I)) {
Reid Kleckner51189f0a2015-09-08 23:28:38 +0000229 assert(&*BB->begin() == I &&
230 "WinEHPrepare failed to remove PHIs from imaginary BBs");
231 continue;
Reid Kleckner51189f0a2015-09-08 23:28:38 +0000232 }
David Majnemer8a1c45d2015-12-12 05:38:55 +0000233 if (isa<FuncletPadInst>(I))
David Majnemer7735a6d2015-10-06 23:31:59 +0000234 assert(&*BB->begin() == I && "WinEHPrepare failed to demote PHIs");
Reid Kleckner51189f0a2015-09-08 23:28:38 +0000235 }
236
Duncan P. N. Exon Smithe400a7d2015-10-13 19:47:46 +0000237 MachineBasicBlock *MBB = mf.CreateMachineBasicBlock(&*BB);
238 MBBMap[&*BB] = MBB;
Dan Gohmana3624b62009-11-23 17:16:22 +0000239 MF->push_back(MBB);
240
241 // Transfer the address-taken flag. This is necessary because there could
242 // be multiple MachineBasicBlocks corresponding to one BasicBlock, and only
243 // the first one should be marked.
244 if (BB->hasAddressTaken())
245 MBB->setHasAddressTaken();
246
247 // Create Machine PHI nodes for LLVM PHI nodes, lowering them as
248 // appropriate.
Dan Gohman0f055d32010-04-20 14:46:25 +0000249 for (BasicBlock::const_iterator I = BB->begin();
250 const PHINode *PN = dyn_cast<PHINode>(I); ++I) {
251 if (PN->use_empty()) continue;
Dan Gohmana3624b62009-11-23 17:16:22 +0000252
Rafael Espindolae53b7d12011-05-13 15:18:06 +0000253 // Skip empty types
254 if (PN->getType()->isEmptyTy())
255 continue;
256
Dan Gohman7b7f0882010-04-20 14:48:02 +0000257 DebugLoc DL = PN->getDebugLoc();
Dan Gohmana3624b62009-11-23 17:16:22 +0000258 unsigned PHIReg = ValueMap[PN];
259 assert(PHIReg && "PHI node does not have an assigned virtual register!");
260
261 SmallVector<EVT, 4> ValueVTs;
Mehdi Amini56228da2015-07-09 01:57:34 +0000262 ComputeValueVTs(*TLI, MF->getDataLayout(), PN->getType(), ValueVTs);
Dan Gohmana3624b62009-11-23 17:16:22 +0000263 for (unsigned vti = 0, vte = ValueVTs.size(); vti != vte; ++vti) {
264 EVT VT = ValueVTs[vti];
Bill Wendling8db01cb2013-06-06 00:11:39 +0000265 unsigned NumRegisters = TLI->getNumRegisters(Fn->getContext(), VT);
Eric Christopherfc6de422014-08-05 02:39:49 +0000266 const TargetInstrInfo *TII = MF->getSubtarget().getInstrInfo();
Dan Gohmana3624b62009-11-23 17:16:22 +0000267 for (unsigned i = 0; i != NumRegisters; ++i)
Chris Lattnerb06015a2010-02-09 19:54:29 +0000268 BuildMI(MBB, DL, TII->get(TargetOpcode::PHI), PHIReg + i);
Dan Gohmana3624b62009-11-23 17:16:22 +0000269 PHIReg += NumRegisters;
270 }
271 }
272 }
Dan Gohman69e8e322010-04-14 16:32:56 +0000273
274 // Mark landing pad blocks.
Reid Klecknercfbfe6f2015-04-24 20:25:05 +0000275 SmallVector<const LandingPadInst *, 4> LPads;
Reid Klecknerd2a1a512015-04-21 18:23:57 +0000276 for (BB = Fn->begin(); BB != EB; ++BB) {
Reid Kleckner0e288232015-08-27 23:27:47 +0000277 const Instruction *FNP = BB->getFirstNonPHI();
Duncan P. N. Exon Smithe400a7d2015-10-13 19:47:46 +0000278 if (BB->isEHPad() && MBBMap.count(&*BB))
279 MBBMap[&*BB]->setIsEHPad();
Reid Kleckner0e288232015-08-27 23:27:47 +0000280 if (const auto *LPI = dyn_cast<LandingPadInst>(FNP))
281 LPads.push_back(LPI);
Reid Klecknerd2a1a512015-04-21 18:23:57 +0000282 }
David Majnemercde33032015-03-30 22:58:10 +0000283
Joseph Tremoulet2afea542015-10-06 20:28:16 +0000284 // If this personality uses funclets, we need to do a bit more work.
Reid Kleckner0e288232015-08-27 23:27:47 +0000285 if (!Fn->hasPersonalityFn())
286 return;
287 EHPersonality Personality = classifyEHPersonality(Fn->getPersonalityFn());
Joseph Tremoulet2afea542015-10-06 20:28:16 +0000288 if (!isFuncletEHPersonality(Personality))
Reid Klecknercfbfe6f2015-04-24 20:25:05 +0000289 return;
290
Reid Kleckner94b704c2015-09-09 21:10:03 +0000291 // Calculate state numbers if we haven't already.
David Majnemer0e90f462016-01-07 04:31:35 +0000292 WinEHFuncInfo &EHInfo = *MF->getWinEHFuncInfo();
Reid Kleckner78783912015-09-10 00:25:23 +0000293 if (Personality == EHPersonality::MSVC_CXX)
David Majnemerbfa5b982015-10-10 00:04:29 +0000294 calculateWinCXXEHStateNumbers(&fn, EHInfo);
David Majnemerf828a0c2015-10-01 18:44:59 +0000295 else if (isAsynchronousEHPersonality(Personality))
David Majnemerbfa5b982015-10-10 00:04:29 +0000296 calculateSEHStateNumbers(&fn, EHInfo);
Joseph Tremoulet7f8c1162015-10-06 20:30:33 +0000297 else if (Personality == EHPersonality::CoreCLR)
David Majnemerbfa5b982015-10-10 00:04:29 +0000298 calculateClrEHStateNumbers(&fn, EHInfo);
Reid Kleckner78783912015-09-10 00:25:23 +0000299
300 // Map all BB references in the WinEH data to MBBs.
Reid Klecknerb005d282015-09-16 20:16:27 +0000301 for (WinEHTryBlockMapEntry &TBME : EHInfo.TryBlockMap) {
302 for (WinEHHandlerType &H : TBME.HandlerArray) {
David Majnemer99c1d132015-10-12 16:44:22 +0000303 if (H.CatchObj.Alloca) {
Reid Klecknerb005d282015-09-16 20:16:27 +0000304 assert(StaticAllocaMap.count(H.CatchObj.Alloca));
305 H.CatchObj.FrameIndex = StaticAllocaMap[H.CatchObj.Alloca];
306 } else {
307 H.CatchObj.FrameIndex = INT_MAX;
308 }
David Majnemerbfa5b982015-10-10 00:04:29 +0000309 if (H.Handler)
310 H.Handler = MBBMap[H.Handler.get<const BasicBlock *>()];
Reid Klecknerb005d282015-09-16 20:16:27 +0000311 }
312 }
Reid Kleckner14e77352015-10-09 23:34:53 +0000313 for (CxxUnwindMapEntry &UME : EHInfo.CxxUnwindMap)
Reid Kleckner78783912015-09-10 00:25:23 +0000314 if (UME.Cleanup)
David Majnemerbfa5b982015-10-10 00:04:29 +0000315 UME.Cleanup = MBBMap[UME.Cleanup.get<const BasicBlock *>()];
Reid Kleckner78783912015-09-10 00:25:23 +0000316 for (SEHUnwindMapEntry &UME : EHInfo.SEHUnwindMap) {
317 const BasicBlock *BB = UME.Handler.get<const BasicBlock *>();
318 UME.Handler = MBBMap[BB];
Reid Kleckner94b704c2015-09-09 21:10:03 +0000319 }
Joseph Tremoulet7f8c1162015-10-06 20:30:33 +0000320 for (ClrEHUnwindMapEntry &CME : EHInfo.ClrEHUnwindMap) {
321 const BasicBlock *BB = CME.Handler.get<const BasicBlock *>();
322 CME.Handler = MBBMap[BB];
323 }
David Majnemercde33032015-03-30 22:58:10 +0000324}
325
Dan Gohmana3624b62009-11-23 17:16:22 +0000326/// clear - Clear out all the function-specific state. This returns this
327/// FunctionLoweringInfo to an empty state, ready to be used for a
328/// different function.
329void FunctionLoweringInfo::clear() {
330 MBBMap.clear();
331 ValueMap.clear();
332 StaticAllocaMap.clear();
Dan Gohmana3624b62009-11-23 17:16:22 +0000333 LiveOutRegInfo.clear();
Cameron Zwarich988faf92011-02-24 10:00:13 +0000334 VisitedBBs.clear();
Evan Cheng6e822452010-04-28 23:08:54 +0000335 ArgDbgValues.clear();
Devang Patel86ec8b32010-08-31 22:22:42 +0000336 ByValArgFrameIndexMap.clear();
Dan Gohmand7b5ce32010-07-10 09:00:22 +0000337 RegFixups.clear();
Philip Reames1a1bdb22014-12-02 18:50:36 +0000338 StatepointStackSlots.clear();
Igor Laevsky423bc9ec2015-05-20 11:37:25 +0000339 StatepointRelocatedValues.clear();
Jiangning Liu3b096172014-09-24 03:22:56 +0000340 PreferredExtendType.clear();
Dan Gohmana3624b62009-11-23 17:16:22 +0000341}
342
Dan Gohman93f59202010-07-02 00:10:16 +0000343/// CreateReg - Allocate a single virtual register for the given type.
Patrik Hagglund5e6c3612012-12-13 06:34:11 +0000344unsigned FunctionLoweringInfo::CreateReg(MVT VT) {
Eric Christopherd9134482014-08-04 21:25:23 +0000345 return RegInfo->createVirtualRegister(
Eric Christopher2ae2de72014-10-09 00:57:31 +0000346 MF->getSubtarget().getTargetLowering()->getRegClassFor(VT));
Dan Gohmana3624b62009-11-23 17:16:22 +0000347}
348
Dan Gohman93f59202010-07-02 00:10:16 +0000349/// CreateRegs - Allocate the appropriate number of virtual registers of
Dan Gohmana3624b62009-11-23 17:16:22 +0000350/// the correctly promoted or expanded types. Assign these registers
351/// consecutive vreg numbers and return the first assigned number.
352///
353/// In the case that the given value has struct or array type, this function
354/// will assign registers for each member or element.
355///
Chris Lattner229907c2011-07-18 04:54:35 +0000356unsigned FunctionLoweringInfo::CreateRegs(Type *Ty) {
Eric Christopher2ae2de72014-10-09 00:57:31 +0000357 const TargetLowering *TLI = MF->getSubtarget().getTargetLowering();
Bill Wendling0ccf3102013-06-19 20:32:16 +0000358
Dan Gohmana3624b62009-11-23 17:16:22 +0000359 SmallVector<EVT, 4> ValueVTs;
Mehdi Amini56228da2015-07-09 01:57:34 +0000360 ComputeValueVTs(*TLI, MF->getDataLayout(), Ty, ValueVTs);
Dan Gohmana3624b62009-11-23 17:16:22 +0000361
362 unsigned FirstReg = 0;
363 for (unsigned Value = 0, e = ValueVTs.size(); Value != e; ++Value) {
364 EVT ValueVT = ValueVTs[Value];
Bill Wendling8db01cb2013-06-06 00:11:39 +0000365 MVT RegisterVT = TLI->getRegisterType(Ty->getContext(), ValueVT);
Dan Gohmana3624b62009-11-23 17:16:22 +0000366
Bill Wendling8db01cb2013-06-06 00:11:39 +0000367 unsigned NumRegs = TLI->getNumRegisters(Ty->getContext(), ValueVT);
Dan Gohmana3624b62009-11-23 17:16:22 +0000368 for (unsigned i = 0; i != NumRegs; ++i) {
Dan Gohman93f59202010-07-02 00:10:16 +0000369 unsigned R = CreateReg(RegisterVT);
Dan Gohmana3624b62009-11-23 17:16:22 +0000370 if (!FirstReg) FirstReg = R;
371 }
372 }
373 return FirstReg;
374}
Dan Gohmanad97b3d2009-11-23 17:42:46 +0000375
Cameron Zwaricha62fc892011-02-24 10:00:25 +0000376/// GetLiveOutRegInfo - Gets LiveOutInfo for a register, returning NULL if the
377/// register is a PHI destination and the PHI's LiveOutInfo is not valid. If
378/// the register's LiveOutInfo is for a smaller bit width, it is extended to
379/// the larger bit width by zero extension. The bit width must be no smaller
380/// than the LiveOutInfo's existing bit width.
381const FunctionLoweringInfo::LiveOutInfo *
382FunctionLoweringInfo::GetLiveOutRegInfo(unsigned Reg, unsigned BitWidth) {
383 if (!LiveOutRegInfo.inBounds(Reg))
Craig Topperc0196b12014-04-14 00:51:57 +0000384 return nullptr;
Cameron Zwaricha62fc892011-02-24 10:00:25 +0000385
386 LiveOutInfo *LOI = &LiveOutRegInfo[Reg];
387 if (!LOI->IsValid)
Craig Topperc0196b12014-04-14 00:51:57 +0000388 return nullptr;
Cameron Zwaricha62fc892011-02-24 10:00:25 +0000389
Cameron Zwarichd2f30412011-02-25 01:10:55 +0000390 if (BitWidth > LOI->KnownZero.getBitWidth()) {
Cameron Zwarich4c82cd22011-02-25 01:11:01 +0000391 LOI->NumSignBits = 1;
Cameron Zwaricha62fc892011-02-24 10:00:25 +0000392 LOI->KnownZero = LOI->KnownZero.zextOrTrunc(BitWidth);
393 LOI->KnownOne = LOI->KnownOne.zextOrTrunc(BitWidth);
394 }
395
396 return LOI;
397}
398
399/// ComputePHILiveOutRegInfo - Compute LiveOutInfo for a PHI's destination
400/// register based on the LiveOutInfo of its operands.
401void FunctionLoweringInfo::ComputePHILiveOutRegInfo(const PHINode *PN) {
Chris Lattner229907c2011-07-18 04:54:35 +0000402 Type *Ty = PN->getType();
Cameron Zwaricha62fc892011-02-24 10:00:25 +0000403 if (!Ty->isIntegerTy() || Ty->isVectorTy())
404 return;
405
406 SmallVector<EVT, 1> ValueVTs;
Mehdi Amini56228da2015-07-09 01:57:34 +0000407 ComputeValueVTs(*TLI, MF->getDataLayout(), Ty, ValueVTs);
Cameron Zwaricha62fc892011-02-24 10:00:25 +0000408 assert(ValueVTs.size() == 1 &&
409 "PHIs with non-vector integer types should have a single VT.");
410 EVT IntVT = ValueVTs[0];
411
Bill Wendling8db01cb2013-06-06 00:11:39 +0000412 if (TLI->getNumRegisters(PN->getContext(), IntVT) != 1)
Cameron Zwaricha62fc892011-02-24 10:00:25 +0000413 return;
Bill Wendling8db01cb2013-06-06 00:11:39 +0000414 IntVT = TLI->getTypeToTransformTo(PN->getContext(), IntVT);
Cameron Zwaricha62fc892011-02-24 10:00:25 +0000415 unsigned BitWidth = IntVT.getSizeInBits();
416
417 unsigned DestReg = ValueMap[PN];
418 if (!TargetRegisterInfo::isVirtualRegister(DestReg))
419 return;
420 LiveOutRegInfo.grow(DestReg);
421 LiveOutInfo &DestLOI = LiveOutRegInfo[DestReg];
422
423 Value *V = PN->getIncomingValue(0);
424 if (isa<UndefValue>(V) || isa<ConstantExpr>(V)) {
425 DestLOI.NumSignBits = 1;
426 APInt Zero(BitWidth, 0);
427 DestLOI.KnownZero = Zero;
428 DestLOI.KnownOne = Zero;
429 return;
430 }
431
432 if (ConstantInt *CI = dyn_cast<ConstantInt>(V)) {
433 APInt Val = CI->getValue().zextOrTrunc(BitWidth);
434 DestLOI.NumSignBits = Val.getNumSignBits();
435 DestLOI.KnownZero = ~Val;
436 DestLOI.KnownOne = Val;
437 } else {
438 assert(ValueMap.count(V) && "V should have been placed in ValueMap when its"
439 "CopyToReg node was created.");
440 unsigned SrcReg = ValueMap[V];
441 if (!TargetRegisterInfo::isVirtualRegister(SrcReg)) {
442 DestLOI.IsValid = false;
443 return;
444 }
445 const LiveOutInfo *SrcLOI = GetLiveOutRegInfo(SrcReg, BitWidth);
446 if (!SrcLOI) {
447 DestLOI.IsValid = false;
448 return;
449 }
450 DestLOI = *SrcLOI;
451 }
452
453 assert(DestLOI.KnownZero.getBitWidth() == BitWidth &&
454 DestLOI.KnownOne.getBitWidth() == BitWidth &&
455 "Masks should have the same bit width as the type.");
456
457 for (unsigned i = 1, e = PN->getNumIncomingValues(); i != e; ++i) {
458 Value *V = PN->getIncomingValue(i);
459 if (isa<UndefValue>(V) || isa<ConstantExpr>(V)) {
460 DestLOI.NumSignBits = 1;
461 APInt Zero(BitWidth, 0);
462 DestLOI.KnownZero = Zero;
463 DestLOI.KnownOne = Zero;
Eric Christopher0713a9d2011-06-08 23:55:35 +0000464 return;
Cameron Zwaricha62fc892011-02-24 10:00:25 +0000465 }
466
467 if (ConstantInt *CI = dyn_cast<ConstantInt>(V)) {
468 APInt Val = CI->getValue().zextOrTrunc(BitWidth);
469 DestLOI.NumSignBits = std::min(DestLOI.NumSignBits, Val.getNumSignBits());
470 DestLOI.KnownZero &= ~Val;
471 DestLOI.KnownOne &= Val;
472 continue;
473 }
474
475 assert(ValueMap.count(V) && "V should have been placed in ValueMap when "
476 "its CopyToReg node was created.");
477 unsigned SrcReg = ValueMap[V];
478 if (!TargetRegisterInfo::isVirtualRegister(SrcReg)) {
479 DestLOI.IsValid = false;
480 return;
481 }
482 const LiveOutInfo *SrcLOI = GetLiveOutRegInfo(SrcReg, BitWidth);
483 if (!SrcLOI) {
484 DestLOI.IsValid = false;
485 return;
486 }
487 DestLOI.NumSignBits = std::min(DestLOI.NumSignBits, SrcLOI->NumSignBits);
488 DestLOI.KnownZero &= SrcLOI->KnownZero;
489 DestLOI.KnownOne &= SrcLOI->KnownOne;
490 }
491}
492
Devang Patel9d904e12011-09-08 22:59:09 +0000493/// setArgumentFrameIndex - Record frame index for the byval
Devang Patel86ec8b32010-08-31 22:22:42 +0000494/// argument. This overrides previous frame index entry for this argument,
495/// if any.
Devang Patel9d904e12011-09-08 22:59:09 +0000496void FunctionLoweringInfo::setArgumentFrameIndex(const Argument *A,
Eric Christopher219d51d2012-02-24 01:59:01 +0000497 int FI) {
Devang Patel86ec8b32010-08-31 22:22:42 +0000498 ByValArgFrameIndexMap[A] = FI;
499}
Eric Christopher0713a9d2011-06-08 23:55:35 +0000500
Devang Patel9d904e12011-09-08 22:59:09 +0000501/// getArgumentFrameIndex - Get frame index for the byval argument.
Devang Patel86ec8b32010-08-31 22:22:42 +0000502/// If the argument does not have any assigned frame index then 0 is
503/// returned.
Devang Patel9d904e12011-09-08 22:59:09 +0000504int FunctionLoweringInfo::getArgumentFrameIndex(const Argument *A) {
Eric Christopher0713a9d2011-06-08 23:55:35 +0000505 DenseMap<const Argument *, int>::iterator I =
Devang Patel86ec8b32010-08-31 22:22:42 +0000506 ByValArgFrameIndexMap.find(A);
507 if (I != ByValArgFrameIndexMap.end())
508 return I->second;
Eric Christopher18c6be72012-02-23 03:39:43 +0000509 DEBUG(dbgs() << "Argument does not have assigned frame index!\n");
Devang Patel86ec8b32010-08-31 22:22:42 +0000510 return 0;
511}
512
Reid Kleckner72ba7042015-10-07 00:27:33 +0000513unsigned FunctionLoweringInfo::getCatchPadExceptionPointerVReg(
514 const Value *CPI, const TargetRegisterClass *RC) {
515 MachineRegisterInfo &MRI = MF->getRegInfo();
516 auto I = CatchPadExceptionPointers.insert({CPI, 0});
517 unsigned &VReg = I.first->second;
518 if (I.second)
519 VReg = MRI.createVirtualRegister(RC);
520 assert(VReg && "null vreg in exception pointer table!");
521 return VReg;
522}
523
Michael J. Spencer8b98bf22012-02-22 19:06:13 +0000524/// ComputeUsesVAFloatArgument - Determine if any floating-point values are
525/// being passed to this variadic function, and set the MachineModuleInfo's
526/// usesVAFloatArgument flag if so. This flag is used to emit an undefined
527/// reference to _fltused on Windows, which will link in MSVCRT's
528/// floating-point support.
529void llvm::ComputeUsesVAFloatArgument(const CallInst &I,
530 MachineModuleInfo *MMI)
531{
532 FunctionType *FT = cast<FunctionType>(
533 I.getCalledValue()->getType()->getContainedType(0));
534 if (FT->isVarArg() && !MMI->usesVAFloatArgument()) {
535 for (unsigned i = 0, e = I.getNumArgOperands(); i != e; ++i) {
536 Type* T = I.getArgOperand(i)->getType();
Daniel Berlin25db4f42015-04-15 17:41:42 +0000537 for (auto i : post_order(T)) {
Michael J. Spencer8b98bf22012-02-22 19:06:13 +0000538 if (i->isFloatingPointTy()) {
539 MMI->setUsesVAFloatArgument(true);
540 return;
541 }
542 }
543 }
544 }
545}
546
Bill Wendling247fd3b2011-08-17 21:56:44 +0000547/// AddLandingPadInfo - Extract the exception handling information from the
548/// landingpad instruction and add them to the specified machine module info.
549void llvm::AddLandingPadInfo(const LandingPadInst &I, MachineModuleInfo &MMI,
550 MachineBasicBlock *MBB) {
Reid Klecknere00faf82015-08-31 20:02:16 +0000551 if (const auto *PF = dyn_cast<Function>(
552 I.getParent()->getParent()->getPersonalityFn()->stripPointerCasts()))
553 MMI.addPersonality(PF);
Bill Wendling247fd3b2011-08-17 21:56:44 +0000554
555 if (I.isCleanup())
556 MMI.addCleanup(MBB);
557
558 // FIXME: New EH - Add the clauses in reverse order. This isn't 100% correct,
559 // but we need to do it this way because of how the DWARF EH emitter
560 // processes the clauses.
561 for (unsigned i = I.getNumClauses(); i != 0; --i) {
562 Value *Val = I.getClause(i - 1);
563 if (I.isCatch(i - 1)) {
564 MMI.addCatchTypeInfo(MBB,
Reid Kleckner283bc2e2014-11-14 00:35:50 +0000565 dyn_cast<GlobalValue>(Val->stripPointerCasts()));
Bill Wendling247fd3b2011-08-17 21:56:44 +0000566 } else {
567 // Add filters in a list.
568 Constant *CVal = cast<Constant>(Val);
Reid Kleckner283bc2e2014-11-14 00:35:50 +0000569 SmallVector<const GlobalValue*, 4> FilterList;
Bill Wendling247fd3b2011-08-17 21:56:44 +0000570 for (User::op_iterator
571 II = CVal->op_begin(), IE = CVal->op_end(); II != IE; ++II)
Reid Kleckner283bc2e2014-11-14 00:35:50 +0000572 FilterList.push_back(cast<GlobalValue>((*II)->stripPointerCasts()));
Bill Wendling247fd3b2011-08-17 21:56:44 +0000573
574 MMI.addFilterTypeInfo(MBB, FilterList);
575 }
576 }
577}