blob: f26327ff84ad8f2a32b35fba7a29a5fa7fe3e8fa [file] [log] [blame]
Tim Northover3b0846e2014-05-24 12:50:23 +00001set(LLVM_TARGET_DEFINITIONS AArch64.td)
2
3tablegen(LLVM AArch64GenRegisterInfo.inc -gen-register-info)
4tablegen(LLVM AArch64GenInstrInfo.inc -gen-instr-info)
Eric Christopher79cc1e32014-09-02 22:28:02 +00005tablegen(LLVM AArch64GenMCCodeEmitter.inc -gen-emitter)
Tim Northover3b0846e2014-05-24 12:50:23 +00006tablegen(LLVM AArch64GenMCPseudoLowering.inc -gen-pseudo-lowering)
7tablegen(LLVM AArch64GenAsmWriter.inc -gen-asm-writer)
8tablegen(LLVM AArch64GenAsmWriter1.inc -gen-asm-writer -asmwriternum=1)
9tablegen(LLVM AArch64GenAsmMatcher.inc -gen-asm-matcher)
10tablegen(LLVM AArch64GenDAGISel.inc -gen-dag-isel)
11tablegen(LLVM AArch64GenFastISel.inc -gen-fast-isel)
12tablegen(LLVM AArch64GenCallingConv.inc -gen-callingconv)
13tablegen(LLVM AArch64GenSubtargetInfo.inc -gen-subtarget)
14tablegen(LLVM AArch64GenDisassemblerTables.inc -gen-disassembler)
15add_public_tablegen_target(AArch64CommonTableGen)
16
17add_llvm_target(AArch64CodeGen
James Molloy3feea9c2014-08-08 12:33:21 +000018 AArch64A57FPLoadBalancing.cpp
Tim Northover3b0846e2014-05-24 12:50:23 +000019 AArch64AddressTypePromotion.cpp
20 AArch64AdvSIMDScalarPass.cpp
21 AArch64AsmPrinter.cpp
22 AArch64BranchRelaxation.cpp
23 AArch64CleanupLocalDynamicTLSPass.cpp
24 AArch64CollectLOH.cpp
25 AArch64ConditionalCompares.cpp
26 AArch64DeadRegisterDefinitionsPass.cpp
27 AArch64ExpandPseudoInsts.cpp
28 AArch64FastISel.cpp
Bradley Smithf2a801d2014-10-13 10:12:35 +000029 AArch64A53Fix835769.cpp
Tim Northover3b0846e2014-05-24 12:50:23 +000030 AArch64FrameLowering.cpp
Jiangning Liu1a486da2014-09-05 02:55:24 +000031 AArch64ConditionOptimizer.cpp
Tim Northover3b0846e2014-05-24 12:50:23 +000032 AArch64ISelDAGToDAG.cpp
33 AArch64ISelLowering.cpp
34 AArch64InstrInfo.cpp
35 AArch64LoadStoreOptimizer.cpp
36 AArch64MCInstLower.cpp
37 AArch64PromoteConstant.cpp
Arnaud A. de Grandmaisonc75dbbb2014-09-10 14:06:10 +000038 AArch64PBQPRegAlloc.cpp
Tim Northover3b0846e2014-05-24 12:50:23 +000039 AArch64RegisterInfo.cpp
40 AArch64SelectionDAGInfo.cpp
Tim Northover3b0846e2014-05-24 12:50:23 +000041 AArch64StorePairSuppress.cpp
42 AArch64Subtarget.cpp
43 AArch64TargetMachine.cpp
44 AArch64TargetObjectFile.cpp
45 AArch64TargetTransformInfo.cpp
46)
47
48add_dependencies(LLVMAArch64CodeGen intrinsics_gen)
49
50add_subdirectory(TargetInfo)
51add_subdirectory(AsmParser)
52add_subdirectory(Disassembler)
53add_subdirectory(InstPrinter)
54add_subdirectory(MCTargetDesc)
55add_subdirectory(Utils)