Igor Breger | b4442f3 | 2017-02-10 07:05:56 +0000 | [diff] [blame] | 1 | //===- X86LegalizerInfo.cpp --------------------------------------*- C++ -*-==// |
| 2 | // |
| 3 | // The LLVM Compiler Infrastructure |
| 4 | // |
| 5 | // This file is distributed under the University of Illinois Open Source |
| 6 | // License. See LICENSE.TXT for details. |
| 7 | // |
| 8 | //===----------------------------------------------------------------------===// |
| 9 | /// \file |
| 10 | /// This file implements the targeting of the Machinelegalizer class for X86. |
| 11 | /// \todo This should be generated by TableGen. |
| 12 | //===----------------------------------------------------------------------===// |
| 13 | |
| 14 | #include "X86LegalizerInfo.h" |
| 15 | #include "X86Subtarget.h" |
Igor Breger | 531a203 | 2017-03-26 08:11:12 +0000 | [diff] [blame] | 16 | #include "X86TargetMachine.h" |
Igor Breger | b4442f3 | 2017-02-10 07:05:56 +0000 | [diff] [blame] | 17 | #include "llvm/CodeGen/ValueTypes.h" |
| 18 | #include "llvm/IR/DerivedTypes.h" |
| 19 | #include "llvm/IR/Type.h" |
| 20 | #include "llvm/Target/TargetOpcodes.h" |
| 21 | |
| 22 | using namespace llvm; |
Igor Breger | 321cf3c | 2017-03-03 08:06:46 +0000 | [diff] [blame] | 23 | using namespace TargetOpcode; |
Igor Breger | b4442f3 | 2017-02-10 07:05:56 +0000 | [diff] [blame] | 24 | |
| 25 | #ifndef LLVM_BUILD_GLOBAL_ISEL |
| 26 | #error "You shouldn't build this" |
| 27 | #endif |
| 28 | |
Igor Breger | 531a203 | 2017-03-26 08:11:12 +0000 | [diff] [blame] | 29 | X86LegalizerInfo::X86LegalizerInfo(const X86Subtarget &STI, |
| 30 | const X86TargetMachine &TM) |
| 31 | : Subtarget(STI), TM(TM) { |
Igor Breger | b4442f3 | 2017-02-10 07:05:56 +0000 | [diff] [blame] | 32 | |
| 33 | setLegalizerInfo32bit(); |
| 34 | setLegalizerInfo64bit(); |
Igor Breger | 321cf3c | 2017-03-03 08:06:46 +0000 | [diff] [blame] | 35 | setLegalizerInfoSSE1(); |
| 36 | setLegalizerInfoSSE2(); |
Igor Breger | b4442f3 | 2017-02-10 07:05:56 +0000 | [diff] [blame] | 37 | |
| 38 | computeTables(); |
| 39 | } |
| 40 | |
| 41 | void X86LegalizerInfo::setLegalizerInfo32bit() { |
| 42 | |
Igor Breger | a8ba572 | 2017-03-23 15:25:57 +0000 | [diff] [blame] | 43 | if (Subtarget.is64Bit()) |
| 44 | return; |
| 45 | |
| 46 | const LLT p0 = LLT::pointer(0, 32); |
Igor Breger | 2953788 | 2017-04-07 14:41:59 +0000 | [diff] [blame^] | 47 | const LLT s1 = LLT::scalar(1); |
Igor Breger | b4442f3 | 2017-02-10 07:05:56 +0000 | [diff] [blame] | 48 | const LLT s8 = LLT::scalar(8); |
| 49 | const LLT s16 = LLT::scalar(16); |
| 50 | const LLT s32 = LLT::scalar(32); |
Igor Breger | 2953788 | 2017-04-07 14:41:59 +0000 | [diff] [blame^] | 51 | const LLT s64 = LLT::scalar(64); |
Igor Breger | b4442f3 | 2017-02-10 07:05:56 +0000 | [diff] [blame] | 52 | |
Igor Breger | a8ba572 | 2017-03-23 15:25:57 +0000 | [diff] [blame] | 53 | for (unsigned BinOp : {G_ADD, G_SUB}) |
| 54 | for (auto Ty : {s8, s16, s32}) |
| 55 | setAction({BinOp, Ty}, Legal); |
| 56 | |
| 57 | for (unsigned MemOp : {G_LOAD, G_STORE}) { |
| 58 | for (auto Ty : {s8, s16, s32, p0}) |
| 59 | setAction({MemOp, Ty}, Legal); |
| 60 | |
| 61 | // And everything's fine in addrspace 0. |
| 62 | setAction({MemOp, 1, p0}, Legal); |
Igor Breger | f7359d8 | 2017-02-22 12:25:09 +0000 | [diff] [blame] | 63 | } |
Igor Breger | 531a203 | 2017-03-26 08:11:12 +0000 | [diff] [blame] | 64 | |
| 65 | // Pointer-handling |
| 66 | setAction({G_FRAME_INDEX, p0}, Legal); |
Igor Breger | 2953788 | 2017-04-07 14:41:59 +0000 | [diff] [blame^] | 67 | |
| 68 | // Constants |
| 69 | for (auto Ty : {s8, s16, s32, p0}) |
| 70 | setAction({TargetOpcode::G_CONSTANT, Ty}, Legal); |
| 71 | |
| 72 | setAction({TargetOpcode::G_CONSTANT, s1}, WidenScalar); |
| 73 | setAction({TargetOpcode::G_CONSTANT, s64}, NarrowScalar); |
Igor Breger | b4442f3 | 2017-02-10 07:05:56 +0000 | [diff] [blame] | 74 | } |
Igor Breger | b4442f3 | 2017-02-10 07:05:56 +0000 | [diff] [blame] | 75 | |
Igor Breger | f7359d8 | 2017-02-22 12:25:09 +0000 | [diff] [blame] | 76 | void X86LegalizerInfo::setLegalizerInfo64bit() { |
Igor Breger | b4442f3 | 2017-02-10 07:05:56 +0000 | [diff] [blame] | 77 | |
| 78 | if (!Subtarget.is64Bit()) |
| 79 | return; |
| 80 | |
Igor Breger | 531a203 | 2017-03-26 08:11:12 +0000 | [diff] [blame] | 81 | const LLT p0 = LLT::pointer(0, TM.getPointerSize() * 8); |
Igor Breger | 2953788 | 2017-04-07 14:41:59 +0000 | [diff] [blame^] | 82 | const LLT s1 = LLT::scalar(1); |
Igor Breger | a8ba572 | 2017-03-23 15:25:57 +0000 | [diff] [blame] | 83 | const LLT s8 = LLT::scalar(8); |
| 84 | const LLT s16 = LLT::scalar(16); |
| 85 | const LLT s32 = LLT::scalar(32); |
Igor Breger | b4442f3 | 2017-02-10 07:05:56 +0000 | [diff] [blame] | 86 | const LLT s64 = LLT::scalar(64); |
| 87 | |
Igor Breger | a8ba572 | 2017-03-23 15:25:57 +0000 | [diff] [blame] | 88 | for (unsigned BinOp : {G_ADD, G_SUB}) |
| 89 | for (auto Ty : {s8, s16, s32, s64}) |
| 90 | setAction({BinOp, Ty}, Legal); |
| 91 | |
| 92 | for (unsigned MemOp : {G_LOAD, G_STORE}) { |
| 93 | for (auto Ty : {s8, s16, s32, s64, p0}) |
| 94 | setAction({MemOp, Ty}, Legal); |
| 95 | |
| 96 | // And everything's fine in addrspace 0. |
| 97 | setAction({MemOp, 1, p0}, Legal); |
| 98 | } |
Igor Breger | 531a203 | 2017-03-26 08:11:12 +0000 | [diff] [blame] | 99 | |
| 100 | // Pointer-handling |
| 101 | setAction({G_FRAME_INDEX, p0}, Legal); |
Igor Breger | 2953788 | 2017-04-07 14:41:59 +0000 | [diff] [blame^] | 102 | |
| 103 | // Constants |
| 104 | for (auto Ty : {s8, s16, s32, s64, p0}) |
| 105 | setAction({TargetOpcode::G_CONSTANT, Ty}, Legal); |
| 106 | |
| 107 | setAction({TargetOpcode::G_CONSTANT, s1}, WidenScalar); |
Igor Breger | 321cf3c | 2017-03-03 08:06:46 +0000 | [diff] [blame] | 108 | } |
| 109 | |
| 110 | void X86LegalizerInfo::setLegalizerInfoSSE1() { |
| 111 | if (!Subtarget.hasSSE1()) |
| 112 | return; |
| 113 | |
| 114 | const LLT s32 = LLT::scalar(32); |
| 115 | const LLT v4s32 = LLT::vector(4, 32); |
Igor Breger | a8ba572 | 2017-03-23 15:25:57 +0000 | [diff] [blame] | 116 | const LLT v2s64 = LLT::vector(2, 64); |
Igor Breger | 321cf3c | 2017-03-03 08:06:46 +0000 | [diff] [blame] | 117 | |
| 118 | for (unsigned BinOp : {G_FADD, G_FSUB, G_FMUL, G_FDIV}) |
| 119 | for (auto Ty : {s32, v4s32}) |
| 120 | setAction({BinOp, Ty}, Legal); |
Igor Breger | a8ba572 | 2017-03-23 15:25:57 +0000 | [diff] [blame] | 121 | |
| 122 | for (unsigned MemOp : {G_LOAD, G_STORE}) |
| 123 | for (auto Ty : {v4s32, v2s64}) |
| 124 | setAction({MemOp, Ty}, Legal); |
Igor Breger | 321cf3c | 2017-03-03 08:06:46 +0000 | [diff] [blame] | 125 | } |
| 126 | |
| 127 | void X86LegalizerInfo::setLegalizerInfoSSE2() { |
| 128 | if (!Subtarget.hasSSE2()) |
| 129 | return; |
| 130 | |
| 131 | const LLT s64 = LLT::scalar(64); |
| 132 | const LLT v4s32 = LLT::vector(4, 32); |
| 133 | const LLT v2s64 = LLT::vector(2, 64); |
| 134 | |
| 135 | for (unsigned BinOp : {G_FADD, G_FSUB, G_FMUL, G_FDIV}) |
| 136 | for (auto Ty : {s64, v2s64}) |
| 137 | setAction({BinOp, Ty}, Legal); |
| 138 | |
| 139 | for (unsigned BinOp : {G_ADD, G_SUB}) |
| 140 | for (auto Ty : {v4s32}) |
| 141 | setAction({BinOp, Ty}, Legal); |
Igor Breger | b4442f3 | 2017-02-10 07:05:56 +0000 | [diff] [blame] | 142 | } |