blob: 06cc97fb292164a9e1bdcf5e0ef8e54ff0585e70 [file] [log] [blame]
Matt Arsenault06bd3932014-08-01 17:00:29 +00001; RUN: llc -march=r600 -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
2; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck -check-prefix=R600 -check-prefix=FUNC %s
3
Tom Stellard75aadc22012-12-11 21:25:42 +00004
Tom Stellardc54731a2013-07-23 23:55:03 +00005; DAGCombiner will transform:
6; (fabs (f32 bitcast (i32 a))) => (f32 bitcast (and (i32 a), 0x7FFFFFFF))
7; unless isFabsFree returns true
Tom Stellard75aadc22012-12-11 21:25:42 +00008
Tom Stellard79243d92014-10-01 17:15:17 +00009; FUNC-LABEL: {{^}}fabs_fn_free:
Matt Arsenault06bd3932014-08-01 17:00:29 +000010; R600-NOT: AND
11; R600: |PV.{{[XYZW]}}|
12
Tom Stellard326d6ec2014-11-05 14:50:53 +000013; SI: v_and_b32
Matt Arsenault06bd3932014-08-01 17:00:29 +000014
15define void @fabs_fn_free(float addrspace(1)* %out, i32 %in) {
16 %bc= bitcast i32 %in to float
17 %fabs = call float @fabs(float %bc)
18 store float %fabs, float addrspace(1)* %out
19 ret void
20}
21
Tom Stellard79243d92014-10-01 17:15:17 +000022; FUNC-LABEL: {{^}}fabs_free:
Matt Arsenault06bd3932014-08-01 17:00:29 +000023; R600-NOT: AND
24; R600: |PV.{{[XYZW]}}|
25
Tom Stellard326d6ec2014-11-05 14:50:53 +000026; SI: v_and_b32
Tom Stellardc54731a2013-07-23 23:55:03 +000027
28define void @fabs_free(float addrspace(1)* %out, i32 %in) {
Matt Arsenault06bd3932014-08-01 17:00:29 +000029 %bc= bitcast i32 %in to float
30 %fabs = call float @llvm.fabs.f32(float %bc)
31 store float %fabs, float addrspace(1)* %out
Tom Stellardc54731a2013-07-23 23:55:03 +000032 ret void
Tom Stellard75aadc22012-12-11 21:25:42 +000033}
34
Tom Stellard79243d92014-10-01 17:15:17 +000035; FUNC-LABEL: {{^}}fabs_f32:
Matt Arsenault06bd3932014-08-01 17:00:29 +000036; R600: |{{(PV|T[0-9])\.[XYZW]}}|
37
Tom Stellard326d6ec2014-11-05 14:50:53 +000038; SI: v_and_b32
Matt Arsenault06bd3932014-08-01 17:00:29 +000039define void @fabs_f32(float addrspace(1)* %out, float %in) {
40 %fabs = call float @llvm.fabs.f32(float %in)
41 store float %fabs, float addrspace(1)* %out
Tom Stellard175e7a82013-11-27 21:23:39 +000042 ret void
43}
44
Tom Stellard79243d92014-10-01 17:15:17 +000045; FUNC-LABEL: {{^}}fabs_v2f32:
Matt Arsenault06bd3932014-08-01 17:00:29 +000046; R600: |{{(PV|T[0-9])\.[XYZW]}}|
47; R600: |{{(PV|T[0-9])\.[XYZW]}}|
48
Tom Stellard326d6ec2014-11-05 14:50:53 +000049; SI: v_and_b32
50; SI: v_and_b32
Matt Arsenault06bd3932014-08-01 17:00:29 +000051define void @fabs_v2f32(<2 x float> addrspace(1)* %out, <2 x float> %in) {
52 %fabs = call <2 x float> @llvm.fabs.v2f32(<2 x float> %in)
53 store <2 x float> %fabs, <2 x float> addrspace(1)* %out
Tom Stellard175e7a82013-11-27 21:23:39 +000054 ret void
55}
56
Tom Stellard79243d92014-10-01 17:15:17 +000057; FUNC-LABEL: {{^}}fabs_v4f32:
Matt Arsenault06bd3932014-08-01 17:00:29 +000058; R600: |{{(PV|T[0-9])\.[XYZW]}}|
59; R600: |{{(PV|T[0-9])\.[XYZW]}}|
60; R600: |{{(PV|T[0-9])\.[XYZW]}}|
61; R600: |{{(PV|T[0-9])\.[XYZW]}}|
62
Tom Stellard326d6ec2014-11-05 14:50:53 +000063; SI: v_and_b32
64; SI: v_and_b32
65; SI: v_and_b32
66; SI: v_and_b32
Matt Arsenault06bd3932014-08-01 17:00:29 +000067define void @fabs_v4f32(<4 x float> addrspace(1)* %out, <4 x float> %in) {
68 %fabs = call <4 x float> @llvm.fabs.v4f32(<4 x float> %in)
69 store <4 x float> %fabs, <4 x float> addrspace(1)* %out
70 ret void
71}
72
Tom Stellard79243d92014-10-01 17:15:17 +000073; SI-LABEL: {{^}}fabs_fn_fold:
Tom Stellard326d6ec2014-11-05 14:50:53 +000074; SI: s_load_dword [[ABS_VALUE:s[0-9]+]], s[{{[0-9]+:[0-9]+}}], 0xb
75; SI-NOT: and
76; SI: v_mul_f32_e64 v{{[0-9]+}}, |[[ABS_VALUE]]|, v{{[0-9]+}}
Matt Arsenault06bd3932014-08-01 17:00:29 +000077define void @fabs_fn_fold(float addrspace(1)* %out, float %in0, float %in1) {
78 %fabs = call float @fabs(float %in0)
79 %fmul = fmul float %fabs, %in1
80 store float %fmul, float addrspace(1)* %out
81 ret void
82}
83
Tom Stellard79243d92014-10-01 17:15:17 +000084; SI-LABEL: {{^}}fabs_fold:
Tom Stellard326d6ec2014-11-05 14:50:53 +000085; SI: s_load_dword [[ABS_VALUE:s[0-9]+]], s[{{[0-9]+:[0-9]+}}], 0xb
86; SI-NOT: and
87; SI: v_mul_f32_e64 v{{[0-9]+}}, |[[ABS_VALUE]]|, v{{[0-9]+}}
Vincent Lejeune29c0c212014-05-10 19:18:39 +000088define void @fabs_fold(float addrspace(1)* %out, float %in0, float %in1) {
Matt Arsenault06bd3932014-08-01 17:00:29 +000089 %fabs = call float @llvm.fabs.f32(float %in0)
90 %fmul = fmul float %fabs, %in1
91 store float %fmul, float addrspace(1)* %out
Vincent Lejeune29c0c212014-05-10 19:18:39 +000092 ret void
93}
94
Matt Arsenault06bd3932014-08-01 17:00:29 +000095declare float @fabs(float) readnone
96declare float @llvm.fabs.f32(float) readnone
97declare <2 x float> @llvm.fabs.v2f32(<2 x float>) readnone
98declare <4 x float> @llvm.fabs.v4f32(<4 x float>) readnone