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gerrit-public.fairphone.software / toolchain / llvm-project / 46ecdf5a0f797768f744ee6628d2275651f0dd22 / . / llvm / test / CodeGen / AArch64 / zero-reg.ll
blob: c4073cba08dbffd42fa6a75fb4add86c665dbe10 [file] [log] [blame]
Tim Northovere3d42362013-02-01 11:40:47 +0000[diff] [blame]1; RUN: llc -verify-machineinstrs < %s -mtriple=aarch64-none-linux-gnu | FileCheck %s
Tim Northover46ecdf52014-04-16 11:53:07 +0000[diff] [blame^]2; RUN: llc -verify-machineinstrs -o - %s -mtriple=arm64-linux-gnu | FileCheck %s
Tim Northovere0e3aef2013-01-31 12:12:40 +0000[diff] [blame]3
4@var32 = global i32 0
5@var64 = global i64 0
6
7define void @test_zr() {
Stephen Linf799e3f2013-07-13 20:38:47 +0000[diff] [blame]8; CHECK-LABEL: test_zr:
Tim Northovere0e3aef2013-01-31 12:12:40 +0000[diff] [blame]9
10 store i32 0, i32* @var32
Tim Northover46ecdf52014-04-16 11:53:07 +0000[diff] [blame^]11; CHECK: str wzr, [{{x[0-9]+}}, {{#?}}:lo12:var32]
Tim Northovere0e3aef2013-01-31 12:12:40 +0000[diff] [blame]12 store i64 0, i64* @var64
Tim Northover46ecdf52014-04-16 11:53:07 +0000[diff] [blame^]13; CHECK: str xzr, [{{x[0-9]+}}, {{#?}}:lo12:var64]
Tim Northovere0e3aef2013-01-31 12:12:40 +0000[diff] [blame]14
15 ret void
16; CHECK: ret
17}
18
19define void @test_sp(i32 %val) {
Stephen Linf799e3f2013-07-13 20:38:47 +0000[diff] [blame]20; CHECK-LABEL: test_sp:
Tim Northovere0e3aef2013-01-31 12:12:40 +0000[diff] [blame]21
22; Important correctness point here is that LLVM doesn't try to use xzr
23; as an addressing register: "str w0, [xzr]" is not a valid A64
24; instruction (0b11111 in the Rn field would mean "sp").
25 %addr = getelementptr i32* null, i64 0
26 store i32 %val, i32* %addr
Tim Northover46ecdf52014-04-16 11:53:07 +0000[diff] [blame^]27; CHECK: str {{w[0-9]+}}, [{{x[0-9]+|sp}}]
Tim Northovere0e3aef2013-01-31 12:12:40 +0000[diff] [blame]28
29 ret void
30; CHECK: ret
Stephen Linf799e3f2013-07-13 20:38:47 +0000[diff] [blame]31}