blob: 0a22e4276b53c9b32d2821904e549e0120858553 [file] [log] [blame]
Alexey Bataevdb390212015-05-20 04:24:19 +00001// RUN: %clang_cc1 -verify -triple x86_64-apple-darwin10 -fopenmp -x c -emit-llvm %s -o - | FileCheck %s
2// RUN: %clang_cc1 -fopenmp -x c -triple x86_64-apple-darwin10 -emit-pch -o %t %s
3// RUN: %clang_cc1 -fopenmp -x c -triple x86_64-apple-darwin10 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s
Alexey Bataev5e018f92015-04-23 06:35:10 +00004// expected-no-diagnostics
Alexey Bataev5e018f92015-04-23 06:35:10 +00005#ifndef HEADER
6#define HEADER
7
8_Bool bv, bx;
9char cv, cx;
10unsigned char ucv, ucx;
11short sv, sx;
12unsigned short usv, usx;
13int iv, ix;
14unsigned int uiv, uix;
15long lv, lx;
16unsigned long ulv, ulx;
17long long llv, llx;
18unsigned long long ullv, ullx;
19float fv, fx;
20double dv, dx;
21long double ldv, ldx;
22_Complex int civ, cix;
23_Complex float cfv, cfx;
24_Complex double cdv, cdx;
25
26typedef int int4 __attribute__((__vector_size__(16)));
27int4 int4x;
28
29struct BitFields {
30 int : 32;
31 int a : 31;
32} bfx;
33
34struct BitFields_packed {
35 int : 32;
36 int a : 31;
37} __attribute__ ((__packed__)) bfx_packed;
38
39struct BitFields2 {
40 int : 31;
41 int a : 1;
42} bfx2;
43
44struct BitFields2_packed {
45 int : 31;
46 int a : 1;
47} __attribute__ ((__packed__)) bfx2_packed;
48
49struct BitFields3 {
50 int : 11;
51 int a : 14;
52} bfx3;
53
54struct BitFields3_packed {
55 int : 11;
56 int a : 14;
57} __attribute__ ((__packed__)) bfx3_packed;
58
59struct BitFields4 {
60 short : 16;
61 int a: 1;
62 long b : 7;
63} bfx4;
64
65struct BitFields4_packed {
66 short : 16;
67 int a: 1;
68 long b : 7;
69} __attribute__ ((__packed__)) bfx4_packed;
70
71typedef float float2 __attribute__((ext_vector_type(2)));
72float2 float2x;
73
Akira Hatanaka8c26ea62015-11-18 00:15:28 +000074// Register "0" is currently an invalid register for global register variables.
75// Use "esp" instead of "0".
76// register int rix __asm__("0");
77register int rix __asm__("esp");
Alexey Bataev5e018f92015-04-23 06:35:10 +000078
79int main() {
80// CHECK: [[PREV:%.+]] = atomicrmw add i8* @{{.+}}, i8 1 monotonic
81// CHECK: store i8 [[PREV]], i8* @{{.+}},
82#pragma omp atomic capture
83 bv = bx++;
84// CHECK: atomicrmw add i8* @{{.+}}, i8 1 monotonic
85// CHECK: add nsw i32 %{{.+}}, 1
86// CHECK: store i8 %{{.+}}, i8* @{{.+}},
87#pragma omp atomic capture
88 cv = ++cx;
89// CHECK: [[PREV:%.+]] = atomicrmw sub i8* @{{.+}}, i8 1 monotonic
90// CHECK: store i8 [[PREV]], i8* @{{.+}},
91#pragma omp atomic capture
92 ucv = ucx--;
93// CHECK: atomicrmw sub i16* @{{.+}}, i16 1 monotonic
94// CHECK: sub nsw i32 %{{.+}}, 1
95// CHECK: store i16 %{{.+}}, i16* @{{.+}},
96#pragma omp atomic capture
97 sv = --sx;
98// CHECK: [[USV:%.+]] = load i16, i16* @{{.+}},
99// CHECK: [[EXPR:%.+]] = zext i16 [[USV]] to i32
100// CHECK: [[X:%.+]] = load atomic i16, i16* [[X_ADDR:@.+]] monotonic
101// CHECK: br label %[[CONT:.+]]
102// CHECK: [[CONT]]
103// CHECK: [[EXPECTED:%.+]] = phi i16 [ [[X]], %{{.+}} ], [ [[OLD_X:%.+]], %[[CONT]] ]
104// CHECK: [[CONV:%.+]] = zext i16 [[EXPECTED]] to i32
105// CHECK: [[ADD:%.+]] = add nsw i32 [[CONV]], [[EXPR]]
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000106// CHECK: [[DESIRED_CALC:%.+]] = trunc i32 [[ADD]] to i16
107// CHECK: store i16 [[DESIRED_CALC]], i16* [[TEMP:%.+]],
108// CHECK: [[DESIRED:%.+]] = load i16, i16* [[TEMP]],
Alexey Bataev5e018f92015-04-23 06:35:10 +0000109// CHECK: [[RES:%.+]] = cmpxchg i16* [[X_ADDR]], i16 [[EXPECTED]], i16 [[DESIRED]] monotonic monotonic
110// CHECK: [[OLD_X]] = extractvalue { i16, i1 } [[RES]], 0
111// CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i16, i1 } [[RES]], 1
112// CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]]
113// CHECK: [[EXIT]]
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000114// CHECK: store i16 [[DESIRED_CALC]], i16* @{{.+}},
Alexey Bataev5e018f92015-04-23 06:35:10 +0000115#pragma omp atomic capture
116 sv = usx += usv;
117// CHECK: [[EXPR:%.+]] = load i32, i32* @{{.+}},
118// CHECK: [[X:%.+]] = load atomic i32, i32* [[X_ADDR:@.+]] monotonic
119// CHECK: br label %[[CONT:.+]]
120// CHECK: [[CONT]]
121// CHECK: [[EXPECTED:%.+]] = phi i32 [ [[X]], %{{.+}} ], [ [[OLD_X:%.+]], %[[CONT]] ]
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000122// CHECK: [[DESIRED_CALC:%.+]] = mul nsw i32 [[EXPECTED]], [[EXPR]]
123// CHECK: store i32 [[DESIRED_CALC]], i32* [[TEMP:%.+]],
124// CHECK: [[DESIRED:%.+]] = load i32, i32* [[TEMP]],
Alexey Bataev5e018f92015-04-23 06:35:10 +0000125// CHECK: [[RES:%.+]] = cmpxchg i32* [[X_ADDR]], i32 [[EXPECTED]], i32 [[DESIRED]] monotonic monotonic
126// CHECK: [[OLD_X]] = extractvalue { i32, i1 } [[RES]], 0
127// CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i32, i1 } [[RES]], 1
128// CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]]
129// CHECK: [[EXIT]]
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000130// CHECK: store i32 [[DESIRED_CALC]], i32* @{{.+}},
Alexey Bataev5e018f92015-04-23 06:35:10 +0000131#pragma omp atomic capture
132 uiv = ix *= iv;
133// CHECK: [[EXPR:%.+]] = load i32, i32* @{{.+}},
134// CHECK: [[PREV:%.+]] = atomicrmw sub i32* @{{.+}}, i32 [[EXPR]] monotonic
135// CHECK: store i32 [[PREV]], i32* @{{.+}},
136#pragma omp atomic capture
137 {iv = uix; uix -= uiv;}
138// CHECK: [[EXPR:%.+]] = load i32, i32* @{{.+}},
139// CHECK: [[X:%.+]] = load atomic i32, i32* [[X_ADDR:@.+]] monotonic
140// CHECK: br label %[[CONT:.+]]
141// CHECK: [[CONT]]
142// CHECK: [[EXPECTED:%.+]] = phi i32 [ [[X]], %{{.+}} ], [ [[OLD_X:%.+]], %[[CONT]] ]
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000143// CHECK: [[DESIRED_CALC:%.+]] = shl i32 [[EXPECTED]], [[EXPR]]
144// CHECK: store i32 [[DESIRED_CALC]], i32* [[TEMP:%.+]],
145// CHECK: [[DESIRED:%.+]] = load i32, i32* [[TEMP]],
Alexey Bataev5e018f92015-04-23 06:35:10 +0000146// CHECK: [[RES:%.+]] = cmpxchg i32* [[X_ADDR]], i32 [[EXPECTED]], i32 [[DESIRED]] monotonic monotonic
147// CHECK: [[OLD_X]] = extractvalue { i32, i1 } [[RES]], 0
148// CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i32, i1 } [[RES]], 1
149// CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]]
150// CHECK: [[EXIT]]
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000151// CHECK: store i32 [[DESIRED_CALC]], i32* @{{.+}},
Alexey Bataev5e018f92015-04-23 06:35:10 +0000152#pragma omp atomic capture
153 {ix <<= iv; uiv = ix;}
154// CHECK: [[EXPR:%.+]] = load i32, i32* @{{.+}},
155// CHECK: [[X:%.+]] = load atomic i32, i32* [[X_ADDR:@.+]] monotonic
156// CHECK: br label %[[CONT:.+]]
157// CHECK: [[CONT]]
158// CHECK: [[EXPECTED:%.+]] = phi i32 [ [[X]], %{{.+}} ], [ [[OLD_X:%.+]], %[[CONT]] ]
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000159// CHECK: [[DESIRED_CALC:%.+]] = lshr i32 [[EXPECTED]], [[EXPR]]
160// CHECK: store i32 [[DESIRED_CALC]], i32* [[TEMP:%.+]],
161// CHECK: [[DESIRED:%.+]] = load i32, i32* [[TEMP]],
Alexey Bataev5e018f92015-04-23 06:35:10 +0000162// CHECK: [[RES:%.+]] = cmpxchg i32* [[X_ADDR]], i32 [[EXPECTED]], i32 [[DESIRED]] monotonic monotonic
163// CHECK: [[OLD_X]] = extractvalue { i32, i1 } [[RES]], 0
164// CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i32, i1 } [[RES]], 1
165// CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]]
166// CHECK: [[EXIT]]
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000167// CHECK: store i32 [[DESIRED_CALC]], i32* @{{.+}},
Alexey Bataev5e018f92015-04-23 06:35:10 +0000168#pragma omp atomic capture
169 iv = uix >>= uiv;
170// CHECK: [[EXPR:%.+]] = load i64, i64* @{{.+}},
171// CHECK: [[X:%.+]] = load atomic i64, i64* [[X_ADDR:@.+]] monotonic
172// CHECK: br label %[[CONT:.+]]
173// CHECK: [[CONT]]
174// CHECK: [[EXPECTED:%.+]] = phi i64 [ [[X]], %{{.+}} ], [ [[OLD_X:%.+]], %[[CONT]] ]
175// CHECK: [[DESIRED:%.+]] = sdiv i64 [[EXPECTED]], [[EXPR]]
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000176// CHECK: store i64 [[DESIRED]], i64* [[TEMP:%.+]],
177// CHECK: [[DESIRED:%.+]] = load i64, i64* [[TEMP]],
Alexey Bataev5e018f92015-04-23 06:35:10 +0000178// CHECK: [[RES:%.+]] = cmpxchg i64* [[X_ADDR]], i64 [[EXPECTED]], i64 [[DESIRED]] monotonic monotonic
179// CHECK: [[OLD_X]] = extractvalue { i64, i1 } [[RES]], 0
180// CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i64, i1 } [[RES]], 1
181// CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]]
182// CHECK: [[EXIT]]
183// CHECK: store i64 [[EXPECTED]], i64* @{{.+}},
184#pragma omp atomic capture
185 {ulv = lx; lx /= lv;}
186// CHECK: [[EXPR:%.+]] = load i64, i64* @{{.+}},
187// CHECK: [[OLD:%.+]] = atomicrmw and i64* @{{.+}}, i64 [[EXPR]] monotonic
188// CHECK: [[DESIRED:%.+]] = and i64 [[OLD]], [[EXPR]]
189// CHECK: store i64 [[DESIRED]], i64* @{{.+}},
190#pragma omp atomic capture
191 {ulx &= ulv; lv = ulx;}
192// CHECK: [[EXPR:%.+]] = load i64, i64* @{{.+}},
193// CHECK: [[OLD:%.+]] = atomicrmw xor i64* @{{.+}}, i64 [[EXPR]] monotonic
194// CHECK: [[DESIRED:%.+]] = xor i64 [[OLD]], [[EXPR]]
195// CHECK: store i64 [[DESIRED]], i64* @{{.+}},
196#pragma omp atomic capture
197 ullv = llx ^= llv;
198// CHECK: [[EXPR:%.+]] = load i64, i64* @{{.+}},
199// CHECK: [[OLD:%.+]] = atomicrmw or i64* @{{.+}}, i64 [[EXPR]] monotonic
200// CHECK: [[DESIRED:%.+]] = or i64 [[OLD]], [[EXPR]]
201// CHECK: store i64 [[DESIRED]], i64* @{{.+}},
202#pragma omp atomic capture
203 llv = ullx |= ullv;
204// CHECK: [[EXPR:%.+]] = load float, float* @{{.+}},
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000205// CHECK: [[X:%.+]] = load atomic i32, i32* bitcast (float* [[X_ADDR:@.+]] to i32*) monotonic
Alexey Bataev5e018f92015-04-23 06:35:10 +0000206// CHECK: br label %[[CONT:.+]]
207// CHECK: [[CONT]]
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000208// CHECK: [[EXPECTED:%.+]] = phi i32 [ [[X]], %{{.+}} ], [ [[OLD_X:%.+]], %[[CONT]] ]
209// CHECK: [[TEMP_I:%.+]] = bitcast float* [[TEMP:%.+]] to i32*
210// CHECK: [[OLD:%.+]] = bitcast i32 [[EXPECTED]] to float
Alexey Bataev5e018f92015-04-23 06:35:10 +0000211// CHECK: [[ADD:%.+]] = fadd float [[OLD]], [[EXPR]]
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000212// CHECK: store float [[ADD]], float* [[TEMP]],
213// CHECK: [[DESIRED:%.+]] = load i32, i32* [[TEMP_I]],
Alexey Bataev5e018f92015-04-23 06:35:10 +0000214// CHECK: [[RES:%.+]] = cmpxchg i32* bitcast (float* [[X_ADDR]] to i32*), i32 [[EXPECTED]], i32 [[DESIRED]] monotonic monotonic
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000215// CHECK: [[OLD_X:%.+]] = extractvalue { i32, i1 } [[RES]], 0
Alexey Bataev5e018f92015-04-23 06:35:10 +0000216// CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i32, i1 } [[RES]], 1
Alexey Bataev5e018f92015-04-23 06:35:10 +0000217// CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]]
218// CHECK: [[EXIT]]
219// CHECK: [[CAST:%.+]] = fpext float [[ADD]] to double
220// CHECK: store double [[CAST]], double* @{{.+}},
221#pragma omp atomic capture
222 dv = fx = fx + fv;
223// CHECK: [[EXPR:%.+]] = load double, double* @{{.+}},
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000224// CHECK: [[X:%.+]] = load atomic i64, i64* bitcast (double* [[X_ADDR:@.+]] to i64*) monotonic
Alexey Bataev5e018f92015-04-23 06:35:10 +0000225// CHECK: br label %[[CONT:.+]]
226// CHECK: [[CONT]]
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000227// CHECK: [[EXPECTED:%.+]] = phi i64 [ [[X]], %{{.+}} ], [ [[OLD_X:%.+]], %[[CONT]] ]
228// CHECK: [[TEMP_I:%.+]] = bitcast double* [[TEMP:%.+]] to i64*
229// CHECK: [[OLD:%.+]] = bitcast i64 [[EXPECTED]] to double
Alexey Bataev5e018f92015-04-23 06:35:10 +0000230// CHECK: [[SUB:%.+]] = fsub double [[EXPR]], [[OLD]]
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000231// CHECK: store double [[SUB]], double* [[TEMP]],
232// CHECK: [[DESIRED:%.+]] = load i64, i64* [[TEMP_I]],
Alexey Bataev5e018f92015-04-23 06:35:10 +0000233// CHECK: [[RES:%.+]] = cmpxchg i64* bitcast (double* [[X_ADDR]] to i64*), i64 [[EXPECTED]], i64 [[DESIRED]] monotonic monotonic
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000234// CHECK: [[OLD_X:%.+]] = extractvalue { i64, i1 } [[RES]], 0
Alexey Bataev5e018f92015-04-23 06:35:10 +0000235// CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i64, i1 } [[RES]], 1
Alexey Bataev5e018f92015-04-23 06:35:10 +0000236// CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]]
237// CHECK: [[EXIT]]
238// CHECK: [[CAST:%.+]] = fptrunc double [[OLD]] to float
239// CHECK: store float [[CAST]], float* @{{.+}},
240#pragma omp atomic capture
241 {fv = dx; dx = dv - dx;}
242// CHECK: [[EXPR:%.+]] = load x86_fp80, x86_fp80* @{{.+}},
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000243// CHECK: [[X:%.+]] = load atomic i128, i128* bitcast (x86_fp80* [[X_ADDR:@.+]] to i128*) monotonic
Alexey Bataev5e018f92015-04-23 06:35:10 +0000244// CHECK: br label %[[CONT:.+]]
245// CHECK: [[CONT]]
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000246// CHECK: [[EXPECTED:%.+]] = phi i128 [ [[X]], %{{.+}} ], [ [[OLD_X:%.+]], %[[CONT]] ]
247// CHECK: [[BITCAST:%.+]] = bitcast x86_fp80* [[TEMP:%.+]] to i128*
248// CHECK: store i128 [[EXPECTED]], i128* [[BITCAST]]
249// CHECK: [[BITCAST1:%.+]] = bitcast x86_fp80* [[TEMP1:%.+]] to i128*
250// CHECK: store i128 [[EXPECTED]], i128* [[BITCAST1]]
251// CHECK: [[OLD:%.+]] = load x86_fp80, x86_fp80* [[TEMP1]]
Alexey Bataev5e018f92015-04-23 06:35:10 +0000252// CHECK: [[MUL:%.+]] = fmul x86_fp80 [[OLD]], [[EXPR]]
Alexey Bataev5e018f92015-04-23 06:35:10 +0000253// CHECK: store x86_fp80 [[MUL]], x86_fp80* [[TEMP]]
Alexey Bataev5e018f92015-04-23 06:35:10 +0000254// CHECK: [[DESIRED:%.+]] = load i128, i128* [[BITCAST]]
255// CHECK: [[RES:%.+]] = cmpxchg i128* bitcast (x86_fp80* [[X_ADDR]] to i128*), i128 [[EXPECTED]], i128 [[DESIRED]] monotonic monotonic
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000256// CHECK: [[OLD_X:%.+]] = extractvalue { i128, i1 } [[RES]], 0
Alexey Bataev5e018f92015-04-23 06:35:10 +0000257// CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i128, i1 } [[RES]], 1
Alexey Bataev5e018f92015-04-23 06:35:10 +0000258// CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]]
259// CHECK: [[EXIT]]
260// CHECK: [[CAST:%.+]] = fptrunc x86_fp80 [[MUL]] to double
261// CHECK: store double [[CAST]], double* @{{.+}},
262#pragma omp atomic capture
263 {ldx = ldx * ldv; dv = ldx;}
264// CHECK: [[EXPR_RE:%.+]] = load i32, i32* getelementptr inbounds ({ i32, i32 }, { i32, i32 }* @{{.+}}, i32 0, i32 0)
265// CHECK: [[EXPR_IM:%.+]] = load i32, i32* getelementptr inbounds ({ i32, i32 }, { i32, i32 }* @{{.+}}, i32 0, i32 1)
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000266// CHECK: [[BITCAST:%.+]] = bitcast { i32, i32 }* [[EXPECTED_ADDR:%.+]] to i8*
Alexey Bataev5e018f92015-04-23 06:35:10 +0000267// CHECK: call void @__atomic_load(i64 8, i8* bitcast ({ i32, i32 }* [[X_ADDR:@.+]] to i8*), i8* [[BITCAST]], i32 0)
Alexey Bataev5e018f92015-04-23 06:35:10 +0000268// CHECK: br label %[[CONT:.+]]
269// CHECK: [[CONT]]
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000270// CHECK: [[LD_RE_ADDR:%.+]] = getelementptr inbounds { i32, i32 }, { i32, i32 }* [[EXPECTED_ADDR]], i32 0, i32 0
271// CHECK: [[LD_RE:%.+]] = load i32, i32* [[LD_RE_ADDR]]
272// CHECK: [[LD_IM_ADDR:%.+]] = getelementptr inbounds { i32, i32 }, { i32, i32 }* [[EXPECTED_ADDR]], i32 0, i32 1
273// CHECK: [[LD_IM:%.+]] = load i32, i32* [[LD_IM_ADDR]]
Alexey Bataev5e018f92015-04-23 06:35:10 +0000274// <Skip checks for complex calculations>
Alexey Bataev5e018f92015-04-23 06:35:10 +0000275// CHECK: [[X_RE_ADDR:%.+]] = getelementptr inbounds { i32, i32 }, { i32, i32 }* [[DESIRED_ADDR:%.+]], i32 0, i32 0
276// CHECK: [[X_IM_ADDR:%.+]] = getelementptr inbounds { i32, i32 }, { i32, i32 }* [[DESIRED_ADDR]], i32 0, i32 1
277// CHECK: store i32 [[NEW_RE:%.+]], i32* [[X_RE_ADDR]]
278// CHECK: store i32 [[NEW_IM:%.+]], i32* [[X_IM_ADDR]]
279// CHECK: [[EXPECTED:%.+]] = bitcast { i32, i32 }* [[EXPECTED_ADDR]] to i8*
280// CHECK: [[DESIRED:%.+]] = bitcast { i32, i32 }* [[DESIRED_ADDR]] to i8*
281// CHECK: [[SUCCESS_FAIL:%.+]] = call zeroext i1 @__atomic_compare_exchange(i64 8, i8* bitcast ({ i32, i32 }* [[X_ADDR]] to i8*), i8* [[EXPECTED]], i8* [[DESIRED]], i32 0, i32 0)
Alexey Bataev5e018f92015-04-23 06:35:10 +0000282// CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]]
283// CHECK: [[EXIT]]
284// CHECK: [[RE_CAST:%.+]] = sitofp i32 [[NEW_RE]] to float
285// CHECK: [[IM_CAST:%.+]] = sitofp i32 [[NEW_IM]] to float
286// CHECK: store float [[RE_CAST]], float* getelementptr inbounds ({ float, float }, { float, float }* @{{.+}}, i32 0, i32 0),
287// CHECK: store float [[IM_CAST]], float* getelementptr inbounds ({ float, float }, { float, float }* @{{.+}}, i32 0, i32 1),
288#pragma omp atomic capture
289 cfv = cix = civ / cix;
290// CHECK: [[EXPR_RE:%.+]] = load float, float* getelementptr inbounds ({ float, float }, { float, float }* @{{.+}}, i32 0, i32 0)
291// CHECK: [[EXPR_IM:%.+]] = load float, float* getelementptr inbounds ({ float, float }, { float, float }* @{{.+}}, i32 0, i32 1)
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000292// CHECK: [[BITCAST:%.+]] = bitcast { float, float }* [[EXPECTED_ADDR:%.+]] to i8*
Alexey Bataev5e018f92015-04-23 06:35:10 +0000293// CHECK: call void @__atomic_load(i64 8, i8* bitcast ({ float, float }* [[X_ADDR:@.+]] to i8*), i8* [[BITCAST]], i32 0)
Alexey Bataev5e018f92015-04-23 06:35:10 +0000294// CHECK: br label %[[CONT:.+]]
295// CHECK: [[CONT]]
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000296// CHECK: [[X_RE_ADDR:%.+]] = getelementptr inbounds { float, float }, { float, float }* [[EXPECTED_ADDR]], i32 0, i32 0
Alexey Bataev5e018f92015-04-23 06:35:10 +0000297// CHECK: [[X_RE_OLD:%.+]] = load float, float* [[X_RE_ADDR]]
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000298// CHECK: [[X_IM_ADDR:%.+]] = getelementptr inbounds { float, float }, { float, float }* [[EXPECTED_ADDR]], i32 0, i32 1
Alexey Bataev5e018f92015-04-23 06:35:10 +0000299// CHECK: [[X_IM_OLD:%.+]] = load float, float* [[X_IM_ADDR]]
300// <Skip checks for complex calculations>
Alexey Bataev5e018f92015-04-23 06:35:10 +0000301// CHECK: [[X_RE_ADDR:%.+]] = getelementptr inbounds { float, float }, { float, float }* [[DESIRED_ADDR:%.+]], i32 0, i32 0
302// CHECK: [[X_IM_ADDR:%.+]] = getelementptr inbounds { float, float }, { float, float }* [[DESIRED_ADDR]], i32 0, i32 1
303// CHECK: store float [[NEW_RE:%.+]], float* [[X_RE_ADDR]]
304// CHECK: store float [[NEW_IM:%.+]], float* [[X_IM_ADDR]]
305// CHECK: [[EXPECTED:%.+]] = bitcast { float, float }* [[EXPECTED_ADDR]] to i8*
306// CHECK: [[DESIRED:%.+]] = bitcast { float, float }* [[DESIRED_ADDR]] to i8*
307// CHECK: [[SUCCESS_FAIL:%.+]] = call zeroext i1 @__atomic_compare_exchange(i64 8, i8* bitcast ({ float, float }* [[X_ADDR]] to i8*), i8* [[EXPECTED]], i8* [[DESIRED]], i32 0, i32 0)
Alexey Bataev5e018f92015-04-23 06:35:10 +0000308// CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]]
309// CHECK: [[EXIT]]
310// CHECK: [[RE_CAST:%.+]] = fptosi float [[X_RE_OLD]] to i32
311// CHECK: [[IM_CAST:%.+]] = fptosi float [[X_IM_OLD]] to i32
312// CHECK: store i32 [[RE_CAST]], i32* getelementptr inbounds ({ i32, i32 }, { i32, i32 }* @{{.+}}, i32 0, i32 0),
313// CHECK: store i32 [[IM_CAST]], i32* getelementptr inbounds ({ i32, i32 }, { i32, i32 }* @{{.+}}, i32 0, i32 1),
314#pragma omp atomic capture
315 {civ = cfx; cfx = cfv + cfx;}
316// CHECK: [[EXPR_RE:%.+]] = load double, double* getelementptr inbounds ({ double, double }, { double, double }* @{{.+}}, i32 0, i32 0)
317// CHECK: [[EXPR_IM:%.+]] = load double, double* getelementptr inbounds ({ double, double }, { double, double }* @{{.+}}, i32 0, i32 1)
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000318// CHECK: [[BITCAST:%.+]] = bitcast { double, double }* [[EXPECTED_ADDR:%.+]] to i8*
Alexey Bataev5e018f92015-04-23 06:35:10 +0000319// CHECK: call void @__atomic_load(i64 16, i8* bitcast ({ double, double }* [[X_ADDR:@.+]] to i8*), i8* [[BITCAST]], i32 5)
Alexey Bataev5e018f92015-04-23 06:35:10 +0000320// CHECK: br label %[[CONT:.+]]
321// CHECK: [[CONT]]
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000322// CHECK: [[X_RE_ADDR:%.+]] = getelementptr inbounds { double, double }, { double, double }* [[EXPECTED_ADDR]], i32 0, i32 0
Alexey Bataev5e018f92015-04-23 06:35:10 +0000323// CHECK: [[X_RE:%.+]] = load double, double* [[X_RE_ADDR]]
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000324// CHECK: [[X_IM_ADDR:%.+]] = getelementptr inbounds { double, double }, { double, double }* [[EXPECTED_ADDR]], i32 0, i32 1
Alexey Bataev5e018f92015-04-23 06:35:10 +0000325// CHECK: [[X_IM:%.+]] = load double, double* [[X_IM_ADDR]]
326// <Skip checks for complex calculations>
Alexey Bataev5e018f92015-04-23 06:35:10 +0000327// CHECK: [[X_RE_ADDR:%.+]] = getelementptr inbounds { double, double }, { double, double }* [[DESIRED_ADDR:%.+]], i32 0, i32 0
328// CHECK: [[X_IM_ADDR:%.+]] = getelementptr inbounds { double, double }, { double, double }* [[DESIRED_ADDR]], i32 0, i32 1
329// CHECK: store double [[NEW_RE:%.+]], double* [[X_RE_ADDR]]
330// CHECK: store double [[NEW_IM:%.+]], double* [[X_IM_ADDR]]
331// CHECK: [[EXPECTED:%.+]] = bitcast { double, double }* [[EXPECTED_ADDR]] to i8*
332// CHECK: [[DESIRED:%.+]] = bitcast { double, double }* [[DESIRED_ADDR]] to i8*
333// CHECK: [[SUCCESS_FAIL:%.+]] = call zeroext i1 @__atomic_compare_exchange(i64 16, i8* bitcast ({ double, double }* [[X_ADDR]] to i8*), i8* [[EXPECTED]], i8* [[DESIRED]], i32 5, i32 5)
Alexey Bataev5e018f92015-04-23 06:35:10 +0000334// CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]]
335// CHECK: [[EXIT]]
336// CHECK: [[RE_CAST:%.+]] = fptrunc double [[NEW_RE]] to float
337// CHECK: [[IM_CAST:%.+]] = fptrunc double [[NEW_IM]] to float
338// CHECK: store float [[RE_CAST]], float* getelementptr inbounds ({ float, float }, { float, float }* @{{.+}}, i32 0, i32 0),
339// CHECK: store float [[IM_CAST]], float* getelementptr inbounds ({ float, float }, { float, float }* @{{.+}}, i32 0, i32 1),
340// CHECK: call{{.*}} @__kmpc_flush(
341#pragma omp atomic capture seq_cst
342 {cdx = cdx - cdv; cfv = cdx;}
343// CHECK: [[BV:%.+]] = load i8, i8* @{{.+}}
344// CHECK: [[BOOL:%.+]] = trunc i8 [[BV]] to i1
345// CHECK: [[EXPR:%.+]] = zext i1 [[BOOL]] to i64
346// CHECK: [[OLD:%.+]] = atomicrmw and i64* @{{.+}}, i64 [[EXPR]] monotonic
347// CHECK: [[DESIRED:%.+]] = and i64 [[OLD]], [[EXPR]]
348// CHECK: store i64 [[DESIRED]], i64* @{{.+}},
349#pragma omp atomic capture
350 ulv = ulx = ulx & bv;
351// CHECK: [[CV:%.+]] = load i8, i8* @{{.+}}, align 1
352// CHECK: [[EXPR:%.+]] = sext i8 [[CV]] to i32
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000353// CHECK: [[X:%.+]] = load atomic i8, i8* [[BX_ADDR:@.+]] monotonic
Alexey Bataev5e018f92015-04-23 06:35:10 +0000354// CHECK: br label %[[CONT:.+]]
355// CHECK: [[CONT]]
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000356// CHECK: [[EXPECTED:%.+]] = phi i8 [ [[X]], %{{.+}} ], [ [[OLD_X:%.+]], %[[CONT]] ]
357// CHECK: [[OLD_BOOL:%.+]] = trunc i8 [[EXPECTED]] to i1
Alexey Bataev5e018f92015-04-23 06:35:10 +0000358// CHECK: [[X_RVAL:%.+]] = zext i1 [[OLD_BOOL]] to i32
359// CHECK: [[AND:%.+]] = and i32 [[EXPR]], [[X_RVAL]]
360// CHECK: [[CAST:%.+]] = icmp ne i32 [[AND]], 0
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000361// CHECK: [[NEW:%.+]] = zext i1 [[CAST]] to i8
362// CHECK: store i8 [[NEW]], i8* [[TEMP:%.+]],
363// CHECK: [[DESIRED:%.+]] = load i8, i8* [[TEMP]],
Alexey Bataev5e018f92015-04-23 06:35:10 +0000364// CHECK: [[RES:%.+]] = cmpxchg i8* [[BX_ADDR]], i8 [[EXPECTED]], i8 [[DESIRED]] monotonic monotonic
365// CHECK: [[OLD:%.+]] = extractvalue { i8, i1 } [[RES]], 0
366// CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i8, i1 } [[RES]], 1
Alexey Bataev5e018f92015-04-23 06:35:10 +0000367// CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]]
368// CHECK: [[EXIT]]
369// CHECK: [[OLD_I8:%.+]] = zext i1 [[OLD_BOOL]] to i8
370// CHECK: store i8 [[OLD_I8]], i8* @{{.+}},
371#pragma omp atomic capture
372 {bv = bx; bx = cv & bx;}
373// CHECK: [[UCV:%.+]] = load i8, i8* @{{.+}},
374// CHECK: [[EXPR:%.+]] = zext i8 [[UCV]] to i32
375// CHECK: [[X:%.+]] = load atomic i8, i8* [[CX_ADDR:@.+]] seq_cst
376// CHECK: br label %[[CONT:.+]]
377// CHECK: [[CONT]]
378// CHECK: [[EXPECTED:%.+]] = phi i8 [ [[X]], %{{.+}} ], [ [[OLD_X:%.+]], %[[CONT]] ]
379// CHECK: [[X_RVAL:%.+]] = sext i8 [[EXPECTED]] to i32
380// CHECK: [[ASHR:%.+]] = ashr i32 [[X_RVAL]], [[EXPR]]
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000381// CHECK: [[NEW:%.+]] = trunc i32 [[ASHR]] to i8
382// CHECK: store i8 [[NEW]], i8* [[TEMP:%.+]],
383// CHECK: [[DESIRED:%.+]] = load i8, i8* [[TEMP]],
Alexey Bataev5e018f92015-04-23 06:35:10 +0000384// CHECK: [[RES:%.+]] = cmpxchg i8* [[CX_ADDR]], i8 [[EXPECTED]], i8 [[DESIRED]] seq_cst seq_cst
385// CHECK: [[OLD_X:%.+]] = extractvalue { i8, i1 } [[RES]], 0
386// CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i8, i1 } [[RES]], 1
387// CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]]
388// CHECK: [[EXIT]]
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000389// CHECK: store i8 [[NEW]], i8* @{{.+}},
Alexey Bataev5e018f92015-04-23 06:35:10 +0000390// CHECK: call{{.*}} @__kmpc_flush(
391#pragma omp atomic capture, seq_cst
392 {cx = cx >> ucv; cv = cx;}
393// CHECK: [[SV:%.+]] = load i16, i16* @{{.+}},
394// CHECK: [[EXPR:%.+]] = sext i16 [[SV]] to i32
395// CHECK: [[X:%.+]] = load atomic i64, i64* [[ULX_ADDR:@.+]] monotonic
396// CHECK: br label %[[CONT:.+]]
397// CHECK: [[CONT]]
398// CHECK: [[EXPECTED:%.+]] = phi i64 [ [[X]], %{{.+}} ], [ [[OLD_X:%.+]], %[[CONT]] ]
399// CHECK: [[X_RVAL:%.+]] = trunc i64 [[EXPECTED]] to i32
400// CHECK: [[SHL:%.+]] = shl i32 [[EXPR]], [[X_RVAL]]
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000401// CHECK: [[NEW:%.+]] = sext i32 [[SHL]] to i64
402// CHECK: store i64 [[NEW]], i64* [[TEMP:%.+]],
403// CHECK: [[DESIRED:%.+]] = load i64, i64* [[TEMP]],
Alexey Bataev5e018f92015-04-23 06:35:10 +0000404// CHECK: [[RES:%.+]] = cmpxchg i64* [[ULX_ADDR]], i64 [[EXPECTED]], i64 [[DESIRED]] monotonic monotonic
405// CHECK: [[OLD_X:%.+]] = extractvalue { i64, i1 } [[RES]], 0
406// CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i64, i1 } [[RES]], 1
407// CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]]
408// CHECK: [[EXIT]]
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000409// CHECK: store i64 [[NEW]], i64* @{{.+}},
Alexey Bataev5e018f92015-04-23 06:35:10 +0000410#pragma omp atomic capture
411 ulv = ulx = sv << ulx;
412// CHECK: [[USV:%.+]] = load i16, i16* @{{.+}},
413// CHECK: [[EXPR:%.+]] = zext i16 [[USV]] to i64
414// CHECK: [[X:%.+]] = load atomic i64, i64* [[LX_ADDR:@.+]] monotonic
415// CHECK: br label %[[CONT:.+]]
416// CHECK: [[CONT]]
417// CHECK: [[EXPECTED:%.+]] = phi i64 [ [[X]], %{{.+}} ], [ [[OLD_X:%.+]], %[[CONT]] ]
418// CHECK: [[DESIRED:%.+]] = srem i64 [[EXPECTED]], [[EXPR]]
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000419// CHECK: store i64 [[DESIRED]], i64* [[TEMP:%.+]],
420// CHECK: [[DESIRED:%.+]] = load i64, i64* [[TEMP]],
Alexey Bataev5e018f92015-04-23 06:35:10 +0000421// CHECK: [[RES:%.+]] = cmpxchg i64* [[LX_ADDR]], i64 [[EXPECTED]], i64 [[DESIRED]] monotonic monotonic
422// CHECK: [[OLD_X:%.+]] = extractvalue { i64, i1 } [[RES]], 0
423// CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i64, i1 } [[RES]], 1
424// CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]]
425// CHECK: [[EXIT]]
426// CHECK: store i64 [[EXPECTED]], i64* @{{.+}},
427#pragma omp atomic capture
428 {lv = lx; lx = lx % usv;}
429// CHECK: [[EXPR:%.+]] = load i32, i32* @{{.+}}
430// CHECK: [[OLD:%.+]] = atomicrmw or i32* @{{.+}}, i32 [[EXPR]] seq_cst
431// CHECK: [[DESIRED:%.+]] = or i32 [[EXPR]], [[OLD]]
432// CHECK: store i32 [[DESIRED]], i32* @{{.+}},
433// CHECK: call{{.*}} @__kmpc_flush(
434#pragma omp atomic seq_cst, capture
435 {uix = iv | uix; uiv = uix;}
436// CHECK: [[EXPR:%.+]] = load i32, i32* @{{.+}}
437// CHECK: [[OLD:%.+]] = atomicrmw and i32* @{{.+}}, i32 [[EXPR]] monotonic
438// CHECK: [[DESIRED:%.+]] = and i32 [[OLD]], [[EXPR]]
439// CHECK: store i32 [[DESIRED]], i32* @{{.+}},
440#pragma omp atomic capture
441 iv = ix = ix & uiv;
442// CHECK: [[EXPR:%.+]] = load i64, i64* @{{.+}},
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000443// CHECK: [[BITCAST:%.+]] = bitcast { i32, i32 }* [[EXPECTED_ADDR:%.+]] to i8*
Alexey Bataev5e018f92015-04-23 06:35:10 +0000444// CHECK: call void @__atomic_load(i64 8, i8* bitcast ({ i32, i32 }* [[X_ADDR:@.+]] to i8*), i8* [[BITCAST]], i32 0)
Alexey Bataev5e018f92015-04-23 06:35:10 +0000445// CHECK: br label %[[CONT:.+]]
446// CHECK: [[CONT]]
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000447// CHECK: [[X_RE_ADDR:%.+]] = getelementptr inbounds { i32, i32 }, { i32, i32 }* [[EXPECTED_ADDR]], i32 0, i32 0
Alexey Bataev5e018f92015-04-23 06:35:10 +0000448// CHECK: [[OLD_RE:%.+]] = load i32, i32* [[X_RE_ADDR]]
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000449// CHECK: [[X_IM_ADDR:%.+]] = getelementptr inbounds { i32, i32 }, { i32, i32 }* [[EXPECTED_ADDR]], i32 0, i32 1
Alexey Bataev5e018f92015-04-23 06:35:10 +0000450// CHECK: [[OLD_IM:%.+]] = load i32, i32* [[X_IM_ADDR]]
451// <Skip checks for complex calculations>
Alexey Bataev5e018f92015-04-23 06:35:10 +0000452// CHECK: [[X_RE_ADDR:%.+]] = getelementptr inbounds { i32, i32 }, { i32, i32 }* [[DESIRED_ADDR:%.+]], i32 0, i32 0
453// CHECK: [[X_IM_ADDR:%.+]] = getelementptr inbounds { i32, i32 }, { i32, i32 }* [[DESIRED_ADDR]], i32 0, i32 1
454// CHECK: store i32 %{{.+}}, i32* [[X_RE_ADDR]]
455// CHECK: store i32 %{{.+}}, i32* [[X_IM_ADDR]]
456// CHECK: [[EXPECTED:%.+]] = bitcast { i32, i32 }* [[EXPECTED_ADDR]] to i8*
457// CHECK: [[DESIRED:%.+]] = bitcast { i32, i32 }* [[DESIRED_ADDR]] to i8*
458// CHECK: [[SUCCESS_FAIL:%.+]] = call zeroext i1 @__atomic_compare_exchange(i64 8, i8* bitcast ({ i32, i32 }* [[X_ADDR]] to i8*), i8* [[EXPECTED]], i8* [[DESIRED]], i32 0, i32 0)
Alexey Bataev5e018f92015-04-23 06:35:10 +0000459// CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]]
460// CHECK: [[EXIT]]
461// CHECK: store i32 [[OLD_RE]], i32* getelementptr inbounds ({ i32, i32 }, { i32, i32 }* @{{.+}}, i32 0, i32 0),
462// CHECK: store i32 [[OLD_IM]], i32* getelementptr inbounds ({ i32, i32 }, { i32, i32 }* @{{.+}}, i32 0, i32 1),
463#pragma omp atomic capture
464 {civ = cix; cix = lv + cix;}
465// CHECK: [[ULV:%.+]] = load i64, i64* @{{.+}},
466// CHECK: [[EXPR:%.+]] = uitofp i64 [[ULV]] to float
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000467// CHECK: [[X:%.+]] = load atomic i32, i32* bitcast (float* [[X_ADDR:@.+]] to i32*) monotonic
Alexey Bataev5e018f92015-04-23 06:35:10 +0000468// CHECK: br label %[[CONT:.+]]
469// CHECK: [[CONT]]
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000470// CHECK: [[EXPECTED:%.+]] = phi i32 [ [[X]], %{{.+}} ], [ [[OLD_X:%.+]], %[[CONT]] ]
471// CHECK: [[TEMP_I:%.+]] = bitcast float* [[TEMP:%.+]] to i32*
472// CHECK: [[OLD:%.+]] = bitcast i32 [[EXPECTED]] to float
Alexey Bataev5e018f92015-04-23 06:35:10 +0000473// CHECK: [[MUL:%.+]] = fmul float [[OLD]], [[EXPR]]
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000474// CHECK: store float [[MUL]], float* [[TEMP]],
475// CHECK: [[DESIRED:%.+]] = load i32, i32* [[TEMP_I]],
Alexey Bataev5e018f92015-04-23 06:35:10 +0000476// CHECK: [[RES:%.+]] = cmpxchg i32* bitcast (float* [[X_ADDR]] to i32*), i32 [[EXPECTED]], i32 [[DESIRED]] monotonic monotonic
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000477// CHECK: [[OLD_X:%.+]] = extractvalue { i32, i1 } [[RES]], 0
Alexey Bataev5e018f92015-04-23 06:35:10 +0000478// CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i32, i1 } [[RES]], 1
Alexey Bataev5e018f92015-04-23 06:35:10 +0000479// CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]]
480// CHECK: [[EXIT]]
481// CHECK: store float [[MUL]], float* @{{.+}},
482#pragma omp atomic capture
483 {fx = fx * ulv; fv = fx;}
484// CHECK: [[LLV:%.+]] = load i64, i64* @{{.+}},
485// CHECK: [[EXPR:%.+]] = sitofp i64 [[LLV]] to double
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000486// CHECK: [[X:%.+]] = load atomic i64, i64* bitcast (double* [[X_ADDR:@.+]] to i64*) monotonic
Alexey Bataev5e018f92015-04-23 06:35:10 +0000487// CHECK: br label %[[CONT:.+]]
488// CHECK: [[CONT]]
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000489// CHECK: [[EXPECTED:%.+]] = phi i64 [ [[X]], %{{.+}} ], [ [[OLD_X:%.+]], %[[CONT]] ]
490// CHECK: [[TEMP_I:%.+]] = bitcast double* [[TEMP:%.+]] to i64*
491// CHECK: [[OLD:%.+]] = bitcast i64 [[EXPECTED]] to double
Alexey Bataev5e018f92015-04-23 06:35:10 +0000492// CHECK: [[DIV:%.+]] = fdiv double [[OLD]], [[EXPR]]
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000493// CHECK: store double [[DIV]], double* [[TEMP]],
494// CHECK: [[DESIRED:%.+]] = load i64, i64* [[TEMP_I]],
Alexey Bataev5e018f92015-04-23 06:35:10 +0000495// CHECK: [[RES:%.+]] = cmpxchg i64* bitcast (double* [[X_ADDR]] to i64*), i64 [[EXPECTED]], i64 [[DESIRED]] monotonic monotonic
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000496// CHECK: [[OLD_X:%.+]] = extractvalue { i64, i1 } [[RES]], 0
Alexey Bataev5e018f92015-04-23 06:35:10 +0000497// CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i64, i1 } [[RES]], 1
Alexey Bataev5e018f92015-04-23 06:35:10 +0000498// CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]]
499// CHECK: [[EXIT]]
500// CHECK: store double [[DIV]], double* @{{.+}},
501#pragma omp atomic capture
502 dv = dx /= llv;
503// CHECK: [[ULLV:%.+]] = load i64, i64* @{{.+}},
504// CHECK: [[EXPR:%.+]] = uitofp i64 [[ULLV]] to x86_fp80
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000505// CHECK: [[X:%.+]] = load atomic i128, i128* bitcast (x86_fp80* [[X_ADDR:@.+]] to i128*) monotonic
Alexey Bataev5e018f92015-04-23 06:35:10 +0000506// CHECK: br label %[[CONT:.+]]
507// CHECK: [[CONT]]
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000508// CHECK: [[EXPECTED:%.+]] = phi i128 [ [[X]], %{{.+}} ], [ [[OLD_X:%.+]], %[[CONT]] ]
509// CHECK: [[TEMP_I1:%.+]] = bitcast x86_fp80* [[TEMP1:%.+]] to i128*
510// CHECK: store i128 [[EXPECTED]], i128* [[TEMP_I1]],
511// CHECK: [[TEMP_I:%.+]] = bitcast x86_fp80* [[TEMP:%.+]] to i128*
512// CHECK: store i128 [[EXPECTED]], i128* [[TEMP_I]],
513// CHECK: [[OLD:%.+]] = load x86_fp80, x86_fp80* [[TEMP]],
Alexey Bataev5e018f92015-04-23 06:35:10 +0000514// CHECK: [[SUB:%.+]] = fsub x86_fp80 [[OLD]], [[EXPR]]
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000515// CHECK: store x86_fp80 [[SUB]], x86_fp80* [[TEMP1]]
516// CHECK: [[DESIRED:%.+]] = load i128, i128* [[TEMP_I1]]
Alexey Bataev5e018f92015-04-23 06:35:10 +0000517// CHECK: [[RES:%.+]] = cmpxchg i128* bitcast (x86_fp80* [[X_ADDR]] to i128*), i128 [[EXPECTED]], i128 [[DESIRED]] monotonic monotonic
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000518// CHECK: [[OLD_X:%.+]] = extractvalue { i128, i1 } [[RES]], 0
Alexey Bataev5e018f92015-04-23 06:35:10 +0000519// CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i128, i1 } [[RES]], 1
Alexey Bataev5e018f92015-04-23 06:35:10 +0000520// CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]]
521// CHECK: [[EXIT]]
522// CHECK: store x86_fp80 [[OLD]], x86_fp80* @{{.+}},
523#pragma omp atomic capture
524 {ldv = ldx; ldx -= ullv;}
525// CHECK: [[EXPR:%.+]] = load float, float* @{{.+}},
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000526// CHECK: [[BITCAST:%.+]] = bitcast { i32, i32 }* [[EXPECTED_ADDR:%.+]] to i8*
Alexey Bataev5e018f92015-04-23 06:35:10 +0000527// CHECK: call void @__atomic_load(i64 8, i8* bitcast ({ i32, i32 }* [[X_ADDR:@.+]] to i8*), i8* [[BITCAST]], i32 0)
Alexey Bataev5e018f92015-04-23 06:35:10 +0000528// CHECK: br label %[[CONT:.+]]
529// CHECK: [[CONT]]
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000530// CHECK: [[X_RE_ADDR:%.+]] = getelementptr inbounds { i32, i32 }, { i32, i32 }* [[EXPECTED_ADDR]], i32 0, i32 0
Alexey Bataev5e018f92015-04-23 06:35:10 +0000531// CHECK: [[X_RE:%.+]] = load i32, i32* [[X_RE_ADDR]]
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000532// CHECK: [[X_IM_ADDR:%.+]] = getelementptr inbounds { i32, i32 }, { i32, i32 }* [[EXPECTED_ADDR]], i32 0, i32 1
Alexey Bataev5e018f92015-04-23 06:35:10 +0000533// CHECK: [[X_IM:%.+]] = load i32, i32* [[X_IM_ADDR]]
534// <Skip checks for complex calculations>
Alexey Bataev5e018f92015-04-23 06:35:10 +0000535// CHECK: [[X_RE_ADDR:%.+]] = getelementptr inbounds { i32, i32 }, { i32, i32 }* [[DESIRED_ADDR:%.+]], i32 0, i32 0
536// CHECK: [[X_IM_ADDR:%.+]] = getelementptr inbounds { i32, i32 }, { i32, i32 }* [[DESIRED_ADDR]], i32 0, i32 1
537// CHECK: store i32 [[NEW_RE:%.+]], i32* [[X_RE_ADDR]]
538// CHECK: store i32 [[NEW_IM:%.+]], i32* [[X_IM_ADDR]]
539// CHECK: [[EXPECTED:%.+]] = bitcast { i32, i32 }* [[EXPECTED_ADDR]] to i8*
540// CHECK: [[DESIRED:%.+]] = bitcast { i32, i32 }* [[DESIRED_ADDR]] to i8*
541// CHECK: [[SUCCESS_FAIL:%.+]] = call zeroext i1 @__atomic_compare_exchange(i64 8, i8* bitcast ({ i32, i32 }* [[X_ADDR]] to i8*), i8* [[EXPECTED]], i8* [[DESIRED]], i32 0, i32 0)
Alexey Bataev5e018f92015-04-23 06:35:10 +0000542// CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]]
543// CHECK: [[EXIT]]
544// CHECK: store i32 [[NEW_RE]], i32* getelementptr inbounds ({ i32, i32 }, { i32, i32 }* @{{.+}}, i32 0, i32 0),
545// CHECK: store i32 [[NEW_IM]], i32* getelementptr inbounds ({ i32, i32 }, { i32, i32 }* @{{.+}}, i32 0, i32 1),
546#pragma omp atomic capture
547 {cix = fv / cix; civ = cix;}
548// CHECK: [[EXPR:%.+]] = load double, double* @{{.+}},
549// CHECK: [[X:%.+]] = load atomic i16, i16* [[X_ADDR:@.+]] monotonic
550// CHECK: br label %[[CONT:.+]]
551// CHECK: [[CONT]]
552// CHECK: [[EXPECTED:%.+]] = phi i16 [ [[X]], %{{.+}} ], [ [[OLD_X:%.+]], %[[CONT]] ]
553// CHECK: [[CONV:%.+]] = sext i16 [[EXPECTED]] to i32
554// CHECK: [[X_RVAL:%.+]] = sitofp i32 [[CONV]] to double
555// CHECK: [[ADD:%.+]] = fadd double [[X_RVAL]], [[EXPR]]
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000556// CHECK: [[NEW:%.+]] = fptosi double [[ADD]] to i16
557// CHECK: store i16 [[NEW]], i16* [[TEMP:%.+]],
558// CHECK: [[DESIRED:%.+]] = load i16, i16* [[TEMP]],
Alexey Bataev5e018f92015-04-23 06:35:10 +0000559// CHECK: [[RES:%.+]] = cmpxchg i16* [[X_ADDR]], i16 [[EXPECTED]], i16 [[DESIRED]] monotonic monotonic
560// CHECK: [[OLD_X]] = extractvalue { i16, i1 } [[RES]], 0
561// CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i16, i1 } [[RES]], 1
562// CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]]
563// CHECK: [[EXIT]]
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000564// CHECK: store i16 [[NEW]], i16* @{{.+}},
Alexey Bataev5e018f92015-04-23 06:35:10 +0000565#pragma omp atomic capture
566 sv = sx = sx + dv;
567// CHECK: [[EXPR:%.+]] = load x86_fp80, x86_fp80* @{{.+}},
568// CHECK: [[XI8:%.+]] = load atomic i8, i8* [[X_ADDR:@.+]] monotonic
Alexey Bataev5e018f92015-04-23 06:35:10 +0000569// CHECK: br label %[[CONT:.+]]
570// CHECK: [[CONT]]
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000571// CHECK: [[EXPECTED:%.+]] = phi i8 [ [[XI8]], %{{.+}} ], [ [[OLD_X:%.+]], %[[CONT]] ]
572// CHECK: [[BOOL_EXPECTED:%.+]] = trunc i8 [[EXPECTED]] to i1
Alexey Bataev5e018f92015-04-23 06:35:10 +0000573// CHECK: [[CONV:%.+]] = zext i1 [[BOOL_EXPECTED]] to i32
574// CHECK: [[X_RVAL:%.+]] = sitofp i32 [[CONV]] to x86_fp80
575// CHECK: [[MUL:%.+]] = fmul x86_fp80 [[EXPR]], [[X_RVAL]]
576// CHECK: [[BOOL_DESIRED:%.+]] = fcmp une x86_fp80 [[MUL]], 0xK00000000000000000000
Alexey Bataev5e018f92015-04-23 06:35:10 +0000577// CHECK: [[DESIRED:%.+]] = zext i1 [[BOOL_DESIRED]] to i8
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000578// CHECK: store i8 [[DESIRED]], i8* [[TEMP:%.+]],
579// CHECK: [[DESIRED:%.+]] = load i8, i8* [[TEMP]],
Alexey Bataev5e018f92015-04-23 06:35:10 +0000580// CHECK: [[RES:%.+]] = cmpxchg i8* [[X_ADDR]], i8 [[EXPECTED]], i8 [[DESIRED]] monotonic monotonic
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000581// CHECK: [[OLD_X:%.+]] = extractvalue { i8, i1 } [[RES]], 0
Alexey Bataev5e018f92015-04-23 06:35:10 +0000582// CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i8, i1 } [[RES]], 1
Alexey Bataev5e018f92015-04-23 06:35:10 +0000583// CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]]
584// CHECK: [[EXIT]]
585// CHECK: [[EXPECTED_I8:%.+]] = zext i1 [[BOOL_EXPECTED]] to i8
586// CHECK: store i8 [[EXPECTED_I8]], i8* @{{.+}},
587#pragma omp atomic capture
588 {bv = bx; bx = ldv * bx;}
589// CHECK: [[EXPR_RE:%.+]] = load i32, i32* getelementptr inbounds ({ i32, i32 }, { i32, i32 }* [[CIV_ADDR:@.+]], i32 0, i32 0),
590// CHECK: [[EXPR_IM:%.+]] = load i32, i32* getelementptr inbounds ({ i32, i32 }, { i32, i32 }* [[CIV_ADDR]], i32 0, i32 1),
591// CHECK: [[XI8:%.+]] = load atomic i8, i8* [[X_ADDR:@.+]] monotonic
Alexey Bataev5e018f92015-04-23 06:35:10 +0000592// CHECK: br label %[[CONT:.+]]
593// CHECK: [[CONT]]
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000594// CHECK: [[EXPECTED:%.+]] = phi i8 [ [[XI8]], %{{.+}} ], [ [[OLD_X:%.+]], %[[CONT]] ]
595// CHECK: [[BOOL_EXPECTED:%.+]] = trunc i8 [[EXPECTED]] to i1
Alexey Bataev5e018f92015-04-23 06:35:10 +0000596// CHECK: [[X_RVAL:%.+]] = zext i1 [[BOOL_EXPECTED]] to i32
597// CHECK: [[SUB_RE:%.+]] = sub i32 [[EXPR_RE:%.+]], [[X_RVAL]]
598// CHECK: [[SUB_IM:%.+]] = sub i32 [[EXPR_IM:%.+]], 0
599// CHECK: icmp ne i32 [[SUB_RE]], 0
600// CHECK: icmp ne i32 [[SUB_IM]], 0
601// CHECK: [[BOOL_DESIRED:%.+]] = or i1
Alexey Bataev5e018f92015-04-23 06:35:10 +0000602// CHECK: [[DESIRED:%.+]] = zext i1 [[BOOL_DESIRED]] to i8
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000603// CHECK: store i8 [[DESIRED]], i8* [[TEMP:%.+]],
604// CHECK: [[DESIRED:%.+]] = load i8, i8* [[TEMP]],
Alexey Bataev5e018f92015-04-23 06:35:10 +0000605// CHECK: [[RES:%.+]] = cmpxchg i8* [[X_ADDR]], i8 [[EXPECTED]], i8 [[DESIRED]] monotonic monotonic
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000606// CHECK: [[OLD_X:%.+]] = extractvalue { i8, i1 } [[RES]], 0
Alexey Bataev5e018f92015-04-23 06:35:10 +0000607// CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i8, i1 } [[RES]], 1
Alexey Bataev5e018f92015-04-23 06:35:10 +0000608// CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]]
609// CHECK: [[EXIT]]
610// CHECK: [[DESIRED_I8:%.+]] = zext i1 [[BOOL_DESIRED]] to i8
611// CHECK: store i8 [[DESIRED_I8]], i8* @{{.+}},
612#pragma omp atomic capture
613 {bx = civ - bx; bv = bx;}
614// CHECK: [[EXPR_RE:%.+]] = load float, float* getelementptr inbounds ({ float, float }, { float, float }* @{{.+}}, i32 0, i32 0)
615// CHECK: [[EXPR_IM:%.+]] = load float, float* getelementptr inbounds ({ float, float }, { float, float }* @{{.+}}, i32 0, i32 1)
616// CHECK: [[X:%.+]] = load atomic i16, i16* [[X_ADDR:@.+]] monotonic
617// CHECK: br label %[[CONT:.+]]
618// CHECK: [[CONT]]
619// CHECK: [[EXPECTED:%.+]] = phi i16 [ [[X]], %{{.+}} ], [ [[OLD_X:%.+]], %[[CONT]] ]
620// CHECK: [[CONV:%.+]] = zext i16 [[EXPECTED]] to i32
621// CHECK: [[X_RVAL:%.+]] = sitofp i32 [[CONV]] to float
622// <Skip checks for complex calculations>
623// CHECK: [[X_RE_ADDR:%.+]] = getelementptr inbounds { float, float }, { float, float }* [[TEMP:%.+]], i32 0, i32 0
624// CHECK: [[X_RE:%.+]] = load float, float* [[X_RE_ADDR]]
625// CHECK: [[X_IM_ADDR:%.+]] = getelementptr inbounds { float, float }, { float, float }* [[TEMP]], i32 0, i32 1
626// CHECK: [[X_IM:%.+]] = load float, float* [[X_IM_ADDR]]
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000627// CHECK: [[NEW:%.+]] = fptoui float [[X_RE]] to i16
628// CHECK: store i16 [[NEW]], i16* [[TEMP:%.+]],
629// CHECK: [[DESIRED:%.+]] = load i16, i16* [[TEMP]],
Alexey Bataev5e018f92015-04-23 06:35:10 +0000630// CHECK: [[RES:%.+]] = cmpxchg i16* [[X_ADDR]], i16 [[EXPECTED]], i16 [[DESIRED]] monotonic monotonic
631// CHECK: [[OLD_X]] = extractvalue { i16, i1 } [[RES]], 0
632// CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i16, i1 } [[RES]], 1
633// CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]]
634// CHECK: [[EXIT]]
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000635// CHECK: store i16 [[NEW]], i16* @{{.+}},
Alexey Bataev5e018f92015-04-23 06:35:10 +0000636#pragma omp atomic capture
637 usv = usx /= cfv;
638// CHECK: [[EXPR_RE:%.+]] = load double, double* getelementptr inbounds ({ double, double }, { double, double }* @{{.+}}, i32 0, i32 0)
639// CHECK: [[EXPR_IM:%.+]] = load double, double* getelementptr inbounds ({ double, double }, { double, double }* @{{.+}}, i32 0, i32 1)
640// CHECK: [[X:%.+]] = load atomic i64, i64* [[X_ADDR:@.+]] monotonic
641// CHECK: br label %[[CONT:.+]]
642// CHECK: [[CONT]]
643// CHECK: [[EXPECTED:%.+]] = phi i64 [ [[X]], %{{.+}} ], [ [[OLD_X:%.+]], %[[CONT]] ]
644// CHECK: [[X_RVAL:%.+]] = sitofp i64 [[EXPECTED]] to double
645// CHECK: [[ADD_RE:%.+]] = fadd double [[X_RVAL]], [[EXPR_RE]]
646// CHECK: [[ADD_IM:%.+]] = fadd double 0.000000e+00, [[EXPR_IM]]
647// CHECK: [[DESIRED:%.+]] = fptosi double [[ADD_RE]] to i64
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000648// CHECK: store i64 [[DESIRED]], i64* [[TEMP:%.+]],
649// CHECK: [[DESIRED:%.+]] = load i64, i64* [[TEMP]],
Alexey Bataev5e018f92015-04-23 06:35:10 +0000650// CHECK: [[RES:%.+]] = cmpxchg i64* [[X_ADDR]], i64 [[EXPECTED]], i64 [[DESIRED]] monotonic monotonic
651// CHECK: [[OLD_X]] = extractvalue { i64, i1 } [[RES]], 0
652// CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i64, i1 } [[RES]], 1
653// CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]]
654// CHECK: [[EXIT]]
655// CHECK: store i64 [[EXPECTED]], i64* @{{.+}},
656#pragma omp atomic capture
657 {llv = llx; llx += cdv;}
658// CHECK: [[IDX:%.+]] = load i16, i16* @{{.+}}
659// CHECK: load i8, i8*
660// CHECK: [[VEC_ITEM_VAL:%.+]] = zext i1 %{{.+}} to i32
661// CHECK: [[I128VAL:%.+]] = load atomic i128, i128* bitcast (<4 x i32>* [[DEST:@.+]] to i128*) monotonic
Alexey Bataev5e018f92015-04-23 06:35:10 +0000662// CHECK: br label %[[CONT:.+]]
663// CHECK: [[CONT]]
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000664// CHECK: [[OLD_I128:%.+]] = phi i128 [ [[I128VAL]], %{{.+}} ], [ [[FAILED_OLD_VAL:%.+]], %[[CONT]] ]
665// CHECK: [[TEMP_I:%.+]] = bitcast <4 x i32>* [[TEMP:%.+]] to i128*
666// CHECK: store i128 [[OLD_I128]], i128* [[TEMP_I]],
667// CHECK: [[LD:%.+]] = bitcast i128 [[OLD_I128]] to <4 x i32>
668// CHECK: store <4 x i32> [[LD]], <4 x i32>* [[TEMP1:%.+]],
669// CHECK: [[VEC_VAL:%.+]] = load <4 x i32>, <4 x i32>* [[TEMP1]]
Alexey Bataev5e018f92015-04-23 06:35:10 +0000670// CHECK: [[ITEM:%.+]] = extractelement <4 x i32> [[VEC_VAL]], i16 [[IDX]]
671// CHECK: [[OR:%.+]] = or i32 [[ITEM]], [[VEC_ITEM_VAL]]
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000672// CHECK: [[VEC_VAL:%.+]] = load <4 x i32>, <4 x i32>* [[TEMP]]
Alexey Bataev5e018f92015-04-23 06:35:10 +0000673// CHECK: [[NEW_VEC_VAL:%.+]] = insertelement <4 x i32> [[VEC_VAL]], i32 [[OR]], i16 [[IDX]]
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000674// CHECK: store <4 x i32> [[NEW_VEC_VAL]], <4 x i32>* [[TEMP]]
675// CHECK: [[NEW_I128:%.+]] = load i128, i128* [[TEMP_I]],
Alexey Bataev5e018f92015-04-23 06:35:10 +0000676// CHECK: [[RES:%.+]] = cmpxchg i128* bitcast (<4 x i32>* [[DEST]] to i128*), i128 [[OLD_I128]], i128 [[NEW_I128]] monotonic monotonic
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000677// CHECK: [[FAILED_OLD_VAL:%.+]] = extractvalue { i128, i1 } [[RES]], 0
Alexey Bataev5e018f92015-04-23 06:35:10 +0000678// CHECK: [[FAIL_SUCCESS:%.+]] = extractvalue { i128, i1 } [[RES]], 1
Alexey Bataev5e018f92015-04-23 06:35:10 +0000679// CHECK: br i1 [[FAIL_SUCCESS]], label %[[EXIT:.+]], label %[[CONT]]
680// CHECK: [[EXIT]]
681// CHECK: store i32 [[OR]], i32* @{{.+}},
682#pragma omp atomic capture
683 {int4x[sv] |= bv; iv = int4x[sv];}
684// CHECK: [[EXPR:%.+]] = load x86_fp80, x86_fp80* @{{.+}}
685// CHECK: [[PREV_VALUE:%.+]] = load atomic i32, i32* bitcast (i8* getelementptr (i8, i8* bitcast (%struct.BitFields* @{{.+}} to i8*), i64 4) to i32*) monotonic
686// CHECK: br label %[[CONT:.+]]
687// CHECK: [[CONT]]
688// CHECK: [[OLD_BF_VALUE:%.+]] = phi i32 [ [[PREV_VALUE]], %[[EXIT]] ], [ [[FAILED_OLD_VAL:%.+]], %[[CONT]] ]
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000689// CHECK: store i32 [[OLD_BF_VALUE]], i32* [[TEMP1:%.+]],
Alexey Bataev5e018f92015-04-23 06:35:10 +0000690// CHECK: store i32 [[OLD_BF_VALUE]], i32* [[TEMP:%.+]],
691// CHECK: [[A_LD:%.+]] = load i32, i32* [[TEMP]],
692// CHECK: [[A_SHL:%.+]] = shl i32 [[A_LD]], 1
693// CHECK: [[A_ASHR:%.+]] = ashr i32 [[A_SHL]], 1
694// CHECK: [[X_RVAL:%.+]] = sitofp i32 [[A_ASHR]] to x86_fp80
695// CHECK: [[SUB:%.+]] = fsub x86_fp80 [[X_RVAL]], [[EXPR]]
696// CHECK: [[CONV:%.+]] = fptosi x86_fp80 [[SUB]] to i32
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000697// CHECK: [[NEW_VAL:%.+]] = load i32, i32* [[TEMP1]],
Alexey Bataev5e018f92015-04-23 06:35:10 +0000698// CHECK: [[BF_VALUE:%.+]] = and i32 [[CONV]], 2147483647
699// CHECK: [[BF_CLEAR:%.+]] = and i32 [[NEW_VAL]], -2147483648
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000700// CHECK: [[BF_SET:%.+]] = or i32 [[BF_CLEAR]], [[BF_VALUE]]
701// CHECK: store i32 [[BF_SET]], i32* [[TEMP1]],
702// CHECK: [[NEW_BF_VALUE:%.+]] = load i32, i32* [[TEMP1]],
Alexey Bataev5e018f92015-04-23 06:35:10 +0000703// CHECK: [[RES:%.+]] = cmpxchg i32* bitcast (i8* getelementptr (i8, i8* bitcast (%struct.BitFields* @{{.+}} to i8*), i64 4) to i32*), i32 [[OLD_BF_VALUE]], i32 [[NEW_BF_VALUE]] monotonic monotonic
704// CHECK: [[FAILED_OLD_VAL]] = extractvalue { i32, i1 } [[RES]], 0
705// CHECK: [[FAIL_SUCCESS:%.+]] = extractvalue { i32, i1 } [[RES]], 1
706// CHECK: br i1 [[FAIL_SUCCESS]], label %[[EXIT:.+]], label %[[CONT]]
707// CHECK: [[EXIT]]
708// CHECK: store i32 [[CONV]], i32* @{{.+}},
709#pragma omp atomic capture
710 iv = bfx.a = bfx.a - ldv;
711// CHECK: [[EXPR:%.+]] = load x86_fp80, x86_fp80* @{{.+}}
712// CHECK: [[BITCAST:%.+]] = bitcast i32* [[LDTEMP:%.+]] to i8*
713// CHECK: call void @__atomic_load(i64 4, i8* getelementptr (i8, i8* bitcast (%struct.BitFields_packed* @{{.+}} to i8*), i64 4), i8* [[BITCAST]], i32 0)
Alexey Bataev5e018f92015-04-23 06:35:10 +0000714// CHECK: br label %[[CONT:.+]]
715// CHECK: [[CONT]]
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000716// CHECK: [[OLD:%.+]] = load i32, i32* [[LDTEMP]],
717// CHECK: store i32 [[OLD]], i32* [[TEMP1:%.+]],
718// CHECK: [[OLD:%.+]] = load i32, i32* [[LDTEMP]],
719// CHECK: store i32 [[OLD]], i32* [[TEMP:%.+]],
Alexey Bataev5e018f92015-04-23 06:35:10 +0000720// CHECK: [[A_LD:%.+]] = load i32, i32* [[TEMP]],
721// CHECK: [[A_SHL:%.+]] = shl i32 [[A_LD]], 1
722// CHECK: [[A_ASHR:%.+]] = ashr i32 [[A_SHL]], 1
723// CHECK: [[X_RVAL:%.+]] = sitofp i32 [[A_ASHR]] to x86_fp80
724// CHECK: [[MUL:%.+]] = fmul x86_fp80 [[X_RVAL]], [[EXPR]]
725// CHECK: [[CONV:%.+]] = fptosi x86_fp80 [[MUL]] to i32
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000726// CHECK: [[NEW_VAL:%.+]] = load i32, i32* [[TEMP1]],
Alexey Bataev5e018f92015-04-23 06:35:10 +0000727// CHECK: [[BF_VALUE:%.+]] = and i32 [[CONV]], 2147483647
728// CHECK: [[BF_CLEAR:%.+]] = and i32 [[NEW_VAL]], -2147483648
729// CHECK: or i32 [[BF_CLEAR]], [[BF_VALUE]]
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000730// CHECK: store i32 %{{.+}}, i32* [[TEMP1]]
731// CHECK: [[BITCAST_TEMP_OLD_BF_ADDR:%.+]] = bitcast i32* [[LDTEMP]] to i8*
732// CHECK: [[BITCAST_TEMP_NEW_BF_ADDR:%.+]] = bitcast i32* [[TEMP1]] to i8*
Alexey Bataev5e018f92015-04-23 06:35:10 +0000733// CHECK: [[FAIL_SUCCESS:%.+]] = call zeroext i1 @__atomic_compare_exchange(i64 4, i8* getelementptr (i8, i8* bitcast (%struct.BitFields_packed* @{{.+}} to i8*), i64 4), i8* [[BITCAST_TEMP_OLD_BF_ADDR]], i8* [[BITCAST_TEMP_NEW_BF_ADDR]], i32 0, i32 0)
Alexey Bataev5e018f92015-04-23 06:35:10 +0000734// CHECK: br i1 [[FAIL_SUCCESS]], label %[[EXIT:.+]], label %[[CONT]]
735// CHECK: [[EXIT]]
736// CHECK: store i32 [[A_ASHR]], i32* @{{.+}},
737#pragma omp atomic capture
738 {iv = bfx_packed.a; bfx_packed.a *= ldv;}
739// CHECK: [[EXPR:%.+]] = load x86_fp80, x86_fp80* @{{.+}}
740// CHECK: [[PREV_VALUE:%.+]] = load atomic i32, i32* getelementptr inbounds (%struct.BitFields2, %struct.BitFields2* @{{.+}}, i32 0, i32 0) monotonic
741// CHECK: br label %[[CONT:.+]]
742// CHECK: [[CONT]]
743// CHECK: [[OLD_BF_VALUE:%.+]] = phi i32 [ [[PREV_VALUE]], %[[EXIT]] ], [ [[FAILED_OLD_VAL:%.+]], %[[CONT]] ]
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000744// CHECK: store i32 [[OLD_BF_VALUE]], i32* [[TEMP1:%.+]],
Alexey Bataev5e018f92015-04-23 06:35:10 +0000745// CHECK: store i32 [[OLD_BF_VALUE]], i32* [[TEMP:%.+]],
746// CHECK: [[A_LD:%.+]] = load i32, i32* [[TEMP]],
747// CHECK: [[A_ASHR:%.+]] = ashr i32 [[A_LD]], 31
748// CHECK: [[X_RVAL:%.+]] = sitofp i32 [[A_ASHR]] to x86_fp80
749// CHECK: [[SUB:%.+]] = fsub x86_fp80 [[X_RVAL]], [[EXPR]]
750// CHECK: [[CONV:%.+]] = fptosi x86_fp80 [[SUB]] to i32
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000751// CHECK: [[NEW_VAL:%.+]] = load i32, i32* [[TEMP1]],
Alexey Bataev5e018f92015-04-23 06:35:10 +0000752// CHECK: [[BF_AND:%.+]] = and i32 [[CONV]], 1
753// CHECK: [[BF_VALUE:%.+]] = shl i32 [[BF_AND]], 31
754// CHECK: [[BF_CLEAR:%.+]] = and i32 [[NEW_VAL]], 2147483647
755// CHECK: or i32 [[BF_CLEAR]], [[BF_VALUE]]
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000756// CHECK: store i32 %{{.+}}, i32* [[TEMP1]]
757// CHECK: [[NEW_BF_VALUE:%.+]] = load i32, i32* [[TEMP1]]
Alexey Bataev5e018f92015-04-23 06:35:10 +0000758// CHECK: [[RES:%.+]] = cmpxchg i32* getelementptr inbounds (%struct.BitFields2, %struct.BitFields2* @{{.+}}, i32 0, i32 0), i32 [[OLD_BF_VALUE]], i32 [[NEW_BF_VALUE]] monotonic monotonic
759// CHECK: [[FAILED_OLD_VAL]] = extractvalue { i32, i1 } [[RES]], 0
760// CHECK: [[FAIL_SUCCESS:%.+]] = extractvalue { i32, i1 } [[RES]], 1
761// CHECK: br i1 [[FAIL_SUCCESS]], label %[[EXIT:.+]], label %[[CONT]]
762// CHECK: [[EXIT]]
763// CHECK: store i32 [[CONV]], i32* @{{.+}},
764#pragma omp atomic capture
765 {bfx2.a -= ldv; iv = bfx2.a;}
766// CHECK: [[EXPR:%.+]] = load x86_fp80, x86_fp80* @{{.+}}
767// CHECK: [[PREV_VALUE:%.+]] = load atomic i8, i8* getelementptr (i8, i8* bitcast (%struct.BitFields2_packed* @{{.+}} to i8*), i64 3) monotonic
768// CHECK: br label %[[CONT:.+]]
769// CHECK: [[CONT]]
770// CHECK: [[OLD_BF_VALUE:%.+]] = phi i8 [ [[PREV_VALUE]], %[[EXIT]] ], [ [[FAILED_OLD_VAL:%.+]], %[[CONT]] ]
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000771// CHECK: [[BITCAST_NEW:%.+]] = bitcast i32* %{{.+}} to i8*
772// CHECK: store i8 [[OLD_BF_VALUE]], i8* [[BITCAST_NEW]],
Alexey Bataev5e018f92015-04-23 06:35:10 +0000773// CHECK: [[BITCAST:%.+]] = bitcast i32* %{{.+}} to i8*
774// CHECK: store i8 [[OLD_BF_VALUE]], i8* [[BITCAST]],
775// CHECK: [[A_LD:%.+]] = load i8, i8* [[BITCAST]],
776// CHECK: [[A_ASHR:%.+]] = ashr i8 [[A_LD]], 7
777// CHECK: [[CAST:%.+]] = sext i8 [[A_ASHR]] to i32
778// CHECK: [[X_RVAL:%.+]] = sitofp i32 [[CAST]] to x86_fp80
779// CHECK: [[DIV:%.+]] = fdiv x86_fp80 [[EXPR]], [[X_RVAL]]
780// CHECK: [[NEW_VAL:%.+]] = fptosi x86_fp80 [[DIV]] to i32
781// CHECK: [[TRUNC:%.+]] = trunc i32 [[NEW_VAL]] to i8
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000782// CHECK: [[BF_LD:%.+]] = load i8, i8* [[BITCAST_NEW]],
Alexey Bataev5e018f92015-04-23 06:35:10 +0000783// CHECK: [[BF_AND:%.+]] = and i8 [[TRUNC]], 1
784// CHECK: [[BF_VALUE:%.+]] = shl i8 [[BF_AND]], 7
785// CHECK: [[BF_CLEAR:%.+]] = and i8 %{{.+}}, 127
786// CHECK: or i8 [[BF_CLEAR]], [[BF_VALUE]]
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000787// CHECK: store i8 %{{.+}}, i8* [[BITCAST_NEW]]
788// CHECK: [[NEW_BF_VALUE:%.+]] = load i8, i8* [[BITCAST_NEW]]
Alexey Bataev5e018f92015-04-23 06:35:10 +0000789// CHECK: [[RES:%.+]] = cmpxchg i8* getelementptr (i8, i8* bitcast (%struct.BitFields2_packed* @{{.+}} to i8*), i64 3), i8 [[OLD_BF_VALUE]], i8 [[NEW_BF_VALUE]] monotonic monotonic
790// CHECK: [[FAILED_OLD_VAL]] = extractvalue { i8, i1 } [[RES]], 0
791// CHECK: [[FAIL_SUCCESS:%.+]] = extractvalue { i8, i1 } [[RES]], 1
792// CHECK: br i1 [[FAIL_SUCCESS]], label %[[EXIT:.+]], label %[[CONT]]
793// CHECK: [[EXIT]]
794// CHECK: store i32 [[NEW_VAL]], i32* @{{.+}},
795#pragma omp atomic capture
796 iv = bfx2_packed.a = ldv / bfx2_packed.a;
797// CHECK: [[EXPR:%.+]] = load x86_fp80, x86_fp80* @{{.+}}
798// CHECK: [[PREV_VALUE:%.+]] = load atomic i32, i32* getelementptr inbounds (%struct.BitFields3, %struct.BitFields3* @{{.+}}, i32 0, i32 0) monotonic
799// CHECK: br label %[[CONT:.+]]
800// CHECK: [[CONT]]
801// CHECK: [[OLD_BF_VALUE:%.+]] = phi i32 [ [[PREV_VALUE]], %[[EXIT]] ], [ [[FAILED_OLD_VAL:%.+]], %[[CONT]] ]
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000802// CHECK: store i32 [[OLD_BF_VALUE]], i32* [[TEMP1:%.+]],
Alexey Bataev5e018f92015-04-23 06:35:10 +0000803// CHECK: store i32 [[OLD_BF_VALUE]], i32* [[TEMP:%.+]],
804// CHECK: [[A_LD:%.+]] = load i32, i32* [[TEMP]],
805// CHECK: [[A_SHL:%.+]] = shl i32 [[A_LD]], 7
806// CHECK: [[A_ASHR:%.+]] = ashr i32 [[A_SHL]], 18
807// CHECK: [[X_RVAL:%.+]] = sitofp i32 [[A_ASHR]] to x86_fp80
808// CHECK: [[DIV:%.+]] = fdiv x86_fp80 [[X_RVAL]], [[EXPR]]
809// CHECK: [[NEW_VAL:%.+]] = fptosi x86_fp80 [[DIV]] to i32
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000810// CHECK: [[BF_LD:%.+]] = load i32, i32* [[TEMP1]],
Alexey Bataev5e018f92015-04-23 06:35:10 +0000811// CHECK: [[BF_AND:%.+]] = and i32 [[NEW_VAL]], 16383
812// CHECK: [[BF_VALUE:%.+]] = shl i32 [[BF_AND]], 11
813// CHECK: [[BF_CLEAR:%.+]] = and i32 %{{.+}}, -33552385
814// CHECK: or i32 [[BF_CLEAR]], [[BF_VALUE]]
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000815// CHECK: store i32 %{{.+}}, i32* [[TEMP1]]
816// CHECK: [[NEW_BF_VALUE:%.+]] = load i32, i32* [[TEMP1]]
Alexey Bataev5e018f92015-04-23 06:35:10 +0000817// CHECK: [[RES:%.+]] = cmpxchg i32* getelementptr inbounds (%struct.BitFields3, %struct.BitFields3* @{{.+}}, i32 0, i32 0), i32 [[OLD_BF_VALUE]], i32 [[NEW_BF_VALUE]] monotonic monotonic
818// CHECK: [[FAILED_OLD_VAL]] = extractvalue { i32, i1 } [[RES]], 0
819// CHECK: [[FAIL_SUCCESS:%.+]] = extractvalue { i32, i1 } [[RES]], 1
820// CHECK: br i1 [[FAIL_SUCCESS]], label %[[EXIT:.+]], label %[[CONT]]
821// CHECK: [[EXIT]]
822// CHECK: store i32 [[A_ASHR]], i32* @{{.+}},
823#pragma omp atomic capture
824 {iv = bfx3.a; bfx3.a /= ldv;}
825// CHECK: [[EXPR:%.+]] = load x86_fp80, x86_fp80* @{{.+}}
826// CHECK: [[LDTEMP:%.+]] = bitcast i32* %{{.+}} to i24*
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000827// CHECK: [[BITCAST:%.+]] = bitcast i24* [[LDTEMP]] to i8*
Alexey Bataev5e018f92015-04-23 06:35:10 +0000828// CHECK: call void @__atomic_load(i64 3, i8* getelementptr (i8, i8* bitcast (%struct.BitFields3_packed* @{{.+}} to i8*), i64 1), i8* [[BITCAST]], i32 0)
Alexey Bataev5e018f92015-04-23 06:35:10 +0000829// CHECK: br label %[[CONT:.+]]
830// CHECK: [[CONT]]
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000831// CHECK: [[OLD:%.+]] = load i24, i24* [[LDTEMP]],
832// CHECK: store i24 [[OLD]], i24* [[BITCAST2:%.+]],
833// CHECK: [[OLD:%.+]] = load i24, i24* [[LDTEMP]],
834// CHECK: store i24 [[OLD]], i24* [[BITCAST1:%.+]],
835// CHECK: [[A_LD:%.+]] = load i24, i24* [[BITCAST1]],
Alexey Bataev5e018f92015-04-23 06:35:10 +0000836// CHECK: [[A_SHL:%.+]] = shl i24 [[A_LD]], 7
837// CHECK: [[A_ASHR:%.+]] = ashr i24 [[A_SHL]], 10
838// CHECK: [[CAST:%.+]] = sext i24 [[A_ASHR]] to i32
839// CHECK: [[X_RVAL:%.+]] = sitofp i32 [[CAST]] to x86_fp80
840// CHECK: [[ADD:%.+]] = fadd x86_fp80 [[X_RVAL]], [[EXPR]]
841// CHECK: [[NEW_VAL:%.+]] = fptosi x86_fp80 [[ADD]] to i32
842// CHECK: [[TRUNC:%.+]] = trunc i32 [[NEW_VAL]] to i24
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000843// CHECK: [[BF_LD:%.+]] = load i24, i24* [[BITCAST2]],
Alexey Bataev5e018f92015-04-23 06:35:10 +0000844// CHECK: [[BF_AND:%.+]] = and i24 [[TRUNC]], 16383
845// CHECK: [[BF_VALUE:%.+]] = shl i24 [[BF_AND]], 3
846// CHECK: [[BF_CLEAR:%.+]] = and i24 [[BF_LD]], -131065
847// CHECK: or i24 [[BF_CLEAR]], [[BF_VALUE]]
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000848// CHECK: store i24 %{{.+}}, i24* [[BITCAST2]]
849// CHECK: [[BITCAST_TEMP_OLD_BF_ADDR:%.+]] = bitcast i24* [[LDTEMP]] to i8*
850// CHECK: [[BITCAST_TEMP_NEW_BF_ADDR:%.+]] = bitcast i24* [[BITCAST2]] to i8*
Alexey Bataev5e018f92015-04-23 06:35:10 +0000851// CHECK: [[FAIL_SUCCESS:%.+]] = call zeroext i1 @__atomic_compare_exchange(i64 3, i8* getelementptr (i8, i8* bitcast (%struct.BitFields3_packed* @{{.+}} to i8*), i64 1), i8* [[BITCAST_TEMP_OLD_BF_ADDR]], i8* [[BITCAST_TEMP_NEW_BF_ADDR]], i32 0, i32 0)
Alexey Bataev5e018f92015-04-23 06:35:10 +0000852// CHECK: br i1 [[FAIL_SUCCESS]], label %[[EXIT:.+]], label %[[CONT]]
853// CHECK: [[EXIT]]
854// CHECK: store i32 [[NEW_VAL]], i32* @{{.+}},
855#pragma omp atomic capture
856 {bfx3_packed.a += ldv; iv = bfx3_packed.a;}
857// CHECK: [[EXPR:%.+]] = load x86_fp80, x86_fp80* @{{.+}}
858// CHECK: [[PREV_VALUE:%.+]] = load atomic i64, i64* bitcast (%struct.BitFields4* @{{.+}} to i64*) monotonic
859// CHECK: br label %[[CONT:.+]]
860// CHECK: [[CONT]]
861// CHECK: [[OLD_BF_VALUE:%.+]] = phi i64 [ [[PREV_VALUE]], %[[EXIT]] ], [ [[FAILED_OLD_VAL:%.+]], %[[CONT]] ]
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000862// CHECK: store i64 [[OLD_BF_VALUE]], i64* [[TEMP1:%.+]],
Alexey Bataev5e018f92015-04-23 06:35:10 +0000863// CHECK: store i64 [[OLD_BF_VALUE]], i64* [[TEMP:%.+]],
864// CHECK: [[A_LD:%.+]] = load i64, i64* [[TEMP]],
865// CHECK: [[A_SHL:%.+]] = shl i64 [[A_LD]], 47
866// CHECK: [[A_ASHR:%.+]] = ashr i64 [[A_SHL:%.+]], 63
867// CHECK: [[A_CAST:%.+]] = trunc i64 [[A_ASHR:%.+]] to i32
868// CHECK: [[X_RVAL:%.+]] = sitofp i32 [[CAST:%.+]] to x86_fp80
869// CHECK: [[MUL:%.+]] = fmul x86_fp80 [[X_RVAL]], [[EXPR]]
870// CHECK: [[NEW_VAL:%.+]] = fptosi x86_fp80 [[MUL]] to i32
871// CHECK: [[ZEXT:%.+]] = zext i32 [[NEW_VAL]] to i64
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000872// CHECK: [[BF_LD:%.+]] = load i64, i64* [[TEMP1]],
Alexey Bataev5e018f92015-04-23 06:35:10 +0000873// CHECK: [[BF_AND:%.+]] = and i64 [[ZEXT]], 1
874// CHECK: [[BF_VALUE:%.+]] = shl i64 [[BF_AND]], 16
875// CHECK: [[BF_CLEAR:%.+]] = and i64 [[BF_LD]], -65537
876// CHECK: or i64 [[BF_CLEAR]], [[BF_VALUE]]
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000877// CHECK: store i64 %{{.+}}, i64* [[TEMP1]]
878// CHECK: [[NEW_BF_VALUE:%.+]] = load i64, i64* [[TEMP1]]
Alexey Bataev5e018f92015-04-23 06:35:10 +0000879// CHECK: [[RES:%.+]] = cmpxchg i64* bitcast (%struct.BitFields4* @{{.+}} to i64*), i64 [[OLD_BF_VALUE]], i64 [[NEW_BF_VALUE]] monotonic monotonic
880// CHECK: [[FAILED_OLD_VAL]] = extractvalue { i64, i1 } [[RES]], 0
881// CHECK: [[FAIL_SUCCESS:%.+]] = extractvalue { i64, i1 } [[RES]], 1
882// CHECK: br i1 [[FAIL_SUCCESS]], label %[[EXIT:.+]], label %[[CONT]]
883// CHECK: [[EXIT]]
884// CHECK: store i32 [[NEW_VAL]], i32* @{{.+}},
885#pragma omp atomic capture
886 iv = bfx4.a = bfx4.a * ldv;
887// CHECK: [[EXPR:%.+]] = load x86_fp80, x86_fp80* @{{.+}}
888// CHECK: [[PREV_VALUE:%.+]] = load atomic i8, i8* getelementptr inbounds (%struct.BitFields4_packed, %struct.BitFields4_packed* @{{.+}}, i32 0, i32 0, i64 2) monotonic
889// CHECK: br label %[[CONT:.+]]
890// CHECK: [[CONT]]
891// CHECK: [[OLD_BF_VALUE:%.+]] = phi i8 [ [[PREV_VALUE]], %{{.+}} ], [ [[FAILED_OLD_VAL:%.+]], %[[CONT]] ]
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000892// CHECK: [[BITCAST1:%.+]] = bitcast i32* %{{.+}} to i8*
893// CHECK: store i8 [[OLD_BF_VALUE]], i8* [[BITCAST1]],
Alexey Bataev5e018f92015-04-23 06:35:10 +0000894// CHECK: [[BITCAST:%.+]] = bitcast i32* %{{.+}} to i8*
895// CHECK: store i8 [[OLD_BF_VALUE]], i8* [[BITCAST]],
896// CHECK: [[A_LD:%.+]] = load i8, i8* [[BITCAST]],
897// CHECK: [[A_SHL:%.+]] = shl i8 [[A_LD]], 7
898// CHECK: [[A_ASHR:%.+]] = ashr i8 [[A_SHL:%.+]], 7
899// CHECK: [[CAST:%.+]] = sext i8 [[A_ASHR:%.+]] to i32
900// CHECK: [[CONV:%.+]] = sitofp i32 [[CAST]] to x86_fp80
901// CHECK: [[SUB: %.+]] = fsub x86_fp80 [[CONV]], [[EXPR]]
902// CHECK: [[CONV:%.+]] = fptosi x86_fp80 [[SUB:%.+]] to i32
903// CHECK: [[NEW_VAL:%.+]] = trunc i32 [[CONV]] to i8
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000904// CHECK: [[BF_LD:%.+]] = load i8, i8* [[BITCAST1]],
Alexey Bataev5e018f92015-04-23 06:35:10 +0000905// CHECK: [[BF_VALUE:%.+]] = and i8 [[NEW_VAL]], 1
906// CHECK: [[BF_CLEAR:%.+]] = and i8 [[BF_LD]], -2
907// CHECK: or i8 [[BF_CLEAR]], [[BF_VALUE]]
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000908// CHECK: store i8 %{{.+}}, i8* [[BITCAST1]]
909// CHECK: [[NEW_BF_VALUE:%.+]] = load i8, i8* [[BITCAST1]]
Alexey Bataev5e018f92015-04-23 06:35:10 +0000910// CHECK: [[RES:%.+]] = cmpxchg i8* getelementptr inbounds (%struct.BitFields4_packed, %struct.BitFields4_packed* @{{.+}}, i32 0, i32 0, i64 2), i8 [[OLD_BF_VALUE]], i8 [[NEW_BF_VALUE]] monotonic monotonic
911// CHECK: [[FAILED_OLD_VAL]] = extractvalue { i8, i1 } [[RES]], 0
912// CHECK: [[FAIL_SUCCESS:%.+]] = extractvalue { i8, i1 } [[RES]], 1
913// CHECK: br i1 [[FAIL_SUCCESS]], label %[[EXIT:.+]], label %[[CONT]]
914// CHECK: [[EXIT]]
915// CHECK: store i32 [[CAST]], i32* @{{.+}},
916#pragma omp atomic capture
917 {iv = bfx4_packed.a; bfx4_packed.a -= ldv;}
918// CHECK: [[EXPR:%.+]] = load x86_fp80, x86_fp80* @{{.+}}
919// CHECK: [[PREV_VALUE:%.+]] = load atomic i64, i64* bitcast (%struct.BitFields4* @{{.+}} to i64*) monotonic
920// CHECK: br label %[[CONT:.+]]
921// CHECK: [[CONT]]
922// CHECK: [[OLD_BF_VALUE:%.+]] = phi i64 [ [[PREV_VALUE]], %[[EXIT]] ], [ [[FAILED_OLD_VAL:%.+]], %[[CONT]] ]
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000923// CHECK: store i64 [[OLD_BF_VALUE]], i64* [[TEMP1:%.+]],
Alexey Bataev5e018f92015-04-23 06:35:10 +0000924// CHECK: store i64 [[OLD_BF_VALUE]], i64* [[TEMP:%.+]],
925// CHECK: [[A_LD:%.+]] = load i64, i64* [[TEMP]],
926// CHECK: [[A_SHL:%.+]] = shl i64 [[A_LD]], 40
927// CHECK: [[A_ASHR:%.+]] = ashr i64 [[A_SHL:%.+]], 57
928// CHECK: [[CONV:%.+]] = sitofp i64 [[A_ASHR]] to x86_fp80
929// CHECK: [[DIV:%.+]] = fdiv x86_fp80 [[CONV]], [[EXPR]]
930// CHECK: [[CONV:%.+]] = fptosi x86_fp80 [[DIV]] to i64
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000931// CHECK: [[BF_LD:%.+]] = load i64, i64* [[TEMP1]],
Alexey Bataev5e018f92015-04-23 06:35:10 +0000932// CHECK: [[BF_AND:%.+]] = and i64 [[CONV]], 127
933// CHECK: [[BF_VALUE:%.+]] = shl i64 [[BF_AND:%.+]], 17
934// CHECK: [[BF_CLEAR:%.+]] = and i64 [[BF_LD]], -16646145
935// CHECK: [[VAL:%.+]] = or i64 [[BF_CLEAR]], [[BF_VALUE]]
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000936// CHECK: store i64 [[VAL]], i64* [[TEMP1]]
937// CHECK: [[NEW_BF_VALUE:%.+]] = load i64, i64* [[TEMP1]]
Alexey Bataev5e018f92015-04-23 06:35:10 +0000938// CHECK: [[RES:%.+]] = cmpxchg i64* bitcast (%struct.BitFields4* @{{.+}} to i64*), i64 [[OLD_BF_VALUE]], i64 [[NEW_BF_VALUE]] monotonic monotonic
939// CHECK: [[FAILED_OLD_VAL]] = extractvalue { i64, i1 } [[RES]], 0
940// CHECK: [[FAIL_SUCCESS:%.+]] = extractvalue { i64, i1 } [[RES]], 1
941// CHECK: br i1 [[FAIL_SUCCESS]], label %[[EXIT:.+]], label %[[CONT]]
942// CHECK: [[EXIT]]
943// CHECK: [[NEW_VAL:%.+]] = trunc i64 [[CONV]] to i32
944// CHECK: store i32 [[NEW_VAL]], i32* @{{.+}},
945#pragma omp atomic capture
946 {bfx4.b /= ldv; iv = bfx4.b;}
947// CHECK: [[EXPR:%.+]] = load x86_fp80, x86_fp80* @{{.+}}
948// CHECK: [[PREV_VALUE:%.+]] = load atomic i8, i8* getelementptr inbounds (%struct.BitFields4_packed, %struct.BitFields4_packed* @{{.+}}, i32 0, i32 0, i64 2) monotonic
949// CHECK: br label %[[CONT:.+]]
950// CHECK: [[CONT]]
951// CHECK: [[OLD_BF_VALUE:%.+]] = phi i8 [ [[PREV_VALUE]], %[[EXIT]] ], [ [[FAILED_OLD_VAL:%.+]], %[[CONT]] ]
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000952// CHECK: [[BITCAST1:%.+]] = bitcast i64* %{{.+}} to i8*
953// CHECK: store i8 [[OLD_BF_VALUE]], i8* [[BITCAST1]],
Alexey Bataev5e018f92015-04-23 06:35:10 +0000954// CHECK: [[BITCAST:%.+]] = bitcast i64* %{{.+}} to i8*
955// CHECK: store i8 [[OLD_BF_VALUE]], i8* [[BITCAST]],
956// CHECK: [[A_LD:%.+]] = load i8, i8* [[BITCAST]],
957// CHECK: [[A_ASHR:%.+]] = ashr i8 [[A_LD]], 1
958// CHECK: [[CAST:%.+]] = sext i8 [[A_ASHR]] to i64
959// CHECK: [[CONV:%.+]] = sitofp i64 [[CAST]] to x86_fp80
960// CHECK: [[ADD:%.+]] = fadd x86_fp80 [[CONV]], [[EXPR]]
961// CHECK: [[NEW_VAL:%.+]] = fptosi x86_fp80 [[ADD]] to i64
962// CHECK: [[TRUNC:%.+]] = trunc i64 [[NEW_VAL]] to i8
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000963// CHECK: [[BF_LD:%.+]] = load i8, i8* [[BITCAST1]],
Alexey Bataev5e018f92015-04-23 06:35:10 +0000964// CHECK: [[BF_AND:%.+]] = and i8 [[TRUNC]], 127
965// CHECK: [[BF_VALUE:%.+]] = shl i8 [[BF_AND]], 1
966// CHECK: [[BF_CLEAR:%.+]] = and i8 [[BF_LD]], 1
967// CHECK: or i8 [[BF_CLEAR]], [[BF_VALUE]]
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000968// CHECK: store i8 %{{.+}}, i8* [[BITCAST1]]
969// CHECK: [[NEW_BF_VALUE:%.+]] = load i8, i8* [[BITCAST1]]
Alexey Bataev5e018f92015-04-23 06:35:10 +0000970// CHECK: [[RES:%.+]] = cmpxchg i8* getelementptr inbounds (%struct.BitFields4_packed, %struct.BitFields4_packed* @{{.+}}, i32 0, i32 0, i64 2), i8 [[OLD_BF_VALUE]], i8 [[NEW_BF_VALUE]] monotonic monotonic
971// CHECK: [[FAILED_OLD_VAL]] = extractvalue { i8, i1 } [[RES]], 0
972// CHECK: [[FAIL_SUCCESS:%.+]] = extractvalue { i8, i1 } [[RES]], 1
973// CHECK: br i1 [[FAIL_SUCCESS]], label %[[EXIT:.+]], label %[[CONT]]
974// CHECK: [[EXIT]]
975// CHECK: [[NEW_VAL_I32:%.+]] = trunc i64 [[NEW_VAL]] to i32
976// CHECK: store i32 [[NEW_VAL_I32]], i32* @{{.+}},
977#pragma omp atomic capture
978 iv = bfx4_packed.b += ldv;
979// CHECK: load i64, i64*
980// CHECK: [[EXPR:%.+]] = uitofp i64 %{{.+}} to float
981// CHECK: [[I64VAL:%.+]] = load atomic i64, i64* bitcast (<2 x float>* [[DEST:@.+]] to i64*) monotonic
Alexey Bataev5e018f92015-04-23 06:35:10 +0000982// CHECK: br label %[[CONT:.+]]
983// CHECK: [[CONT]]
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000984// CHECK: [[OLD_I64:%.+]] = phi i64 [ [[I64VAL]], %{{.+}} ], [ [[FAILED_I64_OLD_VAL:%.+]], %[[CONT]] ]
985// CHECK: [[BITCAST:%.+]] = bitcast <2 x float>* [[LDTEMP1:%.+]] to i64*
986// CHECK: store i64 [[OLD_I64]], i64* [[BITCAST]],
987// CHECK: [[OLD_VEC_VAL:%.+]] = bitcast i64 [[OLD_I64]] to <2 x float>
Alexey Bataev5e018f92015-04-23 06:35:10 +0000988// CHECK: store <2 x float> [[OLD_VEC_VAL]], <2 x float>* [[LDTEMP:%.+]],
989// CHECK: [[VEC_VAL:%.+]] = load <2 x float>, <2 x float>* [[LDTEMP]]
990// CHECK: [[X:%.+]] = extractelement <2 x float> [[VEC_VAL]], i64 0
991// CHECK: [[VEC_ITEM_VAL:%.+]] = fsub float [[EXPR]], [[X]]
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000992// CHECK: [[VEC_VAL:%.+]] = load <2 x float>, <2 x float>* [[LDTEMP1]],
Alexey Bataev5e018f92015-04-23 06:35:10 +0000993// CHECK: [[NEW_VEC_VAL:%.+]] = insertelement <2 x float> [[VEC_VAL]], float [[VEC_ITEM_VAL]], i64 0
Alexey Bataevf0ab5532015-05-15 08:36:34 +0000994// CHECK: store <2 x float> [[NEW_VEC_VAL]], <2 x float>* [[LDTEMP1]]
995// CHECK: [[NEW_I64:%.+]] = load i64, i64* [[BITCAST]]
Alexey Bataev5e018f92015-04-23 06:35:10 +0000996// CHECK: [[RES:%.+]] = cmpxchg i64* bitcast (<2 x float>* [[DEST]] to i64*), i64 [[OLD_I64]], i64 [[NEW_I64]] monotonic monotonic
997// CHECK: [[FAILED_I64_OLD_VAL:%.+]] = extractvalue { i64, i1 } [[RES]], 0
998// CHECK: [[FAIL_SUCCESS:%.+]] = extractvalue { i64, i1 } [[RES]], 1
Alexey Bataev5e018f92015-04-23 06:35:10 +0000999// CHECK: br i1 [[FAIL_SUCCESS]], label %[[EXIT:.+]], label %[[CONT]]
1000// CHECK: [[EXIT]]
1001// CHECK: store float [[X]], float* @{{.+}},
1002#pragma omp atomic capture
1003 {fv = float2x.x; float2x.x = ulv - float2x.x;}
1004// CHECK: [[EXPR:%.+]] = load double, double* @{{.+}},
1005// CHECK: [[OLD_VAL:%.+]] = call i32 @llvm.read_register.i32([[REG:metadata ![0-9]+]])
1006// CHECK: [[X_RVAL:%.+]] = sitofp i32 [[OLD_VAL]] to double
1007// CHECK: [[DIV:%.+]] = fdiv double [[EXPR]], [[X_RVAL]]
1008// CHECK: [[NEW_VAL:%.+]] = fptosi double [[DIV]] to i32
1009// CHECK: call void @llvm.write_register.i32([[REG]], i32 [[NEW_VAL]])
1010// CHECK: store i32 [[NEW_VAL]], i32* @{{.+}},
1011// CHECK: call{{.*}} @__kmpc_flush(
1012#pragma omp atomic capture seq_cst
1013 {rix = dv / rix; iv = rix;}
1014// CHECK: [[OLD_VAL:%.+]] = atomicrmw xchg i32* @{{.+}}, i32 5 monotonic
1015// CHECK: call void @llvm.write_register.i32([[REG]], i32 [[OLD_VAL]])
1016#pragma omp atomic capture
1017 {rix = ix; ix = 5;}
1018 return 0;
1019}
1020#endif