Evan Cheng | 3ddfbd3 | 2011-07-06 22:01:53 +0000 | [diff] [blame] | 1 | //===-- X86MCTargetDesc.h - X86 Target Descriptions -------------*- C++ -*-===// |
Evan Cheng | 2475331 | 2011-06-24 01:44:41 +0000 | [diff] [blame] | 2 | // |
| 3 | // The LLVM Compiler Infrastructure |
| 4 | // |
| 5 | // This file is distributed under the University of Illinois Open Source |
| 6 | // License. See LICENSE.TXT for details. |
| 7 | // |
| 8 | //===----------------------------------------------------------------------===// |
| 9 | // |
| 10 | // This file provides X86 specific target descriptions. |
| 11 | // |
| 12 | //===----------------------------------------------------------------------===// |
| 13 | |
Evan Cheng | 3ddfbd3 | 2011-07-06 22:01:53 +0000 | [diff] [blame] | 14 | #ifndef X86MCTARGETDESC_H |
| 15 | #define X86MCTARGETDESC_H |
Evan Cheng | b2681be | 2011-06-24 23:59:54 +0000 | [diff] [blame] | 16 | |
Oscar Fuentes | 47d4aaf | 2011-07-25 20:13:36 +0000 | [diff] [blame^] | 17 | #include "llvm/Support/DataTypes.h" |
Evan Cheng | 13bcc6c | 2011-07-07 21:06:52 +0000 | [diff] [blame] | 18 | #include <string> |
| 19 | |
Evan Cheng | e862d59 | 2011-06-24 20:42:09 +0000 | [diff] [blame] | 20 | namespace llvm { |
Evan Cheng | 7e763d8 | 2011-07-25 18:43:53 +0000 | [diff] [blame] | 21 | class MCCodeEmitter; |
| 22 | class MCContext; |
| 23 | class MCInstrInfo; |
Evan Cheng | b253100 | 2011-07-25 19:33:48 +0000 | [diff] [blame] | 24 | class MCObjectWriter; |
Evan Cheng | d60fa58b | 2011-07-18 20:57:22 +0000 | [diff] [blame] | 25 | class MCRegisterInfo; |
Evan Cheng | 4d1ca96 | 2011-07-08 01:53:10 +0000 | [diff] [blame] | 26 | class MCSubtargetInfo; |
Evan Cheng | e862d59 | 2011-06-24 20:42:09 +0000 | [diff] [blame] | 27 | class Target; |
Evan Cheng | b253100 | 2011-07-25 19:33:48 +0000 | [diff] [blame] | 28 | class TargetAsmBackend; |
Evan Cheng | 13bcc6c | 2011-07-07 21:06:52 +0000 | [diff] [blame] | 29 | class StringRef; |
Evan Cheng | b253100 | 2011-07-25 19:33:48 +0000 | [diff] [blame] | 30 | class raw_ostream; |
Evan Cheng | e862d59 | 2011-06-24 20:42:09 +0000 | [diff] [blame] | 31 | |
| 32 | extern Target TheX86_32Target, TheX86_64Target; |
Evan Cheng | 13bcc6c | 2011-07-07 21:06:52 +0000 | [diff] [blame] | 33 | |
Evan Cheng | d60fa58b | 2011-07-18 20:57:22 +0000 | [diff] [blame] | 34 | /// DWARFFlavour - Flavour of dwarf regnumbers |
| 35 | /// |
| 36 | namespace DWARFFlavour { |
| 37 | enum { |
| 38 | X86_64 = 0, X86_32_DarwinEH = 1, X86_32_Generic = 2 |
| 39 | }; |
| 40 | } |
| 41 | |
| 42 | /// N86 namespace - Native X86 register numbers |
| 43 | /// |
| 44 | namespace N86 { |
| 45 | enum { |
| 46 | EAX = 0, ECX = 1, EDX = 2, EBX = 3, ESP = 4, EBP = 5, ESI = 6, EDI = 7 |
| 47 | }; |
| 48 | } |
| 49 | |
Evan Cheng | 13bcc6c | 2011-07-07 21:06:52 +0000 | [diff] [blame] | 50 | namespace X86_MC { |
| 51 | std::string ParseX86Triple(StringRef TT); |
| 52 | |
| 53 | /// GetCpuIDAndInfo - Execute the specified cpuid and return the 4 values in |
| 54 | /// the specified arguments. If we can't run cpuid on the host, return true. |
| 55 | bool GetCpuIDAndInfo(unsigned value, unsigned *rEAX, |
| 56 | unsigned *rEBX, unsigned *rECX, unsigned *rEDX); |
| 57 | |
| 58 | void DetectFamilyModel(unsigned EAX, unsigned &Family, unsigned &Model); |
Evan Cheng | 4d1ca96 | 2011-07-08 01:53:10 +0000 | [diff] [blame] | 59 | |
Evan Cheng | d60fa58b | 2011-07-18 20:57:22 +0000 | [diff] [blame] | 60 | unsigned getDwarfRegFlavour(StringRef TT, bool isEH); |
| 61 | |
| 62 | unsigned getX86RegNum(unsigned RegNo); |
| 63 | |
| 64 | void InitLLVM2SEHRegisterMapping(MCRegisterInfo *MRI); |
| 65 | |
| 66 | /// createX86MCSubtargetInfo - Create a X86 MCSubtargetInfo instance. |
Evan Cheng | 4d1ca96 | 2011-07-08 01:53:10 +0000 | [diff] [blame] | 67 | /// This is exposed so Asm parser, etc. do not need to go through |
| 68 | /// TargetRegistry. |
| 69 | MCSubtargetInfo *createX86MCSubtargetInfo(StringRef TT, StringRef CPU, |
| 70 | StringRef FS); |
Evan Cheng | 13bcc6c | 2011-07-07 21:06:52 +0000 | [diff] [blame] | 71 | } |
Evan Cheng | 4d1ca96 | 2011-07-08 01:53:10 +0000 | [diff] [blame] | 72 | |
Evan Cheng | 7e763d8 | 2011-07-25 18:43:53 +0000 | [diff] [blame] | 73 | MCCodeEmitter *createX86MCCodeEmitter(const MCInstrInfo &MCII, |
| 74 | const MCSubtargetInfo &STI, |
| 75 | MCContext &Ctx); |
| 76 | |
Evan Cheng | b253100 | 2011-07-25 19:33:48 +0000 | [diff] [blame] | 77 | TargetAsmBackend *createX86_32AsmBackend(const Target &, const std::string &); |
| 78 | TargetAsmBackend *createX86_64AsmBackend(const Target &, const std::string &); |
| 79 | |
| 80 | /// createX86MachObjectWriter - Construct an X86 Mach-O object writer. |
| 81 | MCObjectWriter *createX86MachObjectWriter(raw_ostream &OS, |
| 82 | bool Is64Bit, |
| 83 | uint32_t CPUType, |
| 84 | uint32_t CPUSubtype); |
Evan Cheng | 7e763d8 | 2011-07-25 18:43:53 +0000 | [diff] [blame] | 85 | |
Evan Cheng | e862d59 | 2011-06-24 20:42:09 +0000 | [diff] [blame] | 86 | } // End llvm namespace |
| 87 | |
Evan Cheng | 4d1ca96 | 2011-07-08 01:53:10 +0000 | [diff] [blame] | 88 | |
Evan Cheng | 2475331 | 2011-06-24 01:44:41 +0000 | [diff] [blame] | 89 | // Defines symbolic names for X86 registers. This defines a mapping from |
| 90 | // register name to register number. |
| 91 | // |
Evan Cheng | d9997ac | 2011-06-27 18:32:37 +0000 | [diff] [blame] | 92 | #define GET_REGINFO_ENUM |
| 93 | #include "X86GenRegisterInfo.inc" |
Evan Cheng | b2681be | 2011-06-24 23:59:54 +0000 | [diff] [blame] | 94 | |
Evan Cheng | 1e210d0 | 2011-06-28 20:07:07 +0000 | [diff] [blame] | 95 | // Defines symbolic names for the X86 instructions. |
| 96 | // |
| 97 | #define GET_INSTRINFO_ENUM |
| 98 | #include "X86GenInstrInfo.inc" |
| 99 | |
Evan Cheng | bc153d4 | 2011-07-14 20:59:42 +0000 | [diff] [blame] | 100 | #define GET_SUBTARGETINFO_ENUM |
| 101 | #include "X86GenSubtargetInfo.inc" |
| 102 | |
Evan Cheng | b2681be | 2011-06-24 23:59:54 +0000 | [diff] [blame] | 103 | #endif |