Tom Stellard | 49f8bfd | 2015-01-06 18:00:21 +0000 | [diff] [blame^] | 1 | ; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s |
Matt Arsenault | 13ccc8f | 2014-06-09 16:20:25 +0000 | [diff] [blame] | 2 | |
| 3 | declare i32 @llvm.bswap.i32(i32) nounwind readnone |
| 4 | declare <2 x i32> @llvm.bswap.v2i32(<2 x i32>) nounwind readnone |
| 5 | declare <4 x i32> @llvm.bswap.v4i32(<4 x i32>) nounwind readnone |
Matt Arsenault | e306a32 | 2014-10-21 16:25:08 +0000 | [diff] [blame] | 6 | declare <8 x i32> @llvm.bswap.v8i32(<8 x i32>) nounwind readnone |
Matt Arsenault | 13ccc8f | 2014-06-09 16:20:25 +0000 | [diff] [blame] | 7 | declare i64 @llvm.bswap.i64(i64) nounwind readnone |
| 8 | declare <2 x i64> @llvm.bswap.v2i64(<2 x i64>) nounwind readnone |
| 9 | declare <4 x i64> @llvm.bswap.v4i64(<4 x i64>) nounwind readnone |
| 10 | |
Matt Arsenault | e306a32 | 2014-10-21 16:25:08 +0000 | [diff] [blame] | 11 | ; FUNC-LABEL: @test_bswap_i32 |
Tom Stellard | 326d6ec | 2014-11-05 14:50:53 +0000 | [diff] [blame] | 12 | ; SI: buffer_load_dword [[VAL:v[0-9]+]] |
| 13 | ; SI-DAG: v_alignbit_b32 [[TMP0:v[0-9]+]], [[VAL]], [[VAL]], 8 |
| 14 | ; SI-DAG: v_alignbit_b32 [[TMP1:v[0-9]+]], [[VAL]], [[VAL]], 24 |
| 15 | ; SI-DAG: s_mov_b32 [[K:s[0-9]+]], 0xff00ff |
| 16 | ; SI: v_bfi_b32 [[RESULT:v[0-9]+]], [[K]], [[TMP1]], [[TMP0]] |
| 17 | ; SI: buffer_store_dword [[RESULT]] |
| 18 | ; SI: s_endpgm |
Matt Arsenault | 13ccc8f | 2014-06-09 16:20:25 +0000 | [diff] [blame] | 19 | define void @test_bswap_i32(i32 addrspace(1)* %out, i32 addrspace(1)* %in) nounwind { |
| 20 | %val = load i32 addrspace(1)* %in, align 4 |
| 21 | %bswap = call i32 @llvm.bswap.i32(i32 %val) nounwind readnone |
| 22 | store i32 %bswap, i32 addrspace(1)* %out, align 4 |
| 23 | ret void |
| 24 | } |
| 25 | |
Matt Arsenault | e306a32 | 2014-10-21 16:25:08 +0000 | [diff] [blame] | 26 | ; FUNC-LABEL: @test_bswap_v2i32 |
Tom Stellard | 326d6ec | 2014-11-05 14:50:53 +0000 | [diff] [blame] | 27 | ; SI-DAG: v_alignbit_b32 |
| 28 | ; SI-DAG: v_alignbit_b32 |
| 29 | ; SI-DAG: v_bfi_b32 |
| 30 | ; SI-DAG: v_alignbit_b32 |
| 31 | ; SI-DAG: v_alignbit_b32 |
| 32 | ; SI-DAG: v_bfi_b32 |
| 33 | ; SI: s_endpgm |
Matt Arsenault | 13ccc8f | 2014-06-09 16:20:25 +0000 | [diff] [blame] | 34 | define void @test_bswap_v2i32(<2 x i32> addrspace(1)* %out, <2 x i32> addrspace(1)* %in) nounwind { |
| 35 | %val = load <2 x i32> addrspace(1)* %in, align 8 |
| 36 | %bswap = call <2 x i32> @llvm.bswap.v2i32(<2 x i32> %val) nounwind readnone |
| 37 | store <2 x i32> %bswap, <2 x i32> addrspace(1)* %out, align 8 |
| 38 | ret void |
| 39 | } |
| 40 | |
Matt Arsenault | e306a32 | 2014-10-21 16:25:08 +0000 | [diff] [blame] | 41 | ; FUNC-LABEL: @test_bswap_v4i32 |
Tom Stellard | 326d6ec | 2014-11-05 14:50:53 +0000 | [diff] [blame] | 42 | ; SI-DAG: v_alignbit_b32 |
| 43 | ; SI-DAG: v_alignbit_b32 |
| 44 | ; SI-DAG: v_bfi_b32 |
| 45 | ; SI-DAG: v_alignbit_b32 |
| 46 | ; SI-DAG: v_alignbit_b32 |
| 47 | ; SI-DAG: v_bfi_b32 |
| 48 | ; SI-DAG: v_alignbit_b32 |
| 49 | ; SI-DAG: v_alignbit_b32 |
| 50 | ; SI-DAG: v_bfi_b32 |
| 51 | ; SI-DAG: v_alignbit_b32 |
| 52 | ; SI-DAG: v_alignbit_b32 |
| 53 | ; SI-DAG: v_bfi_b32 |
| 54 | ; SI: s_endpgm |
Matt Arsenault | 13ccc8f | 2014-06-09 16:20:25 +0000 | [diff] [blame] | 55 | define void @test_bswap_v4i32(<4 x i32> addrspace(1)* %out, <4 x i32> addrspace(1)* %in) nounwind { |
| 56 | %val = load <4 x i32> addrspace(1)* %in, align 16 |
| 57 | %bswap = call <4 x i32> @llvm.bswap.v4i32(<4 x i32> %val) nounwind readnone |
| 58 | store <4 x i32> %bswap, <4 x i32> addrspace(1)* %out, align 16 |
| 59 | ret void |
| 60 | } |
| 61 | |
Matt Arsenault | e306a32 | 2014-10-21 16:25:08 +0000 | [diff] [blame] | 62 | ; FUNC-LABEL: @test_bswap_v8i32 |
Tom Stellard | 326d6ec | 2014-11-05 14:50:53 +0000 | [diff] [blame] | 63 | ; SI-DAG: v_alignbit_b32 |
| 64 | ; SI-DAG: v_alignbit_b32 |
| 65 | ; SI-DAG: v_bfi_b32 |
| 66 | ; SI-DAG: v_alignbit_b32 |
| 67 | ; SI-DAG: v_alignbit_b32 |
| 68 | ; SI-DAG: v_bfi_b32 |
| 69 | ; SI-DAG: v_alignbit_b32 |
| 70 | ; SI-DAG: v_alignbit_b32 |
| 71 | ; SI-DAG: v_bfi_b32 |
| 72 | ; SI-DAG: v_alignbit_b32 |
| 73 | ; SI-DAG: v_alignbit_b32 |
| 74 | ; SI-DAG: v_bfi_b32 |
| 75 | ; SI-DAG: v_alignbit_b32 |
| 76 | ; SI-DAG: v_alignbit_b32 |
| 77 | ; SI-DAG: v_bfi_b32 |
| 78 | ; SI-DAG: v_alignbit_b32 |
| 79 | ; SI-DAG: v_alignbit_b32 |
| 80 | ; SI-DAG: v_bfi_b32 |
| 81 | ; SI-DAG: v_alignbit_b32 |
| 82 | ; SI-DAG: v_alignbit_b32 |
| 83 | ; SI-DAG: v_bfi_b32 |
| 84 | ; SI-DAG: v_alignbit_b32 |
| 85 | ; SI-DAG: v_alignbit_b32 |
| 86 | ; SI-DAG: v_bfi_b32 |
| 87 | ; SI: s_endpgm |
Matt Arsenault | e306a32 | 2014-10-21 16:25:08 +0000 | [diff] [blame] | 88 | define void @test_bswap_v8i32(<8 x i32> addrspace(1)* %out, <8 x i32> addrspace(1)* %in) nounwind { |
| 89 | %val = load <8 x i32> addrspace(1)* %in, align 32 |
| 90 | %bswap = call <8 x i32> @llvm.bswap.v8i32(<8 x i32> %val) nounwind readnone |
| 91 | store <8 x i32> %bswap, <8 x i32> addrspace(1)* %out, align 32 |
| 92 | ret void |
| 93 | } |
| 94 | |
Matt Arsenault | 13ccc8f | 2014-06-09 16:20:25 +0000 | [diff] [blame] | 95 | define void @test_bswap_i64(i64 addrspace(1)* %out, i64 addrspace(1)* %in) nounwind { |
| 96 | %val = load i64 addrspace(1)* %in, align 8 |
| 97 | %bswap = call i64 @llvm.bswap.i64(i64 %val) nounwind readnone |
| 98 | store i64 %bswap, i64 addrspace(1)* %out, align 8 |
| 99 | ret void |
| 100 | } |
| 101 | |
| 102 | define void @test_bswap_v2i64(<2 x i64> addrspace(1)* %out, <2 x i64> addrspace(1)* %in) nounwind { |
| 103 | %val = load <2 x i64> addrspace(1)* %in, align 16 |
| 104 | %bswap = call <2 x i64> @llvm.bswap.v2i64(<2 x i64> %val) nounwind readnone |
| 105 | store <2 x i64> %bswap, <2 x i64> addrspace(1)* %out, align 16 |
| 106 | ret void |
| 107 | } |
| 108 | |
| 109 | define void @test_bswap_v4i64(<4 x i64> addrspace(1)* %out, <4 x i64> addrspace(1)* %in) nounwind { |
| 110 | %val = load <4 x i64> addrspace(1)* %in, align 32 |
| 111 | %bswap = call <4 x i64> @llvm.bswap.v4i64(<4 x i64> %val) nounwind readnone |
| 112 | store <4 x i64> %bswap, <4 x i64> addrspace(1)* %out, align 32 |
| 113 | ret void |
| 114 | } |