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gerrit-public.fairphone.software / toolchain / llvm-project / 5ac9fd64a3fe21210cf17c0517a39feb0063c106 / . / llvm / lib / Target / AMDGPU / VOPCInstructions.td
blob: a3550a63677bac9e6ec842c9077fcff6f0b12855 [file] [log] [blame]
Valery Pykhtin2828b9b2016-09-19 14:39:49 +0000[diff] [blame]1//===-- VOPCInstructions.td - Vector Instruction Defintions ---------------===//
2//
3// The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9
10//===----------------------------------------------------------------------===//
11// Encodings
12//===----------------------------------------------------------------------===//
13
14class VOPCe <bits<8> op> : Enc32 {
15 bits<9> src0;
16 bits<8> src1;
17
18 let Inst{8-0} = src0;
19 let Inst{16-9} = src1;
20 let Inst{24-17} = op;
21 let Inst{31-25} = 0x3e;
22}
23
Sam Koltona568e3d2016-12-22 12:57:41 +0000[diff] [blame]24class VOPC_SDWAe <bits<8> op, VOPProfile P> : VOP_SDWAe <P> {
25 bits<8> src1;
26
27 let Inst{8-0} = 0xf9; // sdwa
28 let Inst{16-9} = !if(P.HasSrc1, src1{7-0}, 0);
29 let Inst{24-17} = op;
30 let Inst{31-25} = 0x3e; // encoding
31
32 // VOPC disallows dst_sel and dst_unused as they have no effect on destination
33 let Inst{42-40} = SDWA.DWORD;
34 let Inst{44-43} = SDWA.UNUSED_PRESERVE;
35}
36
Valery Pykhtin2828b9b2016-09-19 14:39:49 +0000[diff] [blame]37//===----------------------------------------------------------------------===//
38// VOPC classes
39//===----------------------------------------------------------------------===//
40
41// VOPC instructions are a special case because for the 32-bit
42// encoding, we want to display the implicit vcc write as if it were
43// an explicit $dst.
44class VOPC_Profile<list<SchedReadWrite> sched, ValueType vt0, ValueType vt1 = vt0> :
45 VOPProfile <[i1, vt0, vt1, untyped]> {
46 let Asm32 = "vcc, $src0, $src1";
47 // The destination for 32-bit encoding is implicit.
48 let HasDst32 = 0;
49 let Outs64 = (outs VOPDstS64:$sdst);
50 list<SchedReadWrite> Schedule = sched;
51}
52
53class VOPC_Pseudo <string opName, VOPC_Profile P, list<dag> pattern=[]> :
54 InstSI<(outs), P.Ins32, "", pattern>,
55 VOP <opName>,
56 SIMCInstr<opName#"_e32", SIEncodingFamily.NONE> {
57
58 let isPseudo = 1;
59 let isCodeGenOnly = 1;
60 let UseNamedOperandTable = 1;
61
62 string Mnemonic = opName;
63 string AsmOperands = P.Asm32;
64
65 let Size = 4;
66 let mayLoad = 0;
67 let mayStore = 0;
68 let hasSideEffects = 0;
69
70 let VALU = 1;
71 let VOPC = 1;
72 let Uses = [EXEC];
73 let Defs = [VCC];
74
75 let SubtargetPredicate = isGCN;
76
77 VOPProfile Pfl = P;
78}
79
80class VOPC_Real <VOPC_Pseudo ps, int EncodingFamily> :
81 InstSI <ps.OutOperandList, ps.InOperandList, ps.PseudoInstr # " " # ps.AsmOperands, []>,
82 SIMCInstr <ps.PseudoInstr, EncodingFamily> {
83
84 let isPseudo = 0;
85 let isCodeGenOnly = 0;
86
Sam Koltona6792a32016-12-22 11:30:48 +0000[diff] [blame]87 let Constraints = ps.Constraints;
88 let DisableEncoding = ps.DisableEncoding;
89
Valery Pykhtin2828b9b2016-09-19 14:39:49 +0000[diff] [blame]90 // copy relevant pseudo op flags
91 let SubtargetPredicate = ps.SubtargetPredicate;
92 let AsmMatchConverter = ps.AsmMatchConverter;
93 let Constraints = ps.Constraints;
94 let DisableEncoding = ps.DisableEncoding;
95 let TSFlags = ps.TSFlags;
Dmitry Preobrazhensky03880f82017-03-03 14:31:06 +0000[diff] [blame]96 let UseNamedOperandTable = ps.UseNamedOperandTable;
97 let Uses = ps.Uses;
Valery Pykhtin2828b9b2016-09-19 14:39:49 +0000[diff] [blame]98}
99
Sam Koltona568e3d2016-12-22 12:57:41 +0000[diff] [blame]100class VOPC_SDWA_Pseudo <string OpName, VOPProfile P, list<dag> pattern=[]> :
101 VOP_SDWA_Pseudo <OpName, P, pattern> {
102 let AsmMatchConverter = "cvtSdwaVOPC";
103}
104
Valery Pykhtin2828b9b2016-09-19 14:39:49 +0000[diff] [blame]105// This class is used only with VOPC instructions. Use $sdst for out operand
Valery Pykhtin355103f2016-09-23 09:08:07 +0000[diff] [blame]106class VOPCInstAlias <VOP3_Pseudo ps, Instruction inst, VOPProfile p = ps.Pfl> :
Valery Pykhtin2828b9b2016-09-19 14:39:49 +0000[diff] [blame]107 InstAlias <ps.OpName#" "#p.Asm32, (inst)>, PredicateControl {
108
109 field bit isCompare;
110 field bit isCommutable;
111
112 let ResultInst =
113 !if (p.HasDst32,
114 !if (!eq(p.NumSrcArgs, 0),
115 // 1 dst, 0 src
116 (inst p.DstRC:$sdst),
117 !if (!eq(p.NumSrcArgs, 1),
118 // 1 dst, 1 src
119 (inst p.DstRC:$sdst, p.Src0RC32:$src0),
120 !if (!eq(p.NumSrcArgs, 2),
121 // 1 dst, 2 src
122 (inst p.DstRC:$sdst, p.Src0RC32:$src0, p.Src1RC32:$src1),
123 // else - unreachable
124 (inst)))),
125 // else
126 !if (!eq(p.NumSrcArgs, 2),
127 // 0 dst, 2 src
128 (inst p.Src0RC32:$src0, p.Src1RC32:$src1),
129 !if (!eq(p.NumSrcArgs, 1),
130 // 0 dst, 1 src
131 (inst p.Src0RC32:$src1),
132 // else
133 // 0 dst, 0 src
134 (inst))));
135
136 let AsmVariantName = AMDGPUAsmVariants.Default;
137 let SubtargetPredicate = AssemblerPredicate;
138}
139
140multiclass VOPC_Pseudos <string opName,
141 VOPC_Profile P,
142 PatLeaf cond = COND_NULL,
143 string revOp = opName,
144 bit DefExec = 0> {
145
146 def _e32 : VOPC_Pseudo <opName, P>,
147 Commutable_REV<revOp#"_e32", !eq(revOp, opName)> {
148 let Defs = !if(DefExec, [VCC, EXEC], [VCC]);
149 let SchedRW = P.Schedule;
150 let isConvergent = DefExec;
151 let isCompare = 1;
152 let isCommutable = 1;
153 }
Sam Koltona568e3d2016-12-22 12:57:41 +0000[diff] [blame]154
Valery Pykhtin355103f2016-09-23 09:08:07 +0000[diff] [blame]155 def _e64 : VOP3_Pseudo<opName, P,
Valery Pykhtin2828b9b2016-09-19 14:39:49 +0000[diff] [blame]156 !if(P.HasModifiers,
157 [(set i1:$sdst,
158 (setcc (P.Src0VT (VOP3Mods0 P.Src0VT:$src0, i32:$src0_modifiers,
159 i1:$clamp, i32:$omod)),
160 (P.Src1VT (VOP3Mods P.Src1VT:$src1, i32:$src1_modifiers)),
161 cond))],
162 [(set i1:$sdst, (setcc P.Src0VT:$src0, P.Src1VT:$src1, cond))])>,
163 Commutable_REV<revOp#"_e64", !eq(revOp, opName)> {
164 let Defs = !if(DefExec, [EXEC], []);
165 let SchedRW = P.Schedule;
166 let isCompare = 1;
167 let isCommutable = 1;
168 }
Sam Koltona568e3d2016-12-22 12:57:41 +0000[diff] [blame]169
Sam Kolton07dbde22017-01-20 10:01:25 +0000[diff] [blame]170 def _sdwa : VOPC_SDWA_Pseudo <opName, P> {
Sam Koltona568e3d2016-12-22 12:57:41 +0000[diff] [blame]171 let Defs = !if(DefExec, [VCC, EXEC], [VCC]);
172 let SchedRW = P.Schedule;
173 let isConvergent = DefExec;
174 let isCompare = 1;
Sam Koltona568e3d2016-12-22 12:57:41 +0000[diff] [blame]175 }
Valery Pykhtin2828b9b2016-09-19 14:39:49 +0000[diff] [blame]176}
177
Konstantin Zhuravlyovf86e4b72016-11-13 07:01:11 +0000[diff] [blame]178def VOPC_I1_F16_F16 : VOPC_Profile<[Write32Bit], f16>;
Valery Pykhtin2828b9b2016-09-19 14:39:49 +0000[diff] [blame]179def VOPC_I1_F32_F32 : VOPC_Profile<[Write32Bit], f32>;
180def VOPC_I1_F64_F64 : VOPC_Profile<[WriteDoubleAdd], f64>;
Matt Arsenault18f56be2016-12-22 16:27:11 +0000[diff] [blame]181def VOPC_I1_I16_I16 : VOPC_Profile<[Write32Bit], i16>;
Valery Pykhtin2828b9b2016-09-19 14:39:49 +0000[diff] [blame]182def VOPC_I1_I32_I32 : VOPC_Profile<[Write32Bit], i32>;
183def VOPC_I1_I64_I64 : VOPC_Profile<[Write64Bit], i64>;
184
Konstantin Zhuravlyovf86e4b72016-11-13 07:01:11 +0000[diff] [blame]185multiclass VOPC_F16 <string opName, PatLeaf cond = COND_NULL, string revOp = opName> :
186 VOPC_Pseudos <opName, VOPC_I1_F16_F16, cond, revOp, 0>;
187
Valery Pykhtin2828b9b2016-09-19 14:39:49 +0000[diff] [blame]188multiclass VOPC_F32 <string opName, PatLeaf cond = COND_NULL, string revOp = opName> :
189 VOPC_Pseudos <opName, VOPC_I1_F32_F32, cond, revOp, 0>;
190
191multiclass VOPC_F64 <string opName, PatLeaf cond = COND_NULL, string revOp = opName> :
192 VOPC_Pseudos <opName, VOPC_I1_F64_F64, cond, revOp, 0>;
193
Matt Arsenault18f56be2016-12-22 16:27:11 +0000[diff] [blame]194multiclass VOPC_I16 <string opName, PatLeaf cond = COND_NULL, string revOp = opName> :
195 VOPC_Pseudos <opName, VOPC_I1_I16_I16, cond, revOp, 0>;
196
Valery Pykhtin2828b9b2016-09-19 14:39:49 +0000[diff] [blame]197multiclass VOPC_I32 <string opName, PatLeaf cond = COND_NULL, string revOp = opName> :
198 VOPC_Pseudos <opName, VOPC_I1_I32_I32, cond, revOp, 0>;
199
200multiclass VOPC_I64 <string opName, PatLeaf cond = COND_NULL, string revOp = opName> :
201 VOPC_Pseudos <opName, VOPC_I1_I64_I64, cond, revOp, 0>;
202
Konstantin Zhuravlyovf86e4b72016-11-13 07:01:11 +0000[diff] [blame]203multiclass VOPCX_F16 <string opName, string revOp = opName> :
204 VOPC_Pseudos <opName, VOPC_I1_F16_F16, COND_NULL, revOp, 1>;
205
Valery Pykhtin2828b9b2016-09-19 14:39:49 +0000[diff] [blame]206multiclass VOPCX_F32 <string opName, string revOp = opName> :
207 VOPC_Pseudos <opName, VOPC_I1_F32_F32, COND_NULL, revOp, 1>;
208
209multiclass VOPCX_F64 <string opName, string revOp = opName> :
210 VOPC_Pseudos <opName, VOPC_I1_F64_F64, COND_NULL, revOp, 1>;
211
Matt Arsenault3c97e202016-12-22 16:27:14 +0000[diff] [blame]212multiclass VOPCX_I16 <string opName, string revOp = opName> :
213 VOPC_Pseudos <opName, VOPC_I1_I16_I16, COND_NULL, revOp, 1>;
214
Valery Pykhtin2828b9b2016-09-19 14:39:49 +0000[diff] [blame]215multiclass VOPCX_I32 <string opName, string revOp = opName> :
216 VOPC_Pseudos <opName, VOPC_I1_I32_I32, COND_NULL, revOp, 1>;
217
218multiclass VOPCX_I64 <string opName, string revOp = opName> :
219 VOPC_Pseudos <opName, VOPC_I1_I64_I64, COND_NULL, revOp, 1>;
220
221
222//===----------------------------------------------------------------------===//
223// Compare instructions
224//===----------------------------------------------------------------------===//
225
226defm V_CMP_F_F32 : VOPC_F32 <"v_cmp_f_f32">;
227defm V_CMP_LT_F32 : VOPC_F32 <"v_cmp_lt_f32", COND_OLT, "v_cmp_gt_f32">;
228defm V_CMP_EQ_F32 : VOPC_F32 <"v_cmp_eq_f32", COND_OEQ>;
229defm V_CMP_LE_F32 : VOPC_F32 <"v_cmp_le_f32", COND_OLE, "v_cmp_ge_f32">;
230defm V_CMP_GT_F32 : VOPC_F32 <"v_cmp_gt_f32", COND_OGT>;
231defm V_CMP_LG_F32 : VOPC_F32 <"v_cmp_lg_f32", COND_ONE>;
232defm V_CMP_GE_F32 : VOPC_F32 <"v_cmp_ge_f32", COND_OGE>;
233defm V_CMP_O_F32 : VOPC_F32 <"v_cmp_o_f32", COND_O>;
234defm V_CMP_U_F32 : VOPC_F32 <"v_cmp_u_f32", COND_UO>;
235defm V_CMP_NGE_F32 : VOPC_F32 <"v_cmp_nge_f32", COND_ULT, "v_cmp_nle_f32">;
236defm V_CMP_NLG_F32 : VOPC_F32 <"v_cmp_nlg_f32", COND_UEQ>;
237defm V_CMP_NGT_F32 : VOPC_F32 <"v_cmp_ngt_f32", COND_ULE, "v_cmp_nlt_f32">;
238defm V_CMP_NLE_F32 : VOPC_F32 <"v_cmp_nle_f32", COND_UGT>;
239defm V_CMP_NEQ_F32 : VOPC_F32 <"v_cmp_neq_f32", COND_UNE>;
240defm V_CMP_NLT_F32 : VOPC_F32 <"v_cmp_nlt_f32", COND_UGE>;
241defm V_CMP_TRU_F32 : VOPC_F32 <"v_cmp_tru_f32">;
242
243defm V_CMPX_F_F32 : VOPCX_F32 <"v_cmpx_f_f32">;
244defm V_CMPX_LT_F32 : VOPCX_F32 <"v_cmpx_lt_f32", "v_cmpx_gt_f32">;
245defm V_CMPX_EQ_F32 : VOPCX_F32 <"v_cmpx_eq_f32">;
246defm V_CMPX_LE_F32 : VOPCX_F32 <"v_cmpx_le_f32", "v_cmpx_ge_f32">;
247defm V_CMPX_GT_F32 : VOPCX_F32 <"v_cmpx_gt_f32">;
248defm V_CMPX_LG_F32 : VOPCX_F32 <"v_cmpx_lg_f32">;
249defm V_CMPX_GE_F32 : VOPCX_F32 <"v_cmpx_ge_f32">;
250defm V_CMPX_O_F32 : VOPCX_F32 <"v_cmpx_o_f32">;
251defm V_CMPX_U_F32 : VOPCX_F32 <"v_cmpx_u_f32">;
Matt Arsenault3de76b92016-12-22 04:39:41 +0000[diff] [blame]252defm V_CMPX_NGE_F32 : VOPCX_F32 <"v_cmpx_nge_f32", "v_cmpx_nle_f32">;
Valery Pykhtin2828b9b2016-09-19 14:39:49 +0000[diff] [blame]253defm V_CMPX_NLG_F32 : VOPCX_F32 <"v_cmpx_nlg_f32">;
Matt Arsenault3de76b92016-12-22 04:39:41 +0000[diff] [blame]254defm V_CMPX_NGT_F32 : VOPCX_F32 <"v_cmpx_ngt_f32", "v_cmpx_nlt_f32">;
Valery Pykhtin2828b9b2016-09-19 14:39:49 +0000[diff] [blame]255defm V_CMPX_NLE_F32 : VOPCX_F32 <"v_cmpx_nle_f32">;
256defm V_CMPX_NEQ_F32 : VOPCX_F32 <"v_cmpx_neq_f32">;
257defm V_CMPX_NLT_F32 : VOPCX_F32 <"v_cmpx_nlt_f32">;
258defm V_CMPX_TRU_F32 : VOPCX_F32 <"v_cmpx_tru_f32">;
259
260defm V_CMP_F_F64 : VOPC_F64 <"v_cmp_f_f64">;
261defm V_CMP_LT_F64 : VOPC_F64 <"v_cmp_lt_f64", COND_OLT, "v_cmp_gt_f64">;
262defm V_CMP_EQ_F64 : VOPC_F64 <"v_cmp_eq_f64", COND_OEQ>;
263defm V_CMP_LE_F64 : VOPC_F64 <"v_cmp_le_f64", COND_OLE, "v_cmp_ge_f64">;
264defm V_CMP_GT_F64 : VOPC_F64 <"v_cmp_gt_f64", COND_OGT>;
265defm V_CMP_LG_F64 : VOPC_F64 <"v_cmp_lg_f64", COND_ONE>;
266defm V_CMP_GE_F64 : VOPC_F64 <"v_cmp_ge_f64", COND_OGE>;
267defm V_CMP_O_F64 : VOPC_F64 <"v_cmp_o_f64", COND_O>;
268defm V_CMP_U_F64 : VOPC_F64 <"v_cmp_u_f64", COND_UO>;
269defm V_CMP_NGE_F64 : VOPC_F64 <"v_cmp_nge_f64", COND_ULT, "v_cmp_nle_f64">;
270defm V_CMP_NLG_F64 : VOPC_F64 <"v_cmp_nlg_f64", COND_UEQ>;
271defm V_CMP_NGT_F64 : VOPC_F64 <"v_cmp_ngt_f64", COND_ULE, "v_cmp_nlt_f64">;
272defm V_CMP_NLE_F64 : VOPC_F64 <"v_cmp_nle_f64", COND_UGT>;
273defm V_CMP_NEQ_F64 : VOPC_F64 <"v_cmp_neq_f64", COND_UNE>;
274defm V_CMP_NLT_F64 : VOPC_F64 <"v_cmp_nlt_f64", COND_UGE>;
275defm V_CMP_TRU_F64 : VOPC_F64 <"v_cmp_tru_f64">;
276
277defm V_CMPX_F_F64 : VOPCX_F64 <"v_cmpx_f_f64">;
278defm V_CMPX_LT_F64 : VOPCX_F64 <"v_cmpx_lt_f64", "v_cmpx_gt_f64">;
279defm V_CMPX_EQ_F64 : VOPCX_F64 <"v_cmpx_eq_f64">;
280defm V_CMPX_LE_F64 : VOPCX_F64 <"v_cmpx_le_f64", "v_cmpx_ge_f64">;
281defm V_CMPX_GT_F64 : VOPCX_F64 <"v_cmpx_gt_f64">;
282defm V_CMPX_LG_F64 : VOPCX_F64 <"v_cmpx_lg_f64">;
283defm V_CMPX_GE_F64 : VOPCX_F64 <"v_cmpx_ge_f64">;
284defm V_CMPX_O_F64 : VOPCX_F64 <"v_cmpx_o_f64">;
285defm V_CMPX_U_F64 : VOPCX_F64 <"v_cmpx_u_f64">;
286defm V_CMPX_NGE_F64 : VOPCX_F64 <"v_cmpx_nge_f64", "v_cmpx_nle_f64">;
287defm V_CMPX_NLG_F64 : VOPCX_F64 <"v_cmpx_nlg_f64">;
288defm V_CMPX_NGT_F64 : VOPCX_F64 <"v_cmpx_ngt_f64", "v_cmpx_nlt_f64">;
289defm V_CMPX_NLE_F64 : VOPCX_F64 <"v_cmpx_nle_f64">;
290defm V_CMPX_NEQ_F64 : VOPCX_F64 <"v_cmpx_neq_f64">;
291defm V_CMPX_NLT_F64 : VOPCX_F64 <"v_cmpx_nlt_f64">;
292defm V_CMPX_TRU_F64 : VOPCX_F64 <"v_cmpx_tru_f64">;
293
294let SubtargetPredicate = isSICI in {
295
296defm V_CMPS_F_F32 : VOPC_F32 <"v_cmps_f_f32">;
297defm V_CMPS_LT_F32 : VOPC_F32 <"v_cmps_lt_f32", COND_NULL, "v_cmps_gt_f32">;
298defm V_CMPS_EQ_F32 : VOPC_F32 <"v_cmps_eq_f32">;
299defm V_CMPS_LE_F32 : VOPC_F32 <"v_cmps_le_f32", COND_NULL, "v_cmps_ge_f32">;
300defm V_CMPS_GT_F32 : VOPC_F32 <"v_cmps_gt_f32">;
301defm V_CMPS_LG_F32 : VOPC_F32 <"v_cmps_lg_f32">;
302defm V_CMPS_GE_F32 : VOPC_F32 <"v_cmps_ge_f32">;
303defm V_CMPS_O_F32 : VOPC_F32 <"v_cmps_o_f32">;
304defm V_CMPS_U_F32 : VOPC_F32 <"v_cmps_u_f32">;
305defm V_CMPS_NGE_F32 : VOPC_F32 <"v_cmps_nge_f32", COND_NULL, "v_cmps_nle_f32">;
306defm V_CMPS_NLG_F32 : VOPC_F32 <"v_cmps_nlg_f32">;
307defm V_CMPS_NGT_F32 : VOPC_F32 <"v_cmps_ngt_f32", COND_NULL, "v_cmps_nlt_f32">;
308defm V_CMPS_NLE_F32 : VOPC_F32 <"v_cmps_nle_f32">;
309defm V_CMPS_NEQ_F32 : VOPC_F32 <"v_cmps_neq_f32">;
310defm V_CMPS_NLT_F32 : VOPC_F32 <"v_cmps_nlt_f32">;
311defm V_CMPS_TRU_F32 : VOPC_F32 <"v_cmps_tru_f32">;
312
313defm V_CMPSX_F_F32 : VOPCX_F32 <"v_cmpsx_f_f32">;
314defm V_CMPSX_LT_F32 : VOPCX_F32 <"v_cmpsx_lt_f32", "v_cmpsx_gt_f32">;
315defm V_CMPSX_EQ_F32 : VOPCX_F32 <"v_cmpsx_eq_f32">;
316defm V_CMPSX_LE_F32 : VOPCX_F32 <"v_cmpsx_le_f32", "v_cmpsx_ge_f32">;
317defm V_CMPSX_GT_F32 : VOPCX_F32 <"v_cmpsx_gt_f32">;
318defm V_CMPSX_LG_F32 : VOPCX_F32 <"v_cmpsx_lg_f32">;
319defm V_CMPSX_GE_F32 : VOPCX_F32 <"v_cmpsx_ge_f32">;
320defm V_CMPSX_O_F32 : VOPCX_F32 <"v_cmpsx_o_f32">;
321defm V_CMPSX_U_F32 : VOPCX_F32 <"v_cmpsx_u_f32">;
322defm V_CMPSX_NGE_F32 : VOPCX_F32 <"v_cmpsx_nge_f32", "v_cmpsx_nle_f32">;
323defm V_CMPSX_NLG_F32 : VOPCX_F32 <"v_cmpsx_nlg_f32">;
324defm V_CMPSX_NGT_F32 : VOPCX_F32 <"v_cmpsx_ngt_f32", "v_cmpsx_nlt_f32">;
325defm V_CMPSX_NLE_F32 : VOPCX_F32 <"v_cmpsx_nle_f32">;
326defm V_CMPSX_NEQ_F32 : VOPCX_F32 <"v_cmpsx_neq_f32">;
327defm V_CMPSX_NLT_F32 : VOPCX_F32 <"v_cmpsx_nlt_f32">;
328defm V_CMPSX_TRU_F32 : VOPCX_F32 <"v_cmpsx_tru_f32">;
329
330defm V_CMPS_F_F64 : VOPC_F64 <"v_cmps_f_f64">;
331defm V_CMPS_LT_F64 : VOPC_F64 <"v_cmps_lt_f64", COND_NULL, "v_cmps_gt_f64">;
332defm V_CMPS_EQ_F64 : VOPC_F64 <"v_cmps_eq_f64">;
333defm V_CMPS_LE_F64 : VOPC_F64 <"v_cmps_le_f64", COND_NULL, "v_cmps_ge_f64">;
334defm V_CMPS_GT_F64 : VOPC_F64 <"v_cmps_gt_f64">;
335defm V_CMPS_LG_F64 : VOPC_F64 <"v_cmps_lg_f64">;
336defm V_CMPS_GE_F64 : VOPC_F64 <"v_cmps_ge_f64">;
337defm V_CMPS_O_F64 : VOPC_F64 <"v_cmps_o_f64">;
338defm V_CMPS_U_F64 : VOPC_F64 <"v_cmps_u_f64">;
339defm V_CMPS_NGE_F64 : VOPC_F64 <"v_cmps_nge_f64", COND_NULL, "v_cmps_nle_f64">;
340defm V_CMPS_NLG_F64 : VOPC_F64 <"v_cmps_nlg_f64">;
341defm V_CMPS_NGT_F64 : VOPC_F64 <"v_cmps_ngt_f64", COND_NULL, "v_cmps_nlt_f64">;
342defm V_CMPS_NLE_F64 : VOPC_F64 <"v_cmps_nle_f64">;
343defm V_CMPS_NEQ_F64 : VOPC_F64 <"v_cmps_neq_f64">;
344defm V_CMPS_NLT_F64 : VOPC_F64 <"v_cmps_nlt_f64">;
345defm V_CMPS_TRU_F64 : VOPC_F64 <"v_cmps_tru_f64">;
346
347defm V_CMPSX_F_F64 : VOPCX_F64 <"v_cmpsx_f_f64">;
348defm V_CMPSX_LT_F64 : VOPCX_F64 <"v_cmpsx_lt_f64", "v_cmpsx_gt_f64">;
349defm V_CMPSX_EQ_F64 : VOPCX_F64 <"v_cmpsx_eq_f64">;
350defm V_CMPSX_LE_F64 : VOPCX_F64 <"v_cmpsx_le_f64", "v_cmpsx_ge_f64">;
351defm V_CMPSX_GT_F64 : VOPCX_F64 <"v_cmpsx_gt_f64">;
352defm V_CMPSX_LG_F64 : VOPCX_F64 <"v_cmpsx_lg_f64">;
353defm V_CMPSX_GE_F64 : VOPCX_F64 <"v_cmpsx_ge_f64">;
354defm V_CMPSX_O_F64 : VOPCX_F64 <"v_cmpsx_o_f64">;
355defm V_CMPSX_U_F64 : VOPCX_F64 <"v_cmpsx_u_f64">;
356defm V_CMPSX_NGE_F64 : VOPCX_F64 <"v_cmpsx_nge_f64", "v_cmpsx_nle_f64">;
357defm V_CMPSX_NLG_F64 : VOPCX_F64 <"v_cmpsx_nlg_f64">;
358defm V_CMPSX_NGT_F64 : VOPCX_F64 <"v_cmpsx_ngt_f64", "v_cmpsx_nlt_f64">;
359defm V_CMPSX_NLE_F64 : VOPCX_F64 <"v_cmpsx_nle_f64">;
360defm V_CMPSX_NEQ_F64 : VOPCX_F64 <"v_cmpsx_neq_f64">;
361defm V_CMPSX_NLT_F64 : VOPCX_F64 <"v_cmpsx_nlt_f64">;
362defm V_CMPSX_TRU_F64 : VOPCX_F64 <"v_cmpsx_tru_f64">;
363
364} // End SubtargetPredicate = isSICI
365
Matt Arsenault18f56be2016-12-22 16:27:11 +0000[diff] [blame]366let SubtargetPredicate = Has16BitInsts in {
Konstantin Zhuravlyovf86e4b72016-11-13 07:01:11 +0000[diff] [blame]367
368defm V_CMP_F_F16 : VOPC_F16 <"v_cmp_f_f16">;
369defm V_CMP_LT_F16 : VOPC_F16 <"v_cmp_lt_f16", COND_OLT, "v_cmp_gt_f16">;
370defm V_CMP_EQ_F16 : VOPC_F16 <"v_cmp_eq_f16", COND_OEQ>;
371defm V_CMP_LE_F16 : VOPC_F16 <"v_cmp_le_f16", COND_OLE, "v_cmp_ge_f16">;
372defm V_CMP_GT_F16 : VOPC_F16 <"v_cmp_gt_f16", COND_OGT>;
373defm V_CMP_LG_F16 : VOPC_F16 <"v_cmp_lg_f16", COND_ONE>;
374defm V_CMP_GE_F16 : VOPC_F16 <"v_cmp_ge_f16", COND_OGE>;
375defm V_CMP_O_F16 : VOPC_F16 <"v_cmp_o_f16", COND_O>;
376defm V_CMP_U_F16 : VOPC_F16 <"v_cmp_u_f16", COND_UO>;
377defm V_CMP_NGE_F16 : VOPC_F16 <"v_cmp_nge_f16", COND_ULT, "v_cmp_nle_f16">;
378defm V_CMP_NLG_F16 : VOPC_F16 <"v_cmp_nlg_f16", COND_UEQ>;
379defm V_CMP_NGT_F16 : VOPC_F16 <"v_cmp_ngt_f16", COND_ULE, "v_cmp_nlt_f16">;
380defm V_CMP_NLE_F16 : VOPC_F16 <"v_cmp_nle_f16", COND_UGT>;
381defm V_CMP_NEQ_F16 : VOPC_F16 <"v_cmp_neq_f16", COND_UNE>;
382defm V_CMP_NLT_F16 : VOPC_F16 <"v_cmp_nlt_f16", COND_UGE>;
383defm V_CMP_TRU_F16 : VOPC_F16 <"v_cmp_tru_f16">;
384
385defm V_CMPX_F_F16 : VOPCX_F16 <"v_cmpx_f_f16">;
386defm V_CMPX_LT_F16 : VOPCX_F16 <"v_cmpx_lt_f16", "v_cmpx_gt_f16">;
387defm V_CMPX_EQ_F16 : VOPCX_F16 <"v_cmpx_eq_f16">;
388defm V_CMPX_LE_F16 : VOPCX_F16 <"v_cmpx_le_f16", "v_cmpx_ge_f16">;
389defm V_CMPX_GT_F16 : VOPCX_F16 <"v_cmpx_gt_f16">;
390defm V_CMPX_LG_F16 : VOPCX_F16 <"v_cmpx_lg_f16">;
391defm V_CMPX_GE_F16 : VOPCX_F16 <"v_cmpx_ge_f16">;
392defm V_CMPX_O_F16 : VOPCX_F16 <"v_cmpx_o_f16">;
393defm V_CMPX_U_F16 : VOPCX_F16 <"v_cmpx_u_f16">;
Matt Arsenault3de76b92016-12-22 04:39:41 +0000[diff] [blame]394defm V_CMPX_NGE_F16 : VOPCX_F16 <"v_cmpx_nge_f16", "v_cmpx_nle_f16">;
Konstantin Zhuravlyovf86e4b72016-11-13 07:01:11 +0000[diff] [blame]395defm V_CMPX_NLG_F16 : VOPCX_F16 <"v_cmpx_nlg_f16">;
Matt Arsenault3de76b92016-12-22 04:39:41 +0000[diff] [blame]396defm V_CMPX_NGT_F16 : VOPCX_F16 <"v_cmpx_ngt_f16", "v_cmpx_nlt_f16">;
Konstantin Zhuravlyovf86e4b72016-11-13 07:01:11 +0000[diff] [blame]397defm V_CMPX_NLE_F16 : VOPCX_F16 <"v_cmpx_nle_f16">;
398defm V_CMPX_NEQ_F16 : VOPCX_F16 <"v_cmpx_neq_f16">;
399defm V_CMPX_NLT_F16 : VOPCX_F16 <"v_cmpx_nlt_f16">;
400defm V_CMPX_TRU_F16 : VOPCX_F16 <"v_cmpx_tru_f16">;
401
Matt Arsenault18f56be2016-12-22 16:27:11 +0000[diff] [blame]402defm V_CMP_F_I16 : VOPC_I16 <"v_cmp_f_i16">;
403defm V_CMP_LT_I16 : VOPC_I16 <"v_cmp_lt_i16", COND_SLT, "v_cmp_gt_i16">;
404defm V_CMP_EQ_I16 : VOPC_I16 <"v_cmp_eq_i16">;
405defm V_CMP_LE_I16 : VOPC_I16 <"v_cmp_le_i16", COND_SLE, "v_cmp_ge_i16">;
406defm V_CMP_GT_I16 : VOPC_I16 <"v_cmp_gt_i16", COND_SGT>;
407defm V_CMP_NE_I16 : VOPC_I16 <"v_cmp_ne_i16">;
408defm V_CMP_GE_I16 : VOPC_I16 <"v_cmp_ge_i16", COND_SGE>;
409defm V_CMP_T_I16 : VOPC_I16 <"v_cmp_t_i16">;
410
411defm V_CMP_F_U16 : VOPC_I16 <"v_cmp_f_u16">;
412defm V_CMP_LT_U16 : VOPC_I16 <"v_cmp_lt_u16", COND_ULT, "v_cmp_gt_u16">;
413defm V_CMP_EQ_U16 : VOPC_I16 <"v_cmp_eq_u16", COND_EQ>;
414defm V_CMP_LE_U16 : VOPC_I16 <"v_cmp_le_u16", COND_ULE, "v_cmp_ge_u16">;
415defm V_CMP_GT_U16 : VOPC_I16 <"v_cmp_gt_u16", COND_UGT>;
416defm V_CMP_NE_U16 : VOPC_I16 <"v_cmp_ne_u16", COND_NE>;
417defm V_CMP_GE_U16 : VOPC_I16 <"v_cmp_ge_u16", COND_UGE>;
418defm V_CMP_T_U16 : VOPC_I16 <"v_cmp_t_u16">;
419
Matt Arsenault3c97e202016-12-22 16:27:14 +0000[diff] [blame]420defm V_CMPX_F_I16 : VOPCX_I16 <"v_cmpx_f_i16">;
421defm V_CMPX_LT_I16 : VOPCX_I16 <"v_cmpx_lt_i16", "v_cmpx_gt_i16">;
422defm V_CMPX_EQ_I16 : VOPCX_I16 <"v_cmpx_eq_i16">;
423defm V_CMPX_LE_I16 : VOPCX_I16 <"v_cmpx_le_i16", "v_cmpx_ge_i16">;
424defm V_CMPX_GT_I16 : VOPCX_I16 <"v_cmpx_gt_i16">;
425defm V_CMPX_NE_I16 : VOPCX_I16 <"v_cmpx_ne_i16">;
426defm V_CMPX_GE_I16 : VOPCX_I16 <"v_cmpx_ge_i16">;
427defm V_CMPX_T_I16 : VOPCX_I16 <"v_cmpx_t_i16">;
428defm V_CMPX_F_U16 : VOPCX_I16 <"v_cmpx_f_u16">;
429
430defm V_CMPX_LT_U16 : VOPCX_I16 <"v_cmpx_lt_u16", "v_cmpx_gt_u16">;
431defm V_CMPX_EQ_U16 : VOPCX_I16 <"v_cmpx_eq_u16">;
432defm V_CMPX_LE_U16 : VOPCX_I16 <"v_cmpx_le_u16", "v_cmpx_ge_u16">;
433defm V_CMPX_GT_U16 : VOPCX_I16 <"v_cmpx_gt_u16">;
434defm V_CMPX_NE_U16 : VOPCX_I16 <"v_cmpx_ne_u16">;
435defm V_CMPX_GE_U16 : VOPCX_I16 <"v_cmpx_ge_u16">;
436defm V_CMPX_T_U16 : VOPCX_I16 <"v_cmpx_t_u16">;
437
Matt Arsenault18f56be2016-12-22 16:27:11 +0000[diff] [blame]438} // End SubtargetPredicate = Has16BitInsts
Konstantin Zhuravlyovf86e4b72016-11-13 07:01:11 +0000[diff] [blame]439
Valery Pykhtin2828b9b2016-09-19 14:39:49 +0000[diff] [blame]440defm V_CMP_F_I32 : VOPC_I32 <"v_cmp_f_i32">;
441defm V_CMP_LT_I32 : VOPC_I32 <"v_cmp_lt_i32", COND_SLT, "v_cmp_gt_i32">;
Matt Arsenault5d8eb252016-09-30 01:50:20 +0000[diff] [blame]442defm V_CMP_EQ_I32 : VOPC_I32 <"v_cmp_eq_i32">;
Valery Pykhtin2828b9b2016-09-19 14:39:49 +0000[diff] [blame]443defm V_CMP_LE_I32 : VOPC_I32 <"v_cmp_le_i32", COND_SLE, "v_cmp_ge_i32">;
444defm V_CMP_GT_I32 : VOPC_I32 <"v_cmp_gt_i32", COND_SGT>;
Matt Arsenault5d8eb252016-09-30 01:50:20 +0000[diff] [blame]445defm V_CMP_NE_I32 : VOPC_I32 <"v_cmp_ne_i32">;
Valery Pykhtin2828b9b2016-09-19 14:39:49 +0000[diff] [blame]446defm V_CMP_GE_I32 : VOPC_I32 <"v_cmp_ge_i32", COND_SGE>;
447defm V_CMP_T_I32 : VOPC_I32 <"v_cmp_t_i32">;
448
449defm V_CMPX_F_I32 : VOPCX_I32 <"v_cmpx_f_i32">;
450defm V_CMPX_LT_I32 : VOPCX_I32 <"v_cmpx_lt_i32", "v_cmpx_gt_i32">;
451defm V_CMPX_EQ_I32 : VOPCX_I32 <"v_cmpx_eq_i32">;
452defm V_CMPX_LE_I32 : VOPCX_I32 <"v_cmpx_le_i32", "v_cmpx_ge_i32">;
453defm V_CMPX_GT_I32 : VOPCX_I32 <"v_cmpx_gt_i32">;
454defm V_CMPX_NE_I32 : VOPCX_I32 <"v_cmpx_ne_i32">;
455defm V_CMPX_GE_I32 : VOPCX_I32 <"v_cmpx_ge_i32">;
456defm V_CMPX_T_I32 : VOPCX_I32 <"v_cmpx_t_i32">;
457
458defm V_CMP_F_I64 : VOPC_I64 <"v_cmp_f_i64">;
459defm V_CMP_LT_I64 : VOPC_I64 <"v_cmp_lt_i64", COND_SLT, "v_cmp_gt_i64">;
Matt Arsenault5d8eb252016-09-30 01:50:20 +0000[diff] [blame]460defm V_CMP_EQ_I64 : VOPC_I64 <"v_cmp_eq_i64">;
Valery Pykhtin2828b9b2016-09-19 14:39:49 +0000[diff] [blame]461defm V_CMP_LE_I64 : VOPC_I64 <"v_cmp_le_i64", COND_SLE, "v_cmp_ge_i64">;
462defm V_CMP_GT_I64 : VOPC_I64 <"v_cmp_gt_i64", COND_SGT>;
Matt Arsenault5d8eb252016-09-30 01:50:20 +0000[diff] [blame]463defm V_CMP_NE_I64 : VOPC_I64 <"v_cmp_ne_i64">;
Valery Pykhtin2828b9b2016-09-19 14:39:49 +0000[diff] [blame]464defm V_CMP_GE_I64 : VOPC_I64 <"v_cmp_ge_i64", COND_SGE>;
465defm V_CMP_T_I64 : VOPC_I64 <"v_cmp_t_i64">;
466
467defm V_CMPX_F_I64 : VOPCX_I64 <"v_cmpx_f_i64">;
468defm V_CMPX_LT_I64 : VOPCX_I64 <"v_cmpx_lt_i64", "v_cmpx_gt_i64">;
469defm V_CMPX_EQ_I64 : VOPCX_I64 <"v_cmpx_eq_i64">;
470defm V_CMPX_LE_I64 : VOPCX_I64 <"v_cmpx_le_i64", "v_cmpx_ge_i64">;
471defm V_CMPX_GT_I64 : VOPCX_I64 <"v_cmpx_gt_i64">;
472defm V_CMPX_NE_I64 : VOPCX_I64 <"v_cmpx_ne_i64">;
473defm V_CMPX_GE_I64 : VOPCX_I64 <"v_cmpx_ge_i64">;
474defm V_CMPX_T_I64 : VOPCX_I64 <"v_cmpx_t_i64">;
475
476defm V_CMP_F_U32 : VOPC_I32 <"v_cmp_f_u32">;
477defm V_CMP_LT_U32 : VOPC_I32 <"v_cmp_lt_u32", COND_ULT, "v_cmp_gt_u32">;
478defm V_CMP_EQ_U32 : VOPC_I32 <"v_cmp_eq_u32", COND_EQ>;
479defm V_CMP_LE_U32 : VOPC_I32 <"v_cmp_le_u32", COND_ULE, "v_cmp_ge_u32">;
480defm V_CMP_GT_U32 : VOPC_I32 <"v_cmp_gt_u32", COND_UGT>;
481defm V_CMP_NE_U32 : VOPC_I32 <"v_cmp_ne_u32", COND_NE>;
482defm V_CMP_GE_U32 : VOPC_I32 <"v_cmp_ge_u32", COND_UGE>;
483defm V_CMP_T_U32 : VOPC_I32 <"v_cmp_t_u32">;
484
485defm V_CMPX_F_U32 : VOPCX_I32 <"v_cmpx_f_u32">;
486defm V_CMPX_LT_U32 : VOPCX_I32 <"v_cmpx_lt_u32", "v_cmpx_gt_u32">;
487defm V_CMPX_EQ_U32 : VOPCX_I32 <"v_cmpx_eq_u32">;
488defm V_CMPX_LE_U32 : VOPCX_I32 <"v_cmpx_le_u32", "v_cmpx_le_u32">;
489defm V_CMPX_GT_U32 : VOPCX_I32 <"v_cmpx_gt_u32">;
490defm V_CMPX_NE_U32 : VOPCX_I32 <"v_cmpx_ne_u32">;
491defm V_CMPX_GE_U32 : VOPCX_I32 <"v_cmpx_ge_u32">;
492defm V_CMPX_T_U32 : VOPCX_I32 <"v_cmpx_t_u32">;
493
494defm V_CMP_F_U64 : VOPC_I64 <"v_cmp_f_u64">;
495defm V_CMP_LT_U64 : VOPC_I64 <"v_cmp_lt_u64", COND_ULT, "v_cmp_gt_u64">;
496defm V_CMP_EQ_U64 : VOPC_I64 <"v_cmp_eq_u64", COND_EQ>;
497defm V_CMP_LE_U64 : VOPC_I64 <"v_cmp_le_u64", COND_ULE, "v_cmp_ge_u64">;
498defm V_CMP_GT_U64 : VOPC_I64 <"v_cmp_gt_u64", COND_UGT>;
499defm V_CMP_NE_U64 : VOPC_I64 <"v_cmp_ne_u64", COND_NE>;
500defm V_CMP_GE_U64 : VOPC_I64 <"v_cmp_ge_u64", COND_UGE>;
501defm V_CMP_T_U64 : VOPC_I64 <"v_cmp_t_u64">;
502
503defm V_CMPX_F_U64 : VOPCX_I64 <"v_cmpx_f_u64">;
504defm V_CMPX_LT_U64 : VOPCX_I64 <"v_cmpx_lt_u64", "v_cmpx_gt_u64">;
505defm V_CMPX_EQ_U64 : VOPCX_I64 <"v_cmpx_eq_u64">;
506defm V_CMPX_LE_U64 : VOPCX_I64 <"v_cmpx_le_u64", "v_cmpx_ge_u64">;
507defm V_CMPX_GT_U64 : VOPCX_I64 <"v_cmpx_gt_u64">;
508defm V_CMPX_NE_U64 : VOPCX_I64 <"v_cmpx_ne_u64">;
509defm V_CMPX_GE_U64 : VOPCX_I64 <"v_cmpx_ge_u64">;
510defm V_CMPX_T_U64 : VOPCX_I64 <"v_cmpx_t_u64">;
511
512//===----------------------------------------------------------------------===//
513// Class instructions
514//===----------------------------------------------------------------------===//
515
516class VOPC_Class_Profile<list<SchedReadWrite> sched, ValueType vt> :
517 VOPC_Profile<sched, vt, i32> {
518 let Ins64 = (ins Src0Mod:$src0_modifiers, Src0RC64:$src0, Src1RC64:$src1);
519 let Asm64 = "$sdst, $src0_modifiers, $src1";
Sam Kolton9772eb32017-01-11 11:46:30 +0000[diff] [blame]520 let InsSDWA = (ins Src0ModSDWA:$src0_modifiers, Src0SDWA:$src0,
521 Src1ModSDWA:$src1_modifiers, Src1SDWA:$src1,
Valery Pykhtin2828b9b2016-09-19 14:39:49 +0000[diff] [blame]522 clampmod:$clamp, src0_sel:$src0_sel, src1_sel:$src1_sel);
Valery Pykhtin355103f2016-09-23 09:08:07 +0000[diff] [blame]523 let AsmSDWA = " vcc, $src0_modifiers, $src1_modifiers$clamp $src0_sel $src1_sel";
524 let HasSrc1Mods = 0;
Valery Pykhtin2828b9b2016-09-19 14:39:49 +0000[diff] [blame]525 let HasClamp = 0;
526 let HasOMod = 0;
527}
528
529class getVOPCClassPat64 <VOPProfile P> {
530 list<dag> ret =
531 [(set i1:$sdst,
532 (AMDGPUfp_class
533 (P.Src0VT (VOP3Mods0Clamp0OMod P.Src0VT:$src0, i32:$src0_modifiers)),
534 P.Src1VT:$src1))];
535}
536
537// Special case for class instructions which only have modifiers on
538// the 1st source operand.
539multiclass VOPC_Class_Pseudos <string opName, VOPC_Profile p, bit DefExec> {
540 def _e32 : VOPC_Pseudo <opName, p> {
541 let Defs = !if(DefExec, [VCC, EXEC], [VCC]);
542 let SchedRW = p.Schedule;
543 let isConvergent = DefExec;
544 }
Sam Koltona568e3d2016-12-22 12:57:41 +0000[diff] [blame]545
Valery Pykhtin355103f2016-09-23 09:08:07 +0000[diff] [blame]546 def _e64 : VOP3_Pseudo<opName, p, getVOPCClassPat64<p>.ret> {
Valery Pykhtin2828b9b2016-09-19 14:39:49 +0000[diff] [blame]547 let Defs = !if(DefExec, [EXEC], []);
548 let SchedRW = p.Schedule;
549 }
Sam Koltona568e3d2016-12-22 12:57:41 +0000[diff] [blame]550
551 def _sdwa : VOPC_SDWA_Pseudo <opName, p> {
552 let Defs = !if(DefExec, [VCC, EXEC], [VCC]);
553 let SchedRW = p.Schedule;
554 let isConvergent = DefExec;
555 }
Valery Pykhtin2828b9b2016-09-19 14:39:49 +0000[diff] [blame]556}
557
Konstantin Zhuravlyovf86e4b72016-11-13 07:01:11 +0000[diff] [blame]558def VOPC_I1_F16_I32 : VOPC_Class_Profile<[Write32Bit], f16>;
Valery Pykhtin2828b9b2016-09-19 14:39:49 +0000[diff] [blame]559def VOPC_I1_F32_I32 : VOPC_Class_Profile<[Write32Bit], f32>;
560def VOPC_I1_F64_I32 : VOPC_Class_Profile<[WriteDoubleAdd], f64>;
561
Konstantin Zhuravlyovf86e4b72016-11-13 07:01:11 +0000[diff] [blame]562multiclass VOPC_CLASS_F16 <string opName> :
563 VOPC_Class_Pseudos <opName, VOPC_I1_F16_I32, 0>;
564
565multiclass VOPCX_CLASS_F16 <string opName> :
Dmitry Preobrazhensky5ac9fd62017-04-12 16:31:18 +0000[diff] [blame^]566 VOPC_Class_Pseudos <opName, VOPC_I1_F16_I32, 1>;
Konstantin Zhuravlyovf86e4b72016-11-13 07:01:11 +0000[diff] [blame]567
Valery Pykhtin2828b9b2016-09-19 14:39:49 +0000[diff] [blame]568multiclass VOPC_CLASS_F32 <string opName> :
569 VOPC_Class_Pseudos <opName, VOPC_I1_F32_I32, 0>;
570
571multiclass VOPCX_CLASS_F32 <string opName> :
572 VOPC_Class_Pseudos <opName, VOPC_I1_F32_I32, 1>;
573
574multiclass VOPC_CLASS_F64 <string opName> :
575 VOPC_Class_Pseudos <opName, VOPC_I1_F64_I32, 0>;
576
577multiclass VOPCX_CLASS_F64 <string opName> :
578 VOPC_Class_Pseudos <opName, VOPC_I1_F64_I32, 1>;
579
580defm V_CMP_CLASS_F32 : VOPC_CLASS_F32 <"v_cmp_class_f32">;
581defm V_CMPX_CLASS_F32 : VOPCX_CLASS_F32 <"v_cmpx_class_f32">;
582defm V_CMP_CLASS_F64 : VOPC_CLASS_F64 <"v_cmp_class_f64">;
583defm V_CMPX_CLASS_F64 : VOPCX_CLASS_F64 <"v_cmpx_class_f64">;
Konstantin Zhuravlyovf86e4b72016-11-13 07:01:11 +0000[diff] [blame]584defm V_CMP_CLASS_F16 : VOPC_CLASS_F16 <"v_cmp_class_f16">;
585defm V_CMPX_CLASS_F16 : VOPCX_CLASS_F16 <"v_cmpx_class_f16">;
Valery Pykhtin2828b9b2016-09-19 14:39:49 +0000[diff] [blame]586
587//===----------------------------------------------------------------------===//
588// V_ICMPIntrinsic Pattern.
589//===----------------------------------------------------------------------===//
590
591let Predicates = [isGCN] in {
592
593class ICMP_Pattern <PatLeaf cond, Instruction inst, ValueType vt> : Pat <
594 (AMDGPUsetcc vt:$src0, vt:$src1, cond),
595 (inst $src0, $src1)
596>;
597
Matt Arsenault5d8eb252016-09-30 01:50:20 +0000[diff] [blame]598def : ICMP_Pattern <COND_EQ, V_CMP_EQ_U32_e64, i32>;
599def : ICMP_Pattern <COND_NE, V_CMP_NE_U32_e64, i32>;
Valery Pykhtin2828b9b2016-09-19 14:39:49 +0000[diff] [blame]600def : ICMP_Pattern <COND_UGT, V_CMP_GT_U32_e64, i32>;
601def : ICMP_Pattern <COND_UGE, V_CMP_GE_U32_e64, i32>;
602def : ICMP_Pattern <COND_ULT, V_CMP_LT_U32_e64, i32>;
603def : ICMP_Pattern <COND_ULE, V_CMP_LE_U32_e64, i32>;
604def : ICMP_Pattern <COND_SGT, V_CMP_GT_I32_e64, i32>;
605def : ICMP_Pattern <COND_SGE, V_CMP_GE_I32_e64, i32>;
606def : ICMP_Pattern <COND_SLT, V_CMP_LT_I32_e64, i32>;
607def : ICMP_Pattern <COND_SLE, V_CMP_LE_I32_e64, i32>;
608
Matt Arsenault5d8eb252016-09-30 01:50:20 +0000[diff] [blame]609def : ICMP_Pattern <COND_EQ, V_CMP_EQ_U64_e64, i64>;
610def : ICMP_Pattern <COND_NE, V_CMP_NE_U64_e64, i64>;
Valery Pykhtin2828b9b2016-09-19 14:39:49 +0000[diff] [blame]611def : ICMP_Pattern <COND_UGT, V_CMP_GT_U64_e64, i64>;
612def : ICMP_Pattern <COND_UGE, V_CMP_GE_U64_e64, i64>;
613def : ICMP_Pattern <COND_ULT, V_CMP_LT_U64_e64, i64>;
614def : ICMP_Pattern <COND_ULE, V_CMP_LE_U64_e64, i64>;
615def : ICMP_Pattern <COND_SGT, V_CMP_GT_I64_e64, i64>;
616def : ICMP_Pattern <COND_SGE, V_CMP_GE_I64_e64, i64>;
617def : ICMP_Pattern <COND_SLT, V_CMP_LT_I64_e64, i64>;
618def : ICMP_Pattern <COND_SLE, V_CMP_LE_I64_e64, i64>;
619
620class FCMP_Pattern <PatLeaf cond, Instruction inst, ValueType vt> : Pat <
621 (i64 (AMDGPUsetcc (vt (VOP3Mods vt:$src0, i32:$src0_modifiers)),
622 (vt (VOP3Mods vt:$src1, i32:$src1_modifiers)), cond)),
623 (inst $src0_modifiers, $src0, $src1_modifiers, $src1,
624 DSTCLAMP.NONE, DSTOMOD.NONE)
625>;
626
627def : FCMP_Pattern <COND_OEQ, V_CMP_EQ_F32_e64, f32>;
628def : FCMP_Pattern <COND_ONE, V_CMP_NEQ_F32_e64, f32>;
629def : FCMP_Pattern <COND_OGT, V_CMP_GT_F32_e64, f32>;
630def : FCMP_Pattern <COND_OGE, V_CMP_GE_F32_e64, f32>;
631def : FCMP_Pattern <COND_OLT, V_CMP_LT_F32_e64, f32>;
632def : FCMP_Pattern <COND_OLE, V_CMP_LE_F32_e64, f32>;
633
634def : FCMP_Pattern <COND_OEQ, V_CMP_EQ_F64_e64, f64>;
635def : FCMP_Pattern <COND_ONE, V_CMP_NEQ_F64_e64, f64>;
636def : FCMP_Pattern <COND_OGT, V_CMP_GT_F64_e64, f64>;
637def : FCMP_Pattern <COND_OGE, V_CMP_GE_F64_e64, f64>;
638def : FCMP_Pattern <COND_OLT, V_CMP_LT_F64_e64, f64>;
639def : FCMP_Pattern <COND_OLE, V_CMP_LE_F64_e64, f64>;
640
641def : FCMP_Pattern <COND_UEQ, V_CMP_NLG_F32_e64, f32>;
642def : FCMP_Pattern <COND_UNE, V_CMP_NEQ_F32_e64, f32>;
643def : FCMP_Pattern <COND_UGT, V_CMP_NLE_F32_e64, f32>;
644def : FCMP_Pattern <COND_UGE, V_CMP_NLT_F32_e64, f32>;
645def : FCMP_Pattern <COND_ULT, V_CMP_NGE_F32_e64, f32>;
646def : FCMP_Pattern <COND_ULE, V_CMP_NGT_F32_e64, f32>;
647
648def : FCMP_Pattern <COND_UEQ, V_CMP_NLG_F64_e64, f64>;
649def : FCMP_Pattern <COND_UNE, V_CMP_NEQ_F64_e64, f64>;
650def : FCMP_Pattern <COND_UGT, V_CMP_NLE_F64_e64, f64>;
651def : FCMP_Pattern <COND_UGE, V_CMP_NLT_F64_e64, f64>;
652def : FCMP_Pattern <COND_ULT, V_CMP_NGE_F64_e64, f64>;
653def : FCMP_Pattern <COND_ULE, V_CMP_NGT_F64_e64, f64>;
654
655} // End Predicates = [isGCN]
656
657//===----------------------------------------------------------------------===//
658// Target
659//===----------------------------------------------------------------------===//
660
661//===----------------------------------------------------------------------===//
662// SI
663//===----------------------------------------------------------------------===//
664
665multiclass VOPC_Real_si <bits<9> op> {
666 let AssemblerPredicates = [isSICI], DecoderNamespace = "SICI" in {
667 def _e32_si :
668 VOPC_Real<!cast<VOPC_Pseudo>(NAME#"_e32"), SIEncodingFamily.SI>,
669 VOPCe<op{7-0}>;
670
671 def _e64_si :
Valery Pykhtin355103f2016-09-23 09:08:07 +0000[diff] [blame]672 VOP3_Real<!cast<VOP3_Pseudo>(NAME#"_e64"), SIEncodingFamily.SI>,
673 VOP3a_si <op, !cast<VOP3_Pseudo>(NAME#"_e64").Pfl> {
Valery Pykhtin2828b9b2016-09-19 14:39:49 +0000[diff] [blame]674 // Encoding used for VOPC instructions encoded as VOP3
675 // Differs from VOP3e by destination name (sdst) as VOPC doesn't have vector dst
676 bits<8> sdst;
677 let Inst{7-0} = sdst;
678 }
679 }
Valery Pykhtin355103f2016-09-23 09:08:07 +0000[diff] [blame]680 def : VOPCInstAlias <!cast<VOP3_Pseudo>(NAME#"_e64"),
Valery Pykhtin2828b9b2016-09-19 14:39:49 +0000[diff] [blame]681 !cast<Instruction>(NAME#"_e32_si")> {
682 let AssemblerPredicate = isSICI;
683 }
684}
685
686defm V_CMP_F_F32 : VOPC_Real_si <0x0>;
687defm V_CMP_LT_F32 : VOPC_Real_si <0x1>;
688defm V_CMP_EQ_F32 : VOPC_Real_si <0x2>;
689defm V_CMP_LE_F32 : VOPC_Real_si <0x3>;
690defm V_CMP_GT_F32 : VOPC_Real_si <0x4>;
691defm V_CMP_LG_F32 : VOPC_Real_si <0x5>;
692defm V_CMP_GE_F32 : VOPC_Real_si <0x6>;
693defm V_CMP_O_F32 : VOPC_Real_si <0x7>;
694defm V_CMP_U_F32 : VOPC_Real_si <0x8>;
695defm V_CMP_NGE_F32 : VOPC_Real_si <0x9>;
696defm V_CMP_NLG_F32 : VOPC_Real_si <0xa>;
697defm V_CMP_NGT_F32 : VOPC_Real_si <0xb>;
698defm V_CMP_NLE_F32 : VOPC_Real_si <0xc>;
699defm V_CMP_NEQ_F32 : VOPC_Real_si <0xd>;
700defm V_CMP_NLT_F32 : VOPC_Real_si <0xe>;
701defm V_CMP_TRU_F32 : VOPC_Real_si <0xf>;
702
703defm V_CMPX_F_F32 : VOPC_Real_si <0x10>;
704defm V_CMPX_LT_F32 : VOPC_Real_si <0x11>;
705defm V_CMPX_EQ_F32 : VOPC_Real_si <0x12>;
706defm V_CMPX_LE_F32 : VOPC_Real_si <0x13>;
707defm V_CMPX_GT_F32 : VOPC_Real_si <0x14>;
708defm V_CMPX_LG_F32 : VOPC_Real_si <0x15>;
709defm V_CMPX_GE_F32 : VOPC_Real_si <0x16>;
710defm V_CMPX_O_F32 : VOPC_Real_si <0x17>;
711defm V_CMPX_U_F32 : VOPC_Real_si <0x18>;
712defm V_CMPX_NGE_F32 : VOPC_Real_si <0x19>;
713defm V_CMPX_NLG_F32 : VOPC_Real_si <0x1a>;
714defm V_CMPX_NGT_F32 : VOPC_Real_si <0x1b>;
715defm V_CMPX_NLE_F32 : VOPC_Real_si <0x1c>;
716defm V_CMPX_NEQ_F32 : VOPC_Real_si <0x1d>;
717defm V_CMPX_NLT_F32 : VOPC_Real_si <0x1e>;
718defm V_CMPX_TRU_F32 : VOPC_Real_si <0x1f>;
719
720defm V_CMP_F_F64 : VOPC_Real_si <0x20>;
721defm V_CMP_LT_F64 : VOPC_Real_si <0x21>;
722defm V_CMP_EQ_F64 : VOPC_Real_si <0x22>;
723defm V_CMP_LE_F64 : VOPC_Real_si <0x23>;
724defm V_CMP_GT_F64 : VOPC_Real_si <0x24>;
725defm V_CMP_LG_F64 : VOPC_Real_si <0x25>;
726defm V_CMP_GE_F64 : VOPC_Real_si <0x26>;
727defm V_CMP_O_F64 : VOPC_Real_si <0x27>;
728defm V_CMP_U_F64 : VOPC_Real_si <0x28>;
729defm V_CMP_NGE_F64 : VOPC_Real_si <0x29>;
730defm V_CMP_NLG_F64 : VOPC_Real_si <0x2a>;
731defm V_CMP_NGT_F64 : VOPC_Real_si <0x2b>;
732defm V_CMP_NLE_F64 : VOPC_Real_si <0x2c>;
733defm V_CMP_NEQ_F64 : VOPC_Real_si <0x2d>;
734defm V_CMP_NLT_F64 : VOPC_Real_si <0x2e>;
735defm V_CMP_TRU_F64 : VOPC_Real_si <0x2f>;
736
737defm V_CMPX_F_F64 : VOPC_Real_si <0x30>;
738defm V_CMPX_LT_F64 : VOPC_Real_si <0x31>;
739defm V_CMPX_EQ_F64 : VOPC_Real_si <0x32>;
740defm V_CMPX_LE_F64 : VOPC_Real_si <0x33>;
741defm V_CMPX_GT_F64 : VOPC_Real_si <0x34>;
742defm V_CMPX_LG_F64 : VOPC_Real_si <0x35>;
743defm V_CMPX_GE_F64 : VOPC_Real_si <0x36>;
744defm V_CMPX_O_F64 : VOPC_Real_si <0x37>;
745defm V_CMPX_U_F64 : VOPC_Real_si <0x38>;
746defm V_CMPX_NGE_F64 : VOPC_Real_si <0x39>;
747defm V_CMPX_NLG_F64 : VOPC_Real_si <0x3a>;
748defm V_CMPX_NGT_F64 : VOPC_Real_si <0x3b>;
749defm V_CMPX_NLE_F64 : VOPC_Real_si <0x3c>;
750defm V_CMPX_NEQ_F64 : VOPC_Real_si <0x3d>;
751defm V_CMPX_NLT_F64 : VOPC_Real_si <0x3e>;
752defm V_CMPX_TRU_F64 : VOPC_Real_si <0x3f>;
753
754defm V_CMPS_F_F32 : VOPC_Real_si <0x40>;
755defm V_CMPS_LT_F32 : VOPC_Real_si <0x41>;
756defm V_CMPS_EQ_F32 : VOPC_Real_si <0x42>;
757defm V_CMPS_LE_F32 : VOPC_Real_si <0x43>;
758defm V_CMPS_GT_F32 : VOPC_Real_si <0x44>;
759defm V_CMPS_LG_F32 : VOPC_Real_si <0x45>;
760defm V_CMPS_GE_F32 : VOPC_Real_si <0x46>;
761defm V_CMPS_O_F32 : VOPC_Real_si <0x47>;
762defm V_CMPS_U_F32 : VOPC_Real_si <0x48>;
763defm V_CMPS_NGE_F32 : VOPC_Real_si <0x49>;
764defm V_CMPS_NLG_F32 : VOPC_Real_si <0x4a>;
765defm V_CMPS_NGT_F32 : VOPC_Real_si <0x4b>;
766defm V_CMPS_NLE_F32 : VOPC_Real_si <0x4c>;
767defm V_CMPS_NEQ_F32 : VOPC_Real_si <0x4d>;
768defm V_CMPS_NLT_F32 : VOPC_Real_si <0x4e>;
769defm V_CMPS_TRU_F32 : VOPC_Real_si <0x4f>;
770
771defm V_CMPSX_F_F32 : VOPC_Real_si <0x50>;
772defm V_CMPSX_LT_F32 : VOPC_Real_si <0x51>;
773defm V_CMPSX_EQ_F32 : VOPC_Real_si <0x52>;
774defm V_CMPSX_LE_F32 : VOPC_Real_si <0x53>;
775defm V_CMPSX_GT_F32 : VOPC_Real_si <0x54>;
776defm V_CMPSX_LG_F32 : VOPC_Real_si <0x55>;
777defm V_CMPSX_GE_F32 : VOPC_Real_si <0x56>;
778defm V_CMPSX_O_F32 : VOPC_Real_si <0x57>;
779defm V_CMPSX_U_F32 : VOPC_Real_si <0x58>;
780defm V_CMPSX_NGE_F32 : VOPC_Real_si <0x59>;
781defm V_CMPSX_NLG_F32 : VOPC_Real_si <0x5a>;
782defm V_CMPSX_NGT_F32 : VOPC_Real_si <0x5b>;
783defm V_CMPSX_NLE_F32 : VOPC_Real_si <0x5c>;
784defm V_CMPSX_NEQ_F32 : VOPC_Real_si <0x5d>;
785defm V_CMPSX_NLT_F32 : VOPC_Real_si <0x5e>;
786defm V_CMPSX_TRU_F32 : VOPC_Real_si <0x5f>;
787
788defm V_CMPS_F_F64 : VOPC_Real_si <0x60>;
789defm V_CMPS_LT_F64 : VOPC_Real_si <0x61>;
790defm V_CMPS_EQ_F64 : VOPC_Real_si <0x62>;
791defm V_CMPS_LE_F64 : VOPC_Real_si <0x63>;
792defm V_CMPS_GT_F64 : VOPC_Real_si <0x64>;
793defm V_CMPS_LG_F64 : VOPC_Real_si <0x65>;
794defm V_CMPS_GE_F64 : VOPC_Real_si <0x66>;
795defm V_CMPS_O_F64 : VOPC_Real_si <0x67>;
796defm V_CMPS_U_F64 : VOPC_Real_si <0x68>;
797defm V_CMPS_NGE_F64 : VOPC_Real_si <0x69>;
798defm V_CMPS_NLG_F64 : VOPC_Real_si <0x6a>;
799defm V_CMPS_NGT_F64 : VOPC_Real_si <0x6b>;
800defm V_CMPS_NLE_F64 : VOPC_Real_si <0x6c>;
801defm V_CMPS_NEQ_F64 : VOPC_Real_si <0x6d>;
802defm V_CMPS_NLT_F64 : VOPC_Real_si <0x6e>;
803defm V_CMPS_TRU_F64 : VOPC_Real_si <0x6f>;
804
805defm V_CMPSX_F_F64 : VOPC_Real_si <0x70>;
806defm V_CMPSX_LT_F64 : VOPC_Real_si <0x71>;
807defm V_CMPSX_EQ_F64 : VOPC_Real_si <0x72>;
808defm V_CMPSX_LE_F64 : VOPC_Real_si <0x73>;
809defm V_CMPSX_GT_F64 : VOPC_Real_si <0x74>;
810defm V_CMPSX_LG_F64 : VOPC_Real_si <0x75>;
811defm V_CMPSX_GE_F64 : VOPC_Real_si <0x76>;
812defm V_CMPSX_O_F64 : VOPC_Real_si <0x77>;
813defm V_CMPSX_U_F64 : VOPC_Real_si <0x78>;
814defm V_CMPSX_NGE_F64 : VOPC_Real_si <0x79>;
815defm V_CMPSX_NLG_F64 : VOPC_Real_si <0x7a>;
816defm V_CMPSX_NGT_F64 : VOPC_Real_si <0x7b>;
817defm V_CMPSX_NLE_F64 : VOPC_Real_si <0x7c>;
818defm V_CMPSX_NEQ_F64 : VOPC_Real_si <0x7d>;
819defm V_CMPSX_NLT_F64 : VOPC_Real_si <0x7e>;
820defm V_CMPSX_TRU_F64 : VOPC_Real_si <0x7f>;
821
822defm V_CMP_F_I32 : VOPC_Real_si <0x80>;
823defm V_CMP_LT_I32 : VOPC_Real_si <0x81>;
824defm V_CMP_EQ_I32 : VOPC_Real_si <0x82>;
825defm V_CMP_LE_I32 : VOPC_Real_si <0x83>;
826defm V_CMP_GT_I32 : VOPC_Real_si <0x84>;
827defm V_CMP_NE_I32 : VOPC_Real_si <0x85>;
828defm V_CMP_GE_I32 : VOPC_Real_si <0x86>;
829defm V_CMP_T_I32 : VOPC_Real_si <0x87>;
830
831defm V_CMPX_F_I32 : VOPC_Real_si <0x90>;
832defm V_CMPX_LT_I32 : VOPC_Real_si <0x91>;
833defm V_CMPX_EQ_I32 : VOPC_Real_si <0x92>;
834defm V_CMPX_LE_I32 : VOPC_Real_si <0x93>;
835defm V_CMPX_GT_I32 : VOPC_Real_si <0x94>;
836defm V_CMPX_NE_I32 : VOPC_Real_si <0x95>;
837defm V_CMPX_GE_I32 : VOPC_Real_si <0x96>;
838defm V_CMPX_T_I32 : VOPC_Real_si <0x97>;
839
840defm V_CMP_F_I64 : VOPC_Real_si <0xa0>;
841defm V_CMP_LT_I64 : VOPC_Real_si <0xa1>;
842defm V_CMP_EQ_I64 : VOPC_Real_si <0xa2>;
843defm V_CMP_LE_I64 : VOPC_Real_si <0xa3>;
844defm V_CMP_GT_I64 : VOPC_Real_si <0xa4>;
845defm V_CMP_NE_I64 : VOPC_Real_si <0xa5>;
846defm V_CMP_GE_I64 : VOPC_Real_si <0xa6>;
847defm V_CMP_T_I64 : VOPC_Real_si <0xa7>;
848
849defm V_CMPX_F_I64 : VOPC_Real_si <0xb0>;
850defm V_CMPX_LT_I64 : VOPC_Real_si <0xb1>;
851defm V_CMPX_EQ_I64 : VOPC_Real_si <0xb2>;
852defm V_CMPX_LE_I64 : VOPC_Real_si <0xb3>;
853defm V_CMPX_GT_I64 : VOPC_Real_si <0xb4>;
854defm V_CMPX_NE_I64 : VOPC_Real_si <0xb5>;
855defm V_CMPX_GE_I64 : VOPC_Real_si <0xb6>;
856defm V_CMPX_T_I64 : VOPC_Real_si <0xb7>;
857
858defm V_CMP_F_U32 : VOPC_Real_si <0xc0>;
859defm V_CMP_LT_U32 : VOPC_Real_si <0xc1>;
860defm V_CMP_EQ_U32 : VOPC_Real_si <0xc2>;
861defm V_CMP_LE_U32 : VOPC_Real_si <0xc3>;
862defm V_CMP_GT_U32 : VOPC_Real_si <0xc4>;
863defm V_CMP_NE_U32 : VOPC_Real_si <0xc5>;
864defm V_CMP_GE_U32 : VOPC_Real_si <0xc6>;
865defm V_CMP_T_U32 : VOPC_Real_si <0xc7>;
866
867defm V_CMPX_F_U32 : VOPC_Real_si <0xd0>;
868defm V_CMPX_LT_U32 : VOPC_Real_si <0xd1>;
869defm V_CMPX_EQ_U32 : VOPC_Real_si <0xd2>;
870defm V_CMPX_LE_U32 : VOPC_Real_si <0xd3>;
871defm V_CMPX_GT_U32 : VOPC_Real_si <0xd4>;
872defm V_CMPX_NE_U32 : VOPC_Real_si <0xd5>;
873defm V_CMPX_GE_U32 : VOPC_Real_si <0xd6>;
874defm V_CMPX_T_U32 : VOPC_Real_si <0xd7>;
875
876defm V_CMP_F_U64 : VOPC_Real_si <0xe0>;
877defm V_CMP_LT_U64 : VOPC_Real_si <0xe1>;
878defm V_CMP_EQ_U64 : VOPC_Real_si <0xe2>;
879defm V_CMP_LE_U64 : VOPC_Real_si <0xe3>;
880defm V_CMP_GT_U64 : VOPC_Real_si <0xe4>;
881defm V_CMP_NE_U64 : VOPC_Real_si <0xe5>;
882defm V_CMP_GE_U64 : VOPC_Real_si <0xe6>;
883defm V_CMP_T_U64 : VOPC_Real_si <0xe7>;
884
885defm V_CMPX_F_U64 : VOPC_Real_si <0xf0>;
886defm V_CMPX_LT_U64 : VOPC_Real_si <0xf1>;
887defm V_CMPX_EQ_U64 : VOPC_Real_si <0xf2>;
888defm V_CMPX_LE_U64 : VOPC_Real_si <0xf3>;
889defm V_CMPX_GT_U64 : VOPC_Real_si <0xf4>;
890defm V_CMPX_NE_U64 : VOPC_Real_si <0xf5>;
891defm V_CMPX_GE_U64 : VOPC_Real_si <0xf6>;
892defm V_CMPX_T_U64 : VOPC_Real_si <0xf7>;
893
894defm V_CMP_CLASS_F32 : VOPC_Real_si <0x88>;
895defm V_CMPX_CLASS_F32 : VOPC_Real_si <0x98>;
896defm V_CMP_CLASS_F64 : VOPC_Real_si <0xa8>;
897defm V_CMPX_CLASS_F64 : VOPC_Real_si <0xb8>;
898
899//===----------------------------------------------------------------------===//
900// VI
901//===----------------------------------------------------------------------===//
902
Valery Pykhtin2828b9b2016-09-19 14:39:49 +0000[diff] [blame]903multiclass VOPC_Real_vi <bits<10> op> {
904 let AssemblerPredicates = [isVI], DecoderNamespace = "VI" in {
905 def _e32_vi :
906 VOPC_Real<!cast<VOPC_Pseudo>(NAME#"_e32"), SIEncodingFamily.VI>,
907 VOPCe<op{7-0}>;
908
909 def _e64_vi :
Valery Pykhtin355103f2016-09-23 09:08:07 +0000[diff] [blame]910 VOP3_Real<!cast<VOP3_Pseudo>(NAME#"_e64"), SIEncodingFamily.VI>,
911 VOP3a_vi <op, !cast<VOP3_Pseudo>(NAME#"_e64").Pfl> {
Valery Pykhtin2828b9b2016-09-19 14:39:49 +0000[diff] [blame]912 // Encoding used for VOPC instructions encoded as VOP3
913 // Differs from VOP3e by destination name (sdst) as VOPC doesn't have vector dst
914 bits<8> sdst;
915 let Inst{7-0} = sdst;
916 }
917 }
918
Sam Koltona568e3d2016-12-22 12:57:41 +0000[diff] [blame]919 def _sdwa_vi :
920 VOP_SDWA_Real <!cast<VOPC_SDWA_Pseudo>(NAME#"_sdwa")>,
921 VOPC_SDWAe <op{7-0}, !cast<VOPC_SDWA_Pseudo>(NAME#"_sdwa").Pfl>;
Valery Pykhtin2828b9b2016-09-19 14:39:49 +0000[diff] [blame]922
Valery Pykhtin355103f2016-09-23 09:08:07 +0000[diff] [blame]923 def : VOPCInstAlias <!cast<VOP3_Pseudo>(NAME#"_e64"),
Valery Pykhtin2828b9b2016-09-19 14:39:49 +0000[diff] [blame]924 !cast<Instruction>(NAME#"_e32_vi")> {
925 let AssemblerPredicate = isVI;
926 }
927}
928
Valery Pykhtin2828b9b2016-09-19 14:39:49 +0000[diff] [blame]929defm V_CMP_CLASS_F32 : VOPC_Real_vi <0x10>;
930defm V_CMPX_CLASS_F32 : VOPC_Real_vi <0x11>;
931defm V_CMP_CLASS_F64 : VOPC_Real_vi <0x12>;
932defm V_CMPX_CLASS_F64 : VOPC_Real_vi <0x13>;
Konstantin Zhuravlyovf86e4b72016-11-13 07:01:11 +0000[diff] [blame]933defm V_CMP_CLASS_F16 : VOPC_Real_vi <0x14>;
934defm V_CMPX_CLASS_F16 : VOPC_Real_vi <0x15>;
935
936defm V_CMP_F_F16 : VOPC_Real_vi <0x20>;
937defm V_CMP_LT_F16 : VOPC_Real_vi <0x21>;
938defm V_CMP_EQ_F16 : VOPC_Real_vi <0x22>;
939defm V_CMP_LE_F16 : VOPC_Real_vi <0x23>;
940defm V_CMP_GT_F16 : VOPC_Real_vi <0x24>;
941defm V_CMP_LG_F16 : VOPC_Real_vi <0x25>;
942defm V_CMP_GE_F16 : VOPC_Real_vi <0x26>;
943defm V_CMP_O_F16 : VOPC_Real_vi <0x27>;
944defm V_CMP_U_F16 : VOPC_Real_vi <0x28>;
945defm V_CMP_NGE_F16 : VOPC_Real_vi <0x29>;
946defm V_CMP_NLG_F16 : VOPC_Real_vi <0x2a>;
947defm V_CMP_NGT_F16 : VOPC_Real_vi <0x2b>;
948defm V_CMP_NLE_F16 : VOPC_Real_vi <0x2c>;
949defm V_CMP_NEQ_F16 : VOPC_Real_vi <0x2d>;
950defm V_CMP_NLT_F16 : VOPC_Real_vi <0x2e>;
951defm V_CMP_TRU_F16 : VOPC_Real_vi <0x2f>;
952
953defm V_CMPX_F_F16 : VOPC_Real_vi <0x30>;
954defm V_CMPX_LT_F16 : VOPC_Real_vi <0x31>;
955defm V_CMPX_EQ_F16 : VOPC_Real_vi <0x32>;
956defm V_CMPX_LE_F16 : VOPC_Real_vi <0x33>;
957defm V_CMPX_GT_F16 : VOPC_Real_vi <0x34>;
958defm V_CMPX_LG_F16 : VOPC_Real_vi <0x35>;
959defm V_CMPX_GE_F16 : VOPC_Real_vi <0x36>;
960defm V_CMPX_O_F16 : VOPC_Real_vi <0x37>;
961defm V_CMPX_U_F16 : VOPC_Real_vi <0x38>;
962defm V_CMPX_NGE_F16 : VOPC_Real_vi <0x39>;
963defm V_CMPX_NLG_F16 : VOPC_Real_vi <0x3a>;
964defm V_CMPX_NGT_F16 : VOPC_Real_vi <0x3b>;
965defm V_CMPX_NLE_F16 : VOPC_Real_vi <0x3c>;
966defm V_CMPX_NEQ_F16 : VOPC_Real_vi <0x3d>;
967defm V_CMPX_NLT_F16 : VOPC_Real_vi <0x3e>;
968defm V_CMPX_TRU_F16 : VOPC_Real_vi <0x3f>;
969
970defm V_CMP_F_F32 : VOPC_Real_vi <0x40>;
971defm V_CMP_LT_F32 : VOPC_Real_vi <0x41>;
972defm V_CMP_EQ_F32 : VOPC_Real_vi <0x42>;
973defm V_CMP_LE_F32 : VOPC_Real_vi <0x43>;
974defm V_CMP_GT_F32 : VOPC_Real_vi <0x44>;
975defm V_CMP_LG_F32 : VOPC_Real_vi <0x45>;
976defm V_CMP_GE_F32 : VOPC_Real_vi <0x46>;
977defm V_CMP_O_F32 : VOPC_Real_vi <0x47>;
978defm V_CMP_U_F32 : VOPC_Real_vi <0x48>;
979defm V_CMP_NGE_F32 : VOPC_Real_vi <0x49>;
980defm V_CMP_NLG_F32 : VOPC_Real_vi <0x4a>;
981defm V_CMP_NGT_F32 : VOPC_Real_vi <0x4b>;
982defm V_CMP_NLE_F32 : VOPC_Real_vi <0x4c>;
983defm V_CMP_NEQ_F32 : VOPC_Real_vi <0x4d>;
984defm V_CMP_NLT_F32 : VOPC_Real_vi <0x4e>;
985defm V_CMP_TRU_F32 : VOPC_Real_vi <0x4f>;
986
987defm V_CMPX_F_F32 : VOPC_Real_vi <0x50>;
988defm V_CMPX_LT_F32 : VOPC_Real_vi <0x51>;
989defm V_CMPX_EQ_F32 : VOPC_Real_vi <0x52>;
990defm V_CMPX_LE_F32 : VOPC_Real_vi <0x53>;
991defm V_CMPX_GT_F32 : VOPC_Real_vi <0x54>;
992defm V_CMPX_LG_F32 : VOPC_Real_vi <0x55>;
993defm V_CMPX_GE_F32 : VOPC_Real_vi <0x56>;
994defm V_CMPX_O_F32 : VOPC_Real_vi <0x57>;
995defm V_CMPX_U_F32 : VOPC_Real_vi <0x58>;
996defm V_CMPX_NGE_F32 : VOPC_Real_vi <0x59>;
997defm V_CMPX_NLG_F32 : VOPC_Real_vi <0x5a>;
998defm V_CMPX_NGT_F32 : VOPC_Real_vi <0x5b>;
999defm V_CMPX_NLE_F32 : VOPC_Real_vi <0x5c>;
1000defm V_CMPX_NEQ_F32 : VOPC_Real_vi <0x5d>;
1001defm V_CMPX_NLT_F32 : VOPC_Real_vi <0x5e>;
1002defm V_CMPX_TRU_F32 : VOPC_Real_vi <0x5f>;
1003
1004defm V_CMP_F_F64 : VOPC_Real_vi <0x60>;
1005defm V_CMP_LT_F64 : VOPC_Real_vi <0x61>;
1006defm V_CMP_EQ_F64 : VOPC_Real_vi <0x62>;
1007defm V_CMP_LE_F64 : VOPC_Real_vi <0x63>;
1008defm V_CMP_GT_F64 : VOPC_Real_vi <0x64>;
1009defm V_CMP_LG_F64 : VOPC_Real_vi <0x65>;
1010defm V_CMP_GE_F64 : VOPC_Real_vi <0x66>;
1011defm V_CMP_O_F64 : VOPC_Real_vi <0x67>;
1012defm V_CMP_U_F64 : VOPC_Real_vi <0x68>;
1013defm V_CMP_NGE_F64 : VOPC_Real_vi <0x69>;
1014defm V_CMP_NLG_F64 : VOPC_Real_vi <0x6a>;
1015defm V_CMP_NGT_F64 : VOPC_Real_vi <0x6b>;
1016defm V_CMP_NLE_F64 : VOPC_Real_vi <0x6c>;
1017defm V_CMP_NEQ_F64 : VOPC_Real_vi <0x6d>;
1018defm V_CMP_NLT_F64 : VOPC_Real_vi <0x6e>;
1019defm V_CMP_TRU_F64 : VOPC_Real_vi <0x6f>;
1020
1021defm V_CMPX_F_F64 : VOPC_Real_vi <0x70>;
1022defm V_CMPX_LT_F64 : VOPC_Real_vi <0x71>;
1023defm V_CMPX_EQ_F64 : VOPC_Real_vi <0x72>;
1024defm V_CMPX_LE_F64 : VOPC_Real_vi <0x73>;
1025defm V_CMPX_GT_F64 : VOPC_Real_vi <0x74>;
1026defm V_CMPX_LG_F64 : VOPC_Real_vi <0x75>;
1027defm V_CMPX_GE_F64 : VOPC_Real_vi <0x76>;
1028defm V_CMPX_O_F64 : VOPC_Real_vi <0x77>;
1029defm V_CMPX_U_F64 : VOPC_Real_vi <0x78>;
1030defm V_CMPX_NGE_F64 : VOPC_Real_vi <0x79>;
1031defm V_CMPX_NLG_F64 : VOPC_Real_vi <0x7a>;
1032defm V_CMPX_NGT_F64 : VOPC_Real_vi <0x7b>;
1033defm V_CMPX_NLE_F64 : VOPC_Real_vi <0x7c>;
1034defm V_CMPX_NEQ_F64 : VOPC_Real_vi <0x7d>;
1035defm V_CMPX_NLT_F64 : VOPC_Real_vi <0x7e>;
1036defm V_CMPX_TRU_F64 : VOPC_Real_vi <0x7f>;
1037
Matt Arsenault18f56be2016-12-22 16:27:11 +0000[diff] [blame]1038defm V_CMP_F_I16 : VOPC_Real_vi <0xa0>;
1039defm V_CMP_LT_I16 : VOPC_Real_vi <0xa1>;
1040defm V_CMP_EQ_I16 : VOPC_Real_vi <0xa2>;
1041defm V_CMP_LE_I16 : VOPC_Real_vi <0xa3>;
1042defm V_CMP_GT_I16 : VOPC_Real_vi <0xa4>;
1043defm V_CMP_NE_I16 : VOPC_Real_vi <0xa5>;
1044defm V_CMP_GE_I16 : VOPC_Real_vi <0xa6>;
1045defm V_CMP_T_I16 : VOPC_Real_vi <0xa7>;
1046
1047defm V_CMP_F_U16 : VOPC_Real_vi <0xa8>;
1048defm V_CMP_LT_U16 : VOPC_Real_vi <0xa9>;
1049defm V_CMP_EQ_U16 : VOPC_Real_vi <0xaa>;
1050defm V_CMP_LE_U16 : VOPC_Real_vi <0xab>;
1051defm V_CMP_GT_U16 : VOPC_Real_vi <0xac>;
1052defm V_CMP_NE_U16 : VOPC_Real_vi <0xad>;
1053defm V_CMP_GE_U16 : VOPC_Real_vi <0xae>;
1054defm V_CMP_T_U16 : VOPC_Real_vi <0xaf>;
1055
Matt Arsenault3c97e202016-12-22 16:27:14 +0000[diff] [blame]1056defm V_CMPX_F_I16 : VOPC_Real_vi <0xb0>;
1057defm V_CMPX_LT_I16 : VOPC_Real_vi <0xb1>;
1058defm V_CMPX_EQ_I16 : VOPC_Real_vi <0xb2>;
1059defm V_CMPX_LE_I16 : VOPC_Real_vi <0xb3>;
1060defm V_CMPX_GT_I16 : VOPC_Real_vi <0xb4>;
1061defm V_CMPX_NE_I16 : VOPC_Real_vi <0xb5>;
1062defm V_CMPX_GE_I16 : VOPC_Real_vi <0xb6>;
1063defm V_CMPX_T_I16 : VOPC_Real_vi <0xb7>;
1064
1065defm V_CMPX_F_U16 : VOPC_Real_vi <0xb8>;
1066defm V_CMPX_LT_U16 : VOPC_Real_vi <0xb9>;
1067defm V_CMPX_EQ_U16 : VOPC_Real_vi <0xba>;
1068defm V_CMPX_LE_U16 : VOPC_Real_vi <0xbb>;
1069defm V_CMPX_GT_U16 : VOPC_Real_vi <0xbc>;
1070defm V_CMPX_NE_U16 : VOPC_Real_vi <0xbd>;
1071defm V_CMPX_GE_U16 : VOPC_Real_vi <0xbe>;
1072defm V_CMPX_T_U16 : VOPC_Real_vi <0xbf>;
1073
Konstantin Zhuravlyovf86e4b72016-11-13 07:01:11 +0000[diff] [blame]1074defm V_CMP_F_I32 : VOPC_Real_vi <0xc0>;
1075defm V_CMP_LT_I32 : VOPC_Real_vi <0xc1>;
1076defm V_CMP_EQ_I32 : VOPC_Real_vi <0xc2>;
1077defm V_CMP_LE_I32 : VOPC_Real_vi <0xc3>;
1078defm V_CMP_GT_I32 : VOPC_Real_vi <0xc4>;
1079defm V_CMP_NE_I32 : VOPC_Real_vi <0xc5>;
1080defm V_CMP_GE_I32 : VOPC_Real_vi <0xc6>;
1081defm V_CMP_T_I32 : VOPC_Real_vi <0xc7>;
1082
1083defm V_CMPX_F_I32 : VOPC_Real_vi <0xd0>;
1084defm V_CMPX_LT_I32 : VOPC_Real_vi <0xd1>;
1085defm V_CMPX_EQ_I32 : VOPC_Real_vi <0xd2>;
1086defm V_CMPX_LE_I32 : VOPC_Real_vi <0xd3>;
1087defm V_CMPX_GT_I32 : VOPC_Real_vi <0xd4>;
1088defm V_CMPX_NE_I32 : VOPC_Real_vi <0xd5>;
1089defm V_CMPX_GE_I32 : VOPC_Real_vi <0xd6>;
1090defm V_CMPX_T_I32 : VOPC_Real_vi <0xd7>;
1091
1092defm V_CMP_F_I64 : VOPC_Real_vi <0xe0>;
1093defm V_CMP_LT_I64 : VOPC_Real_vi <0xe1>;
1094defm V_CMP_EQ_I64 : VOPC_Real_vi <0xe2>;
1095defm V_CMP_LE_I64 : VOPC_Real_vi <0xe3>;
1096defm V_CMP_GT_I64 : VOPC_Real_vi <0xe4>;
1097defm V_CMP_NE_I64 : VOPC_Real_vi <0xe5>;
1098defm V_CMP_GE_I64 : VOPC_Real_vi <0xe6>;
1099defm V_CMP_T_I64 : VOPC_Real_vi <0xe7>;
1100
1101defm V_CMPX_F_I64 : VOPC_Real_vi <0xf0>;
1102defm V_CMPX_LT_I64 : VOPC_Real_vi <0xf1>;
1103defm V_CMPX_EQ_I64 : VOPC_Real_vi <0xf2>;
1104defm V_CMPX_LE_I64 : VOPC_Real_vi <0xf3>;
1105defm V_CMPX_GT_I64 : VOPC_Real_vi <0xf4>;
1106defm V_CMPX_NE_I64 : VOPC_Real_vi <0xf5>;
1107defm V_CMPX_GE_I64 : VOPC_Real_vi <0xf6>;
1108defm V_CMPX_T_I64 : VOPC_Real_vi <0xf7>;
1109
1110defm V_CMP_F_U32 : VOPC_Real_vi <0xc8>;
1111defm V_CMP_LT_U32 : VOPC_Real_vi <0xc9>;
1112defm V_CMP_EQ_U32 : VOPC_Real_vi <0xca>;
1113defm V_CMP_LE_U32 : VOPC_Real_vi <0xcb>;
1114defm V_CMP_GT_U32 : VOPC_Real_vi <0xcc>;
1115defm V_CMP_NE_U32 : VOPC_Real_vi <0xcd>;
1116defm V_CMP_GE_U32 : VOPC_Real_vi <0xce>;
1117defm V_CMP_T_U32 : VOPC_Real_vi <0xcf>;
1118
1119defm V_CMPX_F_U32 : VOPC_Real_vi <0xd8>;
1120defm V_CMPX_LT_U32 : VOPC_Real_vi <0xd9>;
1121defm V_CMPX_EQ_U32 : VOPC_Real_vi <0xda>;
1122defm V_CMPX_LE_U32 : VOPC_Real_vi <0xdb>;
1123defm V_CMPX_GT_U32 : VOPC_Real_vi <0xdc>;
1124defm V_CMPX_NE_U32 : VOPC_Real_vi <0xdd>;
1125defm V_CMPX_GE_U32 : VOPC_Real_vi <0xde>;
1126defm V_CMPX_T_U32 : VOPC_Real_vi <0xdf>;
1127
1128defm V_CMP_F_U64 : VOPC_Real_vi <0xe8>;
1129defm V_CMP_LT_U64 : VOPC_Real_vi <0xe9>;
1130defm V_CMP_EQ_U64 : VOPC_Real_vi <0xea>;
1131defm V_CMP_LE_U64 : VOPC_Real_vi <0xeb>;
1132defm V_CMP_GT_U64 : VOPC_Real_vi <0xec>;
1133defm V_CMP_NE_U64 : VOPC_Real_vi <0xed>;
1134defm V_CMP_GE_U64 : VOPC_Real_vi <0xee>;
1135defm V_CMP_T_U64 : VOPC_Real_vi <0xef>;
1136
1137defm V_CMPX_F_U64 : VOPC_Real_vi <0xf8>;
1138defm V_CMPX_LT_U64 : VOPC_Real_vi <0xf9>;
1139defm V_CMPX_EQ_U64 : VOPC_Real_vi <0xfa>;
1140defm V_CMPX_LE_U64 : VOPC_Real_vi <0xfb>;
1141defm V_CMPX_GT_U64 : VOPC_Real_vi <0xfc>;
1142defm V_CMPX_NE_U64 : VOPC_Real_vi <0xfd>;
1143defm V_CMPX_GE_U64 : VOPC_Real_vi <0xfe>;
1144defm V_CMPX_T_U64 : VOPC_Real_vi <0xff>;