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Dan Gohman10e730a2015-06-29 23:51:55 +00001//- WebAssemblyISelDAGToDAG.cpp - A dag to dag inst selector for WebAssembly -//
2//
Chandler Carruth2946cd72019-01-19 08:50:56 +00003// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
Dan Gohman10e730a2015-06-29 23:51:55 +00006//
7//===----------------------------------------------------------------------===//
8///
9/// \file
Adrian Prantl5f8f34e42018-05-01 15:54:18 +000010/// This file defines an instruction selector for the WebAssembly target.
Dan Gohman10e730a2015-06-29 23:51:55 +000011///
12//===----------------------------------------------------------------------===//
13
Dan Gohman10e730a2015-06-29 23:51:55 +000014#include "MCTargetDesc/WebAssemblyMCTargetDesc.h"
Chandler Carruth6bda14b2017-06-06 11:49:48 +000015#include "WebAssembly.h"
Dan Gohman10e730a2015-06-29 23:51:55 +000016#include "WebAssemblyTargetMachine.h"
17#include "llvm/CodeGen/SelectionDAGISel.h"
Guanzhong Chen42bba4b2019-07-16 22:00:45 +000018#include "llvm/IR/DiagnosticInfo.h"
Dan Gohman10e730a2015-06-29 23:51:55 +000019#include "llvm/IR/Function.h" // To access function attributes.
Reid Kleckner5d986952019-12-11 07:55:26 -080020#include "llvm/IR/IntrinsicsWebAssembly.h"
Dan Gohman10e730a2015-06-29 23:51:55 +000021#include "llvm/Support/Debug.h"
Craig Topper053cf4d2017-04-28 08:15:33 +000022#include "llvm/Support/KnownBits.h"
Dan Gohman10e730a2015-06-29 23:51:55 +000023#include "llvm/Support/MathExtras.h"
24#include "llvm/Support/raw_ostream.h"
25using namespace llvm;
26
27#define DEBUG_TYPE "wasm-isel"
28
29//===--------------------------------------------------------------------===//
30/// WebAssembly-specific code to select WebAssembly machine instructions for
31/// SelectionDAG operations.
32///
33namespace {
34class WebAssemblyDAGToDAGISel final : public SelectionDAGISel {
35 /// Keep a pointer to the WebAssemblySubtarget around so that we can make the
36 /// right decision when generating code for different targets.
37 const WebAssemblySubtarget *Subtarget;
38
Dan Gohman10e730a2015-06-29 23:51:55 +000039public:
Heejin Ahn18c56a02019-02-04 19:13:39 +000040 WebAssemblyDAGToDAGISel(WebAssemblyTargetMachine &TM,
Dan Gohman10e730a2015-06-29 23:51:55 +000041 CodeGenOpt::Level OptLevel)
Hiroshi Yamauchi70a3c9f2019-11-21 13:21:48 -080042 : SelectionDAGISel(TM, OptLevel), Subtarget(nullptr) {
Dan Gohman10e730a2015-06-29 23:51:55 +000043 }
44
Mehdi Amini117296c2016-10-01 02:56:57 +000045 StringRef getPassName() const override {
Dan Gohman10e730a2015-06-29 23:51:55 +000046 return "WebAssembly Instruction Selection";
47 }
48
49 bool runOnMachineFunction(MachineFunction &MF) override {
Heejin Ahn569f0902019-01-09 23:05:21 +000050 LLVM_DEBUG(dbgs() << "********** ISelDAGToDAG **********\n"
51 "********** Function: "
52 << MF.getName() << '\n');
53
Dan Gohman10e730a2015-06-29 23:51:55 +000054 Subtarget = &MF.getSubtarget<WebAssemblySubtarget>();
Thomas Lively5b74c392019-10-02 17:34:44 +000055
56 // Wasm64 is not fully supported right now (and is not specified)
57 if (Subtarget->hasAddr64())
58 report_fatal_error(
59 "64-bit WebAssembly (wasm64) is not currently supported");
60
Dan Gohman10e730a2015-06-29 23:51:55 +000061 return SelectionDAGISel::runOnMachineFunction(MF);
62 }
63
Justin Bognerc6afd4b2016-05-13 22:44:57 +000064 void Select(SDNode *Node) override;
Dan Gohman10e730a2015-06-29 23:51:55 +000065
Dan Gohmanf19ed562015-11-13 01:42:29 +000066 bool SelectInlineAsmMemoryOperand(const SDValue &Op, unsigned ConstraintID,
67 std::vector<SDValue> &OutOps) override;
68
JF Bastienb9073fb2015-07-22 21:28:15 +000069// Include the pieces autogenerated from the target description.
70#include "WebAssemblyGenDAGISel.inc"
71
Dan Gohman10e730a2015-06-29 23:51:55 +000072private:
73 // add select functions here...
74};
75} // end anonymous namespace
76
Justin Bognerc6afd4b2016-05-13 22:44:57 +000077void WebAssemblyDAGToDAGISel::Select(SDNode *Node) {
JF Bastienb9073fb2015-07-22 21:28:15 +000078 // If we have a custom node, we already have selected!
79 if (Node->isMachineOpcode()) {
Nicola Zaghend34e60c2018-05-14 12:53:11 +000080 LLVM_DEBUG(errs() << "== "; Node->dump(CurDAG); errs() << "\n");
JF Bastienb9073fb2015-07-22 21:28:15 +000081 Node->setNodeId(-1);
Justin Bognerc6afd4b2016-05-13 22:44:57 +000082 return;
JF Bastienb9073fb2015-07-22 21:28:15 +000083 }
84
Heejin Ahn55146582019-05-28 22:09:12 +000085 // Few custom selection stuff.
86 SDLoc DL(Node);
87 MachineFunction &MF = CurDAG->getMachineFunction();
JF Bastienb9073fb2015-07-22 21:28:15 +000088 switch (Node->getOpcode()) {
Heejin Ahn55146582019-05-28 22:09:12 +000089 case ISD::ATOMIC_FENCE: {
90 if (!MF.getSubtarget<WebAssemblySubtarget>().hasAtomics())
91 break;
92
93 uint64_t SyncScopeID =
94 cast<ConstantSDNode>(Node->getOperand(2).getNode())->getZExtValue();
Heejin Ahnd85fd5a2019-08-28 23:13:43 +000095 MachineSDNode *Fence = nullptr;
Heejin Ahn55146582019-05-28 22:09:12 +000096 switch (SyncScopeID) {
Heejin Ahnd85fd5a2019-08-28 23:13:43 +000097 case SyncScope::SingleThread:
Heejin Ahn55146582019-05-28 22:09:12 +000098 // We lower a single-thread fence to a pseudo compiler barrier instruction
99 // preventing instruction reordering. This will not be emitted in final
100 // binary.
Heejin Ahnd85fd5a2019-08-28 23:13:43 +0000101 Fence = CurDAG->getMachineNode(WebAssembly::COMPILER_FENCE,
102 DL, // debug loc
103 MVT::Other, // outchain type
104 Node->getOperand(0) // inchain
105 );
106 break;
107 case SyncScope::System:
108 // Currently wasm only supports sequentially consistent atomics, so we
109 // always set the order to 0 (sequentially consistent).
110 Fence = CurDAG->getMachineNode(
111 WebAssembly::ATOMIC_FENCE,
112 DL, // debug loc
113 MVT::Other, // outchain type
114 CurDAG->getTargetConstant(0, DL, MVT::i32), // order
115 Node->getOperand(0) // inchain
116 );
117 break;
Heejin Ahn55146582019-05-28 22:09:12 +0000118 default:
119 llvm_unreachable("Unknown scope!");
120 }
Heejin Ahnd85fd5a2019-08-28 23:13:43 +0000121
122 ReplaceNode(Node, Fence);
123 CurDAG->RemoveDeadNode(Node);
124 return;
Heejin Ahn55146582019-05-28 22:09:12 +0000125 }
126
Guanzhong Chen42bba4b2019-07-16 22:00:45 +0000127 case ISD::GlobalTLSAddress: {
128 const auto *GA = cast<GlobalAddressSDNode>(Node);
129
130 if (!MF.getSubtarget<WebAssemblySubtarget>().hasBulkMemory())
131 report_fatal_error("cannot use thread-local storage without bulk memory",
132 false);
133
Guanzhong Chen0a8d4df2019-07-16 22:22:08 +0000134 // Currently Emscripten does not support dynamic linking with threads.
135 // Therefore, if we have thread-local storage, only the local-exec model
136 // is possible.
137 // TODO: remove this and implement proper TLS models once Emscripten
138 // supports dynamic linking with threads.
Guanzhong Chen42bba4b2019-07-16 22:00:45 +0000139 if (GA->getGlobal()->getThreadLocalMode() !=
Guanzhong Chen0a8d4df2019-07-16 22:22:08 +0000140 GlobalValue::LocalExecTLSModel &&
141 !Subtarget->getTargetTriple().isOSEmscripten()) {
142 report_fatal_error("only -ftls-model=local-exec is supported for now on "
143 "non-Emscripten OSes: variable " +
144 GA->getGlobal()->getName(),
Guanzhong Chen42bba4b2019-07-16 22:00:45 +0000145 false);
146 }
147
148 MVT PtrVT = TLI->getPointerTy(CurDAG->getDataLayout());
149 assert(PtrVT == MVT::i32 && "only wasm32 is supported for now");
150
151 SDValue TLSBaseSym = CurDAG->getTargetExternalSymbol("__tls_base", PtrVT);
152 SDValue TLSOffsetSym = CurDAG->getTargetGlobalAddress(
153 GA->getGlobal(), DL, PtrVT, GA->getOffset(), 0);
154
155 MachineSDNode *TLSBase = CurDAG->getMachineNode(WebAssembly::GLOBAL_GET_I32,
156 DL, MVT::i32, TLSBaseSym);
157 MachineSDNode *TLSOffset = CurDAG->getMachineNode(
158 WebAssembly::CONST_I32, DL, MVT::i32, TLSOffsetSym);
159 MachineSDNode *TLSAddress =
160 CurDAG->getMachineNode(WebAssembly::ADD_I32, DL, MVT::i32,
161 SDValue(TLSBase, 0), SDValue(TLSOffset, 0));
162 ReplaceNode(Node, TLSAddress);
163 return;
164 }
165
166 case ISD::INTRINSIC_WO_CHAIN: {
167 unsigned IntNo = cast<ConstantSDNode>(Node->getOperand(0))->getZExtValue();
168 switch (IntNo) {
169 case Intrinsic::wasm_tls_size: {
170 MVT PtrVT = TLI->getPointerTy(CurDAG->getDataLayout());
171 assert(PtrVT == MVT::i32 && "only wasm32 is supported for now");
172
173 MachineSDNode *TLSSize = CurDAG->getMachineNode(
174 WebAssembly::GLOBAL_GET_I32, DL, PtrVT,
175 CurDAG->getTargetExternalSymbol("__tls_size", MVT::i32));
176 ReplaceNode(Node, TLSSize);
177 return;
178 }
Guanzhong Chen5204f762019-07-19 23:34:16 +0000179 case Intrinsic::wasm_tls_align: {
180 MVT PtrVT = TLI->getPointerTy(CurDAG->getDataLayout());
181 assert(PtrVT == MVT::i32 && "only wasm32 is supported for now");
182
183 MachineSDNode *TLSAlign = CurDAG->getMachineNode(
184 WebAssembly::GLOBAL_GET_I32, DL, PtrVT,
185 CurDAG->getTargetExternalSymbol("__tls_align", MVT::i32));
186 ReplaceNode(Node, TLSAlign);
187 return;
188 }
Guanzhong Chen42bba4b2019-07-16 22:00:45 +0000189 }
190 break;
191 }
Guanzhong Chen801fa8e2019-07-18 17:53:22 +0000192 case ISD::INTRINSIC_W_CHAIN: {
193 unsigned IntNo = cast<ConstantSDNode>(Node->getOperand(1))->getZExtValue();
194 switch (IntNo) {
195 case Intrinsic::wasm_tls_base: {
196 MVT PtrVT = TLI->getPointerTy(CurDAG->getDataLayout());
197 assert(PtrVT == MVT::i32 && "only wasm32 is supported for now");
198
199 MachineSDNode *TLSBase = CurDAG->getMachineNode(
Guanzhong Chendf447922019-07-18 21:17:52 +0000200 WebAssembly::GLOBAL_GET_I32, DL, MVT::i32, MVT::Other,
Guanzhong Chen801fa8e2019-07-18 17:53:22 +0000201 CurDAG->getTargetExternalSymbol("__tls_base", PtrVT),
202 Node->getOperand(0));
203 ReplaceNode(Node, TLSBase);
204 return;
205 }
206 }
207 break;
208 }
Guanzhong Chen42bba4b2019-07-16 22:00:45 +0000209
JF Bastienb9073fb2015-07-22 21:28:15 +0000210 default:
211 break;
JF Bastienb9073fb2015-07-22 21:28:15 +0000212 }
213
214 // Select the default instruction.
Justin Bognerc6afd4b2016-05-13 22:44:57 +0000215 SelectCode(Node);
Dan Gohman10e730a2015-06-29 23:51:55 +0000216}
217
Dan Gohmanf19ed562015-11-13 01:42:29 +0000218bool WebAssemblyDAGToDAGISel::SelectInlineAsmMemoryOperand(
219 const SDValue &Op, unsigned ConstraintID, std::vector<SDValue> &OutOps) {
220 switch (ConstraintID) {
Dan Gohmanf19ed562015-11-13 01:42:29 +0000221 case InlineAsm::Constraint_m:
222 // We just support simple memory operands that just have a single address
223 // operand and need no special handling.
224 OutOps.push_back(Op);
225 return false;
226 default:
227 break;
228 }
229
230 return true;
231}
232
Dan Gohman10e730a2015-06-29 23:51:55 +0000233/// This pass converts a legalized DAG into a WebAssembly-specific DAG, ready
234/// for instruction scheduling.
235FunctionPass *llvm::createWebAssemblyISelDag(WebAssemblyTargetMachine &TM,
236 CodeGenOpt::Level OptLevel) {
237 return new WebAssemblyDAGToDAGISel(TM, OptLevel);
238}