| Konstantin Zhuravlyov | 662e01d | 2016-11-17 03:49:01 +0000 | [diff] [blame^] | 1 | ; RUN: llc -march=amdgcn -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=SI %s |
| 2 | ; RUN: llc -march=amdgcn -mcpu=fiji -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=VI %s |
| 3 | |
| 4 | ; GCN-LABEL: {{^}}br_cc_f16 |
| 5 | ; GCN: buffer_load_ushort v[[A_F16:[0-9]+]] |
| 6 | ; GCN: buffer_load_ushort v[[B_F16:[0-9]+]] |
| 7 | |
| 8 | ; SI: v_cvt_f32_f16_e32 v[[A_F32:[0-9]+]], v[[A_F16]] |
| 9 | ; SI: v_cvt_f32_f16_e32 v[[B_F32:[0-9]+]], v[[B_F16]] |
| 10 | ; SI: v_cmp_nlt_f32_e32 vcc, v[[A_F32]], v[[B_F32]] |
| 11 | ; VI: v_cmp_nlt_f16_e32 vcc, v[[A_F16]], v[[B_F16]] |
| 12 | ; GCN: s_cbranch_vccnz |
| 13 | |
| 14 | ; GCN: one{{$}} |
| 15 | ; SI: v_cvt_f16_f32_e32 v[[A_F16:[0-9]+]], v[[A_F32]] |
| 16 | ; GCN: buffer_store_short v[[A_F16]] |
| 17 | ; GCN: s_endpgm |
| 18 | |
| 19 | ; GCN: two{{$}} |
| 20 | ; SI: v_cvt_f16_f32_e32 v[[B_F16:[0-9]+]], v[[B_F32]] |
| 21 | ; GCN: buffer_store_short v[[B_F16]] |
| 22 | ; GCN: s_endpgm |
| 23 | define void @br_cc_f16( |
| 24 | half addrspace(1)* %r, |
| 25 | half addrspace(1)* %a, |
| 26 | half addrspace(1)* %b) { |
| 27 | entry: |
| 28 | %a.val = load half, half addrspace(1)* %a |
| 29 | %b.val = load half, half addrspace(1)* %b |
| 30 | %fcmp = fcmp olt half %a.val, %b.val |
| 31 | br i1 %fcmp, label %one, label %two |
| 32 | |
| 33 | one: |
| 34 | store half %a.val, half addrspace(1)* %r |
| 35 | ret void |
| 36 | |
| 37 | two: |
| 38 | store half %b.val, half addrspace(1)* %r |
| 39 | ret void |
| 40 | } |
| 41 | |
| 42 | ; GCN-LABEL: {{^}}br_cc_f16_imm_a |
| 43 | ; GCN: v_mov_b32_e32 v[[A_F16:[0-9]+]], 0x380{{0|1}}{{$}} |
| 44 | ; SI: v_cvt_f32_f16_e32 v[[A_F32:[0-9]+]], v[[A_F16]] |
| 45 | ; GCN: buffer_load_ushort v[[B_F16:[0-9]+]] |
| 46 | |
| 47 | ; SI: v_cvt_f32_f16_e32 v[[B_F32:[0-9]+]], v[[B_F16]] |
| 48 | ; SI: v_cmp_ngt_f32_e32 vcc, v[[B_F32]], v[[A_F32]] |
| 49 | ; VI: v_cmp_nle_f16_e32 vcc, v[[A_F16]], v[[B_F16]] |
| 50 | ; GCN: s_cbranch_vccnz |
| 51 | |
| 52 | ; GCN: one{{$}} |
| 53 | ; VI: v_mov_b32_e32 v[[A_F16:[0-9]+]], 0x3800{{$}} |
| 54 | ; GCN: buffer_store_short v[[A_F16]] |
| 55 | ; GCN: s_endpgm |
| 56 | |
| 57 | ; GCN: two{{$}} |
| 58 | ; SI: v_cvt_f16_f32_e32 v[[B_F16:[0-9]+]], v[[B_F32]] |
| 59 | ; GCN: buffer_store_short v[[B_F16]] |
| 60 | ; GCN: s_endpgm |
| 61 | define void @br_cc_f16_imm_a( |
| 62 | half addrspace(1)* %r, |
| 63 | half addrspace(1)* %b) { |
| 64 | entry: |
| 65 | %b.val = load half, half addrspace(1)* %b |
| 66 | %fcmp = fcmp olt half 0xH3800, %b.val |
| 67 | br i1 %fcmp, label %one, label %two |
| 68 | |
| 69 | one: |
| 70 | store half 0xH3800, half addrspace(1)* %r |
| 71 | ret void |
| 72 | |
| 73 | two: |
| 74 | store half %b.val, half addrspace(1)* %r |
| 75 | ret void |
| 76 | } |
| 77 | |
| 78 | ; GCN-LABEL: {{^}}br_cc_f16_imm_b |
| 79 | ; GCN: v_mov_b32_e32 v[[B_F16:[0-9]+]], {{0x37ff|0x3800}}{{$}} |
| 80 | ; SI: v_cvt_f32_f16_e32 v[[B_F32:[0-9]+]], v[[B_F16]] |
| 81 | ; GCN: buffer_load_ushort v[[A_F16:[0-9]+]] |
| 82 | |
| 83 | ; SI: v_cvt_f32_f16_e32 v[[A_F32:[0-9]+]], v[[A_F16]] |
| 84 | ; SI: v_cmp_nlt_f32_e32 vcc, v[[A_F32]], v[[B_F32]] |
| 85 | ; VI: v_cmp_nge_f16_e32 vcc, v[[B_F16]], v[[A_F16]] |
| 86 | ; GCN: s_cbranch_vccnz |
| 87 | |
| 88 | ; GCN: one{{$}} |
| 89 | ; SI: v_cvt_f16_f32_e32 v[[A_F16:[0-9]+]], v[[A_F32]] |
| 90 | ; GCN: buffer_store_short v[[A_F16]] |
| 91 | ; GCN: s_endpgm |
| 92 | |
| 93 | ; GCN: two{{$}} |
| 94 | ; VI: v_mov_b32_e32 v[[B_F16:[0-9]+]], 0x3800{{$}} |
| 95 | ; GCN: buffer_store_short v[[B_F16]] |
| 96 | ; GCN: s_endpgm |
| 97 | define void @br_cc_f16_imm_b( |
| 98 | half addrspace(1)* %r, |
| 99 | half addrspace(1)* %a) { |
| 100 | entry: |
| 101 | %a.val = load half, half addrspace(1)* %a |
| 102 | %fcmp = fcmp olt half %a.val, 0xH3800 |
| 103 | br i1 %fcmp, label %one, label %two |
| 104 | |
| 105 | one: |
| 106 | store half %a.val, half addrspace(1)* %r |
| 107 | ret void |
| 108 | |
| 109 | two: |
| 110 | store half 0xH3800, half addrspace(1)* %r |
| 111 | ret void |
| 112 | } |