blob: c6a18bf8e547d7c2268d247f529e0133f3672725 [file] [log] [blame]
Aaron Watry55845532013-06-25 13:55:32 +00001;RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck --check-prefix=EG-CHECK %s
Tom Stellard49f8bfd2015-01-06 18:00:21 +00002;RUN: llc < %s -march=amdgcn -mcpu=verde -verify-machineinstrs | FileCheck --check-prefix=SI-CHECK %s
Marek Olsak191507e2015-02-03 17:38:12 +00003;RUN: llc < %s -march=amdgcn -mcpu=tonga -verify-machineinstrs | FileCheck --check-prefix=VI-CHECK %s
Tom Stellard4489b852013-05-03 17:21:31 +00004
Tom Stellard79243d92014-10-01 17:15:17 +00005;EG-CHECK: {{^}}shl_v2i32:
Aaron Watry55845532013-06-25 13:55:32 +00006;EG-CHECK: LSHL {{\*? *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
7;EG-CHECK: LSHL {{\*? *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
Tom Stellard4489b852013-05-03 17:21:31 +00008
Tom Stellard79243d92014-10-01 17:15:17 +00009;SI-CHECK: {{^}}shl_v2i32:
Tom Stellard326d6ec2014-11-05 14:50:53 +000010;SI-CHECK: v_lshl_b32_e32 v{{[0-9]+, v[0-9]+, v[0-9]+}}
11;SI-CHECK: v_lshl_b32_e32 v{{[0-9]+, v[0-9]+, v[0-9]+}}
Aaron Watry55845532013-06-25 13:55:32 +000012
Marek Olsak191507e2015-02-03 17:38:12 +000013;VI-CHECK: {{^}}shl_v2i32:
14;VI-CHECK: v_lshlrev_b32_e32 v{{[0-9]+, v[0-9]+, v[0-9]+}}
15;VI-CHECK: v_lshlrev_b32_e32 v{{[0-9]+, v[0-9]+, v[0-9]+}}
16
Aaron Watry55845532013-06-25 13:55:32 +000017define void @shl_v2i32(<2 x i32> addrspace(1)* %out, <2 x i32> addrspace(1)* %in) {
18 %b_ptr = getelementptr <2 x i32> addrspace(1)* %in, i32 1
19 %a = load <2 x i32> addrspace(1) * %in
20 %b = load <2 x i32> addrspace(1) * %b_ptr
21 %result = shl <2 x i32> %a, %b
22 store <2 x i32> %result, <2 x i32> addrspace(1)* %out
23 ret void
24}
25
Tom Stellard79243d92014-10-01 17:15:17 +000026;EG-CHECK: {{^}}shl_v4i32:
Aaron Watry55845532013-06-25 13:55:32 +000027;EG-CHECK: LSHL {{\*? *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
28;EG-CHECK: LSHL {{\*? *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
29;EG-CHECK: LSHL {{\*? *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
30;EG-CHECK: LSHL {{\*? *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
31
Tom Stellard79243d92014-10-01 17:15:17 +000032;SI-CHECK: {{^}}shl_v4i32:
Tom Stellard326d6ec2014-11-05 14:50:53 +000033;SI-CHECK: v_lshl_b32_e32 v{{[0-9]+, v[0-9]+, v[0-9]+}}
34;SI-CHECK: v_lshl_b32_e32 v{{[0-9]+, v[0-9]+, v[0-9]+}}
35;SI-CHECK: v_lshl_b32_e32 v{{[0-9]+, v[0-9]+, v[0-9]+}}
36;SI-CHECK: v_lshl_b32_e32 v{{[0-9]+, v[0-9]+, v[0-9]+}}
Aaron Watry55845532013-06-25 13:55:32 +000037
Marek Olsak191507e2015-02-03 17:38:12 +000038;VI-CHECK: {{^}}shl_v4i32:
39;VI-CHECK: v_lshlrev_b32_e32 v{{[0-9]+, v[0-9]+, v[0-9]+}}
40;VI-CHECK: v_lshlrev_b32_e32 v{{[0-9]+, v[0-9]+, v[0-9]+}}
41;VI-CHECK: v_lshlrev_b32_e32 v{{[0-9]+, v[0-9]+, v[0-9]+}}
42;VI-CHECK: v_lshlrev_b32_e32 v{{[0-9]+, v[0-9]+, v[0-9]+}}
43
Aaron Watry55845532013-06-25 13:55:32 +000044define void @shl_v4i32(<4 x i32> addrspace(1)* %out, <4 x i32> addrspace(1)* %in) {
45 %b_ptr = getelementptr <4 x i32> addrspace(1)* %in, i32 1
46 %a = load <4 x i32> addrspace(1) * %in
47 %b = load <4 x i32> addrspace(1) * %b_ptr
Tom Stellard4489b852013-05-03 17:21:31 +000048 %result = shl <4 x i32> %a, %b
49 store <4 x i32> %result, <4 x i32> addrspace(1)* %out
50 ret void
51}
Tom Stellard1cfd7a52013-05-20 15:02:12 +000052
Tom Stellard79243d92014-10-01 17:15:17 +000053;EG-CHECK: {{^}}shl_i64:
Jan Vesely25f36272014-06-18 12:27:13 +000054;EG-CHECK: SUB_INT {{\*? *}}[[COMPSH:T[0-9]+\.[XYZW]]], {{literal.[xy]}}, [[SHIFT:T[0-9]+\.[XYZW]]]
55;EG-CHECK: LSHR {{\* *}}[[TEMP:T[0-9]+\.[XYZW]]], [[OPLO:T[0-9]+\.[XYZW]]], {{[[COMPSH]]|PV.[XYZW]}}
56;EG-CHECK: LSHR {{\*? *}}[[OVERF:T[0-9]+\.[XYZW]]], {{[[TEMP]]|PV.[XYZW]}}, 1
57;EG_CHECK-DAG: ADD_INT {{\*? *}}[[BIGSH:T[0-9]+\.[XYZW]]], [[SHIFT]], literal
58;EG-CHECK-DAG: LSHL {{\*? *}}[[HISMTMP:T[0-9]+\.[XYZW]]], [[OPHI:T[0-9]+\.[XYZW]]], [[SHIFT]]
59;EG-CHECK-DAG: OR_INT {{\*? *}}[[HISM:T[0-9]+\.[XYZW]]], {{[[HISMTMP]]|PV.[XYZW]}}, {{[[OVERF]]|PV.[XYZW]}}
60;EG-CHECK-DAG: LSHL {{\*? *}}[[LOSM:T[0-9]+\.[XYZW]]], [[OPLO]], {{PS|[[SHIFT]]}}
61;EG-CHECK-DAG: SETGT_UINT {{\*? *}}[[RESC:T[0-9]+\.[XYZW]]], [[SHIFT]], literal
62;EG-CHECK-DAG: CNDE_INT {{\*? *}}[[RESLO:T[0-9]+\.[XYZW]]], {{T[0-9]+\.[XYZW]}}
63;EG-CHECK-DAG: CNDE_INT {{\*? *}}[[RESHI:T[0-9]+\.[XYZW]]], {{T[0-9]+\.[XYZW], .*}}, 0.0
64
Tom Stellard79243d92014-10-01 17:15:17 +000065;SI-CHECK: {{^}}shl_i64:
Tom Stellard326d6ec2014-11-05 14:50:53 +000066;SI-CHECK: v_lshl_b64 {{v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\], v[0-9]+}}
Jan Vesely25f36272014-06-18 12:27:13 +000067
Marek Olsak191507e2015-02-03 17:38:12 +000068;VI-CHECK: {{^}}shl_i64:
Marek Olsak707a6d02015-02-03 21:53:01 +000069;VI-CHECK: v_lshlrev_b64 {{v\[[0-9]+:[0-9]+\], v[0-9]+, v\[[0-9]+:[0-9]+\]}}
Marek Olsak191507e2015-02-03 17:38:12 +000070
Jan Vesely25f36272014-06-18 12:27:13 +000071define void @shl_i64(i64 addrspace(1)* %out, i64 addrspace(1)* %in) {
72 %b_ptr = getelementptr i64 addrspace(1)* %in, i64 1
73 %a = load i64 addrspace(1) * %in
74 %b = load i64 addrspace(1) * %b_ptr
75 %result = shl i64 %a, %b
76 store i64 %result, i64 addrspace(1)* %out
77 ret void
78}
79
Tom Stellard79243d92014-10-01 17:15:17 +000080;EG-CHECK: {{^}}shl_v2i64:
Jan Vesely25f36272014-06-18 12:27:13 +000081;EG-CHECK-DAG: SUB_INT {{\*? *}}[[COMPSHA:T[0-9]+\.[XYZW]]], {{literal.[xy]}}, [[SHA:T[0-9]+\.[XYZW]]]
82;EG-CHECK-DAG: SUB_INT {{\*? *}}[[COMPSHB:T[0-9]+\.[XYZW]]], {{literal.[xy]}}, [[SHB:T[0-9]+\.[XYZW]]]
83;EG-CHECK-DAG: LSHR {{\*? *}}[[COMPSHA]]
84;EG-CHECK-DAG: LSHR {{\*? *}}[[COMPSHB]]
85;EG-CHECK-DAG: LSHR {{.*}}, 1
86;EG-CHECK-DAG: LSHR {{.*}}, 1
87;EG-CHECK-DAG: ADD_INT {{\*? *}}[[BIGSHA:T[0-9]+\.[XYZW]]]{{.*}}, literal
88;EG-CHECK-DAG: ADD_INT {{\*? *}}[[BIGSHB:T[0-9]+\.[XYZW]]]{{.*}}, literal
89;EG-CHECK-DAG: LSHL {{.*}}, [[SHA]]
90;EG-CHECK-DAG: LSHL {{.*}}, [[SHB]]
91;EG-CHECK-DAG: LSHL {{.*}}, [[SHA]]
92;EG-CHECK-DAG: LSHL {{.*}}, [[SHB]]
93;EG-CHECK-DAG: LSHL
94;EG-CHECK-DAG: LSHL
95;EG-CHECK-DAG: SETGT_UINT {{\*? *T[0-9]\.[XYZW]}}, [[SHA]], literal
96;EG-CHECK-DAG: SETGT_UINT {{\*? *T[0-9]\.[XYZW]}}, [[SHB]], literal
97;EG-CHECK-DAG: CNDE_INT {{.*}}, 0.0
98;EG-CHECK-DAG: CNDE_INT {{.*}}, 0.0
99;EG-CHECK-DAG: CNDE_INT
100;EG-CHECK-DAG: CNDE_INT
101
Tom Stellard79243d92014-10-01 17:15:17 +0000102;SI-CHECK: {{^}}shl_v2i64:
Tom Stellard326d6ec2014-11-05 14:50:53 +0000103;SI-CHECK: v_lshl_b64 {{v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\], v[0-9]+}}
104;SI-CHECK: v_lshl_b64 {{v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\], v[0-9]+}}
Jan Vesely25f36272014-06-18 12:27:13 +0000105
Marek Olsak191507e2015-02-03 17:38:12 +0000106;VI-CHECK: {{^}}shl_v2i64:
Marek Olsak707a6d02015-02-03 21:53:01 +0000107;VI-CHECK: v_lshlrev_b64 {{v\[[0-9]+:[0-9]+\], v[0-9]+, v\[[0-9]+:[0-9]+\]}}
108;VI-CHECK: v_lshlrev_b64 {{v\[[0-9]+:[0-9]+\], v[0-9]+, v\[[0-9]+:[0-9]+\]}}
Marek Olsak191507e2015-02-03 17:38:12 +0000109
Jan Vesely25f36272014-06-18 12:27:13 +0000110define void @shl_v2i64(<2 x i64> addrspace(1)* %out, <2 x i64> addrspace(1)* %in) {
111 %b_ptr = getelementptr <2 x i64> addrspace(1)* %in, i64 1
112 %a = load <2 x i64> addrspace(1) * %in
113 %b = load <2 x i64> addrspace(1) * %b_ptr
114 %result = shl <2 x i64> %a, %b
115 store <2 x i64> %result, <2 x i64> addrspace(1)* %out
116 ret void
117}
118
Tom Stellard79243d92014-10-01 17:15:17 +0000119;EG-CHECK: {{^}}shl_v4i64:
Jan Vesely25f36272014-06-18 12:27:13 +0000120;EG-CHECK-DAG: SUB_INT {{\*? *}}[[COMPSHA:T[0-9]+\.[XYZW]]], {{literal.[xy]}}, [[SHA:T[0-9]+\.[XYZW]]]
121;EG-CHECK-DAG: SUB_INT {{\*? *}}[[COMPSHB:T[0-9]+\.[XYZW]]], {{literal.[xy]}}, [[SHB:T[0-9]+\.[XYZW]]]
122;EG-CHECK-DAG: SUB_INT {{\*? *}}[[COMPSHC:T[0-9]+\.[XYZW]]], {{literal.[xy]}}, [[SHC:T[0-9]+\.[XYZW]]]
123;EG-CHECK-DAG: SUB_INT {{\*? *}}[[COMPSHD:T[0-9]+\.[XYZW]]], {{literal.[xy]}}, [[SHD:T[0-9]+\.[XYZW]]]
124;EG-CHECK-DAG: LSHR {{\*? *}}[[COMPSHA]]
125;EG-CHECK-DAG: LSHR {{\*? *}}[[COMPSHB]]
126;EG-CHECK-DAG: LSHR {{\*? *}}[[COMPSHC]]
127;EG-CHECK-DAG: LSHR {{\*? *}}[[COMPSHD]]
128;EG-CHECK-DAG: LSHR {{.*}}, 1
129;EG-CHECK-DAG: LSHR {{.*}}, 1
130;EG-CHECK-DAG: LSHR {{.*}}, 1
131;EG-CHECK-DAG: LSHR {{.*}}, 1
132;EG-CHECK-DAG: ADD_INT {{\*? *}}[[BIGSHA:T[0-9]+\.[XYZW]]]{{.*}}, literal
133;EG-CHECK-DAG: ADD_INT {{\*? *}}[[BIGSHB:T[0-9]+\.[XYZW]]]{{.*}}, literal
134;EG-CHECK-DAG: ADD_INT {{\*? *}}[[BIGSHC:T[0-9]+\.[XYZW]]]{{.*}}, literal
135;EG-CHECK-DAG: ADD_INT {{\*? *}}[[BIGSHD:T[0-9]+\.[XYZW]]]{{.*}}, literal
136;EG-CHECK-DAG: LSHL {{.*}}, [[SHA]]
137;EG-CHECK-DAG: LSHL {{.*}}, [[SHB]]
138;EG-CHECK-DAG: LSHL {{.*}}, [[SHC]]
139;EG-CHECK-DAG: LSHL {{.*}}, [[SHD]]
140;EG-CHECK-DAG: LSHL {{.*}}, [[SHA]]
141;EG-CHECK-DAG: LSHL {{.*}}, [[SHB]]
142;EG-CHECK-DAG: LSHL {{.*}}, [[SHC]]
143;EG-CHECK-DAG: LSHL {{.*}}, [[SHD]]
144;EG-CHECK-DAG: LSHL
145;EG-CHECK-DAG: LSHL
146;EG-CHECK-DAG: LSHL
147;EG-CHECK-DAG: LSHL
148;EG-CHECK-DAG: SETGT_UINT {{\*? *T[0-9]\.[XYZW]}}, [[SHA]], literal
149;EG-CHECK-DAG: SETGT_UINT {{\*? *T[0-9]\.[XYZW]}}, [[SHB]], literal
150;EG-CHECK-DAG: SETGT_UINT {{\*? *T[0-9]\.[XYZW]}}, [[SHC]], literal
151;EG-CHECK-DAG: SETGT_UINT {{\*? *T[0-9]\.[XYZW]}}, [[SHD]], literal
152;EG-CHECK-DAG: CNDE_INT {{.*}}, 0.0
153;EG-CHECK-DAG: CNDE_INT {{.*}}, 0.0
154;EG-CHECK-DAG: CNDE_INT {{.*}}, 0.0
155;EG-CHECK-DAG: CNDE_INT {{.*}}, 0.0
156;EG-CHECK-DAG: CNDE_INT
157;EG-CHECK-DAG: CNDE_INT
158;EG-CHECK-DAG: CNDE_INT
159;EG-CHECK-DAG: CNDE_INT
160
Tom Stellard79243d92014-10-01 17:15:17 +0000161;SI-CHECK: {{^}}shl_v4i64:
Tom Stellard326d6ec2014-11-05 14:50:53 +0000162;SI-CHECK: v_lshl_b64 {{v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\], v[0-9]+}}
163;SI-CHECK: v_lshl_b64 {{v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\], v[0-9]+}}
164;SI-CHECK: v_lshl_b64 {{v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\], v[0-9]+}}
165;SI-CHECK: v_lshl_b64 {{v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\], v[0-9]+}}
Jan Vesely25f36272014-06-18 12:27:13 +0000166
Marek Olsak191507e2015-02-03 17:38:12 +0000167;VI-CHECK: {{^}}shl_v4i64:
Marek Olsak707a6d02015-02-03 21:53:01 +0000168;VI-CHECK: v_lshlrev_b64 {{v\[[0-9]+:[0-9]+\], v[0-9]+, v\[[0-9]+:[0-9]+\]}}
169;VI-CHECK: v_lshlrev_b64 {{v\[[0-9]+:[0-9]+\], v[0-9]+, v\[[0-9]+:[0-9]+\]}}
170;VI-CHECK: v_lshlrev_b64 {{v\[[0-9]+:[0-9]+\], v[0-9]+, v\[[0-9]+:[0-9]+\]}}
171;VI-CHECK: v_lshlrev_b64 {{v\[[0-9]+:[0-9]+\], v[0-9]+, v\[[0-9]+:[0-9]+\]}}
Marek Olsak191507e2015-02-03 17:38:12 +0000172
Jan Vesely25f36272014-06-18 12:27:13 +0000173define void @shl_v4i64(<4 x i64> addrspace(1)* %out, <4 x i64> addrspace(1)* %in) {
174 %b_ptr = getelementptr <4 x i64> addrspace(1)* %in, i64 1
175 %a = load <4 x i64> addrspace(1) * %in
176 %b = load <4 x i64> addrspace(1) * %b_ptr
177 %result = shl <4 x i64> %a, %b
178 store <4 x i64> %result, <4 x i64> addrspace(1)* %out
179 ret void
180}