blob: 54fc0bf0b68eb14a7c89e8771cb1eb2cc2e02393 [file] [log] [blame]
Matt Arsenault657f8712016-07-12 19:01:23 +00001; RUN: llc -march=amdgcn -verify-machineinstrs < %s | FileCheck %s
2
3; CHECK-LABEL: {{^}}test_kill_depth_0_imm_pos:
4; CHECK-NEXT: ; BB#0:
Matt Arsenault786724a2016-07-12 21:41:32 +00005; CHECK-NEXT: ; BB#1:
Matt Arsenault657f8712016-07-12 19:01:23 +00006; CHECK-NEXT: s_endpgm
7define amdgpu_ps void @test_kill_depth_0_imm_pos() #0 {
8 call void @llvm.AMDGPU.kill(float 0.0)
9 ret void
10}
11
12; CHECK-LABEL: {{^}}test_kill_depth_0_imm_neg:
13; CHECK-NEXT: ; BB#0:
14; CHECK-NEXT: s_mov_b64 exec, 0
Matt Arsenault786724a2016-07-12 21:41:32 +000015; CHECK-NEXT: ; BB#1:
Matt Arsenault657f8712016-07-12 19:01:23 +000016; CHECK-NEXT: s_endpgm
17define amdgpu_ps void @test_kill_depth_0_imm_neg() #0 {
18 call void @llvm.AMDGPU.kill(float -0.0)
19 ret void
20}
21
Matt Arsenault786724a2016-07-12 21:41:32 +000022; FIXME: Ideally only one would be emitted
23; CHECK-LABEL: {{^}}test_kill_depth_0_imm_neg_x2:
24; CHECK-NEXT: ; BB#0:
25; CHECK-NEXT: s_mov_b64 exec, 0
26; CHECK-NEXT: ; BB#1:
27; CHECK-NEXT: s_mov_b64 exec, 0
28; CHECK-NEXT: ; BB#2:
29; CHECK-NEXT: s_endpgm
30define amdgpu_ps void @test_kill_depth_0_imm_neg_x2() #0 {
31 call void @llvm.AMDGPU.kill(float -0.0)
32 call void @llvm.AMDGPU.kill(float -1.0)
33 ret void
34}
35
Matt Arsenault657f8712016-07-12 19:01:23 +000036; CHECK-LABEL: {{^}}test_kill_depth_var:
37; CHECK-NEXT: ; BB#0:
38; CHECK-NEXT: v_cmpx_le_f32_e32 vcc, 0, v0
Matt Arsenault786724a2016-07-12 21:41:32 +000039; CHECK-NEXT: ; BB#1:
Matt Arsenault657f8712016-07-12 19:01:23 +000040; CHECK-NEXT: s_endpgm
41define amdgpu_ps void @test_kill_depth_var(float %x) #0 {
42 call void @llvm.AMDGPU.kill(float %x)
43 ret void
44}
45
Matt Arsenault786724a2016-07-12 21:41:32 +000046; FIXME: Ideally only one would be emitted
47; CHECK-LABEL: {{^}}test_kill_depth_var_x2_same:
48; CHECK-NEXT: ; BB#0:
49; CHECK-NEXT: v_cmpx_le_f32_e32 vcc, 0, v0
50; CHECK-NEXT: ; BB#1:
51; CHECK-NEXT: v_cmpx_le_f32_e32 vcc, 0, v0
52; CHECK-NEXT: ; BB#2:
53; CHECK-NEXT: s_endpgm
54define amdgpu_ps void @test_kill_depth_var_x2_same(float %x) #0 {
55 call void @llvm.AMDGPU.kill(float %x)
56 call void @llvm.AMDGPU.kill(float %x)
57 ret void
58}
59
60; CHECK-LABEL: {{^}}test_kill_depth_var_x2:
61; CHECK-NEXT: ; BB#0:
62; CHECK-NEXT: v_cmpx_le_f32_e32 vcc, 0, v0
63; CHECK-NEXT: ; BB#1:
64; CHECK-NEXT: v_cmpx_le_f32_e32 vcc, 0, v1
65; CHECK-NEXT: ; BB#2:
66; CHECK-NEXT: s_endpgm
67define amdgpu_ps void @test_kill_depth_var_x2(float %x, float %y) #0 {
68 call void @llvm.AMDGPU.kill(float %x)
69 call void @llvm.AMDGPU.kill(float %y)
70 ret void
71}
72
73; CHECK-LABEL: {{^}}test_kill_depth_var_x2_instructions:
74; CHECK-NEXT: ; BB#0:
75; CHECK-NEXT: v_cmpx_le_f32_e32 vcc, 0, v0
76; CHECK-NEXT: ; BB#1:
77; CHECK: v_mov_b32_e64 v7, -1
78; CHECK: v_cmpx_le_f32_e32 vcc, 0, v7
79; CHECK-NEXT: ; BB#2:
80; CHECK-NEXT: s_endpgm
81define amdgpu_ps void @test_kill_depth_var_x2_instructions(float %x) #0 {
82 call void @llvm.AMDGPU.kill(float %x)
83 %y = call float asm sideeffect "v_mov_b32_e64 v7, -1", "={VGPR7}"()
84 call void @llvm.AMDGPU.kill(float %y)
85 ret void
86}
87
Matt Arsenault657f8712016-07-12 19:01:23 +000088; FIXME: why does the skip depend on the asm length in the same block?
89
90; CHECK-LABEL: {{^}}test_kill_control_flow:
91; CHECK: s_cmp_lg_i32 s{{[0-9]+}}, 0
92; CHECK: s_cbranch_scc1 [[RETURN_BB:BB[0-9]+_[0-9]+]]
93
Matt Arsenault786724a2016-07-12 21:41:32 +000094; CHECK-NEXT: ; BB#1:
95; CHECK: v_mov_b32_e64 v7, -1
Matt Arsenault657f8712016-07-12 19:01:23 +000096; CHECK: v_nop_e64
97; CHECK: v_nop_e64
98; CHECK: v_nop_e64
99; CHECK: v_nop_e64
100; CHECK: v_nop_e64
101; CHECK: v_nop_e64
102; CHECK: v_nop_e64
103; CHECK: v_nop_e64
104; CHECK: v_nop_e64
105; CHECK: v_nop_e64
106
Matt Arsenault786724a2016-07-12 21:41:32 +0000107; CHECK: v_cmpx_le_f32_e32 vcc, 0, v7
108; CHECK-NEXT: s_cbranch_execnz [[SPLIT_BB:BB[0-9]+_[0-9]+]]
Matt Arsenault657f8712016-07-12 19:01:23 +0000109; CHECK-NEXT: ; BB#3:
110; CHECK-NEXT: exp 0, 9, 0, 1, 1, v0, v0, v0, v0
111; CHECK-NEXT: s_endpgm
112
113; CHECK-NEXT: {{^}}[[SPLIT_BB]]:
Matt Arsenault657f8712016-07-12 19:01:23 +0000114; CHECK-NEXT: s_endpgm
115define amdgpu_ps void @test_kill_control_flow(i32 inreg %arg) #0 {
116entry:
117 %cmp = icmp eq i32 %arg, 0
118 br i1 %cmp, label %bb, label %exit
119
120bb:
121 %var = call float asm sideeffect "
122 v_mov_b32_e64 v7, -1
123 v_nop_e64
124 v_nop_e64
125 v_nop_e64
126 v_nop_e64
127 v_nop_e64
128 v_nop_e64
129 v_nop_e64
130 v_nop_e64
131 v_nop_e64
132 v_nop_e64", "={VGPR7}"()
133 call void @llvm.AMDGPU.kill(float %var)
134 br label %exit
135
136exit:
137 ret void
138}
139
140; CHECK-LABEL: {{^}}test_kill_control_flow_remainder:
141; CHECK: s_cmp_lg_i32 s{{[0-9]+}}, 0
142; CHECK-NEXT: s_cbranch_scc1 [[RETURN_BB:BB[0-9]+_[0-9]+]]
143
144; CHECK-NEXT: ; BB#1: ; %bb
145; CHECK: v_mov_b32_e64 v7, -1
146; CHECK: v_nop_e64
147; CHECK: v_nop_e64
148; CHECK: v_nop_e64
149; CHECK: v_nop_e64
150; CHECK: v_nop_e64
151; CHECK: v_nop_e64
152; CHECK: v_nop_e64
153; CHECK: v_nop_e64
154; CHECK: ;;#ASMEND
155; CHECK: v_mov_b32_e64 v8, -1
156; CHECK: ;;#ASMEND
Matt Arsenault786724a2016-07-12 21:41:32 +0000157; CHECK: v_cmpx_le_f32_e32 vcc, 0, v7
Matt Arsenault657f8712016-07-12 19:01:23 +0000158; CHECK-NEXT: s_cbranch_execnz [[SPLIT_BB:BB[0-9]+_[0-9]+]]
159
Matt Arsenault786724a2016-07-12 21:41:32 +0000160; CHECK-NEXT: ; BB#4:
Matt Arsenault657f8712016-07-12 19:01:23 +0000161; CHECK-NEXT: exp 0, 9, 0, 1, 1, v0, v0, v0, v0
162; CHECK-NEXT: s_endpgm
163
164; CHECK-NEXT: {{^}}[[SPLIT_BB]]:
Matt Arsenault657f8712016-07-12 19:01:23 +0000165; CHECK: buffer_store_dword v8
166; CHECK: v_mov_b32_e64 v9, -2
167
168; CHECK: {{^}}BB{{[0-9]+_[0-9]+}}:
169; CHECK: buffer_store_dword v9
170; CHECK-NEXT: s_endpgm
171define amdgpu_ps void @test_kill_control_flow_remainder(i32 inreg %arg) #0 {
172entry:
173 %cmp = icmp eq i32 %arg, 0
174 br i1 %cmp, label %bb, label %exit
175
176bb:
177 %var = call float asm sideeffect "
178 v_mov_b32_e64 v7, -1
179 v_nop_e64
180 v_nop_e64
181 v_nop_e64
182 v_nop_e64
183 v_nop_e64
184 v_nop_e64
185 v_nop_e64
186 v_nop_e64
187 v_nop_e64
188 v_nop_e64
189 v_nop_e64", "={VGPR7}"()
190 %live.across = call float asm sideeffect "v_mov_b32_e64 v8, -1", "={VGPR8}"()
191 call void @llvm.AMDGPU.kill(float %var)
192 store volatile float %live.across, float addrspace(1)* undef
193 %live.out = call float asm sideeffect "v_mov_b32_e64 v9, -2", "={VGPR9}"()
194 br label %exit
195
196exit:
197 %phi = phi float [ 0.0, %entry ], [ %live.out, %bb ]
198 store float %phi, float addrspace(1)* undef
199 ret void
200}
201
Matt Arsenault786724a2016-07-12 21:41:32 +0000202; CHECK-LABEL: {{^}}test_kill_divergent_loop:
203; CHECK: v_cmp_eq_i32_e32 vcc, 0, v0
204; CHECK-NEXT: s_and_saveexec_b64 [[SAVEEXEC:s\[[0-9]+:[0-9]+\]]], vcc
205; CHECK-NEXT: s_xor_b64 [[SAVEEXEC]], exec, [[SAVEEXEC]]
206; CHECK-NEXT: s_cbranch_execz [[EXIT:BB[0-9]+_[0-9]+]]
207; CHECK-NEXT: ; mask branch [[EXIT]]
208
209; CHECK: [[LOOP_BB:BB[0-9]+_[0-9]+]]:
210
211; CHECK: v_mov_b32_e64 v7, -1
212; CHECK: v_nop_e64
213; CHECK: v_cmpx_le_f32_e32 vcc, 0, v7
214
215; CHECK-NEXT: ; BB#3:
216; CHECK: buffer_load_dword [[LOAD:v[0-9]+]]
217; CHECK: v_cmp_eq_i32_e32 vcc, 0, [[LOAD]]
218; CHECK-NEXT: s_and_b64 vcc, exec, vcc
219; CHECK-NEXT: s_cbranch_vccnz [[LOOP_BB]]
220
221; CHECK-NEXT: {{^}}[[EXIT]]:
222; CHECK: s_or_b64 exec, exec, [[SAVEEXEC]]
223; CHECK: buffer_store_dword
224; CHECK: s_endpgm
225define amdgpu_ps void @test_kill_divergent_loop(i32 %arg) #0 {
226entry:
227 %cmp = icmp eq i32 %arg, 0
228 br i1 %cmp, label %bb, label %exit
229
230bb:
231 %var = call float asm sideeffect "
232 v_mov_b32_e64 v7, -1
233 v_nop_e64
234 v_nop_e64
235 v_nop_e64
236 v_nop_e64
237 v_nop_e64
238 v_nop_e64
239 v_nop_e64
240 v_nop_e64
241 v_nop_e64
242 v_nop_e64", "={VGPR7}"()
243 call void @llvm.AMDGPU.kill(float %var)
244 %vgpr = load volatile i32, i32 addrspace(1)* undef
245 %loop.cond = icmp eq i32 %vgpr, 0
246 br i1 %loop.cond, label %bb, label %exit
247
248exit:
249 store volatile i32 8, i32 addrspace(1)* undef
250 ret void
251}
252
253
Matt Arsenault657f8712016-07-12 19:01:23 +0000254declare void @llvm.AMDGPU.kill(float) #0
255
256attributes #0 = { nounwind }