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gerrit-public.fairphone.software / toolchain / llvm-project / 81fe1fbf4abd00b24e078a80cb15a2d2c1343f11 / . / llvm / test / CodeGen / RISCV / atomic-rmw.ll
blob: f27afbba7ccca8b9fe85ff6bb1c690101deeec75 [file] [log] [blame]
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mtriple=riscv32 -verify-machineinstrs < %s \
3; RUN: | FileCheck -check-prefix=RV32I %s
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]4; RUN: llc -mtriple=riscv32 -mattr=+a -verify-machineinstrs < %s \
5; RUN: | FileCheck -check-prefix=RV32IA %s
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]6
7define i8 @atomicrmw_xchg_i8_monotonic(i8* %a, i8 %b) {
8; RV32I-LABEL: atomicrmw_xchg_i8_monotonic:
9; RV32I: # %bb.0:
10; RV32I-NEXT: addi sp, sp, -16
11; RV32I-NEXT: sw ra, 12(sp)
12; RV32I-NEXT: mv a2, zero
13; RV32I-NEXT: call __atomic_exchange_1
14; RV32I-NEXT: lw ra, 12(sp)
15; RV32I-NEXT: addi sp, sp, 16
16; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]17;
18; RV32IA-LABEL: atomicrmw_xchg_i8_monotonic:
19; RV32IA: # %bb.0:
20; RV32IA-NEXT: slli a2, a0, 3
21; RV32IA-NEXT: andi a2, a2, 24
22; RV32IA-NEXT: addi a3, zero, 255
23; RV32IA-NEXT: sll a3, a3, a2
24; RV32IA-NEXT: andi a1, a1, 255
25; RV32IA-NEXT: sll a1, a1, a2
26; RV32IA-NEXT: andi a0, a0, -4
27; RV32IA-NEXT: .LBB0_1: # =>This Inner Loop Header: Depth=1
28; RV32IA-NEXT: lr.w a4, (a0)
29; RV32IA-NEXT: add a5, zero, a1
30; RV32IA-NEXT: xor a5, a4, a5
31; RV32IA-NEXT: and a5, a5, a3
32; RV32IA-NEXT: xor a5, a4, a5
33; RV32IA-NEXT: sc.w a5, a5, (a0)
34; RV32IA-NEXT: bnez a5, .LBB0_1
35; RV32IA-NEXT: # %bb.2:
36; RV32IA-NEXT: srl a0, a4, a2
37; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]38 %1 = atomicrmw xchg i8* %a, i8 %b monotonic
39 ret i8 %1
40}
41
42define i8 @atomicrmw_xchg_i8_acquire(i8* %a, i8 %b) {
43; RV32I-LABEL: atomicrmw_xchg_i8_acquire:
44; RV32I: # %bb.0:
45; RV32I-NEXT: addi sp, sp, -16
46; RV32I-NEXT: sw ra, 12(sp)
47; RV32I-NEXT: addi a2, zero, 2
48; RV32I-NEXT: call __atomic_exchange_1
49; RV32I-NEXT: lw ra, 12(sp)
50; RV32I-NEXT: addi sp, sp, 16
51; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]52;
53; RV32IA-LABEL: atomicrmw_xchg_i8_acquire:
54; RV32IA: # %bb.0:
55; RV32IA-NEXT: slli a2, a0, 3
56; RV32IA-NEXT: andi a2, a2, 24
57; RV32IA-NEXT: addi a3, zero, 255
58; RV32IA-NEXT: sll a3, a3, a2
59; RV32IA-NEXT: andi a1, a1, 255
60; RV32IA-NEXT: sll a1, a1, a2
61; RV32IA-NEXT: andi a0, a0, -4
62; RV32IA-NEXT: .LBB1_1: # =>This Inner Loop Header: Depth=1
63; RV32IA-NEXT: lr.w.aq a4, (a0)
64; RV32IA-NEXT: add a5, zero, a1
65; RV32IA-NEXT: xor a5, a4, a5
66; RV32IA-NEXT: and a5, a5, a3
67; RV32IA-NEXT: xor a5, a4, a5
68; RV32IA-NEXT: sc.w a5, a5, (a0)
69; RV32IA-NEXT: bnez a5, .LBB1_1
70; RV32IA-NEXT: # %bb.2:
71; RV32IA-NEXT: srl a0, a4, a2
72; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]73 %1 = atomicrmw xchg i8* %a, i8 %b acquire
74 ret i8 %1
75}
76
77define i8 @atomicrmw_xchg_i8_release(i8* %a, i8 %b) {
78; RV32I-LABEL: atomicrmw_xchg_i8_release:
79; RV32I: # %bb.0:
80; RV32I-NEXT: addi sp, sp, -16
81; RV32I-NEXT: sw ra, 12(sp)
82; RV32I-NEXT: addi a2, zero, 3
83; RV32I-NEXT: call __atomic_exchange_1
84; RV32I-NEXT: lw ra, 12(sp)
85; RV32I-NEXT: addi sp, sp, 16
86; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]87;
88; RV32IA-LABEL: atomicrmw_xchg_i8_release:
89; RV32IA: # %bb.0:
90; RV32IA-NEXT: slli a2, a0, 3
91; RV32IA-NEXT: andi a2, a2, 24
92; RV32IA-NEXT: addi a3, zero, 255
93; RV32IA-NEXT: sll a3, a3, a2
94; RV32IA-NEXT: andi a1, a1, 255
95; RV32IA-NEXT: sll a1, a1, a2
96; RV32IA-NEXT: andi a0, a0, -4
97; RV32IA-NEXT: .LBB2_1: # =>This Inner Loop Header: Depth=1
98; RV32IA-NEXT: lr.w a4, (a0)
99; RV32IA-NEXT: add a5, zero, a1
100; RV32IA-NEXT: xor a5, a4, a5
101; RV32IA-NEXT: and a5, a5, a3
102; RV32IA-NEXT: xor a5, a4, a5
103; RV32IA-NEXT: sc.w.rl a5, a5, (a0)
104; RV32IA-NEXT: bnez a5, .LBB2_1
105; RV32IA-NEXT: # %bb.2:
106; RV32IA-NEXT: srl a0, a4, a2
107; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]108 %1 = atomicrmw xchg i8* %a, i8 %b release
109 ret i8 %1
110}
111
112define i8 @atomicrmw_xchg_i8_acq_rel(i8* %a, i8 %b) {
113; RV32I-LABEL: atomicrmw_xchg_i8_acq_rel:
114; RV32I: # %bb.0:
115; RV32I-NEXT: addi sp, sp, -16
116; RV32I-NEXT: sw ra, 12(sp)
117; RV32I-NEXT: addi a2, zero, 4
118; RV32I-NEXT: call __atomic_exchange_1
119; RV32I-NEXT: lw ra, 12(sp)
120; RV32I-NEXT: addi sp, sp, 16
121; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]122;
123; RV32IA-LABEL: atomicrmw_xchg_i8_acq_rel:
124; RV32IA: # %bb.0:
125; RV32IA-NEXT: slli a2, a0, 3
126; RV32IA-NEXT: andi a2, a2, 24
127; RV32IA-NEXT: addi a3, zero, 255
128; RV32IA-NEXT: sll a3, a3, a2
129; RV32IA-NEXT: andi a1, a1, 255
130; RV32IA-NEXT: sll a1, a1, a2
131; RV32IA-NEXT: andi a0, a0, -4
132; RV32IA-NEXT: .LBB3_1: # =>This Inner Loop Header: Depth=1
133; RV32IA-NEXT: lr.w.aq a4, (a0)
134; RV32IA-NEXT: add a5, zero, a1
135; RV32IA-NEXT: xor a5, a4, a5
136; RV32IA-NEXT: and a5, a5, a3
137; RV32IA-NEXT: xor a5, a4, a5
138; RV32IA-NEXT: sc.w.rl a5, a5, (a0)
139; RV32IA-NEXT: bnez a5, .LBB3_1
140; RV32IA-NEXT: # %bb.2:
141; RV32IA-NEXT: srl a0, a4, a2
142; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]143 %1 = atomicrmw xchg i8* %a, i8 %b acq_rel
144 ret i8 %1
145}
146
147define i8 @atomicrmw_xchg_i8_seq_cst(i8* %a, i8 %b) {
148; RV32I-LABEL: atomicrmw_xchg_i8_seq_cst:
149; RV32I: # %bb.0:
150; RV32I-NEXT: addi sp, sp, -16
151; RV32I-NEXT: sw ra, 12(sp)
152; RV32I-NEXT: addi a2, zero, 5
153; RV32I-NEXT: call __atomic_exchange_1
154; RV32I-NEXT: lw ra, 12(sp)
155; RV32I-NEXT: addi sp, sp, 16
156; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]157;
158; RV32IA-LABEL: atomicrmw_xchg_i8_seq_cst:
159; RV32IA: # %bb.0:
160; RV32IA-NEXT: slli a2, a0, 3
161; RV32IA-NEXT: andi a2, a2, 24
162; RV32IA-NEXT: addi a3, zero, 255
163; RV32IA-NEXT: sll a3, a3, a2
164; RV32IA-NEXT: andi a1, a1, 255
165; RV32IA-NEXT: sll a1, a1, a2
166; RV32IA-NEXT: andi a0, a0, -4
167; RV32IA-NEXT: .LBB4_1: # =>This Inner Loop Header: Depth=1
168; RV32IA-NEXT: lr.w.aqrl a4, (a0)
169; RV32IA-NEXT: add a5, zero, a1
170; RV32IA-NEXT: xor a5, a4, a5
171; RV32IA-NEXT: and a5, a5, a3
172; RV32IA-NEXT: xor a5, a4, a5
173; RV32IA-NEXT: sc.w.aqrl a5, a5, (a0)
174; RV32IA-NEXT: bnez a5, .LBB4_1
175; RV32IA-NEXT: # %bb.2:
176; RV32IA-NEXT: srl a0, a4, a2
177; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]178 %1 = atomicrmw xchg i8* %a, i8 %b seq_cst
179 ret i8 %1
180}
181
182define i8 @atomicrmw_add_i8_monotonic(i8 *%a, i8 %b) nounwind {
183; RV32I-LABEL: atomicrmw_add_i8_monotonic:
184; RV32I: # %bb.0:
185; RV32I-NEXT: addi sp, sp, -16
186; RV32I-NEXT: sw ra, 12(sp)
187; RV32I-NEXT: mv a2, zero
188; RV32I-NEXT: call __atomic_fetch_add_1
189; RV32I-NEXT: lw ra, 12(sp)
190; RV32I-NEXT: addi sp, sp, 16
191; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]192;
193; RV32IA-LABEL: atomicrmw_add_i8_monotonic:
194; RV32IA: # %bb.0:
195; RV32IA-NEXT: slli a2, a0, 3
196; RV32IA-NEXT: andi a2, a2, 24
197; RV32IA-NEXT: addi a3, zero, 255
198; RV32IA-NEXT: sll a3, a3, a2
199; RV32IA-NEXT: andi a1, a1, 255
200; RV32IA-NEXT: sll a1, a1, a2
201; RV32IA-NEXT: andi a0, a0, -4
202; RV32IA-NEXT: .LBB5_1: # =>This Inner Loop Header: Depth=1
203; RV32IA-NEXT: lr.w a4, (a0)
204; RV32IA-NEXT: add a5, a4, a1
205; RV32IA-NEXT: xor a5, a4, a5
206; RV32IA-NEXT: and a5, a5, a3
207; RV32IA-NEXT: xor a5, a4, a5
208; RV32IA-NEXT: sc.w a5, a5, (a0)
209; RV32IA-NEXT: bnez a5, .LBB5_1
210; RV32IA-NEXT: # %bb.2:
211; RV32IA-NEXT: srl a0, a4, a2
212; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]213 %1 = atomicrmw add i8* %a, i8 %b monotonic
214 ret i8 %1
215}
216
217define i8 @atomicrmw_add_i8_acquire(i8 *%a, i8 %b) nounwind {
218; RV32I-LABEL: atomicrmw_add_i8_acquire:
219; RV32I: # %bb.0:
220; RV32I-NEXT: addi sp, sp, -16
221; RV32I-NEXT: sw ra, 12(sp)
222; RV32I-NEXT: addi a2, zero, 2
223; RV32I-NEXT: call __atomic_fetch_add_1
224; RV32I-NEXT: lw ra, 12(sp)
225; RV32I-NEXT: addi sp, sp, 16
226; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]227;
228; RV32IA-LABEL: atomicrmw_add_i8_acquire:
229; RV32IA: # %bb.0:
230; RV32IA-NEXT: slli a2, a0, 3
231; RV32IA-NEXT: andi a2, a2, 24
232; RV32IA-NEXT: addi a3, zero, 255
233; RV32IA-NEXT: sll a3, a3, a2
234; RV32IA-NEXT: andi a1, a1, 255
235; RV32IA-NEXT: sll a1, a1, a2
236; RV32IA-NEXT: andi a0, a0, -4
237; RV32IA-NEXT: .LBB6_1: # =>This Inner Loop Header: Depth=1
238; RV32IA-NEXT: lr.w.aq a4, (a0)
239; RV32IA-NEXT: add a5, a4, a1
240; RV32IA-NEXT: xor a5, a4, a5
241; RV32IA-NEXT: and a5, a5, a3
242; RV32IA-NEXT: xor a5, a4, a5
243; RV32IA-NEXT: sc.w a5, a5, (a0)
244; RV32IA-NEXT: bnez a5, .LBB6_1
245; RV32IA-NEXT: # %bb.2:
246; RV32IA-NEXT: srl a0, a4, a2
247; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]248 %1 = atomicrmw add i8* %a, i8 %b acquire
249 ret i8 %1
250}
251
252define i8 @atomicrmw_add_i8_release(i8 *%a, i8 %b) nounwind {
253; RV32I-LABEL: atomicrmw_add_i8_release:
254; RV32I: # %bb.0:
255; RV32I-NEXT: addi sp, sp, -16
256; RV32I-NEXT: sw ra, 12(sp)
257; RV32I-NEXT: addi a2, zero, 3
258; RV32I-NEXT: call __atomic_fetch_add_1
259; RV32I-NEXT: lw ra, 12(sp)
260; RV32I-NEXT: addi sp, sp, 16
261; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]262;
263; RV32IA-LABEL: atomicrmw_add_i8_release:
264; RV32IA: # %bb.0:
265; RV32IA-NEXT: slli a2, a0, 3
266; RV32IA-NEXT: andi a2, a2, 24
267; RV32IA-NEXT: addi a3, zero, 255
268; RV32IA-NEXT: sll a3, a3, a2
269; RV32IA-NEXT: andi a1, a1, 255
270; RV32IA-NEXT: sll a1, a1, a2
271; RV32IA-NEXT: andi a0, a0, -4
272; RV32IA-NEXT: .LBB7_1: # =>This Inner Loop Header: Depth=1
273; RV32IA-NEXT: lr.w a4, (a0)
274; RV32IA-NEXT: add a5, a4, a1
275; RV32IA-NEXT: xor a5, a4, a5
276; RV32IA-NEXT: and a5, a5, a3
277; RV32IA-NEXT: xor a5, a4, a5
278; RV32IA-NEXT: sc.w.rl a5, a5, (a0)
279; RV32IA-NEXT: bnez a5, .LBB7_1
280; RV32IA-NEXT: # %bb.2:
281; RV32IA-NEXT: srl a0, a4, a2
282; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]283 %1 = atomicrmw add i8* %a, i8 %b release
284 ret i8 %1
285}
286
287define i8 @atomicrmw_add_i8_acq_rel(i8 *%a, i8 %b) nounwind {
288; RV32I-LABEL: atomicrmw_add_i8_acq_rel:
289; RV32I: # %bb.0:
290; RV32I-NEXT: addi sp, sp, -16
291; RV32I-NEXT: sw ra, 12(sp)
292; RV32I-NEXT: addi a2, zero, 4
293; RV32I-NEXT: call __atomic_fetch_add_1
294; RV32I-NEXT: lw ra, 12(sp)
295; RV32I-NEXT: addi sp, sp, 16
296; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]297;
298; RV32IA-LABEL: atomicrmw_add_i8_acq_rel:
299; RV32IA: # %bb.0:
300; RV32IA-NEXT: slli a2, a0, 3
301; RV32IA-NEXT: andi a2, a2, 24
302; RV32IA-NEXT: addi a3, zero, 255
303; RV32IA-NEXT: sll a3, a3, a2
304; RV32IA-NEXT: andi a1, a1, 255
305; RV32IA-NEXT: sll a1, a1, a2
306; RV32IA-NEXT: andi a0, a0, -4
307; RV32IA-NEXT: .LBB8_1: # =>This Inner Loop Header: Depth=1
308; RV32IA-NEXT: lr.w.aq a4, (a0)
309; RV32IA-NEXT: add a5, a4, a1
310; RV32IA-NEXT: xor a5, a4, a5
311; RV32IA-NEXT: and a5, a5, a3
312; RV32IA-NEXT: xor a5, a4, a5
313; RV32IA-NEXT: sc.w.rl a5, a5, (a0)
314; RV32IA-NEXT: bnez a5, .LBB8_1
315; RV32IA-NEXT: # %bb.2:
316; RV32IA-NEXT: srl a0, a4, a2
317; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]318 %1 = atomicrmw add i8* %a, i8 %b acq_rel
319 ret i8 %1
320}
321
322define i8 @atomicrmw_add_i8_seq_cst(i8 *%a, i8 %b) nounwind {
323; RV32I-LABEL: atomicrmw_add_i8_seq_cst:
324; RV32I: # %bb.0:
325; RV32I-NEXT: addi sp, sp, -16
326; RV32I-NEXT: sw ra, 12(sp)
327; RV32I-NEXT: addi a2, zero, 5
328; RV32I-NEXT: call __atomic_fetch_add_1
329; RV32I-NEXT: lw ra, 12(sp)
330; RV32I-NEXT: addi sp, sp, 16
331; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]332;
333; RV32IA-LABEL: atomicrmw_add_i8_seq_cst:
334; RV32IA: # %bb.0:
335; RV32IA-NEXT: slli a2, a0, 3
336; RV32IA-NEXT: andi a2, a2, 24
337; RV32IA-NEXT: addi a3, zero, 255
338; RV32IA-NEXT: sll a3, a3, a2
339; RV32IA-NEXT: andi a1, a1, 255
340; RV32IA-NEXT: sll a1, a1, a2
341; RV32IA-NEXT: andi a0, a0, -4
342; RV32IA-NEXT: .LBB9_1: # =>This Inner Loop Header: Depth=1
343; RV32IA-NEXT: lr.w.aqrl a4, (a0)
344; RV32IA-NEXT: add a5, a4, a1
345; RV32IA-NEXT: xor a5, a4, a5
346; RV32IA-NEXT: and a5, a5, a3
347; RV32IA-NEXT: xor a5, a4, a5
348; RV32IA-NEXT: sc.w.aqrl a5, a5, (a0)
349; RV32IA-NEXT: bnez a5, .LBB9_1
350; RV32IA-NEXT: # %bb.2:
351; RV32IA-NEXT: srl a0, a4, a2
352; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]353 %1 = atomicrmw add i8* %a, i8 %b seq_cst
354 ret i8 %1
355}
356
357define i8 @atomicrmw_sub_i8_monotonic(i8* %a, i8 %b) {
358; RV32I-LABEL: atomicrmw_sub_i8_monotonic:
359; RV32I: # %bb.0:
360; RV32I-NEXT: addi sp, sp, -16
361; RV32I-NEXT: sw ra, 12(sp)
362; RV32I-NEXT: mv a2, zero
363; RV32I-NEXT: call __atomic_fetch_sub_1
364; RV32I-NEXT: lw ra, 12(sp)
365; RV32I-NEXT: addi sp, sp, 16
366; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]367;
368; RV32IA-LABEL: atomicrmw_sub_i8_monotonic:
369; RV32IA: # %bb.0:
370; RV32IA-NEXT: slli a2, a0, 3
371; RV32IA-NEXT: andi a2, a2, 24
372; RV32IA-NEXT: addi a3, zero, 255
373; RV32IA-NEXT: sll a3, a3, a2
374; RV32IA-NEXT: andi a1, a1, 255
375; RV32IA-NEXT: sll a1, a1, a2
376; RV32IA-NEXT: andi a0, a0, -4
377; RV32IA-NEXT: .LBB10_1: # =>This Inner Loop Header: Depth=1
378; RV32IA-NEXT: lr.w a4, (a0)
379; RV32IA-NEXT: sub a5, a4, a1
380; RV32IA-NEXT: xor a5, a4, a5
381; RV32IA-NEXT: and a5, a5, a3
382; RV32IA-NEXT: xor a5, a4, a5
383; RV32IA-NEXT: sc.w a5, a5, (a0)
384; RV32IA-NEXT: bnez a5, .LBB10_1
385; RV32IA-NEXT: # %bb.2:
386; RV32IA-NEXT: srl a0, a4, a2
387; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]388 %1 = atomicrmw sub i8* %a, i8 %b monotonic
389 ret i8 %1
390}
391
392define i8 @atomicrmw_sub_i8_acquire(i8* %a, i8 %b) {
393; RV32I-LABEL: atomicrmw_sub_i8_acquire:
394; RV32I: # %bb.0:
395; RV32I-NEXT: addi sp, sp, -16
396; RV32I-NEXT: sw ra, 12(sp)
397; RV32I-NEXT: addi a2, zero, 2
398; RV32I-NEXT: call __atomic_fetch_sub_1
399; RV32I-NEXT: lw ra, 12(sp)
400; RV32I-NEXT: addi sp, sp, 16
401; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]402;
403; RV32IA-LABEL: atomicrmw_sub_i8_acquire:
404; RV32IA: # %bb.0:
405; RV32IA-NEXT: slli a2, a0, 3
406; RV32IA-NEXT: andi a2, a2, 24
407; RV32IA-NEXT: addi a3, zero, 255
408; RV32IA-NEXT: sll a3, a3, a2
409; RV32IA-NEXT: andi a1, a1, 255
410; RV32IA-NEXT: sll a1, a1, a2
411; RV32IA-NEXT: andi a0, a0, -4
412; RV32IA-NEXT: .LBB11_1: # =>This Inner Loop Header: Depth=1
413; RV32IA-NEXT: lr.w.aq a4, (a0)
414; RV32IA-NEXT: sub a5, a4, a1
415; RV32IA-NEXT: xor a5, a4, a5
416; RV32IA-NEXT: and a5, a5, a3
417; RV32IA-NEXT: xor a5, a4, a5
418; RV32IA-NEXT: sc.w a5, a5, (a0)
419; RV32IA-NEXT: bnez a5, .LBB11_1
420; RV32IA-NEXT: # %bb.2:
421; RV32IA-NEXT: srl a0, a4, a2
422; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]423 %1 = atomicrmw sub i8* %a, i8 %b acquire
424 ret i8 %1
425}
426
427define i8 @atomicrmw_sub_i8_release(i8* %a, i8 %b) {
428; RV32I-LABEL: atomicrmw_sub_i8_release:
429; RV32I: # %bb.0:
430; RV32I-NEXT: addi sp, sp, -16
431; RV32I-NEXT: sw ra, 12(sp)
432; RV32I-NEXT: addi a2, zero, 3
433; RV32I-NEXT: call __atomic_fetch_sub_1
434; RV32I-NEXT: lw ra, 12(sp)
435; RV32I-NEXT: addi sp, sp, 16
436; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]437;
438; RV32IA-LABEL: atomicrmw_sub_i8_release:
439; RV32IA: # %bb.0:
440; RV32IA-NEXT: slli a2, a0, 3
441; RV32IA-NEXT: andi a2, a2, 24
442; RV32IA-NEXT: addi a3, zero, 255
443; RV32IA-NEXT: sll a3, a3, a2
444; RV32IA-NEXT: andi a1, a1, 255
445; RV32IA-NEXT: sll a1, a1, a2
446; RV32IA-NEXT: andi a0, a0, -4
447; RV32IA-NEXT: .LBB12_1: # =>This Inner Loop Header: Depth=1
448; RV32IA-NEXT: lr.w a4, (a0)
449; RV32IA-NEXT: sub a5, a4, a1
450; RV32IA-NEXT: xor a5, a4, a5
451; RV32IA-NEXT: and a5, a5, a3
452; RV32IA-NEXT: xor a5, a4, a5
453; RV32IA-NEXT: sc.w.rl a5, a5, (a0)
454; RV32IA-NEXT: bnez a5, .LBB12_1
455; RV32IA-NEXT: # %bb.2:
456; RV32IA-NEXT: srl a0, a4, a2
457; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]458 %1 = atomicrmw sub i8* %a, i8 %b release
459 ret i8 %1
460}
461
462define i8 @atomicrmw_sub_i8_acq_rel(i8* %a, i8 %b) {
463; RV32I-LABEL: atomicrmw_sub_i8_acq_rel:
464; RV32I: # %bb.0:
465; RV32I-NEXT: addi sp, sp, -16
466; RV32I-NEXT: sw ra, 12(sp)
467; RV32I-NEXT: addi a2, zero, 4
468; RV32I-NEXT: call __atomic_fetch_sub_1
469; RV32I-NEXT: lw ra, 12(sp)
470; RV32I-NEXT: addi sp, sp, 16
471; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]472;
473; RV32IA-LABEL: atomicrmw_sub_i8_acq_rel:
474; RV32IA: # %bb.0:
475; RV32IA-NEXT: slli a2, a0, 3
476; RV32IA-NEXT: andi a2, a2, 24
477; RV32IA-NEXT: addi a3, zero, 255
478; RV32IA-NEXT: sll a3, a3, a2
479; RV32IA-NEXT: andi a1, a1, 255
480; RV32IA-NEXT: sll a1, a1, a2
481; RV32IA-NEXT: andi a0, a0, -4
482; RV32IA-NEXT: .LBB13_1: # =>This Inner Loop Header: Depth=1
483; RV32IA-NEXT: lr.w.aq a4, (a0)
484; RV32IA-NEXT: sub a5, a4, a1
485; RV32IA-NEXT: xor a5, a4, a5
486; RV32IA-NEXT: and a5, a5, a3
487; RV32IA-NEXT: xor a5, a4, a5
488; RV32IA-NEXT: sc.w.rl a5, a5, (a0)
489; RV32IA-NEXT: bnez a5, .LBB13_1
490; RV32IA-NEXT: # %bb.2:
491; RV32IA-NEXT: srl a0, a4, a2
492; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]493 %1 = atomicrmw sub i8* %a, i8 %b acq_rel
494 ret i8 %1
495}
496
497define i8 @atomicrmw_sub_i8_seq_cst(i8* %a, i8 %b) {
498; RV32I-LABEL: atomicrmw_sub_i8_seq_cst:
499; RV32I: # %bb.0:
500; RV32I-NEXT: addi sp, sp, -16
501; RV32I-NEXT: sw ra, 12(sp)
502; RV32I-NEXT: addi a2, zero, 5
503; RV32I-NEXT: call __atomic_fetch_sub_1
504; RV32I-NEXT: lw ra, 12(sp)
505; RV32I-NEXT: addi sp, sp, 16
506; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]507;
508; RV32IA-LABEL: atomicrmw_sub_i8_seq_cst:
509; RV32IA: # %bb.0:
510; RV32IA-NEXT: slli a2, a0, 3
511; RV32IA-NEXT: andi a2, a2, 24
512; RV32IA-NEXT: addi a3, zero, 255
513; RV32IA-NEXT: sll a3, a3, a2
514; RV32IA-NEXT: andi a1, a1, 255
515; RV32IA-NEXT: sll a1, a1, a2
516; RV32IA-NEXT: andi a0, a0, -4
517; RV32IA-NEXT: .LBB14_1: # =>This Inner Loop Header: Depth=1
518; RV32IA-NEXT: lr.w.aqrl a4, (a0)
519; RV32IA-NEXT: sub a5, a4, a1
520; RV32IA-NEXT: xor a5, a4, a5
521; RV32IA-NEXT: and a5, a5, a3
522; RV32IA-NEXT: xor a5, a4, a5
523; RV32IA-NEXT: sc.w.aqrl a5, a5, (a0)
524; RV32IA-NEXT: bnez a5, .LBB14_1
525; RV32IA-NEXT: # %bb.2:
526; RV32IA-NEXT: srl a0, a4, a2
527; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]528 %1 = atomicrmw sub i8* %a, i8 %b seq_cst
529 ret i8 %1
530}
531
532define i8 @atomicrmw_and_i8_monotonic(i8 *%a, i8 %b) nounwind {
533; RV32I-LABEL: atomicrmw_and_i8_monotonic:
534; RV32I: # %bb.0:
535; RV32I-NEXT: addi sp, sp, -16
536; RV32I-NEXT: sw ra, 12(sp)
537; RV32I-NEXT: mv a2, zero
538; RV32I-NEXT: call __atomic_fetch_and_1
539; RV32I-NEXT: lw ra, 12(sp)
540; RV32I-NEXT: addi sp, sp, 16
541; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]542;
543; RV32IA-LABEL: atomicrmw_and_i8_monotonic:
544; RV32IA: # %bb.0:
545; RV32IA-NEXT: andi a1, a1, 255
546; RV32IA-NEXT: slli a2, a0, 3
547; RV32IA-NEXT: andi a2, a2, 24
548; RV32IA-NEXT: sll a1, a1, a2
549; RV32IA-NEXT: addi a3, zero, 255
550; RV32IA-NEXT: sll a3, a3, a2
551; RV32IA-NEXT: not a3, a3
552; RV32IA-NEXT: or a1, a3, a1
553; RV32IA-NEXT: andi a0, a0, -4
554; RV32IA-NEXT: amoand.w a0, a1, (a0)
555; RV32IA-NEXT: srl a0, a0, a2
556; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]557 %1 = atomicrmw and i8* %a, i8 %b monotonic
558 ret i8 %1
559}
560
561define i8 @atomicrmw_and_i8_acquire(i8 *%a, i8 %b) nounwind {
562; RV32I-LABEL: atomicrmw_and_i8_acquire:
563; RV32I: # %bb.0:
564; RV32I-NEXT: addi sp, sp, -16
565; RV32I-NEXT: sw ra, 12(sp)
566; RV32I-NEXT: addi a2, zero, 2
567; RV32I-NEXT: call __atomic_fetch_and_1
568; RV32I-NEXT: lw ra, 12(sp)
569; RV32I-NEXT: addi sp, sp, 16
570; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]571;
572; RV32IA-LABEL: atomicrmw_and_i8_acquire:
573; RV32IA: # %bb.0:
574; RV32IA-NEXT: andi a1, a1, 255
575; RV32IA-NEXT: slli a2, a0, 3
576; RV32IA-NEXT: andi a2, a2, 24
577; RV32IA-NEXT: sll a1, a1, a2
578; RV32IA-NEXT: addi a3, zero, 255
579; RV32IA-NEXT: sll a3, a3, a2
580; RV32IA-NEXT: not a3, a3
581; RV32IA-NEXT: or a1, a3, a1
582; RV32IA-NEXT: andi a0, a0, -4
583; RV32IA-NEXT: amoand.w.aq a0, a1, (a0)
584; RV32IA-NEXT: srl a0, a0, a2
585; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]586 %1 = atomicrmw and i8* %a, i8 %b acquire
587 ret i8 %1
588}
589
590define i8 @atomicrmw_and_i8_release(i8 *%a, i8 %b) nounwind {
591; RV32I-LABEL: atomicrmw_and_i8_release:
592; RV32I: # %bb.0:
593; RV32I-NEXT: addi sp, sp, -16
594; RV32I-NEXT: sw ra, 12(sp)
595; RV32I-NEXT: addi a2, zero, 3
596; RV32I-NEXT: call __atomic_fetch_and_1
597; RV32I-NEXT: lw ra, 12(sp)
598; RV32I-NEXT: addi sp, sp, 16
599; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]600;
601; RV32IA-LABEL: atomicrmw_and_i8_release:
602; RV32IA: # %bb.0:
603; RV32IA-NEXT: andi a1, a1, 255
604; RV32IA-NEXT: slli a2, a0, 3
605; RV32IA-NEXT: andi a2, a2, 24
606; RV32IA-NEXT: sll a1, a1, a2
607; RV32IA-NEXT: addi a3, zero, 255
608; RV32IA-NEXT: sll a3, a3, a2
609; RV32IA-NEXT: not a3, a3
610; RV32IA-NEXT: or a1, a3, a1
611; RV32IA-NEXT: andi a0, a0, -4
612; RV32IA-NEXT: amoand.w.rl a0, a1, (a0)
613; RV32IA-NEXT: srl a0, a0, a2
614; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]615 %1 = atomicrmw and i8* %a, i8 %b release
616 ret i8 %1
617}
618
619define i8 @atomicrmw_and_i8_acq_rel(i8 *%a, i8 %b) nounwind {
620; RV32I-LABEL: atomicrmw_and_i8_acq_rel:
621; RV32I: # %bb.0:
622; RV32I-NEXT: addi sp, sp, -16
623; RV32I-NEXT: sw ra, 12(sp)
624; RV32I-NEXT: addi a2, zero, 4
625; RV32I-NEXT: call __atomic_fetch_and_1
626; RV32I-NEXT: lw ra, 12(sp)
627; RV32I-NEXT: addi sp, sp, 16
628; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]629;
630; RV32IA-LABEL: atomicrmw_and_i8_acq_rel:
631; RV32IA: # %bb.0:
632; RV32IA-NEXT: andi a1, a1, 255
633; RV32IA-NEXT: slli a2, a0, 3
634; RV32IA-NEXT: andi a2, a2, 24
635; RV32IA-NEXT: sll a1, a1, a2
636; RV32IA-NEXT: addi a3, zero, 255
637; RV32IA-NEXT: sll a3, a3, a2
638; RV32IA-NEXT: not a3, a3
639; RV32IA-NEXT: or a1, a3, a1
640; RV32IA-NEXT: andi a0, a0, -4
641; RV32IA-NEXT: amoand.w.aqrl a0, a1, (a0)
642; RV32IA-NEXT: srl a0, a0, a2
643; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]644 %1 = atomicrmw and i8* %a, i8 %b acq_rel
645 ret i8 %1
646}
647
648define i8 @atomicrmw_and_i8_seq_cst(i8 *%a, i8 %b) nounwind {
649; RV32I-LABEL: atomicrmw_and_i8_seq_cst:
650; RV32I: # %bb.0:
651; RV32I-NEXT: addi sp, sp, -16
652; RV32I-NEXT: sw ra, 12(sp)
653; RV32I-NEXT: addi a2, zero, 5
654; RV32I-NEXT: call __atomic_fetch_and_1
655; RV32I-NEXT: lw ra, 12(sp)
656; RV32I-NEXT: addi sp, sp, 16
657; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]658;
659; RV32IA-LABEL: atomicrmw_and_i8_seq_cst:
660; RV32IA: # %bb.0:
661; RV32IA-NEXT: andi a1, a1, 255
662; RV32IA-NEXT: slli a2, a0, 3
663; RV32IA-NEXT: andi a2, a2, 24
664; RV32IA-NEXT: sll a1, a1, a2
665; RV32IA-NEXT: addi a3, zero, 255
666; RV32IA-NEXT: sll a3, a3, a2
667; RV32IA-NEXT: not a3, a3
668; RV32IA-NEXT: or a1, a3, a1
669; RV32IA-NEXT: andi a0, a0, -4
670; RV32IA-NEXT: amoand.w.aqrl a0, a1, (a0)
671; RV32IA-NEXT: srl a0, a0, a2
672; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]673 %1 = atomicrmw and i8* %a, i8 %b seq_cst
674 ret i8 %1
675}
676
677define i8 @atomicrmw_nand_i8_monotonic(i8* %a, i8 %b) {
678; RV32I-LABEL: atomicrmw_nand_i8_monotonic:
679; RV32I: # %bb.0:
680; RV32I-NEXT: addi sp, sp, -16
681; RV32I-NEXT: sw ra, 12(sp)
682; RV32I-NEXT: mv a2, zero
683; RV32I-NEXT: call __atomic_fetch_nand_1
684; RV32I-NEXT: lw ra, 12(sp)
685; RV32I-NEXT: addi sp, sp, 16
686; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]687;
688; RV32IA-LABEL: atomicrmw_nand_i8_monotonic:
689; RV32IA: # %bb.0:
690; RV32IA-NEXT: slli a2, a0, 3
691; RV32IA-NEXT: andi a2, a2, 24
692; RV32IA-NEXT: addi a3, zero, 255
693; RV32IA-NEXT: sll a3, a3, a2
694; RV32IA-NEXT: andi a1, a1, 255
695; RV32IA-NEXT: sll a1, a1, a2
696; RV32IA-NEXT: andi a0, a0, -4
697; RV32IA-NEXT: .LBB20_1: # =>This Inner Loop Header: Depth=1
698; RV32IA-NEXT: lr.w a4, (a0)
699; RV32IA-NEXT: and a5, a4, a1
700; RV32IA-NEXT: not a5, a5
701; RV32IA-NEXT: xor a5, a4, a5
702; RV32IA-NEXT: and a5, a5, a3
703; RV32IA-NEXT: xor a5, a4, a5
704; RV32IA-NEXT: sc.w a5, a5, (a0)
705; RV32IA-NEXT: bnez a5, .LBB20_1
706; RV32IA-NEXT: # %bb.2:
707; RV32IA-NEXT: srl a0, a4, a2
708; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]709 %1 = atomicrmw nand i8* %a, i8 %b monotonic
710 ret i8 %1
711}
712
713define i8 @atomicrmw_nand_i8_acquire(i8* %a, i8 %b) {
714; RV32I-LABEL: atomicrmw_nand_i8_acquire:
715; RV32I: # %bb.0:
716; RV32I-NEXT: addi sp, sp, -16
717; RV32I-NEXT: sw ra, 12(sp)
718; RV32I-NEXT: addi a2, zero, 2
719; RV32I-NEXT: call __atomic_fetch_nand_1
720; RV32I-NEXT: lw ra, 12(sp)
721; RV32I-NEXT: addi sp, sp, 16
722; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]723;
724; RV32IA-LABEL: atomicrmw_nand_i8_acquire:
725; RV32IA: # %bb.0:
726; RV32IA-NEXT: slli a2, a0, 3
727; RV32IA-NEXT: andi a2, a2, 24
728; RV32IA-NEXT: addi a3, zero, 255
729; RV32IA-NEXT: sll a3, a3, a2
730; RV32IA-NEXT: andi a1, a1, 255
731; RV32IA-NEXT: sll a1, a1, a2
732; RV32IA-NEXT: andi a0, a0, -4
733; RV32IA-NEXT: .LBB21_1: # =>This Inner Loop Header: Depth=1
734; RV32IA-NEXT: lr.w.aq a4, (a0)
735; RV32IA-NEXT: and a5, a4, a1
736; RV32IA-NEXT: not a5, a5
737; RV32IA-NEXT: xor a5, a4, a5
738; RV32IA-NEXT: and a5, a5, a3
739; RV32IA-NEXT: xor a5, a4, a5
740; RV32IA-NEXT: sc.w a5, a5, (a0)
741; RV32IA-NEXT: bnez a5, .LBB21_1
742; RV32IA-NEXT: # %bb.2:
743; RV32IA-NEXT: srl a0, a4, a2
744; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]745 %1 = atomicrmw nand i8* %a, i8 %b acquire
746 ret i8 %1
747}
748
749define i8 @atomicrmw_nand_i8_release(i8* %a, i8 %b) {
750; RV32I-LABEL: atomicrmw_nand_i8_release:
751; RV32I: # %bb.0:
752; RV32I-NEXT: addi sp, sp, -16
753; RV32I-NEXT: sw ra, 12(sp)
754; RV32I-NEXT: addi a2, zero, 3
755; RV32I-NEXT: call __atomic_fetch_nand_1
756; RV32I-NEXT: lw ra, 12(sp)
757; RV32I-NEXT: addi sp, sp, 16
758; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]759;
760; RV32IA-LABEL: atomicrmw_nand_i8_release:
761; RV32IA: # %bb.0:
762; RV32IA-NEXT: slli a2, a0, 3
763; RV32IA-NEXT: andi a2, a2, 24
764; RV32IA-NEXT: addi a3, zero, 255
765; RV32IA-NEXT: sll a3, a3, a2
766; RV32IA-NEXT: andi a1, a1, 255
767; RV32IA-NEXT: sll a1, a1, a2
768; RV32IA-NEXT: andi a0, a0, -4
769; RV32IA-NEXT: .LBB22_1: # =>This Inner Loop Header: Depth=1
770; RV32IA-NEXT: lr.w a4, (a0)
771; RV32IA-NEXT: and a5, a4, a1
772; RV32IA-NEXT: not a5, a5
773; RV32IA-NEXT: xor a5, a4, a5
774; RV32IA-NEXT: and a5, a5, a3
775; RV32IA-NEXT: xor a5, a4, a5
776; RV32IA-NEXT: sc.w.rl a5, a5, (a0)
777; RV32IA-NEXT: bnez a5, .LBB22_1
778; RV32IA-NEXT: # %bb.2:
779; RV32IA-NEXT: srl a0, a4, a2
780; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]781 %1 = atomicrmw nand i8* %a, i8 %b release
782 ret i8 %1
783}
784
785define i8 @atomicrmw_nand_i8_acq_rel(i8* %a, i8 %b) {
786; RV32I-LABEL: atomicrmw_nand_i8_acq_rel:
787; RV32I: # %bb.0:
788; RV32I-NEXT: addi sp, sp, -16
789; RV32I-NEXT: sw ra, 12(sp)
790; RV32I-NEXT: addi a2, zero, 4
791; RV32I-NEXT: call __atomic_fetch_nand_1
792; RV32I-NEXT: lw ra, 12(sp)
793; RV32I-NEXT: addi sp, sp, 16
794; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]795;
796; RV32IA-LABEL: atomicrmw_nand_i8_acq_rel:
797; RV32IA: # %bb.0:
798; RV32IA-NEXT: slli a2, a0, 3
799; RV32IA-NEXT: andi a2, a2, 24
800; RV32IA-NEXT: addi a3, zero, 255
801; RV32IA-NEXT: sll a3, a3, a2
802; RV32IA-NEXT: andi a1, a1, 255
803; RV32IA-NEXT: sll a1, a1, a2
804; RV32IA-NEXT: andi a0, a0, -4
805; RV32IA-NEXT: .LBB23_1: # =>This Inner Loop Header: Depth=1
806; RV32IA-NEXT: lr.w.aq a4, (a0)
807; RV32IA-NEXT: and a5, a4, a1
808; RV32IA-NEXT: not a5, a5
809; RV32IA-NEXT: xor a5, a4, a5
810; RV32IA-NEXT: and a5, a5, a3
811; RV32IA-NEXT: xor a5, a4, a5
812; RV32IA-NEXT: sc.w.rl a5, a5, (a0)
813; RV32IA-NEXT: bnez a5, .LBB23_1
814; RV32IA-NEXT: # %bb.2:
815; RV32IA-NEXT: srl a0, a4, a2
816; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]817 %1 = atomicrmw nand i8* %a, i8 %b acq_rel
818 ret i8 %1
819}
820
821define i8 @atomicrmw_nand_i8_seq_cst(i8* %a, i8 %b) {
822; RV32I-LABEL: atomicrmw_nand_i8_seq_cst:
823; RV32I: # %bb.0:
824; RV32I-NEXT: addi sp, sp, -16
825; RV32I-NEXT: sw ra, 12(sp)
826; RV32I-NEXT: addi a2, zero, 5
827; RV32I-NEXT: call __atomic_fetch_nand_1
828; RV32I-NEXT: lw ra, 12(sp)
829; RV32I-NEXT: addi sp, sp, 16
830; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]831;
832; RV32IA-LABEL: atomicrmw_nand_i8_seq_cst:
833; RV32IA: # %bb.0:
834; RV32IA-NEXT: slli a2, a0, 3
835; RV32IA-NEXT: andi a2, a2, 24
836; RV32IA-NEXT: addi a3, zero, 255
837; RV32IA-NEXT: sll a3, a3, a2
838; RV32IA-NEXT: andi a1, a1, 255
839; RV32IA-NEXT: sll a1, a1, a2
840; RV32IA-NEXT: andi a0, a0, -4
841; RV32IA-NEXT: .LBB24_1: # =>This Inner Loop Header: Depth=1
842; RV32IA-NEXT: lr.w.aqrl a4, (a0)
843; RV32IA-NEXT: and a5, a4, a1
844; RV32IA-NEXT: not a5, a5
845; RV32IA-NEXT: xor a5, a4, a5
846; RV32IA-NEXT: and a5, a5, a3
847; RV32IA-NEXT: xor a5, a4, a5
848; RV32IA-NEXT: sc.w.aqrl a5, a5, (a0)
849; RV32IA-NEXT: bnez a5, .LBB24_1
850; RV32IA-NEXT: # %bb.2:
851; RV32IA-NEXT: srl a0, a4, a2
852; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]853 %1 = atomicrmw nand i8* %a, i8 %b seq_cst
854 ret i8 %1
855}
856
857define i8 @atomicrmw_or_i8_monotonic(i8 *%a, i8 %b) nounwind {
858; RV32I-LABEL: atomicrmw_or_i8_monotonic:
859; RV32I: # %bb.0:
860; RV32I-NEXT: addi sp, sp, -16
861; RV32I-NEXT: sw ra, 12(sp)
862; RV32I-NEXT: mv a2, zero
863; RV32I-NEXT: call __atomic_fetch_or_1
864; RV32I-NEXT: lw ra, 12(sp)
865; RV32I-NEXT: addi sp, sp, 16
866; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]867;
868; RV32IA-LABEL: atomicrmw_or_i8_monotonic:
869; RV32IA: # %bb.0:
870; RV32IA-NEXT: andi a1, a1, 255
871; RV32IA-NEXT: slli a2, a0, 3
872; RV32IA-NEXT: andi a2, a2, 24
873; RV32IA-NEXT: sll a1, a1, a2
874; RV32IA-NEXT: andi a0, a0, -4
875; RV32IA-NEXT: amoor.w a0, a1, (a0)
876; RV32IA-NEXT: srl a0, a0, a2
877; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]878 %1 = atomicrmw or i8* %a, i8 %b monotonic
879 ret i8 %1
880}
881
882define i8 @atomicrmw_or_i8_acquire(i8 *%a, i8 %b) nounwind {
883; RV32I-LABEL: atomicrmw_or_i8_acquire:
884; RV32I: # %bb.0:
885; RV32I-NEXT: addi sp, sp, -16
886; RV32I-NEXT: sw ra, 12(sp)
887; RV32I-NEXT: addi a2, zero, 2
888; RV32I-NEXT: call __atomic_fetch_or_1
889; RV32I-NEXT: lw ra, 12(sp)
890; RV32I-NEXT: addi sp, sp, 16
891; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]892;
893; RV32IA-LABEL: atomicrmw_or_i8_acquire:
894; RV32IA: # %bb.0:
895; RV32IA-NEXT: andi a1, a1, 255
896; RV32IA-NEXT: slli a2, a0, 3
897; RV32IA-NEXT: andi a2, a2, 24
898; RV32IA-NEXT: sll a1, a1, a2
899; RV32IA-NEXT: andi a0, a0, -4
900; RV32IA-NEXT: amoor.w.aq a0, a1, (a0)
901; RV32IA-NEXT: srl a0, a0, a2
902; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]903 %1 = atomicrmw or i8* %a, i8 %b acquire
904 ret i8 %1
905}
906
907define i8 @atomicrmw_or_i8_release(i8 *%a, i8 %b) nounwind {
908; RV32I-LABEL: atomicrmw_or_i8_release:
909; RV32I: # %bb.0:
910; RV32I-NEXT: addi sp, sp, -16
911; RV32I-NEXT: sw ra, 12(sp)
912; RV32I-NEXT: addi a2, zero, 3
913; RV32I-NEXT: call __atomic_fetch_or_1
914; RV32I-NEXT: lw ra, 12(sp)
915; RV32I-NEXT: addi sp, sp, 16
916; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]917;
918; RV32IA-LABEL: atomicrmw_or_i8_release:
919; RV32IA: # %bb.0:
920; RV32IA-NEXT: andi a1, a1, 255
921; RV32IA-NEXT: slli a2, a0, 3
922; RV32IA-NEXT: andi a2, a2, 24
923; RV32IA-NEXT: sll a1, a1, a2
924; RV32IA-NEXT: andi a0, a0, -4
925; RV32IA-NEXT: amoor.w.rl a0, a1, (a0)
926; RV32IA-NEXT: srl a0, a0, a2
927; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]928 %1 = atomicrmw or i8* %a, i8 %b release
929 ret i8 %1
930}
931
932define i8 @atomicrmw_or_i8_acq_rel(i8 *%a, i8 %b) nounwind {
933; RV32I-LABEL: atomicrmw_or_i8_acq_rel:
934; RV32I: # %bb.0:
935; RV32I-NEXT: addi sp, sp, -16
936; RV32I-NEXT: sw ra, 12(sp)
937; RV32I-NEXT: addi a2, zero, 4
938; RV32I-NEXT: call __atomic_fetch_or_1
939; RV32I-NEXT: lw ra, 12(sp)
940; RV32I-NEXT: addi sp, sp, 16
941; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]942;
943; RV32IA-LABEL: atomicrmw_or_i8_acq_rel:
944; RV32IA: # %bb.0:
945; RV32IA-NEXT: andi a1, a1, 255
946; RV32IA-NEXT: slli a2, a0, 3
947; RV32IA-NEXT: andi a2, a2, 24
948; RV32IA-NEXT: sll a1, a1, a2
949; RV32IA-NEXT: andi a0, a0, -4
950; RV32IA-NEXT: amoor.w.aqrl a0, a1, (a0)
951; RV32IA-NEXT: srl a0, a0, a2
952; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]953 %1 = atomicrmw or i8* %a, i8 %b acq_rel
954 ret i8 %1
955}
956
957define i8 @atomicrmw_or_i8_seq_cst(i8 *%a, i8 %b) nounwind {
958; RV32I-LABEL: atomicrmw_or_i8_seq_cst:
959; RV32I: # %bb.0:
960; RV32I-NEXT: addi sp, sp, -16
961; RV32I-NEXT: sw ra, 12(sp)
962; RV32I-NEXT: addi a2, zero, 5
963; RV32I-NEXT: call __atomic_fetch_or_1
964; RV32I-NEXT: lw ra, 12(sp)
965; RV32I-NEXT: addi sp, sp, 16
966; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]967;
968; RV32IA-LABEL: atomicrmw_or_i8_seq_cst:
969; RV32IA: # %bb.0:
970; RV32IA-NEXT: andi a1, a1, 255
971; RV32IA-NEXT: slli a2, a0, 3
972; RV32IA-NEXT: andi a2, a2, 24
973; RV32IA-NEXT: sll a1, a1, a2
974; RV32IA-NEXT: andi a0, a0, -4
975; RV32IA-NEXT: amoor.w.aqrl a0, a1, (a0)
976; RV32IA-NEXT: srl a0, a0, a2
977; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]978 %1 = atomicrmw or i8* %a, i8 %b seq_cst
979 ret i8 %1
980}
981
982define i8 @atomicrmw_xor_i8_monotonic(i8 *%a, i8 %b) nounwind {
983; RV32I-LABEL: atomicrmw_xor_i8_monotonic:
984; RV32I: # %bb.0:
985; RV32I-NEXT: addi sp, sp, -16
986; RV32I-NEXT: sw ra, 12(sp)
987; RV32I-NEXT: mv a2, zero
988; RV32I-NEXT: call __atomic_fetch_xor_1
989; RV32I-NEXT: lw ra, 12(sp)
990; RV32I-NEXT: addi sp, sp, 16
991; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]992;
993; RV32IA-LABEL: atomicrmw_xor_i8_monotonic:
994; RV32IA: # %bb.0:
995; RV32IA-NEXT: andi a1, a1, 255
996; RV32IA-NEXT: slli a2, a0, 3
997; RV32IA-NEXT: andi a2, a2, 24
998; RV32IA-NEXT: sll a1, a1, a2
999; RV32IA-NEXT: andi a0, a0, -4
1000; RV32IA-NEXT: amoxor.w a0, a1, (a0)
1001; RV32IA-NEXT: srl a0, a0, a2
1002; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]1003 %1 = atomicrmw xor i8* %a, i8 %b monotonic
1004 ret i8 %1
1005}
1006
1007define i8 @atomicrmw_xor_i8_acquire(i8 *%a, i8 %b) nounwind {
1008; RV32I-LABEL: atomicrmw_xor_i8_acquire:
1009; RV32I: # %bb.0:
1010; RV32I-NEXT: addi sp, sp, -16
1011; RV32I-NEXT: sw ra, 12(sp)
1012; RV32I-NEXT: addi a2, zero, 2
1013; RV32I-NEXT: call __atomic_fetch_xor_1
1014; RV32I-NEXT: lw ra, 12(sp)
1015; RV32I-NEXT: addi sp, sp, 16
1016; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]1017;
1018; RV32IA-LABEL: atomicrmw_xor_i8_acquire:
1019; RV32IA: # %bb.0:
1020; RV32IA-NEXT: andi a1, a1, 255
1021; RV32IA-NEXT: slli a2, a0, 3
1022; RV32IA-NEXT: andi a2, a2, 24
1023; RV32IA-NEXT: sll a1, a1, a2
1024; RV32IA-NEXT: andi a0, a0, -4
1025; RV32IA-NEXT: amoxor.w.aq a0, a1, (a0)
1026; RV32IA-NEXT: srl a0, a0, a2
1027; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]1028 %1 = atomicrmw xor i8* %a, i8 %b acquire
1029 ret i8 %1
1030}
1031
1032define i8 @atomicrmw_xor_i8_release(i8 *%a, i8 %b) nounwind {
1033; RV32I-LABEL: atomicrmw_xor_i8_release:
1034; RV32I: # %bb.0:
1035; RV32I-NEXT: addi sp, sp, -16
1036; RV32I-NEXT: sw ra, 12(sp)
1037; RV32I-NEXT: addi a2, zero, 3
1038; RV32I-NEXT: call __atomic_fetch_xor_1
1039; RV32I-NEXT: lw ra, 12(sp)
1040; RV32I-NEXT: addi sp, sp, 16
1041; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]1042;
1043; RV32IA-LABEL: atomicrmw_xor_i8_release:
1044; RV32IA: # %bb.0:
1045; RV32IA-NEXT: andi a1, a1, 255
1046; RV32IA-NEXT: slli a2, a0, 3
1047; RV32IA-NEXT: andi a2, a2, 24
1048; RV32IA-NEXT: sll a1, a1, a2
1049; RV32IA-NEXT: andi a0, a0, -4
1050; RV32IA-NEXT: amoxor.w.rl a0, a1, (a0)
1051; RV32IA-NEXT: srl a0, a0, a2
1052; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]1053 %1 = atomicrmw xor i8* %a, i8 %b release
1054 ret i8 %1
1055}
1056
1057define i8 @atomicrmw_xor_i8_acq_rel(i8 *%a, i8 %b) nounwind {
1058; RV32I-LABEL: atomicrmw_xor_i8_acq_rel:
1059; RV32I: # %bb.0:
1060; RV32I-NEXT: addi sp, sp, -16
1061; RV32I-NEXT: sw ra, 12(sp)
1062; RV32I-NEXT: addi a2, zero, 4
1063; RV32I-NEXT: call __atomic_fetch_xor_1
1064; RV32I-NEXT: lw ra, 12(sp)
1065; RV32I-NEXT: addi sp, sp, 16
1066; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]1067;
1068; RV32IA-LABEL: atomicrmw_xor_i8_acq_rel:
1069; RV32IA: # %bb.0:
1070; RV32IA-NEXT: andi a1, a1, 255
1071; RV32IA-NEXT: slli a2, a0, 3
1072; RV32IA-NEXT: andi a2, a2, 24
1073; RV32IA-NEXT: sll a1, a1, a2
1074; RV32IA-NEXT: andi a0, a0, -4
1075; RV32IA-NEXT: amoxor.w.aqrl a0, a1, (a0)
1076; RV32IA-NEXT: srl a0, a0, a2
1077; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]1078 %1 = atomicrmw xor i8* %a, i8 %b acq_rel
1079 ret i8 %1
1080}
1081
1082define i8 @atomicrmw_xor_i8_seq_cst(i8 *%a, i8 %b) nounwind {
1083; RV32I-LABEL: atomicrmw_xor_i8_seq_cst:
1084; RV32I: # %bb.0:
1085; RV32I-NEXT: addi sp, sp, -16
1086; RV32I-NEXT: sw ra, 12(sp)
1087; RV32I-NEXT: addi a2, zero, 5
1088; RV32I-NEXT: call __atomic_fetch_xor_1
1089; RV32I-NEXT: lw ra, 12(sp)
1090; RV32I-NEXT: addi sp, sp, 16
1091; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]1092;
1093; RV32IA-LABEL: atomicrmw_xor_i8_seq_cst:
1094; RV32IA: # %bb.0:
1095; RV32IA-NEXT: andi a1, a1, 255
1096; RV32IA-NEXT: slli a2, a0, 3
1097; RV32IA-NEXT: andi a2, a2, 24
1098; RV32IA-NEXT: sll a1, a1, a2
1099; RV32IA-NEXT: andi a0, a0, -4
1100; RV32IA-NEXT: amoxor.w.aqrl a0, a1, (a0)
1101; RV32IA-NEXT: srl a0, a0, a2
1102; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]1103 %1 = atomicrmw xor i8* %a, i8 %b seq_cst
1104 ret i8 %1
1105}
1106
1107define i8 @atomicrmw_max_i8_monotonic(i8 *%a, i8 %b) nounwind {
1108; RV32I-LABEL: atomicrmw_max_i8_monotonic:
1109; RV32I: # %bb.0:
1110; RV32I-NEXT: addi sp, sp, -32
1111; RV32I-NEXT: sw ra, 28(sp)
1112; RV32I-NEXT: sw s1, 24(sp)
1113; RV32I-NEXT: sw s2, 20(sp)
1114; RV32I-NEXT: sw s3, 16(sp)
1115; RV32I-NEXT: sw s4, 12(sp)
1116; RV32I-NEXT: mv s2, a1
1117; RV32I-NEXT: mv s4, a0
1118; RV32I-NEXT: lbu a0, 0(a0)
1119; RV32I-NEXT: slli a1, a1, 24
1120; RV32I-NEXT: srai s1, a1, 24
1121; RV32I-NEXT: addi s3, sp, 11
1122; RV32I-NEXT: .LBB35_1: # %atomicrmw.start
1123; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
1124; RV32I-NEXT: slli a1, a0, 24
1125; RV32I-NEXT: srai a1, a1, 24
1126; RV32I-NEXT: mv a2, a0
1127; RV32I-NEXT: blt s1, a1, .LBB35_3
1128; RV32I-NEXT: # %bb.2: # %atomicrmw.start
1129; RV32I-NEXT: # in Loop: Header=BB35_1 Depth=1
1130; RV32I-NEXT: mv a2, s2
1131; RV32I-NEXT: .LBB35_3: # %atomicrmw.start
1132; RV32I-NEXT: # in Loop: Header=BB35_1 Depth=1
1133; RV32I-NEXT: sb a0, 11(sp)
1134; RV32I-NEXT: mv a0, s4
1135; RV32I-NEXT: mv a1, s3
1136; RV32I-NEXT: mv a3, zero
1137; RV32I-NEXT: mv a4, zero
1138; RV32I-NEXT: call __atomic_compare_exchange_1
1139; RV32I-NEXT: mv a1, a0
1140; RV32I-NEXT: lb a0, 11(sp)
1141; RV32I-NEXT: beqz a1, .LBB35_1
1142; RV32I-NEXT: # %bb.4: # %atomicrmw.end
1143; RV32I-NEXT: lw s4, 12(sp)
1144; RV32I-NEXT: lw s3, 16(sp)
1145; RV32I-NEXT: lw s2, 20(sp)
1146; RV32I-NEXT: lw s1, 24(sp)
1147; RV32I-NEXT: lw ra, 28(sp)
1148; RV32I-NEXT: addi sp, sp, 32
1149; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]1150;
1151; RV32IA-LABEL: atomicrmw_max_i8_monotonic:
1152; RV32IA: # %bb.0:
1153; RV32IA-NEXT: slli a2, a0, 3
1154; RV32IA-NEXT: andi a2, a2, 24
1155; RV32IA-NEXT: addi a3, zero, 24
1156; RV32IA-NEXT: sub a6, a3, a2
1157; RV32IA-NEXT: addi a4, zero, 255
1158; RV32IA-NEXT: sll a7, a4, a2
1159; RV32IA-NEXT: slli a1, a1, 24
1160; RV32IA-NEXT: srai a1, a1, 24
1161; RV32IA-NEXT: sll a1, a1, a2
1162; RV32IA-NEXT: andi a0, a0, -4
1163; RV32IA-NEXT: .LBB35_1: # =>This Inner Loop Header: Depth=1
1164; RV32IA-NEXT: lr.w a5, (a0)
1165; RV32IA-NEXT: and a4, a5, a7
1166; RV32IA-NEXT: mv a3, a5
1167; RV32IA-NEXT: sll a4, a4, a6
1168; RV32IA-NEXT: sra a4, a4, a6
1169; RV32IA-NEXT: bge a4, a1, .LBB35_3
1170; RV32IA-NEXT: # %bb.2: # in Loop: Header=BB35_1 Depth=1
1171; RV32IA-NEXT: xor a3, a5, a1
1172; RV32IA-NEXT: and a3, a3, a7
1173; RV32IA-NEXT: xor a3, a5, a3
1174; RV32IA-NEXT: .LBB35_3: # in Loop: Header=BB35_1 Depth=1
1175; RV32IA-NEXT: sc.w a3, a3, (a0)
1176; RV32IA-NEXT: bnez a3, .LBB35_1
1177; RV32IA-NEXT: # %bb.4:
1178; RV32IA-NEXT: srl a0, a5, a2
1179; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]1180 %1 = atomicrmw max i8* %a, i8 %b monotonic
1181 ret i8 %1
1182}
1183
1184define i8 @atomicrmw_max_i8_acquire(i8 *%a, i8 %b) nounwind {
1185; RV32I-LABEL: atomicrmw_max_i8_acquire:
1186; RV32I: # %bb.0:
1187; RV32I-NEXT: addi sp, sp, -32
1188; RV32I-NEXT: sw ra, 28(sp)
1189; RV32I-NEXT: sw s1, 24(sp)
1190; RV32I-NEXT: sw s2, 20(sp)
1191; RV32I-NEXT: sw s3, 16(sp)
1192; RV32I-NEXT: sw s4, 12(sp)
1193; RV32I-NEXT: sw s5, 8(sp)
1194; RV32I-NEXT: mv s2, a1
1195; RV32I-NEXT: mv s4, a0
1196; RV32I-NEXT: lbu a0, 0(a0)
1197; RV32I-NEXT: slli a1, a1, 24
1198; RV32I-NEXT: srai s5, a1, 24
1199; RV32I-NEXT: addi s3, sp, 7
1200; RV32I-NEXT: addi s1, zero, 2
1201; RV32I-NEXT: .LBB36_1: # %atomicrmw.start
1202; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
1203; RV32I-NEXT: slli a1, a0, 24
1204; RV32I-NEXT: srai a1, a1, 24
1205; RV32I-NEXT: mv a2, a0
1206; RV32I-NEXT: blt s5, a1, .LBB36_3
1207; RV32I-NEXT: # %bb.2: # %atomicrmw.start
1208; RV32I-NEXT: # in Loop: Header=BB36_1 Depth=1
1209; RV32I-NEXT: mv a2, s2
1210; RV32I-NEXT: .LBB36_3: # %atomicrmw.start
1211; RV32I-NEXT: # in Loop: Header=BB36_1 Depth=1
1212; RV32I-NEXT: sb a0, 7(sp)
1213; RV32I-NEXT: mv a0, s4
1214; RV32I-NEXT: mv a1, s3
1215; RV32I-NEXT: mv a3, s1
1216; RV32I-NEXT: mv a4, s1
1217; RV32I-NEXT: call __atomic_compare_exchange_1
1218; RV32I-NEXT: mv a1, a0
1219; RV32I-NEXT: lb a0, 7(sp)
1220; RV32I-NEXT: beqz a1, .LBB36_1
1221; RV32I-NEXT: # %bb.4: # %atomicrmw.end
1222; RV32I-NEXT: lw s5, 8(sp)
1223; RV32I-NEXT: lw s4, 12(sp)
1224; RV32I-NEXT: lw s3, 16(sp)
1225; RV32I-NEXT: lw s2, 20(sp)
1226; RV32I-NEXT: lw s1, 24(sp)
1227; RV32I-NEXT: lw ra, 28(sp)
1228; RV32I-NEXT: addi sp, sp, 32
1229; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]1230;
1231; RV32IA-LABEL: atomicrmw_max_i8_acquire:
1232; RV32IA: # %bb.0:
1233; RV32IA-NEXT: slli a2, a0, 3
1234; RV32IA-NEXT: andi a2, a2, 24
1235; RV32IA-NEXT: addi a3, zero, 24
1236; RV32IA-NEXT: sub a6, a3, a2
1237; RV32IA-NEXT: addi a4, zero, 255
1238; RV32IA-NEXT: sll a7, a4, a2
1239; RV32IA-NEXT: slli a1, a1, 24
1240; RV32IA-NEXT: srai a1, a1, 24
1241; RV32IA-NEXT: sll a1, a1, a2
1242; RV32IA-NEXT: andi a0, a0, -4
1243; RV32IA-NEXT: .LBB36_1: # =>This Inner Loop Header: Depth=1
1244; RV32IA-NEXT: lr.w.aq a5, (a0)
1245; RV32IA-NEXT: and a4, a5, a7
1246; RV32IA-NEXT: mv a3, a5
1247; RV32IA-NEXT: sll a4, a4, a6
1248; RV32IA-NEXT: sra a4, a4, a6
1249; RV32IA-NEXT: bge a4, a1, .LBB36_3
1250; RV32IA-NEXT: # %bb.2: # in Loop: Header=BB36_1 Depth=1
1251; RV32IA-NEXT: xor a3, a5, a1
1252; RV32IA-NEXT: and a3, a3, a7
1253; RV32IA-NEXT: xor a3, a5, a3
1254; RV32IA-NEXT: .LBB36_3: # in Loop: Header=BB36_1 Depth=1
1255; RV32IA-NEXT: sc.w a3, a3, (a0)
1256; RV32IA-NEXT: bnez a3, .LBB36_1
1257; RV32IA-NEXT: # %bb.4:
1258; RV32IA-NEXT: srl a0, a5, a2
1259; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]1260 %1 = atomicrmw max i8* %a, i8 %b acquire
1261 ret i8 %1
1262}
1263
1264define i8 @atomicrmw_max_i8_release(i8 *%a, i8 %b) nounwind {
1265; RV32I-LABEL: atomicrmw_max_i8_release:
1266; RV32I: # %bb.0:
1267; RV32I-NEXT: addi sp, sp, -32
1268; RV32I-NEXT: sw ra, 28(sp)
1269; RV32I-NEXT: sw s1, 24(sp)
1270; RV32I-NEXT: sw s2, 20(sp)
1271; RV32I-NEXT: sw s3, 16(sp)
1272; RV32I-NEXT: sw s4, 12(sp)
1273; RV32I-NEXT: sw s5, 8(sp)
1274; RV32I-NEXT: mv s2, a1
1275; RV32I-NEXT: mv s5, a0
1276; RV32I-NEXT: lbu a0, 0(a0)
1277; RV32I-NEXT: slli a1, a1, 24
1278; RV32I-NEXT: srai s1, a1, 24
1279; RV32I-NEXT: addi s3, sp, 7
1280; RV32I-NEXT: addi s4, zero, 3
1281; RV32I-NEXT: .LBB37_1: # %atomicrmw.start
1282; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
1283; RV32I-NEXT: slli a1, a0, 24
1284; RV32I-NEXT: srai a1, a1, 24
1285; RV32I-NEXT: mv a2, a0
1286; RV32I-NEXT: blt s1, a1, .LBB37_3
1287; RV32I-NEXT: # %bb.2: # %atomicrmw.start
1288; RV32I-NEXT: # in Loop: Header=BB37_1 Depth=1
1289; RV32I-NEXT: mv a2, s2
1290; RV32I-NEXT: .LBB37_3: # %atomicrmw.start
1291; RV32I-NEXT: # in Loop: Header=BB37_1 Depth=1
1292; RV32I-NEXT: sb a0, 7(sp)
1293; RV32I-NEXT: mv a0, s5
1294; RV32I-NEXT: mv a1, s3
1295; RV32I-NEXT: mv a3, s4
1296; RV32I-NEXT: mv a4, zero
1297; RV32I-NEXT: call __atomic_compare_exchange_1
1298; RV32I-NEXT: mv a1, a0
1299; RV32I-NEXT: lb a0, 7(sp)
1300; RV32I-NEXT: beqz a1, .LBB37_1
1301; RV32I-NEXT: # %bb.4: # %atomicrmw.end
1302; RV32I-NEXT: lw s5, 8(sp)
1303; RV32I-NEXT: lw s4, 12(sp)
1304; RV32I-NEXT: lw s3, 16(sp)
1305; RV32I-NEXT: lw s2, 20(sp)
1306; RV32I-NEXT: lw s1, 24(sp)
1307; RV32I-NEXT: lw ra, 28(sp)
1308; RV32I-NEXT: addi sp, sp, 32
1309; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]1310;
1311; RV32IA-LABEL: atomicrmw_max_i8_release:
1312; RV32IA: # %bb.0:
1313; RV32IA-NEXT: slli a2, a0, 3
1314; RV32IA-NEXT: andi a2, a2, 24
1315; RV32IA-NEXT: addi a3, zero, 24
1316; RV32IA-NEXT: sub a6, a3, a2
1317; RV32IA-NEXT: addi a4, zero, 255
1318; RV32IA-NEXT: sll a7, a4, a2
1319; RV32IA-NEXT: slli a1, a1, 24
1320; RV32IA-NEXT: srai a1, a1, 24
1321; RV32IA-NEXT: sll a1, a1, a2
1322; RV32IA-NEXT: andi a0, a0, -4
1323; RV32IA-NEXT: .LBB37_1: # =>This Inner Loop Header: Depth=1
1324; RV32IA-NEXT: lr.w a5, (a0)
1325; RV32IA-NEXT: and a4, a5, a7
1326; RV32IA-NEXT: mv a3, a5
1327; RV32IA-NEXT: sll a4, a4, a6
1328; RV32IA-NEXT: sra a4, a4, a6
1329; RV32IA-NEXT: bge a4, a1, .LBB37_3
1330; RV32IA-NEXT: # %bb.2: # in Loop: Header=BB37_1 Depth=1
1331; RV32IA-NEXT: xor a3, a5, a1
1332; RV32IA-NEXT: and a3, a3, a7
1333; RV32IA-NEXT: xor a3, a5, a3
1334; RV32IA-NEXT: .LBB37_3: # in Loop: Header=BB37_1 Depth=1
1335; RV32IA-NEXT: sc.w.rl a3, a3, (a0)
1336; RV32IA-NEXT: bnez a3, .LBB37_1
1337; RV32IA-NEXT: # %bb.4:
1338; RV32IA-NEXT: srl a0, a5, a2
1339; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]1340 %1 = atomicrmw max i8* %a, i8 %b release
1341 ret i8 %1
1342}
1343
1344define i8 @atomicrmw_max_i8_acq_rel(i8 *%a, i8 %b) nounwind {
1345; RV32I-LABEL: atomicrmw_max_i8_acq_rel:
1346; RV32I: # %bb.0:
1347; RV32I-NEXT: addi sp, sp, -32
1348; RV32I-NEXT: sw ra, 28(sp)
1349; RV32I-NEXT: sw s1, 24(sp)
1350; RV32I-NEXT: sw s2, 20(sp)
1351; RV32I-NEXT: sw s3, 16(sp)
1352; RV32I-NEXT: sw s4, 12(sp)
1353; RV32I-NEXT: sw s5, 8(sp)
1354; RV32I-NEXT: sw s6, 4(sp)
1355; RV32I-NEXT: mv s2, a1
1356; RV32I-NEXT: mv s6, a0
1357; RV32I-NEXT: lbu a0, 0(a0)
1358; RV32I-NEXT: slli a1, a1, 24
1359; RV32I-NEXT: srai s1, a1, 24
1360; RV32I-NEXT: addi s3, sp, 3
1361; RV32I-NEXT: addi s4, zero, 4
1362; RV32I-NEXT: addi s5, zero, 2
1363; RV32I-NEXT: .LBB38_1: # %atomicrmw.start
1364; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
1365; RV32I-NEXT: slli a1, a0, 24
1366; RV32I-NEXT: srai a1, a1, 24
1367; RV32I-NEXT: mv a2, a0
1368; RV32I-NEXT: blt s1, a1, .LBB38_3
1369; RV32I-NEXT: # %bb.2: # %atomicrmw.start
1370; RV32I-NEXT: # in Loop: Header=BB38_1 Depth=1
1371; RV32I-NEXT: mv a2, s2
1372; RV32I-NEXT: .LBB38_3: # %atomicrmw.start
1373; RV32I-NEXT: # in Loop: Header=BB38_1 Depth=1
1374; RV32I-NEXT: sb a0, 3(sp)
1375; RV32I-NEXT: mv a0, s6
1376; RV32I-NEXT: mv a1, s3
1377; RV32I-NEXT: mv a3, s4
1378; RV32I-NEXT: mv a4, s5
1379; RV32I-NEXT: call __atomic_compare_exchange_1
1380; RV32I-NEXT: mv a1, a0
1381; RV32I-NEXT: lb a0, 3(sp)
1382; RV32I-NEXT: beqz a1, .LBB38_1
1383; RV32I-NEXT: # %bb.4: # %atomicrmw.end
1384; RV32I-NEXT: lw s6, 4(sp)
1385; RV32I-NEXT: lw s5, 8(sp)
1386; RV32I-NEXT: lw s4, 12(sp)
1387; RV32I-NEXT: lw s3, 16(sp)
1388; RV32I-NEXT: lw s2, 20(sp)
1389; RV32I-NEXT: lw s1, 24(sp)
1390; RV32I-NEXT: lw ra, 28(sp)
1391; RV32I-NEXT: addi sp, sp, 32
1392; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]1393;
1394; RV32IA-LABEL: atomicrmw_max_i8_acq_rel:
1395; RV32IA: # %bb.0:
1396; RV32IA-NEXT: slli a2, a0, 3
1397; RV32IA-NEXT: andi a2, a2, 24
1398; RV32IA-NEXT: addi a3, zero, 24
1399; RV32IA-NEXT: sub a6, a3, a2
1400; RV32IA-NEXT: addi a4, zero, 255
1401; RV32IA-NEXT: sll a7, a4, a2
1402; RV32IA-NEXT: slli a1, a1, 24
1403; RV32IA-NEXT: srai a1, a1, 24
1404; RV32IA-NEXT: sll a1, a1, a2
1405; RV32IA-NEXT: andi a0, a0, -4
1406; RV32IA-NEXT: .LBB38_1: # =>This Inner Loop Header: Depth=1
1407; RV32IA-NEXT: lr.w.aq a5, (a0)
1408; RV32IA-NEXT: and a4, a5, a7
1409; RV32IA-NEXT: mv a3, a5
1410; RV32IA-NEXT: sll a4, a4, a6
1411; RV32IA-NEXT: sra a4, a4, a6
1412; RV32IA-NEXT: bge a4, a1, .LBB38_3
1413; RV32IA-NEXT: # %bb.2: # in Loop: Header=BB38_1 Depth=1
1414; RV32IA-NEXT: xor a3, a5, a1
1415; RV32IA-NEXT: and a3, a3, a7
1416; RV32IA-NEXT: xor a3, a5, a3
1417; RV32IA-NEXT: .LBB38_3: # in Loop: Header=BB38_1 Depth=1
1418; RV32IA-NEXT: sc.w.rl a3, a3, (a0)
1419; RV32IA-NEXT: bnez a3, .LBB38_1
1420; RV32IA-NEXT: # %bb.4:
1421; RV32IA-NEXT: srl a0, a5, a2
1422; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]1423 %1 = atomicrmw max i8* %a, i8 %b acq_rel
1424 ret i8 %1
1425}
1426
1427define i8 @atomicrmw_max_i8_seq_cst(i8 *%a, i8 %b) nounwind {
1428; RV32I-LABEL: atomicrmw_max_i8_seq_cst:
1429; RV32I: # %bb.0:
1430; RV32I-NEXT: addi sp, sp, -32
1431; RV32I-NEXT: sw ra, 28(sp)
1432; RV32I-NEXT: sw s1, 24(sp)
1433; RV32I-NEXT: sw s2, 20(sp)
1434; RV32I-NEXT: sw s3, 16(sp)
1435; RV32I-NEXT: sw s4, 12(sp)
1436; RV32I-NEXT: sw s5, 8(sp)
1437; RV32I-NEXT: mv s2, a1
1438; RV32I-NEXT: mv s4, a0
1439; RV32I-NEXT: lbu a0, 0(a0)
1440; RV32I-NEXT: slli a1, a1, 24
1441; RV32I-NEXT: srai s5, a1, 24
1442; RV32I-NEXT: addi s3, sp, 7
1443; RV32I-NEXT: addi s1, zero, 5
1444; RV32I-NEXT: .LBB39_1: # %atomicrmw.start
1445; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
1446; RV32I-NEXT: slli a1, a0, 24
1447; RV32I-NEXT: srai a1, a1, 24
1448; RV32I-NEXT: mv a2, a0
1449; RV32I-NEXT: blt s5, a1, .LBB39_3
1450; RV32I-NEXT: # %bb.2: # %atomicrmw.start
1451; RV32I-NEXT: # in Loop: Header=BB39_1 Depth=1
1452; RV32I-NEXT: mv a2, s2
1453; RV32I-NEXT: .LBB39_3: # %atomicrmw.start
1454; RV32I-NEXT: # in Loop: Header=BB39_1 Depth=1
1455; RV32I-NEXT: sb a0, 7(sp)
1456; RV32I-NEXT: mv a0, s4
1457; RV32I-NEXT: mv a1, s3
1458; RV32I-NEXT: mv a3, s1
1459; RV32I-NEXT: mv a4, s1
1460; RV32I-NEXT: call __atomic_compare_exchange_1
1461; RV32I-NEXT: mv a1, a0
1462; RV32I-NEXT: lb a0, 7(sp)
1463; RV32I-NEXT: beqz a1, .LBB39_1
1464; RV32I-NEXT: # %bb.4: # %atomicrmw.end
1465; RV32I-NEXT: lw s5, 8(sp)
1466; RV32I-NEXT: lw s4, 12(sp)
1467; RV32I-NEXT: lw s3, 16(sp)
1468; RV32I-NEXT: lw s2, 20(sp)
1469; RV32I-NEXT: lw s1, 24(sp)
1470; RV32I-NEXT: lw ra, 28(sp)
1471; RV32I-NEXT: addi sp, sp, 32
1472; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]1473;
1474; RV32IA-LABEL: atomicrmw_max_i8_seq_cst:
1475; RV32IA: # %bb.0:
1476; RV32IA-NEXT: slli a2, a0, 3
1477; RV32IA-NEXT: andi a2, a2, 24
1478; RV32IA-NEXT: addi a3, zero, 24
1479; RV32IA-NEXT: sub a6, a3, a2
1480; RV32IA-NEXT: addi a4, zero, 255
1481; RV32IA-NEXT: sll a7, a4, a2
1482; RV32IA-NEXT: slli a1, a1, 24
1483; RV32IA-NEXT: srai a1, a1, 24
1484; RV32IA-NEXT: sll a1, a1, a2
1485; RV32IA-NEXT: andi a0, a0, -4
1486; RV32IA-NEXT: .LBB39_1: # =>This Inner Loop Header: Depth=1
1487; RV32IA-NEXT: lr.w.aqrl a5, (a0)
1488; RV32IA-NEXT: and a4, a5, a7
1489; RV32IA-NEXT: mv a3, a5
1490; RV32IA-NEXT: sll a4, a4, a6
1491; RV32IA-NEXT: sra a4, a4, a6
1492; RV32IA-NEXT: bge a4, a1, .LBB39_3
1493; RV32IA-NEXT: # %bb.2: # in Loop: Header=BB39_1 Depth=1
1494; RV32IA-NEXT: xor a3, a5, a1
1495; RV32IA-NEXT: and a3, a3, a7
1496; RV32IA-NEXT: xor a3, a5, a3
1497; RV32IA-NEXT: .LBB39_3: # in Loop: Header=BB39_1 Depth=1
1498; RV32IA-NEXT: sc.w.aqrl a3, a3, (a0)
1499; RV32IA-NEXT: bnez a3, .LBB39_1
1500; RV32IA-NEXT: # %bb.4:
1501; RV32IA-NEXT: srl a0, a5, a2
1502; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]1503 %1 = atomicrmw max i8* %a, i8 %b seq_cst
1504 ret i8 %1
1505}
1506
1507define i8 @atomicrmw_min_i8_monotonic(i8 *%a, i8 %b) nounwind {
1508; RV32I-LABEL: atomicrmw_min_i8_monotonic:
1509; RV32I: # %bb.0:
1510; RV32I-NEXT: addi sp, sp, -32
1511; RV32I-NEXT: sw ra, 28(sp)
1512; RV32I-NEXT: sw s1, 24(sp)
1513; RV32I-NEXT: sw s2, 20(sp)
1514; RV32I-NEXT: sw s3, 16(sp)
1515; RV32I-NEXT: sw s4, 12(sp)
1516; RV32I-NEXT: mv s2, a1
1517; RV32I-NEXT: mv s4, a0
1518; RV32I-NEXT: lbu a0, 0(a0)
1519; RV32I-NEXT: slli a1, a1, 24
1520; RV32I-NEXT: srai s1, a1, 24
1521; RV32I-NEXT: addi s3, sp, 11
1522; RV32I-NEXT: .LBB40_1: # %atomicrmw.start
1523; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
1524; RV32I-NEXT: slli a1, a0, 24
1525; RV32I-NEXT: srai a1, a1, 24
1526; RV32I-NEXT: mv a2, a0
1527; RV32I-NEXT: bge s1, a1, .LBB40_3
1528; RV32I-NEXT: # %bb.2: # %atomicrmw.start
1529; RV32I-NEXT: # in Loop: Header=BB40_1 Depth=1
1530; RV32I-NEXT: mv a2, s2
1531; RV32I-NEXT: .LBB40_3: # %atomicrmw.start
1532; RV32I-NEXT: # in Loop: Header=BB40_1 Depth=1
1533; RV32I-NEXT: sb a0, 11(sp)
1534; RV32I-NEXT: mv a0, s4
1535; RV32I-NEXT: mv a1, s3
1536; RV32I-NEXT: mv a3, zero
1537; RV32I-NEXT: mv a4, zero
1538; RV32I-NEXT: call __atomic_compare_exchange_1
1539; RV32I-NEXT: mv a1, a0
1540; RV32I-NEXT: lb a0, 11(sp)
1541; RV32I-NEXT: beqz a1, .LBB40_1
1542; RV32I-NEXT: # %bb.4: # %atomicrmw.end
1543; RV32I-NEXT: lw s4, 12(sp)
1544; RV32I-NEXT: lw s3, 16(sp)
1545; RV32I-NEXT: lw s2, 20(sp)
1546; RV32I-NEXT: lw s1, 24(sp)
1547; RV32I-NEXT: lw ra, 28(sp)
1548; RV32I-NEXT: addi sp, sp, 32
1549; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]1550;
1551; RV32IA-LABEL: atomicrmw_min_i8_monotonic:
1552; RV32IA: # %bb.0:
1553; RV32IA-NEXT: slli a2, a0, 3
1554; RV32IA-NEXT: andi a2, a2, 24
1555; RV32IA-NEXT: addi a3, zero, 24
1556; RV32IA-NEXT: sub a6, a3, a2
1557; RV32IA-NEXT: addi a4, zero, 255
1558; RV32IA-NEXT: sll a7, a4, a2
1559; RV32IA-NEXT: slli a1, a1, 24
1560; RV32IA-NEXT: srai a1, a1, 24
1561; RV32IA-NEXT: sll a1, a1, a2
1562; RV32IA-NEXT: andi a0, a0, -4
1563; RV32IA-NEXT: .LBB40_1: # =>This Inner Loop Header: Depth=1
1564; RV32IA-NEXT: lr.w a5, (a0)
1565; RV32IA-NEXT: and a4, a5, a7
1566; RV32IA-NEXT: mv a3, a5
1567; RV32IA-NEXT: sll a4, a4, a6
1568; RV32IA-NEXT: sra a4, a4, a6
1569; RV32IA-NEXT: bge a1, a4, .LBB40_3
1570; RV32IA-NEXT: # %bb.2: # in Loop: Header=BB40_1 Depth=1
1571; RV32IA-NEXT: xor a3, a5, a1
1572; RV32IA-NEXT: and a3, a3, a7
1573; RV32IA-NEXT: xor a3, a5, a3
1574; RV32IA-NEXT: .LBB40_3: # in Loop: Header=BB40_1 Depth=1
1575; RV32IA-NEXT: sc.w a3, a3, (a0)
1576; RV32IA-NEXT: bnez a3, .LBB40_1
1577; RV32IA-NEXT: # %bb.4:
1578; RV32IA-NEXT: srl a0, a5, a2
1579; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]1580 %1 = atomicrmw min i8* %a, i8 %b monotonic
1581 ret i8 %1
1582}
1583
1584define i8 @atomicrmw_min_i8_acquire(i8 *%a, i8 %b) nounwind {
1585; RV32I-LABEL: atomicrmw_min_i8_acquire:
1586; RV32I: # %bb.0:
1587; RV32I-NEXT: addi sp, sp, -32
1588; RV32I-NEXT: sw ra, 28(sp)
1589; RV32I-NEXT: sw s1, 24(sp)
1590; RV32I-NEXT: sw s2, 20(sp)
1591; RV32I-NEXT: sw s3, 16(sp)
1592; RV32I-NEXT: sw s4, 12(sp)
1593; RV32I-NEXT: sw s5, 8(sp)
1594; RV32I-NEXT: mv s2, a1
1595; RV32I-NEXT: mv s4, a0
1596; RV32I-NEXT: lbu a0, 0(a0)
1597; RV32I-NEXT: slli a1, a1, 24
1598; RV32I-NEXT: srai s5, a1, 24
1599; RV32I-NEXT: addi s3, sp, 7
1600; RV32I-NEXT: addi s1, zero, 2
1601; RV32I-NEXT: .LBB41_1: # %atomicrmw.start
1602; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
1603; RV32I-NEXT: slli a1, a0, 24
1604; RV32I-NEXT: srai a1, a1, 24
1605; RV32I-NEXT: mv a2, a0
1606; RV32I-NEXT: bge s5, a1, .LBB41_3
1607; RV32I-NEXT: # %bb.2: # %atomicrmw.start
1608; RV32I-NEXT: # in Loop: Header=BB41_1 Depth=1
1609; RV32I-NEXT: mv a2, s2
1610; RV32I-NEXT: .LBB41_3: # %atomicrmw.start
1611; RV32I-NEXT: # in Loop: Header=BB41_1 Depth=1
1612; RV32I-NEXT: sb a0, 7(sp)
1613; RV32I-NEXT: mv a0, s4
1614; RV32I-NEXT: mv a1, s3
1615; RV32I-NEXT: mv a3, s1
1616; RV32I-NEXT: mv a4, s1
1617; RV32I-NEXT: call __atomic_compare_exchange_1
1618; RV32I-NEXT: mv a1, a0
1619; RV32I-NEXT: lb a0, 7(sp)
1620; RV32I-NEXT: beqz a1, .LBB41_1
1621; RV32I-NEXT: # %bb.4: # %atomicrmw.end
1622; RV32I-NEXT: lw s5, 8(sp)
1623; RV32I-NEXT: lw s4, 12(sp)
1624; RV32I-NEXT: lw s3, 16(sp)
1625; RV32I-NEXT: lw s2, 20(sp)
1626; RV32I-NEXT: lw s1, 24(sp)
1627; RV32I-NEXT: lw ra, 28(sp)
1628; RV32I-NEXT: addi sp, sp, 32
1629; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]1630;
1631; RV32IA-LABEL: atomicrmw_min_i8_acquire:
1632; RV32IA: # %bb.0:
1633; RV32IA-NEXT: slli a2, a0, 3
1634; RV32IA-NEXT: andi a2, a2, 24
1635; RV32IA-NEXT: addi a3, zero, 24
1636; RV32IA-NEXT: sub a6, a3, a2
1637; RV32IA-NEXT: addi a4, zero, 255
1638; RV32IA-NEXT: sll a7, a4, a2
1639; RV32IA-NEXT: slli a1, a1, 24
1640; RV32IA-NEXT: srai a1, a1, 24
1641; RV32IA-NEXT: sll a1, a1, a2
1642; RV32IA-NEXT: andi a0, a0, -4
1643; RV32IA-NEXT: .LBB41_1: # =>This Inner Loop Header: Depth=1
1644; RV32IA-NEXT: lr.w.aq a5, (a0)
1645; RV32IA-NEXT: and a4, a5, a7
1646; RV32IA-NEXT: mv a3, a5
1647; RV32IA-NEXT: sll a4, a4, a6
1648; RV32IA-NEXT: sra a4, a4, a6
1649; RV32IA-NEXT: bge a1, a4, .LBB41_3
1650; RV32IA-NEXT: # %bb.2: # in Loop: Header=BB41_1 Depth=1
1651; RV32IA-NEXT: xor a3, a5, a1
1652; RV32IA-NEXT: and a3, a3, a7
1653; RV32IA-NEXT: xor a3, a5, a3
1654; RV32IA-NEXT: .LBB41_3: # in Loop: Header=BB41_1 Depth=1
1655; RV32IA-NEXT: sc.w a3, a3, (a0)
1656; RV32IA-NEXT: bnez a3, .LBB41_1
1657; RV32IA-NEXT: # %bb.4:
1658; RV32IA-NEXT: srl a0, a5, a2
1659; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]1660 %1 = atomicrmw min i8* %a, i8 %b acquire
1661 ret i8 %1
1662}
1663
1664define i8 @atomicrmw_min_i8_release(i8 *%a, i8 %b) nounwind {
1665; RV32I-LABEL: atomicrmw_min_i8_release:
1666; RV32I: # %bb.0:
1667; RV32I-NEXT: addi sp, sp, -32
1668; RV32I-NEXT: sw ra, 28(sp)
1669; RV32I-NEXT: sw s1, 24(sp)
1670; RV32I-NEXT: sw s2, 20(sp)
1671; RV32I-NEXT: sw s3, 16(sp)
1672; RV32I-NEXT: sw s4, 12(sp)
1673; RV32I-NEXT: sw s5, 8(sp)
1674; RV32I-NEXT: mv s2, a1
1675; RV32I-NEXT: mv s5, a0
1676; RV32I-NEXT: lbu a0, 0(a0)
1677; RV32I-NEXT: slli a1, a1, 24
1678; RV32I-NEXT: srai s1, a1, 24
1679; RV32I-NEXT: addi s3, sp, 7
1680; RV32I-NEXT: addi s4, zero, 3
1681; RV32I-NEXT: .LBB42_1: # %atomicrmw.start
1682; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
1683; RV32I-NEXT: slli a1, a0, 24
1684; RV32I-NEXT: srai a1, a1, 24
1685; RV32I-NEXT: mv a2, a0
1686; RV32I-NEXT: bge s1, a1, .LBB42_3
1687; RV32I-NEXT: # %bb.2: # %atomicrmw.start
1688; RV32I-NEXT: # in Loop: Header=BB42_1 Depth=1
1689; RV32I-NEXT: mv a2, s2
1690; RV32I-NEXT: .LBB42_3: # %atomicrmw.start
1691; RV32I-NEXT: # in Loop: Header=BB42_1 Depth=1
1692; RV32I-NEXT: sb a0, 7(sp)
1693; RV32I-NEXT: mv a0, s5
1694; RV32I-NEXT: mv a1, s3
1695; RV32I-NEXT: mv a3, s4
1696; RV32I-NEXT: mv a4, zero
1697; RV32I-NEXT: call __atomic_compare_exchange_1
1698; RV32I-NEXT: mv a1, a0
1699; RV32I-NEXT: lb a0, 7(sp)
1700; RV32I-NEXT: beqz a1, .LBB42_1
1701; RV32I-NEXT: # %bb.4: # %atomicrmw.end
1702; RV32I-NEXT: lw s5, 8(sp)
1703; RV32I-NEXT: lw s4, 12(sp)
1704; RV32I-NEXT: lw s3, 16(sp)
1705; RV32I-NEXT: lw s2, 20(sp)
1706; RV32I-NEXT: lw s1, 24(sp)
1707; RV32I-NEXT: lw ra, 28(sp)
1708; RV32I-NEXT: addi sp, sp, 32
1709; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]1710;
1711; RV32IA-LABEL: atomicrmw_min_i8_release:
1712; RV32IA: # %bb.0:
1713; RV32IA-NEXT: slli a2, a0, 3
1714; RV32IA-NEXT: andi a2, a2, 24
1715; RV32IA-NEXT: addi a3, zero, 24
1716; RV32IA-NEXT: sub a6, a3, a2
1717; RV32IA-NEXT: addi a4, zero, 255
1718; RV32IA-NEXT: sll a7, a4, a2
1719; RV32IA-NEXT: slli a1, a1, 24
1720; RV32IA-NEXT: srai a1, a1, 24
1721; RV32IA-NEXT: sll a1, a1, a2
1722; RV32IA-NEXT: andi a0, a0, -4
1723; RV32IA-NEXT: .LBB42_1: # =>This Inner Loop Header: Depth=1
1724; RV32IA-NEXT: lr.w a5, (a0)
1725; RV32IA-NEXT: and a4, a5, a7
1726; RV32IA-NEXT: mv a3, a5
1727; RV32IA-NEXT: sll a4, a4, a6
1728; RV32IA-NEXT: sra a4, a4, a6
1729; RV32IA-NEXT: bge a1, a4, .LBB42_3
1730; RV32IA-NEXT: # %bb.2: # in Loop: Header=BB42_1 Depth=1
1731; RV32IA-NEXT: xor a3, a5, a1
1732; RV32IA-NEXT: and a3, a3, a7
1733; RV32IA-NEXT: xor a3, a5, a3
1734; RV32IA-NEXT: .LBB42_3: # in Loop: Header=BB42_1 Depth=1
1735; RV32IA-NEXT: sc.w.rl a3, a3, (a0)
1736; RV32IA-NEXT: bnez a3, .LBB42_1
1737; RV32IA-NEXT: # %bb.4:
1738; RV32IA-NEXT: srl a0, a5, a2
1739; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]1740 %1 = atomicrmw min i8* %a, i8 %b release
1741 ret i8 %1
1742}
1743
1744define i8 @atomicrmw_min_i8_acq_rel(i8 *%a, i8 %b) nounwind {
1745; RV32I-LABEL: atomicrmw_min_i8_acq_rel:
1746; RV32I: # %bb.0:
1747; RV32I-NEXT: addi sp, sp, -32
1748; RV32I-NEXT: sw ra, 28(sp)
1749; RV32I-NEXT: sw s1, 24(sp)
1750; RV32I-NEXT: sw s2, 20(sp)
1751; RV32I-NEXT: sw s3, 16(sp)
1752; RV32I-NEXT: sw s4, 12(sp)
1753; RV32I-NEXT: sw s5, 8(sp)
1754; RV32I-NEXT: sw s6, 4(sp)
1755; RV32I-NEXT: mv s2, a1
1756; RV32I-NEXT: mv s6, a0
1757; RV32I-NEXT: lbu a0, 0(a0)
1758; RV32I-NEXT: slli a1, a1, 24
1759; RV32I-NEXT: srai s1, a1, 24
1760; RV32I-NEXT: addi s3, sp, 3
1761; RV32I-NEXT: addi s4, zero, 4
1762; RV32I-NEXT: addi s5, zero, 2
1763; RV32I-NEXT: .LBB43_1: # %atomicrmw.start
1764; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
1765; RV32I-NEXT: slli a1, a0, 24
1766; RV32I-NEXT: srai a1, a1, 24
1767; RV32I-NEXT: mv a2, a0
1768; RV32I-NEXT: bge s1, a1, .LBB43_3
1769; RV32I-NEXT: # %bb.2: # %atomicrmw.start
1770; RV32I-NEXT: # in Loop: Header=BB43_1 Depth=1
1771; RV32I-NEXT: mv a2, s2
1772; RV32I-NEXT: .LBB43_3: # %atomicrmw.start
1773; RV32I-NEXT: # in Loop: Header=BB43_1 Depth=1
1774; RV32I-NEXT: sb a0, 3(sp)
1775; RV32I-NEXT: mv a0, s6
1776; RV32I-NEXT: mv a1, s3
1777; RV32I-NEXT: mv a3, s4
1778; RV32I-NEXT: mv a4, s5
1779; RV32I-NEXT: call __atomic_compare_exchange_1
1780; RV32I-NEXT: mv a1, a0
1781; RV32I-NEXT: lb a0, 3(sp)
1782; RV32I-NEXT: beqz a1, .LBB43_1
1783; RV32I-NEXT: # %bb.4: # %atomicrmw.end
1784; RV32I-NEXT: lw s6, 4(sp)
1785; RV32I-NEXT: lw s5, 8(sp)
1786; RV32I-NEXT: lw s4, 12(sp)
1787; RV32I-NEXT: lw s3, 16(sp)
1788; RV32I-NEXT: lw s2, 20(sp)
1789; RV32I-NEXT: lw s1, 24(sp)
1790; RV32I-NEXT: lw ra, 28(sp)
1791; RV32I-NEXT: addi sp, sp, 32
1792; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]1793;
1794; RV32IA-LABEL: atomicrmw_min_i8_acq_rel:
1795; RV32IA: # %bb.0:
1796; RV32IA-NEXT: slli a2, a0, 3
1797; RV32IA-NEXT: andi a2, a2, 24
1798; RV32IA-NEXT: addi a3, zero, 24
1799; RV32IA-NEXT: sub a6, a3, a2
1800; RV32IA-NEXT: addi a4, zero, 255
1801; RV32IA-NEXT: sll a7, a4, a2
1802; RV32IA-NEXT: slli a1, a1, 24
1803; RV32IA-NEXT: srai a1, a1, 24
1804; RV32IA-NEXT: sll a1, a1, a2
1805; RV32IA-NEXT: andi a0, a0, -4
1806; RV32IA-NEXT: .LBB43_1: # =>This Inner Loop Header: Depth=1
1807; RV32IA-NEXT: lr.w.aq a5, (a0)
1808; RV32IA-NEXT: and a4, a5, a7
1809; RV32IA-NEXT: mv a3, a5
1810; RV32IA-NEXT: sll a4, a4, a6
1811; RV32IA-NEXT: sra a4, a4, a6
1812; RV32IA-NEXT: bge a1, a4, .LBB43_3
1813; RV32IA-NEXT: # %bb.2: # in Loop: Header=BB43_1 Depth=1
1814; RV32IA-NEXT: xor a3, a5, a1
1815; RV32IA-NEXT: and a3, a3, a7
1816; RV32IA-NEXT: xor a3, a5, a3
1817; RV32IA-NEXT: .LBB43_3: # in Loop: Header=BB43_1 Depth=1
1818; RV32IA-NEXT: sc.w.rl a3, a3, (a0)
1819; RV32IA-NEXT: bnez a3, .LBB43_1
1820; RV32IA-NEXT: # %bb.4:
1821; RV32IA-NEXT: srl a0, a5, a2
1822; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]1823 %1 = atomicrmw min i8* %a, i8 %b acq_rel
1824 ret i8 %1
1825}
1826
1827define i8 @atomicrmw_min_i8_seq_cst(i8 *%a, i8 %b) nounwind {
1828; RV32I-LABEL: atomicrmw_min_i8_seq_cst:
1829; RV32I: # %bb.0:
1830; RV32I-NEXT: addi sp, sp, -32
1831; RV32I-NEXT: sw ra, 28(sp)
1832; RV32I-NEXT: sw s1, 24(sp)
1833; RV32I-NEXT: sw s2, 20(sp)
1834; RV32I-NEXT: sw s3, 16(sp)
1835; RV32I-NEXT: sw s4, 12(sp)
1836; RV32I-NEXT: sw s5, 8(sp)
1837; RV32I-NEXT: mv s2, a1
1838; RV32I-NEXT: mv s4, a0
1839; RV32I-NEXT: lbu a0, 0(a0)
1840; RV32I-NEXT: slli a1, a1, 24
1841; RV32I-NEXT: srai s5, a1, 24
1842; RV32I-NEXT: addi s3, sp, 7
1843; RV32I-NEXT: addi s1, zero, 5
1844; RV32I-NEXT: .LBB44_1: # %atomicrmw.start
1845; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
1846; RV32I-NEXT: slli a1, a0, 24
1847; RV32I-NEXT: srai a1, a1, 24
1848; RV32I-NEXT: mv a2, a0
1849; RV32I-NEXT: bge s5, a1, .LBB44_3
1850; RV32I-NEXT: # %bb.2: # %atomicrmw.start
1851; RV32I-NEXT: # in Loop: Header=BB44_1 Depth=1
1852; RV32I-NEXT: mv a2, s2
1853; RV32I-NEXT: .LBB44_3: # %atomicrmw.start
1854; RV32I-NEXT: # in Loop: Header=BB44_1 Depth=1
1855; RV32I-NEXT: sb a0, 7(sp)
1856; RV32I-NEXT: mv a0, s4
1857; RV32I-NEXT: mv a1, s3
1858; RV32I-NEXT: mv a3, s1
1859; RV32I-NEXT: mv a4, s1
1860; RV32I-NEXT: call __atomic_compare_exchange_1
1861; RV32I-NEXT: mv a1, a0
1862; RV32I-NEXT: lb a0, 7(sp)
1863; RV32I-NEXT: beqz a1, .LBB44_1
1864; RV32I-NEXT: # %bb.4: # %atomicrmw.end
1865; RV32I-NEXT: lw s5, 8(sp)
1866; RV32I-NEXT: lw s4, 12(sp)
1867; RV32I-NEXT: lw s3, 16(sp)
1868; RV32I-NEXT: lw s2, 20(sp)
1869; RV32I-NEXT: lw s1, 24(sp)
1870; RV32I-NEXT: lw ra, 28(sp)
1871; RV32I-NEXT: addi sp, sp, 32
1872; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]1873;
1874; RV32IA-LABEL: atomicrmw_min_i8_seq_cst:
1875; RV32IA: # %bb.0:
1876; RV32IA-NEXT: slli a2, a0, 3
1877; RV32IA-NEXT: andi a2, a2, 24
1878; RV32IA-NEXT: addi a3, zero, 24
1879; RV32IA-NEXT: sub a6, a3, a2
1880; RV32IA-NEXT: addi a4, zero, 255
1881; RV32IA-NEXT: sll a7, a4, a2
1882; RV32IA-NEXT: slli a1, a1, 24
1883; RV32IA-NEXT: srai a1, a1, 24
1884; RV32IA-NEXT: sll a1, a1, a2
1885; RV32IA-NEXT: andi a0, a0, -4
1886; RV32IA-NEXT: .LBB44_1: # =>This Inner Loop Header: Depth=1
1887; RV32IA-NEXT: lr.w.aqrl a5, (a0)
1888; RV32IA-NEXT: and a4, a5, a7
1889; RV32IA-NEXT: mv a3, a5
1890; RV32IA-NEXT: sll a4, a4, a6
1891; RV32IA-NEXT: sra a4, a4, a6
1892; RV32IA-NEXT: bge a1, a4, .LBB44_3
1893; RV32IA-NEXT: # %bb.2: # in Loop: Header=BB44_1 Depth=1
1894; RV32IA-NEXT: xor a3, a5, a1
1895; RV32IA-NEXT: and a3, a3, a7
1896; RV32IA-NEXT: xor a3, a5, a3
1897; RV32IA-NEXT: .LBB44_3: # in Loop: Header=BB44_1 Depth=1
1898; RV32IA-NEXT: sc.w.aqrl a3, a3, (a0)
1899; RV32IA-NEXT: bnez a3, .LBB44_1
1900; RV32IA-NEXT: # %bb.4:
1901; RV32IA-NEXT: srl a0, a5, a2
1902; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]1903 %1 = atomicrmw min i8* %a, i8 %b seq_cst
1904 ret i8 %1
1905}
1906
1907define i8 @atomicrmw_umax_i8_monotonic(i8 *%a, i8 %b) nounwind {
1908; RV32I-LABEL: atomicrmw_umax_i8_monotonic:
1909; RV32I: # %bb.0:
1910; RV32I-NEXT: addi sp, sp, -32
1911; RV32I-NEXT: sw ra, 28(sp)
1912; RV32I-NEXT: sw s1, 24(sp)
1913; RV32I-NEXT: sw s2, 20(sp)
1914; RV32I-NEXT: sw s3, 16(sp)
1915; RV32I-NEXT: sw s4, 12(sp)
1916; RV32I-NEXT: mv s2, a1
1917; RV32I-NEXT: mv s4, a0
1918; RV32I-NEXT: lbu a0, 0(a0)
1919; RV32I-NEXT: andi s1, a1, 255
1920; RV32I-NEXT: addi s3, sp, 11
1921; RV32I-NEXT: .LBB45_1: # %atomicrmw.start
1922; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
1923; RV32I-NEXT: andi a1, a0, 255
1924; RV32I-NEXT: mv a2, a0
1925; RV32I-NEXT: bltu s1, a1, .LBB45_3
1926; RV32I-NEXT: # %bb.2: # %atomicrmw.start
1927; RV32I-NEXT: # in Loop: Header=BB45_1 Depth=1
1928; RV32I-NEXT: mv a2, s2
1929; RV32I-NEXT: .LBB45_3: # %atomicrmw.start
1930; RV32I-NEXT: # in Loop: Header=BB45_1 Depth=1
1931; RV32I-NEXT: sb a0, 11(sp)
1932; RV32I-NEXT: mv a0, s4
1933; RV32I-NEXT: mv a1, s3
1934; RV32I-NEXT: mv a3, zero
1935; RV32I-NEXT: mv a4, zero
1936; RV32I-NEXT: call __atomic_compare_exchange_1
1937; RV32I-NEXT: mv a1, a0
1938; RV32I-NEXT: lb a0, 11(sp)
1939; RV32I-NEXT: beqz a1, .LBB45_1
1940; RV32I-NEXT: # %bb.4: # %atomicrmw.end
1941; RV32I-NEXT: lw s4, 12(sp)
1942; RV32I-NEXT: lw s3, 16(sp)
1943; RV32I-NEXT: lw s2, 20(sp)
1944; RV32I-NEXT: lw s1, 24(sp)
1945; RV32I-NEXT: lw ra, 28(sp)
1946; RV32I-NEXT: addi sp, sp, 32
1947; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]1948;
1949; RV32IA-LABEL: atomicrmw_umax_i8_monotonic:
1950; RV32IA: # %bb.0:
1951; RV32IA-NEXT: slli a2, a0, 3
1952; RV32IA-NEXT: andi a2, a2, 24
1953; RV32IA-NEXT: addi a3, zero, 255
1954; RV32IA-NEXT: sll a6, a3, a2
1955; RV32IA-NEXT: andi a1, a1, 255
1956; RV32IA-NEXT: sll a1, a1, a2
1957; RV32IA-NEXT: andi a0, a0, -4
1958; RV32IA-NEXT: .LBB45_1: # =>This Inner Loop Header: Depth=1
1959; RV32IA-NEXT: lr.w a4, (a0)
1960; RV32IA-NEXT: and a3, a4, a6
1961; RV32IA-NEXT: mv a5, a4
1962; RV32IA-NEXT: bgeu a3, a1, .LBB45_3
1963; RV32IA-NEXT: # %bb.2: # in Loop: Header=BB45_1 Depth=1
1964; RV32IA-NEXT: xor a5, a4, a1
1965; RV32IA-NEXT: and a5, a5, a6
1966; RV32IA-NEXT: xor a5, a4, a5
1967; RV32IA-NEXT: .LBB45_3: # in Loop: Header=BB45_1 Depth=1
1968; RV32IA-NEXT: sc.w a5, a5, (a0)
1969; RV32IA-NEXT: bnez a5, .LBB45_1
1970; RV32IA-NEXT: # %bb.4:
1971; RV32IA-NEXT: srl a0, a4, a2
1972; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]1973 %1 = atomicrmw umax i8* %a, i8 %b monotonic
1974 ret i8 %1
1975}
1976
1977define i8 @atomicrmw_umax_i8_acquire(i8 *%a, i8 %b) nounwind {
1978; RV32I-LABEL: atomicrmw_umax_i8_acquire:
1979; RV32I: # %bb.0:
1980; RV32I-NEXT: addi sp, sp, -32
1981; RV32I-NEXT: sw ra, 28(sp)
1982; RV32I-NEXT: sw s1, 24(sp)
1983; RV32I-NEXT: sw s2, 20(sp)
1984; RV32I-NEXT: sw s3, 16(sp)
1985; RV32I-NEXT: sw s4, 12(sp)
1986; RV32I-NEXT: sw s5, 8(sp)
1987; RV32I-NEXT: mv s2, a1
1988; RV32I-NEXT: mv s4, a0
1989; RV32I-NEXT: lbu a0, 0(a0)
1990; RV32I-NEXT: andi s5, a1, 255
1991; RV32I-NEXT: addi s3, sp, 7
1992; RV32I-NEXT: addi s1, zero, 2
1993; RV32I-NEXT: .LBB46_1: # %atomicrmw.start
1994; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
1995; RV32I-NEXT: andi a1, a0, 255
1996; RV32I-NEXT: mv a2, a0
1997; RV32I-NEXT: bltu s5, a1, .LBB46_3
1998; RV32I-NEXT: # %bb.2: # %atomicrmw.start
1999; RV32I-NEXT: # in Loop: Header=BB46_1 Depth=1
2000; RV32I-NEXT: mv a2, s2
2001; RV32I-NEXT: .LBB46_3: # %atomicrmw.start
2002; RV32I-NEXT: # in Loop: Header=BB46_1 Depth=1
2003; RV32I-NEXT: sb a0, 7(sp)
2004; RV32I-NEXT: mv a0, s4
2005; RV32I-NEXT: mv a1, s3
2006; RV32I-NEXT: mv a3, s1
2007; RV32I-NEXT: mv a4, s1
2008; RV32I-NEXT: call __atomic_compare_exchange_1
2009; RV32I-NEXT: mv a1, a0
2010; RV32I-NEXT: lb a0, 7(sp)
2011; RV32I-NEXT: beqz a1, .LBB46_1
2012; RV32I-NEXT: # %bb.4: # %atomicrmw.end
2013; RV32I-NEXT: lw s5, 8(sp)
2014; RV32I-NEXT: lw s4, 12(sp)
2015; RV32I-NEXT: lw s3, 16(sp)
2016; RV32I-NEXT: lw s2, 20(sp)
2017; RV32I-NEXT: lw s1, 24(sp)
2018; RV32I-NEXT: lw ra, 28(sp)
2019; RV32I-NEXT: addi sp, sp, 32
2020; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]2021;
2022; RV32IA-LABEL: atomicrmw_umax_i8_acquire:
2023; RV32IA: # %bb.0:
2024; RV32IA-NEXT: slli a2, a0, 3
2025; RV32IA-NEXT: andi a2, a2, 24
2026; RV32IA-NEXT: addi a3, zero, 255
2027; RV32IA-NEXT: sll a6, a3, a2
2028; RV32IA-NEXT: andi a1, a1, 255
2029; RV32IA-NEXT: sll a1, a1, a2
2030; RV32IA-NEXT: andi a0, a0, -4
2031; RV32IA-NEXT: .LBB46_1: # =>This Inner Loop Header: Depth=1
2032; RV32IA-NEXT: lr.w.aq a4, (a0)
2033; RV32IA-NEXT: and a3, a4, a6
2034; RV32IA-NEXT: mv a5, a4
2035; RV32IA-NEXT: bgeu a3, a1, .LBB46_3
2036; RV32IA-NEXT: # %bb.2: # in Loop: Header=BB46_1 Depth=1
2037; RV32IA-NEXT: xor a5, a4, a1
2038; RV32IA-NEXT: and a5, a5, a6
2039; RV32IA-NEXT: xor a5, a4, a5
2040; RV32IA-NEXT: .LBB46_3: # in Loop: Header=BB46_1 Depth=1
2041; RV32IA-NEXT: sc.w a5, a5, (a0)
2042; RV32IA-NEXT: bnez a5, .LBB46_1
2043; RV32IA-NEXT: # %bb.4:
2044; RV32IA-NEXT: srl a0, a4, a2
2045; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]2046 %1 = atomicrmw umax i8* %a, i8 %b acquire
2047 ret i8 %1
2048}
2049
2050define i8 @atomicrmw_umax_i8_release(i8 *%a, i8 %b) nounwind {
2051; RV32I-LABEL: atomicrmw_umax_i8_release:
2052; RV32I: # %bb.0:
2053; RV32I-NEXT: addi sp, sp, -32
2054; RV32I-NEXT: sw ra, 28(sp)
2055; RV32I-NEXT: sw s1, 24(sp)
2056; RV32I-NEXT: sw s2, 20(sp)
2057; RV32I-NEXT: sw s3, 16(sp)
2058; RV32I-NEXT: sw s4, 12(sp)
2059; RV32I-NEXT: sw s5, 8(sp)
2060; RV32I-NEXT: mv s2, a1
2061; RV32I-NEXT: mv s5, a0
2062; RV32I-NEXT: lbu a0, 0(a0)
2063; RV32I-NEXT: andi s1, a1, 255
2064; RV32I-NEXT: addi s3, sp, 7
2065; RV32I-NEXT: addi s4, zero, 3
2066; RV32I-NEXT: .LBB47_1: # %atomicrmw.start
2067; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
2068; RV32I-NEXT: andi a1, a0, 255
2069; RV32I-NEXT: mv a2, a0
2070; RV32I-NEXT: bltu s1, a1, .LBB47_3
2071; RV32I-NEXT: # %bb.2: # %atomicrmw.start
2072; RV32I-NEXT: # in Loop: Header=BB47_1 Depth=1
2073; RV32I-NEXT: mv a2, s2
2074; RV32I-NEXT: .LBB47_3: # %atomicrmw.start
2075; RV32I-NEXT: # in Loop: Header=BB47_1 Depth=1
2076; RV32I-NEXT: sb a0, 7(sp)
2077; RV32I-NEXT: mv a0, s5
2078; RV32I-NEXT: mv a1, s3
2079; RV32I-NEXT: mv a3, s4
2080; RV32I-NEXT: mv a4, zero
2081; RV32I-NEXT: call __atomic_compare_exchange_1
2082; RV32I-NEXT: mv a1, a0
2083; RV32I-NEXT: lb a0, 7(sp)
2084; RV32I-NEXT: beqz a1, .LBB47_1
2085; RV32I-NEXT: # %bb.4: # %atomicrmw.end
2086; RV32I-NEXT: lw s5, 8(sp)
2087; RV32I-NEXT: lw s4, 12(sp)
2088; RV32I-NEXT: lw s3, 16(sp)
2089; RV32I-NEXT: lw s2, 20(sp)
2090; RV32I-NEXT: lw s1, 24(sp)
2091; RV32I-NEXT: lw ra, 28(sp)
2092; RV32I-NEXT: addi sp, sp, 32
2093; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]2094;
2095; RV32IA-LABEL: atomicrmw_umax_i8_release:
2096; RV32IA: # %bb.0:
2097; RV32IA-NEXT: slli a2, a0, 3
2098; RV32IA-NEXT: andi a2, a2, 24
2099; RV32IA-NEXT: addi a3, zero, 255
2100; RV32IA-NEXT: sll a6, a3, a2
2101; RV32IA-NEXT: andi a1, a1, 255
2102; RV32IA-NEXT: sll a1, a1, a2
2103; RV32IA-NEXT: andi a0, a0, -4
2104; RV32IA-NEXT: .LBB47_1: # =>This Inner Loop Header: Depth=1
2105; RV32IA-NEXT: lr.w a4, (a0)
2106; RV32IA-NEXT: and a3, a4, a6
2107; RV32IA-NEXT: mv a5, a4
2108; RV32IA-NEXT: bgeu a3, a1, .LBB47_3
2109; RV32IA-NEXT: # %bb.2: # in Loop: Header=BB47_1 Depth=1
2110; RV32IA-NEXT: xor a5, a4, a1
2111; RV32IA-NEXT: and a5, a5, a6
2112; RV32IA-NEXT: xor a5, a4, a5
2113; RV32IA-NEXT: .LBB47_3: # in Loop: Header=BB47_1 Depth=1
2114; RV32IA-NEXT: sc.w.rl a5, a5, (a0)
2115; RV32IA-NEXT: bnez a5, .LBB47_1
2116; RV32IA-NEXT: # %bb.4:
2117; RV32IA-NEXT: srl a0, a4, a2
2118; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]2119 %1 = atomicrmw umax i8* %a, i8 %b release
2120 ret i8 %1
2121}
2122
2123define i8 @atomicrmw_umax_i8_acq_rel(i8 *%a, i8 %b) nounwind {
2124; RV32I-LABEL: atomicrmw_umax_i8_acq_rel:
2125; RV32I: # %bb.0:
2126; RV32I-NEXT: addi sp, sp, -32
2127; RV32I-NEXT: sw ra, 28(sp)
2128; RV32I-NEXT: sw s1, 24(sp)
2129; RV32I-NEXT: sw s2, 20(sp)
2130; RV32I-NEXT: sw s3, 16(sp)
2131; RV32I-NEXT: sw s4, 12(sp)
2132; RV32I-NEXT: sw s5, 8(sp)
2133; RV32I-NEXT: sw s6, 4(sp)
2134; RV32I-NEXT: mv s2, a1
2135; RV32I-NEXT: mv s6, a0
2136; RV32I-NEXT: lbu a0, 0(a0)
2137; RV32I-NEXT: andi s1, a1, 255
2138; RV32I-NEXT: addi s3, sp, 3
2139; RV32I-NEXT: addi s4, zero, 4
2140; RV32I-NEXT: addi s5, zero, 2
2141; RV32I-NEXT: .LBB48_1: # %atomicrmw.start
2142; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
2143; RV32I-NEXT: andi a1, a0, 255
2144; RV32I-NEXT: mv a2, a0
2145; RV32I-NEXT: bltu s1, a1, .LBB48_3
2146; RV32I-NEXT: # %bb.2: # %atomicrmw.start
2147; RV32I-NEXT: # in Loop: Header=BB48_1 Depth=1
2148; RV32I-NEXT: mv a2, s2
2149; RV32I-NEXT: .LBB48_3: # %atomicrmw.start
2150; RV32I-NEXT: # in Loop: Header=BB48_1 Depth=1
2151; RV32I-NEXT: sb a0, 3(sp)
2152; RV32I-NEXT: mv a0, s6
2153; RV32I-NEXT: mv a1, s3
2154; RV32I-NEXT: mv a3, s4
2155; RV32I-NEXT: mv a4, s5
2156; RV32I-NEXT: call __atomic_compare_exchange_1
2157; RV32I-NEXT: mv a1, a0
2158; RV32I-NEXT: lb a0, 3(sp)
2159; RV32I-NEXT: beqz a1, .LBB48_1
2160; RV32I-NEXT: # %bb.4: # %atomicrmw.end
2161; RV32I-NEXT: lw s6, 4(sp)
2162; RV32I-NEXT: lw s5, 8(sp)
2163; RV32I-NEXT: lw s4, 12(sp)
2164; RV32I-NEXT: lw s3, 16(sp)
2165; RV32I-NEXT: lw s2, 20(sp)
2166; RV32I-NEXT: lw s1, 24(sp)
2167; RV32I-NEXT: lw ra, 28(sp)
2168; RV32I-NEXT: addi sp, sp, 32
2169; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]2170;
2171; RV32IA-LABEL: atomicrmw_umax_i8_acq_rel:
2172; RV32IA: # %bb.0:
2173; RV32IA-NEXT: slli a2, a0, 3
2174; RV32IA-NEXT: andi a2, a2, 24
2175; RV32IA-NEXT: addi a3, zero, 255
2176; RV32IA-NEXT: sll a6, a3, a2
2177; RV32IA-NEXT: andi a1, a1, 255
2178; RV32IA-NEXT: sll a1, a1, a2
2179; RV32IA-NEXT: andi a0, a0, -4
2180; RV32IA-NEXT: .LBB48_1: # =>This Inner Loop Header: Depth=1
2181; RV32IA-NEXT: lr.w.aq a4, (a0)
2182; RV32IA-NEXT: and a3, a4, a6
2183; RV32IA-NEXT: mv a5, a4
2184; RV32IA-NEXT: bgeu a3, a1, .LBB48_3
2185; RV32IA-NEXT: # %bb.2: # in Loop: Header=BB48_1 Depth=1
2186; RV32IA-NEXT: xor a5, a4, a1
2187; RV32IA-NEXT: and a5, a5, a6
2188; RV32IA-NEXT: xor a5, a4, a5
2189; RV32IA-NEXT: .LBB48_3: # in Loop: Header=BB48_1 Depth=1
2190; RV32IA-NEXT: sc.w.rl a5, a5, (a0)
2191; RV32IA-NEXT: bnez a5, .LBB48_1
2192; RV32IA-NEXT: # %bb.4:
2193; RV32IA-NEXT: srl a0, a4, a2
2194; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]2195 %1 = atomicrmw umax i8* %a, i8 %b acq_rel
2196 ret i8 %1
2197}
2198
2199define i8 @atomicrmw_umax_i8_seq_cst(i8 *%a, i8 %b) nounwind {
2200; RV32I-LABEL: atomicrmw_umax_i8_seq_cst:
2201; RV32I: # %bb.0:
2202; RV32I-NEXT: addi sp, sp, -32
2203; RV32I-NEXT: sw ra, 28(sp)
2204; RV32I-NEXT: sw s1, 24(sp)
2205; RV32I-NEXT: sw s2, 20(sp)
2206; RV32I-NEXT: sw s3, 16(sp)
2207; RV32I-NEXT: sw s4, 12(sp)
2208; RV32I-NEXT: sw s5, 8(sp)
2209; RV32I-NEXT: mv s2, a1
2210; RV32I-NEXT: mv s4, a0
2211; RV32I-NEXT: lbu a0, 0(a0)
2212; RV32I-NEXT: andi s5, a1, 255
2213; RV32I-NEXT: addi s3, sp, 7
2214; RV32I-NEXT: addi s1, zero, 5
2215; RV32I-NEXT: .LBB49_1: # %atomicrmw.start
2216; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
2217; RV32I-NEXT: andi a1, a0, 255
2218; RV32I-NEXT: mv a2, a0
2219; RV32I-NEXT: bltu s5, a1, .LBB49_3
2220; RV32I-NEXT: # %bb.2: # %atomicrmw.start
2221; RV32I-NEXT: # in Loop: Header=BB49_1 Depth=1
2222; RV32I-NEXT: mv a2, s2
2223; RV32I-NEXT: .LBB49_3: # %atomicrmw.start
2224; RV32I-NEXT: # in Loop: Header=BB49_1 Depth=1
2225; RV32I-NEXT: sb a0, 7(sp)
2226; RV32I-NEXT: mv a0, s4
2227; RV32I-NEXT: mv a1, s3
2228; RV32I-NEXT: mv a3, s1
2229; RV32I-NEXT: mv a4, s1
2230; RV32I-NEXT: call __atomic_compare_exchange_1
2231; RV32I-NEXT: mv a1, a0
2232; RV32I-NEXT: lb a0, 7(sp)
2233; RV32I-NEXT: beqz a1, .LBB49_1
2234; RV32I-NEXT: # %bb.4: # %atomicrmw.end
2235; RV32I-NEXT: lw s5, 8(sp)
2236; RV32I-NEXT: lw s4, 12(sp)
2237; RV32I-NEXT: lw s3, 16(sp)
2238; RV32I-NEXT: lw s2, 20(sp)
2239; RV32I-NEXT: lw s1, 24(sp)
2240; RV32I-NEXT: lw ra, 28(sp)
2241; RV32I-NEXT: addi sp, sp, 32
2242; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]2243;
2244; RV32IA-LABEL: atomicrmw_umax_i8_seq_cst:
2245; RV32IA: # %bb.0:
2246; RV32IA-NEXT: slli a2, a0, 3
2247; RV32IA-NEXT: andi a2, a2, 24
2248; RV32IA-NEXT: addi a3, zero, 255
2249; RV32IA-NEXT: sll a6, a3, a2
2250; RV32IA-NEXT: andi a1, a1, 255
2251; RV32IA-NEXT: sll a1, a1, a2
2252; RV32IA-NEXT: andi a0, a0, -4
2253; RV32IA-NEXT: .LBB49_1: # =>This Inner Loop Header: Depth=1
2254; RV32IA-NEXT: lr.w.aqrl a4, (a0)
2255; RV32IA-NEXT: and a3, a4, a6
2256; RV32IA-NEXT: mv a5, a4
2257; RV32IA-NEXT: bgeu a3, a1, .LBB49_3
2258; RV32IA-NEXT: # %bb.2: # in Loop: Header=BB49_1 Depth=1
2259; RV32IA-NEXT: xor a5, a4, a1
2260; RV32IA-NEXT: and a5, a5, a6
2261; RV32IA-NEXT: xor a5, a4, a5
2262; RV32IA-NEXT: .LBB49_3: # in Loop: Header=BB49_1 Depth=1
2263; RV32IA-NEXT: sc.w.aqrl a5, a5, (a0)
2264; RV32IA-NEXT: bnez a5, .LBB49_1
2265; RV32IA-NEXT: # %bb.4:
2266; RV32IA-NEXT: srl a0, a4, a2
2267; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]2268 %1 = atomicrmw umax i8* %a, i8 %b seq_cst
2269 ret i8 %1
2270}
2271
2272define i8 @atomicrmw_umin_i8_monotonic(i8 *%a, i8 %b) nounwind {
2273; RV32I-LABEL: atomicrmw_umin_i8_monotonic:
2274; RV32I: # %bb.0:
2275; RV32I-NEXT: addi sp, sp, -32
2276; RV32I-NEXT: sw ra, 28(sp)
2277; RV32I-NEXT: sw s1, 24(sp)
2278; RV32I-NEXT: sw s2, 20(sp)
2279; RV32I-NEXT: sw s3, 16(sp)
2280; RV32I-NEXT: sw s4, 12(sp)
2281; RV32I-NEXT: mv s2, a1
2282; RV32I-NEXT: mv s4, a0
2283; RV32I-NEXT: lbu a0, 0(a0)
2284; RV32I-NEXT: andi s1, a1, 255
2285; RV32I-NEXT: addi s3, sp, 11
2286; RV32I-NEXT: .LBB50_1: # %atomicrmw.start
2287; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
2288; RV32I-NEXT: andi a1, a0, 255
2289; RV32I-NEXT: mv a2, a0
2290; RV32I-NEXT: bgeu s1, a1, .LBB50_3
2291; RV32I-NEXT: # %bb.2: # %atomicrmw.start
2292; RV32I-NEXT: # in Loop: Header=BB50_1 Depth=1
2293; RV32I-NEXT: mv a2, s2
2294; RV32I-NEXT: .LBB50_3: # %atomicrmw.start
2295; RV32I-NEXT: # in Loop: Header=BB50_1 Depth=1
2296; RV32I-NEXT: sb a0, 11(sp)
2297; RV32I-NEXT: mv a0, s4
2298; RV32I-NEXT: mv a1, s3
2299; RV32I-NEXT: mv a3, zero
2300; RV32I-NEXT: mv a4, zero
2301; RV32I-NEXT: call __atomic_compare_exchange_1
2302; RV32I-NEXT: mv a1, a0
2303; RV32I-NEXT: lb a0, 11(sp)
2304; RV32I-NEXT: beqz a1, .LBB50_1
2305; RV32I-NEXT: # %bb.4: # %atomicrmw.end
2306; RV32I-NEXT: lw s4, 12(sp)
2307; RV32I-NEXT: lw s3, 16(sp)
2308; RV32I-NEXT: lw s2, 20(sp)
2309; RV32I-NEXT: lw s1, 24(sp)
2310; RV32I-NEXT: lw ra, 28(sp)
2311; RV32I-NEXT: addi sp, sp, 32
2312; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]2313;
2314; RV32IA-LABEL: atomicrmw_umin_i8_monotonic:
2315; RV32IA: # %bb.0:
2316; RV32IA-NEXT: slli a2, a0, 3
2317; RV32IA-NEXT: andi a2, a2, 24
2318; RV32IA-NEXT: addi a3, zero, 255
2319; RV32IA-NEXT: sll a6, a3, a2
2320; RV32IA-NEXT: andi a1, a1, 255
2321; RV32IA-NEXT: sll a1, a1, a2
2322; RV32IA-NEXT: andi a0, a0, -4
2323; RV32IA-NEXT: .LBB50_1: # =>This Inner Loop Header: Depth=1
2324; RV32IA-NEXT: lr.w a4, (a0)
2325; RV32IA-NEXT: and a3, a4, a6
2326; RV32IA-NEXT: mv a5, a4
2327; RV32IA-NEXT: bgeu a1, a3, .LBB50_3
2328; RV32IA-NEXT: # %bb.2: # in Loop: Header=BB50_1 Depth=1
2329; RV32IA-NEXT: xor a5, a4, a1
2330; RV32IA-NEXT: and a5, a5, a6
2331; RV32IA-NEXT: xor a5, a4, a5
2332; RV32IA-NEXT: .LBB50_3: # in Loop: Header=BB50_1 Depth=1
2333; RV32IA-NEXT: sc.w a5, a5, (a0)
2334; RV32IA-NEXT: bnez a5, .LBB50_1
2335; RV32IA-NEXT: # %bb.4:
2336; RV32IA-NEXT: srl a0, a4, a2
2337; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]2338 %1 = atomicrmw umin i8* %a, i8 %b monotonic
2339 ret i8 %1
2340}
2341
2342define i8 @atomicrmw_umin_i8_acquire(i8 *%a, i8 %b) nounwind {
2343; RV32I-LABEL: atomicrmw_umin_i8_acquire:
2344; RV32I: # %bb.0:
2345; RV32I-NEXT: addi sp, sp, -32
2346; RV32I-NEXT: sw ra, 28(sp)
2347; RV32I-NEXT: sw s1, 24(sp)
2348; RV32I-NEXT: sw s2, 20(sp)
2349; RV32I-NEXT: sw s3, 16(sp)
2350; RV32I-NEXT: sw s4, 12(sp)
2351; RV32I-NEXT: sw s5, 8(sp)
2352; RV32I-NEXT: mv s2, a1
2353; RV32I-NEXT: mv s4, a0
2354; RV32I-NEXT: lbu a0, 0(a0)
2355; RV32I-NEXT: andi s5, a1, 255
2356; RV32I-NEXT: addi s3, sp, 7
2357; RV32I-NEXT: addi s1, zero, 2
2358; RV32I-NEXT: .LBB51_1: # %atomicrmw.start
2359; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
2360; RV32I-NEXT: andi a1, a0, 255
2361; RV32I-NEXT: mv a2, a0
2362; RV32I-NEXT: bgeu s5, a1, .LBB51_3
2363; RV32I-NEXT: # %bb.2: # %atomicrmw.start
2364; RV32I-NEXT: # in Loop: Header=BB51_1 Depth=1
2365; RV32I-NEXT: mv a2, s2
2366; RV32I-NEXT: .LBB51_3: # %atomicrmw.start
2367; RV32I-NEXT: # in Loop: Header=BB51_1 Depth=1
2368; RV32I-NEXT: sb a0, 7(sp)
2369; RV32I-NEXT: mv a0, s4
2370; RV32I-NEXT: mv a1, s3
2371; RV32I-NEXT: mv a3, s1
2372; RV32I-NEXT: mv a4, s1
2373; RV32I-NEXT: call __atomic_compare_exchange_1
2374; RV32I-NEXT: mv a1, a0
2375; RV32I-NEXT: lb a0, 7(sp)
2376; RV32I-NEXT: beqz a1, .LBB51_1
2377; RV32I-NEXT: # %bb.4: # %atomicrmw.end
2378; RV32I-NEXT: lw s5, 8(sp)
2379; RV32I-NEXT: lw s4, 12(sp)
2380; RV32I-NEXT: lw s3, 16(sp)
2381; RV32I-NEXT: lw s2, 20(sp)
2382; RV32I-NEXT: lw s1, 24(sp)
2383; RV32I-NEXT: lw ra, 28(sp)
2384; RV32I-NEXT: addi sp, sp, 32
2385; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]2386;
2387; RV32IA-LABEL: atomicrmw_umin_i8_acquire:
2388; RV32IA: # %bb.0:
2389; RV32IA-NEXT: slli a2, a0, 3
2390; RV32IA-NEXT: andi a2, a2, 24
2391; RV32IA-NEXT: addi a3, zero, 255
2392; RV32IA-NEXT: sll a6, a3, a2
2393; RV32IA-NEXT: andi a1, a1, 255
2394; RV32IA-NEXT: sll a1, a1, a2
2395; RV32IA-NEXT: andi a0, a0, -4
2396; RV32IA-NEXT: .LBB51_1: # =>This Inner Loop Header: Depth=1
2397; RV32IA-NEXT: lr.w.aq a4, (a0)
2398; RV32IA-NEXT: and a3, a4, a6
2399; RV32IA-NEXT: mv a5, a4
2400; RV32IA-NEXT: bgeu a1, a3, .LBB51_3
2401; RV32IA-NEXT: # %bb.2: # in Loop: Header=BB51_1 Depth=1
2402; RV32IA-NEXT: xor a5, a4, a1
2403; RV32IA-NEXT: and a5, a5, a6
2404; RV32IA-NEXT: xor a5, a4, a5
2405; RV32IA-NEXT: .LBB51_3: # in Loop: Header=BB51_1 Depth=1
2406; RV32IA-NEXT: sc.w a5, a5, (a0)
2407; RV32IA-NEXT: bnez a5, .LBB51_1
2408; RV32IA-NEXT: # %bb.4:
2409; RV32IA-NEXT: srl a0, a4, a2
2410; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]2411 %1 = atomicrmw umin i8* %a, i8 %b acquire
2412 ret i8 %1
2413}
2414
2415define i8 @atomicrmw_umin_i8_release(i8 *%a, i8 %b) nounwind {
2416; RV32I-LABEL: atomicrmw_umin_i8_release:
2417; RV32I: # %bb.0:
2418; RV32I-NEXT: addi sp, sp, -32
2419; RV32I-NEXT: sw ra, 28(sp)
2420; RV32I-NEXT: sw s1, 24(sp)
2421; RV32I-NEXT: sw s2, 20(sp)
2422; RV32I-NEXT: sw s3, 16(sp)
2423; RV32I-NEXT: sw s4, 12(sp)
2424; RV32I-NEXT: sw s5, 8(sp)
2425; RV32I-NEXT: mv s2, a1
2426; RV32I-NEXT: mv s5, a0
2427; RV32I-NEXT: lbu a0, 0(a0)
2428; RV32I-NEXT: andi s1, a1, 255
2429; RV32I-NEXT: addi s3, sp, 7
2430; RV32I-NEXT: addi s4, zero, 3
2431; RV32I-NEXT: .LBB52_1: # %atomicrmw.start
2432; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
2433; RV32I-NEXT: andi a1, a0, 255
2434; RV32I-NEXT: mv a2, a0
2435; RV32I-NEXT: bgeu s1, a1, .LBB52_3
2436; RV32I-NEXT: # %bb.2: # %atomicrmw.start
2437; RV32I-NEXT: # in Loop: Header=BB52_1 Depth=1
2438; RV32I-NEXT: mv a2, s2
2439; RV32I-NEXT: .LBB52_3: # %atomicrmw.start
2440; RV32I-NEXT: # in Loop: Header=BB52_1 Depth=1
2441; RV32I-NEXT: sb a0, 7(sp)
2442; RV32I-NEXT: mv a0, s5
2443; RV32I-NEXT: mv a1, s3
2444; RV32I-NEXT: mv a3, s4
2445; RV32I-NEXT: mv a4, zero
2446; RV32I-NEXT: call __atomic_compare_exchange_1
2447; RV32I-NEXT: mv a1, a0
2448; RV32I-NEXT: lb a0, 7(sp)
2449; RV32I-NEXT: beqz a1, .LBB52_1
2450; RV32I-NEXT: # %bb.4: # %atomicrmw.end
2451; RV32I-NEXT: lw s5, 8(sp)
2452; RV32I-NEXT: lw s4, 12(sp)
2453; RV32I-NEXT: lw s3, 16(sp)
2454; RV32I-NEXT: lw s2, 20(sp)
2455; RV32I-NEXT: lw s1, 24(sp)
2456; RV32I-NEXT: lw ra, 28(sp)
2457; RV32I-NEXT: addi sp, sp, 32
2458; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]2459;
2460; RV32IA-LABEL: atomicrmw_umin_i8_release:
2461; RV32IA: # %bb.0:
2462; RV32IA-NEXT: slli a2, a0, 3
2463; RV32IA-NEXT: andi a2, a2, 24
2464; RV32IA-NEXT: addi a3, zero, 255
2465; RV32IA-NEXT: sll a6, a3, a2
2466; RV32IA-NEXT: andi a1, a1, 255
2467; RV32IA-NEXT: sll a1, a1, a2
2468; RV32IA-NEXT: andi a0, a0, -4
2469; RV32IA-NEXT: .LBB52_1: # =>This Inner Loop Header: Depth=1
2470; RV32IA-NEXT: lr.w a4, (a0)
2471; RV32IA-NEXT: and a3, a4, a6
2472; RV32IA-NEXT: mv a5, a4
2473; RV32IA-NEXT: bgeu a1, a3, .LBB52_3
2474; RV32IA-NEXT: # %bb.2: # in Loop: Header=BB52_1 Depth=1
2475; RV32IA-NEXT: xor a5, a4, a1
2476; RV32IA-NEXT: and a5, a5, a6
2477; RV32IA-NEXT: xor a5, a4, a5
2478; RV32IA-NEXT: .LBB52_3: # in Loop: Header=BB52_1 Depth=1
2479; RV32IA-NEXT: sc.w.rl a5, a5, (a0)
2480; RV32IA-NEXT: bnez a5, .LBB52_1
2481; RV32IA-NEXT: # %bb.4:
2482; RV32IA-NEXT: srl a0, a4, a2
2483; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]2484 %1 = atomicrmw umin i8* %a, i8 %b release
2485 ret i8 %1
2486}
2487
2488define i8 @atomicrmw_umin_i8_acq_rel(i8 *%a, i8 %b) nounwind {
2489; RV32I-LABEL: atomicrmw_umin_i8_acq_rel:
2490; RV32I: # %bb.0:
2491; RV32I-NEXT: addi sp, sp, -32
2492; RV32I-NEXT: sw ra, 28(sp)
2493; RV32I-NEXT: sw s1, 24(sp)
2494; RV32I-NEXT: sw s2, 20(sp)
2495; RV32I-NEXT: sw s3, 16(sp)
2496; RV32I-NEXT: sw s4, 12(sp)
2497; RV32I-NEXT: sw s5, 8(sp)
2498; RV32I-NEXT: sw s6, 4(sp)
2499; RV32I-NEXT: mv s2, a1
2500; RV32I-NEXT: mv s6, a0
2501; RV32I-NEXT: lbu a0, 0(a0)
2502; RV32I-NEXT: andi s1, a1, 255
2503; RV32I-NEXT: addi s3, sp, 3
2504; RV32I-NEXT: addi s4, zero, 4
2505; RV32I-NEXT: addi s5, zero, 2
2506; RV32I-NEXT: .LBB53_1: # %atomicrmw.start
2507; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
2508; RV32I-NEXT: andi a1, a0, 255
2509; RV32I-NEXT: mv a2, a0
2510; RV32I-NEXT: bgeu s1, a1, .LBB53_3
2511; RV32I-NEXT: # %bb.2: # %atomicrmw.start
2512; RV32I-NEXT: # in Loop: Header=BB53_1 Depth=1
2513; RV32I-NEXT: mv a2, s2
2514; RV32I-NEXT: .LBB53_3: # %atomicrmw.start
2515; RV32I-NEXT: # in Loop: Header=BB53_1 Depth=1
2516; RV32I-NEXT: sb a0, 3(sp)
2517; RV32I-NEXT: mv a0, s6
2518; RV32I-NEXT: mv a1, s3
2519; RV32I-NEXT: mv a3, s4
2520; RV32I-NEXT: mv a4, s5
2521; RV32I-NEXT: call __atomic_compare_exchange_1
2522; RV32I-NEXT: mv a1, a0
2523; RV32I-NEXT: lb a0, 3(sp)
2524; RV32I-NEXT: beqz a1, .LBB53_1
2525; RV32I-NEXT: # %bb.4: # %atomicrmw.end
2526; RV32I-NEXT: lw s6, 4(sp)
2527; RV32I-NEXT: lw s5, 8(sp)
2528; RV32I-NEXT: lw s4, 12(sp)
2529; RV32I-NEXT: lw s3, 16(sp)
2530; RV32I-NEXT: lw s2, 20(sp)
2531; RV32I-NEXT: lw s1, 24(sp)
2532; RV32I-NEXT: lw ra, 28(sp)
2533; RV32I-NEXT: addi sp, sp, 32
2534; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]2535;
2536; RV32IA-LABEL: atomicrmw_umin_i8_acq_rel:
2537; RV32IA: # %bb.0:
2538; RV32IA-NEXT: slli a2, a0, 3
2539; RV32IA-NEXT: andi a2, a2, 24
2540; RV32IA-NEXT: addi a3, zero, 255
2541; RV32IA-NEXT: sll a6, a3, a2
2542; RV32IA-NEXT: andi a1, a1, 255
2543; RV32IA-NEXT: sll a1, a1, a2
2544; RV32IA-NEXT: andi a0, a0, -4
2545; RV32IA-NEXT: .LBB53_1: # =>This Inner Loop Header: Depth=1
2546; RV32IA-NEXT: lr.w.aq a4, (a0)
2547; RV32IA-NEXT: and a3, a4, a6
2548; RV32IA-NEXT: mv a5, a4
2549; RV32IA-NEXT: bgeu a1, a3, .LBB53_3
2550; RV32IA-NEXT: # %bb.2: # in Loop: Header=BB53_1 Depth=1
2551; RV32IA-NEXT: xor a5, a4, a1
2552; RV32IA-NEXT: and a5, a5, a6
2553; RV32IA-NEXT: xor a5, a4, a5
2554; RV32IA-NEXT: .LBB53_3: # in Loop: Header=BB53_1 Depth=1
2555; RV32IA-NEXT: sc.w.rl a5, a5, (a0)
2556; RV32IA-NEXT: bnez a5, .LBB53_1
2557; RV32IA-NEXT: # %bb.4:
2558; RV32IA-NEXT: srl a0, a4, a2
2559; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]2560 %1 = atomicrmw umin i8* %a, i8 %b acq_rel
2561 ret i8 %1
2562}
2563
2564define i8 @atomicrmw_umin_i8_seq_cst(i8 *%a, i8 %b) nounwind {
2565; RV32I-LABEL: atomicrmw_umin_i8_seq_cst:
2566; RV32I: # %bb.0:
2567; RV32I-NEXT: addi sp, sp, -32
2568; RV32I-NEXT: sw ra, 28(sp)
2569; RV32I-NEXT: sw s1, 24(sp)
2570; RV32I-NEXT: sw s2, 20(sp)
2571; RV32I-NEXT: sw s3, 16(sp)
2572; RV32I-NEXT: sw s4, 12(sp)
2573; RV32I-NEXT: sw s5, 8(sp)
2574; RV32I-NEXT: mv s2, a1
2575; RV32I-NEXT: mv s4, a0
2576; RV32I-NEXT: lbu a0, 0(a0)
2577; RV32I-NEXT: andi s5, a1, 255
2578; RV32I-NEXT: addi s3, sp, 7
2579; RV32I-NEXT: addi s1, zero, 5
2580; RV32I-NEXT: .LBB54_1: # %atomicrmw.start
2581; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
2582; RV32I-NEXT: andi a1, a0, 255
2583; RV32I-NEXT: mv a2, a0
2584; RV32I-NEXT: bgeu s5, a1, .LBB54_3
2585; RV32I-NEXT: # %bb.2: # %atomicrmw.start
2586; RV32I-NEXT: # in Loop: Header=BB54_1 Depth=1
2587; RV32I-NEXT: mv a2, s2
2588; RV32I-NEXT: .LBB54_3: # %atomicrmw.start
2589; RV32I-NEXT: # in Loop: Header=BB54_1 Depth=1
2590; RV32I-NEXT: sb a0, 7(sp)
2591; RV32I-NEXT: mv a0, s4
2592; RV32I-NEXT: mv a1, s3
2593; RV32I-NEXT: mv a3, s1
2594; RV32I-NEXT: mv a4, s1
2595; RV32I-NEXT: call __atomic_compare_exchange_1
2596; RV32I-NEXT: mv a1, a0
2597; RV32I-NEXT: lb a0, 7(sp)
2598; RV32I-NEXT: beqz a1, .LBB54_1
2599; RV32I-NEXT: # %bb.4: # %atomicrmw.end
2600; RV32I-NEXT: lw s5, 8(sp)
2601; RV32I-NEXT: lw s4, 12(sp)
2602; RV32I-NEXT: lw s3, 16(sp)
2603; RV32I-NEXT: lw s2, 20(sp)
2604; RV32I-NEXT: lw s1, 24(sp)
2605; RV32I-NEXT: lw ra, 28(sp)
2606; RV32I-NEXT: addi sp, sp, 32
2607; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]2608;
2609; RV32IA-LABEL: atomicrmw_umin_i8_seq_cst:
2610; RV32IA: # %bb.0:
2611; RV32IA-NEXT: slli a2, a0, 3
2612; RV32IA-NEXT: andi a2, a2, 24
2613; RV32IA-NEXT: addi a3, zero, 255
2614; RV32IA-NEXT: sll a6, a3, a2
2615; RV32IA-NEXT: andi a1, a1, 255
2616; RV32IA-NEXT: sll a1, a1, a2
2617; RV32IA-NEXT: andi a0, a0, -4
2618; RV32IA-NEXT: .LBB54_1: # =>This Inner Loop Header: Depth=1
2619; RV32IA-NEXT: lr.w.aqrl a4, (a0)
2620; RV32IA-NEXT: and a3, a4, a6
2621; RV32IA-NEXT: mv a5, a4
2622; RV32IA-NEXT: bgeu a1, a3, .LBB54_3
2623; RV32IA-NEXT: # %bb.2: # in Loop: Header=BB54_1 Depth=1
2624; RV32IA-NEXT: xor a5, a4, a1
2625; RV32IA-NEXT: and a5, a5, a6
2626; RV32IA-NEXT: xor a5, a4, a5
2627; RV32IA-NEXT: .LBB54_3: # in Loop: Header=BB54_1 Depth=1
2628; RV32IA-NEXT: sc.w.aqrl a5, a5, (a0)
2629; RV32IA-NEXT: bnez a5, .LBB54_1
2630; RV32IA-NEXT: # %bb.4:
2631; RV32IA-NEXT: srl a0, a4, a2
2632; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]2633 %1 = atomicrmw umin i8* %a, i8 %b seq_cst
2634 ret i8 %1
2635}
2636
2637define i16 @atomicrmw_xchg_i16_monotonic(i16* %a, i16 %b) {
2638; RV32I-LABEL: atomicrmw_xchg_i16_monotonic:
2639; RV32I: # %bb.0:
2640; RV32I-NEXT: addi sp, sp, -16
2641; RV32I-NEXT: sw ra, 12(sp)
2642; RV32I-NEXT: mv a2, zero
2643; RV32I-NEXT: call __atomic_exchange_2
2644; RV32I-NEXT: lw ra, 12(sp)
2645; RV32I-NEXT: addi sp, sp, 16
2646; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]2647;
2648; RV32IA-LABEL: atomicrmw_xchg_i16_monotonic:
2649; RV32IA: # %bb.0:
2650; RV32IA-NEXT: lui a2, 16
2651; RV32IA-NEXT: addi a2, a2, -1
2652; RV32IA-NEXT: and a1, a1, a2
2653; RV32IA-NEXT: slli a3, a0, 3
2654; RV32IA-NEXT: andi a3, a3, 24
2655; RV32IA-NEXT: sll a2, a2, a3
2656; RV32IA-NEXT: sll a1, a1, a3
2657; RV32IA-NEXT: andi a0, a0, -4
2658; RV32IA-NEXT: .LBB55_1: # =>This Inner Loop Header: Depth=1
2659; RV32IA-NEXT: lr.w a4, (a0)
2660; RV32IA-NEXT: add a5, zero, a1
2661; RV32IA-NEXT: xor a5, a4, a5
2662; RV32IA-NEXT: and a5, a5, a2
2663; RV32IA-NEXT: xor a5, a4, a5
2664; RV32IA-NEXT: sc.w a5, a5, (a0)
2665; RV32IA-NEXT: bnez a5, .LBB55_1
2666; RV32IA-NEXT: # %bb.2:
2667; RV32IA-NEXT: srl a0, a4, a3
2668; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]2669 %1 = atomicrmw xchg i16* %a, i16 %b monotonic
2670 ret i16 %1
2671}
2672
2673define i16 @atomicrmw_xchg_i16_acquire(i16* %a, i16 %b) {
2674; RV32I-LABEL: atomicrmw_xchg_i16_acquire:
2675; RV32I: # %bb.0:
2676; RV32I-NEXT: addi sp, sp, -16
2677; RV32I-NEXT: sw ra, 12(sp)
2678; RV32I-NEXT: addi a2, zero, 2
2679; RV32I-NEXT: call __atomic_exchange_2
2680; RV32I-NEXT: lw ra, 12(sp)
2681; RV32I-NEXT: addi sp, sp, 16
2682; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]2683;
2684; RV32IA-LABEL: atomicrmw_xchg_i16_acquire:
2685; RV32IA: # %bb.0:
2686; RV32IA-NEXT: lui a2, 16
2687; RV32IA-NEXT: addi a2, a2, -1
2688; RV32IA-NEXT: and a1, a1, a2
2689; RV32IA-NEXT: slli a3, a0, 3
2690; RV32IA-NEXT: andi a3, a3, 24
2691; RV32IA-NEXT: sll a2, a2, a3
2692; RV32IA-NEXT: sll a1, a1, a3
2693; RV32IA-NEXT: andi a0, a0, -4
2694; RV32IA-NEXT: .LBB56_1: # =>This Inner Loop Header: Depth=1
2695; RV32IA-NEXT: lr.w.aq a4, (a0)
2696; RV32IA-NEXT: add a5, zero, a1
2697; RV32IA-NEXT: xor a5, a4, a5
2698; RV32IA-NEXT: and a5, a5, a2
2699; RV32IA-NEXT: xor a5, a4, a5
2700; RV32IA-NEXT: sc.w a5, a5, (a0)
2701; RV32IA-NEXT: bnez a5, .LBB56_1
2702; RV32IA-NEXT: # %bb.2:
2703; RV32IA-NEXT: srl a0, a4, a3
2704; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]2705 %1 = atomicrmw xchg i16* %a, i16 %b acquire
2706 ret i16 %1
2707}
2708
2709define i16 @atomicrmw_xchg_i16_release(i16* %a, i16 %b) {
2710; RV32I-LABEL: atomicrmw_xchg_i16_release:
2711; RV32I: # %bb.0:
2712; RV32I-NEXT: addi sp, sp, -16
2713; RV32I-NEXT: sw ra, 12(sp)
2714; RV32I-NEXT: addi a2, zero, 3
2715; RV32I-NEXT: call __atomic_exchange_2
2716; RV32I-NEXT: lw ra, 12(sp)
2717; RV32I-NEXT: addi sp, sp, 16
2718; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]2719;
2720; RV32IA-LABEL: atomicrmw_xchg_i16_release:
2721; RV32IA: # %bb.0:
2722; RV32IA-NEXT: lui a2, 16
2723; RV32IA-NEXT: addi a2, a2, -1
2724; RV32IA-NEXT: and a1, a1, a2
2725; RV32IA-NEXT: slli a3, a0, 3
2726; RV32IA-NEXT: andi a3, a3, 24
2727; RV32IA-NEXT: sll a2, a2, a3
2728; RV32IA-NEXT: sll a1, a1, a3
2729; RV32IA-NEXT: andi a0, a0, -4
2730; RV32IA-NEXT: .LBB57_1: # =>This Inner Loop Header: Depth=1
2731; RV32IA-NEXT: lr.w a4, (a0)
2732; RV32IA-NEXT: add a5, zero, a1
2733; RV32IA-NEXT: xor a5, a4, a5
2734; RV32IA-NEXT: and a5, a5, a2
2735; RV32IA-NEXT: xor a5, a4, a5
2736; RV32IA-NEXT: sc.w.rl a5, a5, (a0)
2737; RV32IA-NEXT: bnez a5, .LBB57_1
2738; RV32IA-NEXT: # %bb.2:
2739; RV32IA-NEXT: srl a0, a4, a3
2740; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]2741 %1 = atomicrmw xchg i16* %a, i16 %b release
2742 ret i16 %1
2743}
2744
2745define i16 @atomicrmw_xchg_i16_acq_rel(i16* %a, i16 %b) {
2746; RV32I-LABEL: atomicrmw_xchg_i16_acq_rel:
2747; RV32I: # %bb.0:
2748; RV32I-NEXT: addi sp, sp, -16
2749; RV32I-NEXT: sw ra, 12(sp)
2750; RV32I-NEXT: addi a2, zero, 4
2751; RV32I-NEXT: call __atomic_exchange_2
2752; RV32I-NEXT: lw ra, 12(sp)
2753; RV32I-NEXT: addi sp, sp, 16
2754; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]2755;
2756; RV32IA-LABEL: atomicrmw_xchg_i16_acq_rel:
2757; RV32IA: # %bb.0:
2758; RV32IA-NEXT: lui a2, 16
2759; RV32IA-NEXT: addi a2, a2, -1
2760; RV32IA-NEXT: and a1, a1, a2
2761; RV32IA-NEXT: slli a3, a0, 3
2762; RV32IA-NEXT: andi a3, a3, 24
2763; RV32IA-NEXT: sll a2, a2, a3
2764; RV32IA-NEXT: sll a1, a1, a3
2765; RV32IA-NEXT: andi a0, a0, -4
2766; RV32IA-NEXT: .LBB58_1: # =>This Inner Loop Header: Depth=1
2767; RV32IA-NEXT: lr.w.aq a4, (a0)
2768; RV32IA-NEXT: add a5, zero, a1
2769; RV32IA-NEXT: xor a5, a4, a5
2770; RV32IA-NEXT: and a5, a5, a2
2771; RV32IA-NEXT: xor a5, a4, a5
2772; RV32IA-NEXT: sc.w.rl a5, a5, (a0)
2773; RV32IA-NEXT: bnez a5, .LBB58_1
2774; RV32IA-NEXT: # %bb.2:
2775; RV32IA-NEXT: srl a0, a4, a3
2776; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]2777 %1 = atomicrmw xchg i16* %a, i16 %b acq_rel
2778 ret i16 %1
2779}
2780
2781define i16 @atomicrmw_xchg_i16_seq_cst(i16* %a, i16 %b) {
2782; RV32I-LABEL: atomicrmw_xchg_i16_seq_cst:
2783; RV32I: # %bb.0:
2784; RV32I-NEXT: addi sp, sp, -16
2785; RV32I-NEXT: sw ra, 12(sp)
2786; RV32I-NEXT: addi a2, zero, 5
2787; RV32I-NEXT: call __atomic_exchange_2
2788; RV32I-NEXT: lw ra, 12(sp)
2789; RV32I-NEXT: addi sp, sp, 16
2790; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]2791;
2792; RV32IA-LABEL: atomicrmw_xchg_i16_seq_cst:
2793; RV32IA: # %bb.0:
2794; RV32IA-NEXT: lui a2, 16
2795; RV32IA-NEXT: addi a2, a2, -1
2796; RV32IA-NEXT: and a1, a1, a2
2797; RV32IA-NEXT: slli a3, a0, 3
2798; RV32IA-NEXT: andi a3, a3, 24
2799; RV32IA-NEXT: sll a2, a2, a3
2800; RV32IA-NEXT: sll a1, a1, a3
2801; RV32IA-NEXT: andi a0, a0, -4
2802; RV32IA-NEXT: .LBB59_1: # =>This Inner Loop Header: Depth=1
2803; RV32IA-NEXT: lr.w.aqrl a4, (a0)
2804; RV32IA-NEXT: add a5, zero, a1
2805; RV32IA-NEXT: xor a5, a4, a5
2806; RV32IA-NEXT: and a5, a5, a2
2807; RV32IA-NEXT: xor a5, a4, a5
2808; RV32IA-NEXT: sc.w.aqrl a5, a5, (a0)
2809; RV32IA-NEXT: bnez a5, .LBB59_1
2810; RV32IA-NEXT: # %bb.2:
2811; RV32IA-NEXT: srl a0, a4, a3
2812; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]2813 %1 = atomicrmw xchg i16* %a, i16 %b seq_cst
2814 ret i16 %1
2815}
2816
2817define i16 @atomicrmw_add_i16_monotonic(i16 *%a, i16 %b) nounwind {
2818; RV32I-LABEL: atomicrmw_add_i16_monotonic:
2819; RV32I: # %bb.0:
2820; RV32I-NEXT: addi sp, sp, -16
2821; RV32I-NEXT: sw ra, 12(sp)
2822; RV32I-NEXT: mv a2, zero
2823; RV32I-NEXT: call __atomic_fetch_add_2
2824; RV32I-NEXT: lw ra, 12(sp)
2825; RV32I-NEXT: addi sp, sp, 16
2826; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]2827;
2828; RV32IA-LABEL: atomicrmw_add_i16_monotonic:
2829; RV32IA: # %bb.0:
2830; RV32IA-NEXT: lui a2, 16
2831; RV32IA-NEXT: addi a2, a2, -1
2832; RV32IA-NEXT: and a1, a1, a2
2833; RV32IA-NEXT: slli a3, a0, 3
2834; RV32IA-NEXT: andi a3, a3, 24
2835; RV32IA-NEXT: sll a2, a2, a3
2836; RV32IA-NEXT: sll a1, a1, a3
2837; RV32IA-NEXT: andi a0, a0, -4
2838; RV32IA-NEXT: .LBB60_1: # =>This Inner Loop Header: Depth=1
2839; RV32IA-NEXT: lr.w a4, (a0)
2840; RV32IA-NEXT: add a5, a4, a1
2841; RV32IA-NEXT: xor a5, a4, a5
2842; RV32IA-NEXT: and a5, a5, a2
2843; RV32IA-NEXT: xor a5, a4, a5
2844; RV32IA-NEXT: sc.w a5, a5, (a0)
2845; RV32IA-NEXT: bnez a5, .LBB60_1
2846; RV32IA-NEXT: # %bb.2:
2847; RV32IA-NEXT: srl a0, a4, a3
2848; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]2849 %1 = atomicrmw add i16* %a, i16 %b monotonic
2850 ret i16 %1
2851}
2852
2853define i16 @atomicrmw_add_i16_acquire(i16 *%a, i16 %b) nounwind {
2854; RV32I-LABEL: atomicrmw_add_i16_acquire:
2855; RV32I: # %bb.0:
2856; RV32I-NEXT: addi sp, sp, -16
2857; RV32I-NEXT: sw ra, 12(sp)
2858; RV32I-NEXT: addi a2, zero, 2
2859; RV32I-NEXT: call __atomic_fetch_add_2
2860; RV32I-NEXT: lw ra, 12(sp)
2861; RV32I-NEXT: addi sp, sp, 16
2862; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]2863;
2864; RV32IA-LABEL: atomicrmw_add_i16_acquire:
2865; RV32IA: # %bb.0:
2866; RV32IA-NEXT: lui a2, 16
2867; RV32IA-NEXT: addi a2, a2, -1
2868; RV32IA-NEXT: and a1, a1, a2
2869; RV32IA-NEXT: slli a3, a0, 3
2870; RV32IA-NEXT: andi a3, a3, 24
2871; RV32IA-NEXT: sll a2, a2, a3
2872; RV32IA-NEXT: sll a1, a1, a3
2873; RV32IA-NEXT: andi a0, a0, -4
2874; RV32IA-NEXT: .LBB61_1: # =>This Inner Loop Header: Depth=1
2875; RV32IA-NEXT: lr.w.aq a4, (a0)
2876; RV32IA-NEXT: add a5, a4, a1
2877; RV32IA-NEXT: xor a5, a4, a5
2878; RV32IA-NEXT: and a5, a5, a2
2879; RV32IA-NEXT: xor a5, a4, a5
2880; RV32IA-NEXT: sc.w a5, a5, (a0)
2881; RV32IA-NEXT: bnez a5, .LBB61_1
2882; RV32IA-NEXT: # %bb.2:
2883; RV32IA-NEXT: srl a0, a4, a3
2884; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]2885 %1 = atomicrmw add i16* %a, i16 %b acquire
2886 ret i16 %1
2887}
2888
2889define i16 @atomicrmw_add_i16_release(i16 *%a, i16 %b) nounwind {
2890; RV32I-LABEL: atomicrmw_add_i16_release:
2891; RV32I: # %bb.0:
2892; RV32I-NEXT: addi sp, sp, -16
2893; RV32I-NEXT: sw ra, 12(sp)
2894; RV32I-NEXT: addi a2, zero, 3
2895; RV32I-NEXT: call __atomic_fetch_add_2
2896; RV32I-NEXT: lw ra, 12(sp)
2897; RV32I-NEXT: addi sp, sp, 16
2898; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]2899;
2900; RV32IA-LABEL: atomicrmw_add_i16_release:
2901; RV32IA: # %bb.0:
2902; RV32IA-NEXT: lui a2, 16
2903; RV32IA-NEXT: addi a2, a2, -1
2904; RV32IA-NEXT: and a1, a1, a2
2905; RV32IA-NEXT: slli a3, a0, 3
2906; RV32IA-NEXT: andi a3, a3, 24
2907; RV32IA-NEXT: sll a2, a2, a3
2908; RV32IA-NEXT: sll a1, a1, a3
2909; RV32IA-NEXT: andi a0, a0, -4
2910; RV32IA-NEXT: .LBB62_1: # =>This Inner Loop Header: Depth=1
2911; RV32IA-NEXT: lr.w a4, (a0)
2912; RV32IA-NEXT: add a5, a4, a1
2913; RV32IA-NEXT: xor a5, a4, a5
2914; RV32IA-NEXT: and a5, a5, a2
2915; RV32IA-NEXT: xor a5, a4, a5
2916; RV32IA-NEXT: sc.w.rl a5, a5, (a0)
2917; RV32IA-NEXT: bnez a5, .LBB62_1
2918; RV32IA-NEXT: # %bb.2:
2919; RV32IA-NEXT: srl a0, a4, a3
2920; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]2921 %1 = atomicrmw add i16* %a, i16 %b release
2922 ret i16 %1
2923}
2924
2925define i16 @atomicrmw_add_i16_acq_rel(i16 *%a, i16 %b) nounwind {
2926; RV32I-LABEL: atomicrmw_add_i16_acq_rel:
2927; RV32I: # %bb.0:
2928; RV32I-NEXT: addi sp, sp, -16
2929; RV32I-NEXT: sw ra, 12(sp)
2930; RV32I-NEXT: addi a2, zero, 4
2931; RV32I-NEXT: call __atomic_fetch_add_2
2932; RV32I-NEXT: lw ra, 12(sp)
2933; RV32I-NEXT: addi sp, sp, 16
2934; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]2935;
2936; RV32IA-LABEL: atomicrmw_add_i16_acq_rel:
2937; RV32IA: # %bb.0:
2938; RV32IA-NEXT: lui a2, 16
2939; RV32IA-NEXT: addi a2, a2, -1
2940; RV32IA-NEXT: and a1, a1, a2
2941; RV32IA-NEXT: slli a3, a0, 3
2942; RV32IA-NEXT: andi a3, a3, 24
2943; RV32IA-NEXT: sll a2, a2, a3
2944; RV32IA-NEXT: sll a1, a1, a3
2945; RV32IA-NEXT: andi a0, a0, -4
2946; RV32IA-NEXT: .LBB63_1: # =>This Inner Loop Header: Depth=1
2947; RV32IA-NEXT: lr.w.aq a4, (a0)
2948; RV32IA-NEXT: add a5, a4, a1
2949; RV32IA-NEXT: xor a5, a4, a5
2950; RV32IA-NEXT: and a5, a5, a2
2951; RV32IA-NEXT: xor a5, a4, a5
2952; RV32IA-NEXT: sc.w.rl a5, a5, (a0)
2953; RV32IA-NEXT: bnez a5, .LBB63_1
2954; RV32IA-NEXT: # %bb.2:
2955; RV32IA-NEXT: srl a0, a4, a3
2956; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]2957 %1 = atomicrmw add i16* %a, i16 %b acq_rel
2958 ret i16 %1
2959}
2960
2961define i16 @atomicrmw_add_i16_seq_cst(i16 *%a, i16 %b) nounwind {
2962; RV32I-LABEL: atomicrmw_add_i16_seq_cst:
2963; RV32I: # %bb.0:
2964; RV32I-NEXT: addi sp, sp, -16
2965; RV32I-NEXT: sw ra, 12(sp)
2966; RV32I-NEXT: addi a2, zero, 5
2967; RV32I-NEXT: call __atomic_fetch_add_2
2968; RV32I-NEXT: lw ra, 12(sp)
2969; RV32I-NEXT: addi sp, sp, 16
2970; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]2971;
2972; RV32IA-LABEL: atomicrmw_add_i16_seq_cst:
2973; RV32IA: # %bb.0:
2974; RV32IA-NEXT: lui a2, 16
2975; RV32IA-NEXT: addi a2, a2, -1
2976; RV32IA-NEXT: and a1, a1, a2
2977; RV32IA-NEXT: slli a3, a0, 3
2978; RV32IA-NEXT: andi a3, a3, 24
2979; RV32IA-NEXT: sll a2, a2, a3
2980; RV32IA-NEXT: sll a1, a1, a3
2981; RV32IA-NEXT: andi a0, a0, -4
2982; RV32IA-NEXT: .LBB64_1: # =>This Inner Loop Header: Depth=1
2983; RV32IA-NEXT: lr.w.aqrl a4, (a0)
2984; RV32IA-NEXT: add a5, a4, a1
2985; RV32IA-NEXT: xor a5, a4, a5
2986; RV32IA-NEXT: and a5, a5, a2
2987; RV32IA-NEXT: xor a5, a4, a5
2988; RV32IA-NEXT: sc.w.aqrl a5, a5, (a0)
2989; RV32IA-NEXT: bnez a5, .LBB64_1
2990; RV32IA-NEXT: # %bb.2:
2991; RV32IA-NEXT: srl a0, a4, a3
2992; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]2993 %1 = atomicrmw add i16* %a, i16 %b seq_cst
2994 ret i16 %1
2995}
2996
2997define i16 @atomicrmw_sub_i16_monotonic(i16* %a, i16 %b) {
2998; RV32I-LABEL: atomicrmw_sub_i16_monotonic:
2999; RV32I: # %bb.0:
3000; RV32I-NEXT: addi sp, sp, -16
3001; RV32I-NEXT: sw ra, 12(sp)
3002; RV32I-NEXT: mv a2, zero
3003; RV32I-NEXT: call __atomic_fetch_sub_2
3004; RV32I-NEXT: lw ra, 12(sp)
3005; RV32I-NEXT: addi sp, sp, 16
3006; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]3007;
3008; RV32IA-LABEL: atomicrmw_sub_i16_monotonic:
3009; RV32IA: # %bb.0:
3010; RV32IA-NEXT: lui a2, 16
3011; RV32IA-NEXT: addi a2, a2, -1
3012; RV32IA-NEXT: and a1, a1, a2
3013; RV32IA-NEXT: slli a3, a0, 3
3014; RV32IA-NEXT: andi a3, a3, 24
3015; RV32IA-NEXT: sll a2, a2, a3
3016; RV32IA-NEXT: sll a1, a1, a3
3017; RV32IA-NEXT: andi a0, a0, -4
3018; RV32IA-NEXT: .LBB65_1: # =>This Inner Loop Header: Depth=1
3019; RV32IA-NEXT: lr.w a4, (a0)
3020; RV32IA-NEXT: sub a5, a4, a1
3021; RV32IA-NEXT: xor a5, a4, a5
3022; RV32IA-NEXT: and a5, a5, a2
3023; RV32IA-NEXT: xor a5, a4, a5
3024; RV32IA-NEXT: sc.w a5, a5, (a0)
3025; RV32IA-NEXT: bnez a5, .LBB65_1
3026; RV32IA-NEXT: # %bb.2:
3027; RV32IA-NEXT: srl a0, a4, a3
3028; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]3029 %1 = atomicrmw sub i16* %a, i16 %b monotonic
3030 ret i16 %1
3031}
3032
3033define i16 @atomicrmw_sub_i16_acquire(i16* %a, i16 %b) {
3034; RV32I-LABEL: atomicrmw_sub_i16_acquire:
3035; RV32I: # %bb.0:
3036; RV32I-NEXT: addi sp, sp, -16
3037; RV32I-NEXT: sw ra, 12(sp)
3038; RV32I-NEXT: addi a2, zero, 2
3039; RV32I-NEXT: call __atomic_fetch_sub_2
3040; RV32I-NEXT: lw ra, 12(sp)
3041; RV32I-NEXT: addi sp, sp, 16
3042; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]3043;
3044; RV32IA-LABEL: atomicrmw_sub_i16_acquire:
3045; RV32IA: # %bb.0:
3046; RV32IA-NEXT: lui a2, 16
3047; RV32IA-NEXT: addi a2, a2, -1
3048; RV32IA-NEXT: and a1, a1, a2
3049; RV32IA-NEXT: slli a3, a0, 3
3050; RV32IA-NEXT: andi a3, a3, 24
3051; RV32IA-NEXT: sll a2, a2, a3
3052; RV32IA-NEXT: sll a1, a1, a3
3053; RV32IA-NEXT: andi a0, a0, -4
3054; RV32IA-NEXT: .LBB66_1: # =>This Inner Loop Header: Depth=1
3055; RV32IA-NEXT: lr.w.aq a4, (a0)
3056; RV32IA-NEXT: sub a5, a4, a1
3057; RV32IA-NEXT: xor a5, a4, a5
3058; RV32IA-NEXT: and a5, a5, a2
3059; RV32IA-NEXT: xor a5, a4, a5
3060; RV32IA-NEXT: sc.w a5, a5, (a0)
3061; RV32IA-NEXT: bnez a5, .LBB66_1
3062; RV32IA-NEXT: # %bb.2:
3063; RV32IA-NEXT: srl a0, a4, a3
3064; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]3065 %1 = atomicrmw sub i16* %a, i16 %b acquire
3066 ret i16 %1
3067}
3068
3069define i16 @atomicrmw_sub_i16_release(i16* %a, i16 %b) {
3070; RV32I-LABEL: atomicrmw_sub_i16_release:
3071; RV32I: # %bb.0:
3072; RV32I-NEXT: addi sp, sp, -16
3073; RV32I-NEXT: sw ra, 12(sp)
3074; RV32I-NEXT: addi a2, zero, 3
3075; RV32I-NEXT: call __atomic_fetch_sub_2
3076; RV32I-NEXT: lw ra, 12(sp)
3077; RV32I-NEXT: addi sp, sp, 16
3078; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]3079;
3080; RV32IA-LABEL: atomicrmw_sub_i16_release:
3081; RV32IA: # %bb.0:
3082; RV32IA-NEXT: lui a2, 16
3083; RV32IA-NEXT: addi a2, a2, -1
3084; RV32IA-NEXT: and a1, a1, a2
3085; RV32IA-NEXT: slli a3, a0, 3
3086; RV32IA-NEXT: andi a3, a3, 24
3087; RV32IA-NEXT: sll a2, a2, a3
3088; RV32IA-NEXT: sll a1, a1, a3
3089; RV32IA-NEXT: andi a0, a0, -4
3090; RV32IA-NEXT: .LBB67_1: # =>This Inner Loop Header: Depth=1
3091; RV32IA-NEXT: lr.w a4, (a0)
3092; RV32IA-NEXT: sub a5, a4, a1
3093; RV32IA-NEXT: xor a5, a4, a5
3094; RV32IA-NEXT: and a5, a5, a2
3095; RV32IA-NEXT: xor a5, a4, a5
3096; RV32IA-NEXT: sc.w.rl a5, a5, (a0)
3097; RV32IA-NEXT: bnez a5, .LBB67_1
3098; RV32IA-NEXT: # %bb.2:
3099; RV32IA-NEXT: srl a0, a4, a3
3100; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]3101 %1 = atomicrmw sub i16* %a, i16 %b release
3102 ret i16 %1
3103}
3104
3105define i16 @atomicrmw_sub_i16_acq_rel(i16* %a, i16 %b) {
3106; RV32I-LABEL: atomicrmw_sub_i16_acq_rel:
3107; RV32I: # %bb.0:
3108; RV32I-NEXT: addi sp, sp, -16
3109; RV32I-NEXT: sw ra, 12(sp)
3110; RV32I-NEXT: addi a2, zero, 4
3111; RV32I-NEXT: call __atomic_fetch_sub_2
3112; RV32I-NEXT: lw ra, 12(sp)
3113; RV32I-NEXT: addi sp, sp, 16
3114; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]3115;
3116; RV32IA-LABEL: atomicrmw_sub_i16_acq_rel:
3117; RV32IA: # %bb.0:
3118; RV32IA-NEXT: lui a2, 16
3119; RV32IA-NEXT: addi a2, a2, -1
3120; RV32IA-NEXT: and a1, a1, a2
3121; RV32IA-NEXT: slli a3, a0, 3
3122; RV32IA-NEXT: andi a3, a3, 24
3123; RV32IA-NEXT: sll a2, a2, a3
3124; RV32IA-NEXT: sll a1, a1, a3
3125; RV32IA-NEXT: andi a0, a0, -4
3126; RV32IA-NEXT: .LBB68_1: # =>This Inner Loop Header: Depth=1
3127; RV32IA-NEXT: lr.w.aq a4, (a0)
3128; RV32IA-NEXT: sub a5, a4, a1
3129; RV32IA-NEXT: xor a5, a4, a5
3130; RV32IA-NEXT: and a5, a5, a2
3131; RV32IA-NEXT: xor a5, a4, a5
3132; RV32IA-NEXT: sc.w.rl a5, a5, (a0)
3133; RV32IA-NEXT: bnez a5, .LBB68_1
3134; RV32IA-NEXT: # %bb.2:
3135; RV32IA-NEXT: srl a0, a4, a3
3136; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]3137 %1 = atomicrmw sub i16* %a, i16 %b acq_rel
3138 ret i16 %1
3139}
3140
3141define i16 @atomicrmw_sub_i16_seq_cst(i16* %a, i16 %b) {
3142; RV32I-LABEL: atomicrmw_sub_i16_seq_cst:
3143; RV32I: # %bb.0:
3144; RV32I-NEXT: addi sp, sp, -16
3145; RV32I-NEXT: sw ra, 12(sp)
3146; RV32I-NEXT: addi a2, zero, 5
3147; RV32I-NEXT: call __atomic_fetch_sub_2
3148; RV32I-NEXT: lw ra, 12(sp)
3149; RV32I-NEXT: addi sp, sp, 16
3150; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]3151;
3152; RV32IA-LABEL: atomicrmw_sub_i16_seq_cst:
3153; RV32IA: # %bb.0:
3154; RV32IA-NEXT: lui a2, 16
3155; RV32IA-NEXT: addi a2, a2, -1
3156; RV32IA-NEXT: and a1, a1, a2
3157; RV32IA-NEXT: slli a3, a0, 3
3158; RV32IA-NEXT: andi a3, a3, 24
3159; RV32IA-NEXT: sll a2, a2, a3
3160; RV32IA-NEXT: sll a1, a1, a3
3161; RV32IA-NEXT: andi a0, a0, -4
3162; RV32IA-NEXT: .LBB69_1: # =>This Inner Loop Header: Depth=1
3163; RV32IA-NEXT: lr.w.aqrl a4, (a0)
3164; RV32IA-NEXT: sub a5, a4, a1
3165; RV32IA-NEXT: xor a5, a4, a5
3166; RV32IA-NEXT: and a5, a5, a2
3167; RV32IA-NEXT: xor a5, a4, a5
3168; RV32IA-NEXT: sc.w.aqrl a5, a5, (a0)
3169; RV32IA-NEXT: bnez a5, .LBB69_1
3170; RV32IA-NEXT: # %bb.2:
3171; RV32IA-NEXT: srl a0, a4, a3
3172; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]3173 %1 = atomicrmw sub i16* %a, i16 %b seq_cst
3174 ret i16 %1
3175}
3176
3177define i16 @atomicrmw_and_i16_monotonic(i16 *%a, i16 %b) nounwind {
3178; RV32I-LABEL: atomicrmw_and_i16_monotonic:
3179; RV32I: # %bb.0:
3180; RV32I-NEXT: addi sp, sp, -16
3181; RV32I-NEXT: sw ra, 12(sp)
3182; RV32I-NEXT: mv a2, zero
3183; RV32I-NEXT: call __atomic_fetch_and_2
3184; RV32I-NEXT: lw ra, 12(sp)
3185; RV32I-NEXT: addi sp, sp, 16
3186; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]3187;
3188; RV32IA-LABEL: atomicrmw_and_i16_monotonic:
3189; RV32IA: # %bb.0:
3190; RV32IA-NEXT: lui a2, 16
3191; RV32IA-NEXT: addi a2, a2, -1
3192; RV32IA-NEXT: and a1, a1, a2
3193; RV32IA-NEXT: slli a3, a0, 3
3194; RV32IA-NEXT: andi a3, a3, 24
3195; RV32IA-NEXT: sll a1, a1, a3
3196; RV32IA-NEXT: sll a2, a2, a3
3197; RV32IA-NEXT: not a2, a2
3198; RV32IA-NEXT: or a1, a2, a1
3199; RV32IA-NEXT: andi a0, a0, -4
3200; RV32IA-NEXT: amoand.w a0, a1, (a0)
3201; RV32IA-NEXT: srl a0, a0, a3
3202; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]3203 %1 = atomicrmw and i16* %a, i16 %b monotonic
3204 ret i16 %1
3205}
3206
3207define i16 @atomicrmw_and_i16_acquire(i16 *%a, i16 %b) nounwind {
3208; RV32I-LABEL: atomicrmw_and_i16_acquire:
3209; RV32I: # %bb.0:
3210; RV32I-NEXT: addi sp, sp, -16
3211; RV32I-NEXT: sw ra, 12(sp)
3212; RV32I-NEXT: addi a2, zero, 2
3213; RV32I-NEXT: call __atomic_fetch_and_2
3214; RV32I-NEXT: lw ra, 12(sp)
3215; RV32I-NEXT: addi sp, sp, 16
3216; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]3217;
3218; RV32IA-LABEL: atomicrmw_and_i16_acquire:
3219; RV32IA: # %bb.0:
3220; RV32IA-NEXT: lui a2, 16
3221; RV32IA-NEXT: addi a2, a2, -1
3222; RV32IA-NEXT: and a1, a1, a2
3223; RV32IA-NEXT: slli a3, a0, 3
3224; RV32IA-NEXT: andi a3, a3, 24
3225; RV32IA-NEXT: sll a1, a1, a3
3226; RV32IA-NEXT: sll a2, a2, a3
3227; RV32IA-NEXT: not a2, a2
3228; RV32IA-NEXT: or a1, a2, a1
3229; RV32IA-NEXT: andi a0, a0, -4
3230; RV32IA-NEXT: amoand.w.aq a0, a1, (a0)
3231; RV32IA-NEXT: srl a0, a0, a3
3232; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]3233 %1 = atomicrmw and i16* %a, i16 %b acquire
3234 ret i16 %1
3235}
3236
3237define i16 @atomicrmw_and_i16_release(i16 *%a, i16 %b) nounwind {
3238; RV32I-LABEL: atomicrmw_and_i16_release:
3239; RV32I: # %bb.0:
3240; RV32I-NEXT: addi sp, sp, -16
3241; RV32I-NEXT: sw ra, 12(sp)
3242; RV32I-NEXT: addi a2, zero, 3
3243; RV32I-NEXT: call __atomic_fetch_and_2
3244; RV32I-NEXT: lw ra, 12(sp)
3245; RV32I-NEXT: addi sp, sp, 16
3246; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]3247;
3248; RV32IA-LABEL: atomicrmw_and_i16_release:
3249; RV32IA: # %bb.0:
3250; RV32IA-NEXT: lui a2, 16
3251; RV32IA-NEXT: addi a2, a2, -1
3252; RV32IA-NEXT: and a1, a1, a2
3253; RV32IA-NEXT: slli a3, a0, 3
3254; RV32IA-NEXT: andi a3, a3, 24
3255; RV32IA-NEXT: sll a1, a1, a3
3256; RV32IA-NEXT: sll a2, a2, a3
3257; RV32IA-NEXT: not a2, a2
3258; RV32IA-NEXT: or a1, a2, a1
3259; RV32IA-NEXT: andi a0, a0, -4
3260; RV32IA-NEXT: amoand.w.rl a0, a1, (a0)
3261; RV32IA-NEXT: srl a0, a0, a3
3262; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]3263 %1 = atomicrmw and i16* %a, i16 %b release
3264 ret i16 %1
3265}
3266
3267define i16 @atomicrmw_and_i16_acq_rel(i16 *%a, i16 %b) nounwind {
3268; RV32I-LABEL: atomicrmw_and_i16_acq_rel:
3269; RV32I: # %bb.0:
3270; RV32I-NEXT: addi sp, sp, -16
3271; RV32I-NEXT: sw ra, 12(sp)
3272; RV32I-NEXT: addi a2, zero, 4
3273; RV32I-NEXT: call __atomic_fetch_and_2
3274; RV32I-NEXT: lw ra, 12(sp)
3275; RV32I-NEXT: addi sp, sp, 16
3276; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]3277;
3278; RV32IA-LABEL: atomicrmw_and_i16_acq_rel:
3279; RV32IA: # %bb.0:
3280; RV32IA-NEXT: lui a2, 16
3281; RV32IA-NEXT: addi a2, a2, -1
3282; RV32IA-NEXT: and a1, a1, a2
3283; RV32IA-NEXT: slli a3, a0, 3
3284; RV32IA-NEXT: andi a3, a3, 24
3285; RV32IA-NEXT: sll a1, a1, a3
3286; RV32IA-NEXT: sll a2, a2, a3
3287; RV32IA-NEXT: not a2, a2
3288; RV32IA-NEXT: or a1, a2, a1
3289; RV32IA-NEXT: andi a0, a0, -4
3290; RV32IA-NEXT: amoand.w.aqrl a0, a1, (a0)
3291; RV32IA-NEXT: srl a0, a0, a3
3292; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]3293 %1 = atomicrmw and i16* %a, i16 %b acq_rel
3294 ret i16 %1
3295}
3296
3297define i16 @atomicrmw_and_i16_seq_cst(i16 *%a, i16 %b) nounwind {
3298; RV32I-LABEL: atomicrmw_and_i16_seq_cst:
3299; RV32I: # %bb.0:
3300; RV32I-NEXT: addi sp, sp, -16
3301; RV32I-NEXT: sw ra, 12(sp)
3302; RV32I-NEXT: addi a2, zero, 5
3303; RV32I-NEXT: call __atomic_fetch_and_2
3304; RV32I-NEXT: lw ra, 12(sp)
3305; RV32I-NEXT: addi sp, sp, 16
3306; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]3307;
3308; RV32IA-LABEL: atomicrmw_and_i16_seq_cst:
3309; RV32IA: # %bb.0:
3310; RV32IA-NEXT: lui a2, 16
3311; RV32IA-NEXT: addi a2, a2, -1
3312; RV32IA-NEXT: and a1, a1, a2
3313; RV32IA-NEXT: slli a3, a0, 3
3314; RV32IA-NEXT: andi a3, a3, 24
3315; RV32IA-NEXT: sll a1, a1, a3
3316; RV32IA-NEXT: sll a2, a2, a3
3317; RV32IA-NEXT: not a2, a2
3318; RV32IA-NEXT: or a1, a2, a1
3319; RV32IA-NEXT: andi a0, a0, -4
3320; RV32IA-NEXT: amoand.w.aqrl a0, a1, (a0)
3321; RV32IA-NEXT: srl a0, a0, a3
3322; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]3323 %1 = atomicrmw and i16* %a, i16 %b seq_cst
3324 ret i16 %1
3325}
3326
3327define i16 @atomicrmw_nand_i16_monotonic(i16* %a, i16 %b) {
3328; RV32I-LABEL: atomicrmw_nand_i16_monotonic:
3329; RV32I: # %bb.0:
3330; RV32I-NEXT: addi sp, sp, -16
3331; RV32I-NEXT: sw ra, 12(sp)
3332; RV32I-NEXT: mv a2, zero
3333; RV32I-NEXT: call __atomic_fetch_nand_2
3334; RV32I-NEXT: lw ra, 12(sp)
3335; RV32I-NEXT: addi sp, sp, 16
3336; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]3337;
3338; RV32IA-LABEL: atomicrmw_nand_i16_monotonic:
3339; RV32IA: # %bb.0:
3340; RV32IA-NEXT: lui a2, 16
3341; RV32IA-NEXT: addi a2, a2, -1
3342; RV32IA-NEXT: and a1, a1, a2
3343; RV32IA-NEXT: slli a3, a0, 3
3344; RV32IA-NEXT: andi a3, a3, 24
3345; RV32IA-NEXT: sll a2, a2, a3
3346; RV32IA-NEXT: sll a1, a1, a3
3347; RV32IA-NEXT: andi a0, a0, -4
3348; RV32IA-NEXT: .LBB75_1: # =>This Inner Loop Header: Depth=1
3349; RV32IA-NEXT: lr.w a4, (a0)
3350; RV32IA-NEXT: and a5, a4, a1
3351; RV32IA-NEXT: not a5, a5
3352; RV32IA-NEXT: xor a5, a4, a5
3353; RV32IA-NEXT: and a5, a5, a2
3354; RV32IA-NEXT: xor a5, a4, a5
3355; RV32IA-NEXT: sc.w a5, a5, (a0)
3356; RV32IA-NEXT: bnez a5, .LBB75_1
3357; RV32IA-NEXT: # %bb.2:
3358; RV32IA-NEXT: srl a0, a4, a3
3359; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]3360 %1 = atomicrmw nand i16* %a, i16 %b monotonic
3361 ret i16 %1
3362}
3363
3364define i16 @atomicrmw_nand_i16_acquire(i16* %a, i16 %b) {
3365; RV32I-LABEL: atomicrmw_nand_i16_acquire:
3366; RV32I: # %bb.0:
3367; RV32I-NEXT: addi sp, sp, -16
3368; RV32I-NEXT: sw ra, 12(sp)
3369; RV32I-NEXT: addi a2, zero, 2
3370; RV32I-NEXT: call __atomic_fetch_nand_2
3371; RV32I-NEXT: lw ra, 12(sp)
3372; RV32I-NEXT: addi sp, sp, 16
3373; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]3374;
3375; RV32IA-LABEL: atomicrmw_nand_i16_acquire:
3376; RV32IA: # %bb.0:
3377; RV32IA-NEXT: lui a2, 16
3378; RV32IA-NEXT: addi a2, a2, -1
3379; RV32IA-NEXT: and a1, a1, a2
3380; RV32IA-NEXT: slli a3, a0, 3
3381; RV32IA-NEXT: andi a3, a3, 24
3382; RV32IA-NEXT: sll a2, a2, a3
3383; RV32IA-NEXT: sll a1, a1, a3
3384; RV32IA-NEXT: andi a0, a0, -4
3385; RV32IA-NEXT: .LBB76_1: # =>This Inner Loop Header: Depth=1
3386; RV32IA-NEXT: lr.w.aq a4, (a0)
3387; RV32IA-NEXT: and a5, a4, a1
3388; RV32IA-NEXT: not a5, a5
3389; RV32IA-NEXT: xor a5, a4, a5
3390; RV32IA-NEXT: and a5, a5, a2
3391; RV32IA-NEXT: xor a5, a4, a5
3392; RV32IA-NEXT: sc.w a5, a5, (a0)
3393; RV32IA-NEXT: bnez a5, .LBB76_1
3394; RV32IA-NEXT: # %bb.2:
3395; RV32IA-NEXT: srl a0, a4, a3
3396; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]3397 %1 = atomicrmw nand i16* %a, i16 %b acquire
3398 ret i16 %1
3399}
3400
3401define i16 @atomicrmw_nand_i16_release(i16* %a, i16 %b) {
3402; RV32I-LABEL: atomicrmw_nand_i16_release:
3403; RV32I: # %bb.0:
3404; RV32I-NEXT: addi sp, sp, -16
3405; RV32I-NEXT: sw ra, 12(sp)
3406; RV32I-NEXT: addi a2, zero, 3
3407; RV32I-NEXT: call __atomic_fetch_nand_2
3408; RV32I-NEXT: lw ra, 12(sp)
3409; RV32I-NEXT: addi sp, sp, 16
3410; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]3411;
3412; RV32IA-LABEL: atomicrmw_nand_i16_release:
3413; RV32IA: # %bb.0:
3414; RV32IA-NEXT: lui a2, 16
3415; RV32IA-NEXT: addi a2, a2, -1
3416; RV32IA-NEXT: and a1, a1, a2
3417; RV32IA-NEXT: slli a3, a0, 3
3418; RV32IA-NEXT: andi a3, a3, 24
3419; RV32IA-NEXT: sll a2, a2, a3
3420; RV32IA-NEXT: sll a1, a1, a3
3421; RV32IA-NEXT: andi a0, a0, -4
3422; RV32IA-NEXT: .LBB77_1: # =>This Inner Loop Header: Depth=1
3423; RV32IA-NEXT: lr.w a4, (a0)
3424; RV32IA-NEXT: and a5, a4, a1
3425; RV32IA-NEXT: not a5, a5
3426; RV32IA-NEXT: xor a5, a4, a5
3427; RV32IA-NEXT: and a5, a5, a2
3428; RV32IA-NEXT: xor a5, a4, a5
3429; RV32IA-NEXT: sc.w.rl a5, a5, (a0)
3430; RV32IA-NEXT: bnez a5, .LBB77_1
3431; RV32IA-NEXT: # %bb.2:
3432; RV32IA-NEXT: srl a0, a4, a3
3433; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]3434 %1 = atomicrmw nand i16* %a, i16 %b release
3435 ret i16 %1
3436}
3437
3438define i16 @atomicrmw_nand_i16_acq_rel(i16* %a, i16 %b) {
3439; RV32I-LABEL: atomicrmw_nand_i16_acq_rel:
3440; RV32I: # %bb.0:
3441; RV32I-NEXT: addi sp, sp, -16
3442; RV32I-NEXT: sw ra, 12(sp)
3443; RV32I-NEXT: addi a2, zero, 4
3444; RV32I-NEXT: call __atomic_fetch_nand_2
3445; RV32I-NEXT: lw ra, 12(sp)
3446; RV32I-NEXT: addi sp, sp, 16
3447; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]3448;
3449; RV32IA-LABEL: atomicrmw_nand_i16_acq_rel:
3450; RV32IA: # %bb.0:
3451; RV32IA-NEXT: lui a2, 16
3452; RV32IA-NEXT: addi a2, a2, -1
3453; RV32IA-NEXT: and a1, a1, a2
3454; RV32IA-NEXT: slli a3, a0, 3
3455; RV32IA-NEXT: andi a3, a3, 24
3456; RV32IA-NEXT: sll a2, a2, a3
3457; RV32IA-NEXT: sll a1, a1, a3
3458; RV32IA-NEXT: andi a0, a0, -4
3459; RV32IA-NEXT: .LBB78_1: # =>This Inner Loop Header: Depth=1
3460; RV32IA-NEXT: lr.w.aq a4, (a0)
3461; RV32IA-NEXT: and a5, a4, a1
3462; RV32IA-NEXT: not a5, a5
3463; RV32IA-NEXT: xor a5, a4, a5
3464; RV32IA-NEXT: and a5, a5, a2
3465; RV32IA-NEXT: xor a5, a4, a5
3466; RV32IA-NEXT: sc.w.rl a5, a5, (a0)
3467; RV32IA-NEXT: bnez a5, .LBB78_1
3468; RV32IA-NEXT: # %bb.2:
3469; RV32IA-NEXT: srl a0, a4, a3
3470; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]3471 %1 = atomicrmw nand i16* %a, i16 %b acq_rel
3472 ret i16 %1
3473}
3474
3475define i16 @atomicrmw_nand_i16_seq_cst(i16* %a, i16 %b) {
3476; RV32I-LABEL: atomicrmw_nand_i16_seq_cst:
3477; RV32I: # %bb.0:
3478; RV32I-NEXT: addi sp, sp, -16
3479; RV32I-NEXT: sw ra, 12(sp)
3480; RV32I-NEXT: addi a2, zero, 5
3481; RV32I-NEXT: call __atomic_fetch_nand_2
3482; RV32I-NEXT: lw ra, 12(sp)
3483; RV32I-NEXT: addi sp, sp, 16
3484; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]3485;
3486; RV32IA-LABEL: atomicrmw_nand_i16_seq_cst:
3487; RV32IA: # %bb.0:
3488; RV32IA-NEXT: lui a2, 16
3489; RV32IA-NEXT: addi a2, a2, -1
3490; RV32IA-NEXT: and a1, a1, a2
3491; RV32IA-NEXT: slli a3, a0, 3
3492; RV32IA-NEXT: andi a3, a3, 24
3493; RV32IA-NEXT: sll a2, a2, a3
3494; RV32IA-NEXT: sll a1, a1, a3
3495; RV32IA-NEXT: andi a0, a0, -4
3496; RV32IA-NEXT: .LBB79_1: # =>This Inner Loop Header: Depth=1
3497; RV32IA-NEXT: lr.w.aqrl a4, (a0)
3498; RV32IA-NEXT: and a5, a4, a1
3499; RV32IA-NEXT: not a5, a5
3500; RV32IA-NEXT: xor a5, a4, a5
3501; RV32IA-NEXT: and a5, a5, a2
3502; RV32IA-NEXT: xor a5, a4, a5
3503; RV32IA-NEXT: sc.w.aqrl a5, a5, (a0)
3504; RV32IA-NEXT: bnez a5, .LBB79_1
3505; RV32IA-NEXT: # %bb.2:
3506; RV32IA-NEXT: srl a0, a4, a3
3507; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]3508 %1 = atomicrmw nand i16* %a, i16 %b seq_cst
3509 ret i16 %1
3510}
3511
3512define i16 @atomicrmw_or_i16_monotonic(i16 *%a, i16 %b) nounwind {
3513; RV32I-LABEL: atomicrmw_or_i16_monotonic:
3514; RV32I: # %bb.0:
3515; RV32I-NEXT: addi sp, sp, -16
3516; RV32I-NEXT: sw ra, 12(sp)
3517; RV32I-NEXT: mv a2, zero
3518; RV32I-NEXT: call __atomic_fetch_or_2
3519; RV32I-NEXT: lw ra, 12(sp)
3520; RV32I-NEXT: addi sp, sp, 16
3521; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]3522;
3523; RV32IA-LABEL: atomicrmw_or_i16_monotonic:
3524; RV32IA: # %bb.0:
3525; RV32IA-NEXT: lui a2, 16
3526; RV32IA-NEXT: addi a2, a2, -1
3527; RV32IA-NEXT: and a1, a1, a2
3528; RV32IA-NEXT: slli a2, a0, 3
3529; RV32IA-NEXT: andi a2, a2, 24
3530; RV32IA-NEXT: sll a1, a1, a2
3531; RV32IA-NEXT: andi a0, a0, -4
3532; RV32IA-NEXT: amoor.w a0, a1, (a0)
3533; RV32IA-NEXT: srl a0, a0, a2
3534; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]3535 %1 = atomicrmw or i16* %a, i16 %b monotonic
3536 ret i16 %1
3537}
3538
3539define i16 @atomicrmw_or_i16_acquire(i16 *%a, i16 %b) nounwind {
3540; RV32I-LABEL: atomicrmw_or_i16_acquire:
3541; RV32I: # %bb.0:
3542; RV32I-NEXT: addi sp, sp, -16
3543; RV32I-NEXT: sw ra, 12(sp)
3544; RV32I-NEXT: addi a2, zero, 2
3545; RV32I-NEXT: call __atomic_fetch_or_2
3546; RV32I-NEXT: lw ra, 12(sp)
3547; RV32I-NEXT: addi sp, sp, 16
3548; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]3549;
3550; RV32IA-LABEL: atomicrmw_or_i16_acquire:
3551; RV32IA: # %bb.0:
3552; RV32IA-NEXT: lui a2, 16
3553; RV32IA-NEXT: addi a2, a2, -1
3554; RV32IA-NEXT: and a1, a1, a2
3555; RV32IA-NEXT: slli a2, a0, 3
3556; RV32IA-NEXT: andi a2, a2, 24
3557; RV32IA-NEXT: sll a1, a1, a2
3558; RV32IA-NEXT: andi a0, a0, -4
3559; RV32IA-NEXT: amoor.w.aq a0, a1, (a0)
3560; RV32IA-NEXT: srl a0, a0, a2
3561; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]3562 %1 = atomicrmw or i16* %a, i16 %b acquire
3563 ret i16 %1
3564}
3565
3566define i16 @atomicrmw_or_i16_release(i16 *%a, i16 %b) nounwind {
3567; RV32I-LABEL: atomicrmw_or_i16_release:
3568; RV32I: # %bb.0:
3569; RV32I-NEXT: addi sp, sp, -16
3570; RV32I-NEXT: sw ra, 12(sp)
3571; RV32I-NEXT: addi a2, zero, 3
3572; RV32I-NEXT: call __atomic_fetch_or_2
3573; RV32I-NEXT: lw ra, 12(sp)
3574; RV32I-NEXT: addi sp, sp, 16
3575; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]3576;
3577; RV32IA-LABEL: atomicrmw_or_i16_release:
3578; RV32IA: # %bb.0:
3579; RV32IA-NEXT: lui a2, 16
3580; RV32IA-NEXT: addi a2, a2, -1
3581; RV32IA-NEXT: and a1, a1, a2
3582; RV32IA-NEXT: slli a2, a0, 3
3583; RV32IA-NEXT: andi a2, a2, 24
3584; RV32IA-NEXT: sll a1, a1, a2
3585; RV32IA-NEXT: andi a0, a0, -4
3586; RV32IA-NEXT: amoor.w.rl a0, a1, (a0)
3587; RV32IA-NEXT: srl a0, a0, a2
3588; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]3589 %1 = atomicrmw or i16* %a, i16 %b release
3590 ret i16 %1
3591}
3592
3593define i16 @atomicrmw_or_i16_acq_rel(i16 *%a, i16 %b) nounwind {
3594; RV32I-LABEL: atomicrmw_or_i16_acq_rel:
3595; RV32I: # %bb.0:
3596; RV32I-NEXT: addi sp, sp, -16
3597; RV32I-NEXT: sw ra, 12(sp)
3598; RV32I-NEXT: addi a2, zero, 4
3599; RV32I-NEXT: call __atomic_fetch_or_2
3600; RV32I-NEXT: lw ra, 12(sp)
3601; RV32I-NEXT: addi sp, sp, 16
3602; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]3603;
3604; RV32IA-LABEL: atomicrmw_or_i16_acq_rel:
3605; RV32IA: # %bb.0:
3606; RV32IA-NEXT: lui a2, 16
3607; RV32IA-NEXT: addi a2, a2, -1
3608; RV32IA-NEXT: and a1, a1, a2
3609; RV32IA-NEXT: slli a2, a0, 3
3610; RV32IA-NEXT: andi a2, a2, 24
3611; RV32IA-NEXT: sll a1, a1, a2
3612; RV32IA-NEXT: andi a0, a0, -4
3613; RV32IA-NEXT: amoor.w.aqrl a0, a1, (a0)
3614; RV32IA-NEXT: srl a0, a0, a2
3615; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]3616 %1 = atomicrmw or i16* %a, i16 %b acq_rel
3617 ret i16 %1
3618}
3619
3620define i16 @atomicrmw_or_i16_seq_cst(i16 *%a, i16 %b) nounwind {
3621; RV32I-LABEL: atomicrmw_or_i16_seq_cst:
3622; RV32I: # %bb.0:
3623; RV32I-NEXT: addi sp, sp, -16
3624; RV32I-NEXT: sw ra, 12(sp)
3625; RV32I-NEXT: addi a2, zero, 5
3626; RV32I-NEXT: call __atomic_fetch_or_2
3627; RV32I-NEXT: lw ra, 12(sp)
3628; RV32I-NEXT: addi sp, sp, 16
3629; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]3630;
3631; RV32IA-LABEL: atomicrmw_or_i16_seq_cst:
3632; RV32IA: # %bb.0:
3633; RV32IA-NEXT: lui a2, 16
3634; RV32IA-NEXT: addi a2, a2, -1
3635; RV32IA-NEXT: and a1, a1, a2
3636; RV32IA-NEXT: slli a2, a0, 3
3637; RV32IA-NEXT: andi a2, a2, 24
3638; RV32IA-NEXT: sll a1, a1, a2
3639; RV32IA-NEXT: andi a0, a0, -4
3640; RV32IA-NEXT: amoor.w.aqrl a0, a1, (a0)
3641; RV32IA-NEXT: srl a0, a0, a2
3642; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]3643 %1 = atomicrmw or i16* %a, i16 %b seq_cst
3644 ret i16 %1
3645}
3646
3647define i16 @atomicrmw_xor_i16_monotonic(i16 *%a, i16 %b) nounwind {
3648; RV32I-LABEL: atomicrmw_xor_i16_monotonic:
3649; RV32I: # %bb.0:
3650; RV32I-NEXT: addi sp, sp, -16
3651; RV32I-NEXT: sw ra, 12(sp)
3652; RV32I-NEXT: mv a2, zero
3653; RV32I-NEXT: call __atomic_fetch_xor_2
3654; RV32I-NEXT: lw ra, 12(sp)
3655; RV32I-NEXT: addi sp, sp, 16
3656; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]3657;
3658; RV32IA-LABEL: atomicrmw_xor_i16_monotonic:
3659; RV32IA: # %bb.0:
3660; RV32IA-NEXT: lui a2, 16
3661; RV32IA-NEXT: addi a2, a2, -1
3662; RV32IA-NEXT: and a1, a1, a2
3663; RV32IA-NEXT: slli a2, a0, 3
3664; RV32IA-NEXT: andi a2, a2, 24
3665; RV32IA-NEXT: sll a1, a1, a2
3666; RV32IA-NEXT: andi a0, a0, -4
3667; RV32IA-NEXT: amoxor.w a0, a1, (a0)
3668; RV32IA-NEXT: srl a0, a0, a2
3669; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]3670 %1 = atomicrmw xor i16* %a, i16 %b monotonic
3671 ret i16 %1
3672}
3673
3674define i16 @atomicrmw_xor_i16_acquire(i16 *%a, i16 %b) nounwind {
3675; RV32I-LABEL: atomicrmw_xor_i16_acquire:
3676; RV32I: # %bb.0:
3677; RV32I-NEXT: addi sp, sp, -16
3678; RV32I-NEXT: sw ra, 12(sp)
3679; RV32I-NEXT: addi a2, zero, 2
3680; RV32I-NEXT: call __atomic_fetch_xor_2
3681; RV32I-NEXT: lw ra, 12(sp)
3682; RV32I-NEXT: addi sp, sp, 16
3683; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]3684;
3685; RV32IA-LABEL: atomicrmw_xor_i16_acquire:
3686; RV32IA: # %bb.0:
3687; RV32IA-NEXT: lui a2, 16
3688; RV32IA-NEXT: addi a2, a2, -1
3689; RV32IA-NEXT: and a1, a1, a2
3690; RV32IA-NEXT: slli a2, a0, 3
3691; RV32IA-NEXT: andi a2, a2, 24
3692; RV32IA-NEXT: sll a1, a1, a2
3693; RV32IA-NEXT: andi a0, a0, -4
3694; RV32IA-NEXT: amoxor.w.aq a0, a1, (a0)
3695; RV32IA-NEXT: srl a0, a0, a2
3696; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]3697 %1 = atomicrmw xor i16* %a, i16 %b acquire
3698 ret i16 %1
3699}
3700
3701define i16 @atomicrmw_xor_i16_release(i16 *%a, i16 %b) nounwind {
3702; RV32I-LABEL: atomicrmw_xor_i16_release:
3703; RV32I: # %bb.0:
3704; RV32I-NEXT: addi sp, sp, -16
3705; RV32I-NEXT: sw ra, 12(sp)
3706; RV32I-NEXT: addi a2, zero, 3
3707; RV32I-NEXT: call __atomic_fetch_xor_2
3708; RV32I-NEXT: lw ra, 12(sp)
3709; RV32I-NEXT: addi sp, sp, 16
3710; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]3711;
3712; RV32IA-LABEL: atomicrmw_xor_i16_release:
3713; RV32IA: # %bb.0:
3714; RV32IA-NEXT: lui a2, 16
3715; RV32IA-NEXT: addi a2, a2, -1
3716; RV32IA-NEXT: and a1, a1, a2
3717; RV32IA-NEXT: slli a2, a0, 3
3718; RV32IA-NEXT: andi a2, a2, 24
3719; RV32IA-NEXT: sll a1, a1, a2
3720; RV32IA-NEXT: andi a0, a0, -4
3721; RV32IA-NEXT: amoxor.w.rl a0, a1, (a0)
3722; RV32IA-NEXT: srl a0, a0, a2
3723; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]3724 %1 = atomicrmw xor i16* %a, i16 %b release
3725 ret i16 %1
3726}
3727
3728define i16 @atomicrmw_xor_i16_acq_rel(i16 *%a, i16 %b) nounwind {
3729; RV32I-LABEL: atomicrmw_xor_i16_acq_rel:
3730; RV32I: # %bb.0:
3731; RV32I-NEXT: addi sp, sp, -16
3732; RV32I-NEXT: sw ra, 12(sp)
3733; RV32I-NEXT: addi a2, zero, 4
3734; RV32I-NEXT: call __atomic_fetch_xor_2
3735; RV32I-NEXT: lw ra, 12(sp)
3736; RV32I-NEXT: addi sp, sp, 16
3737; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]3738;
3739; RV32IA-LABEL: atomicrmw_xor_i16_acq_rel:
3740; RV32IA: # %bb.0:
3741; RV32IA-NEXT: lui a2, 16
3742; RV32IA-NEXT: addi a2, a2, -1
3743; RV32IA-NEXT: and a1, a1, a2
3744; RV32IA-NEXT: slli a2, a0, 3
3745; RV32IA-NEXT: andi a2, a2, 24
3746; RV32IA-NEXT: sll a1, a1, a2
3747; RV32IA-NEXT: andi a0, a0, -4
3748; RV32IA-NEXT: amoxor.w.aqrl a0, a1, (a0)
3749; RV32IA-NEXT: srl a0, a0, a2
3750; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]3751 %1 = atomicrmw xor i16* %a, i16 %b acq_rel
3752 ret i16 %1
3753}
3754
3755define i16 @atomicrmw_xor_i16_seq_cst(i16 *%a, i16 %b) nounwind {
3756; RV32I-LABEL: atomicrmw_xor_i16_seq_cst:
3757; RV32I: # %bb.0:
3758; RV32I-NEXT: addi sp, sp, -16
3759; RV32I-NEXT: sw ra, 12(sp)
3760; RV32I-NEXT: addi a2, zero, 5
3761; RV32I-NEXT: call __atomic_fetch_xor_2
3762; RV32I-NEXT: lw ra, 12(sp)
3763; RV32I-NEXT: addi sp, sp, 16
3764; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]3765;
3766; RV32IA-LABEL: atomicrmw_xor_i16_seq_cst:
3767; RV32IA: # %bb.0:
3768; RV32IA-NEXT: lui a2, 16
3769; RV32IA-NEXT: addi a2, a2, -1
3770; RV32IA-NEXT: and a1, a1, a2
3771; RV32IA-NEXT: slli a2, a0, 3
3772; RV32IA-NEXT: andi a2, a2, 24
3773; RV32IA-NEXT: sll a1, a1, a2
3774; RV32IA-NEXT: andi a0, a0, -4
3775; RV32IA-NEXT: amoxor.w.aqrl a0, a1, (a0)
3776; RV32IA-NEXT: srl a0, a0, a2
3777; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]3778 %1 = atomicrmw xor i16* %a, i16 %b seq_cst
3779 ret i16 %1
3780}
3781
3782define i16 @atomicrmw_max_i16_monotonic(i16 *%a, i16 %b) nounwind {
3783; RV32I-LABEL: atomicrmw_max_i16_monotonic:
3784; RV32I: # %bb.0:
3785; RV32I-NEXT: addi sp, sp, -32
3786; RV32I-NEXT: sw ra, 28(sp)
3787; RV32I-NEXT: sw s1, 24(sp)
3788; RV32I-NEXT: sw s2, 20(sp)
3789; RV32I-NEXT: sw s3, 16(sp)
3790; RV32I-NEXT: sw s4, 12(sp)
3791; RV32I-NEXT: mv s2, a1
3792; RV32I-NEXT: mv s4, a0
3793; RV32I-NEXT: lhu a0, 0(a0)
3794; RV32I-NEXT: slli a1, a1, 16
3795; RV32I-NEXT: srai s1, a1, 16
3796; RV32I-NEXT: addi s3, sp, 10
3797; RV32I-NEXT: .LBB90_1: # %atomicrmw.start
3798; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
3799; RV32I-NEXT: slli a1, a0, 16
3800; RV32I-NEXT: srai a1, a1, 16
3801; RV32I-NEXT: mv a2, a0
3802; RV32I-NEXT: blt s1, a1, .LBB90_3
3803; RV32I-NEXT: # %bb.2: # %atomicrmw.start
3804; RV32I-NEXT: # in Loop: Header=BB90_1 Depth=1
3805; RV32I-NEXT: mv a2, s2
3806; RV32I-NEXT: .LBB90_3: # %atomicrmw.start
3807; RV32I-NEXT: # in Loop: Header=BB90_1 Depth=1
3808; RV32I-NEXT: sh a0, 10(sp)
3809; RV32I-NEXT: mv a0, s4
3810; RV32I-NEXT: mv a1, s3
3811; RV32I-NEXT: mv a3, zero
3812; RV32I-NEXT: mv a4, zero
3813; RV32I-NEXT: call __atomic_compare_exchange_2
3814; RV32I-NEXT: mv a1, a0
3815; RV32I-NEXT: lh a0, 10(sp)
3816; RV32I-NEXT: beqz a1, .LBB90_1
3817; RV32I-NEXT: # %bb.4: # %atomicrmw.end
3818; RV32I-NEXT: lw s4, 12(sp)
3819; RV32I-NEXT: lw s3, 16(sp)
3820; RV32I-NEXT: lw s2, 20(sp)
3821; RV32I-NEXT: lw s1, 24(sp)
3822; RV32I-NEXT: lw ra, 28(sp)
3823; RV32I-NEXT: addi sp, sp, 32
3824; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]3825;
3826; RV32IA-LABEL: atomicrmw_max_i16_monotonic:
3827; RV32IA: # %bb.0:
3828; RV32IA-NEXT: slli a2, a0, 3
3829; RV32IA-NEXT: andi a2, a2, 24
3830; RV32IA-NEXT: addi a3, zero, 16
3831; RV32IA-NEXT: sub a6, a3, a2
3832; RV32IA-NEXT: lui a4, 16
3833; RV32IA-NEXT: addi a4, a4, -1
3834; RV32IA-NEXT: sll a7, a4, a2
3835; RV32IA-NEXT: slli a1, a1, 16
3836; RV32IA-NEXT: srai a1, a1, 16
3837; RV32IA-NEXT: sll a1, a1, a2
3838; RV32IA-NEXT: andi a0, a0, -4
3839; RV32IA-NEXT: .LBB90_1: # =>This Inner Loop Header: Depth=1
3840; RV32IA-NEXT: lr.w a5, (a0)
3841; RV32IA-NEXT: and a4, a5, a7
3842; RV32IA-NEXT: mv a3, a5
3843; RV32IA-NEXT: sll a4, a4, a6
3844; RV32IA-NEXT: sra a4, a4, a6
3845; RV32IA-NEXT: bge a4, a1, .LBB90_3
3846; RV32IA-NEXT: # %bb.2: # in Loop: Header=BB90_1 Depth=1
3847; RV32IA-NEXT: xor a3, a5, a1
3848; RV32IA-NEXT: and a3, a3, a7
3849; RV32IA-NEXT: xor a3, a5, a3
3850; RV32IA-NEXT: .LBB90_3: # in Loop: Header=BB90_1 Depth=1
3851; RV32IA-NEXT: sc.w a3, a3, (a0)
3852; RV32IA-NEXT: bnez a3, .LBB90_1
3853; RV32IA-NEXT: # %bb.4:
3854; RV32IA-NEXT: srl a0, a5, a2
3855; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]3856 %1 = atomicrmw max i16* %a, i16 %b monotonic
3857 ret i16 %1
3858}
3859
3860define i16 @atomicrmw_max_i16_acquire(i16 *%a, i16 %b) nounwind {
3861; RV32I-LABEL: atomicrmw_max_i16_acquire:
3862; RV32I: # %bb.0:
3863; RV32I-NEXT: addi sp, sp, -32
3864; RV32I-NEXT: sw ra, 28(sp)
3865; RV32I-NEXT: sw s1, 24(sp)
3866; RV32I-NEXT: sw s2, 20(sp)
3867; RV32I-NEXT: sw s3, 16(sp)
3868; RV32I-NEXT: sw s4, 12(sp)
3869; RV32I-NEXT: sw s5, 8(sp)
3870; RV32I-NEXT: mv s2, a1
3871; RV32I-NEXT: mv s4, a0
3872; RV32I-NEXT: lhu a0, 0(a0)
3873; RV32I-NEXT: slli a1, a1, 16
3874; RV32I-NEXT: srai s5, a1, 16
3875; RV32I-NEXT: addi s3, sp, 6
3876; RV32I-NEXT: addi s1, zero, 2
3877; RV32I-NEXT: .LBB91_1: # %atomicrmw.start
3878; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
3879; RV32I-NEXT: slli a1, a0, 16
3880; RV32I-NEXT: srai a1, a1, 16
3881; RV32I-NEXT: mv a2, a0
3882; RV32I-NEXT: blt s5, a1, .LBB91_3
3883; RV32I-NEXT: # %bb.2: # %atomicrmw.start
3884; RV32I-NEXT: # in Loop: Header=BB91_1 Depth=1
3885; RV32I-NEXT: mv a2, s2
3886; RV32I-NEXT: .LBB91_3: # %atomicrmw.start
3887; RV32I-NEXT: # in Loop: Header=BB91_1 Depth=1
3888; RV32I-NEXT: sh a0, 6(sp)
3889; RV32I-NEXT: mv a0, s4
3890; RV32I-NEXT: mv a1, s3
3891; RV32I-NEXT: mv a3, s1
3892; RV32I-NEXT: mv a4, s1
3893; RV32I-NEXT: call __atomic_compare_exchange_2
3894; RV32I-NEXT: mv a1, a0
3895; RV32I-NEXT: lh a0, 6(sp)
3896; RV32I-NEXT: beqz a1, .LBB91_1
3897; RV32I-NEXT: # %bb.4: # %atomicrmw.end
3898; RV32I-NEXT: lw s5, 8(sp)
3899; RV32I-NEXT: lw s4, 12(sp)
3900; RV32I-NEXT: lw s3, 16(sp)
3901; RV32I-NEXT: lw s2, 20(sp)
3902; RV32I-NEXT: lw s1, 24(sp)
3903; RV32I-NEXT: lw ra, 28(sp)
3904; RV32I-NEXT: addi sp, sp, 32
3905; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]3906;
3907; RV32IA-LABEL: atomicrmw_max_i16_acquire:
3908; RV32IA: # %bb.0:
3909; RV32IA-NEXT: slli a2, a0, 3
3910; RV32IA-NEXT: andi a2, a2, 24
3911; RV32IA-NEXT: addi a3, zero, 16
3912; RV32IA-NEXT: sub a6, a3, a2
3913; RV32IA-NEXT: lui a4, 16
3914; RV32IA-NEXT: addi a4, a4, -1
3915; RV32IA-NEXT: sll a7, a4, a2
3916; RV32IA-NEXT: slli a1, a1, 16
3917; RV32IA-NEXT: srai a1, a1, 16
3918; RV32IA-NEXT: sll a1, a1, a2
3919; RV32IA-NEXT: andi a0, a0, -4
3920; RV32IA-NEXT: .LBB91_1: # =>This Inner Loop Header: Depth=1
3921; RV32IA-NEXT: lr.w.aq a5, (a0)
3922; RV32IA-NEXT: and a4, a5, a7
3923; RV32IA-NEXT: mv a3, a5
3924; RV32IA-NEXT: sll a4, a4, a6
3925; RV32IA-NEXT: sra a4, a4, a6
3926; RV32IA-NEXT: bge a4, a1, .LBB91_3
3927; RV32IA-NEXT: # %bb.2: # in Loop: Header=BB91_1 Depth=1
3928; RV32IA-NEXT: xor a3, a5, a1
3929; RV32IA-NEXT: and a3, a3, a7
3930; RV32IA-NEXT: xor a3, a5, a3
3931; RV32IA-NEXT: .LBB91_3: # in Loop: Header=BB91_1 Depth=1
3932; RV32IA-NEXT: sc.w a3, a3, (a0)
3933; RV32IA-NEXT: bnez a3, .LBB91_1
3934; RV32IA-NEXT: # %bb.4:
3935; RV32IA-NEXT: srl a0, a5, a2
3936; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]3937 %1 = atomicrmw max i16* %a, i16 %b acquire
3938 ret i16 %1
3939}
3940
3941define i16 @atomicrmw_max_i16_release(i16 *%a, i16 %b) nounwind {
3942; RV32I-LABEL: atomicrmw_max_i16_release:
3943; RV32I: # %bb.0:
3944; RV32I-NEXT: addi sp, sp, -32
3945; RV32I-NEXT: sw ra, 28(sp)
3946; RV32I-NEXT: sw s1, 24(sp)
3947; RV32I-NEXT: sw s2, 20(sp)
3948; RV32I-NEXT: sw s3, 16(sp)
3949; RV32I-NEXT: sw s4, 12(sp)
3950; RV32I-NEXT: sw s5, 8(sp)
3951; RV32I-NEXT: mv s2, a1
3952; RV32I-NEXT: mv s5, a0
3953; RV32I-NEXT: lhu a0, 0(a0)
3954; RV32I-NEXT: slli a1, a1, 16
3955; RV32I-NEXT: srai s1, a1, 16
3956; RV32I-NEXT: addi s3, sp, 6
3957; RV32I-NEXT: addi s4, zero, 3
3958; RV32I-NEXT: .LBB92_1: # %atomicrmw.start
3959; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
3960; RV32I-NEXT: slli a1, a0, 16
3961; RV32I-NEXT: srai a1, a1, 16
3962; RV32I-NEXT: mv a2, a0
3963; RV32I-NEXT: blt s1, a1, .LBB92_3
3964; RV32I-NEXT: # %bb.2: # %atomicrmw.start
3965; RV32I-NEXT: # in Loop: Header=BB92_1 Depth=1
3966; RV32I-NEXT: mv a2, s2
3967; RV32I-NEXT: .LBB92_3: # %atomicrmw.start
3968; RV32I-NEXT: # in Loop: Header=BB92_1 Depth=1
3969; RV32I-NEXT: sh a0, 6(sp)
3970; RV32I-NEXT: mv a0, s5
3971; RV32I-NEXT: mv a1, s3
3972; RV32I-NEXT: mv a3, s4
3973; RV32I-NEXT: mv a4, zero
3974; RV32I-NEXT: call __atomic_compare_exchange_2
3975; RV32I-NEXT: mv a1, a0
3976; RV32I-NEXT: lh a0, 6(sp)
3977; RV32I-NEXT: beqz a1, .LBB92_1
3978; RV32I-NEXT: # %bb.4: # %atomicrmw.end
3979; RV32I-NEXT: lw s5, 8(sp)
3980; RV32I-NEXT: lw s4, 12(sp)
3981; RV32I-NEXT: lw s3, 16(sp)
3982; RV32I-NEXT: lw s2, 20(sp)
3983; RV32I-NEXT: lw s1, 24(sp)
3984; RV32I-NEXT: lw ra, 28(sp)
3985; RV32I-NEXT: addi sp, sp, 32
3986; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]3987;
3988; RV32IA-LABEL: atomicrmw_max_i16_release:
3989; RV32IA: # %bb.0:
3990; RV32IA-NEXT: slli a2, a0, 3
3991; RV32IA-NEXT: andi a2, a2, 24
3992; RV32IA-NEXT: addi a3, zero, 16
3993; RV32IA-NEXT: sub a6, a3, a2
3994; RV32IA-NEXT: lui a4, 16
3995; RV32IA-NEXT: addi a4, a4, -1
3996; RV32IA-NEXT: sll a7, a4, a2
3997; RV32IA-NEXT: slli a1, a1, 16
3998; RV32IA-NEXT: srai a1, a1, 16
3999; RV32IA-NEXT: sll a1, a1, a2
4000; RV32IA-NEXT: andi a0, a0, -4
4001; RV32IA-NEXT: .LBB92_1: # =>This Inner Loop Header: Depth=1
4002; RV32IA-NEXT: lr.w a5, (a0)
4003; RV32IA-NEXT: and a4, a5, a7
4004; RV32IA-NEXT: mv a3, a5
4005; RV32IA-NEXT: sll a4, a4, a6
4006; RV32IA-NEXT: sra a4, a4, a6
4007; RV32IA-NEXT: bge a4, a1, .LBB92_3
4008; RV32IA-NEXT: # %bb.2: # in Loop: Header=BB92_1 Depth=1
4009; RV32IA-NEXT: xor a3, a5, a1
4010; RV32IA-NEXT: and a3, a3, a7
4011; RV32IA-NEXT: xor a3, a5, a3
4012; RV32IA-NEXT: .LBB92_3: # in Loop: Header=BB92_1 Depth=1
4013; RV32IA-NEXT: sc.w.rl a3, a3, (a0)
4014; RV32IA-NEXT: bnez a3, .LBB92_1
4015; RV32IA-NEXT: # %bb.4:
4016; RV32IA-NEXT: srl a0, a5, a2
4017; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]4018 %1 = atomicrmw max i16* %a, i16 %b release
4019 ret i16 %1
4020}
4021
4022define i16 @atomicrmw_max_i16_acq_rel(i16 *%a, i16 %b) nounwind {
4023; RV32I-LABEL: atomicrmw_max_i16_acq_rel:
4024; RV32I: # %bb.0:
4025; RV32I-NEXT: addi sp, sp, -32
4026; RV32I-NEXT: sw ra, 28(sp)
4027; RV32I-NEXT: sw s1, 24(sp)
4028; RV32I-NEXT: sw s2, 20(sp)
4029; RV32I-NEXT: sw s3, 16(sp)
4030; RV32I-NEXT: sw s4, 12(sp)
4031; RV32I-NEXT: sw s5, 8(sp)
4032; RV32I-NEXT: sw s6, 4(sp)
4033; RV32I-NEXT: mv s2, a1
4034; RV32I-NEXT: mv s6, a0
4035; RV32I-NEXT: lhu a0, 0(a0)
4036; RV32I-NEXT: slli a1, a1, 16
4037; RV32I-NEXT: srai s1, a1, 16
4038; RV32I-NEXT: addi s3, sp, 2
4039; RV32I-NEXT: addi s4, zero, 4
4040; RV32I-NEXT: addi s5, zero, 2
4041; RV32I-NEXT: .LBB93_1: # %atomicrmw.start
4042; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
4043; RV32I-NEXT: slli a1, a0, 16
4044; RV32I-NEXT: srai a1, a1, 16
4045; RV32I-NEXT: mv a2, a0
4046; RV32I-NEXT: blt s1, a1, .LBB93_3
4047; RV32I-NEXT: # %bb.2: # %atomicrmw.start
4048; RV32I-NEXT: # in Loop: Header=BB93_1 Depth=1
4049; RV32I-NEXT: mv a2, s2
4050; RV32I-NEXT: .LBB93_3: # %atomicrmw.start
4051; RV32I-NEXT: # in Loop: Header=BB93_1 Depth=1
4052; RV32I-NEXT: sh a0, 2(sp)
4053; RV32I-NEXT: mv a0, s6
4054; RV32I-NEXT: mv a1, s3
4055; RV32I-NEXT: mv a3, s4
4056; RV32I-NEXT: mv a4, s5
4057; RV32I-NEXT: call __atomic_compare_exchange_2
4058; RV32I-NEXT: mv a1, a0
4059; RV32I-NEXT: lh a0, 2(sp)
4060; RV32I-NEXT: beqz a1, .LBB93_1
4061; RV32I-NEXT: # %bb.4: # %atomicrmw.end
4062; RV32I-NEXT: lw s6, 4(sp)
4063; RV32I-NEXT: lw s5, 8(sp)
4064; RV32I-NEXT: lw s4, 12(sp)
4065; RV32I-NEXT: lw s3, 16(sp)
4066; RV32I-NEXT: lw s2, 20(sp)
4067; RV32I-NEXT: lw s1, 24(sp)
4068; RV32I-NEXT: lw ra, 28(sp)
4069; RV32I-NEXT: addi sp, sp, 32
4070; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]4071;
4072; RV32IA-LABEL: atomicrmw_max_i16_acq_rel:
4073; RV32IA: # %bb.0:
4074; RV32IA-NEXT: slli a2, a0, 3
4075; RV32IA-NEXT: andi a2, a2, 24
4076; RV32IA-NEXT: addi a3, zero, 16
4077; RV32IA-NEXT: sub a6, a3, a2
4078; RV32IA-NEXT: lui a4, 16
4079; RV32IA-NEXT: addi a4, a4, -1
4080; RV32IA-NEXT: sll a7, a4, a2
4081; RV32IA-NEXT: slli a1, a1, 16
4082; RV32IA-NEXT: srai a1, a1, 16
4083; RV32IA-NEXT: sll a1, a1, a2
4084; RV32IA-NEXT: andi a0, a0, -4
4085; RV32IA-NEXT: .LBB93_1: # =>This Inner Loop Header: Depth=1
4086; RV32IA-NEXT: lr.w.aq a5, (a0)
4087; RV32IA-NEXT: and a4, a5, a7
4088; RV32IA-NEXT: mv a3, a5
4089; RV32IA-NEXT: sll a4, a4, a6
4090; RV32IA-NEXT: sra a4, a4, a6
4091; RV32IA-NEXT: bge a4, a1, .LBB93_3
4092; RV32IA-NEXT: # %bb.2: # in Loop: Header=BB93_1 Depth=1
4093; RV32IA-NEXT: xor a3, a5, a1
4094; RV32IA-NEXT: and a3, a3, a7
4095; RV32IA-NEXT: xor a3, a5, a3
4096; RV32IA-NEXT: .LBB93_3: # in Loop: Header=BB93_1 Depth=1
4097; RV32IA-NEXT: sc.w.rl a3, a3, (a0)
4098; RV32IA-NEXT: bnez a3, .LBB93_1
4099; RV32IA-NEXT: # %bb.4:
4100; RV32IA-NEXT: srl a0, a5, a2
4101; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]4102 %1 = atomicrmw max i16* %a, i16 %b acq_rel
4103 ret i16 %1
4104}
4105
4106define i16 @atomicrmw_max_i16_seq_cst(i16 *%a, i16 %b) nounwind {
4107; RV32I-LABEL: atomicrmw_max_i16_seq_cst:
4108; RV32I: # %bb.0:
4109; RV32I-NEXT: addi sp, sp, -32
4110; RV32I-NEXT: sw ra, 28(sp)
4111; RV32I-NEXT: sw s1, 24(sp)
4112; RV32I-NEXT: sw s2, 20(sp)
4113; RV32I-NEXT: sw s3, 16(sp)
4114; RV32I-NEXT: sw s4, 12(sp)
4115; RV32I-NEXT: sw s5, 8(sp)
4116; RV32I-NEXT: mv s2, a1
4117; RV32I-NEXT: mv s4, a0
4118; RV32I-NEXT: lhu a0, 0(a0)
4119; RV32I-NEXT: slli a1, a1, 16
4120; RV32I-NEXT: srai s5, a1, 16
4121; RV32I-NEXT: addi s3, sp, 6
4122; RV32I-NEXT: addi s1, zero, 5
4123; RV32I-NEXT: .LBB94_1: # %atomicrmw.start
4124; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
4125; RV32I-NEXT: slli a1, a0, 16
4126; RV32I-NEXT: srai a1, a1, 16
4127; RV32I-NEXT: mv a2, a0
4128; RV32I-NEXT: blt s5, a1, .LBB94_3
4129; RV32I-NEXT: # %bb.2: # %atomicrmw.start
4130; RV32I-NEXT: # in Loop: Header=BB94_1 Depth=1
4131; RV32I-NEXT: mv a2, s2
4132; RV32I-NEXT: .LBB94_3: # %atomicrmw.start
4133; RV32I-NEXT: # in Loop: Header=BB94_1 Depth=1
4134; RV32I-NEXT: sh a0, 6(sp)
4135; RV32I-NEXT: mv a0, s4
4136; RV32I-NEXT: mv a1, s3
4137; RV32I-NEXT: mv a3, s1
4138; RV32I-NEXT: mv a4, s1
4139; RV32I-NEXT: call __atomic_compare_exchange_2
4140; RV32I-NEXT: mv a1, a0
4141; RV32I-NEXT: lh a0, 6(sp)
4142; RV32I-NEXT: beqz a1, .LBB94_1
4143; RV32I-NEXT: # %bb.4: # %atomicrmw.end
4144; RV32I-NEXT: lw s5, 8(sp)
4145; RV32I-NEXT: lw s4, 12(sp)
4146; RV32I-NEXT: lw s3, 16(sp)
4147; RV32I-NEXT: lw s2, 20(sp)
4148; RV32I-NEXT: lw s1, 24(sp)
4149; RV32I-NEXT: lw ra, 28(sp)
4150; RV32I-NEXT: addi sp, sp, 32
4151; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]4152;
4153; RV32IA-LABEL: atomicrmw_max_i16_seq_cst:
4154; RV32IA: # %bb.0:
4155; RV32IA-NEXT: slli a2, a0, 3
4156; RV32IA-NEXT: andi a2, a2, 24
4157; RV32IA-NEXT: addi a3, zero, 16
4158; RV32IA-NEXT: sub a6, a3, a2
4159; RV32IA-NEXT: lui a4, 16
4160; RV32IA-NEXT: addi a4, a4, -1
4161; RV32IA-NEXT: sll a7, a4, a2
4162; RV32IA-NEXT: slli a1, a1, 16
4163; RV32IA-NEXT: srai a1, a1, 16
4164; RV32IA-NEXT: sll a1, a1, a2
4165; RV32IA-NEXT: andi a0, a0, -4
4166; RV32IA-NEXT: .LBB94_1: # =>This Inner Loop Header: Depth=1
4167; RV32IA-NEXT: lr.w.aqrl a5, (a0)
4168; RV32IA-NEXT: and a4, a5, a7
4169; RV32IA-NEXT: mv a3, a5
4170; RV32IA-NEXT: sll a4, a4, a6
4171; RV32IA-NEXT: sra a4, a4, a6
4172; RV32IA-NEXT: bge a4, a1, .LBB94_3
4173; RV32IA-NEXT: # %bb.2: # in Loop: Header=BB94_1 Depth=1
4174; RV32IA-NEXT: xor a3, a5, a1
4175; RV32IA-NEXT: and a3, a3, a7
4176; RV32IA-NEXT: xor a3, a5, a3
4177; RV32IA-NEXT: .LBB94_3: # in Loop: Header=BB94_1 Depth=1
4178; RV32IA-NEXT: sc.w.aqrl a3, a3, (a0)
4179; RV32IA-NEXT: bnez a3, .LBB94_1
4180; RV32IA-NEXT: # %bb.4:
4181; RV32IA-NEXT: srl a0, a5, a2
4182; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]4183 %1 = atomicrmw max i16* %a, i16 %b seq_cst
4184 ret i16 %1
4185}
4186
4187define i16 @atomicrmw_min_i16_monotonic(i16 *%a, i16 %b) nounwind {
4188; RV32I-LABEL: atomicrmw_min_i16_monotonic:
4189; RV32I: # %bb.0:
4190; RV32I-NEXT: addi sp, sp, -32
4191; RV32I-NEXT: sw ra, 28(sp)
4192; RV32I-NEXT: sw s1, 24(sp)
4193; RV32I-NEXT: sw s2, 20(sp)
4194; RV32I-NEXT: sw s3, 16(sp)
4195; RV32I-NEXT: sw s4, 12(sp)
4196; RV32I-NEXT: mv s2, a1
4197; RV32I-NEXT: mv s4, a0
4198; RV32I-NEXT: lhu a0, 0(a0)
4199; RV32I-NEXT: slli a1, a1, 16
4200; RV32I-NEXT: srai s1, a1, 16
4201; RV32I-NEXT: addi s3, sp, 10
4202; RV32I-NEXT: .LBB95_1: # %atomicrmw.start
4203; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
4204; RV32I-NEXT: slli a1, a0, 16
4205; RV32I-NEXT: srai a1, a1, 16
4206; RV32I-NEXT: mv a2, a0
4207; RV32I-NEXT: bge s1, a1, .LBB95_3
4208; RV32I-NEXT: # %bb.2: # %atomicrmw.start
4209; RV32I-NEXT: # in Loop: Header=BB95_1 Depth=1
4210; RV32I-NEXT: mv a2, s2
4211; RV32I-NEXT: .LBB95_3: # %atomicrmw.start
4212; RV32I-NEXT: # in Loop: Header=BB95_1 Depth=1
4213; RV32I-NEXT: sh a0, 10(sp)
4214; RV32I-NEXT: mv a0, s4
4215; RV32I-NEXT: mv a1, s3
4216; RV32I-NEXT: mv a3, zero
4217; RV32I-NEXT: mv a4, zero
4218; RV32I-NEXT: call __atomic_compare_exchange_2
4219; RV32I-NEXT: mv a1, a0
4220; RV32I-NEXT: lh a0, 10(sp)
4221; RV32I-NEXT: beqz a1, .LBB95_1
4222; RV32I-NEXT: # %bb.4: # %atomicrmw.end
4223; RV32I-NEXT: lw s4, 12(sp)
4224; RV32I-NEXT: lw s3, 16(sp)
4225; RV32I-NEXT: lw s2, 20(sp)
4226; RV32I-NEXT: lw s1, 24(sp)
4227; RV32I-NEXT: lw ra, 28(sp)
4228; RV32I-NEXT: addi sp, sp, 32
4229; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]4230;
4231; RV32IA-LABEL: atomicrmw_min_i16_monotonic:
4232; RV32IA: # %bb.0:
4233; RV32IA-NEXT: slli a2, a0, 3
4234; RV32IA-NEXT: andi a2, a2, 24
4235; RV32IA-NEXT: addi a3, zero, 16
4236; RV32IA-NEXT: sub a6, a3, a2
4237; RV32IA-NEXT: lui a4, 16
4238; RV32IA-NEXT: addi a4, a4, -1
4239; RV32IA-NEXT: sll a7, a4, a2
4240; RV32IA-NEXT: slli a1, a1, 16
4241; RV32IA-NEXT: srai a1, a1, 16
4242; RV32IA-NEXT: sll a1, a1, a2
4243; RV32IA-NEXT: andi a0, a0, -4
4244; RV32IA-NEXT: .LBB95_1: # =>This Inner Loop Header: Depth=1
4245; RV32IA-NEXT: lr.w a5, (a0)
4246; RV32IA-NEXT: and a4, a5, a7
4247; RV32IA-NEXT: mv a3, a5
4248; RV32IA-NEXT: sll a4, a4, a6
4249; RV32IA-NEXT: sra a4, a4, a6
4250; RV32IA-NEXT: bge a1, a4, .LBB95_3
4251; RV32IA-NEXT: # %bb.2: # in Loop: Header=BB95_1 Depth=1
4252; RV32IA-NEXT: xor a3, a5, a1
4253; RV32IA-NEXT: and a3, a3, a7
4254; RV32IA-NEXT: xor a3, a5, a3
4255; RV32IA-NEXT: .LBB95_3: # in Loop: Header=BB95_1 Depth=1
4256; RV32IA-NEXT: sc.w a3, a3, (a0)
4257; RV32IA-NEXT: bnez a3, .LBB95_1
4258; RV32IA-NEXT: # %bb.4:
4259; RV32IA-NEXT: srl a0, a5, a2
4260; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]4261 %1 = atomicrmw min i16* %a, i16 %b monotonic
4262 ret i16 %1
4263}
4264
4265define i16 @atomicrmw_min_i16_acquire(i16 *%a, i16 %b) nounwind {
4266; RV32I-LABEL: atomicrmw_min_i16_acquire:
4267; RV32I: # %bb.0:
4268; RV32I-NEXT: addi sp, sp, -32
4269; RV32I-NEXT: sw ra, 28(sp)
4270; RV32I-NEXT: sw s1, 24(sp)
4271; RV32I-NEXT: sw s2, 20(sp)
4272; RV32I-NEXT: sw s3, 16(sp)
4273; RV32I-NEXT: sw s4, 12(sp)
4274; RV32I-NEXT: sw s5, 8(sp)
4275; RV32I-NEXT: mv s2, a1
4276; RV32I-NEXT: mv s4, a0
4277; RV32I-NEXT: lhu a0, 0(a0)
4278; RV32I-NEXT: slli a1, a1, 16
4279; RV32I-NEXT: srai s5, a1, 16
4280; RV32I-NEXT: addi s3, sp, 6
4281; RV32I-NEXT: addi s1, zero, 2
4282; RV32I-NEXT: .LBB96_1: # %atomicrmw.start
4283; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
4284; RV32I-NEXT: slli a1, a0, 16
4285; RV32I-NEXT: srai a1, a1, 16
4286; RV32I-NEXT: mv a2, a0
4287; RV32I-NEXT: bge s5, a1, .LBB96_3
4288; RV32I-NEXT: # %bb.2: # %atomicrmw.start
4289; RV32I-NEXT: # in Loop: Header=BB96_1 Depth=1
4290; RV32I-NEXT: mv a2, s2
4291; RV32I-NEXT: .LBB96_3: # %atomicrmw.start
4292; RV32I-NEXT: # in Loop: Header=BB96_1 Depth=1
4293; RV32I-NEXT: sh a0, 6(sp)
4294; RV32I-NEXT: mv a0, s4
4295; RV32I-NEXT: mv a1, s3
4296; RV32I-NEXT: mv a3, s1
4297; RV32I-NEXT: mv a4, s1
4298; RV32I-NEXT: call __atomic_compare_exchange_2
4299; RV32I-NEXT: mv a1, a0
4300; RV32I-NEXT: lh a0, 6(sp)
4301; RV32I-NEXT: beqz a1, .LBB96_1
4302; RV32I-NEXT: # %bb.4: # %atomicrmw.end
4303; RV32I-NEXT: lw s5, 8(sp)
4304; RV32I-NEXT: lw s4, 12(sp)
4305; RV32I-NEXT: lw s3, 16(sp)
4306; RV32I-NEXT: lw s2, 20(sp)
4307; RV32I-NEXT: lw s1, 24(sp)
4308; RV32I-NEXT: lw ra, 28(sp)
4309; RV32I-NEXT: addi sp, sp, 32
4310; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]4311;
4312; RV32IA-LABEL: atomicrmw_min_i16_acquire:
4313; RV32IA: # %bb.0:
4314; RV32IA-NEXT: slli a2, a0, 3
4315; RV32IA-NEXT: andi a2, a2, 24
4316; RV32IA-NEXT: addi a3, zero, 16
4317; RV32IA-NEXT: sub a6, a3, a2
4318; RV32IA-NEXT: lui a4, 16
4319; RV32IA-NEXT: addi a4, a4, -1
4320; RV32IA-NEXT: sll a7, a4, a2
4321; RV32IA-NEXT: slli a1, a1, 16
4322; RV32IA-NEXT: srai a1, a1, 16
4323; RV32IA-NEXT: sll a1, a1, a2
4324; RV32IA-NEXT: andi a0, a0, -4
4325; RV32IA-NEXT: .LBB96_1: # =>This Inner Loop Header: Depth=1
4326; RV32IA-NEXT: lr.w.aq a5, (a0)
4327; RV32IA-NEXT: and a4, a5, a7
4328; RV32IA-NEXT: mv a3, a5
4329; RV32IA-NEXT: sll a4, a4, a6
4330; RV32IA-NEXT: sra a4, a4, a6
4331; RV32IA-NEXT: bge a1, a4, .LBB96_3
4332; RV32IA-NEXT: # %bb.2: # in Loop: Header=BB96_1 Depth=1
4333; RV32IA-NEXT: xor a3, a5, a1
4334; RV32IA-NEXT: and a3, a3, a7
4335; RV32IA-NEXT: xor a3, a5, a3
4336; RV32IA-NEXT: .LBB96_3: # in Loop: Header=BB96_1 Depth=1
4337; RV32IA-NEXT: sc.w a3, a3, (a0)
4338; RV32IA-NEXT: bnez a3, .LBB96_1
4339; RV32IA-NEXT: # %bb.4:
4340; RV32IA-NEXT: srl a0, a5, a2
4341; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]4342 %1 = atomicrmw min i16* %a, i16 %b acquire
4343 ret i16 %1
4344}
4345
4346define i16 @atomicrmw_min_i16_release(i16 *%a, i16 %b) nounwind {
4347; RV32I-LABEL: atomicrmw_min_i16_release:
4348; RV32I: # %bb.0:
4349; RV32I-NEXT: addi sp, sp, -32
4350; RV32I-NEXT: sw ra, 28(sp)
4351; RV32I-NEXT: sw s1, 24(sp)
4352; RV32I-NEXT: sw s2, 20(sp)
4353; RV32I-NEXT: sw s3, 16(sp)
4354; RV32I-NEXT: sw s4, 12(sp)
4355; RV32I-NEXT: sw s5, 8(sp)
4356; RV32I-NEXT: mv s2, a1
4357; RV32I-NEXT: mv s5, a0
4358; RV32I-NEXT: lhu a0, 0(a0)
4359; RV32I-NEXT: slli a1, a1, 16
4360; RV32I-NEXT: srai s1, a1, 16
4361; RV32I-NEXT: addi s3, sp, 6
4362; RV32I-NEXT: addi s4, zero, 3
4363; RV32I-NEXT: .LBB97_1: # %atomicrmw.start
4364; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
4365; RV32I-NEXT: slli a1, a0, 16
4366; RV32I-NEXT: srai a1, a1, 16
4367; RV32I-NEXT: mv a2, a0
4368; RV32I-NEXT: bge s1, a1, .LBB97_3
4369; RV32I-NEXT: # %bb.2: # %atomicrmw.start
4370; RV32I-NEXT: # in Loop: Header=BB97_1 Depth=1
4371; RV32I-NEXT: mv a2, s2
4372; RV32I-NEXT: .LBB97_3: # %atomicrmw.start
4373; RV32I-NEXT: # in Loop: Header=BB97_1 Depth=1
4374; RV32I-NEXT: sh a0, 6(sp)
4375; RV32I-NEXT: mv a0, s5
4376; RV32I-NEXT: mv a1, s3
4377; RV32I-NEXT: mv a3, s4
4378; RV32I-NEXT: mv a4, zero
4379; RV32I-NEXT: call __atomic_compare_exchange_2
4380; RV32I-NEXT: mv a1, a0
4381; RV32I-NEXT: lh a0, 6(sp)
4382; RV32I-NEXT: beqz a1, .LBB97_1
4383; RV32I-NEXT: # %bb.4: # %atomicrmw.end
4384; RV32I-NEXT: lw s5, 8(sp)
4385; RV32I-NEXT: lw s4, 12(sp)
4386; RV32I-NEXT: lw s3, 16(sp)
4387; RV32I-NEXT: lw s2, 20(sp)
4388; RV32I-NEXT: lw s1, 24(sp)
4389; RV32I-NEXT: lw ra, 28(sp)
4390; RV32I-NEXT: addi sp, sp, 32
4391; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]4392;
4393; RV32IA-LABEL: atomicrmw_min_i16_release:
4394; RV32IA: # %bb.0:
4395; RV32IA-NEXT: slli a2, a0, 3
4396; RV32IA-NEXT: andi a2, a2, 24
4397; RV32IA-NEXT: addi a3, zero, 16
4398; RV32IA-NEXT: sub a6, a3, a2
4399; RV32IA-NEXT: lui a4, 16
4400; RV32IA-NEXT: addi a4, a4, -1
4401; RV32IA-NEXT: sll a7, a4, a2
4402; RV32IA-NEXT: slli a1, a1, 16
4403; RV32IA-NEXT: srai a1, a1, 16
4404; RV32IA-NEXT: sll a1, a1, a2
4405; RV32IA-NEXT: andi a0, a0, -4
4406; RV32IA-NEXT: .LBB97_1: # =>This Inner Loop Header: Depth=1
4407; RV32IA-NEXT: lr.w a5, (a0)
4408; RV32IA-NEXT: and a4, a5, a7
4409; RV32IA-NEXT: mv a3, a5
4410; RV32IA-NEXT: sll a4, a4, a6
4411; RV32IA-NEXT: sra a4, a4, a6
4412; RV32IA-NEXT: bge a1, a4, .LBB97_3
4413; RV32IA-NEXT: # %bb.2: # in Loop: Header=BB97_1 Depth=1
4414; RV32IA-NEXT: xor a3, a5, a1
4415; RV32IA-NEXT: and a3, a3, a7
4416; RV32IA-NEXT: xor a3, a5, a3
4417; RV32IA-NEXT: .LBB97_3: # in Loop: Header=BB97_1 Depth=1
4418; RV32IA-NEXT: sc.w.rl a3, a3, (a0)
4419; RV32IA-NEXT: bnez a3, .LBB97_1
4420; RV32IA-NEXT: # %bb.4:
4421; RV32IA-NEXT: srl a0, a5, a2
4422; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]4423 %1 = atomicrmw min i16* %a, i16 %b release
4424 ret i16 %1
4425}
4426
4427define i16 @atomicrmw_min_i16_acq_rel(i16 *%a, i16 %b) nounwind {
4428; RV32I-LABEL: atomicrmw_min_i16_acq_rel:
4429; RV32I: # %bb.0:
4430; RV32I-NEXT: addi sp, sp, -32
4431; RV32I-NEXT: sw ra, 28(sp)
4432; RV32I-NEXT: sw s1, 24(sp)
4433; RV32I-NEXT: sw s2, 20(sp)
4434; RV32I-NEXT: sw s3, 16(sp)
4435; RV32I-NEXT: sw s4, 12(sp)
4436; RV32I-NEXT: sw s5, 8(sp)
4437; RV32I-NEXT: sw s6, 4(sp)
4438; RV32I-NEXT: mv s2, a1
4439; RV32I-NEXT: mv s6, a0
4440; RV32I-NEXT: lhu a0, 0(a0)
4441; RV32I-NEXT: slli a1, a1, 16
4442; RV32I-NEXT: srai s1, a1, 16
4443; RV32I-NEXT: addi s3, sp, 2
4444; RV32I-NEXT: addi s4, zero, 4
4445; RV32I-NEXT: addi s5, zero, 2
4446; RV32I-NEXT: .LBB98_1: # %atomicrmw.start
4447; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
4448; RV32I-NEXT: slli a1, a0, 16
4449; RV32I-NEXT: srai a1, a1, 16
4450; RV32I-NEXT: mv a2, a0
4451; RV32I-NEXT: bge s1, a1, .LBB98_3
4452; RV32I-NEXT: # %bb.2: # %atomicrmw.start
4453; RV32I-NEXT: # in Loop: Header=BB98_1 Depth=1
4454; RV32I-NEXT: mv a2, s2
4455; RV32I-NEXT: .LBB98_3: # %atomicrmw.start
4456; RV32I-NEXT: # in Loop: Header=BB98_1 Depth=1
4457; RV32I-NEXT: sh a0, 2(sp)
4458; RV32I-NEXT: mv a0, s6
4459; RV32I-NEXT: mv a1, s3
4460; RV32I-NEXT: mv a3, s4
4461; RV32I-NEXT: mv a4, s5
4462; RV32I-NEXT: call __atomic_compare_exchange_2
4463; RV32I-NEXT: mv a1, a0
4464; RV32I-NEXT: lh a0, 2(sp)
4465; RV32I-NEXT: beqz a1, .LBB98_1
4466; RV32I-NEXT: # %bb.4: # %atomicrmw.end
4467; RV32I-NEXT: lw s6, 4(sp)
4468; RV32I-NEXT: lw s5, 8(sp)
4469; RV32I-NEXT: lw s4, 12(sp)
4470; RV32I-NEXT: lw s3, 16(sp)
4471; RV32I-NEXT: lw s2, 20(sp)
4472; RV32I-NEXT: lw s1, 24(sp)
4473; RV32I-NEXT: lw ra, 28(sp)
4474; RV32I-NEXT: addi sp, sp, 32
4475; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]4476;
4477; RV32IA-LABEL: atomicrmw_min_i16_acq_rel:
4478; RV32IA: # %bb.0:
4479; RV32IA-NEXT: slli a2, a0, 3
4480; RV32IA-NEXT: andi a2, a2, 24
4481; RV32IA-NEXT: addi a3, zero, 16
4482; RV32IA-NEXT: sub a6, a3, a2
4483; RV32IA-NEXT: lui a4, 16
4484; RV32IA-NEXT: addi a4, a4, -1
4485; RV32IA-NEXT: sll a7, a4, a2
4486; RV32IA-NEXT: slli a1, a1, 16
4487; RV32IA-NEXT: srai a1, a1, 16
4488; RV32IA-NEXT: sll a1, a1, a2
4489; RV32IA-NEXT: andi a0, a0, -4
4490; RV32IA-NEXT: .LBB98_1: # =>This Inner Loop Header: Depth=1
4491; RV32IA-NEXT: lr.w.aq a5, (a0)
4492; RV32IA-NEXT: and a4, a5, a7
4493; RV32IA-NEXT: mv a3, a5
4494; RV32IA-NEXT: sll a4, a4, a6
4495; RV32IA-NEXT: sra a4, a4, a6
4496; RV32IA-NEXT: bge a1, a4, .LBB98_3
4497; RV32IA-NEXT: # %bb.2: # in Loop: Header=BB98_1 Depth=1
4498; RV32IA-NEXT: xor a3, a5, a1
4499; RV32IA-NEXT: and a3, a3, a7
4500; RV32IA-NEXT: xor a3, a5, a3
4501; RV32IA-NEXT: .LBB98_3: # in Loop: Header=BB98_1 Depth=1
4502; RV32IA-NEXT: sc.w.rl a3, a3, (a0)
4503; RV32IA-NEXT: bnez a3, .LBB98_1
4504; RV32IA-NEXT: # %bb.4:
4505; RV32IA-NEXT: srl a0, a5, a2
4506; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]4507 %1 = atomicrmw min i16* %a, i16 %b acq_rel
4508 ret i16 %1
4509}
4510
4511define i16 @atomicrmw_min_i16_seq_cst(i16 *%a, i16 %b) nounwind {
4512; RV32I-LABEL: atomicrmw_min_i16_seq_cst:
4513; RV32I: # %bb.0:
4514; RV32I-NEXT: addi sp, sp, -32
4515; RV32I-NEXT: sw ra, 28(sp)
4516; RV32I-NEXT: sw s1, 24(sp)
4517; RV32I-NEXT: sw s2, 20(sp)
4518; RV32I-NEXT: sw s3, 16(sp)
4519; RV32I-NEXT: sw s4, 12(sp)
4520; RV32I-NEXT: sw s5, 8(sp)
4521; RV32I-NEXT: mv s2, a1
4522; RV32I-NEXT: mv s4, a0
4523; RV32I-NEXT: lhu a0, 0(a0)
4524; RV32I-NEXT: slli a1, a1, 16
4525; RV32I-NEXT: srai s5, a1, 16
4526; RV32I-NEXT: addi s3, sp, 6
4527; RV32I-NEXT: addi s1, zero, 5
4528; RV32I-NEXT: .LBB99_1: # %atomicrmw.start
4529; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
4530; RV32I-NEXT: slli a1, a0, 16
4531; RV32I-NEXT: srai a1, a1, 16
4532; RV32I-NEXT: mv a2, a0
4533; RV32I-NEXT: bge s5, a1, .LBB99_3
4534; RV32I-NEXT: # %bb.2: # %atomicrmw.start
4535; RV32I-NEXT: # in Loop: Header=BB99_1 Depth=1
4536; RV32I-NEXT: mv a2, s2
4537; RV32I-NEXT: .LBB99_3: # %atomicrmw.start
4538; RV32I-NEXT: # in Loop: Header=BB99_1 Depth=1
4539; RV32I-NEXT: sh a0, 6(sp)
4540; RV32I-NEXT: mv a0, s4
4541; RV32I-NEXT: mv a1, s3
4542; RV32I-NEXT: mv a3, s1
4543; RV32I-NEXT: mv a4, s1
4544; RV32I-NEXT: call __atomic_compare_exchange_2
4545; RV32I-NEXT: mv a1, a0
4546; RV32I-NEXT: lh a0, 6(sp)
4547; RV32I-NEXT: beqz a1, .LBB99_1
4548; RV32I-NEXT: # %bb.4: # %atomicrmw.end
4549; RV32I-NEXT: lw s5, 8(sp)
4550; RV32I-NEXT: lw s4, 12(sp)
4551; RV32I-NEXT: lw s3, 16(sp)
4552; RV32I-NEXT: lw s2, 20(sp)
4553; RV32I-NEXT: lw s1, 24(sp)
4554; RV32I-NEXT: lw ra, 28(sp)
4555; RV32I-NEXT: addi sp, sp, 32
4556; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]4557;
4558; RV32IA-LABEL: atomicrmw_min_i16_seq_cst:
4559; RV32IA: # %bb.0:
4560; RV32IA-NEXT: slli a2, a0, 3
4561; RV32IA-NEXT: andi a2, a2, 24
4562; RV32IA-NEXT: addi a3, zero, 16
4563; RV32IA-NEXT: sub a6, a3, a2
4564; RV32IA-NEXT: lui a4, 16
4565; RV32IA-NEXT: addi a4, a4, -1
4566; RV32IA-NEXT: sll a7, a4, a2
4567; RV32IA-NEXT: slli a1, a1, 16
4568; RV32IA-NEXT: srai a1, a1, 16
4569; RV32IA-NEXT: sll a1, a1, a2
4570; RV32IA-NEXT: andi a0, a0, -4
4571; RV32IA-NEXT: .LBB99_1: # =>This Inner Loop Header: Depth=1
4572; RV32IA-NEXT: lr.w.aqrl a5, (a0)
4573; RV32IA-NEXT: and a4, a5, a7
4574; RV32IA-NEXT: mv a3, a5
4575; RV32IA-NEXT: sll a4, a4, a6
4576; RV32IA-NEXT: sra a4, a4, a6
4577; RV32IA-NEXT: bge a1, a4, .LBB99_3
4578; RV32IA-NEXT: # %bb.2: # in Loop: Header=BB99_1 Depth=1
4579; RV32IA-NEXT: xor a3, a5, a1
4580; RV32IA-NEXT: and a3, a3, a7
4581; RV32IA-NEXT: xor a3, a5, a3
4582; RV32IA-NEXT: .LBB99_3: # in Loop: Header=BB99_1 Depth=1
4583; RV32IA-NEXT: sc.w.aqrl a3, a3, (a0)
4584; RV32IA-NEXT: bnez a3, .LBB99_1
4585; RV32IA-NEXT: # %bb.4:
4586; RV32IA-NEXT: srl a0, a5, a2
4587; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]4588 %1 = atomicrmw min i16* %a, i16 %b seq_cst
4589 ret i16 %1
4590}
4591
4592define i16 @atomicrmw_umax_i16_monotonic(i16 *%a, i16 %b) nounwind {
4593; RV32I-LABEL: atomicrmw_umax_i16_monotonic:
4594; RV32I: # %bb.0:
4595; RV32I-NEXT: addi sp, sp, -32
4596; RV32I-NEXT: sw ra, 28(sp)
4597; RV32I-NEXT: sw s1, 24(sp)
4598; RV32I-NEXT: sw s2, 20(sp)
4599; RV32I-NEXT: sw s3, 16(sp)
4600; RV32I-NEXT: sw s4, 12(sp)
4601; RV32I-NEXT: sw s5, 8(sp)
4602; RV32I-NEXT: mv s2, a1
4603; RV32I-NEXT: mv s4, a0
4604; RV32I-NEXT: lhu a0, 0(a0)
4605; RV32I-NEXT: lui a1, 16
4606; RV32I-NEXT: addi s1, a1, -1
4607; RV32I-NEXT: and s5, s2, s1
4608; RV32I-NEXT: addi s3, sp, 6
4609; RV32I-NEXT: .LBB100_1: # %atomicrmw.start
4610; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
4611; RV32I-NEXT: and a1, a0, s1
4612; RV32I-NEXT: mv a2, a0
4613; RV32I-NEXT: bltu s5, a1, .LBB100_3
4614; RV32I-NEXT: # %bb.2: # %atomicrmw.start
4615; RV32I-NEXT: # in Loop: Header=BB100_1 Depth=1
4616; RV32I-NEXT: mv a2, s2
4617; RV32I-NEXT: .LBB100_3: # %atomicrmw.start
4618; RV32I-NEXT: # in Loop: Header=BB100_1 Depth=1
4619; RV32I-NEXT: sh a0, 6(sp)
4620; RV32I-NEXT: mv a0, s4
4621; RV32I-NEXT: mv a1, s3
4622; RV32I-NEXT: mv a3, zero
4623; RV32I-NEXT: mv a4, zero
4624; RV32I-NEXT: call __atomic_compare_exchange_2
4625; RV32I-NEXT: mv a1, a0
4626; RV32I-NEXT: lh a0, 6(sp)
4627; RV32I-NEXT: beqz a1, .LBB100_1
4628; RV32I-NEXT: # %bb.4: # %atomicrmw.end
4629; RV32I-NEXT: lw s5, 8(sp)
4630; RV32I-NEXT: lw s4, 12(sp)
4631; RV32I-NEXT: lw s3, 16(sp)
4632; RV32I-NEXT: lw s2, 20(sp)
4633; RV32I-NEXT: lw s1, 24(sp)
4634; RV32I-NEXT: lw ra, 28(sp)
4635; RV32I-NEXT: addi sp, sp, 32
4636; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]4637;
4638; RV32IA-LABEL: atomicrmw_umax_i16_monotonic:
4639; RV32IA: # %bb.0:
4640; RV32IA-NEXT: lui a2, 16
4641; RV32IA-NEXT: addi a2, a2, -1
4642; RV32IA-NEXT: and a1, a1, a2
4643; RV32IA-NEXT: slli a3, a0, 3
4644; RV32IA-NEXT: andi a3, a3, 24
4645; RV32IA-NEXT: sll a6, a2, a3
4646; RV32IA-NEXT: sll a1, a1, a3
4647; RV32IA-NEXT: andi a0, a0, -4
4648; RV32IA-NEXT: .LBB100_1: # =>This Inner Loop Header: Depth=1
4649; RV32IA-NEXT: lr.w a4, (a0)
4650; RV32IA-NEXT: and a2, a4, a6
4651; RV32IA-NEXT: mv a5, a4
4652; RV32IA-NEXT: bgeu a2, a1, .LBB100_3
4653; RV32IA-NEXT: # %bb.2: # in Loop: Header=BB100_1 Depth=1
4654; RV32IA-NEXT: xor a5, a4, a1
4655; RV32IA-NEXT: and a5, a5, a6
4656; RV32IA-NEXT: xor a5, a4, a5
4657; RV32IA-NEXT: .LBB100_3: # in Loop: Header=BB100_1 Depth=1
4658; RV32IA-NEXT: sc.w a5, a5, (a0)
4659; RV32IA-NEXT: bnez a5, .LBB100_1
4660; RV32IA-NEXT: # %bb.4:
4661; RV32IA-NEXT: srl a0, a4, a3
4662; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]4663 %1 = atomicrmw umax i16* %a, i16 %b monotonic
4664 ret i16 %1
4665}
4666
4667define i16 @atomicrmw_umax_i16_acquire(i16 *%a, i16 %b) nounwind {
4668; RV32I-LABEL: atomicrmw_umax_i16_acquire:
4669; RV32I: # %bb.0:
4670; RV32I-NEXT: addi sp, sp, -32
4671; RV32I-NEXT: sw ra, 28(sp)
4672; RV32I-NEXT: sw s1, 24(sp)
4673; RV32I-NEXT: sw s2, 20(sp)
4674; RV32I-NEXT: sw s3, 16(sp)
4675; RV32I-NEXT: sw s4, 12(sp)
4676; RV32I-NEXT: sw s5, 8(sp)
4677; RV32I-NEXT: sw s6, 4(sp)
4678; RV32I-NEXT: mv s2, a1
4679; RV32I-NEXT: mv s4, a0
4680; RV32I-NEXT: lhu a0, 0(a0)
4681; RV32I-NEXT: lui a1, 16
4682; RV32I-NEXT: addi s5, a1, -1
4683; RV32I-NEXT: and s6, s2, s5
4684; RV32I-NEXT: addi s3, sp, 2
4685; RV32I-NEXT: addi s1, zero, 2
4686; RV32I-NEXT: .LBB101_1: # %atomicrmw.start
4687; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
4688; RV32I-NEXT: and a1, a0, s5
4689; RV32I-NEXT: mv a2, a0
4690; RV32I-NEXT: bltu s6, a1, .LBB101_3
4691; RV32I-NEXT: # %bb.2: # %atomicrmw.start
4692; RV32I-NEXT: # in Loop: Header=BB101_1 Depth=1
4693; RV32I-NEXT: mv a2, s2
4694; RV32I-NEXT: .LBB101_3: # %atomicrmw.start
4695; RV32I-NEXT: # in Loop: Header=BB101_1 Depth=1
4696; RV32I-NEXT: sh a0, 2(sp)
4697; RV32I-NEXT: mv a0, s4
4698; RV32I-NEXT: mv a1, s3
4699; RV32I-NEXT: mv a3, s1
4700; RV32I-NEXT: mv a4, s1
4701; RV32I-NEXT: call __atomic_compare_exchange_2
4702; RV32I-NEXT: mv a1, a0
4703; RV32I-NEXT: lh a0, 2(sp)
4704; RV32I-NEXT: beqz a1, .LBB101_1
4705; RV32I-NEXT: # %bb.4: # %atomicrmw.end
4706; RV32I-NEXT: lw s6, 4(sp)
4707; RV32I-NEXT: lw s5, 8(sp)
4708; RV32I-NEXT: lw s4, 12(sp)
4709; RV32I-NEXT: lw s3, 16(sp)
4710; RV32I-NEXT: lw s2, 20(sp)
4711; RV32I-NEXT: lw s1, 24(sp)
4712; RV32I-NEXT: lw ra, 28(sp)
4713; RV32I-NEXT: addi sp, sp, 32
4714; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]4715;
4716; RV32IA-LABEL: atomicrmw_umax_i16_acquire:
4717; RV32IA: # %bb.0:
4718; RV32IA-NEXT: lui a2, 16
4719; RV32IA-NEXT: addi a2, a2, -1
4720; RV32IA-NEXT: and a1, a1, a2
4721; RV32IA-NEXT: slli a3, a0, 3
4722; RV32IA-NEXT: andi a3, a3, 24
4723; RV32IA-NEXT: sll a6, a2, a3
4724; RV32IA-NEXT: sll a1, a1, a3
4725; RV32IA-NEXT: andi a0, a0, -4
4726; RV32IA-NEXT: .LBB101_1: # =>This Inner Loop Header: Depth=1
4727; RV32IA-NEXT: lr.w.aq a4, (a0)
4728; RV32IA-NEXT: and a2, a4, a6
4729; RV32IA-NEXT: mv a5, a4
4730; RV32IA-NEXT: bgeu a2, a1, .LBB101_3
4731; RV32IA-NEXT: # %bb.2: # in Loop: Header=BB101_1 Depth=1
4732; RV32IA-NEXT: xor a5, a4, a1
4733; RV32IA-NEXT: and a5, a5, a6
4734; RV32IA-NEXT: xor a5, a4, a5
4735; RV32IA-NEXT: .LBB101_3: # in Loop: Header=BB101_1 Depth=1
4736; RV32IA-NEXT: sc.w a5, a5, (a0)
4737; RV32IA-NEXT: bnez a5, .LBB101_1
4738; RV32IA-NEXT: # %bb.4:
4739; RV32IA-NEXT: srl a0, a4, a3
4740; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]4741 %1 = atomicrmw umax i16* %a, i16 %b acquire
4742 ret i16 %1
4743}
4744
4745define i16 @atomicrmw_umax_i16_release(i16 *%a, i16 %b) nounwind {
4746; RV32I-LABEL: atomicrmw_umax_i16_release:
4747; RV32I: # %bb.0:
4748; RV32I-NEXT: addi sp, sp, -32
4749; RV32I-NEXT: sw ra, 28(sp)
4750; RV32I-NEXT: sw s1, 24(sp)
4751; RV32I-NEXT: sw s2, 20(sp)
4752; RV32I-NEXT: sw s3, 16(sp)
4753; RV32I-NEXT: sw s4, 12(sp)
4754; RV32I-NEXT: sw s5, 8(sp)
4755; RV32I-NEXT: sw s6, 4(sp)
4756; RV32I-NEXT: mv s2, a1
4757; RV32I-NEXT: mv s5, a0
4758; RV32I-NEXT: lhu a0, 0(a0)
4759; RV32I-NEXT: lui a1, 16
4760; RV32I-NEXT: addi s1, a1, -1
4761; RV32I-NEXT: and s6, s2, s1
4762; RV32I-NEXT: addi s3, sp, 2
4763; RV32I-NEXT: addi s4, zero, 3
4764; RV32I-NEXT: .LBB102_1: # %atomicrmw.start
4765; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
4766; RV32I-NEXT: and a1, a0, s1
4767; RV32I-NEXT: mv a2, a0
4768; RV32I-NEXT: bltu s6, a1, .LBB102_3
4769; RV32I-NEXT: # %bb.2: # %atomicrmw.start
4770; RV32I-NEXT: # in Loop: Header=BB102_1 Depth=1
4771; RV32I-NEXT: mv a2, s2
4772; RV32I-NEXT: .LBB102_3: # %atomicrmw.start
4773; RV32I-NEXT: # in Loop: Header=BB102_1 Depth=1
4774; RV32I-NEXT: sh a0, 2(sp)
4775; RV32I-NEXT: mv a0, s5
4776; RV32I-NEXT: mv a1, s3
4777; RV32I-NEXT: mv a3, s4
4778; RV32I-NEXT: mv a4, zero
4779; RV32I-NEXT: call __atomic_compare_exchange_2
4780; RV32I-NEXT: mv a1, a0
4781; RV32I-NEXT: lh a0, 2(sp)
4782; RV32I-NEXT: beqz a1, .LBB102_1
4783; RV32I-NEXT: # %bb.4: # %atomicrmw.end
4784; RV32I-NEXT: lw s6, 4(sp)
4785; RV32I-NEXT: lw s5, 8(sp)
4786; RV32I-NEXT: lw s4, 12(sp)
4787; RV32I-NEXT: lw s3, 16(sp)
4788; RV32I-NEXT: lw s2, 20(sp)
4789; RV32I-NEXT: lw s1, 24(sp)
4790; RV32I-NEXT: lw ra, 28(sp)
4791; RV32I-NEXT: addi sp, sp, 32
4792; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]4793;
4794; RV32IA-LABEL: atomicrmw_umax_i16_release:
4795; RV32IA: # %bb.0:
4796; RV32IA-NEXT: lui a2, 16
4797; RV32IA-NEXT: addi a2, a2, -1
4798; RV32IA-NEXT: and a1, a1, a2
4799; RV32IA-NEXT: slli a3, a0, 3
4800; RV32IA-NEXT: andi a3, a3, 24
4801; RV32IA-NEXT: sll a6, a2, a3
4802; RV32IA-NEXT: sll a1, a1, a3
4803; RV32IA-NEXT: andi a0, a0, -4
4804; RV32IA-NEXT: .LBB102_1: # =>This Inner Loop Header: Depth=1
4805; RV32IA-NEXT: lr.w a4, (a0)
4806; RV32IA-NEXT: and a2, a4, a6
4807; RV32IA-NEXT: mv a5, a4
4808; RV32IA-NEXT: bgeu a2, a1, .LBB102_3
4809; RV32IA-NEXT: # %bb.2: # in Loop: Header=BB102_1 Depth=1
4810; RV32IA-NEXT: xor a5, a4, a1
4811; RV32IA-NEXT: and a5, a5, a6
4812; RV32IA-NEXT: xor a5, a4, a5
4813; RV32IA-NEXT: .LBB102_3: # in Loop: Header=BB102_1 Depth=1
4814; RV32IA-NEXT: sc.w.rl a5, a5, (a0)
4815; RV32IA-NEXT: bnez a5, .LBB102_1
4816; RV32IA-NEXT: # %bb.4:
4817; RV32IA-NEXT: srl a0, a4, a3
4818; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]4819 %1 = atomicrmw umax i16* %a, i16 %b release
4820 ret i16 %1
4821}
4822
4823define i16 @atomicrmw_umax_i16_acq_rel(i16 *%a, i16 %b) nounwind {
4824; RV32I-LABEL: atomicrmw_umax_i16_acq_rel:
4825; RV32I: # %bb.0:
4826; RV32I-NEXT: addi sp, sp, -48
4827; RV32I-NEXT: sw ra, 44(sp)
4828; RV32I-NEXT: sw s1, 40(sp)
4829; RV32I-NEXT: sw s2, 36(sp)
4830; RV32I-NEXT: sw s3, 32(sp)
4831; RV32I-NEXT: sw s4, 28(sp)
4832; RV32I-NEXT: sw s5, 24(sp)
4833; RV32I-NEXT: sw s6, 20(sp)
4834; RV32I-NEXT: sw s7, 16(sp)
4835; RV32I-NEXT: mv s2, a1
4836; RV32I-NEXT: mv s6, a0
4837; RV32I-NEXT: lhu a0, 0(a0)
4838; RV32I-NEXT: lui a1, 16
4839; RV32I-NEXT: addi s1, a1, -1
4840; RV32I-NEXT: and s7, s2, s1
4841; RV32I-NEXT: addi s3, sp, 14
4842; RV32I-NEXT: addi s4, zero, 4
4843; RV32I-NEXT: addi s5, zero, 2
4844; RV32I-NEXT: .LBB103_1: # %atomicrmw.start
4845; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
4846; RV32I-NEXT: and a1, a0, s1
4847; RV32I-NEXT: mv a2, a0
4848; RV32I-NEXT: bltu s7, a1, .LBB103_3
4849; RV32I-NEXT: # %bb.2: # %atomicrmw.start
4850; RV32I-NEXT: # in Loop: Header=BB103_1 Depth=1
4851; RV32I-NEXT: mv a2, s2
4852; RV32I-NEXT: .LBB103_3: # %atomicrmw.start
4853; RV32I-NEXT: # in Loop: Header=BB103_1 Depth=1
4854; RV32I-NEXT: sh a0, 14(sp)
4855; RV32I-NEXT: mv a0, s6
4856; RV32I-NEXT: mv a1, s3
4857; RV32I-NEXT: mv a3, s4
4858; RV32I-NEXT: mv a4, s5
4859; RV32I-NEXT: call __atomic_compare_exchange_2
4860; RV32I-NEXT: mv a1, a0
4861; RV32I-NEXT: lh a0, 14(sp)
4862; RV32I-NEXT: beqz a1, .LBB103_1
4863; RV32I-NEXT: # %bb.4: # %atomicrmw.end
4864; RV32I-NEXT: lw s7, 16(sp)
4865; RV32I-NEXT: lw s6, 20(sp)
4866; RV32I-NEXT: lw s5, 24(sp)
4867; RV32I-NEXT: lw s4, 28(sp)
4868; RV32I-NEXT: lw s3, 32(sp)
4869; RV32I-NEXT: lw s2, 36(sp)
4870; RV32I-NEXT: lw s1, 40(sp)
4871; RV32I-NEXT: lw ra, 44(sp)
4872; RV32I-NEXT: addi sp, sp, 48
4873; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]4874;
4875; RV32IA-LABEL: atomicrmw_umax_i16_acq_rel:
4876; RV32IA: # %bb.0:
4877; RV32IA-NEXT: lui a2, 16
4878; RV32IA-NEXT: addi a2, a2, -1
4879; RV32IA-NEXT: and a1, a1, a2
4880; RV32IA-NEXT: slli a3, a0, 3
4881; RV32IA-NEXT: andi a3, a3, 24
4882; RV32IA-NEXT: sll a6, a2, a3
4883; RV32IA-NEXT: sll a1, a1, a3
4884; RV32IA-NEXT: andi a0, a0, -4
4885; RV32IA-NEXT: .LBB103_1: # =>This Inner Loop Header: Depth=1
4886; RV32IA-NEXT: lr.w.aq a4, (a0)
4887; RV32IA-NEXT: and a2, a4, a6
4888; RV32IA-NEXT: mv a5, a4
4889; RV32IA-NEXT: bgeu a2, a1, .LBB103_3
4890; RV32IA-NEXT: # %bb.2: # in Loop: Header=BB103_1 Depth=1
4891; RV32IA-NEXT: xor a5, a4, a1
4892; RV32IA-NEXT: and a5, a5, a6
4893; RV32IA-NEXT: xor a5, a4, a5
4894; RV32IA-NEXT: .LBB103_3: # in Loop: Header=BB103_1 Depth=1
4895; RV32IA-NEXT: sc.w.rl a5, a5, (a0)
4896; RV32IA-NEXT: bnez a5, .LBB103_1
4897; RV32IA-NEXT: # %bb.4:
4898; RV32IA-NEXT: srl a0, a4, a3
4899; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]4900 %1 = atomicrmw umax i16* %a, i16 %b acq_rel
4901 ret i16 %1
4902}
4903
4904define i16 @atomicrmw_umax_i16_seq_cst(i16 *%a, i16 %b) nounwind {
4905; RV32I-LABEL: atomicrmw_umax_i16_seq_cst:
4906; RV32I: # %bb.0:
4907; RV32I-NEXT: addi sp, sp, -32
4908; RV32I-NEXT: sw ra, 28(sp)
4909; RV32I-NEXT: sw s1, 24(sp)
4910; RV32I-NEXT: sw s2, 20(sp)
4911; RV32I-NEXT: sw s3, 16(sp)
4912; RV32I-NEXT: sw s4, 12(sp)
4913; RV32I-NEXT: sw s5, 8(sp)
4914; RV32I-NEXT: sw s6, 4(sp)
4915; RV32I-NEXT: mv s2, a1
4916; RV32I-NEXT: mv s4, a0
4917; RV32I-NEXT: lhu a0, 0(a0)
4918; RV32I-NEXT: lui a1, 16
4919; RV32I-NEXT: addi s5, a1, -1
4920; RV32I-NEXT: and s6, s2, s5
4921; RV32I-NEXT: addi s3, sp, 2
4922; RV32I-NEXT: addi s1, zero, 5
4923; RV32I-NEXT: .LBB104_1: # %atomicrmw.start
4924; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
4925; RV32I-NEXT: and a1, a0, s5
4926; RV32I-NEXT: mv a2, a0
4927; RV32I-NEXT: bltu s6, a1, .LBB104_3
4928; RV32I-NEXT: # %bb.2: # %atomicrmw.start
4929; RV32I-NEXT: # in Loop: Header=BB104_1 Depth=1
4930; RV32I-NEXT: mv a2, s2
4931; RV32I-NEXT: .LBB104_3: # %atomicrmw.start
4932; RV32I-NEXT: # in Loop: Header=BB104_1 Depth=1
4933; RV32I-NEXT: sh a0, 2(sp)
4934; RV32I-NEXT: mv a0, s4
4935; RV32I-NEXT: mv a1, s3
4936; RV32I-NEXT: mv a3, s1
4937; RV32I-NEXT: mv a4, s1
4938; RV32I-NEXT: call __atomic_compare_exchange_2
4939; RV32I-NEXT: mv a1, a0
4940; RV32I-NEXT: lh a0, 2(sp)
4941; RV32I-NEXT: beqz a1, .LBB104_1
4942; RV32I-NEXT: # %bb.4: # %atomicrmw.end
4943; RV32I-NEXT: lw s6, 4(sp)
4944; RV32I-NEXT: lw s5, 8(sp)
4945; RV32I-NEXT: lw s4, 12(sp)
4946; RV32I-NEXT: lw s3, 16(sp)
4947; RV32I-NEXT: lw s2, 20(sp)
4948; RV32I-NEXT: lw s1, 24(sp)
4949; RV32I-NEXT: lw ra, 28(sp)
4950; RV32I-NEXT: addi sp, sp, 32
4951; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]4952;
4953; RV32IA-LABEL: atomicrmw_umax_i16_seq_cst:
4954; RV32IA: # %bb.0:
4955; RV32IA-NEXT: lui a2, 16
4956; RV32IA-NEXT: addi a2, a2, -1
4957; RV32IA-NEXT: and a1, a1, a2
4958; RV32IA-NEXT: slli a3, a0, 3
4959; RV32IA-NEXT: andi a3, a3, 24
4960; RV32IA-NEXT: sll a6, a2, a3
4961; RV32IA-NEXT: sll a1, a1, a3
4962; RV32IA-NEXT: andi a0, a0, -4
4963; RV32IA-NEXT: .LBB104_1: # =>This Inner Loop Header: Depth=1
4964; RV32IA-NEXT: lr.w.aqrl a4, (a0)
4965; RV32IA-NEXT: and a2, a4, a6
4966; RV32IA-NEXT: mv a5, a4
4967; RV32IA-NEXT: bgeu a2, a1, .LBB104_3
4968; RV32IA-NEXT: # %bb.2: # in Loop: Header=BB104_1 Depth=1
4969; RV32IA-NEXT: xor a5, a4, a1
4970; RV32IA-NEXT: and a5, a5, a6
4971; RV32IA-NEXT: xor a5, a4, a5
4972; RV32IA-NEXT: .LBB104_3: # in Loop: Header=BB104_1 Depth=1
4973; RV32IA-NEXT: sc.w.aqrl a5, a5, (a0)
4974; RV32IA-NEXT: bnez a5, .LBB104_1
4975; RV32IA-NEXT: # %bb.4:
4976; RV32IA-NEXT: srl a0, a4, a3
4977; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]4978 %1 = atomicrmw umax i16* %a, i16 %b seq_cst
4979 ret i16 %1
4980}
4981
4982define i16 @atomicrmw_umin_i16_monotonic(i16 *%a, i16 %b) nounwind {
4983; RV32I-LABEL: atomicrmw_umin_i16_monotonic:
4984; RV32I: # %bb.0:
4985; RV32I-NEXT: addi sp, sp, -32
4986; RV32I-NEXT: sw ra, 28(sp)
4987; RV32I-NEXT: sw s1, 24(sp)
4988; RV32I-NEXT: sw s2, 20(sp)
4989; RV32I-NEXT: sw s3, 16(sp)
4990; RV32I-NEXT: sw s4, 12(sp)
4991; RV32I-NEXT: sw s5, 8(sp)
4992; RV32I-NEXT: mv s2, a1
4993; RV32I-NEXT: mv s4, a0
4994; RV32I-NEXT: lhu a0, 0(a0)
4995; RV32I-NEXT: lui a1, 16
4996; RV32I-NEXT: addi s1, a1, -1
4997; RV32I-NEXT: and s5, s2, s1
4998; RV32I-NEXT: addi s3, sp, 6
4999; RV32I-NEXT: .LBB105_1: # %atomicrmw.start
5000; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
5001; RV32I-NEXT: and a1, a0, s1
5002; RV32I-NEXT: mv a2, a0
5003; RV32I-NEXT: bgeu s5, a1, .LBB105_3
5004; RV32I-NEXT: # %bb.2: # %atomicrmw.start
5005; RV32I-NEXT: # in Loop: Header=BB105_1 Depth=1
5006; RV32I-NEXT: mv a2, s2
5007; RV32I-NEXT: .LBB105_3: # %atomicrmw.start
5008; RV32I-NEXT: # in Loop: Header=BB105_1 Depth=1
5009; RV32I-NEXT: sh a0, 6(sp)
5010; RV32I-NEXT: mv a0, s4
5011; RV32I-NEXT: mv a1, s3
5012; RV32I-NEXT: mv a3, zero
5013; RV32I-NEXT: mv a4, zero
5014; RV32I-NEXT: call __atomic_compare_exchange_2
5015; RV32I-NEXT: mv a1, a0
5016; RV32I-NEXT: lh a0, 6(sp)
5017; RV32I-NEXT: beqz a1, .LBB105_1
5018; RV32I-NEXT: # %bb.4: # %atomicrmw.end
5019; RV32I-NEXT: lw s5, 8(sp)
5020; RV32I-NEXT: lw s4, 12(sp)
5021; RV32I-NEXT: lw s3, 16(sp)
5022; RV32I-NEXT: lw s2, 20(sp)
5023; RV32I-NEXT: lw s1, 24(sp)
5024; RV32I-NEXT: lw ra, 28(sp)
5025; RV32I-NEXT: addi sp, sp, 32
5026; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]5027;
5028; RV32IA-LABEL: atomicrmw_umin_i16_monotonic:
5029; RV32IA: # %bb.0:
5030; RV32IA-NEXT: lui a2, 16
5031; RV32IA-NEXT: addi a2, a2, -1
5032; RV32IA-NEXT: and a1, a1, a2
5033; RV32IA-NEXT: slli a3, a0, 3
5034; RV32IA-NEXT: andi a3, a3, 24
5035; RV32IA-NEXT: sll a6, a2, a3
5036; RV32IA-NEXT: sll a1, a1, a3
5037; RV32IA-NEXT: andi a0, a0, -4
5038; RV32IA-NEXT: .LBB105_1: # =>This Inner Loop Header: Depth=1
5039; RV32IA-NEXT: lr.w a4, (a0)
5040; RV32IA-NEXT: and a2, a4, a6
5041; RV32IA-NEXT: mv a5, a4
5042; RV32IA-NEXT: bgeu a1, a2, .LBB105_3
5043; RV32IA-NEXT: # %bb.2: # in Loop: Header=BB105_1 Depth=1
5044; RV32IA-NEXT: xor a5, a4, a1
5045; RV32IA-NEXT: and a5, a5, a6
5046; RV32IA-NEXT: xor a5, a4, a5
5047; RV32IA-NEXT: .LBB105_3: # in Loop: Header=BB105_1 Depth=1
5048; RV32IA-NEXT: sc.w a5, a5, (a0)
5049; RV32IA-NEXT: bnez a5, .LBB105_1
5050; RV32IA-NEXT: # %bb.4:
5051; RV32IA-NEXT: srl a0, a4, a3
5052; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]5053 %1 = atomicrmw umin i16* %a, i16 %b monotonic
5054 ret i16 %1
5055}
5056
5057define i16 @atomicrmw_umin_i16_acquire(i16 *%a, i16 %b) nounwind {
5058; RV32I-LABEL: atomicrmw_umin_i16_acquire:
5059; RV32I: # %bb.0:
5060; RV32I-NEXT: addi sp, sp, -32
5061; RV32I-NEXT: sw ra, 28(sp)
5062; RV32I-NEXT: sw s1, 24(sp)
5063; RV32I-NEXT: sw s2, 20(sp)
5064; RV32I-NEXT: sw s3, 16(sp)
5065; RV32I-NEXT: sw s4, 12(sp)
5066; RV32I-NEXT: sw s5, 8(sp)
5067; RV32I-NEXT: sw s6, 4(sp)
5068; RV32I-NEXT: mv s2, a1
5069; RV32I-NEXT: mv s4, a0
5070; RV32I-NEXT: lhu a0, 0(a0)
5071; RV32I-NEXT: lui a1, 16
5072; RV32I-NEXT: addi s5, a1, -1
5073; RV32I-NEXT: and s6, s2, s5
5074; RV32I-NEXT: addi s3, sp, 2
5075; RV32I-NEXT: addi s1, zero, 2
5076; RV32I-NEXT: .LBB106_1: # %atomicrmw.start
5077; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
5078; RV32I-NEXT: and a1, a0, s5
5079; RV32I-NEXT: mv a2, a0
5080; RV32I-NEXT: bgeu s6, a1, .LBB106_3
5081; RV32I-NEXT: # %bb.2: # %atomicrmw.start
5082; RV32I-NEXT: # in Loop: Header=BB106_1 Depth=1
5083; RV32I-NEXT: mv a2, s2
5084; RV32I-NEXT: .LBB106_3: # %atomicrmw.start
5085; RV32I-NEXT: # in Loop: Header=BB106_1 Depth=1
5086; RV32I-NEXT: sh a0, 2(sp)
5087; RV32I-NEXT: mv a0, s4
5088; RV32I-NEXT: mv a1, s3
5089; RV32I-NEXT: mv a3, s1
5090; RV32I-NEXT: mv a4, s1
5091; RV32I-NEXT: call __atomic_compare_exchange_2
5092; RV32I-NEXT: mv a1, a0
5093; RV32I-NEXT: lh a0, 2(sp)
5094; RV32I-NEXT: beqz a1, .LBB106_1
5095; RV32I-NEXT: # %bb.4: # %atomicrmw.end
5096; RV32I-NEXT: lw s6, 4(sp)
5097; RV32I-NEXT: lw s5, 8(sp)
5098; RV32I-NEXT: lw s4, 12(sp)
5099; RV32I-NEXT: lw s3, 16(sp)
5100; RV32I-NEXT: lw s2, 20(sp)
5101; RV32I-NEXT: lw s1, 24(sp)
5102; RV32I-NEXT: lw ra, 28(sp)
5103; RV32I-NEXT: addi sp, sp, 32
5104; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]5105;
5106; RV32IA-LABEL: atomicrmw_umin_i16_acquire:
5107; RV32IA: # %bb.0:
5108; RV32IA-NEXT: lui a2, 16
5109; RV32IA-NEXT: addi a2, a2, -1
5110; RV32IA-NEXT: and a1, a1, a2
5111; RV32IA-NEXT: slli a3, a0, 3
5112; RV32IA-NEXT: andi a3, a3, 24
5113; RV32IA-NEXT: sll a6, a2, a3
5114; RV32IA-NEXT: sll a1, a1, a3
5115; RV32IA-NEXT: andi a0, a0, -4
5116; RV32IA-NEXT: .LBB106_1: # =>This Inner Loop Header: Depth=1
5117; RV32IA-NEXT: lr.w.aq a4, (a0)
5118; RV32IA-NEXT: and a2, a4, a6
5119; RV32IA-NEXT: mv a5, a4
5120; RV32IA-NEXT: bgeu a1, a2, .LBB106_3
5121; RV32IA-NEXT: # %bb.2: # in Loop: Header=BB106_1 Depth=1
5122; RV32IA-NEXT: xor a5, a4, a1
5123; RV32IA-NEXT: and a5, a5, a6
5124; RV32IA-NEXT: xor a5, a4, a5
5125; RV32IA-NEXT: .LBB106_3: # in Loop: Header=BB106_1 Depth=1
5126; RV32IA-NEXT: sc.w a5, a5, (a0)
5127; RV32IA-NEXT: bnez a5, .LBB106_1
5128; RV32IA-NEXT: # %bb.4:
5129; RV32IA-NEXT: srl a0, a4, a3
5130; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]5131 %1 = atomicrmw umin i16* %a, i16 %b acquire
5132 ret i16 %1
5133}
5134
5135define i16 @atomicrmw_umin_i16_release(i16 *%a, i16 %b) nounwind {
5136; RV32I-LABEL: atomicrmw_umin_i16_release:
5137; RV32I: # %bb.0:
5138; RV32I-NEXT: addi sp, sp, -32
5139; RV32I-NEXT: sw ra, 28(sp)
5140; RV32I-NEXT: sw s1, 24(sp)
5141; RV32I-NEXT: sw s2, 20(sp)
5142; RV32I-NEXT: sw s3, 16(sp)
5143; RV32I-NEXT: sw s4, 12(sp)
5144; RV32I-NEXT: sw s5, 8(sp)
5145; RV32I-NEXT: sw s6, 4(sp)
5146; RV32I-NEXT: mv s2, a1
5147; RV32I-NEXT: mv s5, a0
5148; RV32I-NEXT: lhu a0, 0(a0)
5149; RV32I-NEXT: lui a1, 16
5150; RV32I-NEXT: addi s1, a1, -1
5151; RV32I-NEXT: and s6, s2, s1
5152; RV32I-NEXT: addi s3, sp, 2
5153; RV32I-NEXT: addi s4, zero, 3
5154; RV32I-NEXT: .LBB107_1: # %atomicrmw.start
5155; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
5156; RV32I-NEXT: and a1, a0, s1
5157; RV32I-NEXT: mv a2, a0
5158; RV32I-NEXT: bgeu s6, a1, .LBB107_3
5159; RV32I-NEXT: # %bb.2: # %atomicrmw.start
5160; RV32I-NEXT: # in Loop: Header=BB107_1 Depth=1
5161; RV32I-NEXT: mv a2, s2
5162; RV32I-NEXT: .LBB107_3: # %atomicrmw.start
5163; RV32I-NEXT: # in Loop: Header=BB107_1 Depth=1
5164; RV32I-NEXT: sh a0, 2(sp)
5165; RV32I-NEXT: mv a0, s5
5166; RV32I-NEXT: mv a1, s3
5167; RV32I-NEXT: mv a3, s4
5168; RV32I-NEXT: mv a4, zero
5169; RV32I-NEXT: call __atomic_compare_exchange_2
5170; RV32I-NEXT: mv a1, a0
5171; RV32I-NEXT: lh a0, 2(sp)
5172; RV32I-NEXT: beqz a1, .LBB107_1
5173; RV32I-NEXT: # %bb.4: # %atomicrmw.end
5174; RV32I-NEXT: lw s6, 4(sp)
5175; RV32I-NEXT: lw s5, 8(sp)
5176; RV32I-NEXT: lw s4, 12(sp)
5177; RV32I-NEXT: lw s3, 16(sp)
5178; RV32I-NEXT: lw s2, 20(sp)
5179; RV32I-NEXT: lw s1, 24(sp)
5180; RV32I-NEXT: lw ra, 28(sp)
5181; RV32I-NEXT: addi sp, sp, 32
5182; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]5183;
5184; RV32IA-LABEL: atomicrmw_umin_i16_release:
5185; RV32IA: # %bb.0:
5186; RV32IA-NEXT: lui a2, 16
5187; RV32IA-NEXT: addi a2, a2, -1
5188; RV32IA-NEXT: and a1, a1, a2
5189; RV32IA-NEXT: slli a3, a0, 3
5190; RV32IA-NEXT: andi a3, a3, 24
5191; RV32IA-NEXT: sll a6, a2, a3
5192; RV32IA-NEXT: sll a1, a1, a3
5193; RV32IA-NEXT: andi a0, a0, -4
5194; RV32IA-NEXT: .LBB107_1: # =>This Inner Loop Header: Depth=1
5195; RV32IA-NEXT: lr.w a4, (a0)
5196; RV32IA-NEXT: and a2, a4, a6
5197; RV32IA-NEXT: mv a5, a4
5198; RV32IA-NEXT: bgeu a1, a2, .LBB107_3
5199; RV32IA-NEXT: # %bb.2: # in Loop: Header=BB107_1 Depth=1
5200; RV32IA-NEXT: xor a5, a4, a1
5201; RV32IA-NEXT: and a5, a5, a6
5202; RV32IA-NEXT: xor a5, a4, a5
5203; RV32IA-NEXT: .LBB107_3: # in Loop: Header=BB107_1 Depth=1
5204; RV32IA-NEXT: sc.w.rl a5, a5, (a0)
5205; RV32IA-NEXT: bnez a5, .LBB107_1
5206; RV32IA-NEXT: # %bb.4:
5207; RV32IA-NEXT: srl a0, a4, a3
5208; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]5209 %1 = atomicrmw umin i16* %a, i16 %b release
5210 ret i16 %1
5211}
5212
5213define i16 @atomicrmw_umin_i16_acq_rel(i16 *%a, i16 %b) nounwind {
5214; RV32I-LABEL: atomicrmw_umin_i16_acq_rel:
5215; RV32I: # %bb.0:
5216; RV32I-NEXT: addi sp, sp, -48
5217; RV32I-NEXT: sw ra, 44(sp)
5218; RV32I-NEXT: sw s1, 40(sp)
5219; RV32I-NEXT: sw s2, 36(sp)
5220; RV32I-NEXT: sw s3, 32(sp)
5221; RV32I-NEXT: sw s4, 28(sp)
5222; RV32I-NEXT: sw s5, 24(sp)
5223; RV32I-NEXT: sw s6, 20(sp)
5224; RV32I-NEXT: sw s7, 16(sp)
5225; RV32I-NEXT: mv s2, a1
5226; RV32I-NEXT: mv s6, a0
5227; RV32I-NEXT: lhu a0, 0(a0)
5228; RV32I-NEXT: lui a1, 16
5229; RV32I-NEXT: addi s1, a1, -1
5230; RV32I-NEXT: and s7, s2, s1
5231; RV32I-NEXT: addi s3, sp, 14
5232; RV32I-NEXT: addi s4, zero, 4
5233; RV32I-NEXT: addi s5, zero, 2
5234; RV32I-NEXT: .LBB108_1: # %atomicrmw.start
5235; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
5236; RV32I-NEXT: and a1, a0, s1
5237; RV32I-NEXT: mv a2, a0
5238; RV32I-NEXT: bgeu s7, a1, .LBB108_3
5239; RV32I-NEXT: # %bb.2: # %atomicrmw.start
5240; RV32I-NEXT: # in Loop: Header=BB108_1 Depth=1
5241; RV32I-NEXT: mv a2, s2
5242; RV32I-NEXT: .LBB108_3: # %atomicrmw.start
5243; RV32I-NEXT: # in Loop: Header=BB108_1 Depth=1
5244; RV32I-NEXT: sh a0, 14(sp)
5245; RV32I-NEXT: mv a0, s6
5246; RV32I-NEXT: mv a1, s3
5247; RV32I-NEXT: mv a3, s4
5248; RV32I-NEXT: mv a4, s5
5249; RV32I-NEXT: call __atomic_compare_exchange_2
5250; RV32I-NEXT: mv a1, a0
5251; RV32I-NEXT: lh a0, 14(sp)
5252; RV32I-NEXT: beqz a1, .LBB108_1
5253; RV32I-NEXT: # %bb.4: # %atomicrmw.end
5254; RV32I-NEXT: lw s7, 16(sp)
5255; RV32I-NEXT: lw s6, 20(sp)
5256; RV32I-NEXT: lw s5, 24(sp)
5257; RV32I-NEXT: lw s4, 28(sp)
5258; RV32I-NEXT: lw s3, 32(sp)
5259; RV32I-NEXT: lw s2, 36(sp)
5260; RV32I-NEXT: lw s1, 40(sp)
5261; RV32I-NEXT: lw ra, 44(sp)
5262; RV32I-NEXT: addi sp, sp, 48
5263; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]5264;
5265; RV32IA-LABEL: atomicrmw_umin_i16_acq_rel:
5266; RV32IA: # %bb.0:
5267; RV32IA-NEXT: lui a2, 16
5268; RV32IA-NEXT: addi a2, a2, -1
5269; RV32IA-NEXT: and a1, a1, a2
5270; RV32IA-NEXT: slli a3, a0, 3
5271; RV32IA-NEXT: andi a3, a3, 24
5272; RV32IA-NEXT: sll a6, a2, a3
5273; RV32IA-NEXT: sll a1, a1, a3
5274; RV32IA-NEXT: andi a0, a0, -4
5275; RV32IA-NEXT: .LBB108_1: # =>This Inner Loop Header: Depth=1
5276; RV32IA-NEXT: lr.w.aq a4, (a0)
5277; RV32IA-NEXT: and a2, a4, a6
5278; RV32IA-NEXT: mv a5, a4
5279; RV32IA-NEXT: bgeu a1, a2, .LBB108_3
5280; RV32IA-NEXT: # %bb.2: # in Loop: Header=BB108_1 Depth=1
5281; RV32IA-NEXT: xor a5, a4, a1
5282; RV32IA-NEXT: and a5, a5, a6
5283; RV32IA-NEXT: xor a5, a4, a5
5284; RV32IA-NEXT: .LBB108_3: # in Loop: Header=BB108_1 Depth=1
5285; RV32IA-NEXT: sc.w.rl a5, a5, (a0)
5286; RV32IA-NEXT: bnez a5, .LBB108_1
5287; RV32IA-NEXT: # %bb.4:
5288; RV32IA-NEXT: srl a0, a4, a3
5289; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]5290 %1 = atomicrmw umin i16* %a, i16 %b acq_rel
5291 ret i16 %1
5292}
5293
5294define i16 @atomicrmw_umin_i16_seq_cst(i16 *%a, i16 %b) nounwind {
5295; RV32I-LABEL: atomicrmw_umin_i16_seq_cst:
5296; RV32I: # %bb.0:
5297; RV32I-NEXT: addi sp, sp, -32
5298; RV32I-NEXT: sw ra, 28(sp)
5299; RV32I-NEXT: sw s1, 24(sp)
5300; RV32I-NEXT: sw s2, 20(sp)
5301; RV32I-NEXT: sw s3, 16(sp)
5302; RV32I-NEXT: sw s4, 12(sp)
5303; RV32I-NEXT: sw s5, 8(sp)
5304; RV32I-NEXT: sw s6, 4(sp)
5305; RV32I-NEXT: mv s2, a1
5306; RV32I-NEXT: mv s4, a0
5307; RV32I-NEXT: lhu a0, 0(a0)
5308; RV32I-NEXT: lui a1, 16
5309; RV32I-NEXT: addi s5, a1, -1
5310; RV32I-NEXT: and s6, s2, s5
5311; RV32I-NEXT: addi s3, sp, 2
5312; RV32I-NEXT: addi s1, zero, 5
5313; RV32I-NEXT: .LBB109_1: # %atomicrmw.start
5314; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
5315; RV32I-NEXT: and a1, a0, s5
5316; RV32I-NEXT: mv a2, a0
5317; RV32I-NEXT: bgeu s6, a1, .LBB109_3
5318; RV32I-NEXT: # %bb.2: # %atomicrmw.start
5319; RV32I-NEXT: # in Loop: Header=BB109_1 Depth=1
5320; RV32I-NEXT: mv a2, s2
5321; RV32I-NEXT: .LBB109_3: # %atomicrmw.start
5322; RV32I-NEXT: # in Loop: Header=BB109_1 Depth=1
5323; RV32I-NEXT: sh a0, 2(sp)
5324; RV32I-NEXT: mv a0, s4
5325; RV32I-NEXT: mv a1, s3
5326; RV32I-NEXT: mv a3, s1
5327; RV32I-NEXT: mv a4, s1
5328; RV32I-NEXT: call __atomic_compare_exchange_2
5329; RV32I-NEXT: mv a1, a0
5330; RV32I-NEXT: lh a0, 2(sp)
5331; RV32I-NEXT: beqz a1, .LBB109_1
5332; RV32I-NEXT: # %bb.4: # %atomicrmw.end
5333; RV32I-NEXT: lw s6, 4(sp)
5334; RV32I-NEXT: lw s5, 8(sp)
5335; RV32I-NEXT: lw s4, 12(sp)
5336; RV32I-NEXT: lw s3, 16(sp)
5337; RV32I-NEXT: lw s2, 20(sp)
5338; RV32I-NEXT: lw s1, 24(sp)
5339; RV32I-NEXT: lw ra, 28(sp)
5340; RV32I-NEXT: addi sp, sp, 32
5341; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]5342;
5343; RV32IA-LABEL: atomicrmw_umin_i16_seq_cst:
5344; RV32IA: # %bb.0:
5345; RV32IA-NEXT: lui a2, 16
5346; RV32IA-NEXT: addi a2, a2, -1
5347; RV32IA-NEXT: and a1, a1, a2
5348; RV32IA-NEXT: slli a3, a0, 3
5349; RV32IA-NEXT: andi a3, a3, 24
5350; RV32IA-NEXT: sll a6, a2, a3
5351; RV32IA-NEXT: sll a1, a1, a3
5352; RV32IA-NEXT: andi a0, a0, -4
5353; RV32IA-NEXT: .LBB109_1: # =>This Inner Loop Header: Depth=1
5354; RV32IA-NEXT: lr.w.aqrl a4, (a0)
5355; RV32IA-NEXT: and a2, a4, a6
5356; RV32IA-NEXT: mv a5, a4
5357; RV32IA-NEXT: bgeu a1, a2, .LBB109_3
5358; RV32IA-NEXT: # %bb.2: # in Loop: Header=BB109_1 Depth=1
5359; RV32IA-NEXT: xor a5, a4, a1
5360; RV32IA-NEXT: and a5, a5, a6
5361; RV32IA-NEXT: xor a5, a4, a5
5362; RV32IA-NEXT: .LBB109_3: # in Loop: Header=BB109_1 Depth=1
5363; RV32IA-NEXT: sc.w.aqrl a5, a5, (a0)
5364; RV32IA-NEXT: bnez a5, .LBB109_1
5365; RV32IA-NEXT: # %bb.4:
5366; RV32IA-NEXT: srl a0, a4, a3
5367; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]5368 %1 = atomicrmw umin i16* %a, i16 %b seq_cst
5369 ret i16 %1
5370}
5371
5372define i32 @atomicrmw_xchg_i32_monotonic(i32* %a, i32 %b) {
5373; RV32I-LABEL: atomicrmw_xchg_i32_monotonic:
5374; RV32I: # %bb.0:
5375; RV32I-NEXT: addi sp, sp, -16
5376; RV32I-NEXT: sw ra, 12(sp)
5377; RV32I-NEXT: mv a2, zero
5378; RV32I-NEXT: call __atomic_exchange_4
5379; RV32I-NEXT: lw ra, 12(sp)
5380; RV32I-NEXT: addi sp, sp, 16
5381; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]5382;
5383; RV32IA-LABEL: atomicrmw_xchg_i32_monotonic:
5384; RV32IA: # %bb.0:
5385; RV32IA-NEXT: amoswap.w a0, a1, (a0)
5386; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]5387 %1 = atomicrmw xchg i32* %a, i32 %b monotonic
5388 ret i32 %1
5389}
5390
5391define i32 @atomicrmw_xchg_i32_acquire(i32* %a, i32 %b) {
5392; RV32I-LABEL: atomicrmw_xchg_i32_acquire:
5393; RV32I: # %bb.0:
5394; RV32I-NEXT: addi sp, sp, -16
5395; RV32I-NEXT: sw ra, 12(sp)
5396; RV32I-NEXT: addi a2, zero, 2
5397; RV32I-NEXT: call __atomic_exchange_4
5398; RV32I-NEXT: lw ra, 12(sp)
5399; RV32I-NEXT: addi sp, sp, 16
5400; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]5401;
5402; RV32IA-LABEL: atomicrmw_xchg_i32_acquire:
5403; RV32IA: # %bb.0:
5404; RV32IA-NEXT: amoswap.w.aq a0, a1, (a0)
5405; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]5406 %1 = atomicrmw xchg i32* %a, i32 %b acquire
5407 ret i32 %1
5408}
5409
5410define i32 @atomicrmw_xchg_i32_release(i32* %a, i32 %b) {
5411; RV32I-LABEL: atomicrmw_xchg_i32_release:
5412; RV32I: # %bb.0:
5413; RV32I-NEXT: addi sp, sp, -16
5414; RV32I-NEXT: sw ra, 12(sp)
5415; RV32I-NEXT: addi a2, zero, 3
5416; RV32I-NEXT: call __atomic_exchange_4
5417; RV32I-NEXT: lw ra, 12(sp)
5418; RV32I-NEXT: addi sp, sp, 16
5419; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]5420;
5421; RV32IA-LABEL: atomicrmw_xchg_i32_release:
5422; RV32IA: # %bb.0:
5423; RV32IA-NEXT: amoswap.w.rl a0, a1, (a0)
5424; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]5425 %1 = atomicrmw xchg i32* %a, i32 %b release
5426 ret i32 %1
5427}
5428
5429define i32 @atomicrmw_xchg_i32_acq_rel(i32* %a, i32 %b) {
5430; RV32I-LABEL: atomicrmw_xchg_i32_acq_rel:
5431; RV32I: # %bb.0:
5432; RV32I-NEXT: addi sp, sp, -16
5433; RV32I-NEXT: sw ra, 12(sp)
5434; RV32I-NEXT: addi a2, zero, 4
5435; RV32I-NEXT: call __atomic_exchange_4
5436; RV32I-NEXT: lw ra, 12(sp)
5437; RV32I-NEXT: addi sp, sp, 16
5438; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]5439;
5440; RV32IA-LABEL: atomicrmw_xchg_i32_acq_rel:
5441; RV32IA: # %bb.0:
5442; RV32IA-NEXT: amoswap.w.aqrl a0, a1, (a0)
5443; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]5444 %1 = atomicrmw xchg i32* %a, i32 %b acq_rel
5445 ret i32 %1
5446}
5447
5448define i32 @atomicrmw_xchg_i32_seq_cst(i32* %a, i32 %b) {
5449; RV32I-LABEL: atomicrmw_xchg_i32_seq_cst:
5450; RV32I: # %bb.0:
5451; RV32I-NEXT: addi sp, sp, -16
5452; RV32I-NEXT: sw ra, 12(sp)
5453; RV32I-NEXT: addi a2, zero, 5
5454; RV32I-NEXT: call __atomic_exchange_4
5455; RV32I-NEXT: lw ra, 12(sp)
5456; RV32I-NEXT: addi sp, sp, 16
5457; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]5458;
5459; RV32IA-LABEL: atomicrmw_xchg_i32_seq_cst:
5460; RV32IA: # %bb.0:
5461; RV32IA-NEXT: amoswap.w.aqrl a0, a1, (a0)
5462; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]5463 %1 = atomicrmw xchg i32* %a, i32 %b seq_cst
5464 ret i32 %1
5465}
5466
5467define i32 @atomicrmw_add_i32_monotonic(i32 *%a, i32 %b) nounwind {
5468; RV32I-LABEL: atomicrmw_add_i32_monotonic:
5469; RV32I: # %bb.0:
5470; RV32I-NEXT: addi sp, sp, -16
5471; RV32I-NEXT: sw ra, 12(sp)
5472; RV32I-NEXT: mv a2, zero
5473; RV32I-NEXT: call __atomic_fetch_add_4
5474; RV32I-NEXT: lw ra, 12(sp)
5475; RV32I-NEXT: addi sp, sp, 16
5476; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]5477;
5478; RV32IA-LABEL: atomicrmw_add_i32_monotonic:
5479; RV32IA: # %bb.0:
5480; RV32IA-NEXT: amoadd.w a0, a1, (a0)
5481; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]5482 %1 = atomicrmw add i32* %a, i32 %b monotonic
5483 ret i32 %1
5484}
5485
5486define i32 @atomicrmw_add_i32_acquire(i32 *%a, i32 %b) nounwind {
5487; RV32I-LABEL: atomicrmw_add_i32_acquire:
5488; RV32I: # %bb.0:
5489; RV32I-NEXT: addi sp, sp, -16
5490; RV32I-NEXT: sw ra, 12(sp)
5491; RV32I-NEXT: addi a2, zero, 2
5492; RV32I-NEXT: call __atomic_fetch_add_4
5493; RV32I-NEXT: lw ra, 12(sp)
5494; RV32I-NEXT: addi sp, sp, 16
5495; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]5496;
5497; RV32IA-LABEL: atomicrmw_add_i32_acquire:
5498; RV32IA: # %bb.0:
5499; RV32IA-NEXT: amoadd.w.aq a0, a1, (a0)
5500; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]5501 %1 = atomicrmw add i32* %a, i32 %b acquire
5502 ret i32 %1
5503}
5504
5505define i32 @atomicrmw_add_i32_release(i32 *%a, i32 %b) nounwind {
5506; RV32I-LABEL: atomicrmw_add_i32_release:
5507; RV32I: # %bb.0:
5508; RV32I-NEXT: addi sp, sp, -16
5509; RV32I-NEXT: sw ra, 12(sp)
5510; RV32I-NEXT: addi a2, zero, 3
5511; RV32I-NEXT: call __atomic_fetch_add_4
5512; RV32I-NEXT: lw ra, 12(sp)
5513; RV32I-NEXT: addi sp, sp, 16
5514; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]5515;
5516; RV32IA-LABEL: atomicrmw_add_i32_release:
5517; RV32IA: # %bb.0:
5518; RV32IA-NEXT: amoadd.w.rl a0, a1, (a0)
5519; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]5520 %1 = atomicrmw add i32* %a, i32 %b release
5521 ret i32 %1
5522}
5523
5524define i32 @atomicrmw_add_i32_acq_rel(i32 *%a, i32 %b) nounwind {
5525; RV32I-LABEL: atomicrmw_add_i32_acq_rel:
5526; RV32I: # %bb.0:
5527; RV32I-NEXT: addi sp, sp, -16
5528; RV32I-NEXT: sw ra, 12(sp)
5529; RV32I-NEXT: addi a2, zero, 4
5530; RV32I-NEXT: call __atomic_fetch_add_4
5531; RV32I-NEXT: lw ra, 12(sp)
5532; RV32I-NEXT: addi sp, sp, 16
5533; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]5534;
5535; RV32IA-LABEL: atomicrmw_add_i32_acq_rel:
5536; RV32IA: # %bb.0:
5537; RV32IA-NEXT: amoadd.w.aqrl a0, a1, (a0)
5538; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]5539 %1 = atomicrmw add i32* %a, i32 %b acq_rel
5540 ret i32 %1
5541}
5542
5543define i32 @atomicrmw_add_i32_seq_cst(i32 *%a, i32 %b) nounwind {
5544; RV32I-LABEL: atomicrmw_add_i32_seq_cst:
5545; RV32I: # %bb.0:
5546; RV32I-NEXT: addi sp, sp, -16
5547; RV32I-NEXT: sw ra, 12(sp)
5548; RV32I-NEXT: addi a2, zero, 5
5549; RV32I-NEXT: call __atomic_fetch_add_4
5550; RV32I-NEXT: lw ra, 12(sp)
5551; RV32I-NEXT: addi sp, sp, 16
5552; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]5553;
5554; RV32IA-LABEL: atomicrmw_add_i32_seq_cst:
5555; RV32IA: # %bb.0:
5556; RV32IA-NEXT: amoadd.w.aqrl a0, a1, (a0)
5557; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]5558 %1 = atomicrmw add i32* %a, i32 %b seq_cst
5559 ret i32 %1
5560}
5561
5562define i32 @atomicrmw_sub_i32_monotonic(i32* %a, i32 %b) {
5563; RV32I-LABEL: atomicrmw_sub_i32_monotonic:
5564; RV32I: # %bb.0:
5565; RV32I-NEXT: addi sp, sp, -16
5566; RV32I-NEXT: sw ra, 12(sp)
5567; RV32I-NEXT: mv a2, zero
5568; RV32I-NEXT: call __atomic_fetch_sub_4
5569; RV32I-NEXT: lw ra, 12(sp)
5570; RV32I-NEXT: addi sp, sp, 16
5571; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]5572;
5573; RV32IA-LABEL: atomicrmw_sub_i32_monotonic:
5574; RV32IA: # %bb.0:
5575; RV32IA-NEXT: neg a1, a1
5576; RV32IA-NEXT: amoadd.w a0, a1, (a0)
5577; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]5578 %1 = atomicrmw sub i32* %a, i32 %b monotonic
5579 ret i32 %1
5580}
5581
5582define i32 @atomicrmw_sub_i32_acquire(i32* %a, i32 %b) {
5583; RV32I-LABEL: atomicrmw_sub_i32_acquire:
5584; RV32I: # %bb.0:
5585; RV32I-NEXT: addi sp, sp, -16
5586; RV32I-NEXT: sw ra, 12(sp)
5587; RV32I-NEXT: addi a2, zero, 2
5588; RV32I-NEXT: call __atomic_fetch_sub_4
5589; RV32I-NEXT: lw ra, 12(sp)
5590; RV32I-NEXT: addi sp, sp, 16
5591; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]5592;
5593; RV32IA-LABEL: atomicrmw_sub_i32_acquire:
5594; RV32IA: # %bb.0:
5595; RV32IA-NEXT: neg a1, a1
5596; RV32IA-NEXT: amoadd.w.aq a0, a1, (a0)
5597; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]5598 %1 = atomicrmw sub i32* %a, i32 %b acquire
5599 ret i32 %1
5600}
5601
5602define i32 @atomicrmw_sub_i32_release(i32* %a, i32 %b) {
5603; RV32I-LABEL: atomicrmw_sub_i32_release:
5604; RV32I: # %bb.0:
5605; RV32I-NEXT: addi sp, sp, -16
5606; RV32I-NEXT: sw ra, 12(sp)
5607; RV32I-NEXT: addi a2, zero, 3
5608; RV32I-NEXT: call __atomic_fetch_sub_4
5609; RV32I-NEXT: lw ra, 12(sp)
5610; RV32I-NEXT: addi sp, sp, 16
5611; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]5612;
5613; RV32IA-LABEL: atomicrmw_sub_i32_release:
5614; RV32IA: # %bb.0:
5615; RV32IA-NEXT: neg a1, a1
5616; RV32IA-NEXT: amoadd.w.rl a0, a1, (a0)
5617; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]5618 %1 = atomicrmw sub i32* %a, i32 %b release
5619 ret i32 %1
5620}
5621
5622define i32 @atomicrmw_sub_i32_acq_rel(i32* %a, i32 %b) {
5623; RV32I-LABEL: atomicrmw_sub_i32_acq_rel:
5624; RV32I: # %bb.0:
5625; RV32I-NEXT: addi sp, sp, -16
5626; RV32I-NEXT: sw ra, 12(sp)
5627; RV32I-NEXT: addi a2, zero, 4
5628; RV32I-NEXT: call __atomic_fetch_sub_4
5629; RV32I-NEXT: lw ra, 12(sp)
5630; RV32I-NEXT: addi sp, sp, 16
5631; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]5632;
5633; RV32IA-LABEL: atomicrmw_sub_i32_acq_rel:
5634; RV32IA: # %bb.0:
5635; RV32IA-NEXT: neg a1, a1
5636; RV32IA-NEXT: amoadd.w.aqrl a0, a1, (a0)
5637; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]5638 %1 = atomicrmw sub i32* %a, i32 %b acq_rel
5639 ret i32 %1
5640}
5641
5642define i32 @atomicrmw_sub_i32_seq_cst(i32* %a, i32 %b) {
5643; RV32I-LABEL: atomicrmw_sub_i32_seq_cst:
5644; RV32I: # %bb.0:
5645; RV32I-NEXT: addi sp, sp, -16
5646; RV32I-NEXT: sw ra, 12(sp)
5647; RV32I-NEXT: addi a2, zero, 5
5648; RV32I-NEXT: call __atomic_fetch_sub_4
5649; RV32I-NEXT: lw ra, 12(sp)
5650; RV32I-NEXT: addi sp, sp, 16
5651; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]5652;
5653; RV32IA-LABEL: atomicrmw_sub_i32_seq_cst:
5654; RV32IA: # %bb.0:
5655; RV32IA-NEXT: neg a1, a1
5656; RV32IA-NEXT: amoadd.w.aqrl a0, a1, (a0)
5657; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]5658 %1 = atomicrmw sub i32* %a, i32 %b seq_cst
5659 ret i32 %1
5660}
5661
5662define i32 @atomicrmw_and_i32_monotonic(i32 *%a, i32 %b) nounwind {
5663; RV32I-LABEL: atomicrmw_and_i32_monotonic:
5664; RV32I: # %bb.0:
5665; RV32I-NEXT: addi sp, sp, -16
5666; RV32I-NEXT: sw ra, 12(sp)
5667; RV32I-NEXT: mv a2, zero
5668; RV32I-NEXT: call __atomic_fetch_and_4
5669; RV32I-NEXT: lw ra, 12(sp)
5670; RV32I-NEXT: addi sp, sp, 16
5671; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]5672;
5673; RV32IA-LABEL: atomicrmw_and_i32_monotonic:
5674; RV32IA: # %bb.0:
5675; RV32IA-NEXT: amoand.w a0, a1, (a0)
5676; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]5677 %1 = atomicrmw and i32* %a, i32 %b monotonic
5678 ret i32 %1
5679}
5680
5681define i32 @atomicrmw_and_i32_acquire(i32 *%a, i32 %b) nounwind {
5682; RV32I-LABEL: atomicrmw_and_i32_acquire:
5683; RV32I: # %bb.0:
5684; RV32I-NEXT: addi sp, sp, -16
5685; RV32I-NEXT: sw ra, 12(sp)
5686; RV32I-NEXT: addi a2, zero, 2
5687; RV32I-NEXT: call __atomic_fetch_and_4
5688; RV32I-NEXT: lw ra, 12(sp)
5689; RV32I-NEXT: addi sp, sp, 16
5690; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]5691;
5692; RV32IA-LABEL: atomicrmw_and_i32_acquire:
5693; RV32IA: # %bb.0:
5694; RV32IA-NEXT: amoand.w.aq a0, a1, (a0)
5695; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]5696 %1 = atomicrmw and i32* %a, i32 %b acquire
5697 ret i32 %1
5698}
5699
5700define i32 @atomicrmw_and_i32_release(i32 *%a, i32 %b) nounwind {
5701; RV32I-LABEL: atomicrmw_and_i32_release:
5702; RV32I: # %bb.0:
5703; RV32I-NEXT: addi sp, sp, -16
5704; RV32I-NEXT: sw ra, 12(sp)
5705; RV32I-NEXT: addi a2, zero, 3
5706; RV32I-NEXT: call __atomic_fetch_and_4
5707; RV32I-NEXT: lw ra, 12(sp)
5708; RV32I-NEXT: addi sp, sp, 16
5709; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]5710;
5711; RV32IA-LABEL: atomicrmw_and_i32_release:
5712; RV32IA: # %bb.0:
5713; RV32IA-NEXT: amoand.w.rl a0, a1, (a0)
5714; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]5715 %1 = atomicrmw and i32* %a, i32 %b release
5716 ret i32 %1
5717}
5718
5719define i32 @atomicrmw_and_i32_acq_rel(i32 *%a, i32 %b) nounwind {
5720; RV32I-LABEL: atomicrmw_and_i32_acq_rel:
5721; RV32I: # %bb.0:
5722; RV32I-NEXT: addi sp, sp, -16
5723; RV32I-NEXT: sw ra, 12(sp)
5724; RV32I-NEXT: addi a2, zero, 4
5725; RV32I-NEXT: call __atomic_fetch_and_4
5726; RV32I-NEXT: lw ra, 12(sp)
5727; RV32I-NEXT: addi sp, sp, 16
5728; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]5729;
5730; RV32IA-LABEL: atomicrmw_and_i32_acq_rel:
5731; RV32IA: # %bb.0:
5732; RV32IA-NEXT: amoand.w.aqrl a0, a1, (a0)
5733; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]5734 %1 = atomicrmw and i32* %a, i32 %b acq_rel
5735 ret i32 %1
5736}
5737
5738define i32 @atomicrmw_and_i32_seq_cst(i32 *%a, i32 %b) nounwind {
5739; RV32I-LABEL: atomicrmw_and_i32_seq_cst:
5740; RV32I: # %bb.0:
5741; RV32I-NEXT: addi sp, sp, -16
5742; RV32I-NEXT: sw ra, 12(sp)
5743; RV32I-NEXT: addi a2, zero, 5
5744; RV32I-NEXT: call __atomic_fetch_and_4
5745; RV32I-NEXT: lw ra, 12(sp)
5746; RV32I-NEXT: addi sp, sp, 16
5747; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]5748;
5749; RV32IA-LABEL: atomicrmw_and_i32_seq_cst:
5750; RV32IA: # %bb.0:
5751; RV32IA-NEXT: amoand.w.aqrl a0, a1, (a0)
5752; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]5753 %1 = atomicrmw and i32* %a, i32 %b seq_cst
5754 ret i32 %1
5755}
5756
5757define i32 @atomicrmw_nand_i32_monotonic(i32* %a, i32 %b) {
5758; RV32I-LABEL: atomicrmw_nand_i32_monotonic:
5759; RV32I: # %bb.0:
5760; RV32I-NEXT: addi sp, sp, -16
5761; RV32I-NEXT: sw ra, 12(sp)
5762; RV32I-NEXT: mv a2, zero
5763; RV32I-NEXT: call __atomic_fetch_nand_4
5764; RV32I-NEXT: lw ra, 12(sp)
5765; RV32I-NEXT: addi sp, sp, 16
5766; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]5767;
5768; RV32IA-LABEL: atomicrmw_nand_i32_monotonic:
5769; RV32IA: # %bb.0:
5770; RV32IA-NEXT: .LBB130_1: # =>This Inner Loop Header: Depth=1
5771; RV32IA-NEXT: lr.w a2, (a0)
5772; RV32IA-NEXT: and a3, a2, a1
5773; RV32IA-NEXT: not a3, a3
5774; RV32IA-NEXT: sc.w a3, a3, (a0)
5775; RV32IA-NEXT: bnez a3, .LBB130_1
5776; RV32IA-NEXT: # %bb.2:
5777; RV32IA-NEXT: mv a0, a2
5778; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]5779 %1 = atomicrmw nand i32* %a, i32 %b monotonic
5780 ret i32 %1
5781}
5782
5783define i32 @atomicrmw_nand_i32_acquire(i32* %a, i32 %b) {
5784; RV32I-LABEL: atomicrmw_nand_i32_acquire:
5785; RV32I: # %bb.0:
5786; RV32I-NEXT: addi sp, sp, -16
5787; RV32I-NEXT: sw ra, 12(sp)
5788; RV32I-NEXT: addi a2, zero, 2
5789; RV32I-NEXT: call __atomic_fetch_nand_4
5790; RV32I-NEXT: lw ra, 12(sp)
5791; RV32I-NEXT: addi sp, sp, 16
5792; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]5793;
5794; RV32IA-LABEL: atomicrmw_nand_i32_acquire:
5795; RV32IA: # %bb.0:
5796; RV32IA-NEXT: .LBB131_1: # =>This Inner Loop Header: Depth=1
5797; RV32IA-NEXT: lr.w.aq a2, (a0)
5798; RV32IA-NEXT: and a3, a2, a1
5799; RV32IA-NEXT: not a3, a3
5800; RV32IA-NEXT: sc.w a3, a3, (a0)
5801; RV32IA-NEXT: bnez a3, .LBB131_1
5802; RV32IA-NEXT: # %bb.2:
5803; RV32IA-NEXT: mv a0, a2
5804; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]5805 %1 = atomicrmw nand i32* %a, i32 %b acquire
5806 ret i32 %1
5807}
5808
5809define i32 @atomicrmw_nand_i32_release(i32* %a, i32 %b) {
5810; RV32I-LABEL: atomicrmw_nand_i32_release:
5811; RV32I: # %bb.0:
5812; RV32I-NEXT: addi sp, sp, -16
5813; RV32I-NEXT: sw ra, 12(sp)
5814; RV32I-NEXT: addi a2, zero, 3
5815; RV32I-NEXT: call __atomic_fetch_nand_4
5816; RV32I-NEXT: lw ra, 12(sp)
5817; RV32I-NEXT: addi sp, sp, 16
5818; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]5819;
5820; RV32IA-LABEL: atomicrmw_nand_i32_release:
5821; RV32IA: # %bb.0:
5822; RV32IA-NEXT: .LBB132_1: # =>This Inner Loop Header: Depth=1
5823; RV32IA-NEXT: lr.w a2, (a0)
5824; RV32IA-NEXT: and a3, a2, a1
5825; RV32IA-NEXT: not a3, a3
5826; RV32IA-NEXT: sc.w.rl a3, a3, (a0)
5827; RV32IA-NEXT: bnez a3, .LBB132_1
5828; RV32IA-NEXT: # %bb.2:
5829; RV32IA-NEXT: mv a0, a2
5830; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]5831 %1 = atomicrmw nand i32* %a, i32 %b release
5832 ret i32 %1
5833}
5834
5835define i32 @atomicrmw_nand_i32_acq_rel(i32* %a, i32 %b) {
5836; RV32I-LABEL: atomicrmw_nand_i32_acq_rel:
5837; RV32I: # %bb.0:
5838; RV32I-NEXT: addi sp, sp, -16
5839; RV32I-NEXT: sw ra, 12(sp)
5840; RV32I-NEXT: addi a2, zero, 4
5841; RV32I-NEXT: call __atomic_fetch_nand_4
5842; RV32I-NEXT: lw ra, 12(sp)
5843; RV32I-NEXT: addi sp, sp, 16
5844; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]5845;
5846; RV32IA-LABEL: atomicrmw_nand_i32_acq_rel:
5847; RV32IA: # %bb.0:
5848; RV32IA-NEXT: .LBB133_1: # =>This Inner Loop Header: Depth=1
5849; RV32IA-NEXT: lr.w.aq a2, (a0)
5850; RV32IA-NEXT: and a3, a2, a1
5851; RV32IA-NEXT: not a3, a3
5852; RV32IA-NEXT: sc.w.rl a3, a3, (a0)
5853; RV32IA-NEXT: bnez a3, .LBB133_1
5854; RV32IA-NEXT: # %bb.2:
5855; RV32IA-NEXT: mv a0, a2
5856; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]5857 %1 = atomicrmw nand i32* %a, i32 %b acq_rel
5858 ret i32 %1
5859}
5860
5861define i32 @atomicrmw_nand_i32_seq_cst(i32* %a, i32 %b) {
5862; RV32I-LABEL: atomicrmw_nand_i32_seq_cst:
5863; RV32I: # %bb.0:
5864; RV32I-NEXT: addi sp, sp, -16
5865; RV32I-NEXT: sw ra, 12(sp)
5866; RV32I-NEXT: addi a2, zero, 5
5867; RV32I-NEXT: call __atomic_fetch_nand_4
5868; RV32I-NEXT: lw ra, 12(sp)
5869; RV32I-NEXT: addi sp, sp, 16
5870; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]5871;
5872; RV32IA-LABEL: atomicrmw_nand_i32_seq_cst:
5873; RV32IA: # %bb.0:
5874; RV32IA-NEXT: .LBB134_1: # =>This Inner Loop Header: Depth=1
5875; RV32IA-NEXT: lr.w.aqrl a2, (a0)
5876; RV32IA-NEXT: and a3, a2, a1
5877; RV32IA-NEXT: not a3, a3
5878; RV32IA-NEXT: sc.w.aqrl a3, a3, (a0)
5879; RV32IA-NEXT: bnez a3, .LBB134_1
5880; RV32IA-NEXT: # %bb.2:
5881; RV32IA-NEXT: mv a0, a2
5882; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]5883 %1 = atomicrmw nand i32* %a, i32 %b seq_cst
5884 ret i32 %1
5885}
5886
5887define i32 @atomicrmw_or_i32_monotonic(i32 *%a, i32 %b) nounwind {
5888; RV32I-LABEL: atomicrmw_or_i32_monotonic:
5889; RV32I: # %bb.0:
5890; RV32I-NEXT: addi sp, sp, -16
5891; RV32I-NEXT: sw ra, 12(sp)
5892; RV32I-NEXT: mv a2, zero
5893; RV32I-NEXT: call __atomic_fetch_or_4
5894; RV32I-NEXT: lw ra, 12(sp)
5895; RV32I-NEXT: addi sp, sp, 16
5896; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]5897;
5898; RV32IA-LABEL: atomicrmw_or_i32_monotonic:
5899; RV32IA: # %bb.0:
5900; RV32IA-NEXT: amoor.w a0, a1, (a0)
5901; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]5902 %1 = atomicrmw or i32* %a, i32 %b monotonic
5903 ret i32 %1
5904}
5905
5906define i32 @atomicrmw_or_i32_acquire(i32 *%a, i32 %b) nounwind {
5907; RV32I-LABEL: atomicrmw_or_i32_acquire:
5908; RV32I: # %bb.0:
5909; RV32I-NEXT: addi sp, sp, -16
5910; RV32I-NEXT: sw ra, 12(sp)
5911; RV32I-NEXT: addi a2, zero, 2
5912; RV32I-NEXT: call __atomic_fetch_or_4
5913; RV32I-NEXT: lw ra, 12(sp)
5914; RV32I-NEXT: addi sp, sp, 16
5915; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]5916;
5917; RV32IA-LABEL: atomicrmw_or_i32_acquire:
5918; RV32IA: # %bb.0:
5919; RV32IA-NEXT: amoor.w.aq a0, a1, (a0)
5920; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]5921 %1 = atomicrmw or i32* %a, i32 %b acquire
5922 ret i32 %1
5923}
5924
5925define i32 @atomicrmw_or_i32_release(i32 *%a, i32 %b) nounwind {
5926; RV32I-LABEL: atomicrmw_or_i32_release:
5927; RV32I: # %bb.0:
5928; RV32I-NEXT: addi sp, sp, -16
5929; RV32I-NEXT: sw ra, 12(sp)
5930; RV32I-NEXT: addi a2, zero, 3
5931; RV32I-NEXT: call __atomic_fetch_or_4
5932; RV32I-NEXT: lw ra, 12(sp)
5933; RV32I-NEXT: addi sp, sp, 16
5934; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]5935;
5936; RV32IA-LABEL: atomicrmw_or_i32_release:
5937; RV32IA: # %bb.0:
5938; RV32IA-NEXT: amoor.w.rl a0, a1, (a0)
5939; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]5940 %1 = atomicrmw or i32* %a, i32 %b release
5941 ret i32 %1
5942}
5943
5944define i32 @atomicrmw_or_i32_acq_rel(i32 *%a, i32 %b) nounwind {
5945; RV32I-LABEL: atomicrmw_or_i32_acq_rel:
5946; RV32I: # %bb.0:
5947; RV32I-NEXT: addi sp, sp, -16
5948; RV32I-NEXT: sw ra, 12(sp)
5949; RV32I-NEXT: addi a2, zero, 4
5950; RV32I-NEXT: call __atomic_fetch_or_4
5951; RV32I-NEXT: lw ra, 12(sp)
5952; RV32I-NEXT: addi sp, sp, 16
5953; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]5954;
5955; RV32IA-LABEL: atomicrmw_or_i32_acq_rel:
5956; RV32IA: # %bb.0:
5957; RV32IA-NEXT: amoor.w.aqrl a0, a1, (a0)
5958; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]5959 %1 = atomicrmw or i32* %a, i32 %b acq_rel
5960 ret i32 %1
5961}
5962
5963define i32 @atomicrmw_or_i32_seq_cst(i32 *%a, i32 %b) nounwind {
5964; RV32I-LABEL: atomicrmw_or_i32_seq_cst:
5965; RV32I: # %bb.0:
5966; RV32I-NEXT: addi sp, sp, -16
5967; RV32I-NEXT: sw ra, 12(sp)
5968; RV32I-NEXT: addi a2, zero, 5
5969; RV32I-NEXT: call __atomic_fetch_or_4
5970; RV32I-NEXT: lw ra, 12(sp)
5971; RV32I-NEXT: addi sp, sp, 16
5972; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]5973;
5974; RV32IA-LABEL: atomicrmw_or_i32_seq_cst:
5975; RV32IA: # %bb.0:
5976; RV32IA-NEXT: amoor.w.aqrl a0, a1, (a0)
5977; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]5978 %1 = atomicrmw or i32* %a, i32 %b seq_cst
5979 ret i32 %1
5980}
5981
5982define i32 @atomicrmw_xor_i32_monotonic(i32 *%a, i32 %b) nounwind {
5983; RV32I-LABEL: atomicrmw_xor_i32_monotonic:
5984; RV32I: # %bb.0:
5985; RV32I-NEXT: addi sp, sp, -16
5986; RV32I-NEXT: sw ra, 12(sp)
5987; RV32I-NEXT: mv a2, zero
5988; RV32I-NEXT: call __atomic_fetch_xor_4
5989; RV32I-NEXT: lw ra, 12(sp)
5990; RV32I-NEXT: addi sp, sp, 16
5991; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]5992;
5993; RV32IA-LABEL: atomicrmw_xor_i32_monotonic:
5994; RV32IA: # %bb.0:
5995; RV32IA-NEXT: amoxor.w a0, a1, (a0)
5996; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]5997 %1 = atomicrmw xor i32* %a, i32 %b monotonic
5998 ret i32 %1
5999}
6000
6001define i32 @atomicrmw_xor_i32_acquire(i32 *%a, i32 %b) nounwind {
6002; RV32I-LABEL: atomicrmw_xor_i32_acquire:
6003; RV32I: # %bb.0:
6004; RV32I-NEXT: addi sp, sp, -16
6005; RV32I-NEXT: sw ra, 12(sp)
6006; RV32I-NEXT: addi a2, zero, 2
6007; RV32I-NEXT: call __atomic_fetch_xor_4
6008; RV32I-NEXT: lw ra, 12(sp)
6009; RV32I-NEXT: addi sp, sp, 16
6010; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]6011;
6012; RV32IA-LABEL: atomicrmw_xor_i32_acquire:
6013; RV32IA: # %bb.0:
6014; RV32IA-NEXT: amoxor.w.aq a0, a1, (a0)
6015; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]6016 %1 = atomicrmw xor i32* %a, i32 %b acquire
6017 ret i32 %1
6018}
6019
6020define i32 @atomicrmw_xor_i32_release(i32 *%a, i32 %b) nounwind {
6021; RV32I-LABEL: atomicrmw_xor_i32_release:
6022; RV32I: # %bb.0:
6023; RV32I-NEXT: addi sp, sp, -16
6024; RV32I-NEXT: sw ra, 12(sp)
6025; RV32I-NEXT: addi a2, zero, 3
6026; RV32I-NEXT: call __atomic_fetch_xor_4
6027; RV32I-NEXT: lw ra, 12(sp)
6028; RV32I-NEXT: addi sp, sp, 16
6029; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]6030;
6031; RV32IA-LABEL: atomicrmw_xor_i32_release:
6032; RV32IA: # %bb.0:
6033; RV32IA-NEXT: amoxor.w.rl a0, a1, (a0)
6034; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]6035 %1 = atomicrmw xor i32* %a, i32 %b release
6036 ret i32 %1
6037}
6038
6039define i32 @atomicrmw_xor_i32_acq_rel(i32 *%a, i32 %b) nounwind {
6040; RV32I-LABEL: atomicrmw_xor_i32_acq_rel:
6041; RV32I: # %bb.0:
6042; RV32I-NEXT: addi sp, sp, -16
6043; RV32I-NEXT: sw ra, 12(sp)
6044; RV32I-NEXT: addi a2, zero, 4
6045; RV32I-NEXT: call __atomic_fetch_xor_4
6046; RV32I-NEXT: lw ra, 12(sp)
6047; RV32I-NEXT: addi sp, sp, 16
6048; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]6049;
6050; RV32IA-LABEL: atomicrmw_xor_i32_acq_rel:
6051; RV32IA: # %bb.0:
6052; RV32IA-NEXT: amoxor.w.aqrl a0, a1, (a0)
6053; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]6054 %1 = atomicrmw xor i32* %a, i32 %b acq_rel
6055 ret i32 %1
6056}
6057
6058define i32 @atomicrmw_xor_i32_seq_cst(i32 *%a, i32 %b) nounwind {
6059; RV32I-LABEL: atomicrmw_xor_i32_seq_cst:
6060; RV32I: # %bb.0:
6061; RV32I-NEXT: addi sp, sp, -16
6062; RV32I-NEXT: sw ra, 12(sp)
6063; RV32I-NEXT: addi a2, zero, 5
6064; RV32I-NEXT: call __atomic_fetch_xor_4
6065; RV32I-NEXT: lw ra, 12(sp)
6066; RV32I-NEXT: addi sp, sp, 16
6067; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]6068;
6069; RV32IA-LABEL: atomicrmw_xor_i32_seq_cst:
6070; RV32IA: # %bb.0:
6071; RV32IA-NEXT: amoxor.w.aqrl a0, a1, (a0)
6072; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]6073 %1 = atomicrmw xor i32* %a, i32 %b seq_cst
6074 ret i32 %1
6075}
6076
6077define i32 @atomicrmw_max_i32_monotonic(i32 *%a, i32 %b) nounwind {
6078; RV32I-LABEL: atomicrmw_max_i32_monotonic:
6079; RV32I: # %bb.0:
6080; RV32I-NEXT: addi sp, sp, -32
6081; RV32I-NEXT: sw ra, 28(sp)
6082; RV32I-NEXT: sw s1, 24(sp)
6083; RV32I-NEXT: sw s2, 20(sp)
6084; RV32I-NEXT: sw s3, 16(sp)
6085; RV32I-NEXT: mv s1, a1
6086; RV32I-NEXT: mv s2, a0
6087; RV32I-NEXT: lw a2, 0(a0)
6088; RV32I-NEXT: addi s3, sp, 12
6089; RV32I-NEXT: .LBB145_1: # %atomicrmw.start
6090; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
6091; RV32I-NEXT: sw a2, 12(sp)
6092; RV32I-NEXT: blt s1, a2, .LBB145_3
6093; RV32I-NEXT: # %bb.2: # %atomicrmw.start
6094; RV32I-NEXT: # in Loop: Header=BB145_1 Depth=1
6095; RV32I-NEXT: mv a2, s1
6096; RV32I-NEXT: .LBB145_3: # %atomicrmw.start
6097; RV32I-NEXT: # in Loop: Header=BB145_1 Depth=1
6098; RV32I-NEXT: mv a0, s2
6099; RV32I-NEXT: mv a1, s3
6100; RV32I-NEXT: mv a3, zero
6101; RV32I-NEXT: mv a4, zero
6102; RV32I-NEXT: call __atomic_compare_exchange_4
6103; RV32I-NEXT: lw a2, 12(sp)
6104; RV32I-NEXT: beqz a0, .LBB145_1
6105; RV32I-NEXT: # %bb.4: # %atomicrmw.end
6106; RV32I-NEXT: mv a0, a2
6107; RV32I-NEXT: lw s3, 16(sp)
6108; RV32I-NEXT: lw s2, 20(sp)
6109; RV32I-NEXT: lw s1, 24(sp)
6110; RV32I-NEXT: lw ra, 28(sp)
6111; RV32I-NEXT: addi sp, sp, 32
6112; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]6113;
6114; RV32IA-LABEL: atomicrmw_max_i32_monotonic:
6115; RV32IA: # %bb.0:
6116; RV32IA-NEXT: amomax.w a0, a1, (a0)
6117; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]6118 %1 = atomicrmw max i32* %a, i32 %b monotonic
6119 ret i32 %1
6120}
6121
6122define i32 @atomicrmw_max_i32_acquire(i32 *%a, i32 %b) nounwind {
6123; RV32I-LABEL: atomicrmw_max_i32_acquire:
6124; RV32I: # %bb.0:
6125; RV32I-NEXT: addi sp, sp, -32
6126; RV32I-NEXT: sw ra, 28(sp)
6127; RV32I-NEXT: sw s1, 24(sp)
6128; RV32I-NEXT: sw s2, 20(sp)
6129; RV32I-NEXT: sw s3, 16(sp)
6130; RV32I-NEXT: sw s4, 12(sp)
6131; RV32I-NEXT: mv s1, a1
6132; RV32I-NEXT: mv s2, a0
6133; RV32I-NEXT: lw a2, 0(a0)
6134; RV32I-NEXT: addi s3, sp, 8
6135; RV32I-NEXT: addi s4, zero, 2
6136; RV32I-NEXT: .LBB146_1: # %atomicrmw.start
6137; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
6138; RV32I-NEXT: sw a2, 8(sp)
6139; RV32I-NEXT: blt s1, a2, .LBB146_3
6140; RV32I-NEXT: # %bb.2: # %atomicrmw.start
6141; RV32I-NEXT: # in Loop: Header=BB146_1 Depth=1
6142; RV32I-NEXT: mv a2, s1
6143; RV32I-NEXT: .LBB146_3: # %atomicrmw.start
6144; RV32I-NEXT: # in Loop: Header=BB146_1 Depth=1
6145; RV32I-NEXT: mv a0, s2
6146; RV32I-NEXT: mv a1, s3
6147; RV32I-NEXT: mv a3, s4
6148; RV32I-NEXT: mv a4, s4
6149; RV32I-NEXT: call __atomic_compare_exchange_4
6150; RV32I-NEXT: lw a2, 8(sp)
6151; RV32I-NEXT: beqz a0, .LBB146_1
6152; RV32I-NEXT: # %bb.4: # %atomicrmw.end
6153; RV32I-NEXT: mv a0, a2
6154; RV32I-NEXT: lw s4, 12(sp)
6155; RV32I-NEXT: lw s3, 16(sp)
6156; RV32I-NEXT: lw s2, 20(sp)
6157; RV32I-NEXT: lw s1, 24(sp)
6158; RV32I-NEXT: lw ra, 28(sp)
6159; RV32I-NEXT: addi sp, sp, 32
6160; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]6161;
6162; RV32IA-LABEL: atomicrmw_max_i32_acquire:
6163; RV32IA: # %bb.0:
6164; RV32IA-NEXT: amomax.w.aq a0, a1, (a0)
6165; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]6166 %1 = atomicrmw max i32* %a, i32 %b acquire
6167 ret i32 %1
6168}
6169
6170define i32 @atomicrmw_max_i32_release(i32 *%a, i32 %b) nounwind {
6171; RV32I-LABEL: atomicrmw_max_i32_release:
6172; RV32I: # %bb.0:
6173; RV32I-NEXT: addi sp, sp, -32
6174; RV32I-NEXT: sw ra, 28(sp)
6175; RV32I-NEXT: sw s1, 24(sp)
6176; RV32I-NEXT: sw s2, 20(sp)
6177; RV32I-NEXT: sw s3, 16(sp)
6178; RV32I-NEXT: sw s4, 12(sp)
6179; RV32I-NEXT: mv s1, a1
6180; RV32I-NEXT: mv s2, a0
6181; RV32I-NEXT: lw a2, 0(a0)
6182; RV32I-NEXT: addi s3, sp, 8
6183; RV32I-NEXT: addi s4, zero, 3
6184; RV32I-NEXT: .LBB147_1: # %atomicrmw.start
6185; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
6186; RV32I-NEXT: sw a2, 8(sp)
6187; RV32I-NEXT: blt s1, a2, .LBB147_3
6188; RV32I-NEXT: # %bb.2: # %atomicrmw.start
6189; RV32I-NEXT: # in Loop: Header=BB147_1 Depth=1
6190; RV32I-NEXT: mv a2, s1
6191; RV32I-NEXT: .LBB147_3: # %atomicrmw.start
6192; RV32I-NEXT: # in Loop: Header=BB147_1 Depth=1
6193; RV32I-NEXT: mv a0, s2
6194; RV32I-NEXT: mv a1, s3
6195; RV32I-NEXT: mv a3, s4
6196; RV32I-NEXT: mv a4, zero
6197; RV32I-NEXT: call __atomic_compare_exchange_4
6198; RV32I-NEXT: lw a2, 8(sp)
6199; RV32I-NEXT: beqz a0, .LBB147_1
6200; RV32I-NEXT: # %bb.4: # %atomicrmw.end
6201; RV32I-NEXT: mv a0, a2
6202; RV32I-NEXT: lw s4, 12(sp)
6203; RV32I-NEXT: lw s3, 16(sp)
6204; RV32I-NEXT: lw s2, 20(sp)
6205; RV32I-NEXT: lw s1, 24(sp)
6206; RV32I-NEXT: lw ra, 28(sp)
6207; RV32I-NEXT: addi sp, sp, 32
6208; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]6209;
6210; RV32IA-LABEL: atomicrmw_max_i32_release:
6211; RV32IA: # %bb.0:
6212; RV32IA-NEXT: amomax.w.rl a0, a1, (a0)
6213; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]6214 %1 = atomicrmw max i32* %a, i32 %b release
6215 ret i32 %1
6216}
6217
6218define i32 @atomicrmw_max_i32_acq_rel(i32 *%a, i32 %b) nounwind {
6219; RV32I-LABEL: atomicrmw_max_i32_acq_rel:
6220; RV32I: # %bb.0:
6221; RV32I-NEXT: addi sp, sp, -32
6222; RV32I-NEXT: sw ra, 28(sp)
6223; RV32I-NEXT: sw s1, 24(sp)
6224; RV32I-NEXT: sw s2, 20(sp)
6225; RV32I-NEXT: sw s3, 16(sp)
6226; RV32I-NEXT: sw s4, 12(sp)
6227; RV32I-NEXT: sw s5, 8(sp)
6228; RV32I-NEXT: mv s1, a1
6229; RV32I-NEXT: mv s2, a0
6230; RV32I-NEXT: lw a2, 0(a0)
6231; RV32I-NEXT: addi s3, sp, 4
6232; RV32I-NEXT: addi s4, zero, 4
6233; RV32I-NEXT: addi s5, zero, 2
6234; RV32I-NEXT: .LBB148_1: # %atomicrmw.start
6235; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
6236; RV32I-NEXT: sw a2, 4(sp)
6237; RV32I-NEXT: blt s1, a2, .LBB148_3
6238; RV32I-NEXT: # %bb.2: # %atomicrmw.start
6239; RV32I-NEXT: # in Loop: Header=BB148_1 Depth=1
6240; RV32I-NEXT: mv a2, s1
6241; RV32I-NEXT: .LBB148_3: # %atomicrmw.start
6242; RV32I-NEXT: # in Loop: Header=BB148_1 Depth=1
6243; RV32I-NEXT: mv a0, s2
6244; RV32I-NEXT: mv a1, s3
6245; RV32I-NEXT: mv a3, s4
6246; RV32I-NEXT: mv a4, s5
6247; RV32I-NEXT: call __atomic_compare_exchange_4
6248; RV32I-NEXT: lw a2, 4(sp)
6249; RV32I-NEXT: beqz a0, .LBB148_1
6250; RV32I-NEXT: # %bb.4: # %atomicrmw.end
6251; RV32I-NEXT: mv a0, a2
6252; RV32I-NEXT: lw s5, 8(sp)
6253; RV32I-NEXT: lw s4, 12(sp)
6254; RV32I-NEXT: lw s3, 16(sp)
6255; RV32I-NEXT: lw s2, 20(sp)
6256; RV32I-NEXT: lw s1, 24(sp)
6257; RV32I-NEXT: lw ra, 28(sp)
6258; RV32I-NEXT: addi sp, sp, 32
6259; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]6260;
6261; RV32IA-LABEL: atomicrmw_max_i32_acq_rel:
6262; RV32IA: # %bb.0:
6263; RV32IA-NEXT: amomax.w.aqrl a0, a1, (a0)
6264; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]6265 %1 = atomicrmw max i32* %a, i32 %b acq_rel
6266 ret i32 %1
6267}
6268
6269define i32 @atomicrmw_max_i32_seq_cst(i32 *%a, i32 %b) nounwind {
6270; RV32I-LABEL: atomicrmw_max_i32_seq_cst:
6271; RV32I: # %bb.0:
6272; RV32I-NEXT: addi sp, sp, -32
6273; RV32I-NEXT: sw ra, 28(sp)
6274; RV32I-NEXT: sw s1, 24(sp)
6275; RV32I-NEXT: sw s2, 20(sp)
6276; RV32I-NEXT: sw s3, 16(sp)
6277; RV32I-NEXT: sw s4, 12(sp)
6278; RV32I-NEXT: mv s1, a1
6279; RV32I-NEXT: mv s2, a0
6280; RV32I-NEXT: lw a2, 0(a0)
6281; RV32I-NEXT: addi s3, sp, 8
6282; RV32I-NEXT: addi s4, zero, 5
6283; RV32I-NEXT: .LBB149_1: # %atomicrmw.start
6284; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
6285; RV32I-NEXT: sw a2, 8(sp)
6286; RV32I-NEXT: blt s1, a2, .LBB149_3
6287; RV32I-NEXT: # %bb.2: # %atomicrmw.start
6288; RV32I-NEXT: # in Loop: Header=BB149_1 Depth=1
6289; RV32I-NEXT: mv a2, s1
6290; RV32I-NEXT: .LBB149_3: # %atomicrmw.start
6291; RV32I-NEXT: # in Loop: Header=BB149_1 Depth=1
6292; RV32I-NEXT: mv a0, s2
6293; RV32I-NEXT: mv a1, s3
6294; RV32I-NEXT: mv a3, s4
6295; RV32I-NEXT: mv a4, s4
6296; RV32I-NEXT: call __atomic_compare_exchange_4
6297; RV32I-NEXT: lw a2, 8(sp)
6298; RV32I-NEXT: beqz a0, .LBB149_1
6299; RV32I-NEXT: # %bb.4: # %atomicrmw.end
6300; RV32I-NEXT: mv a0, a2
6301; RV32I-NEXT: lw s4, 12(sp)
6302; RV32I-NEXT: lw s3, 16(sp)
6303; RV32I-NEXT: lw s2, 20(sp)
6304; RV32I-NEXT: lw s1, 24(sp)
6305; RV32I-NEXT: lw ra, 28(sp)
6306; RV32I-NEXT: addi sp, sp, 32
6307; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]6308;
6309; RV32IA-LABEL: atomicrmw_max_i32_seq_cst:
6310; RV32IA: # %bb.0:
6311; RV32IA-NEXT: amomax.w.aqrl a0, a1, (a0)
6312; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]6313 %1 = atomicrmw max i32* %a, i32 %b seq_cst
6314 ret i32 %1
6315}
6316
6317define i32 @atomicrmw_min_i32_monotonic(i32 *%a, i32 %b) nounwind {
6318; RV32I-LABEL: atomicrmw_min_i32_monotonic:
6319; RV32I: # %bb.0:
6320; RV32I-NEXT: addi sp, sp, -32
6321; RV32I-NEXT: sw ra, 28(sp)
6322; RV32I-NEXT: sw s1, 24(sp)
6323; RV32I-NEXT: sw s2, 20(sp)
6324; RV32I-NEXT: sw s3, 16(sp)
6325; RV32I-NEXT: mv s1, a1
6326; RV32I-NEXT: mv s2, a0
6327; RV32I-NEXT: lw a2, 0(a0)
6328; RV32I-NEXT: addi s3, sp, 12
6329; RV32I-NEXT: .LBB150_1: # %atomicrmw.start
6330; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
6331; RV32I-NEXT: sw a2, 12(sp)
6332; RV32I-NEXT: bge s1, a2, .LBB150_3
6333; RV32I-NEXT: # %bb.2: # %atomicrmw.start
6334; RV32I-NEXT: # in Loop: Header=BB150_1 Depth=1
6335; RV32I-NEXT: mv a2, s1
6336; RV32I-NEXT: .LBB150_3: # %atomicrmw.start
6337; RV32I-NEXT: # in Loop: Header=BB150_1 Depth=1
6338; RV32I-NEXT: mv a0, s2
6339; RV32I-NEXT: mv a1, s3
6340; RV32I-NEXT: mv a3, zero
6341; RV32I-NEXT: mv a4, zero
6342; RV32I-NEXT: call __atomic_compare_exchange_4
6343; RV32I-NEXT: lw a2, 12(sp)
6344; RV32I-NEXT: beqz a0, .LBB150_1
6345; RV32I-NEXT: # %bb.4: # %atomicrmw.end
6346; RV32I-NEXT: mv a0, a2
6347; RV32I-NEXT: lw s3, 16(sp)
6348; RV32I-NEXT: lw s2, 20(sp)
6349; RV32I-NEXT: lw s1, 24(sp)
6350; RV32I-NEXT: lw ra, 28(sp)
6351; RV32I-NEXT: addi sp, sp, 32
6352; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]6353;
6354; RV32IA-LABEL: atomicrmw_min_i32_monotonic:
6355; RV32IA: # %bb.0:
6356; RV32IA-NEXT: amomin.w a0, a1, (a0)
6357; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]6358 %1 = atomicrmw min i32* %a, i32 %b monotonic
6359 ret i32 %1
6360}
6361
6362define i32 @atomicrmw_min_i32_acquire(i32 *%a, i32 %b) nounwind {
6363; RV32I-LABEL: atomicrmw_min_i32_acquire:
6364; RV32I: # %bb.0:
6365; RV32I-NEXT: addi sp, sp, -32
6366; RV32I-NEXT: sw ra, 28(sp)
6367; RV32I-NEXT: sw s1, 24(sp)
6368; RV32I-NEXT: sw s2, 20(sp)
6369; RV32I-NEXT: sw s3, 16(sp)
6370; RV32I-NEXT: sw s4, 12(sp)
6371; RV32I-NEXT: mv s1, a1
6372; RV32I-NEXT: mv s2, a0
6373; RV32I-NEXT: lw a2, 0(a0)
6374; RV32I-NEXT: addi s3, sp, 8
6375; RV32I-NEXT: addi s4, zero, 2
6376; RV32I-NEXT: .LBB151_1: # %atomicrmw.start
6377; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
6378; RV32I-NEXT: sw a2, 8(sp)
6379; RV32I-NEXT: bge s1, a2, .LBB151_3
6380; RV32I-NEXT: # %bb.2: # %atomicrmw.start
6381; RV32I-NEXT: # in Loop: Header=BB151_1 Depth=1
6382; RV32I-NEXT: mv a2, s1
6383; RV32I-NEXT: .LBB151_3: # %atomicrmw.start
6384; RV32I-NEXT: # in Loop: Header=BB151_1 Depth=1
6385; RV32I-NEXT: mv a0, s2
6386; RV32I-NEXT: mv a1, s3
6387; RV32I-NEXT: mv a3, s4
6388; RV32I-NEXT: mv a4, s4
6389; RV32I-NEXT: call __atomic_compare_exchange_4
6390; RV32I-NEXT: lw a2, 8(sp)
6391; RV32I-NEXT: beqz a0, .LBB151_1
6392; RV32I-NEXT: # %bb.4: # %atomicrmw.end
6393; RV32I-NEXT: mv a0, a2
6394; RV32I-NEXT: lw s4, 12(sp)
6395; RV32I-NEXT: lw s3, 16(sp)
6396; RV32I-NEXT: lw s2, 20(sp)
6397; RV32I-NEXT: lw s1, 24(sp)
6398; RV32I-NEXT: lw ra, 28(sp)
6399; RV32I-NEXT: addi sp, sp, 32
6400; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]6401;
6402; RV32IA-LABEL: atomicrmw_min_i32_acquire:
6403; RV32IA: # %bb.0:
6404; RV32IA-NEXT: amomin.w.aq a0, a1, (a0)
6405; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]6406 %1 = atomicrmw min i32* %a, i32 %b acquire
6407 ret i32 %1
6408}
6409
6410define i32 @atomicrmw_min_i32_release(i32 *%a, i32 %b) nounwind {
6411; RV32I-LABEL: atomicrmw_min_i32_release:
6412; RV32I: # %bb.0:
6413; RV32I-NEXT: addi sp, sp, -32
6414; RV32I-NEXT: sw ra, 28(sp)
6415; RV32I-NEXT: sw s1, 24(sp)
6416; RV32I-NEXT: sw s2, 20(sp)
6417; RV32I-NEXT: sw s3, 16(sp)
6418; RV32I-NEXT: sw s4, 12(sp)
6419; RV32I-NEXT: mv s1, a1
6420; RV32I-NEXT: mv s2, a0
6421; RV32I-NEXT: lw a2, 0(a0)
6422; RV32I-NEXT: addi s3, sp, 8
6423; RV32I-NEXT: addi s4, zero, 3
6424; RV32I-NEXT: .LBB152_1: # %atomicrmw.start
6425; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
6426; RV32I-NEXT: sw a2, 8(sp)
6427; RV32I-NEXT: bge s1, a2, .LBB152_3
6428; RV32I-NEXT: # %bb.2: # %atomicrmw.start
6429; RV32I-NEXT: # in Loop: Header=BB152_1 Depth=1
6430; RV32I-NEXT: mv a2, s1
6431; RV32I-NEXT: .LBB152_3: # %atomicrmw.start
6432; RV32I-NEXT: # in Loop: Header=BB152_1 Depth=1
6433; RV32I-NEXT: mv a0, s2
6434; RV32I-NEXT: mv a1, s3
6435; RV32I-NEXT: mv a3, s4
6436; RV32I-NEXT: mv a4, zero
6437; RV32I-NEXT: call __atomic_compare_exchange_4
6438; RV32I-NEXT: lw a2, 8(sp)
6439; RV32I-NEXT: beqz a0, .LBB152_1
6440; RV32I-NEXT: # %bb.4: # %atomicrmw.end
6441; RV32I-NEXT: mv a0, a2
6442; RV32I-NEXT: lw s4, 12(sp)
6443; RV32I-NEXT: lw s3, 16(sp)
6444; RV32I-NEXT: lw s2, 20(sp)
6445; RV32I-NEXT: lw s1, 24(sp)
6446; RV32I-NEXT: lw ra, 28(sp)
6447; RV32I-NEXT: addi sp, sp, 32
6448; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]6449;
6450; RV32IA-LABEL: atomicrmw_min_i32_release:
6451; RV32IA: # %bb.0:
6452; RV32IA-NEXT: amomin.w.rl a0, a1, (a0)
6453; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]6454 %1 = atomicrmw min i32* %a, i32 %b release
6455 ret i32 %1
6456}
6457
6458define i32 @atomicrmw_min_i32_acq_rel(i32 *%a, i32 %b) nounwind {
6459; RV32I-LABEL: atomicrmw_min_i32_acq_rel:
6460; RV32I: # %bb.0:
6461; RV32I-NEXT: addi sp, sp, -32
6462; RV32I-NEXT: sw ra, 28(sp)
6463; RV32I-NEXT: sw s1, 24(sp)
6464; RV32I-NEXT: sw s2, 20(sp)
6465; RV32I-NEXT: sw s3, 16(sp)
6466; RV32I-NEXT: sw s4, 12(sp)
6467; RV32I-NEXT: sw s5, 8(sp)
6468; RV32I-NEXT: mv s1, a1
6469; RV32I-NEXT: mv s2, a0
6470; RV32I-NEXT: lw a2, 0(a0)
6471; RV32I-NEXT: addi s3, sp, 4
6472; RV32I-NEXT: addi s4, zero, 4
6473; RV32I-NEXT: addi s5, zero, 2
6474; RV32I-NEXT: .LBB153_1: # %atomicrmw.start
6475; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
6476; RV32I-NEXT: sw a2, 4(sp)
6477; RV32I-NEXT: bge s1, a2, .LBB153_3
6478; RV32I-NEXT: # %bb.2: # %atomicrmw.start
6479; RV32I-NEXT: # in Loop: Header=BB153_1 Depth=1
6480; RV32I-NEXT: mv a2, s1
6481; RV32I-NEXT: .LBB153_3: # %atomicrmw.start
6482; RV32I-NEXT: # in Loop: Header=BB153_1 Depth=1
6483; RV32I-NEXT: mv a0, s2
6484; RV32I-NEXT: mv a1, s3
6485; RV32I-NEXT: mv a3, s4
6486; RV32I-NEXT: mv a4, s5
6487; RV32I-NEXT: call __atomic_compare_exchange_4
6488; RV32I-NEXT: lw a2, 4(sp)
6489; RV32I-NEXT: beqz a0, .LBB153_1
6490; RV32I-NEXT: # %bb.4: # %atomicrmw.end
6491; RV32I-NEXT: mv a0, a2
6492; RV32I-NEXT: lw s5, 8(sp)
6493; RV32I-NEXT: lw s4, 12(sp)
6494; RV32I-NEXT: lw s3, 16(sp)
6495; RV32I-NEXT: lw s2, 20(sp)
6496; RV32I-NEXT: lw s1, 24(sp)
6497; RV32I-NEXT: lw ra, 28(sp)
6498; RV32I-NEXT: addi sp, sp, 32
6499; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]6500;
6501; RV32IA-LABEL: atomicrmw_min_i32_acq_rel:
6502; RV32IA: # %bb.0:
6503; RV32IA-NEXT: amomin.w.aqrl a0, a1, (a0)
6504; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]6505 %1 = atomicrmw min i32* %a, i32 %b acq_rel
6506 ret i32 %1
6507}
6508
6509define i32 @atomicrmw_min_i32_seq_cst(i32 *%a, i32 %b) nounwind {
6510; RV32I-LABEL: atomicrmw_min_i32_seq_cst:
6511; RV32I: # %bb.0:
6512; RV32I-NEXT: addi sp, sp, -32
6513; RV32I-NEXT: sw ra, 28(sp)
6514; RV32I-NEXT: sw s1, 24(sp)
6515; RV32I-NEXT: sw s2, 20(sp)
6516; RV32I-NEXT: sw s3, 16(sp)
6517; RV32I-NEXT: sw s4, 12(sp)
6518; RV32I-NEXT: mv s1, a1
6519; RV32I-NEXT: mv s2, a0
6520; RV32I-NEXT: lw a2, 0(a0)
6521; RV32I-NEXT: addi s3, sp, 8
6522; RV32I-NEXT: addi s4, zero, 5
6523; RV32I-NEXT: .LBB154_1: # %atomicrmw.start
6524; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
6525; RV32I-NEXT: sw a2, 8(sp)
6526; RV32I-NEXT: bge s1, a2, .LBB154_3
6527; RV32I-NEXT: # %bb.2: # %atomicrmw.start
6528; RV32I-NEXT: # in Loop: Header=BB154_1 Depth=1
6529; RV32I-NEXT: mv a2, s1
6530; RV32I-NEXT: .LBB154_3: # %atomicrmw.start
6531; RV32I-NEXT: # in Loop: Header=BB154_1 Depth=1
6532; RV32I-NEXT: mv a0, s2
6533; RV32I-NEXT: mv a1, s3
6534; RV32I-NEXT: mv a3, s4
6535; RV32I-NEXT: mv a4, s4
6536; RV32I-NEXT: call __atomic_compare_exchange_4
6537; RV32I-NEXT: lw a2, 8(sp)
6538; RV32I-NEXT: beqz a0, .LBB154_1
6539; RV32I-NEXT: # %bb.4: # %atomicrmw.end
6540; RV32I-NEXT: mv a0, a2
6541; RV32I-NEXT: lw s4, 12(sp)
6542; RV32I-NEXT: lw s3, 16(sp)
6543; RV32I-NEXT: lw s2, 20(sp)
6544; RV32I-NEXT: lw s1, 24(sp)
6545; RV32I-NEXT: lw ra, 28(sp)
6546; RV32I-NEXT: addi sp, sp, 32
6547; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]6548;
6549; RV32IA-LABEL: atomicrmw_min_i32_seq_cst:
6550; RV32IA: # %bb.0:
6551; RV32IA-NEXT: amomin.w.aqrl a0, a1, (a0)
6552; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]6553 %1 = atomicrmw min i32* %a, i32 %b seq_cst
6554 ret i32 %1
6555}
6556
6557define i32 @atomicrmw_umax_i32_monotonic(i32 *%a, i32 %b) nounwind {
6558; RV32I-LABEL: atomicrmw_umax_i32_monotonic:
6559; RV32I: # %bb.0:
6560; RV32I-NEXT: addi sp, sp, -32
6561; RV32I-NEXT: sw ra, 28(sp)
6562; RV32I-NEXT: sw s1, 24(sp)
6563; RV32I-NEXT: sw s2, 20(sp)
6564; RV32I-NEXT: sw s3, 16(sp)
6565; RV32I-NEXT: mv s1, a1
6566; RV32I-NEXT: mv s2, a0
6567; RV32I-NEXT: lw a2, 0(a0)
6568; RV32I-NEXT: addi s3, sp, 12
6569; RV32I-NEXT: .LBB155_1: # %atomicrmw.start
6570; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
6571; RV32I-NEXT: sw a2, 12(sp)
6572; RV32I-NEXT: bltu s1, a2, .LBB155_3
6573; RV32I-NEXT: # %bb.2: # %atomicrmw.start
6574; RV32I-NEXT: # in Loop: Header=BB155_1 Depth=1
6575; RV32I-NEXT: mv a2, s1
6576; RV32I-NEXT: .LBB155_3: # %atomicrmw.start
6577; RV32I-NEXT: # in Loop: Header=BB155_1 Depth=1
6578; RV32I-NEXT: mv a0, s2
6579; RV32I-NEXT: mv a1, s3
6580; RV32I-NEXT: mv a3, zero
6581; RV32I-NEXT: mv a4, zero
6582; RV32I-NEXT: call __atomic_compare_exchange_4
6583; RV32I-NEXT: lw a2, 12(sp)
6584; RV32I-NEXT: beqz a0, .LBB155_1
6585; RV32I-NEXT: # %bb.4: # %atomicrmw.end
6586; RV32I-NEXT: mv a0, a2
6587; RV32I-NEXT: lw s3, 16(sp)
6588; RV32I-NEXT: lw s2, 20(sp)
6589; RV32I-NEXT: lw s1, 24(sp)
6590; RV32I-NEXT: lw ra, 28(sp)
6591; RV32I-NEXT: addi sp, sp, 32
6592; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]6593;
6594; RV32IA-LABEL: atomicrmw_umax_i32_monotonic:
6595; RV32IA: # %bb.0:
6596; RV32IA-NEXT: amomaxu.w a0, a1, (a0)
6597; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]6598 %1 = atomicrmw umax i32* %a, i32 %b monotonic
6599 ret i32 %1
6600}
6601
6602define i32 @atomicrmw_umax_i32_acquire(i32 *%a, i32 %b) nounwind {
6603; RV32I-LABEL: atomicrmw_umax_i32_acquire:
6604; RV32I: # %bb.0:
6605; RV32I-NEXT: addi sp, sp, -32
6606; RV32I-NEXT: sw ra, 28(sp)
6607; RV32I-NEXT: sw s1, 24(sp)
6608; RV32I-NEXT: sw s2, 20(sp)
6609; RV32I-NEXT: sw s3, 16(sp)
6610; RV32I-NEXT: sw s4, 12(sp)
6611; RV32I-NEXT: mv s1, a1
6612; RV32I-NEXT: mv s2, a0
6613; RV32I-NEXT: lw a2, 0(a0)
6614; RV32I-NEXT: addi s3, sp, 8
6615; RV32I-NEXT: addi s4, zero, 2
6616; RV32I-NEXT: .LBB156_1: # %atomicrmw.start
6617; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
6618; RV32I-NEXT: sw a2, 8(sp)
6619; RV32I-NEXT: bltu s1, a2, .LBB156_3
6620; RV32I-NEXT: # %bb.2: # %atomicrmw.start
6621; RV32I-NEXT: # in Loop: Header=BB156_1 Depth=1
6622; RV32I-NEXT: mv a2, s1
6623; RV32I-NEXT: .LBB156_3: # %atomicrmw.start
6624; RV32I-NEXT: # in Loop: Header=BB156_1 Depth=1
6625; RV32I-NEXT: mv a0, s2
6626; RV32I-NEXT: mv a1, s3
6627; RV32I-NEXT: mv a3, s4
6628; RV32I-NEXT: mv a4, s4
6629; RV32I-NEXT: call __atomic_compare_exchange_4
6630; RV32I-NEXT: lw a2, 8(sp)
6631; RV32I-NEXT: beqz a0, .LBB156_1
6632; RV32I-NEXT: # %bb.4: # %atomicrmw.end
6633; RV32I-NEXT: mv a0, a2
6634; RV32I-NEXT: lw s4, 12(sp)
6635; RV32I-NEXT: lw s3, 16(sp)
6636; RV32I-NEXT: lw s2, 20(sp)
6637; RV32I-NEXT: lw s1, 24(sp)
6638; RV32I-NEXT: lw ra, 28(sp)
6639; RV32I-NEXT: addi sp, sp, 32
6640; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]6641;
6642; RV32IA-LABEL: atomicrmw_umax_i32_acquire:
6643; RV32IA: # %bb.0:
6644; RV32IA-NEXT: amomaxu.w.aq a0, a1, (a0)
6645; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]6646 %1 = atomicrmw umax i32* %a, i32 %b acquire
6647 ret i32 %1
6648}
6649
6650define i32 @atomicrmw_umax_i32_release(i32 *%a, i32 %b) nounwind {
6651; RV32I-LABEL: atomicrmw_umax_i32_release:
6652; RV32I: # %bb.0:
6653; RV32I-NEXT: addi sp, sp, -32
6654; RV32I-NEXT: sw ra, 28(sp)
6655; RV32I-NEXT: sw s1, 24(sp)
6656; RV32I-NEXT: sw s2, 20(sp)
6657; RV32I-NEXT: sw s3, 16(sp)
6658; RV32I-NEXT: sw s4, 12(sp)
6659; RV32I-NEXT: mv s1, a1
6660; RV32I-NEXT: mv s2, a0
6661; RV32I-NEXT: lw a2, 0(a0)
6662; RV32I-NEXT: addi s3, sp, 8
6663; RV32I-NEXT: addi s4, zero, 3
6664; RV32I-NEXT: .LBB157_1: # %atomicrmw.start
6665; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
6666; RV32I-NEXT: sw a2, 8(sp)
6667; RV32I-NEXT: bltu s1, a2, .LBB157_3
6668; RV32I-NEXT: # %bb.2: # %atomicrmw.start
6669; RV32I-NEXT: # in Loop: Header=BB157_1 Depth=1
6670; RV32I-NEXT: mv a2, s1
6671; RV32I-NEXT: .LBB157_3: # %atomicrmw.start
6672; RV32I-NEXT: # in Loop: Header=BB157_1 Depth=1
6673; RV32I-NEXT: mv a0, s2
6674; RV32I-NEXT: mv a1, s3
6675; RV32I-NEXT: mv a3, s4
6676; RV32I-NEXT: mv a4, zero
6677; RV32I-NEXT: call __atomic_compare_exchange_4
6678; RV32I-NEXT: lw a2, 8(sp)
6679; RV32I-NEXT: beqz a0, .LBB157_1
6680; RV32I-NEXT: # %bb.4: # %atomicrmw.end
6681; RV32I-NEXT: mv a0, a2
6682; RV32I-NEXT: lw s4, 12(sp)
6683; RV32I-NEXT: lw s3, 16(sp)
6684; RV32I-NEXT: lw s2, 20(sp)
6685; RV32I-NEXT: lw s1, 24(sp)
6686; RV32I-NEXT: lw ra, 28(sp)
6687; RV32I-NEXT: addi sp, sp, 32
6688; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]6689;
6690; RV32IA-LABEL: atomicrmw_umax_i32_release:
6691; RV32IA: # %bb.0:
6692; RV32IA-NEXT: amomaxu.w.rl a0, a1, (a0)
6693; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]6694 %1 = atomicrmw umax i32* %a, i32 %b release
6695 ret i32 %1
6696}
6697
6698define i32 @atomicrmw_umax_i32_acq_rel(i32 *%a, i32 %b) nounwind {
6699; RV32I-LABEL: atomicrmw_umax_i32_acq_rel:
6700; RV32I: # %bb.0:
6701; RV32I-NEXT: addi sp, sp, -32
6702; RV32I-NEXT: sw ra, 28(sp)
6703; RV32I-NEXT: sw s1, 24(sp)
6704; RV32I-NEXT: sw s2, 20(sp)
6705; RV32I-NEXT: sw s3, 16(sp)
6706; RV32I-NEXT: sw s4, 12(sp)
6707; RV32I-NEXT: sw s5, 8(sp)
6708; RV32I-NEXT: mv s1, a1
6709; RV32I-NEXT: mv s2, a0
6710; RV32I-NEXT: lw a2, 0(a0)
6711; RV32I-NEXT: addi s3, sp, 4
6712; RV32I-NEXT: addi s4, zero, 4
6713; RV32I-NEXT: addi s5, zero, 2
6714; RV32I-NEXT: .LBB158_1: # %atomicrmw.start
6715; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
6716; RV32I-NEXT: sw a2, 4(sp)
6717; RV32I-NEXT: bltu s1, a2, .LBB158_3
6718; RV32I-NEXT: # %bb.2: # %atomicrmw.start
6719; RV32I-NEXT: # in Loop: Header=BB158_1 Depth=1
6720; RV32I-NEXT: mv a2, s1
6721; RV32I-NEXT: .LBB158_3: # %atomicrmw.start
6722; RV32I-NEXT: # in Loop: Header=BB158_1 Depth=1
6723; RV32I-NEXT: mv a0, s2
6724; RV32I-NEXT: mv a1, s3
6725; RV32I-NEXT: mv a3, s4
6726; RV32I-NEXT: mv a4, s5
6727; RV32I-NEXT: call __atomic_compare_exchange_4
6728; RV32I-NEXT: lw a2, 4(sp)
6729; RV32I-NEXT: beqz a0, .LBB158_1
6730; RV32I-NEXT: # %bb.4: # %atomicrmw.end
6731; RV32I-NEXT: mv a0, a2
6732; RV32I-NEXT: lw s5, 8(sp)
6733; RV32I-NEXT: lw s4, 12(sp)
6734; RV32I-NEXT: lw s3, 16(sp)
6735; RV32I-NEXT: lw s2, 20(sp)
6736; RV32I-NEXT: lw s1, 24(sp)
6737; RV32I-NEXT: lw ra, 28(sp)
6738; RV32I-NEXT: addi sp, sp, 32
6739; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]6740;
6741; RV32IA-LABEL: atomicrmw_umax_i32_acq_rel:
6742; RV32IA: # %bb.0:
6743; RV32IA-NEXT: amomaxu.w.aqrl a0, a1, (a0)
6744; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]6745 %1 = atomicrmw umax i32* %a, i32 %b acq_rel
6746 ret i32 %1
6747}
6748
6749define i32 @atomicrmw_umax_i32_seq_cst(i32 *%a, i32 %b) nounwind {
6750; RV32I-LABEL: atomicrmw_umax_i32_seq_cst:
6751; RV32I: # %bb.0:
6752; RV32I-NEXT: addi sp, sp, -32
6753; RV32I-NEXT: sw ra, 28(sp)
6754; RV32I-NEXT: sw s1, 24(sp)
6755; RV32I-NEXT: sw s2, 20(sp)
6756; RV32I-NEXT: sw s3, 16(sp)
6757; RV32I-NEXT: sw s4, 12(sp)
6758; RV32I-NEXT: mv s1, a1
6759; RV32I-NEXT: mv s2, a0
6760; RV32I-NEXT: lw a2, 0(a0)
6761; RV32I-NEXT: addi s3, sp, 8
6762; RV32I-NEXT: addi s4, zero, 5
6763; RV32I-NEXT: .LBB159_1: # %atomicrmw.start
6764; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
6765; RV32I-NEXT: sw a2, 8(sp)
6766; RV32I-NEXT: bltu s1, a2, .LBB159_3
6767; RV32I-NEXT: # %bb.2: # %atomicrmw.start
6768; RV32I-NEXT: # in Loop: Header=BB159_1 Depth=1
6769; RV32I-NEXT: mv a2, s1
6770; RV32I-NEXT: .LBB159_3: # %atomicrmw.start
6771; RV32I-NEXT: # in Loop: Header=BB159_1 Depth=1
6772; RV32I-NEXT: mv a0, s2
6773; RV32I-NEXT: mv a1, s3
6774; RV32I-NEXT: mv a3, s4
6775; RV32I-NEXT: mv a4, s4
6776; RV32I-NEXT: call __atomic_compare_exchange_4
6777; RV32I-NEXT: lw a2, 8(sp)
6778; RV32I-NEXT: beqz a0, .LBB159_1
6779; RV32I-NEXT: # %bb.4: # %atomicrmw.end
6780; RV32I-NEXT: mv a0, a2
6781; RV32I-NEXT: lw s4, 12(sp)
6782; RV32I-NEXT: lw s3, 16(sp)
6783; RV32I-NEXT: lw s2, 20(sp)
6784; RV32I-NEXT: lw s1, 24(sp)
6785; RV32I-NEXT: lw ra, 28(sp)
6786; RV32I-NEXT: addi sp, sp, 32
6787; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]6788;
6789; RV32IA-LABEL: atomicrmw_umax_i32_seq_cst:
6790; RV32IA: # %bb.0:
6791; RV32IA-NEXT: amomaxu.w.aqrl a0, a1, (a0)
6792; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]6793 %1 = atomicrmw umax i32* %a, i32 %b seq_cst
6794 ret i32 %1
6795}
6796
6797define i32 @atomicrmw_umin_i32_monotonic(i32 *%a, i32 %b) nounwind {
6798; RV32I-LABEL: atomicrmw_umin_i32_monotonic:
6799; RV32I: # %bb.0:
6800; RV32I-NEXT: addi sp, sp, -32
6801; RV32I-NEXT: sw ra, 28(sp)
6802; RV32I-NEXT: sw s1, 24(sp)
6803; RV32I-NEXT: sw s2, 20(sp)
6804; RV32I-NEXT: sw s3, 16(sp)
6805; RV32I-NEXT: mv s1, a1
6806; RV32I-NEXT: mv s2, a0
6807; RV32I-NEXT: lw a2, 0(a0)
6808; RV32I-NEXT: addi s3, sp, 12
6809; RV32I-NEXT: .LBB160_1: # %atomicrmw.start
6810; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
6811; RV32I-NEXT: sw a2, 12(sp)
6812; RV32I-NEXT: bgeu s1, a2, .LBB160_3
6813; RV32I-NEXT: # %bb.2: # %atomicrmw.start
6814; RV32I-NEXT: # in Loop: Header=BB160_1 Depth=1
6815; RV32I-NEXT: mv a2, s1
6816; RV32I-NEXT: .LBB160_3: # %atomicrmw.start
6817; RV32I-NEXT: # in Loop: Header=BB160_1 Depth=1
6818; RV32I-NEXT: mv a0, s2
6819; RV32I-NEXT: mv a1, s3
6820; RV32I-NEXT: mv a3, zero
6821; RV32I-NEXT: mv a4, zero
6822; RV32I-NEXT: call __atomic_compare_exchange_4
6823; RV32I-NEXT: lw a2, 12(sp)
6824; RV32I-NEXT: beqz a0, .LBB160_1
6825; RV32I-NEXT: # %bb.4: # %atomicrmw.end
6826; RV32I-NEXT: mv a0, a2
6827; RV32I-NEXT: lw s3, 16(sp)
6828; RV32I-NEXT: lw s2, 20(sp)
6829; RV32I-NEXT: lw s1, 24(sp)
6830; RV32I-NEXT: lw ra, 28(sp)
6831; RV32I-NEXT: addi sp, sp, 32
6832; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]6833;
6834; RV32IA-LABEL: atomicrmw_umin_i32_monotonic:
6835; RV32IA: # %bb.0:
6836; RV32IA-NEXT: amominu.w a0, a1, (a0)
6837; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]6838 %1 = atomicrmw umin i32* %a, i32 %b monotonic
6839 ret i32 %1
6840}
6841
6842define i32 @atomicrmw_umin_i32_acquire(i32 *%a, i32 %b) nounwind {
6843; RV32I-LABEL: atomicrmw_umin_i32_acquire:
6844; RV32I: # %bb.0:
6845; RV32I-NEXT: addi sp, sp, -32
6846; RV32I-NEXT: sw ra, 28(sp)
6847; RV32I-NEXT: sw s1, 24(sp)
6848; RV32I-NEXT: sw s2, 20(sp)
6849; RV32I-NEXT: sw s3, 16(sp)
6850; RV32I-NEXT: sw s4, 12(sp)
6851; RV32I-NEXT: mv s1, a1
6852; RV32I-NEXT: mv s2, a0
6853; RV32I-NEXT: lw a2, 0(a0)
6854; RV32I-NEXT: addi s3, sp, 8
6855; RV32I-NEXT: addi s4, zero, 2
6856; RV32I-NEXT: .LBB161_1: # %atomicrmw.start
6857; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
6858; RV32I-NEXT: sw a2, 8(sp)
6859; RV32I-NEXT: bgeu s1, a2, .LBB161_3
6860; RV32I-NEXT: # %bb.2: # %atomicrmw.start
6861; RV32I-NEXT: # in Loop: Header=BB161_1 Depth=1
6862; RV32I-NEXT: mv a2, s1
6863; RV32I-NEXT: .LBB161_3: # %atomicrmw.start
6864; RV32I-NEXT: # in Loop: Header=BB161_1 Depth=1
6865; RV32I-NEXT: mv a0, s2
6866; RV32I-NEXT: mv a1, s3
6867; RV32I-NEXT: mv a3, s4
6868; RV32I-NEXT: mv a4, s4
6869; RV32I-NEXT: call __atomic_compare_exchange_4
6870; RV32I-NEXT: lw a2, 8(sp)
6871; RV32I-NEXT: beqz a0, .LBB161_1
6872; RV32I-NEXT: # %bb.4: # %atomicrmw.end
6873; RV32I-NEXT: mv a0, a2
6874; RV32I-NEXT: lw s4, 12(sp)
6875; RV32I-NEXT: lw s3, 16(sp)
6876; RV32I-NEXT: lw s2, 20(sp)
6877; RV32I-NEXT: lw s1, 24(sp)
6878; RV32I-NEXT: lw ra, 28(sp)
6879; RV32I-NEXT: addi sp, sp, 32
6880; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]6881;
6882; RV32IA-LABEL: atomicrmw_umin_i32_acquire:
6883; RV32IA: # %bb.0:
6884; RV32IA-NEXT: amominu.w.aq a0, a1, (a0)
6885; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]6886 %1 = atomicrmw umin i32* %a, i32 %b acquire
6887 ret i32 %1
6888}
6889
6890define i32 @atomicrmw_umin_i32_release(i32 *%a, i32 %b) nounwind {
6891; RV32I-LABEL: atomicrmw_umin_i32_release:
6892; RV32I: # %bb.0:
6893; RV32I-NEXT: addi sp, sp, -32
6894; RV32I-NEXT: sw ra, 28(sp)
6895; RV32I-NEXT: sw s1, 24(sp)
6896; RV32I-NEXT: sw s2, 20(sp)
6897; RV32I-NEXT: sw s3, 16(sp)
6898; RV32I-NEXT: sw s4, 12(sp)
6899; RV32I-NEXT: mv s1, a1
6900; RV32I-NEXT: mv s2, a0
6901; RV32I-NEXT: lw a2, 0(a0)
6902; RV32I-NEXT: addi s3, sp, 8
6903; RV32I-NEXT: addi s4, zero, 3
6904; RV32I-NEXT: .LBB162_1: # %atomicrmw.start
6905; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
6906; RV32I-NEXT: sw a2, 8(sp)
6907; RV32I-NEXT: bgeu s1, a2, .LBB162_3
6908; RV32I-NEXT: # %bb.2: # %atomicrmw.start
6909; RV32I-NEXT: # in Loop: Header=BB162_1 Depth=1
6910; RV32I-NEXT: mv a2, s1
6911; RV32I-NEXT: .LBB162_3: # %atomicrmw.start
6912; RV32I-NEXT: # in Loop: Header=BB162_1 Depth=1
6913; RV32I-NEXT: mv a0, s2
6914; RV32I-NEXT: mv a1, s3
6915; RV32I-NEXT: mv a3, s4
6916; RV32I-NEXT: mv a4, zero
6917; RV32I-NEXT: call __atomic_compare_exchange_4
6918; RV32I-NEXT: lw a2, 8(sp)
6919; RV32I-NEXT: beqz a0, .LBB162_1
6920; RV32I-NEXT: # %bb.4: # %atomicrmw.end
6921; RV32I-NEXT: mv a0, a2
6922; RV32I-NEXT: lw s4, 12(sp)
6923; RV32I-NEXT: lw s3, 16(sp)
6924; RV32I-NEXT: lw s2, 20(sp)
6925; RV32I-NEXT: lw s1, 24(sp)
6926; RV32I-NEXT: lw ra, 28(sp)
6927; RV32I-NEXT: addi sp, sp, 32
6928; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]6929;
6930; RV32IA-LABEL: atomicrmw_umin_i32_release:
6931; RV32IA: # %bb.0:
6932; RV32IA-NEXT: amominu.w.rl a0, a1, (a0)
6933; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]6934 %1 = atomicrmw umin i32* %a, i32 %b release
6935 ret i32 %1
6936}
6937
6938define i32 @atomicrmw_umin_i32_acq_rel(i32 *%a, i32 %b) nounwind {
6939; RV32I-LABEL: atomicrmw_umin_i32_acq_rel:
6940; RV32I: # %bb.0:
6941; RV32I-NEXT: addi sp, sp, -32
6942; RV32I-NEXT: sw ra, 28(sp)
6943; RV32I-NEXT: sw s1, 24(sp)
6944; RV32I-NEXT: sw s2, 20(sp)
6945; RV32I-NEXT: sw s3, 16(sp)
6946; RV32I-NEXT: sw s4, 12(sp)
6947; RV32I-NEXT: sw s5, 8(sp)
6948; RV32I-NEXT: mv s1, a1
6949; RV32I-NEXT: mv s2, a0
6950; RV32I-NEXT: lw a2, 0(a0)
6951; RV32I-NEXT: addi s3, sp, 4
6952; RV32I-NEXT: addi s4, zero, 4
6953; RV32I-NEXT: addi s5, zero, 2
6954; RV32I-NEXT: .LBB163_1: # %atomicrmw.start
6955; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
6956; RV32I-NEXT: sw a2, 4(sp)
6957; RV32I-NEXT: bgeu s1, a2, .LBB163_3
6958; RV32I-NEXT: # %bb.2: # %atomicrmw.start
6959; RV32I-NEXT: # in Loop: Header=BB163_1 Depth=1
6960; RV32I-NEXT: mv a2, s1
6961; RV32I-NEXT: .LBB163_3: # %atomicrmw.start
6962; RV32I-NEXT: # in Loop: Header=BB163_1 Depth=1
6963; RV32I-NEXT: mv a0, s2
6964; RV32I-NEXT: mv a1, s3
6965; RV32I-NEXT: mv a3, s4
6966; RV32I-NEXT: mv a4, s5
6967; RV32I-NEXT: call __atomic_compare_exchange_4
6968; RV32I-NEXT: lw a2, 4(sp)
6969; RV32I-NEXT: beqz a0, .LBB163_1
6970; RV32I-NEXT: # %bb.4: # %atomicrmw.end
6971; RV32I-NEXT: mv a0, a2
6972; RV32I-NEXT: lw s5, 8(sp)
6973; RV32I-NEXT: lw s4, 12(sp)
6974; RV32I-NEXT: lw s3, 16(sp)
6975; RV32I-NEXT: lw s2, 20(sp)
6976; RV32I-NEXT: lw s1, 24(sp)
6977; RV32I-NEXT: lw ra, 28(sp)
6978; RV32I-NEXT: addi sp, sp, 32
6979; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]6980;
6981; RV32IA-LABEL: atomicrmw_umin_i32_acq_rel:
6982; RV32IA: # %bb.0:
6983; RV32IA-NEXT: amominu.w.aqrl a0, a1, (a0)
6984; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]6985 %1 = atomicrmw umin i32* %a, i32 %b acq_rel
6986 ret i32 %1
6987}
6988
6989define i32 @atomicrmw_umin_i32_seq_cst(i32 *%a, i32 %b) nounwind {
6990; RV32I-LABEL: atomicrmw_umin_i32_seq_cst:
6991; RV32I: # %bb.0:
6992; RV32I-NEXT: addi sp, sp, -32
6993; RV32I-NEXT: sw ra, 28(sp)
6994; RV32I-NEXT: sw s1, 24(sp)
6995; RV32I-NEXT: sw s2, 20(sp)
6996; RV32I-NEXT: sw s3, 16(sp)
6997; RV32I-NEXT: sw s4, 12(sp)
6998; RV32I-NEXT: mv s1, a1
6999; RV32I-NEXT: mv s2, a0
7000; RV32I-NEXT: lw a2, 0(a0)
7001; RV32I-NEXT: addi s3, sp, 8
7002; RV32I-NEXT: addi s4, zero, 5
7003; RV32I-NEXT: .LBB164_1: # %atomicrmw.start
7004; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
7005; RV32I-NEXT: sw a2, 8(sp)
7006; RV32I-NEXT: bgeu s1, a2, .LBB164_3
7007; RV32I-NEXT: # %bb.2: # %atomicrmw.start
7008; RV32I-NEXT: # in Loop: Header=BB164_1 Depth=1
7009; RV32I-NEXT: mv a2, s1
7010; RV32I-NEXT: .LBB164_3: # %atomicrmw.start
7011; RV32I-NEXT: # in Loop: Header=BB164_1 Depth=1
7012; RV32I-NEXT: mv a0, s2
7013; RV32I-NEXT: mv a1, s3
7014; RV32I-NEXT: mv a3, s4
7015; RV32I-NEXT: mv a4, s4
7016; RV32I-NEXT: call __atomic_compare_exchange_4
7017; RV32I-NEXT: lw a2, 8(sp)
7018; RV32I-NEXT: beqz a0, .LBB164_1
7019; RV32I-NEXT: # %bb.4: # %atomicrmw.end
7020; RV32I-NEXT: mv a0, a2
7021; RV32I-NEXT: lw s4, 12(sp)
7022; RV32I-NEXT: lw s3, 16(sp)
7023; RV32I-NEXT: lw s2, 20(sp)
7024; RV32I-NEXT: lw s1, 24(sp)
7025; RV32I-NEXT: lw ra, 28(sp)
7026; RV32I-NEXT: addi sp, sp, 32
7027; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]7028;
7029; RV32IA-LABEL: atomicrmw_umin_i32_seq_cst:
7030; RV32IA: # %bb.0:
7031; RV32IA-NEXT: amominu.w.aqrl a0, a1, (a0)
7032; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]7033 %1 = atomicrmw umin i32* %a, i32 %b seq_cst
7034 ret i32 %1
7035}
7036
7037define i64 @atomicrmw_xchg_i64_monotonic(i64* %a, i64 %b) {
7038; RV32I-LABEL: atomicrmw_xchg_i64_monotonic:
7039; RV32I: # %bb.0:
7040; RV32I-NEXT: addi sp, sp, -16
7041; RV32I-NEXT: sw ra, 12(sp)
7042; RV32I-NEXT: mv a3, zero
7043; RV32I-NEXT: call __atomic_exchange_8
7044; RV32I-NEXT: lw ra, 12(sp)
7045; RV32I-NEXT: addi sp, sp, 16
7046; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]7047;
7048; RV32IA-LABEL: atomicrmw_xchg_i64_monotonic:
7049; RV32IA: # %bb.0:
7050; RV32IA-NEXT: addi sp, sp, -16
7051; RV32IA-NEXT: sw ra, 12(sp)
7052; RV32IA-NEXT: mv a3, zero
7053; RV32IA-NEXT: call __atomic_exchange_8
7054; RV32IA-NEXT: lw ra, 12(sp)
7055; RV32IA-NEXT: addi sp, sp, 16
7056; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]7057 %1 = atomicrmw xchg i64* %a, i64 %b monotonic
7058 ret i64 %1
7059}
7060
7061define i64 @atomicrmw_xchg_i64_acquire(i64* %a, i64 %b) {
7062; RV32I-LABEL: atomicrmw_xchg_i64_acquire:
7063; RV32I: # %bb.0:
7064; RV32I-NEXT: addi sp, sp, -16
7065; RV32I-NEXT: sw ra, 12(sp)
7066; RV32I-NEXT: addi a3, zero, 2
7067; RV32I-NEXT: call __atomic_exchange_8
7068; RV32I-NEXT: lw ra, 12(sp)
7069; RV32I-NEXT: addi sp, sp, 16
7070; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]7071;
7072; RV32IA-LABEL: atomicrmw_xchg_i64_acquire:
7073; RV32IA: # %bb.0:
7074; RV32IA-NEXT: addi sp, sp, -16
7075; RV32IA-NEXT: sw ra, 12(sp)
7076; RV32IA-NEXT: addi a3, zero, 2
7077; RV32IA-NEXT: call __atomic_exchange_8
7078; RV32IA-NEXT: lw ra, 12(sp)
7079; RV32IA-NEXT: addi sp, sp, 16
7080; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]7081 %1 = atomicrmw xchg i64* %a, i64 %b acquire
7082 ret i64 %1
7083}
7084
7085define i64 @atomicrmw_xchg_i64_release(i64* %a, i64 %b) {
7086; RV32I-LABEL: atomicrmw_xchg_i64_release:
7087; RV32I: # %bb.0:
7088; RV32I-NEXT: addi sp, sp, -16
7089; RV32I-NEXT: sw ra, 12(sp)
7090; RV32I-NEXT: addi a3, zero, 3
7091; RV32I-NEXT: call __atomic_exchange_8
7092; RV32I-NEXT: lw ra, 12(sp)
7093; RV32I-NEXT: addi sp, sp, 16
7094; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]7095;
7096; RV32IA-LABEL: atomicrmw_xchg_i64_release:
7097; RV32IA: # %bb.0:
7098; RV32IA-NEXT: addi sp, sp, -16
7099; RV32IA-NEXT: sw ra, 12(sp)
7100; RV32IA-NEXT: addi a3, zero, 3
7101; RV32IA-NEXT: call __atomic_exchange_8
7102; RV32IA-NEXT: lw ra, 12(sp)
7103; RV32IA-NEXT: addi sp, sp, 16
7104; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]7105 %1 = atomicrmw xchg i64* %a, i64 %b release
7106 ret i64 %1
7107}
7108
7109define i64 @atomicrmw_xchg_i64_acq_rel(i64* %a, i64 %b) {
7110; RV32I-LABEL: atomicrmw_xchg_i64_acq_rel:
7111; RV32I: # %bb.0:
7112; RV32I-NEXT: addi sp, sp, -16
7113; RV32I-NEXT: sw ra, 12(sp)
7114; RV32I-NEXT: addi a3, zero, 4
7115; RV32I-NEXT: call __atomic_exchange_8
7116; RV32I-NEXT: lw ra, 12(sp)
7117; RV32I-NEXT: addi sp, sp, 16
7118; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]7119;
7120; RV32IA-LABEL: atomicrmw_xchg_i64_acq_rel:
7121; RV32IA: # %bb.0:
7122; RV32IA-NEXT: addi sp, sp, -16
7123; RV32IA-NEXT: sw ra, 12(sp)
7124; RV32IA-NEXT: addi a3, zero, 4
7125; RV32IA-NEXT: call __atomic_exchange_8
7126; RV32IA-NEXT: lw ra, 12(sp)
7127; RV32IA-NEXT: addi sp, sp, 16
7128; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]7129 %1 = atomicrmw xchg i64* %a, i64 %b acq_rel
7130 ret i64 %1
7131}
7132
7133define i64 @atomicrmw_xchg_i64_seq_cst(i64* %a, i64 %b) {
7134; RV32I-LABEL: atomicrmw_xchg_i64_seq_cst:
7135; RV32I: # %bb.0:
7136; RV32I-NEXT: addi sp, sp, -16
7137; RV32I-NEXT: sw ra, 12(sp)
7138; RV32I-NEXT: addi a3, zero, 5
7139; RV32I-NEXT: call __atomic_exchange_8
7140; RV32I-NEXT: lw ra, 12(sp)
7141; RV32I-NEXT: addi sp, sp, 16
7142; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]7143;
7144; RV32IA-LABEL: atomicrmw_xchg_i64_seq_cst:
7145; RV32IA: # %bb.0:
7146; RV32IA-NEXT: addi sp, sp, -16
7147; RV32IA-NEXT: sw ra, 12(sp)
7148; RV32IA-NEXT: addi a3, zero, 5
7149; RV32IA-NEXT: call __atomic_exchange_8
7150; RV32IA-NEXT: lw ra, 12(sp)
7151; RV32IA-NEXT: addi sp, sp, 16
7152; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]7153 %1 = atomicrmw xchg i64* %a, i64 %b seq_cst
7154 ret i64 %1
7155}
7156
7157define i64 @atomicrmw_add_i64_monotonic(i64 *%a, i64 %b) nounwind {
7158; RV32I-LABEL: atomicrmw_add_i64_monotonic:
7159; RV32I: # %bb.0:
7160; RV32I-NEXT: addi sp, sp, -16
7161; RV32I-NEXT: sw ra, 12(sp)
7162; RV32I-NEXT: mv a3, zero
7163; RV32I-NEXT: call __atomic_fetch_add_8
7164; RV32I-NEXT: lw ra, 12(sp)
7165; RV32I-NEXT: addi sp, sp, 16
7166; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]7167;
7168; RV32IA-LABEL: atomicrmw_add_i64_monotonic:
7169; RV32IA: # %bb.0:
7170; RV32IA-NEXT: addi sp, sp, -16
7171; RV32IA-NEXT: sw ra, 12(sp)
7172; RV32IA-NEXT: mv a3, zero
7173; RV32IA-NEXT: call __atomic_fetch_add_8
7174; RV32IA-NEXT: lw ra, 12(sp)
7175; RV32IA-NEXT: addi sp, sp, 16
7176; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]7177 %1 = atomicrmw add i64* %a, i64 %b monotonic
7178 ret i64 %1
7179}
7180
7181define i64 @atomicrmw_add_i64_acquire(i64 *%a, i64 %b) nounwind {
7182; RV32I-LABEL: atomicrmw_add_i64_acquire:
7183; RV32I: # %bb.0:
7184; RV32I-NEXT: addi sp, sp, -16
7185; RV32I-NEXT: sw ra, 12(sp)
7186; RV32I-NEXT: addi a3, zero, 2
7187; RV32I-NEXT: call __atomic_fetch_add_8
7188; RV32I-NEXT: lw ra, 12(sp)
7189; RV32I-NEXT: addi sp, sp, 16
7190; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]7191;
7192; RV32IA-LABEL: atomicrmw_add_i64_acquire:
7193; RV32IA: # %bb.0:
7194; RV32IA-NEXT: addi sp, sp, -16
7195; RV32IA-NEXT: sw ra, 12(sp)
7196; RV32IA-NEXT: addi a3, zero, 2
7197; RV32IA-NEXT: call __atomic_fetch_add_8
7198; RV32IA-NEXT: lw ra, 12(sp)
7199; RV32IA-NEXT: addi sp, sp, 16
7200; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]7201 %1 = atomicrmw add i64* %a, i64 %b acquire
7202 ret i64 %1
7203}
7204
7205define i64 @atomicrmw_add_i64_release(i64 *%a, i64 %b) nounwind {
7206; RV32I-LABEL: atomicrmw_add_i64_release:
7207; RV32I: # %bb.0:
7208; RV32I-NEXT: addi sp, sp, -16
7209; RV32I-NEXT: sw ra, 12(sp)
7210; RV32I-NEXT: addi a3, zero, 3
7211; RV32I-NEXT: call __atomic_fetch_add_8
7212; RV32I-NEXT: lw ra, 12(sp)
7213; RV32I-NEXT: addi sp, sp, 16
7214; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]7215;
7216; RV32IA-LABEL: atomicrmw_add_i64_release:
7217; RV32IA: # %bb.0:
7218; RV32IA-NEXT: addi sp, sp, -16
7219; RV32IA-NEXT: sw ra, 12(sp)
7220; RV32IA-NEXT: addi a3, zero, 3
7221; RV32IA-NEXT: call __atomic_fetch_add_8
7222; RV32IA-NEXT: lw ra, 12(sp)
7223; RV32IA-NEXT: addi sp, sp, 16
7224; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]7225 %1 = atomicrmw add i64* %a, i64 %b release
7226 ret i64 %1
7227}
7228
7229define i64 @atomicrmw_add_i64_acq_rel(i64 *%a, i64 %b) nounwind {
7230; RV32I-LABEL: atomicrmw_add_i64_acq_rel:
7231; RV32I: # %bb.0:
7232; RV32I-NEXT: addi sp, sp, -16
7233; RV32I-NEXT: sw ra, 12(sp)
7234; RV32I-NEXT: addi a3, zero, 4
7235; RV32I-NEXT: call __atomic_fetch_add_8
7236; RV32I-NEXT: lw ra, 12(sp)
7237; RV32I-NEXT: addi sp, sp, 16
7238; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]7239;
7240; RV32IA-LABEL: atomicrmw_add_i64_acq_rel:
7241; RV32IA: # %bb.0:
7242; RV32IA-NEXT: addi sp, sp, -16
7243; RV32IA-NEXT: sw ra, 12(sp)
7244; RV32IA-NEXT: addi a3, zero, 4
7245; RV32IA-NEXT: call __atomic_fetch_add_8
7246; RV32IA-NEXT: lw ra, 12(sp)
7247; RV32IA-NEXT: addi sp, sp, 16
7248; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]7249 %1 = atomicrmw add i64* %a, i64 %b acq_rel
7250 ret i64 %1
7251}
7252
7253define i64 @atomicrmw_add_i64_seq_cst(i64 *%a, i64 %b) nounwind {
7254; RV32I-LABEL: atomicrmw_add_i64_seq_cst:
7255; RV32I: # %bb.0:
7256; RV32I-NEXT: addi sp, sp, -16
7257; RV32I-NEXT: sw ra, 12(sp)
7258; RV32I-NEXT: addi a3, zero, 5
7259; RV32I-NEXT: call __atomic_fetch_add_8
7260; RV32I-NEXT: lw ra, 12(sp)
7261; RV32I-NEXT: addi sp, sp, 16
7262; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]7263;
7264; RV32IA-LABEL: atomicrmw_add_i64_seq_cst:
7265; RV32IA: # %bb.0:
7266; RV32IA-NEXT: addi sp, sp, -16
7267; RV32IA-NEXT: sw ra, 12(sp)
7268; RV32IA-NEXT: addi a3, zero, 5
7269; RV32IA-NEXT: call __atomic_fetch_add_8
7270; RV32IA-NEXT: lw ra, 12(sp)
7271; RV32IA-NEXT: addi sp, sp, 16
7272; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]7273 %1 = atomicrmw add i64* %a, i64 %b seq_cst
7274 ret i64 %1
7275}
7276
7277define i64 @atomicrmw_sub_i64_monotonic(i64* %a, i64 %b) {
7278; RV32I-LABEL: atomicrmw_sub_i64_monotonic:
7279; RV32I: # %bb.0:
7280; RV32I-NEXT: addi sp, sp, -16
7281; RV32I-NEXT: sw ra, 12(sp)
7282; RV32I-NEXT: mv a3, zero
7283; RV32I-NEXT: call __atomic_fetch_sub_8
7284; RV32I-NEXT: lw ra, 12(sp)
7285; RV32I-NEXT: addi sp, sp, 16
7286; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]7287;
7288; RV32IA-LABEL: atomicrmw_sub_i64_monotonic:
7289; RV32IA: # %bb.0:
7290; RV32IA-NEXT: addi sp, sp, -16
7291; RV32IA-NEXT: sw ra, 12(sp)
7292; RV32IA-NEXT: mv a3, zero
7293; RV32IA-NEXT: call __atomic_fetch_sub_8
7294; RV32IA-NEXT: lw ra, 12(sp)
7295; RV32IA-NEXT: addi sp, sp, 16
7296; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]7297 %1 = atomicrmw sub i64* %a, i64 %b monotonic
7298 ret i64 %1
7299}
7300
7301define i64 @atomicrmw_sub_i64_acquire(i64* %a, i64 %b) {
7302; RV32I-LABEL: atomicrmw_sub_i64_acquire:
7303; RV32I: # %bb.0:
7304; RV32I-NEXT: addi sp, sp, -16
7305; RV32I-NEXT: sw ra, 12(sp)
7306; RV32I-NEXT: addi a3, zero, 2
7307; RV32I-NEXT: call __atomic_fetch_sub_8
7308; RV32I-NEXT: lw ra, 12(sp)
7309; RV32I-NEXT: addi sp, sp, 16
7310; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]7311;
7312; RV32IA-LABEL: atomicrmw_sub_i64_acquire:
7313; RV32IA: # %bb.0:
7314; RV32IA-NEXT: addi sp, sp, -16
7315; RV32IA-NEXT: sw ra, 12(sp)
7316; RV32IA-NEXT: addi a3, zero, 2
7317; RV32IA-NEXT: call __atomic_fetch_sub_8
7318; RV32IA-NEXT: lw ra, 12(sp)
7319; RV32IA-NEXT: addi sp, sp, 16
7320; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]7321 %1 = atomicrmw sub i64* %a, i64 %b acquire
7322 ret i64 %1
7323}
7324
7325define i64 @atomicrmw_sub_i64_release(i64* %a, i64 %b) {
7326; RV32I-LABEL: atomicrmw_sub_i64_release:
7327; RV32I: # %bb.0:
7328; RV32I-NEXT: addi sp, sp, -16
7329; RV32I-NEXT: sw ra, 12(sp)
7330; RV32I-NEXT: addi a3, zero, 3
7331; RV32I-NEXT: call __atomic_fetch_sub_8
7332; RV32I-NEXT: lw ra, 12(sp)
7333; RV32I-NEXT: addi sp, sp, 16
7334; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]7335;
7336; RV32IA-LABEL: atomicrmw_sub_i64_release:
7337; RV32IA: # %bb.0:
7338; RV32IA-NEXT: addi sp, sp, -16
7339; RV32IA-NEXT: sw ra, 12(sp)
7340; RV32IA-NEXT: addi a3, zero, 3
7341; RV32IA-NEXT: call __atomic_fetch_sub_8
7342; RV32IA-NEXT: lw ra, 12(sp)
7343; RV32IA-NEXT: addi sp, sp, 16
7344; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]7345 %1 = atomicrmw sub i64* %a, i64 %b release
7346 ret i64 %1
7347}
7348
7349define i64 @atomicrmw_sub_i64_acq_rel(i64* %a, i64 %b) {
7350; RV32I-LABEL: atomicrmw_sub_i64_acq_rel:
7351; RV32I: # %bb.0:
7352; RV32I-NEXT: addi sp, sp, -16
7353; RV32I-NEXT: sw ra, 12(sp)
7354; RV32I-NEXT: addi a3, zero, 4
7355; RV32I-NEXT: call __atomic_fetch_sub_8
7356; RV32I-NEXT: lw ra, 12(sp)
7357; RV32I-NEXT: addi sp, sp, 16
7358; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]7359;
7360; RV32IA-LABEL: atomicrmw_sub_i64_acq_rel:
7361; RV32IA: # %bb.0:
7362; RV32IA-NEXT: addi sp, sp, -16
7363; RV32IA-NEXT: sw ra, 12(sp)
7364; RV32IA-NEXT: addi a3, zero, 4
7365; RV32IA-NEXT: call __atomic_fetch_sub_8
7366; RV32IA-NEXT: lw ra, 12(sp)
7367; RV32IA-NEXT: addi sp, sp, 16
7368; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]7369 %1 = atomicrmw sub i64* %a, i64 %b acq_rel
7370 ret i64 %1
7371}
7372
7373define i64 @atomicrmw_sub_i64_seq_cst(i64* %a, i64 %b) {
7374; RV32I-LABEL: atomicrmw_sub_i64_seq_cst:
7375; RV32I: # %bb.0:
7376; RV32I-NEXT: addi sp, sp, -16
7377; RV32I-NEXT: sw ra, 12(sp)
7378; RV32I-NEXT: addi a3, zero, 5
7379; RV32I-NEXT: call __atomic_fetch_sub_8
7380; RV32I-NEXT: lw ra, 12(sp)
7381; RV32I-NEXT: addi sp, sp, 16
7382; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]7383;
7384; RV32IA-LABEL: atomicrmw_sub_i64_seq_cst:
7385; RV32IA: # %bb.0:
7386; RV32IA-NEXT: addi sp, sp, -16
7387; RV32IA-NEXT: sw ra, 12(sp)
7388; RV32IA-NEXT: addi a3, zero, 5
7389; RV32IA-NEXT: call __atomic_fetch_sub_8
7390; RV32IA-NEXT: lw ra, 12(sp)
7391; RV32IA-NEXT: addi sp, sp, 16
7392; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]7393 %1 = atomicrmw sub i64* %a, i64 %b seq_cst
7394 ret i64 %1
7395}
7396
7397define i64 @atomicrmw_and_i64_monotonic(i64 *%a, i64 %b) nounwind {
7398; RV32I-LABEL: atomicrmw_and_i64_monotonic:
7399; RV32I: # %bb.0:
7400; RV32I-NEXT: addi sp, sp, -16
7401; RV32I-NEXT: sw ra, 12(sp)
7402; RV32I-NEXT: mv a3, zero
7403; RV32I-NEXT: call __atomic_fetch_and_8
7404; RV32I-NEXT: lw ra, 12(sp)
7405; RV32I-NEXT: addi sp, sp, 16
7406; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]7407;
7408; RV32IA-LABEL: atomicrmw_and_i64_monotonic:
7409; RV32IA: # %bb.0:
7410; RV32IA-NEXT: addi sp, sp, -16
7411; RV32IA-NEXT: sw ra, 12(sp)
7412; RV32IA-NEXT: mv a3, zero
7413; RV32IA-NEXT: call __atomic_fetch_and_8
7414; RV32IA-NEXT: lw ra, 12(sp)
7415; RV32IA-NEXT: addi sp, sp, 16
7416; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]7417 %1 = atomicrmw and i64* %a, i64 %b monotonic
7418 ret i64 %1
7419}
7420
7421define i64 @atomicrmw_and_i64_acquire(i64 *%a, i64 %b) nounwind {
7422; RV32I-LABEL: atomicrmw_and_i64_acquire:
7423; RV32I: # %bb.0:
7424; RV32I-NEXT: addi sp, sp, -16
7425; RV32I-NEXT: sw ra, 12(sp)
7426; RV32I-NEXT: addi a3, zero, 2
7427; RV32I-NEXT: call __atomic_fetch_and_8
7428; RV32I-NEXT: lw ra, 12(sp)
7429; RV32I-NEXT: addi sp, sp, 16
7430; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]7431;
7432; RV32IA-LABEL: atomicrmw_and_i64_acquire:
7433; RV32IA: # %bb.0:
7434; RV32IA-NEXT: addi sp, sp, -16
7435; RV32IA-NEXT: sw ra, 12(sp)
7436; RV32IA-NEXT: addi a3, zero, 2
7437; RV32IA-NEXT: call __atomic_fetch_and_8
7438; RV32IA-NEXT: lw ra, 12(sp)
7439; RV32IA-NEXT: addi sp, sp, 16
7440; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]7441 %1 = atomicrmw and i64* %a, i64 %b acquire
7442 ret i64 %1
7443}
7444
7445define i64 @atomicrmw_and_i64_release(i64 *%a, i64 %b) nounwind {
7446; RV32I-LABEL: atomicrmw_and_i64_release:
7447; RV32I: # %bb.0:
7448; RV32I-NEXT: addi sp, sp, -16
7449; RV32I-NEXT: sw ra, 12(sp)
7450; RV32I-NEXT: addi a3, zero, 3
7451; RV32I-NEXT: call __atomic_fetch_and_8
7452; RV32I-NEXT: lw ra, 12(sp)
7453; RV32I-NEXT: addi sp, sp, 16
7454; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]7455;
7456; RV32IA-LABEL: atomicrmw_and_i64_release:
7457; RV32IA: # %bb.0:
7458; RV32IA-NEXT: addi sp, sp, -16
7459; RV32IA-NEXT: sw ra, 12(sp)
7460; RV32IA-NEXT: addi a3, zero, 3
7461; RV32IA-NEXT: call __atomic_fetch_and_8
7462; RV32IA-NEXT: lw ra, 12(sp)
7463; RV32IA-NEXT: addi sp, sp, 16
7464; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]7465 %1 = atomicrmw and i64* %a, i64 %b release
7466 ret i64 %1
7467}
7468
7469define i64 @atomicrmw_and_i64_acq_rel(i64 *%a, i64 %b) nounwind {
7470; RV32I-LABEL: atomicrmw_and_i64_acq_rel:
7471; RV32I: # %bb.0:
7472; RV32I-NEXT: addi sp, sp, -16
7473; RV32I-NEXT: sw ra, 12(sp)
7474; RV32I-NEXT: addi a3, zero, 4
7475; RV32I-NEXT: call __atomic_fetch_and_8
7476; RV32I-NEXT: lw ra, 12(sp)
7477; RV32I-NEXT: addi sp, sp, 16
7478; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]7479;
7480; RV32IA-LABEL: atomicrmw_and_i64_acq_rel:
7481; RV32IA: # %bb.0:
7482; RV32IA-NEXT: addi sp, sp, -16
7483; RV32IA-NEXT: sw ra, 12(sp)
7484; RV32IA-NEXT: addi a3, zero, 4
7485; RV32IA-NEXT: call __atomic_fetch_and_8
7486; RV32IA-NEXT: lw ra, 12(sp)
7487; RV32IA-NEXT: addi sp, sp, 16
7488; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]7489 %1 = atomicrmw and i64* %a, i64 %b acq_rel
7490 ret i64 %1
7491}
7492
7493define i64 @atomicrmw_and_i64_seq_cst(i64 *%a, i64 %b) nounwind {
7494; RV32I-LABEL: atomicrmw_and_i64_seq_cst:
7495; RV32I: # %bb.0:
7496; RV32I-NEXT: addi sp, sp, -16
7497; RV32I-NEXT: sw ra, 12(sp)
7498; RV32I-NEXT: addi a3, zero, 5
7499; RV32I-NEXT: call __atomic_fetch_and_8
7500; RV32I-NEXT: lw ra, 12(sp)
7501; RV32I-NEXT: addi sp, sp, 16
7502; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]7503;
7504; RV32IA-LABEL: atomicrmw_and_i64_seq_cst:
7505; RV32IA: # %bb.0:
7506; RV32IA-NEXT: addi sp, sp, -16
7507; RV32IA-NEXT: sw ra, 12(sp)
7508; RV32IA-NEXT: addi a3, zero, 5
7509; RV32IA-NEXT: call __atomic_fetch_and_8
7510; RV32IA-NEXT: lw ra, 12(sp)
7511; RV32IA-NEXT: addi sp, sp, 16
7512; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]7513 %1 = atomicrmw and i64* %a, i64 %b seq_cst
7514 ret i64 %1
7515}
7516
7517define i64 @atomicrmw_nand_i64_monotonic(i64* %a, i64 %b) {
7518; RV32I-LABEL: atomicrmw_nand_i64_monotonic:
7519; RV32I: # %bb.0:
7520; RV32I-NEXT: addi sp, sp, -16
7521; RV32I-NEXT: sw ra, 12(sp)
7522; RV32I-NEXT: mv a3, zero
7523; RV32I-NEXT: call __atomic_fetch_nand_8
7524; RV32I-NEXT: lw ra, 12(sp)
7525; RV32I-NEXT: addi sp, sp, 16
7526; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]7527;
7528; RV32IA-LABEL: atomicrmw_nand_i64_monotonic:
7529; RV32IA: # %bb.0:
7530; RV32IA-NEXT: addi sp, sp, -16
7531; RV32IA-NEXT: sw ra, 12(sp)
7532; RV32IA-NEXT: mv a3, zero
7533; RV32IA-NEXT: call __atomic_fetch_nand_8
7534; RV32IA-NEXT: lw ra, 12(sp)
7535; RV32IA-NEXT: addi sp, sp, 16
7536; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]7537 %1 = atomicrmw nand i64* %a, i64 %b monotonic
7538 ret i64 %1
7539}
7540
7541define i64 @atomicrmw_nand_i64_acquire(i64* %a, i64 %b) {
7542; RV32I-LABEL: atomicrmw_nand_i64_acquire:
7543; RV32I: # %bb.0:
7544; RV32I-NEXT: addi sp, sp, -16
7545; RV32I-NEXT: sw ra, 12(sp)
7546; RV32I-NEXT: addi a3, zero, 2
7547; RV32I-NEXT: call __atomic_fetch_nand_8
7548; RV32I-NEXT: lw ra, 12(sp)
7549; RV32I-NEXT: addi sp, sp, 16
7550; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]7551;
7552; RV32IA-LABEL: atomicrmw_nand_i64_acquire:
7553; RV32IA: # %bb.0:
7554; RV32IA-NEXT: addi sp, sp, -16
7555; RV32IA-NEXT: sw ra, 12(sp)
7556; RV32IA-NEXT: addi a3, zero, 2
7557; RV32IA-NEXT: call __atomic_fetch_nand_8
7558; RV32IA-NEXT: lw ra, 12(sp)
7559; RV32IA-NEXT: addi sp, sp, 16
7560; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]7561 %1 = atomicrmw nand i64* %a, i64 %b acquire
7562 ret i64 %1
7563}
7564
7565define i64 @atomicrmw_nand_i64_release(i64* %a, i64 %b) {
7566; RV32I-LABEL: atomicrmw_nand_i64_release:
7567; RV32I: # %bb.0:
7568; RV32I-NEXT: addi sp, sp, -16
7569; RV32I-NEXT: sw ra, 12(sp)
7570; RV32I-NEXT: addi a3, zero, 3
7571; RV32I-NEXT: call __atomic_fetch_nand_8
7572; RV32I-NEXT: lw ra, 12(sp)
7573; RV32I-NEXT: addi sp, sp, 16
7574; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]7575;
7576; RV32IA-LABEL: atomicrmw_nand_i64_release:
7577; RV32IA: # %bb.0:
7578; RV32IA-NEXT: addi sp, sp, -16
7579; RV32IA-NEXT: sw ra, 12(sp)
7580; RV32IA-NEXT: addi a3, zero, 3
7581; RV32IA-NEXT: call __atomic_fetch_nand_8
7582; RV32IA-NEXT: lw ra, 12(sp)
7583; RV32IA-NEXT: addi sp, sp, 16
7584; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]7585 %1 = atomicrmw nand i64* %a, i64 %b release
7586 ret i64 %1
7587}
7588
7589define i64 @atomicrmw_nand_i64_acq_rel(i64* %a, i64 %b) {
7590; RV32I-LABEL: atomicrmw_nand_i64_acq_rel:
7591; RV32I: # %bb.0:
7592; RV32I-NEXT: addi sp, sp, -16
7593; RV32I-NEXT: sw ra, 12(sp)
7594; RV32I-NEXT: addi a3, zero, 4
7595; RV32I-NEXT: call __atomic_fetch_nand_8
7596; RV32I-NEXT: lw ra, 12(sp)
7597; RV32I-NEXT: addi sp, sp, 16
7598; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]7599;
7600; RV32IA-LABEL: atomicrmw_nand_i64_acq_rel:
7601; RV32IA: # %bb.0:
7602; RV32IA-NEXT: addi sp, sp, -16
7603; RV32IA-NEXT: sw ra, 12(sp)
7604; RV32IA-NEXT: addi a3, zero, 4
7605; RV32IA-NEXT: call __atomic_fetch_nand_8
7606; RV32IA-NEXT: lw ra, 12(sp)
7607; RV32IA-NEXT: addi sp, sp, 16
7608; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]7609 %1 = atomicrmw nand i64* %a, i64 %b acq_rel
7610 ret i64 %1
7611}
7612
7613define i64 @atomicrmw_nand_i64_seq_cst(i64* %a, i64 %b) {
7614; RV32I-LABEL: atomicrmw_nand_i64_seq_cst:
7615; RV32I: # %bb.0:
7616; RV32I-NEXT: addi sp, sp, -16
7617; RV32I-NEXT: sw ra, 12(sp)
7618; RV32I-NEXT: addi a3, zero, 5
7619; RV32I-NEXT: call __atomic_fetch_nand_8
7620; RV32I-NEXT: lw ra, 12(sp)
7621; RV32I-NEXT: addi sp, sp, 16
7622; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]7623;
7624; RV32IA-LABEL: atomicrmw_nand_i64_seq_cst:
7625; RV32IA: # %bb.0:
7626; RV32IA-NEXT: addi sp, sp, -16
7627; RV32IA-NEXT: sw ra, 12(sp)
7628; RV32IA-NEXT: addi a3, zero, 5
7629; RV32IA-NEXT: call __atomic_fetch_nand_8
7630; RV32IA-NEXT: lw ra, 12(sp)
7631; RV32IA-NEXT: addi sp, sp, 16
7632; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]7633 %1 = atomicrmw nand i64* %a, i64 %b seq_cst
7634 ret i64 %1
7635}
7636
7637define i64 @atomicrmw_or_i64_monotonic(i64 *%a, i64 %b) nounwind {
7638; RV32I-LABEL: atomicrmw_or_i64_monotonic:
7639; RV32I: # %bb.0:
7640; RV32I-NEXT: addi sp, sp, -16
7641; RV32I-NEXT: sw ra, 12(sp)
7642; RV32I-NEXT: mv a3, zero
7643; RV32I-NEXT: call __atomic_fetch_or_8
7644; RV32I-NEXT: lw ra, 12(sp)
7645; RV32I-NEXT: addi sp, sp, 16
7646; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]7647;
7648; RV32IA-LABEL: atomicrmw_or_i64_monotonic:
7649; RV32IA: # %bb.0:
7650; RV32IA-NEXT: addi sp, sp, -16
7651; RV32IA-NEXT: sw ra, 12(sp)
7652; RV32IA-NEXT: mv a3, zero
7653; RV32IA-NEXT: call __atomic_fetch_or_8
7654; RV32IA-NEXT: lw ra, 12(sp)
7655; RV32IA-NEXT: addi sp, sp, 16
7656; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]7657 %1 = atomicrmw or i64* %a, i64 %b monotonic
7658 ret i64 %1
7659}
7660
7661define i64 @atomicrmw_or_i64_acquire(i64 *%a, i64 %b) nounwind {
7662; RV32I-LABEL: atomicrmw_or_i64_acquire:
7663; RV32I: # %bb.0:
7664; RV32I-NEXT: addi sp, sp, -16
7665; RV32I-NEXT: sw ra, 12(sp)
7666; RV32I-NEXT: addi a3, zero, 2
7667; RV32I-NEXT: call __atomic_fetch_or_8
7668; RV32I-NEXT: lw ra, 12(sp)
7669; RV32I-NEXT: addi sp, sp, 16
7670; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]7671;
7672; RV32IA-LABEL: atomicrmw_or_i64_acquire:
7673; RV32IA: # %bb.0:
7674; RV32IA-NEXT: addi sp, sp, -16
7675; RV32IA-NEXT: sw ra, 12(sp)
7676; RV32IA-NEXT: addi a3, zero, 2
7677; RV32IA-NEXT: call __atomic_fetch_or_8
7678; RV32IA-NEXT: lw ra, 12(sp)
7679; RV32IA-NEXT: addi sp, sp, 16
7680; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]7681 %1 = atomicrmw or i64* %a, i64 %b acquire
7682 ret i64 %1
7683}
7684
7685define i64 @atomicrmw_or_i64_release(i64 *%a, i64 %b) nounwind {
7686; RV32I-LABEL: atomicrmw_or_i64_release:
7687; RV32I: # %bb.0:
7688; RV32I-NEXT: addi sp, sp, -16
7689; RV32I-NEXT: sw ra, 12(sp)
7690; RV32I-NEXT: addi a3, zero, 3
7691; RV32I-NEXT: call __atomic_fetch_or_8
7692; RV32I-NEXT: lw ra, 12(sp)
7693; RV32I-NEXT: addi sp, sp, 16
7694; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]7695;
7696; RV32IA-LABEL: atomicrmw_or_i64_release:
7697; RV32IA: # %bb.0:
7698; RV32IA-NEXT: addi sp, sp, -16
7699; RV32IA-NEXT: sw ra, 12(sp)
7700; RV32IA-NEXT: addi a3, zero, 3
7701; RV32IA-NEXT: call __atomic_fetch_or_8
7702; RV32IA-NEXT: lw ra, 12(sp)
7703; RV32IA-NEXT: addi sp, sp, 16
7704; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]7705 %1 = atomicrmw or i64* %a, i64 %b release
7706 ret i64 %1
7707}
7708
7709define i64 @atomicrmw_or_i64_acq_rel(i64 *%a, i64 %b) nounwind {
7710; RV32I-LABEL: atomicrmw_or_i64_acq_rel:
7711; RV32I: # %bb.0:
7712; RV32I-NEXT: addi sp, sp, -16
7713; RV32I-NEXT: sw ra, 12(sp)
7714; RV32I-NEXT: addi a3, zero, 4
7715; RV32I-NEXT: call __atomic_fetch_or_8
7716; RV32I-NEXT: lw ra, 12(sp)
7717; RV32I-NEXT: addi sp, sp, 16
7718; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]7719;
7720; RV32IA-LABEL: atomicrmw_or_i64_acq_rel:
7721; RV32IA: # %bb.0:
7722; RV32IA-NEXT: addi sp, sp, -16
7723; RV32IA-NEXT: sw ra, 12(sp)
7724; RV32IA-NEXT: addi a3, zero, 4
7725; RV32IA-NEXT: call __atomic_fetch_or_8
7726; RV32IA-NEXT: lw ra, 12(sp)
7727; RV32IA-NEXT: addi sp, sp, 16
7728; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]7729 %1 = atomicrmw or i64* %a, i64 %b acq_rel
7730 ret i64 %1
7731}
7732
7733define i64 @atomicrmw_or_i64_seq_cst(i64 *%a, i64 %b) nounwind {
7734; RV32I-LABEL: atomicrmw_or_i64_seq_cst:
7735; RV32I: # %bb.0:
7736; RV32I-NEXT: addi sp, sp, -16
7737; RV32I-NEXT: sw ra, 12(sp)
7738; RV32I-NEXT: addi a3, zero, 5
7739; RV32I-NEXT: call __atomic_fetch_or_8
7740; RV32I-NEXT: lw ra, 12(sp)
7741; RV32I-NEXT: addi sp, sp, 16
7742; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]7743;
7744; RV32IA-LABEL: atomicrmw_or_i64_seq_cst:
7745; RV32IA: # %bb.0:
7746; RV32IA-NEXT: addi sp, sp, -16
7747; RV32IA-NEXT: sw ra, 12(sp)
7748; RV32IA-NEXT: addi a3, zero, 5
7749; RV32IA-NEXT: call __atomic_fetch_or_8
7750; RV32IA-NEXT: lw ra, 12(sp)
7751; RV32IA-NEXT: addi sp, sp, 16
7752; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]7753 %1 = atomicrmw or i64* %a, i64 %b seq_cst
7754 ret i64 %1
7755}
7756
7757define i64 @atomicrmw_xor_i64_monotonic(i64 *%a, i64 %b) nounwind {
7758; RV32I-LABEL: atomicrmw_xor_i64_monotonic:
7759; RV32I: # %bb.0:
7760; RV32I-NEXT: addi sp, sp, -16
7761; RV32I-NEXT: sw ra, 12(sp)
7762; RV32I-NEXT: mv a3, zero
7763; RV32I-NEXT: call __atomic_fetch_xor_8
7764; RV32I-NEXT: lw ra, 12(sp)
7765; RV32I-NEXT: addi sp, sp, 16
7766; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]7767;
7768; RV32IA-LABEL: atomicrmw_xor_i64_monotonic:
7769; RV32IA: # %bb.0:
7770; RV32IA-NEXT: addi sp, sp, -16
7771; RV32IA-NEXT: sw ra, 12(sp)
7772; RV32IA-NEXT: mv a3, zero
7773; RV32IA-NEXT: call __atomic_fetch_xor_8
7774; RV32IA-NEXT: lw ra, 12(sp)
7775; RV32IA-NEXT: addi sp, sp, 16
7776; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]7777 %1 = atomicrmw xor i64* %a, i64 %b monotonic
7778 ret i64 %1
7779}
7780
7781define i64 @atomicrmw_xor_i64_acquire(i64 *%a, i64 %b) nounwind {
7782; RV32I-LABEL: atomicrmw_xor_i64_acquire:
7783; RV32I: # %bb.0:
7784; RV32I-NEXT: addi sp, sp, -16
7785; RV32I-NEXT: sw ra, 12(sp)
7786; RV32I-NEXT: addi a3, zero, 2
7787; RV32I-NEXT: call __atomic_fetch_xor_8
7788; RV32I-NEXT: lw ra, 12(sp)
7789; RV32I-NEXT: addi sp, sp, 16
7790; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]7791;
7792; RV32IA-LABEL: atomicrmw_xor_i64_acquire:
7793; RV32IA: # %bb.0:
7794; RV32IA-NEXT: addi sp, sp, -16
7795; RV32IA-NEXT: sw ra, 12(sp)
7796; RV32IA-NEXT: addi a3, zero, 2
7797; RV32IA-NEXT: call __atomic_fetch_xor_8
7798; RV32IA-NEXT: lw ra, 12(sp)
7799; RV32IA-NEXT: addi sp, sp, 16
7800; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]7801 %1 = atomicrmw xor i64* %a, i64 %b acquire
7802 ret i64 %1
7803}
7804
7805define i64 @atomicrmw_xor_i64_release(i64 *%a, i64 %b) nounwind {
7806; RV32I-LABEL: atomicrmw_xor_i64_release:
7807; RV32I: # %bb.0:
7808; RV32I-NEXT: addi sp, sp, -16
7809; RV32I-NEXT: sw ra, 12(sp)
7810; RV32I-NEXT: addi a3, zero, 3
7811; RV32I-NEXT: call __atomic_fetch_xor_8
7812; RV32I-NEXT: lw ra, 12(sp)
7813; RV32I-NEXT: addi sp, sp, 16
7814; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]7815;
7816; RV32IA-LABEL: atomicrmw_xor_i64_release:
7817; RV32IA: # %bb.0:
7818; RV32IA-NEXT: addi sp, sp, -16
7819; RV32IA-NEXT: sw ra, 12(sp)
7820; RV32IA-NEXT: addi a3, zero, 3
7821; RV32IA-NEXT: call __atomic_fetch_xor_8
7822; RV32IA-NEXT: lw ra, 12(sp)
7823; RV32IA-NEXT: addi sp, sp, 16
7824; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]7825 %1 = atomicrmw xor i64* %a, i64 %b release
7826 ret i64 %1
7827}
7828
7829define i64 @atomicrmw_xor_i64_acq_rel(i64 *%a, i64 %b) nounwind {
7830; RV32I-LABEL: atomicrmw_xor_i64_acq_rel:
7831; RV32I: # %bb.0:
7832; RV32I-NEXT: addi sp, sp, -16
7833; RV32I-NEXT: sw ra, 12(sp)
7834; RV32I-NEXT: addi a3, zero, 4
7835; RV32I-NEXT: call __atomic_fetch_xor_8
7836; RV32I-NEXT: lw ra, 12(sp)
7837; RV32I-NEXT: addi sp, sp, 16
7838; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]7839;
7840; RV32IA-LABEL: atomicrmw_xor_i64_acq_rel:
7841; RV32IA: # %bb.0:
7842; RV32IA-NEXT: addi sp, sp, -16
7843; RV32IA-NEXT: sw ra, 12(sp)
7844; RV32IA-NEXT: addi a3, zero, 4
7845; RV32IA-NEXT: call __atomic_fetch_xor_8
7846; RV32IA-NEXT: lw ra, 12(sp)
7847; RV32IA-NEXT: addi sp, sp, 16
7848; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]7849 %1 = atomicrmw xor i64* %a, i64 %b acq_rel
7850 ret i64 %1
7851}
7852
7853define i64 @atomicrmw_xor_i64_seq_cst(i64 *%a, i64 %b) nounwind {
7854; RV32I-LABEL: atomicrmw_xor_i64_seq_cst:
7855; RV32I: # %bb.0:
7856; RV32I-NEXT: addi sp, sp, -16
7857; RV32I-NEXT: sw ra, 12(sp)
7858; RV32I-NEXT: addi a3, zero, 5
7859; RV32I-NEXT: call __atomic_fetch_xor_8
7860; RV32I-NEXT: lw ra, 12(sp)
7861; RV32I-NEXT: addi sp, sp, 16
7862; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]7863;
7864; RV32IA-LABEL: atomicrmw_xor_i64_seq_cst:
7865; RV32IA: # %bb.0:
7866; RV32IA-NEXT: addi sp, sp, -16
7867; RV32IA-NEXT: sw ra, 12(sp)
7868; RV32IA-NEXT: addi a3, zero, 5
7869; RV32IA-NEXT: call __atomic_fetch_xor_8
7870; RV32IA-NEXT: lw ra, 12(sp)
7871; RV32IA-NEXT: addi sp, sp, 16
7872; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]7873 %1 = atomicrmw xor i64* %a, i64 %b seq_cst
7874 ret i64 %1
7875}
7876
7877define i64 @atomicrmw_max_i64_monotonic(i64 *%a, i64 %b) nounwind {
7878; RV32I-LABEL: atomicrmw_max_i64_monotonic:
7879; RV32I: # %bb.0:
7880; RV32I-NEXT: addi sp, sp, -32
7881; RV32I-NEXT: sw ra, 28(sp)
7882; RV32I-NEXT: sw s1, 24(sp)
7883; RV32I-NEXT: sw s2, 20(sp)
7884; RV32I-NEXT: sw s3, 16(sp)
7885; RV32I-NEXT: sw s4, 12(sp)
7886; RV32I-NEXT: mv s1, a2
7887; RV32I-NEXT: mv s2, a1
7888; RV32I-NEXT: mv s3, a0
7889; RV32I-NEXT: lw a1, 4(a0)
7890; RV32I-NEXT: lw a2, 0(a0)
7891; RV32I-NEXT: mv s4, sp
7892; RV32I-NEXT: .LBB200_1: # %atomicrmw.start
7893; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
7894; RV32I-NEXT: beq a1, s1, .LBB200_3
7895; RV32I-NEXT: # %bb.2: # %atomicrmw.start
7896; RV32I-NEXT: # in Loop: Header=BB200_1 Depth=1
7897; RV32I-NEXT: slt a0, s1, a1
7898; RV32I-NEXT: sw a2, 0(sp)
7899; RV32I-NEXT: beqz a0, .LBB200_4
7900; RV32I-NEXT: j .LBB200_5
7901; RV32I-NEXT: .LBB200_3: # in Loop: Header=BB200_1 Depth=1
7902; RV32I-NEXT: sltu a0, s2, a2
7903; RV32I-NEXT: sw a2, 0(sp)
7904; RV32I-NEXT: bnez a0, .LBB200_5
7905; RV32I-NEXT: .LBB200_4: # %atomicrmw.start
7906; RV32I-NEXT: # in Loop: Header=BB200_1 Depth=1
7907; RV32I-NEXT: mv a2, s2
7908; RV32I-NEXT: .LBB200_5: # %atomicrmw.start
7909; RV32I-NEXT: # in Loop: Header=BB200_1 Depth=1
7910; RV32I-NEXT: mv a3, a1
7911; RV32I-NEXT: bnez a0, .LBB200_7
7912; RV32I-NEXT: # %bb.6: # %atomicrmw.start
7913; RV32I-NEXT: # in Loop: Header=BB200_1 Depth=1
7914; RV32I-NEXT: mv a3, s1
7915; RV32I-NEXT: .LBB200_7: # %atomicrmw.start
7916; RV32I-NEXT: # in Loop: Header=BB200_1 Depth=1
7917; RV32I-NEXT: sw a1, 4(sp)
7918; RV32I-NEXT: mv a0, s3
7919; RV32I-NEXT: mv a1, s4
7920; RV32I-NEXT: mv a4, zero
7921; RV32I-NEXT: mv a5, zero
7922; RV32I-NEXT: call __atomic_compare_exchange_8
7923; RV32I-NEXT: lw a1, 4(sp)
7924; RV32I-NEXT: lw a2, 0(sp)
7925; RV32I-NEXT: beqz a0, .LBB200_1
7926; RV32I-NEXT: # %bb.8: # %atomicrmw.end
7927; RV32I-NEXT: mv a0, a2
7928; RV32I-NEXT: lw s4, 12(sp)
7929; RV32I-NEXT: lw s3, 16(sp)
7930; RV32I-NEXT: lw s2, 20(sp)
7931; RV32I-NEXT: lw s1, 24(sp)
7932; RV32I-NEXT: lw ra, 28(sp)
7933; RV32I-NEXT: addi sp, sp, 32
7934; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]7935;
7936; RV32IA-LABEL: atomicrmw_max_i64_monotonic:
7937; RV32IA: # %bb.0:
7938; RV32IA-NEXT: addi sp, sp, -32
7939; RV32IA-NEXT: sw ra, 28(sp)
7940; RV32IA-NEXT: sw s1, 24(sp)
7941; RV32IA-NEXT: sw s2, 20(sp)
7942; RV32IA-NEXT: sw s3, 16(sp)
7943; RV32IA-NEXT: sw s4, 12(sp)
7944; RV32IA-NEXT: mv s1, a2
7945; RV32IA-NEXT: mv s2, a1
7946; RV32IA-NEXT: mv s3, a0
7947; RV32IA-NEXT: lw a1, 4(a0)
7948; RV32IA-NEXT: lw a2, 0(a0)
7949; RV32IA-NEXT: mv s4, sp
7950; RV32IA-NEXT: .LBB200_1: # %atomicrmw.start
7951; RV32IA-NEXT: # =>This Inner Loop Header: Depth=1
7952; RV32IA-NEXT: beq a1, s1, .LBB200_3
7953; RV32IA-NEXT: # %bb.2: # %atomicrmw.start
7954; RV32IA-NEXT: # in Loop: Header=BB200_1 Depth=1
7955; RV32IA-NEXT: slt a0, s1, a1
7956; RV32IA-NEXT: sw a2, 0(sp)
7957; RV32IA-NEXT: beqz a0, .LBB200_4
7958; RV32IA-NEXT: j .LBB200_5
7959; RV32IA-NEXT: .LBB200_3: # in Loop: Header=BB200_1 Depth=1
7960; RV32IA-NEXT: sltu a0, s2, a2
7961; RV32IA-NEXT: sw a2, 0(sp)
7962; RV32IA-NEXT: bnez a0, .LBB200_5
7963; RV32IA-NEXT: .LBB200_4: # %atomicrmw.start
7964; RV32IA-NEXT: # in Loop: Header=BB200_1 Depth=1
7965; RV32IA-NEXT: mv a2, s2
7966; RV32IA-NEXT: .LBB200_5: # %atomicrmw.start
7967; RV32IA-NEXT: # in Loop: Header=BB200_1 Depth=1
7968; RV32IA-NEXT: mv a3, a1
7969; RV32IA-NEXT: bnez a0, .LBB200_7
7970; RV32IA-NEXT: # %bb.6: # %atomicrmw.start
7971; RV32IA-NEXT: # in Loop: Header=BB200_1 Depth=1
7972; RV32IA-NEXT: mv a3, s1
7973; RV32IA-NEXT: .LBB200_7: # %atomicrmw.start
7974; RV32IA-NEXT: # in Loop: Header=BB200_1 Depth=1
7975; RV32IA-NEXT: sw a1, 4(sp)
7976; RV32IA-NEXT: mv a0, s3
7977; RV32IA-NEXT: mv a1, s4
7978; RV32IA-NEXT: mv a4, zero
7979; RV32IA-NEXT: mv a5, zero
7980; RV32IA-NEXT: call __atomic_compare_exchange_8
7981; RV32IA-NEXT: lw a1, 4(sp)
7982; RV32IA-NEXT: lw a2, 0(sp)
7983; RV32IA-NEXT: beqz a0, .LBB200_1
7984; RV32IA-NEXT: # %bb.8: # %atomicrmw.end
7985; RV32IA-NEXT: mv a0, a2
7986; RV32IA-NEXT: lw s4, 12(sp)
7987; RV32IA-NEXT: lw s3, 16(sp)
7988; RV32IA-NEXT: lw s2, 20(sp)
7989; RV32IA-NEXT: lw s1, 24(sp)
7990; RV32IA-NEXT: lw ra, 28(sp)
7991; RV32IA-NEXT: addi sp, sp, 32
7992; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]7993 %1 = atomicrmw max i64* %a, i64 %b monotonic
7994 ret i64 %1
7995}
7996
7997define i64 @atomicrmw_max_i64_acquire(i64 *%a, i64 %b) nounwind {
7998; RV32I-LABEL: atomicrmw_max_i64_acquire:
7999; RV32I: # %bb.0:
8000; RV32I-NEXT: addi sp, sp, -32
8001; RV32I-NEXT: sw ra, 28(sp)
8002; RV32I-NEXT: sw s1, 24(sp)
8003; RV32I-NEXT: sw s2, 20(sp)
8004; RV32I-NEXT: sw s3, 16(sp)
8005; RV32I-NEXT: sw s4, 12(sp)
8006; RV32I-NEXT: sw s5, 8(sp)
8007; RV32I-NEXT: mv s1, a2
8008; RV32I-NEXT: mv s2, a1
8009; RV32I-NEXT: mv s3, a0
8010; RV32I-NEXT: lw a1, 4(a0)
8011; RV32I-NEXT: lw a2, 0(a0)
8012; RV32I-NEXT: mv s4, sp
8013; RV32I-NEXT: addi s5, zero, 2
8014; RV32I-NEXT: .LBB201_1: # %atomicrmw.start
8015; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
8016; RV32I-NEXT: beq a1, s1, .LBB201_3
8017; RV32I-NEXT: # %bb.2: # %atomicrmw.start
8018; RV32I-NEXT: # in Loop: Header=BB201_1 Depth=1
8019; RV32I-NEXT: slt a0, s1, a1
8020; RV32I-NEXT: sw a2, 0(sp)
8021; RV32I-NEXT: beqz a0, .LBB201_4
8022; RV32I-NEXT: j .LBB201_5
8023; RV32I-NEXT: .LBB201_3: # in Loop: Header=BB201_1 Depth=1
8024; RV32I-NEXT: sltu a0, s2, a2
8025; RV32I-NEXT: sw a2, 0(sp)
8026; RV32I-NEXT: bnez a0, .LBB201_5
8027; RV32I-NEXT: .LBB201_4: # %atomicrmw.start
8028; RV32I-NEXT: # in Loop: Header=BB201_1 Depth=1
8029; RV32I-NEXT: mv a2, s2
8030; RV32I-NEXT: .LBB201_5: # %atomicrmw.start
8031; RV32I-NEXT: # in Loop: Header=BB201_1 Depth=1
8032; RV32I-NEXT: mv a3, a1
8033; RV32I-NEXT: bnez a0, .LBB201_7
8034; RV32I-NEXT: # %bb.6: # %atomicrmw.start
8035; RV32I-NEXT: # in Loop: Header=BB201_1 Depth=1
8036; RV32I-NEXT: mv a3, s1
8037; RV32I-NEXT: .LBB201_7: # %atomicrmw.start
8038; RV32I-NEXT: # in Loop: Header=BB201_1 Depth=1
8039; RV32I-NEXT: sw a1, 4(sp)
8040; RV32I-NEXT: mv a0, s3
8041; RV32I-NEXT: mv a1, s4
8042; RV32I-NEXT: mv a4, s5
8043; RV32I-NEXT: mv a5, s5
8044; RV32I-NEXT: call __atomic_compare_exchange_8
8045; RV32I-NEXT: lw a1, 4(sp)
8046; RV32I-NEXT: lw a2, 0(sp)
8047; RV32I-NEXT: beqz a0, .LBB201_1
8048; RV32I-NEXT: # %bb.8: # %atomicrmw.end
8049; RV32I-NEXT: mv a0, a2
8050; RV32I-NEXT: lw s5, 8(sp)
8051; RV32I-NEXT: lw s4, 12(sp)
8052; RV32I-NEXT: lw s3, 16(sp)
8053; RV32I-NEXT: lw s2, 20(sp)
8054; RV32I-NEXT: lw s1, 24(sp)
8055; RV32I-NEXT: lw ra, 28(sp)
8056; RV32I-NEXT: addi sp, sp, 32
8057; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]8058;
8059; RV32IA-LABEL: atomicrmw_max_i64_acquire:
8060; RV32IA: # %bb.0:
8061; RV32IA-NEXT: addi sp, sp, -32
8062; RV32IA-NEXT: sw ra, 28(sp)
8063; RV32IA-NEXT: sw s1, 24(sp)
8064; RV32IA-NEXT: sw s2, 20(sp)
8065; RV32IA-NEXT: sw s3, 16(sp)
8066; RV32IA-NEXT: sw s4, 12(sp)
8067; RV32IA-NEXT: sw s5, 8(sp)
8068; RV32IA-NEXT: mv s1, a2
8069; RV32IA-NEXT: mv s2, a1
8070; RV32IA-NEXT: mv s3, a0
8071; RV32IA-NEXT: lw a1, 4(a0)
8072; RV32IA-NEXT: lw a2, 0(a0)
8073; RV32IA-NEXT: mv s4, sp
8074; RV32IA-NEXT: addi s5, zero, 2
8075; RV32IA-NEXT: .LBB201_1: # %atomicrmw.start
8076; RV32IA-NEXT: # =>This Inner Loop Header: Depth=1
8077; RV32IA-NEXT: beq a1, s1, .LBB201_3
8078; RV32IA-NEXT: # %bb.2: # %atomicrmw.start
8079; RV32IA-NEXT: # in Loop: Header=BB201_1 Depth=1
8080; RV32IA-NEXT: slt a0, s1, a1
8081; RV32IA-NEXT: sw a2, 0(sp)
8082; RV32IA-NEXT: beqz a0, .LBB201_4
8083; RV32IA-NEXT: j .LBB201_5
8084; RV32IA-NEXT: .LBB201_3: # in Loop: Header=BB201_1 Depth=1
8085; RV32IA-NEXT: sltu a0, s2, a2
8086; RV32IA-NEXT: sw a2, 0(sp)
8087; RV32IA-NEXT: bnez a0, .LBB201_5
8088; RV32IA-NEXT: .LBB201_4: # %atomicrmw.start
8089; RV32IA-NEXT: # in Loop: Header=BB201_1 Depth=1
8090; RV32IA-NEXT: mv a2, s2
8091; RV32IA-NEXT: .LBB201_5: # %atomicrmw.start
8092; RV32IA-NEXT: # in Loop: Header=BB201_1 Depth=1
8093; RV32IA-NEXT: mv a3, a1
8094; RV32IA-NEXT: bnez a0, .LBB201_7
8095; RV32IA-NEXT: # %bb.6: # %atomicrmw.start
8096; RV32IA-NEXT: # in Loop: Header=BB201_1 Depth=1
8097; RV32IA-NEXT: mv a3, s1
8098; RV32IA-NEXT: .LBB201_7: # %atomicrmw.start
8099; RV32IA-NEXT: # in Loop: Header=BB201_1 Depth=1
8100; RV32IA-NEXT: sw a1, 4(sp)
8101; RV32IA-NEXT: mv a0, s3
8102; RV32IA-NEXT: mv a1, s4
8103; RV32IA-NEXT: mv a4, s5
8104; RV32IA-NEXT: mv a5, s5
8105; RV32IA-NEXT: call __atomic_compare_exchange_8
8106; RV32IA-NEXT: lw a1, 4(sp)
8107; RV32IA-NEXT: lw a2, 0(sp)
8108; RV32IA-NEXT: beqz a0, .LBB201_1
8109; RV32IA-NEXT: # %bb.8: # %atomicrmw.end
8110; RV32IA-NEXT: mv a0, a2
8111; RV32IA-NEXT: lw s5, 8(sp)
8112; RV32IA-NEXT: lw s4, 12(sp)
8113; RV32IA-NEXT: lw s3, 16(sp)
8114; RV32IA-NEXT: lw s2, 20(sp)
8115; RV32IA-NEXT: lw s1, 24(sp)
8116; RV32IA-NEXT: lw ra, 28(sp)
8117; RV32IA-NEXT: addi sp, sp, 32
8118; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]8119 %1 = atomicrmw max i64* %a, i64 %b acquire
8120 ret i64 %1
8121}
8122
8123define i64 @atomicrmw_max_i64_release(i64 *%a, i64 %b) nounwind {
8124; RV32I-LABEL: atomicrmw_max_i64_release:
8125; RV32I: # %bb.0:
8126; RV32I-NEXT: addi sp, sp, -32
8127; RV32I-NEXT: sw ra, 28(sp)
8128; RV32I-NEXT: sw s1, 24(sp)
8129; RV32I-NEXT: sw s2, 20(sp)
8130; RV32I-NEXT: sw s3, 16(sp)
8131; RV32I-NEXT: sw s4, 12(sp)
8132; RV32I-NEXT: sw s5, 8(sp)
8133; RV32I-NEXT: mv s1, a2
8134; RV32I-NEXT: mv s2, a1
8135; RV32I-NEXT: mv s3, a0
8136; RV32I-NEXT: lw a1, 4(a0)
8137; RV32I-NEXT: lw a2, 0(a0)
8138; RV32I-NEXT: mv s4, sp
8139; RV32I-NEXT: addi s5, zero, 3
8140; RV32I-NEXT: .LBB202_1: # %atomicrmw.start
8141; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
8142; RV32I-NEXT: beq a1, s1, .LBB202_3
8143; RV32I-NEXT: # %bb.2: # %atomicrmw.start
8144; RV32I-NEXT: # in Loop: Header=BB202_1 Depth=1
8145; RV32I-NEXT: slt a0, s1, a1
8146; RV32I-NEXT: sw a2, 0(sp)
8147; RV32I-NEXT: beqz a0, .LBB202_4
8148; RV32I-NEXT: j .LBB202_5
8149; RV32I-NEXT: .LBB202_3: # in Loop: Header=BB202_1 Depth=1
8150; RV32I-NEXT: sltu a0, s2, a2
8151; RV32I-NEXT: sw a2, 0(sp)
8152; RV32I-NEXT: bnez a0, .LBB202_5
8153; RV32I-NEXT: .LBB202_4: # %atomicrmw.start
8154; RV32I-NEXT: # in Loop: Header=BB202_1 Depth=1
8155; RV32I-NEXT: mv a2, s2
8156; RV32I-NEXT: .LBB202_5: # %atomicrmw.start
8157; RV32I-NEXT: # in Loop: Header=BB202_1 Depth=1
8158; RV32I-NEXT: mv a3, a1
8159; RV32I-NEXT: bnez a0, .LBB202_7
8160; RV32I-NEXT: # %bb.6: # %atomicrmw.start
8161; RV32I-NEXT: # in Loop: Header=BB202_1 Depth=1
8162; RV32I-NEXT: mv a3, s1
8163; RV32I-NEXT: .LBB202_7: # %atomicrmw.start
8164; RV32I-NEXT: # in Loop: Header=BB202_1 Depth=1
8165; RV32I-NEXT: sw a1, 4(sp)
8166; RV32I-NEXT: mv a0, s3
8167; RV32I-NEXT: mv a1, s4
8168; RV32I-NEXT: mv a4, s5
8169; RV32I-NEXT: mv a5, zero
8170; RV32I-NEXT: call __atomic_compare_exchange_8
8171; RV32I-NEXT: lw a1, 4(sp)
8172; RV32I-NEXT: lw a2, 0(sp)
8173; RV32I-NEXT: beqz a0, .LBB202_1
8174; RV32I-NEXT: # %bb.8: # %atomicrmw.end
8175; RV32I-NEXT: mv a0, a2
8176; RV32I-NEXT: lw s5, 8(sp)
8177; RV32I-NEXT: lw s4, 12(sp)
8178; RV32I-NEXT: lw s3, 16(sp)
8179; RV32I-NEXT: lw s2, 20(sp)
8180; RV32I-NEXT: lw s1, 24(sp)
8181; RV32I-NEXT: lw ra, 28(sp)
8182; RV32I-NEXT: addi sp, sp, 32
8183; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]8184;
8185; RV32IA-LABEL: atomicrmw_max_i64_release:
8186; RV32IA: # %bb.0:
8187; RV32IA-NEXT: addi sp, sp, -32
8188; RV32IA-NEXT: sw ra, 28(sp)
8189; RV32IA-NEXT: sw s1, 24(sp)
8190; RV32IA-NEXT: sw s2, 20(sp)
8191; RV32IA-NEXT: sw s3, 16(sp)
8192; RV32IA-NEXT: sw s4, 12(sp)
8193; RV32IA-NEXT: sw s5, 8(sp)
8194; RV32IA-NEXT: mv s1, a2
8195; RV32IA-NEXT: mv s2, a1
8196; RV32IA-NEXT: mv s3, a0
8197; RV32IA-NEXT: lw a1, 4(a0)
8198; RV32IA-NEXT: lw a2, 0(a0)
8199; RV32IA-NEXT: mv s4, sp
8200; RV32IA-NEXT: addi s5, zero, 3
8201; RV32IA-NEXT: .LBB202_1: # %atomicrmw.start
8202; RV32IA-NEXT: # =>This Inner Loop Header: Depth=1
8203; RV32IA-NEXT: beq a1, s1, .LBB202_3
8204; RV32IA-NEXT: # %bb.2: # %atomicrmw.start
8205; RV32IA-NEXT: # in Loop: Header=BB202_1 Depth=1
8206; RV32IA-NEXT: slt a0, s1, a1
8207; RV32IA-NEXT: sw a2, 0(sp)
8208; RV32IA-NEXT: beqz a0, .LBB202_4
8209; RV32IA-NEXT: j .LBB202_5
8210; RV32IA-NEXT: .LBB202_3: # in Loop: Header=BB202_1 Depth=1
8211; RV32IA-NEXT: sltu a0, s2, a2
8212; RV32IA-NEXT: sw a2, 0(sp)
8213; RV32IA-NEXT: bnez a0, .LBB202_5
8214; RV32IA-NEXT: .LBB202_4: # %atomicrmw.start
8215; RV32IA-NEXT: # in Loop: Header=BB202_1 Depth=1
8216; RV32IA-NEXT: mv a2, s2
8217; RV32IA-NEXT: .LBB202_5: # %atomicrmw.start
8218; RV32IA-NEXT: # in Loop: Header=BB202_1 Depth=1
8219; RV32IA-NEXT: mv a3, a1
8220; RV32IA-NEXT: bnez a0, .LBB202_7
8221; RV32IA-NEXT: # %bb.6: # %atomicrmw.start
8222; RV32IA-NEXT: # in Loop: Header=BB202_1 Depth=1
8223; RV32IA-NEXT: mv a3, s1
8224; RV32IA-NEXT: .LBB202_7: # %atomicrmw.start
8225; RV32IA-NEXT: # in Loop: Header=BB202_1 Depth=1
8226; RV32IA-NEXT: sw a1, 4(sp)
8227; RV32IA-NEXT: mv a0, s3
8228; RV32IA-NEXT: mv a1, s4
8229; RV32IA-NEXT: mv a4, s5
8230; RV32IA-NEXT: mv a5, zero
8231; RV32IA-NEXT: call __atomic_compare_exchange_8
8232; RV32IA-NEXT: lw a1, 4(sp)
8233; RV32IA-NEXT: lw a2, 0(sp)
8234; RV32IA-NEXT: beqz a0, .LBB202_1
8235; RV32IA-NEXT: # %bb.8: # %atomicrmw.end
8236; RV32IA-NEXT: mv a0, a2
8237; RV32IA-NEXT: lw s5, 8(sp)
8238; RV32IA-NEXT: lw s4, 12(sp)
8239; RV32IA-NEXT: lw s3, 16(sp)
8240; RV32IA-NEXT: lw s2, 20(sp)
8241; RV32IA-NEXT: lw s1, 24(sp)
8242; RV32IA-NEXT: lw ra, 28(sp)
8243; RV32IA-NEXT: addi sp, sp, 32
8244; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]8245 %1 = atomicrmw max i64* %a, i64 %b release
8246 ret i64 %1
8247}
8248
8249define i64 @atomicrmw_max_i64_acq_rel(i64 *%a, i64 %b) nounwind {
8250; RV32I-LABEL: atomicrmw_max_i64_acq_rel:
8251; RV32I: # %bb.0:
8252; RV32I-NEXT: addi sp, sp, -48
8253; RV32I-NEXT: sw ra, 44(sp)
8254; RV32I-NEXT: sw s1, 40(sp)
8255; RV32I-NEXT: sw s2, 36(sp)
8256; RV32I-NEXT: sw s3, 32(sp)
8257; RV32I-NEXT: sw s4, 28(sp)
8258; RV32I-NEXT: sw s5, 24(sp)
8259; RV32I-NEXT: sw s6, 20(sp)
8260; RV32I-NEXT: mv s1, a2
8261; RV32I-NEXT: mv s2, a1
8262; RV32I-NEXT: mv s3, a0
8263; RV32I-NEXT: lw a1, 4(a0)
8264; RV32I-NEXT: lw a2, 0(a0)
8265; RV32I-NEXT: addi s4, sp, 8
8266; RV32I-NEXT: addi s5, zero, 4
8267; RV32I-NEXT: addi s6, zero, 2
8268; RV32I-NEXT: .LBB203_1: # %atomicrmw.start
8269; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
8270; RV32I-NEXT: beq a1, s1, .LBB203_3
8271; RV32I-NEXT: # %bb.2: # %atomicrmw.start
8272; RV32I-NEXT: # in Loop: Header=BB203_1 Depth=1
8273; RV32I-NEXT: slt a0, s1, a1
8274; RV32I-NEXT: sw a2, 8(sp)
8275; RV32I-NEXT: beqz a0, .LBB203_4
8276; RV32I-NEXT: j .LBB203_5
8277; RV32I-NEXT: .LBB203_3: # in Loop: Header=BB203_1 Depth=1
8278; RV32I-NEXT: sltu a0, s2, a2
8279; RV32I-NEXT: sw a2, 8(sp)
8280; RV32I-NEXT: bnez a0, .LBB203_5
8281; RV32I-NEXT: .LBB203_4: # %atomicrmw.start
8282; RV32I-NEXT: # in Loop: Header=BB203_1 Depth=1
8283; RV32I-NEXT: mv a2, s2
8284; RV32I-NEXT: .LBB203_5: # %atomicrmw.start
8285; RV32I-NEXT: # in Loop: Header=BB203_1 Depth=1
8286; RV32I-NEXT: mv a3, a1
8287; RV32I-NEXT: bnez a0, .LBB203_7
8288; RV32I-NEXT: # %bb.6: # %atomicrmw.start
8289; RV32I-NEXT: # in Loop: Header=BB203_1 Depth=1
8290; RV32I-NEXT: mv a3, s1
8291; RV32I-NEXT: .LBB203_7: # %atomicrmw.start
8292; RV32I-NEXT: # in Loop: Header=BB203_1 Depth=1
8293; RV32I-NEXT: sw a1, 12(sp)
8294; RV32I-NEXT: mv a0, s3
8295; RV32I-NEXT: mv a1, s4
8296; RV32I-NEXT: mv a4, s5
8297; RV32I-NEXT: mv a5, s6
8298; RV32I-NEXT: call __atomic_compare_exchange_8
8299; RV32I-NEXT: lw a1, 12(sp)
8300; RV32I-NEXT: lw a2, 8(sp)
8301; RV32I-NEXT: beqz a0, .LBB203_1
8302; RV32I-NEXT: # %bb.8: # %atomicrmw.end
8303; RV32I-NEXT: mv a0, a2
8304; RV32I-NEXT: lw s6, 20(sp)
8305; RV32I-NEXT: lw s5, 24(sp)
8306; RV32I-NEXT: lw s4, 28(sp)
8307; RV32I-NEXT: lw s3, 32(sp)
8308; RV32I-NEXT: lw s2, 36(sp)
8309; RV32I-NEXT: lw s1, 40(sp)
8310; RV32I-NEXT: lw ra, 44(sp)
8311; RV32I-NEXT: addi sp, sp, 48
8312; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]8313;
8314; RV32IA-LABEL: atomicrmw_max_i64_acq_rel:
8315; RV32IA: # %bb.0:
8316; RV32IA-NEXT: addi sp, sp, -48
8317; RV32IA-NEXT: sw ra, 44(sp)
8318; RV32IA-NEXT: sw s1, 40(sp)
8319; RV32IA-NEXT: sw s2, 36(sp)
8320; RV32IA-NEXT: sw s3, 32(sp)
8321; RV32IA-NEXT: sw s4, 28(sp)
8322; RV32IA-NEXT: sw s5, 24(sp)
8323; RV32IA-NEXT: sw s6, 20(sp)
8324; RV32IA-NEXT: mv s1, a2
8325; RV32IA-NEXT: mv s2, a1
8326; RV32IA-NEXT: mv s3, a0
8327; RV32IA-NEXT: lw a1, 4(a0)
8328; RV32IA-NEXT: lw a2, 0(a0)
8329; RV32IA-NEXT: addi s4, sp, 8
8330; RV32IA-NEXT: addi s5, zero, 4
8331; RV32IA-NEXT: addi s6, zero, 2
8332; RV32IA-NEXT: .LBB203_1: # %atomicrmw.start
8333; RV32IA-NEXT: # =>This Inner Loop Header: Depth=1
8334; RV32IA-NEXT: beq a1, s1, .LBB203_3
8335; RV32IA-NEXT: # %bb.2: # %atomicrmw.start
8336; RV32IA-NEXT: # in Loop: Header=BB203_1 Depth=1
8337; RV32IA-NEXT: slt a0, s1, a1
8338; RV32IA-NEXT: sw a2, 8(sp)
8339; RV32IA-NEXT: beqz a0, .LBB203_4
8340; RV32IA-NEXT: j .LBB203_5
8341; RV32IA-NEXT: .LBB203_3: # in Loop: Header=BB203_1 Depth=1
8342; RV32IA-NEXT: sltu a0, s2, a2
8343; RV32IA-NEXT: sw a2, 8(sp)
8344; RV32IA-NEXT: bnez a0, .LBB203_5
8345; RV32IA-NEXT: .LBB203_4: # %atomicrmw.start
8346; RV32IA-NEXT: # in Loop: Header=BB203_1 Depth=1
8347; RV32IA-NEXT: mv a2, s2
8348; RV32IA-NEXT: .LBB203_5: # %atomicrmw.start
8349; RV32IA-NEXT: # in Loop: Header=BB203_1 Depth=1
8350; RV32IA-NEXT: mv a3, a1
8351; RV32IA-NEXT: bnez a0, .LBB203_7
8352; RV32IA-NEXT: # %bb.6: # %atomicrmw.start
8353; RV32IA-NEXT: # in Loop: Header=BB203_1 Depth=1
8354; RV32IA-NEXT: mv a3, s1
8355; RV32IA-NEXT: .LBB203_7: # %atomicrmw.start
8356; RV32IA-NEXT: # in Loop: Header=BB203_1 Depth=1
8357; RV32IA-NEXT: sw a1, 12(sp)
8358; RV32IA-NEXT: mv a0, s3
8359; RV32IA-NEXT: mv a1, s4
8360; RV32IA-NEXT: mv a4, s5
8361; RV32IA-NEXT: mv a5, s6
8362; RV32IA-NEXT: call __atomic_compare_exchange_8
8363; RV32IA-NEXT: lw a1, 12(sp)
8364; RV32IA-NEXT: lw a2, 8(sp)
8365; RV32IA-NEXT: beqz a0, .LBB203_1
8366; RV32IA-NEXT: # %bb.8: # %atomicrmw.end
8367; RV32IA-NEXT: mv a0, a2
8368; RV32IA-NEXT: lw s6, 20(sp)
8369; RV32IA-NEXT: lw s5, 24(sp)
8370; RV32IA-NEXT: lw s4, 28(sp)
8371; RV32IA-NEXT: lw s3, 32(sp)
8372; RV32IA-NEXT: lw s2, 36(sp)
8373; RV32IA-NEXT: lw s1, 40(sp)
8374; RV32IA-NEXT: lw ra, 44(sp)
8375; RV32IA-NEXT: addi sp, sp, 48
8376; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]8377 %1 = atomicrmw max i64* %a, i64 %b acq_rel
8378 ret i64 %1
8379}
8380
8381define i64 @atomicrmw_max_i64_seq_cst(i64 *%a, i64 %b) nounwind {
8382; RV32I-LABEL: atomicrmw_max_i64_seq_cst:
8383; RV32I: # %bb.0:
8384; RV32I-NEXT: addi sp, sp, -32
8385; RV32I-NEXT: sw ra, 28(sp)
8386; RV32I-NEXT: sw s1, 24(sp)
8387; RV32I-NEXT: sw s2, 20(sp)
8388; RV32I-NEXT: sw s3, 16(sp)
8389; RV32I-NEXT: sw s4, 12(sp)
8390; RV32I-NEXT: sw s5, 8(sp)
8391; RV32I-NEXT: mv s1, a2
8392; RV32I-NEXT: mv s2, a1
8393; RV32I-NEXT: mv s3, a0
8394; RV32I-NEXT: lw a1, 4(a0)
8395; RV32I-NEXT: lw a2, 0(a0)
8396; RV32I-NEXT: mv s4, sp
8397; RV32I-NEXT: addi s5, zero, 5
8398; RV32I-NEXT: .LBB204_1: # %atomicrmw.start
8399; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
8400; RV32I-NEXT: beq a1, s1, .LBB204_3
8401; RV32I-NEXT: # %bb.2: # %atomicrmw.start
8402; RV32I-NEXT: # in Loop: Header=BB204_1 Depth=1
8403; RV32I-NEXT: slt a0, s1, a1
8404; RV32I-NEXT: sw a2, 0(sp)
8405; RV32I-NEXT: beqz a0, .LBB204_4
8406; RV32I-NEXT: j .LBB204_5
8407; RV32I-NEXT: .LBB204_3: # in Loop: Header=BB204_1 Depth=1
8408; RV32I-NEXT: sltu a0, s2, a2
8409; RV32I-NEXT: sw a2, 0(sp)
8410; RV32I-NEXT: bnez a0, .LBB204_5
8411; RV32I-NEXT: .LBB204_4: # %atomicrmw.start
8412; RV32I-NEXT: # in Loop: Header=BB204_1 Depth=1
8413; RV32I-NEXT: mv a2, s2
8414; RV32I-NEXT: .LBB204_5: # %atomicrmw.start
8415; RV32I-NEXT: # in Loop: Header=BB204_1 Depth=1
8416; RV32I-NEXT: mv a3, a1
8417; RV32I-NEXT: bnez a0, .LBB204_7
8418; RV32I-NEXT: # %bb.6: # %atomicrmw.start
8419; RV32I-NEXT: # in Loop: Header=BB204_1 Depth=1
8420; RV32I-NEXT: mv a3, s1
8421; RV32I-NEXT: .LBB204_7: # %atomicrmw.start
8422; RV32I-NEXT: # in Loop: Header=BB204_1 Depth=1
8423; RV32I-NEXT: sw a1, 4(sp)
8424; RV32I-NEXT: mv a0, s3
8425; RV32I-NEXT: mv a1, s4
8426; RV32I-NEXT: mv a4, s5
8427; RV32I-NEXT: mv a5, s5
8428; RV32I-NEXT: call __atomic_compare_exchange_8
8429; RV32I-NEXT: lw a1, 4(sp)
8430; RV32I-NEXT: lw a2, 0(sp)
8431; RV32I-NEXT: beqz a0, .LBB204_1
8432; RV32I-NEXT: # %bb.8: # %atomicrmw.end
8433; RV32I-NEXT: mv a0, a2
8434; RV32I-NEXT: lw s5, 8(sp)
8435; RV32I-NEXT: lw s4, 12(sp)
8436; RV32I-NEXT: lw s3, 16(sp)
8437; RV32I-NEXT: lw s2, 20(sp)
8438; RV32I-NEXT: lw s1, 24(sp)
8439; RV32I-NEXT: lw ra, 28(sp)
8440; RV32I-NEXT: addi sp, sp, 32
8441; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]8442;
8443; RV32IA-LABEL: atomicrmw_max_i64_seq_cst:
8444; RV32IA: # %bb.0:
8445; RV32IA-NEXT: addi sp, sp, -32
8446; RV32IA-NEXT: sw ra, 28(sp)
8447; RV32IA-NEXT: sw s1, 24(sp)
8448; RV32IA-NEXT: sw s2, 20(sp)
8449; RV32IA-NEXT: sw s3, 16(sp)
8450; RV32IA-NEXT: sw s4, 12(sp)
8451; RV32IA-NEXT: sw s5, 8(sp)
8452; RV32IA-NEXT: mv s1, a2
8453; RV32IA-NEXT: mv s2, a1
8454; RV32IA-NEXT: mv s3, a0
8455; RV32IA-NEXT: lw a1, 4(a0)
8456; RV32IA-NEXT: lw a2, 0(a0)
8457; RV32IA-NEXT: mv s4, sp
8458; RV32IA-NEXT: addi s5, zero, 5
8459; RV32IA-NEXT: .LBB204_1: # %atomicrmw.start
8460; RV32IA-NEXT: # =>This Inner Loop Header: Depth=1
8461; RV32IA-NEXT: beq a1, s1, .LBB204_3
8462; RV32IA-NEXT: # %bb.2: # %atomicrmw.start
8463; RV32IA-NEXT: # in Loop: Header=BB204_1 Depth=1
8464; RV32IA-NEXT: slt a0, s1, a1
8465; RV32IA-NEXT: sw a2, 0(sp)
8466; RV32IA-NEXT: beqz a0, .LBB204_4
8467; RV32IA-NEXT: j .LBB204_5
8468; RV32IA-NEXT: .LBB204_3: # in Loop: Header=BB204_1 Depth=1
8469; RV32IA-NEXT: sltu a0, s2, a2
8470; RV32IA-NEXT: sw a2, 0(sp)
8471; RV32IA-NEXT: bnez a0, .LBB204_5
8472; RV32IA-NEXT: .LBB204_4: # %atomicrmw.start
8473; RV32IA-NEXT: # in Loop: Header=BB204_1 Depth=1
8474; RV32IA-NEXT: mv a2, s2
8475; RV32IA-NEXT: .LBB204_5: # %atomicrmw.start
8476; RV32IA-NEXT: # in Loop: Header=BB204_1 Depth=1
8477; RV32IA-NEXT: mv a3, a1
8478; RV32IA-NEXT: bnez a0, .LBB204_7
8479; RV32IA-NEXT: # %bb.6: # %atomicrmw.start
8480; RV32IA-NEXT: # in Loop: Header=BB204_1 Depth=1
8481; RV32IA-NEXT: mv a3, s1
8482; RV32IA-NEXT: .LBB204_7: # %atomicrmw.start
8483; RV32IA-NEXT: # in Loop: Header=BB204_1 Depth=1
8484; RV32IA-NEXT: sw a1, 4(sp)
8485; RV32IA-NEXT: mv a0, s3
8486; RV32IA-NEXT: mv a1, s4
8487; RV32IA-NEXT: mv a4, s5
8488; RV32IA-NEXT: mv a5, s5
8489; RV32IA-NEXT: call __atomic_compare_exchange_8
8490; RV32IA-NEXT: lw a1, 4(sp)
8491; RV32IA-NEXT: lw a2, 0(sp)
8492; RV32IA-NEXT: beqz a0, .LBB204_1
8493; RV32IA-NEXT: # %bb.8: # %atomicrmw.end
8494; RV32IA-NEXT: mv a0, a2
8495; RV32IA-NEXT: lw s5, 8(sp)
8496; RV32IA-NEXT: lw s4, 12(sp)
8497; RV32IA-NEXT: lw s3, 16(sp)
8498; RV32IA-NEXT: lw s2, 20(sp)
8499; RV32IA-NEXT: lw s1, 24(sp)
8500; RV32IA-NEXT: lw ra, 28(sp)
8501; RV32IA-NEXT: addi sp, sp, 32
8502; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]8503 %1 = atomicrmw max i64* %a, i64 %b seq_cst
8504 ret i64 %1
8505}
8506
8507define i64 @atomicrmw_min_i64_monotonic(i64 *%a, i64 %b) nounwind {
8508; RV32I-LABEL: atomicrmw_min_i64_monotonic:
8509; RV32I: # %bb.0:
8510; RV32I-NEXT: addi sp, sp, -32
8511; RV32I-NEXT: sw ra, 28(sp)
8512; RV32I-NEXT: sw s1, 24(sp)
8513; RV32I-NEXT: sw s2, 20(sp)
8514; RV32I-NEXT: sw s3, 16(sp)
8515; RV32I-NEXT: sw s4, 12(sp)
8516; RV32I-NEXT: mv s1, a2
8517; RV32I-NEXT: mv s2, a1
8518; RV32I-NEXT: mv s3, a0
8519; RV32I-NEXT: lw a1, 4(a0)
8520; RV32I-NEXT: lw a2, 0(a0)
8521; RV32I-NEXT: mv s4, sp
8522; RV32I-NEXT: .LBB205_1: # %atomicrmw.start
8523; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
8524; RV32I-NEXT: beq a1, s1, .LBB205_3
8525; RV32I-NEXT: # %bb.2: # %atomicrmw.start
8526; RV32I-NEXT: # in Loop: Header=BB205_1 Depth=1
8527; RV32I-NEXT: slt a0, s1, a1
8528; RV32I-NEXT: j .LBB205_4
8529; RV32I-NEXT: .LBB205_3: # in Loop: Header=BB205_1 Depth=1
8530; RV32I-NEXT: sltu a0, s2, a2
8531; RV32I-NEXT: .LBB205_4: # %atomicrmw.start
8532; RV32I-NEXT: # in Loop: Header=BB205_1 Depth=1
8533; RV32I-NEXT: xori a0, a0, 1
8534; RV32I-NEXT: sw a2, 0(sp)
8535; RV32I-NEXT: bnez a0, .LBB205_6
8536; RV32I-NEXT: # %bb.5: # %atomicrmw.start
8537; RV32I-NEXT: # in Loop: Header=BB205_1 Depth=1
8538; RV32I-NEXT: mv a2, s2
8539; RV32I-NEXT: .LBB205_6: # %atomicrmw.start
8540; RV32I-NEXT: # in Loop: Header=BB205_1 Depth=1
8541; RV32I-NEXT: mv a3, a1
8542; RV32I-NEXT: bnez a0, .LBB205_8
8543; RV32I-NEXT: # %bb.7: # %atomicrmw.start
8544; RV32I-NEXT: # in Loop: Header=BB205_1 Depth=1
8545; RV32I-NEXT: mv a3, s1
8546; RV32I-NEXT: .LBB205_8: # %atomicrmw.start
8547; RV32I-NEXT: # in Loop: Header=BB205_1 Depth=1
8548; RV32I-NEXT: sw a1, 4(sp)
8549; RV32I-NEXT: mv a0, s3
8550; RV32I-NEXT: mv a1, s4
8551; RV32I-NEXT: mv a4, zero
8552; RV32I-NEXT: mv a5, zero
8553; RV32I-NEXT: call __atomic_compare_exchange_8
8554; RV32I-NEXT: lw a1, 4(sp)
8555; RV32I-NEXT: lw a2, 0(sp)
8556; RV32I-NEXT: beqz a0, .LBB205_1
8557; RV32I-NEXT: # %bb.9: # %atomicrmw.end
8558; RV32I-NEXT: mv a0, a2
8559; RV32I-NEXT: lw s4, 12(sp)
8560; RV32I-NEXT: lw s3, 16(sp)
8561; RV32I-NEXT: lw s2, 20(sp)
8562; RV32I-NEXT: lw s1, 24(sp)
8563; RV32I-NEXT: lw ra, 28(sp)
8564; RV32I-NEXT: addi sp, sp, 32
8565; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]8566;
8567; RV32IA-LABEL: atomicrmw_min_i64_monotonic:
8568; RV32IA: # %bb.0:
8569; RV32IA-NEXT: addi sp, sp, -32
8570; RV32IA-NEXT: sw ra, 28(sp)
8571; RV32IA-NEXT: sw s1, 24(sp)
8572; RV32IA-NEXT: sw s2, 20(sp)
8573; RV32IA-NEXT: sw s3, 16(sp)
8574; RV32IA-NEXT: sw s4, 12(sp)
8575; RV32IA-NEXT: mv s1, a2
8576; RV32IA-NEXT: mv s2, a1
8577; RV32IA-NEXT: mv s3, a0
8578; RV32IA-NEXT: lw a1, 4(a0)
8579; RV32IA-NEXT: lw a2, 0(a0)
8580; RV32IA-NEXT: mv s4, sp
8581; RV32IA-NEXT: .LBB205_1: # %atomicrmw.start
8582; RV32IA-NEXT: # =>This Inner Loop Header: Depth=1
8583; RV32IA-NEXT: beq a1, s1, .LBB205_3
8584; RV32IA-NEXT: # %bb.2: # %atomicrmw.start
8585; RV32IA-NEXT: # in Loop: Header=BB205_1 Depth=1
8586; RV32IA-NEXT: slt a0, s1, a1
8587; RV32IA-NEXT: j .LBB205_4
8588; RV32IA-NEXT: .LBB205_3: # in Loop: Header=BB205_1 Depth=1
8589; RV32IA-NEXT: sltu a0, s2, a2
8590; RV32IA-NEXT: .LBB205_4: # %atomicrmw.start
8591; RV32IA-NEXT: # in Loop: Header=BB205_1 Depth=1
8592; RV32IA-NEXT: xori a0, a0, 1
8593; RV32IA-NEXT: sw a2, 0(sp)
8594; RV32IA-NEXT: bnez a0, .LBB205_6
8595; RV32IA-NEXT: # %bb.5: # %atomicrmw.start
8596; RV32IA-NEXT: # in Loop: Header=BB205_1 Depth=1
8597; RV32IA-NEXT: mv a2, s2
8598; RV32IA-NEXT: .LBB205_6: # %atomicrmw.start
8599; RV32IA-NEXT: # in Loop: Header=BB205_1 Depth=1
8600; RV32IA-NEXT: mv a3, a1
8601; RV32IA-NEXT: bnez a0, .LBB205_8
8602; RV32IA-NEXT: # %bb.7: # %atomicrmw.start
8603; RV32IA-NEXT: # in Loop: Header=BB205_1 Depth=1
8604; RV32IA-NEXT: mv a3, s1
8605; RV32IA-NEXT: .LBB205_8: # %atomicrmw.start
8606; RV32IA-NEXT: # in Loop: Header=BB205_1 Depth=1
8607; RV32IA-NEXT: sw a1, 4(sp)
8608; RV32IA-NEXT: mv a0, s3
8609; RV32IA-NEXT: mv a1, s4
8610; RV32IA-NEXT: mv a4, zero
8611; RV32IA-NEXT: mv a5, zero
8612; RV32IA-NEXT: call __atomic_compare_exchange_8
8613; RV32IA-NEXT: lw a1, 4(sp)
8614; RV32IA-NEXT: lw a2, 0(sp)
8615; RV32IA-NEXT: beqz a0, .LBB205_1
8616; RV32IA-NEXT: # %bb.9: # %atomicrmw.end
8617; RV32IA-NEXT: mv a0, a2
8618; RV32IA-NEXT: lw s4, 12(sp)
8619; RV32IA-NEXT: lw s3, 16(sp)
8620; RV32IA-NEXT: lw s2, 20(sp)
8621; RV32IA-NEXT: lw s1, 24(sp)
8622; RV32IA-NEXT: lw ra, 28(sp)
8623; RV32IA-NEXT: addi sp, sp, 32
8624; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]8625 %1 = atomicrmw min i64* %a, i64 %b monotonic
8626 ret i64 %1
8627}
8628
8629define i64 @atomicrmw_min_i64_acquire(i64 *%a, i64 %b) nounwind {
8630; RV32I-LABEL: atomicrmw_min_i64_acquire:
8631; RV32I: # %bb.0:
8632; RV32I-NEXT: addi sp, sp, -32
8633; RV32I-NEXT: sw ra, 28(sp)
8634; RV32I-NEXT: sw s1, 24(sp)
8635; RV32I-NEXT: sw s2, 20(sp)
8636; RV32I-NEXT: sw s3, 16(sp)
8637; RV32I-NEXT: sw s4, 12(sp)
8638; RV32I-NEXT: sw s5, 8(sp)
8639; RV32I-NEXT: mv s1, a2
8640; RV32I-NEXT: mv s2, a1
8641; RV32I-NEXT: mv s3, a0
8642; RV32I-NEXT: lw a1, 4(a0)
8643; RV32I-NEXT: lw a2, 0(a0)
8644; RV32I-NEXT: mv s4, sp
8645; RV32I-NEXT: addi s5, zero, 2
8646; RV32I-NEXT: .LBB206_1: # %atomicrmw.start
8647; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
8648; RV32I-NEXT: beq a1, s1, .LBB206_3
8649; RV32I-NEXT: # %bb.2: # %atomicrmw.start
8650; RV32I-NEXT: # in Loop: Header=BB206_1 Depth=1
8651; RV32I-NEXT: slt a0, s1, a1
8652; RV32I-NEXT: j .LBB206_4
8653; RV32I-NEXT: .LBB206_3: # in Loop: Header=BB206_1 Depth=1
8654; RV32I-NEXT: sltu a0, s2, a2
8655; RV32I-NEXT: .LBB206_4: # %atomicrmw.start
8656; RV32I-NEXT: # in Loop: Header=BB206_1 Depth=1
8657; RV32I-NEXT: xori a0, a0, 1
8658; RV32I-NEXT: sw a2, 0(sp)
8659; RV32I-NEXT: bnez a0, .LBB206_6
8660; RV32I-NEXT: # %bb.5: # %atomicrmw.start
8661; RV32I-NEXT: # in Loop: Header=BB206_1 Depth=1
8662; RV32I-NEXT: mv a2, s2
8663; RV32I-NEXT: .LBB206_6: # %atomicrmw.start
8664; RV32I-NEXT: # in Loop: Header=BB206_1 Depth=1
8665; RV32I-NEXT: mv a3, a1
8666; RV32I-NEXT: bnez a0, .LBB206_8
8667; RV32I-NEXT: # %bb.7: # %atomicrmw.start
8668; RV32I-NEXT: # in Loop: Header=BB206_1 Depth=1
8669; RV32I-NEXT: mv a3, s1
8670; RV32I-NEXT: .LBB206_8: # %atomicrmw.start
8671; RV32I-NEXT: # in Loop: Header=BB206_1 Depth=1
8672; RV32I-NEXT: sw a1, 4(sp)
8673; RV32I-NEXT: mv a0, s3
8674; RV32I-NEXT: mv a1, s4
8675; RV32I-NEXT: mv a4, s5
8676; RV32I-NEXT: mv a5, s5
8677; RV32I-NEXT: call __atomic_compare_exchange_8
8678; RV32I-NEXT: lw a1, 4(sp)
8679; RV32I-NEXT: lw a2, 0(sp)
8680; RV32I-NEXT: beqz a0, .LBB206_1
8681; RV32I-NEXT: # %bb.9: # %atomicrmw.end
8682; RV32I-NEXT: mv a0, a2
8683; RV32I-NEXT: lw s5, 8(sp)
8684; RV32I-NEXT: lw s4, 12(sp)
8685; RV32I-NEXT: lw s3, 16(sp)
8686; RV32I-NEXT: lw s2, 20(sp)
8687; RV32I-NEXT: lw s1, 24(sp)
8688; RV32I-NEXT: lw ra, 28(sp)
8689; RV32I-NEXT: addi sp, sp, 32
8690; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]8691;
8692; RV32IA-LABEL: atomicrmw_min_i64_acquire:
8693; RV32IA: # %bb.0:
8694; RV32IA-NEXT: addi sp, sp, -32
8695; RV32IA-NEXT: sw ra, 28(sp)
8696; RV32IA-NEXT: sw s1, 24(sp)
8697; RV32IA-NEXT: sw s2, 20(sp)
8698; RV32IA-NEXT: sw s3, 16(sp)
8699; RV32IA-NEXT: sw s4, 12(sp)
8700; RV32IA-NEXT: sw s5, 8(sp)
8701; RV32IA-NEXT: mv s1, a2
8702; RV32IA-NEXT: mv s2, a1
8703; RV32IA-NEXT: mv s3, a0
8704; RV32IA-NEXT: lw a1, 4(a0)
8705; RV32IA-NEXT: lw a2, 0(a0)
8706; RV32IA-NEXT: mv s4, sp
8707; RV32IA-NEXT: addi s5, zero, 2
8708; RV32IA-NEXT: .LBB206_1: # %atomicrmw.start
8709; RV32IA-NEXT: # =>This Inner Loop Header: Depth=1
8710; RV32IA-NEXT: beq a1, s1, .LBB206_3
8711; RV32IA-NEXT: # %bb.2: # %atomicrmw.start
8712; RV32IA-NEXT: # in Loop: Header=BB206_1 Depth=1
8713; RV32IA-NEXT: slt a0, s1, a1
8714; RV32IA-NEXT: j .LBB206_4
8715; RV32IA-NEXT: .LBB206_3: # in Loop: Header=BB206_1 Depth=1
8716; RV32IA-NEXT: sltu a0, s2, a2
8717; RV32IA-NEXT: .LBB206_4: # %atomicrmw.start
8718; RV32IA-NEXT: # in Loop: Header=BB206_1 Depth=1
8719; RV32IA-NEXT: xori a0, a0, 1
8720; RV32IA-NEXT: sw a2, 0(sp)
8721; RV32IA-NEXT: bnez a0, .LBB206_6
8722; RV32IA-NEXT: # %bb.5: # %atomicrmw.start
8723; RV32IA-NEXT: # in Loop: Header=BB206_1 Depth=1
8724; RV32IA-NEXT: mv a2, s2
8725; RV32IA-NEXT: .LBB206_6: # %atomicrmw.start
8726; RV32IA-NEXT: # in Loop: Header=BB206_1 Depth=1
8727; RV32IA-NEXT: mv a3, a1
8728; RV32IA-NEXT: bnez a0, .LBB206_8
8729; RV32IA-NEXT: # %bb.7: # %atomicrmw.start
8730; RV32IA-NEXT: # in Loop: Header=BB206_1 Depth=1
8731; RV32IA-NEXT: mv a3, s1
8732; RV32IA-NEXT: .LBB206_8: # %atomicrmw.start
8733; RV32IA-NEXT: # in Loop: Header=BB206_1 Depth=1
8734; RV32IA-NEXT: sw a1, 4(sp)
8735; RV32IA-NEXT: mv a0, s3
8736; RV32IA-NEXT: mv a1, s4
8737; RV32IA-NEXT: mv a4, s5
8738; RV32IA-NEXT: mv a5, s5
8739; RV32IA-NEXT: call __atomic_compare_exchange_8
8740; RV32IA-NEXT: lw a1, 4(sp)
8741; RV32IA-NEXT: lw a2, 0(sp)
8742; RV32IA-NEXT: beqz a0, .LBB206_1
8743; RV32IA-NEXT: # %bb.9: # %atomicrmw.end
8744; RV32IA-NEXT: mv a0, a2
8745; RV32IA-NEXT: lw s5, 8(sp)
8746; RV32IA-NEXT: lw s4, 12(sp)
8747; RV32IA-NEXT: lw s3, 16(sp)
8748; RV32IA-NEXT: lw s2, 20(sp)
8749; RV32IA-NEXT: lw s1, 24(sp)
8750; RV32IA-NEXT: lw ra, 28(sp)
8751; RV32IA-NEXT: addi sp, sp, 32
8752; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]8753 %1 = atomicrmw min i64* %a, i64 %b acquire
8754 ret i64 %1
8755}
8756
8757define i64 @atomicrmw_min_i64_release(i64 *%a, i64 %b) nounwind {
8758; RV32I-LABEL: atomicrmw_min_i64_release:
8759; RV32I: # %bb.0:
8760; RV32I-NEXT: addi sp, sp, -32
8761; RV32I-NEXT: sw ra, 28(sp)
8762; RV32I-NEXT: sw s1, 24(sp)
8763; RV32I-NEXT: sw s2, 20(sp)
8764; RV32I-NEXT: sw s3, 16(sp)
8765; RV32I-NEXT: sw s4, 12(sp)
8766; RV32I-NEXT: sw s5, 8(sp)
8767; RV32I-NEXT: mv s1, a2
8768; RV32I-NEXT: mv s2, a1
8769; RV32I-NEXT: mv s3, a0
8770; RV32I-NEXT: lw a1, 4(a0)
8771; RV32I-NEXT: lw a2, 0(a0)
8772; RV32I-NEXT: mv s4, sp
8773; RV32I-NEXT: addi s5, zero, 3
8774; RV32I-NEXT: .LBB207_1: # %atomicrmw.start
8775; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
8776; RV32I-NEXT: beq a1, s1, .LBB207_3
8777; RV32I-NEXT: # %bb.2: # %atomicrmw.start
8778; RV32I-NEXT: # in Loop: Header=BB207_1 Depth=1
8779; RV32I-NEXT: slt a0, s1, a1
8780; RV32I-NEXT: j .LBB207_4
8781; RV32I-NEXT: .LBB207_3: # in Loop: Header=BB207_1 Depth=1
8782; RV32I-NEXT: sltu a0, s2, a2
8783; RV32I-NEXT: .LBB207_4: # %atomicrmw.start
8784; RV32I-NEXT: # in Loop: Header=BB207_1 Depth=1
8785; RV32I-NEXT: xori a0, a0, 1
8786; RV32I-NEXT: sw a2, 0(sp)
8787; RV32I-NEXT: bnez a0, .LBB207_6
8788; RV32I-NEXT: # %bb.5: # %atomicrmw.start
8789; RV32I-NEXT: # in Loop: Header=BB207_1 Depth=1
8790; RV32I-NEXT: mv a2, s2
8791; RV32I-NEXT: .LBB207_6: # %atomicrmw.start
8792; RV32I-NEXT: # in Loop: Header=BB207_1 Depth=1
8793; RV32I-NEXT: mv a3, a1
8794; RV32I-NEXT: bnez a0, .LBB207_8
8795; RV32I-NEXT: # %bb.7: # %atomicrmw.start
8796; RV32I-NEXT: # in Loop: Header=BB207_1 Depth=1
8797; RV32I-NEXT: mv a3, s1
8798; RV32I-NEXT: .LBB207_8: # %atomicrmw.start
8799; RV32I-NEXT: # in Loop: Header=BB207_1 Depth=1
8800; RV32I-NEXT: sw a1, 4(sp)
8801; RV32I-NEXT: mv a0, s3
8802; RV32I-NEXT: mv a1, s4
8803; RV32I-NEXT: mv a4, s5
8804; RV32I-NEXT: mv a5, zero
8805; RV32I-NEXT: call __atomic_compare_exchange_8
8806; RV32I-NEXT: lw a1, 4(sp)
8807; RV32I-NEXT: lw a2, 0(sp)
8808; RV32I-NEXT: beqz a0, .LBB207_1
8809; RV32I-NEXT: # %bb.9: # %atomicrmw.end
8810; RV32I-NEXT: mv a0, a2
8811; RV32I-NEXT: lw s5, 8(sp)
8812; RV32I-NEXT: lw s4, 12(sp)
8813; RV32I-NEXT: lw s3, 16(sp)
8814; RV32I-NEXT: lw s2, 20(sp)
8815; RV32I-NEXT: lw s1, 24(sp)
8816; RV32I-NEXT: lw ra, 28(sp)
8817; RV32I-NEXT: addi sp, sp, 32
8818; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]8819;
8820; RV32IA-LABEL: atomicrmw_min_i64_release:
8821; RV32IA: # %bb.0:
8822; RV32IA-NEXT: addi sp, sp, -32
8823; RV32IA-NEXT: sw ra, 28(sp)
8824; RV32IA-NEXT: sw s1, 24(sp)
8825; RV32IA-NEXT: sw s2, 20(sp)
8826; RV32IA-NEXT: sw s3, 16(sp)
8827; RV32IA-NEXT: sw s4, 12(sp)
8828; RV32IA-NEXT: sw s5, 8(sp)
8829; RV32IA-NEXT: mv s1, a2
8830; RV32IA-NEXT: mv s2, a1
8831; RV32IA-NEXT: mv s3, a0
8832; RV32IA-NEXT: lw a1, 4(a0)
8833; RV32IA-NEXT: lw a2, 0(a0)
8834; RV32IA-NEXT: mv s4, sp
8835; RV32IA-NEXT: addi s5, zero, 3
8836; RV32IA-NEXT: .LBB207_1: # %atomicrmw.start
8837; RV32IA-NEXT: # =>This Inner Loop Header: Depth=1
8838; RV32IA-NEXT: beq a1, s1, .LBB207_3
8839; RV32IA-NEXT: # %bb.2: # %atomicrmw.start
8840; RV32IA-NEXT: # in Loop: Header=BB207_1 Depth=1
8841; RV32IA-NEXT: slt a0, s1, a1
8842; RV32IA-NEXT: j .LBB207_4
8843; RV32IA-NEXT: .LBB207_3: # in Loop: Header=BB207_1 Depth=1
8844; RV32IA-NEXT: sltu a0, s2, a2
8845; RV32IA-NEXT: .LBB207_4: # %atomicrmw.start
8846; RV32IA-NEXT: # in Loop: Header=BB207_1 Depth=1
8847; RV32IA-NEXT: xori a0, a0, 1
8848; RV32IA-NEXT: sw a2, 0(sp)
8849; RV32IA-NEXT: bnez a0, .LBB207_6
8850; RV32IA-NEXT: # %bb.5: # %atomicrmw.start
8851; RV32IA-NEXT: # in Loop: Header=BB207_1 Depth=1
8852; RV32IA-NEXT: mv a2, s2
8853; RV32IA-NEXT: .LBB207_6: # %atomicrmw.start
8854; RV32IA-NEXT: # in Loop: Header=BB207_1 Depth=1
8855; RV32IA-NEXT: mv a3, a1
8856; RV32IA-NEXT: bnez a0, .LBB207_8
8857; RV32IA-NEXT: # %bb.7: # %atomicrmw.start
8858; RV32IA-NEXT: # in Loop: Header=BB207_1 Depth=1
8859; RV32IA-NEXT: mv a3, s1
8860; RV32IA-NEXT: .LBB207_8: # %atomicrmw.start
8861; RV32IA-NEXT: # in Loop: Header=BB207_1 Depth=1
8862; RV32IA-NEXT: sw a1, 4(sp)
8863; RV32IA-NEXT: mv a0, s3
8864; RV32IA-NEXT: mv a1, s4
8865; RV32IA-NEXT: mv a4, s5
8866; RV32IA-NEXT: mv a5, zero
8867; RV32IA-NEXT: call __atomic_compare_exchange_8
8868; RV32IA-NEXT: lw a1, 4(sp)
8869; RV32IA-NEXT: lw a2, 0(sp)
8870; RV32IA-NEXT: beqz a0, .LBB207_1
8871; RV32IA-NEXT: # %bb.9: # %atomicrmw.end
8872; RV32IA-NEXT: mv a0, a2
8873; RV32IA-NEXT: lw s5, 8(sp)
8874; RV32IA-NEXT: lw s4, 12(sp)
8875; RV32IA-NEXT: lw s3, 16(sp)
8876; RV32IA-NEXT: lw s2, 20(sp)
8877; RV32IA-NEXT: lw s1, 24(sp)
8878; RV32IA-NEXT: lw ra, 28(sp)
8879; RV32IA-NEXT: addi sp, sp, 32
8880; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]8881 %1 = atomicrmw min i64* %a, i64 %b release
8882 ret i64 %1
8883}
8884
8885define i64 @atomicrmw_min_i64_acq_rel(i64 *%a, i64 %b) nounwind {
8886; RV32I-LABEL: atomicrmw_min_i64_acq_rel:
8887; RV32I: # %bb.0:
8888; RV32I-NEXT: addi sp, sp, -48
8889; RV32I-NEXT: sw ra, 44(sp)
8890; RV32I-NEXT: sw s1, 40(sp)
8891; RV32I-NEXT: sw s2, 36(sp)
8892; RV32I-NEXT: sw s3, 32(sp)
8893; RV32I-NEXT: sw s4, 28(sp)
8894; RV32I-NEXT: sw s5, 24(sp)
8895; RV32I-NEXT: sw s6, 20(sp)
8896; RV32I-NEXT: mv s1, a2
8897; RV32I-NEXT: mv s2, a1
8898; RV32I-NEXT: mv s3, a0
8899; RV32I-NEXT: lw a1, 4(a0)
8900; RV32I-NEXT: lw a2, 0(a0)
8901; RV32I-NEXT: addi s4, sp, 8
8902; RV32I-NEXT: addi s5, zero, 4
8903; RV32I-NEXT: addi s6, zero, 2
8904; RV32I-NEXT: .LBB208_1: # %atomicrmw.start
8905; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
8906; RV32I-NEXT: beq a1, s1, .LBB208_3
8907; RV32I-NEXT: # %bb.2: # %atomicrmw.start
8908; RV32I-NEXT: # in Loop: Header=BB208_1 Depth=1
8909; RV32I-NEXT: slt a0, s1, a1
8910; RV32I-NEXT: j .LBB208_4
8911; RV32I-NEXT: .LBB208_3: # in Loop: Header=BB208_1 Depth=1
8912; RV32I-NEXT: sltu a0, s2, a2
8913; RV32I-NEXT: .LBB208_4: # %atomicrmw.start
8914; RV32I-NEXT: # in Loop: Header=BB208_1 Depth=1
8915; RV32I-NEXT: xori a0, a0, 1
8916; RV32I-NEXT: sw a2, 8(sp)
8917; RV32I-NEXT: bnez a0, .LBB208_6
8918; RV32I-NEXT: # %bb.5: # %atomicrmw.start
8919; RV32I-NEXT: # in Loop: Header=BB208_1 Depth=1
8920; RV32I-NEXT: mv a2, s2
8921; RV32I-NEXT: .LBB208_6: # %atomicrmw.start
8922; RV32I-NEXT: # in Loop: Header=BB208_1 Depth=1
8923; RV32I-NEXT: mv a3, a1
8924; RV32I-NEXT: bnez a0, .LBB208_8
8925; RV32I-NEXT: # %bb.7: # %atomicrmw.start
8926; RV32I-NEXT: # in Loop: Header=BB208_1 Depth=1
8927; RV32I-NEXT: mv a3, s1
8928; RV32I-NEXT: .LBB208_8: # %atomicrmw.start
8929; RV32I-NEXT: # in Loop: Header=BB208_1 Depth=1
8930; RV32I-NEXT: sw a1, 12(sp)
8931; RV32I-NEXT: mv a0, s3
8932; RV32I-NEXT: mv a1, s4
8933; RV32I-NEXT: mv a4, s5
8934; RV32I-NEXT: mv a5, s6
8935; RV32I-NEXT: call __atomic_compare_exchange_8
8936; RV32I-NEXT: lw a1, 12(sp)
8937; RV32I-NEXT: lw a2, 8(sp)
8938; RV32I-NEXT: beqz a0, .LBB208_1
8939; RV32I-NEXT: # %bb.9: # %atomicrmw.end
8940; RV32I-NEXT: mv a0, a2
8941; RV32I-NEXT: lw s6, 20(sp)
8942; RV32I-NEXT: lw s5, 24(sp)
8943; RV32I-NEXT: lw s4, 28(sp)
8944; RV32I-NEXT: lw s3, 32(sp)
8945; RV32I-NEXT: lw s2, 36(sp)
8946; RV32I-NEXT: lw s1, 40(sp)
8947; RV32I-NEXT: lw ra, 44(sp)
8948; RV32I-NEXT: addi sp, sp, 48
8949; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]8950;
8951; RV32IA-LABEL: atomicrmw_min_i64_acq_rel:
8952; RV32IA: # %bb.0:
8953; RV32IA-NEXT: addi sp, sp, -48
8954; RV32IA-NEXT: sw ra, 44(sp)
8955; RV32IA-NEXT: sw s1, 40(sp)
8956; RV32IA-NEXT: sw s2, 36(sp)
8957; RV32IA-NEXT: sw s3, 32(sp)
8958; RV32IA-NEXT: sw s4, 28(sp)
8959; RV32IA-NEXT: sw s5, 24(sp)
8960; RV32IA-NEXT: sw s6, 20(sp)
8961; RV32IA-NEXT: mv s1, a2
8962; RV32IA-NEXT: mv s2, a1
8963; RV32IA-NEXT: mv s3, a0
8964; RV32IA-NEXT: lw a1, 4(a0)
8965; RV32IA-NEXT: lw a2, 0(a0)
8966; RV32IA-NEXT: addi s4, sp, 8
8967; RV32IA-NEXT: addi s5, zero, 4
8968; RV32IA-NEXT: addi s6, zero, 2
8969; RV32IA-NEXT: .LBB208_1: # %atomicrmw.start
8970; RV32IA-NEXT: # =>This Inner Loop Header: Depth=1
8971; RV32IA-NEXT: beq a1, s1, .LBB208_3
8972; RV32IA-NEXT: # %bb.2: # %atomicrmw.start
8973; RV32IA-NEXT: # in Loop: Header=BB208_1 Depth=1
8974; RV32IA-NEXT: slt a0, s1, a1
8975; RV32IA-NEXT: j .LBB208_4
8976; RV32IA-NEXT: .LBB208_3: # in Loop: Header=BB208_1 Depth=1
8977; RV32IA-NEXT: sltu a0, s2, a2
8978; RV32IA-NEXT: .LBB208_4: # %atomicrmw.start
8979; RV32IA-NEXT: # in Loop: Header=BB208_1 Depth=1
8980; RV32IA-NEXT: xori a0, a0, 1
8981; RV32IA-NEXT: sw a2, 8(sp)
8982; RV32IA-NEXT: bnez a0, .LBB208_6
8983; RV32IA-NEXT: # %bb.5: # %atomicrmw.start
8984; RV32IA-NEXT: # in Loop: Header=BB208_1 Depth=1
8985; RV32IA-NEXT: mv a2, s2
8986; RV32IA-NEXT: .LBB208_6: # %atomicrmw.start
8987; RV32IA-NEXT: # in Loop: Header=BB208_1 Depth=1
8988; RV32IA-NEXT: mv a3, a1
8989; RV32IA-NEXT: bnez a0, .LBB208_8
8990; RV32IA-NEXT: # %bb.7: # %atomicrmw.start
8991; RV32IA-NEXT: # in Loop: Header=BB208_1 Depth=1
8992; RV32IA-NEXT: mv a3, s1
8993; RV32IA-NEXT: .LBB208_8: # %atomicrmw.start
8994; RV32IA-NEXT: # in Loop: Header=BB208_1 Depth=1
8995; RV32IA-NEXT: sw a1, 12(sp)
8996; RV32IA-NEXT: mv a0, s3
8997; RV32IA-NEXT: mv a1, s4
8998; RV32IA-NEXT: mv a4, s5
8999; RV32IA-NEXT: mv a5, s6
9000; RV32IA-NEXT: call __atomic_compare_exchange_8
9001; RV32IA-NEXT: lw a1, 12(sp)
9002; RV32IA-NEXT: lw a2, 8(sp)
9003; RV32IA-NEXT: beqz a0, .LBB208_1
9004; RV32IA-NEXT: # %bb.9: # %atomicrmw.end
9005; RV32IA-NEXT: mv a0, a2
9006; RV32IA-NEXT: lw s6, 20(sp)
9007; RV32IA-NEXT: lw s5, 24(sp)
9008; RV32IA-NEXT: lw s4, 28(sp)
9009; RV32IA-NEXT: lw s3, 32(sp)
9010; RV32IA-NEXT: lw s2, 36(sp)
9011; RV32IA-NEXT: lw s1, 40(sp)
9012; RV32IA-NEXT: lw ra, 44(sp)
9013; RV32IA-NEXT: addi sp, sp, 48
9014; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]9015 %1 = atomicrmw min i64* %a, i64 %b acq_rel
9016 ret i64 %1
9017}
9018
9019define i64 @atomicrmw_min_i64_seq_cst(i64 *%a, i64 %b) nounwind {
9020; RV32I-LABEL: atomicrmw_min_i64_seq_cst:
9021; RV32I: # %bb.0:
9022; RV32I-NEXT: addi sp, sp, -32
9023; RV32I-NEXT: sw ra, 28(sp)
9024; RV32I-NEXT: sw s1, 24(sp)
9025; RV32I-NEXT: sw s2, 20(sp)
9026; RV32I-NEXT: sw s3, 16(sp)
9027; RV32I-NEXT: sw s4, 12(sp)
9028; RV32I-NEXT: sw s5, 8(sp)
9029; RV32I-NEXT: mv s1, a2
9030; RV32I-NEXT: mv s2, a1
9031; RV32I-NEXT: mv s3, a0
9032; RV32I-NEXT: lw a1, 4(a0)
9033; RV32I-NEXT: lw a2, 0(a0)
9034; RV32I-NEXT: mv s4, sp
9035; RV32I-NEXT: addi s5, zero, 5
9036; RV32I-NEXT: .LBB209_1: # %atomicrmw.start
9037; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
9038; RV32I-NEXT: beq a1, s1, .LBB209_3
9039; RV32I-NEXT: # %bb.2: # %atomicrmw.start
9040; RV32I-NEXT: # in Loop: Header=BB209_1 Depth=1
9041; RV32I-NEXT: slt a0, s1, a1
9042; RV32I-NEXT: j .LBB209_4
9043; RV32I-NEXT: .LBB209_3: # in Loop: Header=BB209_1 Depth=1
9044; RV32I-NEXT: sltu a0, s2, a2
9045; RV32I-NEXT: .LBB209_4: # %atomicrmw.start
9046; RV32I-NEXT: # in Loop: Header=BB209_1 Depth=1
9047; RV32I-NEXT: xori a0, a0, 1
9048; RV32I-NEXT: sw a2, 0(sp)
9049; RV32I-NEXT: bnez a0, .LBB209_6
9050; RV32I-NEXT: # %bb.5: # %atomicrmw.start
9051; RV32I-NEXT: # in Loop: Header=BB209_1 Depth=1
9052; RV32I-NEXT: mv a2, s2
9053; RV32I-NEXT: .LBB209_6: # %atomicrmw.start
9054; RV32I-NEXT: # in Loop: Header=BB209_1 Depth=1
9055; RV32I-NEXT: mv a3, a1
9056; RV32I-NEXT: bnez a0, .LBB209_8
9057; RV32I-NEXT: # %bb.7: # %atomicrmw.start
9058; RV32I-NEXT: # in Loop: Header=BB209_1 Depth=1
9059; RV32I-NEXT: mv a3, s1
9060; RV32I-NEXT: .LBB209_8: # %atomicrmw.start
9061; RV32I-NEXT: # in Loop: Header=BB209_1 Depth=1
9062; RV32I-NEXT: sw a1, 4(sp)
9063; RV32I-NEXT: mv a0, s3
9064; RV32I-NEXT: mv a1, s4
9065; RV32I-NEXT: mv a4, s5
9066; RV32I-NEXT: mv a5, s5
9067; RV32I-NEXT: call __atomic_compare_exchange_8
9068; RV32I-NEXT: lw a1, 4(sp)
9069; RV32I-NEXT: lw a2, 0(sp)
9070; RV32I-NEXT: beqz a0, .LBB209_1
9071; RV32I-NEXT: # %bb.9: # %atomicrmw.end
9072; RV32I-NEXT: mv a0, a2
9073; RV32I-NEXT: lw s5, 8(sp)
9074; RV32I-NEXT: lw s4, 12(sp)
9075; RV32I-NEXT: lw s3, 16(sp)
9076; RV32I-NEXT: lw s2, 20(sp)
9077; RV32I-NEXT: lw s1, 24(sp)
9078; RV32I-NEXT: lw ra, 28(sp)
9079; RV32I-NEXT: addi sp, sp, 32
9080; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]9081;
9082; RV32IA-LABEL: atomicrmw_min_i64_seq_cst:
9083; RV32IA: # %bb.0:
9084; RV32IA-NEXT: addi sp, sp, -32
9085; RV32IA-NEXT: sw ra, 28(sp)
9086; RV32IA-NEXT: sw s1, 24(sp)
9087; RV32IA-NEXT: sw s2, 20(sp)
9088; RV32IA-NEXT: sw s3, 16(sp)
9089; RV32IA-NEXT: sw s4, 12(sp)
9090; RV32IA-NEXT: sw s5, 8(sp)
9091; RV32IA-NEXT: mv s1, a2
9092; RV32IA-NEXT: mv s2, a1
9093; RV32IA-NEXT: mv s3, a0
9094; RV32IA-NEXT: lw a1, 4(a0)
9095; RV32IA-NEXT: lw a2, 0(a0)
9096; RV32IA-NEXT: mv s4, sp
9097; RV32IA-NEXT: addi s5, zero, 5
9098; RV32IA-NEXT: .LBB209_1: # %atomicrmw.start
9099; RV32IA-NEXT: # =>This Inner Loop Header: Depth=1
9100; RV32IA-NEXT: beq a1, s1, .LBB209_3
9101; RV32IA-NEXT: # %bb.2: # %atomicrmw.start
9102; RV32IA-NEXT: # in Loop: Header=BB209_1 Depth=1
9103; RV32IA-NEXT: slt a0, s1, a1
9104; RV32IA-NEXT: j .LBB209_4
9105; RV32IA-NEXT: .LBB209_3: # in Loop: Header=BB209_1 Depth=1
9106; RV32IA-NEXT: sltu a0, s2, a2
9107; RV32IA-NEXT: .LBB209_4: # %atomicrmw.start
9108; RV32IA-NEXT: # in Loop: Header=BB209_1 Depth=1
9109; RV32IA-NEXT: xori a0, a0, 1
9110; RV32IA-NEXT: sw a2, 0(sp)
9111; RV32IA-NEXT: bnez a0, .LBB209_6
9112; RV32IA-NEXT: # %bb.5: # %atomicrmw.start
9113; RV32IA-NEXT: # in Loop: Header=BB209_1 Depth=1
9114; RV32IA-NEXT: mv a2, s2
9115; RV32IA-NEXT: .LBB209_6: # %atomicrmw.start
9116; RV32IA-NEXT: # in Loop: Header=BB209_1 Depth=1
9117; RV32IA-NEXT: mv a3, a1
9118; RV32IA-NEXT: bnez a0, .LBB209_8
9119; RV32IA-NEXT: # %bb.7: # %atomicrmw.start
9120; RV32IA-NEXT: # in Loop: Header=BB209_1 Depth=1
9121; RV32IA-NEXT: mv a3, s1
9122; RV32IA-NEXT: .LBB209_8: # %atomicrmw.start
9123; RV32IA-NEXT: # in Loop: Header=BB209_1 Depth=1
9124; RV32IA-NEXT: sw a1, 4(sp)
9125; RV32IA-NEXT: mv a0, s3
9126; RV32IA-NEXT: mv a1, s4
9127; RV32IA-NEXT: mv a4, s5
9128; RV32IA-NEXT: mv a5, s5
9129; RV32IA-NEXT: call __atomic_compare_exchange_8
9130; RV32IA-NEXT: lw a1, 4(sp)
9131; RV32IA-NEXT: lw a2, 0(sp)
9132; RV32IA-NEXT: beqz a0, .LBB209_1
9133; RV32IA-NEXT: # %bb.9: # %atomicrmw.end
9134; RV32IA-NEXT: mv a0, a2
9135; RV32IA-NEXT: lw s5, 8(sp)
9136; RV32IA-NEXT: lw s4, 12(sp)
9137; RV32IA-NEXT: lw s3, 16(sp)
9138; RV32IA-NEXT: lw s2, 20(sp)
9139; RV32IA-NEXT: lw s1, 24(sp)
9140; RV32IA-NEXT: lw ra, 28(sp)
9141; RV32IA-NEXT: addi sp, sp, 32
9142; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]9143 %1 = atomicrmw min i64* %a, i64 %b seq_cst
9144 ret i64 %1
9145}
9146
9147define i64 @atomicrmw_umax_i64_monotonic(i64 *%a, i64 %b) nounwind {
9148; RV32I-LABEL: atomicrmw_umax_i64_monotonic:
9149; RV32I: # %bb.0:
9150; RV32I-NEXT: addi sp, sp, -32
9151; RV32I-NEXT: sw ra, 28(sp)
9152; RV32I-NEXT: sw s1, 24(sp)
9153; RV32I-NEXT: sw s2, 20(sp)
9154; RV32I-NEXT: sw s3, 16(sp)
9155; RV32I-NEXT: sw s4, 12(sp)
9156; RV32I-NEXT: mv s1, a2
9157; RV32I-NEXT: mv s2, a1
9158; RV32I-NEXT: mv s3, a0
9159; RV32I-NEXT: lw a1, 4(a0)
9160; RV32I-NEXT: lw a2, 0(a0)
9161; RV32I-NEXT: mv s4, sp
9162; RV32I-NEXT: .LBB210_1: # %atomicrmw.start
9163; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
9164; RV32I-NEXT: beq a1, s1, .LBB210_3
9165; RV32I-NEXT: # %bb.2: # %atomicrmw.start
9166; RV32I-NEXT: # in Loop: Header=BB210_1 Depth=1
9167; RV32I-NEXT: sltu a0, s1, a1
9168; RV32I-NEXT: sw a2, 0(sp)
9169; RV32I-NEXT: beqz a0, .LBB210_4
9170; RV32I-NEXT: j .LBB210_5
9171; RV32I-NEXT: .LBB210_3: # in Loop: Header=BB210_1 Depth=1
9172; RV32I-NEXT: sltu a0, s2, a2
9173; RV32I-NEXT: sw a2, 0(sp)
9174; RV32I-NEXT: bnez a0, .LBB210_5
9175; RV32I-NEXT: .LBB210_4: # %atomicrmw.start
9176; RV32I-NEXT: # in Loop: Header=BB210_1 Depth=1
9177; RV32I-NEXT: mv a2, s2
9178; RV32I-NEXT: .LBB210_5: # %atomicrmw.start
9179; RV32I-NEXT: # in Loop: Header=BB210_1 Depth=1
9180; RV32I-NEXT: mv a3, a1
9181; RV32I-NEXT: bnez a0, .LBB210_7
9182; RV32I-NEXT: # %bb.6: # %atomicrmw.start
9183; RV32I-NEXT: # in Loop: Header=BB210_1 Depth=1
9184; RV32I-NEXT: mv a3, s1
9185; RV32I-NEXT: .LBB210_7: # %atomicrmw.start
9186; RV32I-NEXT: # in Loop: Header=BB210_1 Depth=1
9187; RV32I-NEXT: sw a1, 4(sp)
9188; RV32I-NEXT: mv a0, s3
9189; RV32I-NEXT: mv a1, s4
9190; RV32I-NEXT: mv a4, zero
9191; RV32I-NEXT: mv a5, zero
9192; RV32I-NEXT: call __atomic_compare_exchange_8
9193; RV32I-NEXT: lw a1, 4(sp)
9194; RV32I-NEXT: lw a2, 0(sp)
9195; RV32I-NEXT: beqz a0, .LBB210_1
9196; RV32I-NEXT: # %bb.8: # %atomicrmw.end
9197; RV32I-NEXT: mv a0, a2
9198; RV32I-NEXT: lw s4, 12(sp)
9199; RV32I-NEXT: lw s3, 16(sp)
9200; RV32I-NEXT: lw s2, 20(sp)
9201; RV32I-NEXT: lw s1, 24(sp)
9202; RV32I-NEXT: lw ra, 28(sp)
9203; RV32I-NEXT: addi sp, sp, 32
9204; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]9205;
9206; RV32IA-LABEL: atomicrmw_umax_i64_monotonic:
9207; RV32IA: # %bb.0:
9208; RV32IA-NEXT: addi sp, sp, -32
9209; RV32IA-NEXT: sw ra, 28(sp)
9210; RV32IA-NEXT: sw s1, 24(sp)
9211; RV32IA-NEXT: sw s2, 20(sp)
9212; RV32IA-NEXT: sw s3, 16(sp)
9213; RV32IA-NEXT: sw s4, 12(sp)
9214; RV32IA-NEXT: mv s1, a2
9215; RV32IA-NEXT: mv s2, a1
9216; RV32IA-NEXT: mv s3, a0
9217; RV32IA-NEXT: lw a1, 4(a0)
9218; RV32IA-NEXT: lw a2, 0(a0)
9219; RV32IA-NEXT: mv s4, sp
9220; RV32IA-NEXT: .LBB210_1: # %atomicrmw.start
9221; RV32IA-NEXT: # =>This Inner Loop Header: Depth=1
9222; RV32IA-NEXT: beq a1, s1, .LBB210_3
9223; RV32IA-NEXT: # %bb.2: # %atomicrmw.start
9224; RV32IA-NEXT: # in Loop: Header=BB210_1 Depth=1
9225; RV32IA-NEXT: sltu a0, s1, a1
9226; RV32IA-NEXT: sw a2, 0(sp)
9227; RV32IA-NEXT: beqz a0, .LBB210_4
9228; RV32IA-NEXT: j .LBB210_5
9229; RV32IA-NEXT: .LBB210_3: # in Loop: Header=BB210_1 Depth=1
9230; RV32IA-NEXT: sltu a0, s2, a2
9231; RV32IA-NEXT: sw a2, 0(sp)
9232; RV32IA-NEXT: bnez a0, .LBB210_5
9233; RV32IA-NEXT: .LBB210_4: # %atomicrmw.start
9234; RV32IA-NEXT: # in Loop: Header=BB210_1 Depth=1
9235; RV32IA-NEXT: mv a2, s2
9236; RV32IA-NEXT: .LBB210_5: # %atomicrmw.start
9237; RV32IA-NEXT: # in Loop: Header=BB210_1 Depth=1
9238; RV32IA-NEXT: mv a3, a1
9239; RV32IA-NEXT: bnez a0, .LBB210_7
9240; RV32IA-NEXT: # %bb.6: # %atomicrmw.start
9241; RV32IA-NEXT: # in Loop: Header=BB210_1 Depth=1
9242; RV32IA-NEXT: mv a3, s1
9243; RV32IA-NEXT: .LBB210_7: # %atomicrmw.start
9244; RV32IA-NEXT: # in Loop: Header=BB210_1 Depth=1
9245; RV32IA-NEXT: sw a1, 4(sp)
9246; RV32IA-NEXT: mv a0, s3
9247; RV32IA-NEXT: mv a1, s4
9248; RV32IA-NEXT: mv a4, zero
9249; RV32IA-NEXT: mv a5, zero
9250; RV32IA-NEXT: call __atomic_compare_exchange_8
9251; RV32IA-NEXT: lw a1, 4(sp)
9252; RV32IA-NEXT: lw a2, 0(sp)
9253; RV32IA-NEXT: beqz a0, .LBB210_1
9254; RV32IA-NEXT: # %bb.8: # %atomicrmw.end
9255; RV32IA-NEXT: mv a0, a2
9256; RV32IA-NEXT: lw s4, 12(sp)
9257; RV32IA-NEXT: lw s3, 16(sp)
9258; RV32IA-NEXT: lw s2, 20(sp)
9259; RV32IA-NEXT: lw s1, 24(sp)
9260; RV32IA-NEXT: lw ra, 28(sp)
9261; RV32IA-NEXT: addi sp, sp, 32
9262; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]9263 %1 = atomicrmw umax i64* %a, i64 %b monotonic
9264 ret i64 %1
9265}
9266
9267define i64 @atomicrmw_umax_i64_acquire(i64 *%a, i64 %b) nounwind {
9268; RV32I-LABEL: atomicrmw_umax_i64_acquire:
9269; RV32I: # %bb.0:
9270; RV32I-NEXT: addi sp, sp, -32
9271; RV32I-NEXT: sw ra, 28(sp)
9272; RV32I-NEXT: sw s1, 24(sp)
9273; RV32I-NEXT: sw s2, 20(sp)
9274; RV32I-NEXT: sw s3, 16(sp)
9275; RV32I-NEXT: sw s4, 12(sp)
9276; RV32I-NEXT: sw s5, 8(sp)
9277; RV32I-NEXT: mv s1, a2
9278; RV32I-NEXT: mv s2, a1
9279; RV32I-NEXT: mv s3, a0
9280; RV32I-NEXT: lw a1, 4(a0)
9281; RV32I-NEXT: lw a2, 0(a0)
9282; RV32I-NEXT: mv s4, sp
9283; RV32I-NEXT: addi s5, zero, 2
9284; RV32I-NEXT: .LBB211_1: # %atomicrmw.start
9285; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
9286; RV32I-NEXT: beq a1, s1, .LBB211_3
9287; RV32I-NEXT: # %bb.2: # %atomicrmw.start
9288; RV32I-NEXT: # in Loop: Header=BB211_1 Depth=1
9289; RV32I-NEXT: sltu a0, s1, a1
9290; RV32I-NEXT: sw a2, 0(sp)
9291; RV32I-NEXT: beqz a0, .LBB211_4
9292; RV32I-NEXT: j .LBB211_5
9293; RV32I-NEXT: .LBB211_3: # in Loop: Header=BB211_1 Depth=1
9294; RV32I-NEXT: sltu a0, s2, a2
9295; RV32I-NEXT: sw a2, 0(sp)
9296; RV32I-NEXT: bnez a0, .LBB211_5
9297; RV32I-NEXT: .LBB211_4: # %atomicrmw.start
9298; RV32I-NEXT: # in Loop: Header=BB211_1 Depth=1
9299; RV32I-NEXT: mv a2, s2
9300; RV32I-NEXT: .LBB211_5: # %atomicrmw.start
9301; RV32I-NEXT: # in Loop: Header=BB211_1 Depth=1
9302; RV32I-NEXT: mv a3, a1
9303; RV32I-NEXT: bnez a0, .LBB211_7
9304; RV32I-NEXT: # %bb.6: # %atomicrmw.start
9305; RV32I-NEXT: # in Loop: Header=BB211_1 Depth=1
9306; RV32I-NEXT: mv a3, s1
9307; RV32I-NEXT: .LBB211_7: # %atomicrmw.start
9308; RV32I-NEXT: # in Loop: Header=BB211_1 Depth=1
9309; RV32I-NEXT: sw a1, 4(sp)
9310; RV32I-NEXT: mv a0, s3
9311; RV32I-NEXT: mv a1, s4
9312; RV32I-NEXT: mv a4, s5
9313; RV32I-NEXT: mv a5, s5
9314; RV32I-NEXT: call __atomic_compare_exchange_8
9315; RV32I-NEXT: lw a1, 4(sp)
9316; RV32I-NEXT: lw a2, 0(sp)
9317; RV32I-NEXT: beqz a0, .LBB211_1
9318; RV32I-NEXT: # %bb.8: # %atomicrmw.end
9319; RV32I-NEXT: mv a0, a2
9320; RV32I-NEXT: lw s5, 8(sp)
9321; RV32I-NEXT: lw s4, 12(sp)
9322; RV32I-NEXT: lw s3, 16(sp)
9323; RV32I-NEXT: lw s2, 20(sp)
9324; RV32I-NEXT: lw s1, 24(sp)
9325; RV32I-NEXT: lw ra, 28(sp)
9326; RV32I-NEXT: addi sp, sp, 32
9327; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]9328;
9329; RV32IA-LABEL: atomicrmw_umax_i64_acquire:
9330; RV32IA: # %bb.0:
9331; RV32IA-NEXT: addi sp, sp, -32
9332; RV32IA-NEXT: sw ra, 28(sp)
9333; RV32IA-NEXT: sw s1, 24(sp)
9334; RV32IA-NEXT: sw s2, 20(sp)
9335; RV32IA-NEXT: sw s3, 16(sp)
9336; RV32IA-NEXT: sw s4, 12(sp)
9337; RV32IA-NEXT: sw s5, 8(sp)
9338; RV32IA-NEXT: mv s1, a2
9339; RV32IA-NEXT: mv s2, a1
9340; RV32IA-NEXT: mv s3, a0
9341; RV32IA-NEXT: lw a1, 4(a0)
9342; RV32IA-NEXT: lw a2, 0(a0)
9343; RV32IA-NEXT: mv s4, sp
9344; RV32IA-NEXT: addi s5, zero, 2
9345; RV32IA-NEXT: .LBB211_1: # %atomicrmw.start
9346; RV32IA-NEXT: # =>This Inner Loop Header: Depth=1
9347; RV32IA-NEXT: beq a1, s1, .LBB211_3
9348; RV32IA-NEXT: # %bb.2: # %atomicrmw.start
9349; RV32IA-NEXT: # in Loop: Header=BB211_1 Depth=1
9350; RV32IA-NEXT: sltu a0, s1, a1
9351; RV32IA-NEXT: sw a2, 0(sp)
9352; RV32IA-NEXT: beqz a0, .LBB211_4
9353; RV32IA-NEXT: j .LBB211_5
9354; RV32IA-NEXT: .LBB211_3: # in Loop: Header=BB211_1 Depth=1
9355; RV32IA-NEXT: sltu a0, s2, a2
9356; RV32IA-NEXT: sw a2, 0(sp)
9357; RV32IA-NEXT: bnez a0, .LBB211_5
9358; RV32IA-NEXT: .LBB211_4: # %atomicrmw.start
9359; RV32IA-NEXT: # in Loop: Header=BB211_1 Depth=1
9360; RV32IA-NEXT: mv a2, s2
9361; RV32IA-NEXT: .LBB211_5: # %atomicrmw.start
9362; RV32IA-NEXT: # in Loop: Header=BB211_1 Depth=1
9363; RV32IA-NEXT: mv a3, a1
9364; RV32IA-NEXT: bnez a0, .LBB211_7
9365; RV32IA-NEXT: # %bb.6: # %atomicrmw.start
9366; RV32IA-NEXT: # in Loop: Header=BB211_1 Depth=1
9367; RV32IA-NEXT: mv a3, s1
9368; RV32IA-NEXT: .LBB211_7: # %atomicrmw.start
9369; RV32IA-NEXT: # in Loop: Header=BB211_1 Depth=1
9370; RV32IA-NEXT: sw a1, 4(sp)
9371; RV32IA-NEXT: mv a0, s3
9372; RV32IA-NEXT: mv a1, s4
9373; RV32IA-NEXT: mv a4, s5
9374; RV32IA-NEXT: mv a5, s5
9375; RV32IA-NEXT: call __atomic_compare_exchange_8
9376; RV32IA-NEXT: lw a1, 4(sp)
9377; RV32IA-NEXT: lw a2, 0(sp)
9378; RV32IA-NEXT: beqz a0, .LBB211_1
9379; RV32IA-NEXT: # %bb.8: # %atomicrmw.end
9380; RV32IA-NEXT: mv a0, a2
9381; RV32IA-NEXT: lw s5, 8(sp)
9382; RV32IA-NEXT: lw s4, 12(sp)
9383; RV32IA-NEXT: lw s3, 16(sp)
9384; RV32IA-NEXT: lw s2, 20(sp)
9385; RV32IA-NEXT: lw s1, 24(sp)
9386; RV32IA-NEXT: lw ra, 28(sp)
9387; RV32IA-NEXT: addi sp, sp, 32
9388; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]9389 %1 = atomicrmw umax i64* %a, i64 %b acquire
9390 ret i64 %1
9391}
9392
9393define i64 @atomicrmw_umax_i64_release(i64 *%a, i64 %b) nounwind {
9394; RV32I-LABEL: atomicrmw_umax_i64_release:
9395; RV32I: # %bb.0:
9396; RV32I-NEXT: addi sp, sp, -32
9397; RV32I-NEXT: sw ra, 28(sp)
9398; RV32I-NEXT: sw s1, 24(sp)
9399; RV32I-NEXT: sw s2, 20(sp)
9400; RV32I-NEXT: sw s3, 16(sp)
9401; RV32I-NEXT: sw s4, 12(sp)
9402; RV32I-NEXT: sw s5, 8(sp)
9403; RV32I-NEXT: mv s1, a2
9404; RV32I-NEXT: mv s2, a1
9405; RV32I-NEXT: mv s3, a0
9406; RV32I-NEXT: lw a1, 4(a0)
9407; RV32I-NEXT: lw a2, 0(a0)
9408; RV32I-NEXT: mv s4, sp
9409; RV32I-NEXT: addi s5, zero, 3
9410; RV32I-NEXT: .LBB212_1: # %atomicrmw.start
9411; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
9412; RV32I-NEXT: beq a1, s1, .LBB212_3
9413; RV32I-NEXT: # %bb.2: # %atomicrmw.start
9414; RV32I-NEXT: # in Loop: Header=BB212_1 Depth=1
9415; RV32I-NEXT: sltu a0, s1, a1
9416; RV32I-NEXT: sw a2, 0(sp)
9417; RV32I-NEXT: beqz a0, .LBB212_4
9418; RV32I-NEXT: j .LBB212_5
9419; RV32I-NEXT: .LBB212_3: # in Loop: Header=BB212_1 Depth=1
9420; RV32I-NEXT: sltu a0, s2, a2
9421; RV32I-NEXT: sw a2, 0(sp)
9422; RV32I-NEXT: bnez a0, .LBB212_5
9423; RV32I-NEXT: .LBB212_4: # %atomicrmw.start
9424; RV32I-NEXT: # in Loop: Header=BB212_1 Depth=1
9425; RV32I-NEXT: mv a2, s2
9426; RV32I-NEXT: .LBB212_5: # %atomicrmw.start
9427; RV32I-NEXT: # in Loop: Header=BB212_1 Depth=1
9428; RV32I-NEXT: mv a3, a1
9429; RV32I-NEXT: bnez a0, .LBB212_7
9430; RV32I-NEXT: # %bb.6: # %atomicrmw.start
9431; RV32I-NEXT: # in Loop: Header=BB212_1 Depth=1
9432; RV32I-NEXT: mv a3, s1
9433; RV32I-NEXT: .LBB212_7: # %atomicrmw.start
9434; RV32I-NEXT: # in Loop: Header=BB212_1 Depth=1
9435; RV32I-NEXT: sw a1, 4(sp)
9436; RV32I-NEXT: mv a0, s3
9437; RV32I-NEXT: mv a1, s4
9438; RV32I-NEXT: mv a4, s5
9439; RV32I-NEXT: mv a5, zero
9440; RV32I-NEXT: call __atomic_compare_exchange_8
9441; RV32I-NEXT: lw a1, 4(sp)
9442; RV32I-NEXT: lw a2, 0(sp)
9443; RV32I-NEXT: beqz a0, .LBB212_1
9444; RV32I-NEXT: # %bb.8: # %atomicrmw.end
9445; RV32I-NEXT: mv a0, a2
9446; RV32I-NEXT: lw s5, 8(sp)
9447; RV32I-NEXT: lw s4, 12(sp)
9448; RV32I-NEXT: lw s3, 16(sp)
9449; RV32I-NEXT: lw s2, 20(sp)
9450; RV32I-NEXT: lw s1, 24(sp)
9451; RV32I-NEXT: lw ra, 28(sp)
9452; RV32I-NEXT: addi sp, sp, 32
9453; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]9454;
9455; RV32IA-LABEL: atomicrmw_umax_i64_release:
9456; RV32IA: # %bb.0:
9457; RV32IA-NEXT: addi sp, sp, -32
9458; RV32IA-NEXT: sw ra, 28(sp)
9459; RV32IA-NEXT: sw s1, 24(sp)
9460; RV32IA-NEXT: sw s2, 20(sp)
9461; RV32IA-NEXT: sw s3, 16(sp)
9462; RV32IA-NEXT: sw s4, 12(sp)
9463; RV32IA-NEXT: sw s5, 8(sp)
9464; RV32IA-NEXT: mv s1, a2
9465; RV32IA-NEXT: mv s2, a1
9466; RV32IA-NEXT: mv s3, a0
9467; RV32IA-NEXT: lw a1, 4(a0)
9468; RV32IA-NEXT: lw a2, 0(a0)
9469; RV32IA-NEXT: mv s4, sp
9470; RV32IA-NEXT: addi s5, zero, 3
9471; RV32IA-NEXT: .LBB212_1: # %atomicrmw.start
9472; RV32IA-NEXT: # =>This Inner Loop Header: Depth=1
9473; RV32IA-NEXT: beq a1, s1, .LBB212_3
9474; RV32IA-NEXT: # %bb.2: # %atomicrmw.start
9475; RV32IA-NEXT: # in Loop: Header=BB212_1 Depth=1
9476; RV32IA-NEXT: sltu a0, s1, a1
9477; RV32IA-NEXT: sw a2, 0(sp)
9478; RV32IA-NEXT: beqz a0, .LBB212_4
9479; RV32IA-NEXT: j .LBB212_5
9480; RV32IA-NEXT: .LBB212_3: # in Loop: Header=BB212_1 Depth=1
9481; RV32IA-NEXT: sltu a0, s2, a2
9482; RV32IA-NEXT: sw a2, 0(sp)
9483; RV32IA-NEXT: bnez a0, .LBB212_5
9484; RV32IA-NEXT: .LBB212_4: # %atomicrmw.start
9485; RV32IA-NEXT: # in Loop: Header=BB212_1 Depth=1
9486; RV32IA-NEXT: mv a2, s2
9487; RV32IA-NEXT: .LBB212_5: # %atomicrmw.start
9488; RV32IA-NEXT: # in Loop: Header=BB212_1 Depth=1
9489; RV32IA-NEXT: mv a3, a1
9490; RV32IA-NEXT: bnez a0, .LBB212_7
9491; RV32IA-NEXT: # %bb.6: # %atomicrmw.start
9492; RV32IA-NEXT: # in Loop: Header=BB212_1 Depth=1
9493; RV32IA-NEXT: mv a3, s1
9494; RV32IA-NEXT: .LBB212_7: # %atomicrmw.start
9495; RV32IA-NEXT: # in Loop: Header=BB212_1 Depth=1
9496; RV32IA-NEXT: sw a1, 4(sp)
9497; RV32IA-NEXT: mv a0, s3
9498; RV32IA-NEXT: mv a1, s4
9499; RV32IA-NEXT: mv a4, s5
9500; RV32IA-NEXT: mv a5, zero
9501; RV32IA-NEXT: call __atomic_compare_exchange_8
9502; RV32IA-NEXT: lw a1, 4(sp)
9503; RV32IA-NEXT: lw a2, 0(sp)
9504; RV32IA-NEXT: beqz a0, .LBB212_1
9505; RV32IA-NEXT: # %bb.8: # %atomicrmw.end
9506; RV32IA-NEXT: mv a0, a2
9507; RV32IA-NEXT: lw s5, 8(sp)
9508; RV32IA-NEXT: lw s4, 12(sp)
9509; RV32IA-NEXT: lw s3, 16(sp)
9510; RV32IA-NEXT: lw s2, 20(sp)
9511; RV32IA-NEXT: lw s1, 24(sp)
9512; RV32IA-NEXT: lw ra, 28(sp)
9513; RV32IA-NEXT: addi sp, sp, 32
9514; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]9515 %1 = atomicrmw umax i64* %a, i64 %b release
9516 ret i64 %1
9517}
9518
9519define i64 @atomicrmw_umax_i64_acq_rel(i64 *%a, i64 %b) nounwind {
9520; RV32I-LABEL: atomicrmw_umax_i64_acq_rel:
9521; RV32I: # %bb.0:
9522; RV32I-NEXT: addi sp, sp, -48
9523; RV32I-NEXT: sw ra, 44(sp)
9524; RV32I-NEXT: sw s1, 40(sp)
9525; RV32I-NEXT: sw s2, 36(sp)
9526; RV32I-NEXT: sw s3, 32(sp)
9527; RV32I-NEXT: sw s4, 28(sp)
9528; RV32I-NEXT: sw s5, 24(sp)
9529; RV32I-NEXT: sw s6, 20(sp)
9530; RV32I-NEXT: mv s1, a2
9531; RV32I-NEXT: mv s2, a1
9532; RV32I-NEXT: mv s3, a0
9533; RV32I-NEXT: lw a1, 4(a0)
9534; RV32I-NEXT: lw a2, 0(a0)
9535; RV32I-NEXT: addi s4, sp, 8
9536; RV32I-NEXT: addi s5, zero, 4
9537; RV32I-NEXT: addi s6, zero, 2
9538; RV32I-NEXT: .LBB213_1: # %atomicrmw.start
9539; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
9540; RV32I-NEXT: beq a1, s1, .LBB213_3
9541; RV32I-NEXT: # %bb.2: # %atomicrmw.start
9542; RV32I-NEXT: # in Loop: Header=BB213_1 Depth=1
9543; RV32I-NEXT: sltu a0, s1, a1
9544; RV32I-NEXT: sw a2, 8(sp)
9545; RV32I-NEXT: beqz a0, .LBB213_4
9546; RV32I-NEXT: j .LBB213_5
9547; RV32I-NEXT: .LBB213_3: # in Loop: Header=BB213_1 Depth=1
9548; RV32I-NEXT: sltu a0, s2, a2
9549; RV32I-NEXT: sw a2, 8(sp)
9550; RV32I-NEXT: bnez a0, .LBB213_5
9551; RV32I-NEXT: .LBB213_4: # %atomicrmw.start
9552; RV32I-NEXT: # in Loop: Header=BB213_1 Depth=1
9553; RV32I-NEXT: mv a2, s2
9554; RV32I-NEXT: .LBB213_5: # %atomicrmw.start
9555; RV32I-NEXT: # in Loop: Header=BB213_1 Depth=1
9556; RV32I-NEXT: mv a3, a1
9557; RV32I-NEXT: bnez a0, .LBB213_7
9558; RV32I-NEXT: # %bb.6: # %atomicrmw.start
9559; RV32I-NEXT: # in Loop: Header=BB213_1 Depth=1
9560; RV32I-NEXT: mv a3, s1
9561; RV32I-NEXT: .LBB213_7: # %atomicrmw.start
9562; RV32I-NEXT: # in Loop: Header=BB213_1 Depth=1
9563; RV32I-NEXT: sw a1, 12(sp)
9564; RV32I-NEXT: mv a0, s3
9565; RV32I-NEXT: mv a1, s4
9566; RV32I-NEXT: mv a4, s5
9567; RV32I-NEXT: mv a5, s6
9568; RV32I-NEXT: call __atomic_compare_exchange_8
9569; RV32I-NEXT: lw a1, 12(sp)
9570; RV32I-NEXT: lw a2, 8(sp)
9571; RV32I-NEXT: beqz a0, .LBB213_1
9572; RV32I-NEXT: # %bb.8: # %atomicrmw.end
9573; RV32I-NEXT: mv a0, a2
9574; RV32I-NEXT: lw s6, 20(sp)
9575; RV32I-NEXT: lw s5, 24(sp)
9576; RV32I-NEXT: lw s4, 28(sp)
9577; RV32I-NEXT: lw s3, 32(sp)
9578; RV32I-NEXT: lw s2, 36(sp)
9579; RV32I-NEXT: lw s1, 40(sp)
9580; RV32I-NEXT: lw ra, 44(sp)
9581; RV32I-NEXT: addi sp, sp, 48
9582; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]9583;
9584; RV32IA-LABEL: atomicrmw_umax_i64_acq_rel:
9585; RV32IA: # %bb.0:
9586; RV32IA-NEXT: addi sp, sp, -48
9587; RV32IA-NEXT: sw ra, 44(sp)
9588; RV32IA-NEXT: sw s1, 40(sp)
9589; RV32IA-NEXT: sw s2, 36(sp)
9590; RV32IA-NEXT: sw s3, 32(sp)
9591; RV32IA-NEXT: sw s4, 28(sp)
9592; RV32IA-NEXT: sw s5, 24(sp)
9593; RV32IA-NEXT: sw s6, 20(sp)
9594; RV32IA-NEXT: mv s1, a2
9595; RV32IA-NEXT: mv s2, a1
9596; RV32IA-NEXT: mv s3, a0
9597; RV32IA-NEXT: lw a1, 4(a0)
9598; RV32IA-NEXT: lw a2, 0(a0)
9599; RV32IA-NEXT: addi s4, sp, 8
9600; RV32IA-NEXT: addi s5, zero, 4
9601; RV32IA-NEXT: addi s6, zero, 2
9602; RV32IA-NEXT: .LBB213_1: # %atomicrmw.start
9603; RV32IA-NEXT: # =>This Inner Loop Header: Depth=1
9604; RV32IA-NEXT: beq a1, s1, .LBB213_3
9605; RV32IA-NEXT: # %bb.2: # %atomicrmw.start
9606; RV32IA-NEXT: # in Loop: Header=BB213_1 Depth=1
9607; RV32IA-NEXT: sltu a0, s1, a1
9608; RV32IA-NEXT: sw a2, 8(sp)
9609; RV32IA-NEXT: beqz a0, .LBB213_4
9610; RV32IA-NEXT: j .LBB213_5
9611; RV32IA-NEXT: .LBB213_3: # in Loop: Header=BB213_1 Depth=1
9612; RV32IA-NEXT: sltu a0, s2, a2
9613; RV32IA-NEXT: sw a2, 8(sp)
9614; RV32IA-NEXT: bnez a0, .LBB213_5
9615; RV32IA-NEXT: .LBB213_4: # %atomicrmw.start
9616; RV32IA-NEXT: # in Loop: Header=BB213_1 Depth=1
9617; RV32IA-NEXT: mv a2, s2
9618; RV32IA-NEXT: .LBB213_5: # %atomicrmw.start
9619; RV32IA-NEXT: # in Loop: Header=BB213_1 Depth=1
9620; RV32IA-NEXT: mv a3, a1
9621; RV32IA-NEXT: bnez a0, .LBB213_7
9622; RV32IA-NEXT: # %bb.6: # %atomicrmw.start
9623; RV32IA-NEXT: # in Loop: Header=BB213_1 Depth=1
9624; RV32IA-NEXT: mv a3, s1
9625; RV32IA-NEXT: .LBB213_7: # %atomicrmw.start
9626; RV32IA-NEXT: # in Loop: Header=BB213_1 Depth=1
9627; RV32IA-NEXT: sw a1, 12(sp)
9628; RV32IA-NEXT: mv a0, s3
9629; RV32IA-NEXT: mv a1, s4
9630; RV32IA-NEXT: mv a4, s5
9631; RV32IA-NEXT: mv a5, s6
9632; RV32IA-NEXT: call __atomic_compare_exchange_8
9633; RV32IA-NEXT: lw a1, 12(sp)
9634; RV32IA-NEXT: lw a2, 8(sp)
9635; RV32IA-NEXT: beqz a0, .LBB213_1
9636; RV32IA-NEXT: # %bb.8: # %atomicrmw.end
9637; RV32IA-NEXT: mv a0, a2
9638; RV32IA-NEXT: lw s6, 20(sp)
9639; RV32IA-NEXT: lw s5, 24(sp)
9640; RV32IA-NEXT: lw s4, 28(sp)
9641; RV32IA-NEXT: lw s3, 32(sp)
9642; RV32IA-NEXT: lw s2, 36(sp)
9643; RV32IA-NEXT: lw s1, 40(sp)
9644; RV32IA-NEXT: lw ra, 44(sp)
9645; RV32IA-NEXT: addi sp, sp, 48
9646; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]9647 %1 = atomicrmw umax i64* %a, i64 %b acq_rel
9648 ret i64 %1
9649}
9650
9651define i64 @atomicrmw_umax_i64_seq_cst(i64 *%a, i64 %b) nounwind {
9652; RV32I-LABEL: atomicrmw_umax_i64_seq_cst:
9653; RV32I: # %bb.0:
9654; RV32I-NEXT: addi sp, sp, -32
9655; RV32I-NEXT: sw ra, 28(sp)
9656; RV32I-NEXT: sw s1, 24(sp)
9657; RV32I-NEXT: sw s2, 20(sp)
9658; RV32I-NEXT: sw s3, 16(sp)
9659; RV32I-NEXT: sw s4, 12(sp)
9660; RV32I-NEXT: sw s5, 8(sp)
9661; RV32I-NEXT: mv s1, a2
9662; RV32I-NEXT: mv s2, a1
9663; RV32I-NEXT: mv s3, a0
9664; RV32I-NEXT: lw a1, 4(a0)
9665; RV32I-NEXT: lw a2, 0(a0)
9666; RV32I-NEXT: mv s4, sp
9667; RV32I-NEXT: addi s5, zero, 5
9668; RV32I-NEXT: .LBB214_1: # %atomicrmw.start
9669; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
9670; RV32I-NEXT: beq a1, s1, .LBB214_3
9671; RV32I-NEXT: # %bb.2: # %atomicrmw.start
9672; RV32I-NEXT: # in Loop: Header=BB214_1 Depth=1
9673; RV32I-NEXT: sltu a0, s1, a1
9674; RV32I-NEXT: sw a2, 0(sp)
9675; RV32I-NEXT: beqz a0, .LBB214_4
9676; RV32I-NEXT: j .LBB214_5
9677; RV32I-NEXT: .LBB214_3: # in Loop: Header=BB214_1 Depth=1
9678; RV32I-NEXT: sltu a0, s2, a2
9679; RV32I-NEXT: sw a2, 0(sp)
9680; RV32I-NEXT: bnez a0, .LBB214_5
9681; RV32I-NEXT: .LBB214_4: # %atomicrmw.start
9682; RV32I-NEXT: # in Loop: Header=BB214_1 Depth=1
9683; RV32I-NEXT: mv a2, s2
9684; RV32I-NEXT: .LBB214_5: # %atomicrmw.start
9685; RV32I-NEXT: # in Loop: Header=BB214_1 Depth=1
9686; RV32I-NEXT: mv a3, a1
9687; RV32I-NEXT: bnez a0, .LBB214_7
9688; RV32I-NEXT: # %bb.6: # %atomicrmw.start
9689; RV32I-NEXT: # in Loop: Header=BB214_1 Depth=1
9690; RV32I-NEXT: mv a3, s1
9691; RV32I-NEXT: .LBB214_7: # %atomicrmw.start
9692; RV32I-NEXT: # in Loop: Header=BB214_1 Depth=1
9693; RV32I-NEXT: sw a1, 4(sp)
9694; RV32I-NEXT: mv a0, s3
9695; RV32I-NEXT: mv a1, s4
9696; RV32I-NEXT: mv a4, s5
9697; RV32I-NEXT: mv a5, s5
9698; RV32I-NEXT: call __atomic_compare_exchange_8
9699; RV32I-NEXT: lw a1, 4(sp)
9700; RV32I-NEXT: lw a2, 0(sp)
9701; RV32I-NEXT: beqz a0, .LBB214_1
9702; RV32I-NEXT: # %bb.8: # %atomicrmw.end
9703; RV32I-NEXT: mv a0, a2
9704; RV32I-NEXT: lw s5, 8(sp)
9705; RV32I-NEXT: lw s4, 12(sp)
9706; RV32I-NEXT: lw s3, 16(sp)
9707; RV32I-NEXT: lw s2, 20(sp)
9708; RV32I-NEXT: lw s1, 24(sp)
9709; RV32I-NEXT: lw ra, 28(sp)
9710; RV32I-NEXT: addi sp, sp, 32
9711; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]9712;
9713; RV32IA-LABEL: atomicrmw_umax_i64_seq_cst:
9714; RV32IA: # %bb.0:
9715; RV32IA-NEXT: addi sp, sp, -32
9716; RV32IA-NEXT: sw ra, 28(sp)
9717; RV32IA-NEXT: sw s1, 24(sp)
9718; RV32IA-NEXT: sw s2, 20(sp)
9719; RV32IA-NEXT: sw s3, 16(sp)
9720; RV32IA-NEXT: sw s4, 12(sp)
9721; RV32IA-NEXT: sw s5, 8(sp)
9722; RV32IA-NEXT: mv s1, a2
9723; RV32IA-NEXT: mv s2, a1
9724; RV32IA-NEXT: mv s3, a0
9725; RV32IA-NEXT: lw a1, 4(a0)
9726; RV32IA-NEXT: lw a2, 0(a0)
9727; RV32IA-NEXT: mv s4, sp
9728; RV32IA-NEXT: addi s5, zero, 5
9729; RV32IA-NEXT: .LBB214_1: # %atomicrmw.start
9730; RV32IA-NEXT: # =>This Inner Loop Header: Depth=1
9731; RV32IA-NEXT: beq a1, s1, .LBB214_3
9732; RV32IA-NEXT: # %bb.2: # %atomicrmw.start
9733; RV32IA-NEXT: # in Loop: Header=BB214_1 Depth=1
9734; RV32IA-NEXT: sltu a0, s1, a1
9735; RV32IA-NEXT: sw a2, 0(sp)
9736; RV32IA-NEXT: beqz a0, .LBB214_4
9737; RV32IA-NEXT: j .LBB214_5
9738; RV32IA-NEXT: .LBB214_3: # in Loop: Header=BB214_1 Depth=1
9739; RV32IA-NEXT: sltu a0, s2, a2
9740; RV32IA-NEXT: sw a2, 0(sp)
9741; RV32IA-NEXT: bnez a0, .LBB214_5
9742; RV32IA-NEXT: .LBB214_4: # %atomicrmw.start
9743; RV32IA-NEXT: # in Loop: Header=BB214_1 Depth=1
9744; RV32IA-NEXT: mv a2, s2
9745; RV32IA-NEXT: .LBB214_5: # %atomicrmw.start
9746; RV32IA-NEXT: # in Loop: Header=BB214_1 Depth=1
9747; RV32IA-NEXT: mv a3, a1
9748; RV32IA-NEXT: bnez a0, .LBB214_7
9749; RV32IA-NEXT: # %bb.6: # %atomicrmw.start
9750; RV32IA-NEXT: # in Loop: Header=BB214_1 Depth=1
9751; RV32IA-NEXT: mv a3, s1
9752; RV32IA-NEXT: .LBB214_7: # %atomicrmw.start
9753; RV32IA-NEXT: # in Loop: Header=BB214_1 Depth=1
9754; RV32IA-NEXT: sw a1, 4(sp)
9755; RV32IA-NEXT: mv a0, s3
9756; RV32IA-NEXT: mv a1, s4
9757; RV32IA-NEXT: mv a4, s5
9758; RV32IA-NEXT: mv a5, s5
9759; RV32IA-NEXT: call __atomic_compare_exchange_8
9760; RV32IA-NEXT: lw a1, 4(sp)
9761; RV32IA-NEXT: lw a2, 0(sp)
9762; RV32IA-NEXT: beqz a0, .LBB214_1
9763; RV32IA-NEXT: # %bb.8: # %atomicrmw.end
9764; RV32IA-NEXT: mv a0, a2
9765; RV32IA-NEXT: lw s5, 8(sp)
9766; RV32IA-NEXT: lw s4, 12(sp)
9767; RV32IA-NEXT: lw s3, 16(sp)
9768; RV32IA-NEXT: lw s2, 20(sp)
9769; RV32IA-NEXT: lw s1, 24(sp)
9770; RV32IA-NEXT: lw ra, 28(sp)
9771; RV32IA-NEXT: addi sp, sp, 32
9772; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]9773 %1 = atomicrmw umax i64* %a, i64 %b seq_cst
9774 ret i64 %1
9775}
9776
9777define i64 @atomicrmw_umin_i64_monotonic(i64 *%a, i64 %b) nounwind {
9778; RV32I-LABEL: atomicrmw_umin_i64_monotonic:
9779; RV32I: # %bb.0:
9780; RV32I-NEXT: addi sp, sp, -32
9781; RV32I-NEXT: sw ra, 28(sp)
9782; RV32I-NEXT: sw s1, 24(sp)
9783; RV32I-NEXT: sw s2, 20(sp)
9784; RV32I-NEXT: sw s3, 16(sp)
9785; RV32I-NEXT: sw s4, 12(sp)
9786; RV32I-NEXT: mv s1, a2
9787; RV32I-NEXT: mv s2, a1
9788; RV32I-NEXT: mv s3, a0
9789; RV32I-NEXT: lw a1, 4(a0)
9790; RV32I-NEXT: lw a2, 0(a0)
9791; RV32I-NEXT: mv s4, sp
9792; RV32I-NEXT: .LBB215_1: # %atomicrmw.start
9793; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
9794; RV32I-NEXT: beq a1, s1, .LBB215_3
9795; RV32I-NEXT: # %bb.2: # %atomicrmw.start
9796; RV32I-NEXT: # in Loop: Header=BB215_1 Depth=1
9797; RV32I-NEXT: sltu a0, s1, a1
9798; RV32I-NEXT: j .LBB215_4
9799; RV32I-NEXT: .LBB215_3: # in Loop: Header=BB215_1 Depth=1
9800; RV32I-NEXT: sltu a0, s2, a2
9801; RV32I-NEXT: .LBB215_4: # %atomicrmw.start
9802; RV32I-NEXT: # in Loop: Header=BB215_1 Depth=1
9803; RV32I-NEXT: xori a0, a0, 1
9804; RV32I-NEXT: sw a2, 0(sp)
9805; RV32I-NEXT: bnez a0, .LBB215_6
9806; RV32I-NEXT: # %bb.5: # %atomicrmw.start
9807; RV32I-NEXT: # in Loop: Header=BB215_1 Depth=1
9808; RV32I-NEXT: mv a2, s2
9809; RV32I-NEXT: .LBB215_6: # %atomicrmw.start
9810; RV32I-NEXT: # in Loop: Header=BB215_1 Depth=1
9811; RV32I-NEXT: mv a3, a1
9812; RV32I-NEXT: bnez a0, .LBB215_8
9813; RV32I-NEXT: # %bb.7: # %atomicrmw.start
9814; RV32I-NEXT: # in Loop: Header=BB215_1 Depth=1
9815; RV32I-NEXT: mv a3, s1
9816; RV32I-NEXT: .LBB215_8: # %atomicrmw.start
9817; RV32I-NEXT: # in Loop: Header=BB215_1 Depth=1
9818; RV32I-NEXT: sw a1, 4(sp)
9819; RV32I-NEXT: mv a0, s3
9820; RV32I-NEXT: mv a1, s4
9821; RV32I-NEXT: mv a4, zero
9822; RV32I-NEXT: mv a5, zero
9823; RV32I-NEXT: call __atomic_compare_exchange_8
9824; RV32I-NEXT: lw a1, 4(sp)
9825; RV32I-NEXT: lw a2, 0(sp)
9826; RV32I-NEXT: beqz a0, .LBB215_1
9827; RV32I-NEXT: # %bb.9: # %atomicrmw.end
9828; RV32I-NEXT: mv a0, a2
9829; RV32I-NEXT: lw s4, 12(sp)
9830; RV32I-NEXT: lw s3, 16(sp)
9831; RV32I-NEXT: lw s2, 20(sp)
9832; RV32I-NEXT: lw s1, 24(sp)
9833; RV32I-NEXT: lw ra, 28(sp)
9834; RV32I-NEXT: addi sp, sp, 32
9835; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]9836;
9837; RV32IA-LABEL: atomicrmw_umin_i64_monotonic:
9838; RV32IA: # %bb.0:
9839; RV32IA-NEXT: addi sp, sp, -32
9840; RV32IA-NEXT: sw ra, 28(sp)
9841; RV32IA-NEXT: sw s1, 24(sp)
9842; RV32IA-NEXT: sw s2, 20(sp)
9843; RV32IA-NEXT: sw s3, 16(sp)
9844; RV32IA-NEXT: sw s4, 12(sp)
9845; RV32IA-NEXT: mv s1, a2
9846; RV32IA-NEXT: mv s2, a1
9847; RV32IA-NEXT: mv s3, a0
9848; RV32IA-NEXT: lw a1, 4(a0)
9849; RV32IA-NEXT: lw a2, 0(a0)
9850; RV32IA-NEXT: mv s4, sp
9851; RV32IA-NEXT: .LBB215_1: # %atomicrmw.start
9852; RV32IA-NEXT: # =>This Inner Loop Header: Depth=1
9853; RV32IA-NEXT: beq a1, s1, .LBB215_3
9854; RV32IA-NEXT: # %bb.2: # %atomicrmw.start
9855; RV32IA-NEXT: # in Loop: Header=BB215_1 Depth=1
9856; RV32IA-NEXT: sltu a0, s1, a1
9857; RV32IA-NEXT: j .LBB215_4
9858; RV32IA-NEXT: .LBB215_3: # in Loop: Header=BB215_1 Depth=1
9859; RV32IA-NEXT: sltu a0, s2, a2
9860; RV32IA-NEXT: .LBB215_4: # %atomicrmw.start
9861; RV32IA-NEXT: # in Loop: Header=BB215_1 Depth=1
9862; RV32IA-NEXT: xori a0, a0, 1
9863; RV32IA-NEXT: sw a2, 0(sp)
9864; RV32IA-NEXT: bnez a0, .LBB215_6
9865; RV32IA-NEXT: # %bb.5: # %atomicrmw.start
9866; RV32IA-NEXT: # in Loop: Header=BB215_1 Depth=1
9867; RV32IA-NEXT: mv a2, s2
9868; RV32IA-NEXT: .LBB215_6: # %atomicrmw.start
9869; RV32IA-NEXT: # in Loop: Header=BB215_1 Depth=1
9870; RV32IA-NEXT: mv a3, a1
9871; RV32IA-NEXT: bnez a0, .LBB215_8
9872; RV32IA-NEXT: # %bb.7: # %atomicrmw.start
9873; RV32IA-NEXT: # in Loop: Header=BB215_1 Depth=1
9874; RV32IA-NEXT: mv a3, s1
9875; RV32IA-NEXT: .LBB215_8: # %atomicrmw.start
9876; RV32IA-NEXT: # in Loop: Header=BB215_1 Depth=1
9877; RV32IA-NEXT: sw a1, 4(sp)
9878; RV32IA-NEXT: mv a0, s3
9879; RV32IA-NEXT: mv a1, s4
9880; RV32IA-NEXT: mv a4, zero
9881; RV32IA-NEXT: mv a5, zero
9882; RV32IA-NEXT: call __atomic_compare_exchange_8
9883; RV32IA-NEXT: lw a1, 4(sp)
9884; RV32IA-NEXT: lw a2, 0(sp)
9885; RV32IA-NEXT: beqz a0, .LBB215_1
9886; RV32IA-NEXT: # %bb.9: # %atomicrmw.end
9887; RV32IA-NEXT: mv a0, a2
9888; RV32IA-NEXT: lw s4, 12(sp)
9889; RV32IA-NEXT: lw s3, 16(sp)
9890; RV32IA-NEXT: lw s2, 20(sp)
9891; RV32IA-NEXT: lw s1, 24(sp)
9892; RV32IA-NEXT: lw ra, 28(sp)
9893; RV32IA-NEXT: addi sp, sp, 32
9894; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]9895 %1 = atomicrmw umin i64* %a, i64 %b monotonic
9896 ret i64 %1
9897}
9898
9899define i64 @atomicrmw_umin_i64_acquire(i64 *%a, i64 %b) nounwind {
9900; RV32I-LABEL: atomicrmw_umin_i64_acquire:
9901; RV32I: # %bb.0:
9902; RV32I-NEXT: addi sp, sp, -32
9903; RV32I-NEXT: sw ra, 28(sp)
9904; RV32I-NEXT: sw s1, 24(sp)
9905; RV32I-NEXT: sw s2, 20(sp)
9906; RV32I-NEXT: sw s3, 16(sp)
9907; RV32I-NEXT: sw s4, 12(sp)
9908; RV32I-NEXT: sw s5, 8(sp)
9909; RV32I-NEXT: mv s1, a2
9910; RV32I-NEXT: mv s2, a1
9911; RV32I-NEXT: mv s3, a0
9912; RV32I-NEXT: lw a1, 4(a0)
9913; RV32I-NEXT: lw a2, 0(a0)
9914; RV32I-NEXT: mv s4, sp
9915; RV32I-NEXT: addi s5, zero, 2
9916; RV32I-NEXT: .LBB216_1: # %atomicrmw.start
9917; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
9918; RV32I-NEXT: beq a1, s1, .LBB216_3
9919; RV32I-NEXT: # %bb.2: # %atomicrmw.start
9920; RV32I-NEXT: # in Loop: Header=BB216_1 Depth=1
9921; RV32I-NEXT: sltu a0, s1, a1
9922; RV32I-NEXT: j .LBB216_4
9923; RV32I-NEXT: .LBB216_3: # in Loop: Header=BB216_1 Depth=1
9924; RV32I-NEXT: sltu a0, s2, a2
9925; RV32I-NEXT: .LBB216_4: # %atomicrmw.start
9926; RV32I-NEXT: # in Loop: Header=BB216_1 Depth=1
9927; RV32I-NEXT: xori a0, a0, 1
9928; RV32I-NEXT: sw a2, 0(sp)
9929; RV32I-NEXT: bnez a0, .LBB216_6
9930; RV32I-NEXT: # %bb.5: # %atomicrmw.start
9931; RV32I-NEXT: # in Loop: Header=BB216_1 Depth=1
9932; RV32I-NEXT: mv a2, s2
9933; RV32I-NEXT: .LBB216_6: # %atomicrmw.start
9934; RV32I-NEXT: # in Loop: Header=BB216_1 Depth=1
9935; RV32I-NEXT: mv a3, a1
9936; RV32I-NEXT: bnez a0, .LBB216_8
9937; RV32I-NEXT: # %bb.7: # %atomicrmw.start
9938; RV32I-NEXT: # in Loop: Header=BB216_1 Depth=1
9939; RV32I-NEXT: mv a3, s1
9940; RV32I-NEXT: .LBB216_8: # %atomicrmw.start
9941; RV32I-NEXT: # in Loop: Header=BB216_1 Depth=1
9942; RV32I-NEXT: sw a1, 4(sp)
9943; RV32I-NEXT: mv a0, s3
9944; RV32I-NEXT: mv a1, s4
9945; RV32I-NEXT: mv a4, s5
9946; RV32I-NEXT: mv a5, s5
9947; RV32I-NEXT: call __atomic_compare_exchange_8
9948; RV32I-NEXT: lw a1, 4(sp)
9949; RV32I-NEXT: lw a2, 0(sp)
9950; RV32I-NEXT: beqz a0, .LBB216_1
9951; RV32I-NEXT: # %bb.9: # %atomicrmw.end
9952; RV32I-NEXT: mv a0, a2
9953; RV32I-NEXT: lw s5, 8(sp)
9954; RV32I-NEXT: lw s4, 12(sp)
9955; RV32I-NEXT: lw s3, 16(sp)
9956; RV32I-NEXT: lw s2, 20(sp)
9957; RV32I-NEXT: lw s1, 24(sp)
9958; RV32I-NEXT: lw ra, 28(sp)
9959; RV32I-NEXT: addi sp, sp, 32
9960; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]9961;
9962; RV32IA-LABEL: atomicrmw_umin_i64_acquire:
9963; RV32IA: # %bb.0:
9964; RV32IA-NEXT: addi sp, sp, -32
9965; RV32IA-NEXT: sw ra, 28(sp)
9966; RV32IA-NEXT: sw s1, 24(sp)
9967; RV32IA-NEXT: sw s2, 20(sp)
9968; RV32IA-NEXT: sw s3, 16(sp)
9969; RV32IA-NEXT: sw s4, 12(sp)
9970; RV32IA-NEXT: sw s5, 8(sp)
9971; RV32IA-NEXT: mv s1, a2
9972; RV32IA-NEXT: mv s2, a1
9973; RV32IA-NEXT: mv s3, a0
9974; RV32IA-NEXT: lw a1, 4(a0)
9975; RV32IA-NEXT: lw a2, 0(a0)
9976; RV32IA-NEXT: mv s4, sp
9977; RV32IA-NEXT: addi s5, zero, 2
9978; RV32IA-NEXT: .LBB216_1: # %atomicrmw.start
9979; RV32IA-NEXT: # =>This Inner Loop Header: Depth=1
9980; RV32IA-NEXT: beq a1, s1, .LBB216_3
9981; RV32IA-NEXT: # %bb.2: # %atomicrmw.start
9982; RV32IA-NEXT: # in Loop: Header=BB216_1 Depth=1
9983; RV32IA-NEXT: sltu a0, s1, a1
9984; RV32IA-NEXT: j .LBB216_4
9985; RV32IA-NEXT: .LBB216_3: # in Loop: Header=BB216_1 Depth=1
9986; RV32IA-NEXT: sltu a0, s2, a2
9987; RV32IA-NEXT: .LBB216_4: # %atomicrmw.start
9988; RV32IA-NEXT: # in Loop: Header=BB216_1 Depth=1
9989; RV32IA-NEXT: xori a0, a0, 1
9990; RV32IA-NEXT: sw a2, 0(sp)
9991; RV32IA-NEXT: bnez a0, .LBB216_6
9992; RV32IA-NEXT: # %bb.5: # %atomicrmw.start
9993; RV32IA-NEXT: # in Loop: Header=BB216_1 Depth=1
9994; RV32IA-NEXT: mv a2, s2
9995; RV32IA-NEXT: .LBB216_6: # %atomicrmw.start
9996; RV32IA-NEXT: # in Loop: Header=BB216_1 Depth=1
9997; RV32IA-NEXT: mv a3, a1
9998; RV32IA-NEXT: bnez a0, .LBB216_8
9999; RV32IA-NEXT: # %bb.7: # %atomicrmw.start
10000; RV32IA-NEXT: # in Loop: Header=BB216_1 Depth=1
10001; RV32IA-NEXT: mv a3, s1
10002; RV32IA-NEXT: .LBB216_8: # %atomicrmw.start
10003; RV32IA-NEXT: # in Loop: Header=BB216_1 Depth=1
10004; RV32IA-NEXT: sw a1, 4(sp)
10005; RV32IA-NEXT: mv a0, s3
10006; RV32IA-NEXT: mv a1, s4
10007; RV32IA-NEXT: mv a4, s5
10008; RV32IA-NEXT: mv a5, s5
10009; RV32IA-NEXT: call __atomic_compare_exchange_8
10010; RV32IA-NEXT: lw a1, 4(sp)
10011; RV32IA-NEXT: lw a2, 0(sp)
10012; RV32IA-NEXT: beqz a0, .LBB216_1
10013; RV32IA-NEXT: # %bb.9: # %atomicrmw.end
10014; RV32IA-NEXT: mv a0, a2
10015; RV32IA-NEXT: lw s5, 8(sp)
10016; RV32IA-NEXT: lw s4, 12(sp)
10017; RV32IA-NEXT: lw s3, 16(sp)
10018; RV32IA-NEXT: lw s2, 20(sp)
10019; RV32IA-NEXT: lw s1, 24(sp)
10020; RV32IA-NEXT: lw ra, 28(sp)
10021; RV32IA-NEXT: addi sp, sp, 32
10022; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]10023 %1 = atomicrmw umin i64* %a, i64 %b acquire
10024 ret i64 %1
10025}
10026
10027define i64 @atomicrmw_umin_i64_release(i64 *%a, i64 %b) nounwind {
10028; RV32I-LABEL: atomicrmw_umin_i64_release:
10029; RV32I: # %bb.0:
10030; RV32I-NEXT: addi sp, sp, -32
10031; RV32I-NEXT: sw ra, 28(sp)
10032; RV32I-NEXT: sw s1, 24(sp)
10033; RV32I-NEXT: sw s2, 20(sp)
10034; RV32I-NEXT: sw s3, 16(sp)
10035; RV32I-NEXT: sw s4, 12(sp)
10036; RV32I-NEXT: sw s5, 8(sp)
10037; RV32I-NEXT: mv s1, a2
10038; RV32I-NEXT: mv s2, a1
10039; RV32I-NEXT: mv s3, a0
10040; RV32I-NEXT: lw a1, 4(a0)
10041; RV32I-NEXT: lw a2, 0(a0)
10042; RV32I-NEXT: mv s4, sp
10043; RV32I-NEXT: addi s5, zero, 3
10044; RV32I-NEXT: .LBB217_1: # %atomicrmw.start
10045; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
10046; RV32I-NEXT: beq a1, s1, .LBB217_3
10047; RV32I-NEXT: # %bb.2: # %atomicrmw.start
10048; RV32I-NEXT: # in Loop: Header=BB217_1 Depth=1
10049; RV32I-NEXT: sltu a0, s1, a1
10050; RV32I-NEXT: j .LBB217_4
10051; RV32I-NEXT: .LBB217_3: # in Loop: Header=BB217_1 Depth=1
10052; RV32I-NEXT: sltu a0, s2, a2
10053; RV32I-NEXT: .LBB217_4: # %atomicrmw.start
10054; RV32I-NEXT: # in Loop: Header=BB217_1 Depth=1
10055; RV32I-NEXT: xori a0, a0, 1
10056; RV32I-NEXT: sw a2, 0(sp)
10057; RV32I-NEXT: bnez a0, .LBB217_6
10058; RV32I-NEXT: # %bb.5: # %atomicrmw.start
10059; RV32I-NEXT: # in Loop: Header=BB217_1 Depth=1
10060; RV32I-NEXT: mv a2, s2
10061; RV32I-NEXT: .LBB217_6: # %atomicrmw.start
10062; RV32I-NEXT: # in Loop: Header=BB217_1 Depth=1
10063; RV32I-NEXT: mv a3, a1
10064; RV32I-NEXT: bnez a0, .LBB217_8
10065; RV32I-NEXT: # %bb.7: # %atomicrmw.start
10066; RV32I-NEXT: # in Loop: Header=BB217_1 Depth=1
10067; RV32I-NEXT: mv a3, s1
10068; RV32I-NEXT: .LBB217_8: # %atomicrmw.start
10069; RV32I-NEXT: # in Loop: Header=BB217_1 Depth=1
10070; RV32I-NEXT: sw a1, 4(sp)
10071; RV32I-NEXT: mv a0, s3
10072; RV32I-NEXT: mv a1, s4
10073; RV32I-NEXT: mv a4, s5
10074; RV32I-NEXT: mv a5, zero
10075; RV32I-NEXT: call __atomic_compare_exchange_8
10076; RV32I-NEXT: lw a1, 4(sp)
10077; RV32I-NEXT: lw a2, 0(sp)
10078; RV32I-NEXT: beqz a0, .LBB217_1
10079; RV32I-NEXT: # %bb.9: # %atomicrmw.end
10080; RV32I-NEXT: mv a0, a2
10081; RV32I-NEXT: lw s5, 8(sp)
10082; RV32I-NEXT: lw s4, 12(sp)
10083; RV32I-NEXT: lw s3, 16(sp)
10084; RV32I-NEXT: lw s2, 20(sp)
10085; RV32I-NEXT: lw s1, 24(sp)
10086; RV32I-NEXT: lw ra, 28(sp)
10087; RV32I-NEXT: addi sp, sp, 32
10088; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]10089;
10090; RV32IA-LABEL: atomicrmw_umin_i64_release:
10091; RV32IA: # %bb.0:
10092; RV32IA-NEXT: addi sp, sp, -32
10093; RV32IA-NEXT: sw ra, 28(sp)
10094; RV32IA-NEXT: sw s1, 24(sp)
10095; RV32IA-NEXT: sw s2, 20(sp)
10096; RV32IA-NEXT: sw s3, 16(sp)
10097; RV32IA-NEXT: sw s4, 12(sp)
10098; RV32IA-NEXT: sw s5, 8(sp)
10099; RV32IA-NEXT: mv s1, a2
10100; RV32IA-NEXT: mv s2, a1
10101; RV32IA-NEXT: mv s3, a0
10102; RV32IA-NEXT: lw a1, 4(a0)
10103; RV32IA-NEXT: lw a2, 0(a0)
10104; RV32IA-NEXT: mv s4, sp
10105; RV32IA-NEXT: addi s5, zero, 3
10106; RV32IA-NEXT: .LBB217_1: # %atomicrmw.start
10107; RV32IA-NEXT: # =>This Inner Loop Header: Depth=1
10108; RV32IA-NEXT: beq a1, s1, .LBB217_3
10109; RV32IA-NEXT: # %bb.2: # %atomicrmw.start
10110; RV32IA-NEXT: # in Loop: Header=BB217_1 Depth=1
10111; RV32IA-NEXT: sltu a0, s1, a1
10112; RV32IA-NEXT: j .LBB217_4
10113; RV32IA-NEXT: .LBB217_3: # in Loop: Header=BB217_1 Depth=1
10114; RV32IA-NEXT: sltu a0, s2, a2
10115; RV32IA-NEXT: .LBB217_4: # %atomicrmw.start
10116; RV32IA-NEXT: # in Loop: Header=BB217_1 Depth=1
10117; RV32IA-NEXT: xori a0, a0, 1
10118; RV32IA-NEXT: sw a2, 0(sp)
10119; RV32IA-NEXT: bnez a0, .LBB217_6
10120; RV32IA-NEXT: # %bb.5: # %atomicrmw.start
10121; RV32IA-NEXT: # in Loop: Header=BB217_1 Depth=1
10122; RV32IA-NEXT: mv a2, s2
10123; RV32IA-NEXT: .LBB217_6: # %atomicrmw.start
10124; RV32IA-NEXT: # in Loop: Header=BB217_1 Depth=1
10125; RV32IA-NEXT: mv a3, a1
10126; RV32IA-NEXT: bnez a0, .LBB217_8
10127; RV32IA-NEXT: # %bb.7: # %atomicrmw.start
10128; RV32IA-NEXT: # in Loop: Header=BB217_1 Depth=1
10129; RV32IA-NEXT: mv a3, s1
10130; RV32IA-NEXT: .LBB217_8: # %atomicrmw.start
10131; RV32IA-NEXT: # in Loop: Header=BB217_1 Depth=1
10132; RV32IA-NEXT: sw a1, 4(sp)
10133; RV32IA-NEXT: mv a0, s3
10134; RV32IA-NEXT: mv a1, s4
10135; RV32IA-NEXT: mv a4, s5
10136; RV32IA-NEXT: mv a5, zero
10137; RV32IA-NEXT: call __atomic_compare_exchange_8
10138; RV32IA-NEXT: lw a1, 4(sp)
10139; RV32IA-NEXT: lw a2, 0(sp)
10140; RV32IA-NEXT: beqz a0, .LBB217_1
10141; RV32IA-NEXT: # %bb.9: # %atomicrmw.end
10142; RV32IA-NEXT: mv a0, a2
10143; RV32IA-NEXT: lw s5, 8(sp)
10144; RV32IA-NEXT: lw s4, 12(sp)
10145; RV32IA-NEXT: lw s3, 16(sp)
10146; RV32IA-NEXT: lw s2, 20(sp)
10147; RV32IA-NEXT: lw s1, 24(sp)
10148; RV32IA-NEXT: lw ra, 28(sp)
10149; RV32IA-NEXT: addi sp, sp, 32
10150; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]10151 %1 = atomicrmw umin i64* %a, i64 %b release
10152 ret i64 %1
10153}
10154
10155define i64 @atomicrmw_umin_i64_acq_rel(i64 *%a, i64 %b) nounwind {
10156; RV32I-LABEL: atomicrmw_umin_i64_acq_rel:
10157; RV32I: # %bb.0:
10158; RV32I-NEXT: addi sp, sp, -48
10159; RV32I-NEXT: sw ra, 44(sp)
10160; RV32I-NEXT: sw s1, 40(sp)
10161; RV32I-NEXT: sw s2, 36(sp)
10162; RV32I-NEXT: sw s3, 32(sp)
10163; RV32I-NEXT: sw s4, 28(sp)
10164; RV32I-NEXT: sw s5, 24(sp)
10165; RV32I-NEXT: sw s6, 20(sp)
10166; RV32I-NEXT: mv s1, a2
10167; RV32I-NEXT: mv s2, a1
10168; RV32I-NEXT: mv s3, a0
10169; RV32I-NEXT: lw a1, 4(a0)
10170; RV32I-NEXT: lw a2, 0(a0)
10171; RV32I-NEXT: addi s4, sp, 8
10172; RV32I-NEXT: addi s5, zero, 4
10173; RV32I-NEXT: addi s6, zero, 2
10174; RV32I-NEXT: .LBB218_1: # %atomicrmw.start
10175; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
10176; RV32I-NEXT: beq a1, s1, .LBB218_3
10177; RV32I-NEXT: # %bb.2: # %atomicrmw.start
10178; RV32I-NEXT: # in Loop: Header=BB218_1 Depth=1
10179; RV32I-NEXT: sltu a0, s1, a1
10180; RV32I-NEXT: j .LBB218_4
10181; RV32I-NEXT: .LBB218_3: # in Loop: Header=BB218_1 Depth=1
10182; RV32I-NEXT: sltu a0, s2, a2
10183; RV32I-NEXT: .LBB218_4: # %atomicrmw.start
10184; RV32I-NEXT: # in Loop: Header=BB218_1 Depth=1
10185; RV32I-NEXT: xori a0, a0, 1
10186; RV32I-NEXT: sw a2, 8(sp)
10187; RV32I-NEXT: bnez a0, .LBB218_6
10188; RV32I-NEXT: # %bb.5: # %atomicrmw.start
10189; RV32I-NEXT: # in Loop: Header=BB218_1 Depth=1
10190; RV32I-NEXT: mv a2, s2
10191; RV32I-NEXT: .LBB218_6: # %atomicrmw.start
10192; RV32I-NEXT: # in Loop: Header=BB218_1 Depth=1
10193; RV32I-NEXT: mv a3, a1
10194; RV32I-NEXT: bnez a0, .LBB218_8
10195; RV32I-NEXT: # %bb.7: # %atomicrmw.start
10196; RV32I-NEXT: # in Loop: Header=BB218_1 Depth=1
10197; RV32I-NEXT: mv a3, s1
10198; RV32I-NEXT: .LBB218_8: # %atomicrmw.start
10199; RV32I-NEXT: # in Loop: Header=BB218_1 Depth=1
10200; RV32I-NEXT: sw a1, 12(sp)
10201; RV32I-NEXT: mv a0, s3
10202; RV32I-NEXT: mv a1, s4
10203; RV32I-NEXT: mv a4, s5
10204; RV32I-NEXT: mv a5, s6
10205; RV32I-NEXT: call __atomic_compare_exchange_8
10206; RV32I-NEXT: lw a1, 12(sp)
10207; RV32I-NEXT: lw a2, 8(sp)
10208; RV32I-NEXT: beqz a0, .LBB218_1
10209; RV32I-NEXT: # %bb.9: # %atomicrmw.end
10210; RV32I-NEXT: mv a0, a2
10211; RV32I-NEXT: lw s6, 20(sp)
10212; RV32I-NEXT: lw s5, 24(sp)
10213; RV32I-NEXT: lw s4, 28(sp)
10214; RV32I-NEXT: lw s3, 32(sp)
10215; RV32I-NEXT: lw s2, 36(sp)
10216; RV32I-NEXT: lw s1, 40(sp)
10217; RV32I-NEXT: lw ra, 44(sp)
10218; RV32I-NEXT: addi sp, sp, 48
10219; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]10220;
10221; RV32IA-LABEL: atomicrmw_umin_i64_acq_rel:
10222; RV32IA: # %bb.0:
10223; RV32IA-NEXT: addi sp, sp, -48
10224; RV32IA-NEXT: sw ra, 44(sp)
10225; RV32IA-NEXT: sw s1, 40(sp)
10226; RV32IA-NEXT: sw s2, 36(sp)
10227; RV32IA-NEXT: sw s3, 32(sp)
10228; RV32IA-NEXT: sw s4, 28(sp)
10229; RV32IA-NEXT: sw s5, 24(sp)
10230; RV32IA-NEXT: sw s6, 20(sp)
10231; RV32IA-NEXT: mv s1, a2
10232; RV32IA-NEXT: mv s2, a1
10233; RV32IA-NEXT: mv s3, a0
10234; RV32IA-NEXT: lw a1, 4(a0)
10235; RV32IA-NEXT: lw a2, 0(a0)
10236; RV32IA-NEXT: addi s4, sp, 8
10237; RV32IA-NEXT: addi s5, zero, 4
10238; RV32IA-NEXT: addi s6, zero, 2
10239; RV32IA-NEXT: .LBB218_1: # %atomicrmw.start
10240; RV32IA-NEXT: # =>This Inner Loop Header: Depth=1
10241; RV32IA-NEXT: beq a1, s1, .LBB218_3
10242; RV32IA-NEXT: # %bb.2: # %atomicrmw.start
10243; RV32IA-NEXT: # in Loop: Header=BB218_1 Depth=1
10244; RV32IA-NEXT: sltu a0, s1, a1
10245; RV32IA-NEXT: j .LBB218_4
10246; RV32IA-NEXT: .LBB218_3: # in Loop: Header=BB218_1 Depth=1
10247; RV32IA-NEXT: sltu a0, s2, a2
10248; RV32IA-NEXT: .LBB218_4: # %atomicrmw.start
10249; RV32IA-NEXT: # in Loop: Header=BB218_1 Depth=1
10250; RV32IA-NEXT: xori a0, a0, 1
10251; RV32IA-NEXT: sw a2, 8(sp)
10252; RV32IA-NEXT: bnez a0, .LBB218_6
10253; RV32IA-NEXT: # %bb.5: # %atomicrmw.start
10254; RV32IA-NEXT: # in Loop: Header=BB218_1 Depth=1
10255; RV32IA-NEXT: mv a2, s2
10256; RV32IA-NEXT: .LBB218_6: # %atomicrmw.start
10257; RV32IA-NEXT: # in Loop: Header=BB218_1 Depth=1
10258; RV32IA-NEXT: mv a3, a1
10259; RV32IA-NEXT: bnez a0, .LBB218_8
10260; RV32IA-NEXT: # %bb.7: # %atomicrmw.start
10261; RV32IA-NEXT: # in Loop: Header=BB218_1 Depth=1
10262; RV32IA-NEXT: mv a3, s1
10263; RV32IA-NEXT: .LBB218_8: # %atomicrmw.start
10264; RV32IA-NEXT: # in Loop: Header=BB218_1 Depth=1
10265; RV32IA-NEXT: sw a1, 12(sp)
10266; RV32IA-NEXT: mv a0, s3
10267; RV32IA-NEXT: mv a1, s4
10268; RV32IA-NEXT: mv a4, s5
10269; RV32IA-NEXT: mv a5, s6
10270; RV32IA-NEXT: call __atomic_compare_exchange_8
10271; RV32IA-NEXT: lw a1, 12(sp)
10272; RV32IA-NEXT: lw a2, 8(sp)
10273; RV32IA-NEXT: beqz a0, .LBB218_1
10274; RV32IA-NEXT: # %bb.9: # %atomicrmw.end
10275; RV32IA-NEXT: mv a0, a2
10276; RV32IA-NEXT: lw s6, 20(sp)
10277; RV32IA-NEXT: lw s5, 24(sp)
10278; RV32IA-NEXT: lw s4, 28(sp)
10279; RV32IA-NEXT: lw s3, 32(sp)
10280; RV32IA-NEXT: lw s2, 36(sp)
10281; RV32IA-NEXT: lw s1, 40(sp)
10282; RV32IA-NEXT: lw ra, 44(sp)
10283; RV32IA-NEXT: addi sp, sp, 48
10284; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]10285 %1 = atomicrmw umin i64* %a, i64 %b acq_rel
10286 ret i64 %1
10287}
10288
10289define i64 @atomicrmw_umin_i64_seq_cst(i64 *%a, i64 %b) nounwind {
10290; RV32I-LABEL: atomicrmw_umin_i64_seq_cst:
10291; RV32I: # %bb.0:
10292; RV32I-NEXT: addi sp, sp, -32
10293; RV32I-NEXT: sw ra, 28(sp)
10294; RV32I-NEXT: sw s1, 24(sp)
10295; RV32I-NEXT: sw s2, 20(sp)
10296; RV32I-NEXT: sw s3, 16(sp)
10297; RV32I-NEXT: sw s4, 12(sp)
10298; RV32I-NEXT: sw s5, 8(sp)
10299; RV32I-NEXT: mv s1, a2
10300; RV32I-NEXT: mv s2, a1
10301; RV32I-NEXT: mv s3, a0
10302; RV32I-NEXT: lw a1, 4(a0)
10303; RV32I-NEXT: lw a2, 0(a0)
10304; RV32I-NEXT: mv s4, sp
10305; RV32I-NEXT: addi s5, zero, 5
10306; RV32I-NEXT: .LBB219_1: # %atomicrmw.start
10307; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
10308; RV32I-NEXT: beq a1, s1, .LBB219_3
10309; RV32I-NEXT: # %bb.2: # %atomicrmw.start
10310; RV32I-NEXT: # in Loop: Header=BB219_1 Depth=1
10311; RV32I-NEXT: sltu a0, s1, a1
10312; RV32I-NEXT: j .LBB219_4
10313; RV32I-NEXT: .LBB219_3: # in Loop: Header=BB219_1 Depth=1
10314; RV32I-NEXT: sltu a0, s2, a2
10315; RV32I-NEXT: .LBB219_4: # %atomicrmw.start
10316; RV32I-NEXT: # in Loop: Header=BB219_1 Depth=1
10317; RV32I-NEXT: xori a0, a0, 1
10318; RV32I-NEXT: sw a2, 0(sp)
10319; RV32I-NEXT: bnez a0, .LBB219_6
10320; RV32I-NEXT: # %bb.5: # %atomicrmw.start
10321; RV32I-NEXT: # in Loop: Header=BB219_1 Depth=1
10322; RV32I-NEXT: mv a2, s2
10323; RV32I-NEXT: .LBB219_6: # %atomicrmw.start
10324; RV32I-NEXT: # in Loop: Header=BB219_1 Depth=1
10325; RV32I-NEXT: mv a3, a1
10326; RV32I-NEXT: bnez a0, .LBB219_8
10327; RV32I-NEXT: # %bb.7: # %atomicrmw.start
10328; RV32I-NEXT: # in Loop: Header=BB219_1 Depth=1
10329; RV32I-NEXT: mv a3, s1
10330; RV32I-NEXT: .LBB219_8: # %atomicrmw.start
10331; RV32I-NEXT: # in Loop: Header=BB219_1 Depth=1
10332; RV32I-NEXT: sw a1, 4(sp)
10333; RV32I-NEXT: mv a0, s3
10334; RV32I-NEXT: mv a1, s4
10335; RV32I-NEXT: mv a4, s5
10336; RV32I-NEXT: mv a5, s5
10337; RV32I-NEXT: call __atomic_compare_exchange_8
10338; RV32I-NEXT: lw a1, 4(sp)
10339; RV32I-NEXT: lw a2, 0(sp)
10340; RV32I-NEXT: beqz a0, .LBB219_1
10341; RV32I-NEXT: # %bb.9: # %atomicrmw.end
10342; RV32I-NEXT: mv a0, a2
10343; RV32I-NEXT: lw s5, 8(sp)
10344; RV32I-NEXT: lw s4, 12(sp)
10345; RV32I-NEXT: lw s3, 16(sp)
10346; RV32I-NEXT: lw s2, 20(sp)
10347; RV32I-NEXT: lw s1, 24(sp)
10348; RV32I-NEXT: lw ra, 28(sp)
10349; RV32I-NEXT: addi sp, sp, 32
10350; RV32I-NEXT: ret
Alex Bradbury21aea512018-09-19 10:54:22 +0000[diff] [blame]10351;
10352; RV32IA-LABEL: atomicrmw_umin_i64_seq_cst:
10353; RV32IA: # %bb.0:
10354; RV32IA-NEXT: addi sp, sp, -32
10355; RV32IA-NEXT: sw ra, 28(sp)
10356; RV32IA-NEXT: sw s1, 24(sp)
10357; RV32IA-NEXT: sw s2, 20(sp)
10358; RV32IA-NEXT: sw s3, 16(sp)
10359; RV32IA-NEXT: sw s4, 12(sp)
10360; RV32IA-NEXT: sw s5, 8(sp)
10361; RV32IA-NEXT: mv s1, a2
10362; RV32IA-NEXT: mv s2, a1
10363; RV32IA-NEXT: mv s3, a0
10364; RV32IA-NEXT: lw a1, 4(a0)
10365; RV32IA-NEXT: lw a2, 0(a0)
10366; RV32IA-NEXT: mv s4, sp
10367; RV32IA-NEXT: addi s5, zero, 5
10368; RV32IA-NEXT: .LBB219_1: # %atomicrmw.start
10369; RV32IA-NEXT: # =>This Inner Loop Header: Depth=1
10370; RV32IA-NEXT: beq a1, s1, .LBB219_3
10371; RV32IA-NEXT: # %bb.2: # %atomicrmw.start
10372; RV32IA-NEXT: # in Loop: Header=BB219_1 Depth=1
10373; RV32IA-NEXT: sltu a0, s1, a1
10374; RV32IA-NEXT: j .LBB219_4
10375; RV32IA-NEXT: .LBB219_3: # in Loop: Header=BB219_1 Depth=1
10376; RV32IA-NEXT: sltu a0, s2, a2
10377; RV32IA-NEXT: .LBB219_4: # %atomicrmw.start
10378; RV32IA-NEXT: # in Loop: Header=BB219_1 Depth=1
10379; RV32IA-NEXT: xori a0, a0, 1
10380; RV32IA-NEXT: sw a2, 0(sp)
10381; RV32IA-NEXT: bnez a0, .LBB219_6
10382; RV32IA-NEXT: # %bb.5: # %atomicrmw.start
10383; RV32IA-NEXT: # in Loop: Header=BB219_1 Depth=1
10384; RV32IA-NEXT: mv a2, s2
10385; RV32IA-NEXT: .LBB219_6: # %atomicrmw.start
10386; RV32IA-NEXT: # in Loop: Header=BB219_1 Depth=1
10387; RV32IA-NEXT: mv a3, a1
10388; RV32IA-NEXT: bnez a0, .LBB219_8
10389; RV32IA-NEXT: # %bb.7: # %atomicrmw.start
10390; RV32IA-NEXT: # in Loop: Header=BB219_1 Depth=1
10391; RV32IA-NEXT: mv a3, s1
10392; RV32IA-NEXT: .LBB219_8: # %atomicrmw.start
10393; RV32IA-NEXT: # in Loop: Header=BB219_1 Depth=1
10394; RV32IA-NEXT: sw a1, 4(sp)
10395; RV32IA-NEXT: mv a0, s3
10396; RV32IA-NEXT: mv a1, s4
10397; RV32IA-NEXT: mv a4, s5
10398; RV32IA-NEXT: mv a5, s5
10399; RV32IA-NEXT: call __atomic_compare_exchange_8
10400; RV32IA-NEXT: lw a1, 4(sp)
10401; RV32IA-NEXT: lw a2, 0(sp)
10402; RV32IA-NEXT: beqz a0, .LBB219_1
10403; RV32IA-NEXT: # %bb.9: # %atomicrmw.end
10404; RV32IA-NEXT: mv a0, a2
10405; RV32IA-NEXT: lw s5, 8(sp)
10406; RV32IA-NEXT: lw s4, 12(sp)
10407; RV32IA-NEXT: lw s3, 16(sp)
10408; RV32IA-NEXT: lw s2, 20(sp)
10409; RV32IA-NEXT: lw s1, 24(sp)
10410; RV32IA-NEXT: lw ra, 28(sp)
10411; RV32IA-NEXT: addi sp, sp, 32
10412; RV32IA-NEXT: ret
Alex Bradburydc790dd2018-06-13 11:58:46 +0000[diff] [blame]10413 %1 = atomicrmw umin i64* %a, i64 %b seq_cst
10414 ret i64 %1
10415}