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Ahmed Bougacha6756a2c2016-07-27 14:31:55 +00001//===- llvm/CodeGen/GlobalISel/InstructionSelector.cpp -----------*- C++ -*-==//
2//
3// The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9/// \file
10/// This file implements the InstructionSelector class.
11//===----------------------------------------------------------------------===//
12
13#include "llvm/CodeGen/GlobalISel/InstructionSelector.h"
14#include "llvm/CodeGen/GlobalISel/RegisterBankInfo.h"
15#include "llvm/CodeGen/MachineInstr.h"
16#include "llvm/Target/TargetInstrInfo.h"
17#include "llvm/Target/TargetRegisterInfo.h"
18
19#define DEBUG_TYPE "instructionselector"
20
21using namespace llvm;
22
23InstructionSelector::InstructionSelector() {}
24
25bool InstructionSelector::constrainSelectedInstRegOperands(
26 MachineInstr &I, const TargetInstrInfo &TII, const TargetRegisterInfo &TRI,
27 const RegisterBankInfo &RBI) const {
28 MachineBasicBlock &MBB = *I.getParent();
29 MachineFunction &MF = *MBB.getParent();
30 MachineRegisterInfo &MRI = MF.getRegInfo();
31
32 for (unsigned OpI = 0, OpE = I.getNumExplicitOperands(); OpI != OpE; ++OpI) {
33 MachineOperand &MO = I.getOperand(OpI);
Ahmed Bougacha6756a2c2016-07-27 14:31:55 +000034
Tim Northoverbdf16242016-10-10 21:50:00 +000035 // There's nothing to be done on non-register operands.
36 if (!MO.isReg())
Ahmed Bougacha7adfac52016-07-29 16:56:16 +000037 continue;
38
39 DEBUG(dbgs() << "Converting operand: " << MO << '\n');
40 assert(MO.isReg() && "Unsupported non-reg operand");
Ahmed Bougacha6756a2c2016-07-27 14:31:55 +000041
Ahmed Bougachae4c03ab2016-08-16 14:37:46 +000042 // Physical registers don't need to be constrained.
43 if (TRI.isPhysicalRegister(MO.getReg()))
44 continue;
45
Ahmed Bougacha6756a2c2016-07-27 14:31:55 +000046 const TargetRegisterClass *RC = TII.getRegClass(I.getDesc(), OpI, &TRI, MF);
47 assert(RC && "Selected inst should have regclass operand");
48
49 // If the operand is a vreg, we should constrain its regclass, and only
50 // insert COPYs if that's impossible.
51 // If the operand is a physreg, we only insert COPYs if the register class
52 // doesn't contain the register.
53 if (RBI.constrainGenericRegister(MO.getReg(), *RC, MRI))
54 continue;
55
56 DEBUG(dbgs() << "Constraining with COPYs isn't implemented yet");
57 return false;
58 }
59 return true;
60}