blob: 5b25271ce1717059f5de4bb3b25a51568d1a532c [file] [log] [blame]
Matt Arsenault7aad8fd2017-01-24 22:02:15 +00001; RUN: llc -march=amdgcn -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s
Marek Olsak75170772015-01-27 17:27:15 +00002; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s
Matt Arsenault0cf39562014-10-22 05:30:42 +00003
Matt Arsenault162c1012014-11-18 21:06:58 +00004; SI-LABEL: {{^}}br_i1_phi:
Nicolai Haehnle814abb52018-10-31 13:27:08 +00005
6; SI: ; %bb
7; SI: s_mov_b64 [[TMP:s\[[0-9]+:[0-9]+\]]], 0
8
9; SI: ; %bb2
10; SI: s_mov_b64 [[TMP]], exec
11
12; SI: ; %bb3
13; SI: s_and_saveexec_b64 {{s\[[0-9]+:[0-9]+\]}}, [[TMP]]
14
Matt Arsenault3dbeefa2017-03-21 21:39:51 +000015define amdgpu_kernel void @br_i1_phi(i32 %arg) {
Matt Arsenault0cf39562014-10-22 05:30:42 +000016bb:
Matt Arsenaulta5329272017-05-17 21:38:21 +000017 %tidig = call i32 @llvm.amdgcn.workitem.id.x()
Tom Stellardbc4497b2016-02-12 23:45:29 +000018 %cmp = trunc i32 %tidig to i1
19 br i1 %cmp, label %bb2, label %bb3
Matt Arsenault0cf39562014-10-22 05:30:42 +000020
21bb2: ; preds = %bb
22 br label %bb3
23
24bb3: ; preds = %bb2, %bb
25 %tmp = phi i1 [ true, %bb2 ], [ false, %bb ]
26 br i1 %tmp, label %bb4, label %bb6
27
28bb4: ; preds = %bb3
Matt Arsenault71fa1f32016-05-18 15:48:44 +000029 %val = load volatile i32, i32 addrspace(1)* undef
30 %tmp5 = mul i32 %val, %arg
Matt Arsenault0cf39562014-10-22 05:30:42 +000031 br label %bb6
32
33bb6: ; preds = %bb4, %bb3
34 ret void
35}
Tom Stellardbc4497b2016-02-12 23:45:29 +000036
Matt Arsenaulta5329272017-05-17 21:38:21 +000037declare i32 @llvm.amdgcn.workitem.id.x() #0
Tom Stellardbc4497b2016-02-12 23:45:29 +000038
Matt Arsenaulta5329272017-05-17 21:38:21 +000039attributes #0 = { nounwind readnone }