blob: 53c498ab87be83d2008ca8de0b464eac7aef08ed [file] [log] [blame]
Logan Chien4ea23b52013-05-10 16:17:24 +00001@ RUN: llvm-mc %s -triple=armv7-unknown-linux-gnueabi -filetype=obj -o - \
Rafael Espindola5ffca732015-04-16 12:59:30 +00002@ RUN: | llvm-readobj -s -sd -sr -t > %t
3@ RUN: FileCheck %s < %t
4@ RUN: FileCheck --check-prefix=RELOC %s < %t
Logan Chien4ea23b52013-05-10 16:17:24 +00005
6@ Check whether the section is switched back properly.
7
8@ The assembler should switch the section back to the corresponding section
9@ after it have emitted the exception handling indices and tables. In this
10@ test case, we are checking whether the section is correct when .section
11@ directives is used.
12
13@ In this example, func1 and func2 should be defined in .TEST1 section.
14@ It is incorrect if the func2 is in .text, .ARM.extab.TEST1, or
15@ .ARM.exidx.TEST1 sections.
16
17 .syntax unified
18
19 .section .TEST1
20
21 .globl func1
22 .align 2
23 .type func1,%function
24 .fnstart
25func1:
26 bx lr
27 .personality __gxx_personality_v0
28 .handlerdata
29 .fnend
30
31 .globl func2
32 .align 2
33 .type func2,%function
34 .fnstart
35func2:
36 bx lr
37 .personality __gxx_personality_v0
38 .handlerdata
39 .fnend
40
41
42@-------------------------------------------------------------------------------
43@ Check the .text section. This should be empty.
44@-------------------------------------------------------------------------------
45@ CHECK: Sections [
46@ CHECK: Section {
47@ CHECK: Name: .text
48@ CHECK: SectionData (
49@ CHECK: )
50@ CHECK: }
51
52
53@-------------------------------------------------------------------------------
54@ Check the .TEST1 section. There should be two "bx lr" instructions.
55@-------------------------------------------------------------------------------
56@ CHECK: Section {
Rafael Espindola2b27b2f2015-11-03 20:02:22 +000057@ CHECK: Index: 3
Rafael Espindola88d1f632015-04-29 20:25:24 +000058@ CHECK-NEXT: Name: .TEST1
Logan Chien4ea23b52013-05-10 16:17:24 +000059@ CHECK: SectionData (
60@ CHECK: 0000: 1EFF2FE1 1EFF2FE1 |../.../.|
61@ CHECK: )
62@ CHECK: }
63
64
65
66@-------------------------------------------------------------------------------
67@ Check the .ARM.extab.TEST1 section.
68@-------------------------------------------------------------------------------
69@ CHECK: Section {
70@ CHECK: Name: .ARM.extab.TEST1
Logan Chien4ea23b52013-05-10 16:17:24 +000071@ CHECK: SectionData (
72@ CHECK: 0000: 00000000 B0B0B000 00000000 B0B0B000 |................|
73@ CHECK: )
74@ CHECK: }
Rafael Espindola7fa23fc2015-04-15 17:24:06 +000075
Rafael Espindola5ffca732015-04-16 12:59:30 +000076@ RELOC: Section {
77@ RELOC: Name: .rel.ARM.extab.TEST1
78@ RELOC: Relocations [
79@ RELOC: 0x0 R_ARM_PREL31 __gxx_personality_v0 0x0
80@ RELOC: 0x8 R_ARM_PREL31 __gxx_personality_v0 0x0
81@ RELOC: ]
82@ RELOC: }
Logan Chien4ea23b52013-05-10 16:17:24 +000083
84
85@-------------------------------------------------------------------------------
86@ Check the .ARM.exidx.TEST1 section.
87@-------------------------------------------------------------------------------
88@ CHECK: Section {
89@ CHECK: Name: .ARM.exidx.TEST1
Rafael Espindola2b27b2f2015-11-03 20:02:22 +000090@ CHECK: Link: 3
Logan Chien4ea23b52013-05-10 16:17:24 +000091@-------------------------------------------------------------------------------
Rafael Espindola4f60a382013-05-30 03:05:14 +000092@ The first word should be the offset to .TEST1.
93@ The second word should be the offset to .ARM.extab.TEST1
94@-------------------------------------------------------------------------------
95@ CHECK: SectionData (
96@ CHECK: 0000: 00000000 00000000 04000000 08000000 |................|
97@ CHECK: )
98@ CHECK: }
Rafael Espindola4f60a382013-05-30 03:05:14 +000099@-------------------------------------------------------------------------------
Logan Chien4ea23b52013-05-10 16:17:24 +0000100@ The first word of each entry should be relocated to .TEST1 section.
101@ The second word of each entry should be relocated to
102@ .ARM.extab.TESET1 section.
103@-------------------------------------------------------------------------------
Rafael Espindola7fa23fc2015-04-15 17:24:06 +0000104
Rafael Espindola5ffca732015-04-16 12:59:30 +0000105@ RELOC: Section {
106@ RELOC: Name: .rel.ARM.exidx.TEST1
107@ RELOC: Relocations [
108@ RELOC: 0x0 R_ARM_PREL31 .TEST1 0x0
109@ RELOC: 0x4 R_ARM_PREL31 .ARM.extab.TEST1 0x0
110@ RELOC: 0x8 R_ARM_PREL31 .TEST1 0x0
111@ RELOC: 0xC R_ARM_PREL31 .ARM.extab.TEST1 0x0
112@ RELOC: ]
113@ RELOC: }
Logan Chien4ea23b52013-05-10 16:17:24 +0000114
115
116@-------------------------------------------------------------------------------
117@ Check the symbols "func1" and "func2". They should belong to .TEST1 section.
118@-------------------------------------------------------------------------------
119@ CHECK: Symbols [
120@ CHECK: Symbol {
121@ CHECK: Name: func1
122@ CHECK: Value: 0x0
123@ CHECK: Size: 0
124@ CHECK: Binding: Global (0x1)
125@ CHECK: Type: Function (0x2)
126@ CHECK: Other: 0
Rafael Espindola88d1f632015-04-29 20:25:24 +0000127@ CHECK: Section: .TEST1
Logan Chien4ea23b52013-05-10 16:17:24 +0000128@ CHECK: }
129@ CHECK: Symbol {
130@ CHECK: Name: func2
131@ CHECK: Value: 0x4
132@ CHECK: Size: 0
133@ CHECK: Binding: Global (0x1)
134@ CHECK: Type: Function (0x2)
135@ CHECK: Other: 0
Rafael Espindola88d1f632015-04-29 20:25:24 +0000136@ CHECK: Section: .TEST1
Logan Chien4ea23b52013-05-10 16:17:24 +0000137@ CHECK: }
138@ CHECK: ]