| Jyotsna Verma | f4e324f | 2013-03-05 18:42:28 +0000 | [diff] [blame] | 1 | ; RUN: llc -march=hexagon -mcpu=hexagonv4 -disable-hexagon-misched < %s | FileCheck %s |
| Sirish Pande | f8e5e3c | 2012-05-03 21:52:53 +0000 | [diff] [blame] | 2 | ; Check that we generate dual stores in one packet in V4 |
| 3 | |
| Jyotsna Verma | f4e324f | 2013-03-05 18:42:28 +0000 | [diff] [blame] | 4 | ; CHECK: memw(r{{[0-9]+}}{{ *}}+{{ *}}#{{[0-9]+}}){{ *}}={{ *}}##500000 |
| 5 | ; CHECK-NEXT: memw(r{{[0-9]+}}{{ *}}+{{ *}}#{{[0-9]+}}){{ *}}={{ *}}##100000 |
| Sirish Pande | f8e5e3c | 2012-05-03 21:52:53 +0000 | [diff] [blame] | 6 | ; CHECK-NEXT: } |
| 7 | |
| 8 | @Reg = global i32 0, align 4 |
| Brendon Cahoon | f6b687e | 2012-05-14 19:35:42 +0000 | [diff] [blame] | 9 | define i32 @main() nounwind { |
| Sirish Pande | f8e5e3c | 2012-05-03 21:52:53 +0000 | [diff] [blame] | 10 | entry: |
| 11 | %number= alloca i32, align 4 |
| Brendon Cahoon | f6b687e | 2012-05-14 19:35:42 +0000 | [diff] [blame] | 12 | store i32 500000, i32* %number, align 4 |
| Sirish Pande | f8e5e3c | 2012-05-03 21:52:53 +0000 | [diff] [blame] | 13 | %number1= alloca i32, align 4 |
| Brendon Cahoon | f6b687e | 2012-05-14 19:35:42 +0000 | [diff] [blame] | 14 | store i32 100000, i32* %number1, align 4 |
| 15 | ret i32 0 |
| Sirish Pande | f8e5e3c | 2012-05-03 21:52:53 +0000 | [diff] [blame] | 16 | } |
| 17 | |