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Tom Stellard217361c2015-08-06 19:28:38 +00001; RUN: llc < %s -march=amdgcn -mcpu=SI -show-mc-encoding -verify-machineinstrs | FileCheck --check-prefix=SI --check-prefix=GCN --check-prefix=SIVI %s
2; RUN: llc < %s -march=amdgcn -mcpu=bonaire -show-mc-encoding -verify-machineinstrs | FileCheck --check-prefix=CI --check-prefix=GCN %s
3; RUN: llc < %s -march=amdgcn -mcpu=tonga -show-mc-encoding -verify-machineinstrs | FileCheck --check-prefix=VI --check-prefix=GCN --check-prefix=SIVI %s
Tom Stellard044e4182014-02-06 18:36:34 +00004
5; SMRD load with an immediate offset.
Marek Olsakfa6607d2015-02-11 14:26:46 +00006; GCN-LABEL: {{^}}smrd0:
Tom Stellard217361c2015-08-06 19:28:38 +00007; SICI: s_load_dword s{{[0-9]}}, s[{{[0-9]:[0-9]}}], 0x1 ; encoding: [0x01
Marek Olsakfa6607d2015-02-11 14:26:46 +00008; VI: s_load_dword s{{[0-9]}}, s[{{[0-9]:[0-9]}}], 0x4
Tom Stellard044e4182014-02-06 18:36:34 +00009define void @smrd0(i32 addrspace(1)* %out, i32 addrspace(2)* %ptr) {
10entry:
David Blaikie79e6c742015-02-27 19:29:02 +000011 %0 = getelementptr i32, i32 addrspace(2)* %ptr, i64 1
David Blaikiea79ac142015-02-27 21:17:42 +000012 %1 = load i32, i32 addrspace(2)* %0
Tom Stellard044e4182014-02-06 18:36:34 +000013 store i32 %1, i32 addrspace(1)* %out
14 ret void
15}
16
17; SMRD load with the largest possible immediate offset.
Marek Olsakfa6607d2015-02-11 14:26:46 +000018; GCN-LABEL: {{^}}smrd1:
Tom Stellard217361c2015-08-06 19:28:38 +000019; SICI: s_load_dword s{{[0-9]}}, s[{{[0-9]:[0-9]}}], 0xff ; encoding: [0xff,0x{{[0-9]+[137]}}
Marek Olsakfa6607d2015-02-11 14:26:46 +000020; VI: s_load_dword s{{[0-9]}}, s[{{[0-9]:[0-9]}}], 0x3fc
Tom Stellard044e4182014-02-06 18:36:34 +000021define void @smrd1(i32 addrspace(1)* %out, i32 addrspace(2)* %ptr) {
22entry:
David Blaikie79e6c742015-02-27 19:29:02 +000023 %0 = getelementptr i32, i32 addrspace(2)* %ptr, i64 255
David Blaikiea79ac142015-02-27 21:17:42 +000024 %1 = load i32, i32 addrspace(2)* %0
Tom Stellard044e4182014-02-06 18:36:34 +000025 store i32 %1, i32 addrspace(1)* %out
26 ret void
27}
28
29; SMRD load with an offset greater than the largest possible immediate.
Marek Olsakfa6607d2015-02-11 14:26:46 +000030; GCN-LABEL: {{^}}smrd2:
31; SI: s_movk_i32 s[[OFFSET:[0-9]]], 0x400
32; SI: s_load_dword s{{[0-9]}}, s[{{[0-9]:[0-9]}}], s[[OFFSET]] ; encoding: [0x0[[OFFSET]]
Tom Stellard217361c2015-08-06 19:28:38 +000033; CI: s_load_dword s{{[0-9]}}, s[{{[0-9]:[0-9]}}], 0x100
Marek Olsakfa6607d2015-02-11 14:26:46 +000034; VI: s_load_dword s{{[0-9]}}, s[{{[0-9]:[0-9]}}], 0x400
35; GCN: s_endpgm
Tom Stellard044e4182014-02-06 18:36:34 +000036define void @smrd2(i32 addrspace(1)* %out, i32 addrspace(2)* %ptr) {
37entry:
David Blaikie79e6c742015-02-27 19:29:02 +000038 %0 = getelementptr i32, i32 addrspace(2)* %ptr, i64 256
David Blaikiea79ac142015-02-27 21:17:42 +000039 %1 = load i32, i32 addrspace(2)* %0
Tom Stellard044e4182014-02-06 18:36:34 +000040 store i32 %1, i32 addrspace(1)* %out
41 ret void
42}
43
Tom Stellardd6cb8e82014-05-09 16:42:21 +000044; SMRD load with a 64-bit offset
Marek Olsakfa6607d2015-02-11 14:26:46 +000045; GCN-LABEL: {{^}}smrd3:
Tom Stellard83f0bce2015-01-29 16:55:25 +000046; FIXME: There are too many copies here because we don't fold immediates
47; through REG_SEQUENCE
Marek Olsak93df0602015-07-27 18:16:08 +000048; SI: s_load_dwordx2 s[{{[0-9]:[0-9]}}], s[{{[0-9]:[0-9]}}], 0xb ; encoding: [0x0b
Marek Olsakfa6607d2015-02-11 14:26:46 +000049; TODO: Add VI checks
50; GCN: s_endpgm
Tom Stellardd6cb8e82014-05-09 16:42:21 +000051define void @smrd3(i32 addrspace(1)* %out, i32 addrspace(2)* %ptr) {
52entry:
David Blaikie79e6c742015-02-27 19:29:02 +000053 %0 = getelementptr i32, i32 addrspace(2)* %ptr, i64 4294967296 ; 2 ^ 32
David Blaikiea79ac142015-02-27 21:17:42 +000054 %1 = load i32, i32 addrspace(2)* %0
Tom Stellardd6cb8e82014-05-09 16:42:21 +000055 store i32 %1, i32 addrspace(1)* %out
56 ret void
57}
58
Tom Stellarddee26a22015-08-06 19:28:30 +000059; SMRD load with the largest possible immediate offset on VI
60; GCN-LABEL: {{^}}smrd4:
61; SI: s_mov_b32 [[OFFSET:s[0-9]+]], 0xffffc
62; SI: s_load_dword s{{[0-9]}}, s[{{[0-9]:[0-9]}}], [[OFFSET]]
Tom Stellard217361c2015-08-06 19:28:38 +000063; CI: s_load_dword s{{[0-9]}}, s[{{[0-9]:[0-9]}}], 0x3ffff
Tom Stellarddee26a22015-08-06 19:28:30 +000064; VI: s_load_dword s{{[0-9]}}, s[{{[0-9]:[0-9]}}], 0xffffc
65define void @smrd4(i32 addrspace(1)* %out, i32 addrspace(2)* %ptr) {
66entry:
67 %0 = getelementptr i32, i32 addrspace(2)* %ptr, i64 262143
68 %1 = load i32, i32 addrspace(2)* %0
69 store i32 %1, i32 addrspace(1)* %out
70 ret void
71}
72
73; SMRD load with an offset greater than the largest possible immediate on VI
74; GCN-LABEL: {{^}}smrd5:
Tom Stellard217361c2015-08-06 19:28:38 +000075; SIVI: s_mov_b32 [[OFFSET:s[0-9]+]], 0x100000
76; SIVI: s_load_dword s{{[0-9]}}, s[{{[0-9]:[0-9]}}], [[OFFSET]]
77; CI: s_load_dword s{{[0-9]}}, s[{{[0-9]:[0-9]}}], 0x40000
Tom Stellarddee26a22015-08-06 19:28:30 +000078; GCN: s_endpgm
79define void @smrd5(i32 addrspace(1)* %out, i32 addrspace(2)* %ptr) {
80entry:
81 %0 = getelementptr i32, i32 addrspace(2)* %ptr, i64 262144
82 %1 = load i32, i32 addrspace(2)* %0
83 store i32 %1, i32 addrspace(1)* %out
84 ret void
85}
86
Tom Stellard044e4182014-02-06 18:36:34 +000087; SMRD load using the load.const intrinsic with an immediate offset
Marek Olsakfa6607d2015-02-11 14:26:46 +000088; GCN-LABEL: {{^}}smrd_load_const0:
Tom Stellard217361c2015-08-06 19:28:38 +000089; SICI: s_buffer_load_dword s{{[0-9]}}, s[{{[0-9]:[0-9]}}], 0x4 ; encoding: [0x04
Marek Olsakfa6607d2015-02-11 14:26:46 +000090; VI: s_buffer_load_dword s{{[0-9]}}, s[{{[0-9]:[0-9]}}], 0x10
Nicolai Haehnledf3a20c2016-04-06 19:40:20 +000091define amdgpu_ps void @smrd_load_const0(<16 x i8> addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, float, float, float, float) {
Tom Stellard044e4182014-02-06 18:36:34 +000092main_body:
David Blaikie79e6c742015-02-27 19:29:02 +000093 %20 = getelementptr <16 x i8>, <16 x i8> addrspace(2)* %0, i32 0
David Blaikiea79ac142015-02-27 21:17:42 +000094 %21 = load <16 x i8>, <16 x i8> addrspace(2)* %20
Tom Stellard044e4182014-02-06 18:36:34 +000095 %22 = call float @llvm.SI.load.const(<16 x i8> %21, i32 16)
96 call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 0, float %22, float %22, float %22, float %22)
97 ret void
98}
99
Tom Stellarde04fd9d2014-08-11 22:18:05 +0000100; SMRD load using the load.const intrinsic with the largest possible immediate
101; offset.
Marek Olsakfa6607d2015-02-11 14:26:46 +0000102; GCN-LABEL: {{^}}smrd_load_const1:
Tom Stellard217361c2015-08-06 19:28:38 +0000103; SICI: s_buffer_load_dword s{{[0-9]}}, s[{{[0-9]:[0-9]}}], 0xff ; encoding: [0xff
Marek Olsakfa6607d2015-02-11 14:26:46 +0000104; VI: s_buffer_load_dword s{{[0-9]}}, s[{{[0-9]:[0-9]}}], 0x3fc
Nicolai Haehnledf3a20c2016-04-06 19:40:20 +0000105define amdgpu_ps void @smrd_load_const1(<16 x i8> addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, float, float, float, float) {
Tom Stellard044e4182014-02-06 18:36:34 +0000106main_body:
David Blaikie79e6c742015-02-27 19:29:02 +0000107 %20 = getelementptr <16 x i8>, <16 x i8> addrspace(2)* %0, i32 0
David Blaikiea79ac142015-02-27 21:17:42 +0000108 %21 = load <16 x i8>, <16 x i8> addrspace(2)* %20
Tom Stellard044e4182014-02-06 18:36:34 +0000109 %22 = call float @llvm.SI.load.const(<16 x i8> %21, i32 1020)
110 call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 0, float %22, float %22, float %22, float %22)
111 ret void
112}
Tom Stellarde04fd9d2014-08-11 22:18:05 +0000113; SMRD load using the load.const intrinsic with an offset greater than the
114; largets possible immediate.
Tom Stellard044e4182014-02-06 18:36:34 +0000115; immediate offset.
Marek Olsakfa6607d2015-02-11 14:26:46 +0000116; GCN-LABEL: {{^}}smrd_load_const2:
117; SI: s_movk_i32 s[[OFFSET:[0-9]]], 0x400
118; SI: s_buffer_load_dword s{{[0-9]}}, s[{{[0-9]:[0-9]}}], s[[OFFSET]] ; encoding: [0x0[[OFFSET]]
Tom Stellard217361c2015-08-06 19:28:38 +0000119; CI: s_buffer_load_dword s{{[0-9]}}, s[{{[0-9]:[0-9]}}], 0x100
Marek Olsakfa6607d2015-02-11 14:26:46 +0000120; VI: s_buffer_load_dword s{{[0-9]}}, s[{{[0-9]:[0-9]}}], 0x400
Nicolai Haehnledf3a20c2016-04-06 19:40:20 +0000121define amdgpu_ps void @smrd_load_const2(<16 x i8> addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, float, float, float, float) {
Tom Stellard044e4182014-02-06 18:36:34 +0000122main_body:
David Blaikie79e6c742015-02-27 19:29:02 +0000123 %20 = getelementptr <16 x i8>, <16 x i8> addrspace(2)* %0, i32 0
David Blaikiea79ac142015-02-27 21:17:42 +0000124 %21 = load <16 x i8>, <16 x i8> addrspace(2)* %20
Tom Stellard044e4182014-02-06 18:36:34 +0000125 %22 = call float @llvm.SI.load.const(<16 x i8> %21, i32 1024)
126 call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 0, float %22, float %22, float %22, float %22)
127 ret void
128}
129
Tom Stellarddee26a22015-08-06 19:28:30 +0000130; SMRD load with the largest possible immediate offset on VI
131; GCN-LABEL: {{^}}smrd_load_const3:
132; SI: s_mov_b32 [[OFFSET:s[0-9]+]], 0xffffc
133; SI: s_buffer_load_dword s{{[0-9]}}, s[{{[0-9]:[0-9]}}], [[OFFSET]]
Tom Stellard217361c2015-08-06 19:28:38 +0000134; CI: s_buffer_load_dword s{{[0-9]}}, s[{{[0-9]:[0-9]}}], 0x3ffff
Tom Stellarddee26a22015-08-06 19:28:30 +0000135; VI: s_buffer_load_dword s{{[0-9]}}, s[{{[0-9]:[0-9]}}], 0xffffc
Nicolai Haehnledf3a20c2016-04-06 19:40:20 +0000136define amdgpu_ps void @smrd_load_const3(<16 x i8> addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, float, float, float, float) {
Tom Stellarddee26a22015-08-06 19:28:30 +0000137main_body:
138 %20 = getelementptr <16 x i8>, <16 x i8> addrspace(2)* %0, i32 0
139 %21 = load <16 x i8>, <16 x i8> addrspace(2)* %20
140 %22 = call float @llvm.SI.load.const(<16 x i8> %21, i32 1048572)
141 call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 0, float %22, float %22, float %22, float %22)
142 ret void
143}
144
145; SMRD load with an offset greater than the largest possible immediate on VI
146; GCN-LABEL: {{^}}smrd_load_const4:
Tom Stellard217361c2015-08-06 19:28:38 +0000147; SIVI: s_mov_b32 [[OFFSET:s[0-9]+]], 0x100000
148; SIVI: s_buffer_load_dword s{{[0-9]}}, s[{{[0-9]:[0-9]}}], [[OFFSET]]
149; CI: s_buffer_load_dword s{{[0-9]}}, s[{{[0-9]:[0-9]}}], 0x40000
Tom Stellarddee26a22015-08-06 19:28:30 +0000150; GCN: s_endpgm
Nicolai Haehnledf3a20c2016-04-06 19:40:20 +0000151define amdgpu_ps void @smrd_load_const4(<16 x i8> addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, float, float, float, float) {
Tom Stellarddee26a22015-08-06 19:28:30 +0000152main_body:
153 %20 = getelementptr <16 x i8>, <16 x i8> addrspace(2)* %0, i32 0
154 %21 = load <16 x i8>, <16 x i8> addrspace(2)* %20
155 %22 = call float @llvm.SI.load.const(<16 x i8> %21, i32 1048576)
156 call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 0, float %22, float %22, float %22, float %22)
157 ret void
158}
159
Tom Stellard044e4182014-02-06 18:36:34 +0000160; Function Attrs: nounwind readnone
Nicolai Haehnledf3a20c2016-04-06 19:40:20 +0000161declare float @llvm.SI.load.const(<16 x i8>, i32) #0
Tom Stellard044e4182014-02-06 18:36:34 +0000162
163declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
164
Nicolai Haehnledf3a20c2016-04-06 19:40:20 +0000165attributes #0 = { nounwind readnone }