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Nick Lewyckyc3890d22015-07-29 22:32:47 +00001// WebAssemblyMachineFunctionInfo.h-WebAssembly machine function info-*- C++ -*-
Dan Gohman10e730a2015-06-29 23:51:55 +00002//
3// The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9///
10/// \file
Adrian Prantl5f8f34e42018-05-01 15:54:18 +000011/// This file declares WebAssembly-specific per-machine-function
Dan Gohman10e730a2015-06-29 23:51:55 +000012/// information.
13///
14//===----------------------------------------------------------------------===//
15
16#ifndef LLVM_LIB_TARGET_WEBASSEMBLY_WEBASSEMBLYMACHINEFUNCTIONINFO_H
17#define LLVM_LIB_TARGET_WEBASSEMBLY_WEBASSEMBLYMACHINEFUNCTIONINFO_H
18
Derek Schuff9769deb2015-12-11 23:49:46 +000019#include "MCTargetDesc/WebAssemblyMCTargetDesc.h"
Dan Gohman10e730a2015-06-29 23:51:55 +000020#include "llvm/CodeGen/MachineRegisterInfo.h"
21
22namespace llvm {
23
24/// This class is derived from MachineFunctionInfo and contains private
25/// WebAssembly-specific information for each MachineFunction.
26class WebAssemblyFunctionInfo final : public MachineFunctionInfo {
27 MachineFunction &MF;
28
Dan Gohman754cd112015-11-11 01:33:02 +000029 std::vector<MVT> Params;
Dan Gohman2726b882016-10-06 22:29:32 +000030 std::vector<MVT> Results;
Dan Gohman3acb1872016-10-24 23:27:49 +000031 std::vector<MVT> Locals;
Dan Gohmane51c0582015-10-06 00:27:55 +000032
Dan Gohmancf4748f2015-11-12 17:04:33 +000033 /// A mapping from CodeGen vreg index to WebAssembly register number.
34 std::vector<unsigned> WARegs;
35
Dan Gohman1462faa2015-11-16 16:18:28 +000036 /// A mapping from CodeGen vreg index to a boolean value indicating whether
37 /// the given register is considered to be "stackified", meaning it has been
38 /// determined or made to meet the stack requirements:
39 /// - single use (per path)
40 /// - single def (per path)
Dan Gohman53d13992015-12-02 18:08:49 +000041 /// - defined and used in LIFO order with other stack registers
Dan Gohman1462faa2015-11-16 16:18:28 +000042 BitVector VRegStackified;
43
Derek Schuff27501e22016-02-10 19:51:04 +000044 // A virtual register holding the pointer to the vararg buffer for vararg
45 // functions. It is created and set in TLI::LowerFormalArguments and read by
46 // TLI::LowerVASTART
47 unsigned VarargVreg = -1U;
48
Derek Schuff0d41b7b2016-11-07 22:00:48 +000049 // A virtual register holding the base pointer for functions that have
50 // overaligned values on the user stack.
51 unsigned BasePtrVreg = -1U;
52
Derek Schuff27501e22016-02-10 19:51:04 +000053 public:
Dan Gohman0cfb5f82016-05-10 04:24:02 +000054 explicit WebAssemblyFunctionInfo(MachineFunction &MF) : MF(MF) {}
Dan Gohman10e730a2015-06-29 23:51:55 +000055 ~WebAssemblyFunctionInfo() override;
Dan Gohmane51c0582015-10-06 00:27:55 +000056
Dan Gohman754cd112015-11-11 01:33:02 +000057 void addParam(MVT VT) { Params.push_back(VT); }
58 const std::vector<MVT> &getParams() const { return Params; }
59
Dan Gohman2726b882016-10-06 22:29:32 +000060 void addResult(MVT VT) { Results.push_back(VT); }
61 const std::vector<MVT> &getResults() const { return Results; }
62
Dan Gohmanb8184822018-05-22 04:58:36 +000063 void clearParamsAndResults() { Params.clear(); Results.clear(); }
64
Dan Gohmand934cb82017-02-24 23:18:00 +000065 void setNumLocals(size_t NumLocals) { Locals.resize(NumLocals, MVT::i32); }
66 void setLocal(size_t i, MVT VT) { Locals[i] = VT; }
Dan Gohman3acb1872016-10-24 23:27:49 +000067 void addLocal(MVT VT) { Locals.push_back(VT); }
68 const std::vector<MVT> &getLocals() const { return Locals; }
69
Derek Schuff27501e22016-02-10 19:51:04 +000070 unsigned getVarargBufferVreg() const {
71 assert(VarargVreg != -1U && "Vararg vreg hasn't been set");
72 return VarargVreg;
73 }
74 void setVarargBufferVreg(unsigned Reg) { VarargVreg = Reg; }
75
Derek Schuff0d41b7b2016-11-07 22:00:48 +000076 unsigned getBasePointerVreg() const {
77 assert(BasePtrVreg != -1U && "Base ptr vreg hasn't been set");
78 return BasePtrVreg;
79 }
80 void setBasePointerVreg(unsigned Reg) { BasePtrVreg = Reg; }
81
Dan Gohman058fce52015-11-13 00:21:05 +000082 static const unsigned UnusedReg = -1u;
83
Dan Gohman1462faa2015-11-16 16:18:28 +000084 void stackifyVReg(unsigned VReg) {
Dan Gohman4fc4e422016-10-24 19:49:43 +000085 assert(MF.getRegInfo().getUniqueVRegDef(VReg));
Dan Gohman1462faa2015-11-16 16:18:28 +000086 if (TargetRegisterInfo::virtReg2Index(VReg) >= VRegStackified.size())
87 VRegStackified.resize(TargetRegisterInfo::virtReg2Index(VReg) + 1);
88 VRegStackified.set(TargetRegisterInfo::virtReg2Index(VReg));
89 }
90 bool isVRegStackified(unsigned VReg) const {
91 if (TargetRegisterInfo::virtReg2Index(VReg) >= VRegStackified.size())
92 return false;
93 return VRegStackified.test(TargetRegisterInfo::virtReg2Index(VReg));
94 }
95
Dan Gohman058fce52015-11-13 00:21:05 +000096 void initWARegs();
Dan Gohmancf4748f2015-11-12 17:04:33 +000097 void setWAReg(unsigned VReg, unsigned WAReg) {
Dan Gohman058fce52015-11-13 00:21:05 +000098 assert(WAReg != UnusedReg);
Dan Gohman80e34e02015-11-25 21:13:02 +000099 assert(TargetRegisterInfo::virtReg2Index(VReg) < WARegs.size());
Dan Gohmancf4748f2015-11-12 17:04:33 +0000100 WARegs[TargetRegisterInfo::virtReg2Index(VReg)] = WAReg;
101 }
Derek Schuff9769deb2015-12-11 23:49:46 +0000102 unsigned getWAReg(unsigned Reg) const {
Dan Gohman0cfb5f82016-05-10 04:24:02 +0000103 assert(TargetRegisterInfo::virtReg2Index(Reg) < WARegs.size());
104 return WARegs[TargetRegisterInfo::virtReg2Index(Reg)];
Dan Gohmancf4748f2015-11-12 17:04:33 +0000105 }
Dan Gohmanb7c24002016-05-21 00:21:56 +0000106
107 // For a given stackified WAReg, return the id number to print with push/pop.
108 static unsigned getWARegStackId(unsigned Reg) {
109 assert(Reg & INT32_MIN);
110 return Reg & INT32_MAX;
111 }
Dan Gohman10e730a2015-06-29 23:51:55 +0000112};
113
Dan Gohman2726b882016-10-06 22:29:32 +0000114void ComputeLegalValueVTs(const Function &F, const TargetMachine &TM,
115 Type *Ty, SmallVectorImpl<MVT> &ValueVTs);
116
117void ComputeSignatureVTs(const Function &F, const TargetMachine &TM,
118 SmallVectorImpl<MVT> &Params,
119 SmallVectorImpl<MVT> &Results);
120
Dan Gohman10e730a2015-06-29 23:51:55 +0000121} // end namespace llvm
122
123#endif