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Dylan McKay6d8078f2016-05-06 10:12:31 +00001//===-- AVRTargetMachine.cpp - Define TargetMachine for AVR ---------------===//
2//
3// The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file defines the AVR specific subclass of TargetMachine.
11//
12//===----------------------------------------------------------------------===//
13
14#include "AVRTargetMachine.h"
15
16#include "llvm/CodeGen/Passes.h"
Matthias Braun31d19d42016-05-10 03:21:59 +000017#include "llvm/CodeGen/TargetPassConfig.h"
Dylan McKay6d8078f2016-05-06 10:12:31 +000018#include "llvm/IR/Module.h"
19#include "llvm/IR/LegacyPassManager.h"
20#include "llvm/Support/TargetRegistry.h"
21
22#include "AVRTargetObjectFile.h"
23#include "AVR.h"
24#include "MCTargetDesc/AVRMCTargetDesc.h"
25
26namespace llvm {
27
Dylan McKayb967d162016-09-28 13:29:10 +000028static const char *AVRDataLayout = "e-p:16:16:16-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-n8";
29
Dylan McKay6d8078f2016-05-06 10:12:31 +000030/// Processes a CPU name.
Dylan McKayf1f1c012016-05-18 11:11:38 +000031static StringRef getCPU(StringRef CPU) {
Dylan McKay6d8078f2016-05-06 10:12:31 +000032 if (CPU.empty() || CPU == "generic") {
33 return "avr2";
34 }
35
36 return CPU;
37}
38
Dylan McKaybe8e2e02016-05-20 23:39:04 +000039static Reloc::Model getEffectiveRelocModel(Optional<Reloc::Model> RM) {
40 return RM.hasValue() ? *RM : Reloc::Static;
41}
42
Dylan McKay6d8078f2016-05-06 10:12:31 +000043AVRTargetMachine::AVRTargetMachine(const Target &T, const Triple &TT,
44 StringRef CPU, StringRef FS,
45 const TargetOptions &Options,
Dylan McKaybe8e2e02016-05-20 23:39:04 +000046 Optional<Reloc::Model> RM, CodeModel::Model CM,
Dylan McKay6d8078f2016-05-06 10:12:31 +000047 CodeGenOpt::Level OL)
48 : LLVMTargetMachine(
Dylan McKayb967d162016-09-28 13:29:10 +000049 T, AVRDataLayout, TT,
Dylan McKaybe8e2e02016-05-20 23:39:04 +000050 getCPU(CPU), FS, Options, getEffectiveRelocModel(RM), CM, OL),
Dylan McKayf1f1c012016-05-18 11:11:38 +000051 SubTarget(TT, getCPU(CPU), FS, *this) {
Dylan McKay6d8078f2016-05-06 10:12:31 +000052 this->TLOF = make_unique<AVRTargetObjectFile>();
53 initAsmInfo();
54}
55
56namespace {
57/// AVR Code Generator Pass Configuration Options.
58class AVRPassConfig : public TargetPassConfig {
59public:
60 AVRPassConfig(AVRTargetMachine *TM, PassManagerBase &PM)
61 : TargetPassConfig(TM, PM) {}
62
63 AVRTargetMachine &getAVRTargetMachine() const {
64 return getTM<AVRTargetMachine>();
65 }
66
67 bool addInstSelector() override;
68 void addPreSched2() override;
69 void addPreRegAlloc() override;
70 void addPreEmitPass() override;
71};
72} // namespace
73
74TargetPassConfig *AVRTargetMachine::createPassConfig(PassManagerBase &PM) {
75 return new AVRPassConfig(this, PM);
76}
Dylan McKayc498ba32015-11-12 09:26:44 +000077
78extern "C" void LLVMInitializeAVRTarget() {
Dylan McKay6d8078f2016-05-06 10:12:31 +000079 // Register the target.
80 RegisterTargetMachine<AVRTargetMachine> X(TheAVRTarget);
Dylan McKayc498ba32015-11-12 09:26:44 +000081}
Dylan McKay6d8078f2016-05-06 10:12:31 +000082
83const AVRSubtarget *AVRTargetMachine::getSubtargetImpl() const {
84 return &SubTarget;
85}
86
87const AVRSubtarget *AVRTargetMachine::getSubtargetImpl(const Function &) const {
88 return &SubTarget;
89}
90
91//===----------------------------------------------------------------------===//
92// Pass Pipeline Configuration
93//===----------------------------------------------------------------------===//
94
95bool AVRPassConfig::addInstSelector() {
96 return false;
97}
98
99void AVRPassConfig::addPreRegAlloc() {
100}
101
102void AVRPassConfig::addPreSched2() { }
103
104void AVRPassConfig::addPreEmitPass() {
105}
106
107} // end of namespace llvm