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gerrit-public.fairphone.software / toolchain / llvm-project / bc041b82d44b51a3b7da79c38e4052e28ff8011c / . / llvm / test / CodeGen / AMDGPU / llvm.SI.tbuffer.store.ll
blob: 645c6a6b8d7e13938a94486715c67416343cbfe2 [file] [log] [blame]
Tom Stellard49f8bfd2015-01-06 18:00:21 +0000[diff] [blame]1;RUN: llc < %s -march=amdgcn -mcpu=verde -verify-machineinstrs | FileCheck %s
Marek Olsak75170772015-01-27 17:27:15 +0000[diff] [blame]2;RUN: llc < %s -march=amdgcn -mcpu=tonga -verify-machineinstrs | FileCheck %s
Tom Stellardafcf12f2013-09-12 02:55:14 +0000[diff] [blame]3
Tom Stellard79243d92014-10-01 17:15:17 +0000[diff] [blame]4;CHECK-LABEL: {{^}}test1:
Tom Stellard326d6ec2014-11-05 14:50:53 +0000[diff] [blame]5;CHECK: tbuffer_store_format_xyzw {{v\[[0-9]+:[0-9]+\]}}, 0x20, -1, 0, -1, 0, 14, 4, {{v[0-9]+}}, {{s\[[0-9]+:[0-9]+\]}}, -1, 0, 0
Nicolai Haehnledf3a20c2016-04-06 19:40:20 +0000[diff] [blame]6define amdgpu_vs void @test1(i32 %a1, i32 %vaddr) {
Tom Stellardafcf12f2013-09-12 02:55:14 +0000[diff] [blame]7 %vdata = insertelement <4 x i32> undef, i32 %a1, i32 0
8 call void @llvm.SI.tbuffer.store.v4i32(<16 x i8> undef, <4 x i32> %vdata,
9 i32 4, i32 %vaddr, i32 0, i32 32, i32 14, i32 4, i32 1, i32 0, i32 1,
10 i32 1, i32 0)
11 ret void
12}
13
Tom Stellard79243d92014-10-01 17:15:17 +0000[diff] [blame]14;CHECK-LABEL: {{^}}test2:
Tom Stellard326d6ec2014-11-05 14:50:53 +0000[diff] [blame]15;CHECK: tbuffer_store_format_xyz {{v\[[0-9]+:[0-9]+\]}}, 0x18, -1, 0, -1, 0, 13, 4, {{v[0-9]+}}, {{s\[[0-9]+:[0-9]+\]}}, -1, 0, 0
Nicolai Haehnledf3a20c2016-04-06 19:40:20 +0000[diff] [blame]16define amdgpu_vs void @test2(i32 %a1, i32 %vaddr) {
Tom Stellardafcf12f2013-09-12 02:55:14 +0000[diff] [blame]17 %vdata = insertelement <4 x i32> undef, i32 %a1, i32 0
18 call void @llvm.SI.tbuffer.store.v4i32(<16 x i8> undef, <4 x i32> %vdata,
19 i32 3, i32 %vaddr, i32 0, i32 24, i32 13, i32 4, i32 1, i32 0, i32 1,
20 i32 1, i32 0)
21 ret void
22}
23
Tom Stellard79243d92014-10-01 17:15:17 +0000[diff] [blame]24;CHECK-LABEL: {{^}}test3:
Tom Stellard326d6ec2014-11-05 14:50:53 +0000[diff] [blame]25;CHECK: tbuffer_store_format_xy {{v\[[0-9]+:[0-9]+\]}}, 0x10, -1, 0, -1, 0, 11, 4, {{v[0-9]+}}, {{s\[[0-9]+:[0-9]+\]}}, -1, 0, 0
Nicolai Haehnledf3a20c2016-04-06 19:40:20 +0000[diff] [blame]26define amdgpu_vs void @test3(i32 %a1, i32 %vaddr) {
Tom Stellardafcf12f2013-09-12 02:55:14 +0000[diff] [blame]27 %vdata = insertelement <2 x i32> undef, i32 %a1, i32 0
28 call void @llvm.SI.tbuffer.store.v2i32(<16 x i8> undef, <2 x i32> %vdata,
29 i32 2, i32 %vaddr, i32 0, i32 16, i32 11, i32 4, i32 1, i32 0, i32 1,
30 i32 1, i32 0)
31 ret void
32}
33
Tom Stellard79243d92014-10-01 17:15:17 +0000[diff] [blame]34;CHECK-LABEL: {{^}}test4:
Tom Stellard326d6ec2014-11-05 14:50:53 +0000[diff] [blame]35;CHECK: tbuffer_store_format_x {{v[0-9]+}}, 0x8, -1, 0, -1, 0, 4, 4, {{v[0-9]+}}, {{s\[[0-9]+:[0-9]+\]}}, -1, 0, 0
Nicolai Haehnledf3a20c2016-04-06 19:40:20 +0000[diff] [blame]36define amdgpu_vs void @test4(i32 %vdata, i32 %vaddr) {
Tom Stellardafcf12f2013-09-12 02:55:14 +0000[diff] [blame]37 call void @llvm.SI.tbuffer.store.i32(<16 x i8> undef, i32 %vdata,
38 i32 1, i32 %vaddr, i32 0, i32 8, i32 4, i32 4, i32 1, i32 0, i32 1,
39 i32 1, i32 0)
40 ret void
41}
42
43declare void @llvm.SI.tbuffer.store.i32(<16 x i8>, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32)
44declare void @llvm.SI.tbuffer.store.v2i32(<16 x i8>, <2 x i32>, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32)
45declare void @llvm.SI.tbuffer.store.v4i32(<16 x i8>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32)