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gerrit-public.fairphone.software / toolchain / llvm-project / bc041b82d44b51a3b7da79c38e4052e28ff8011c / . / llvm / test / MC / ARM / neon-mul-encoding.s
blob: d6bc1f3291f3a16bc2466daec2a90d3d9c6e0928 [file] [log] [blame]
Bob Wilsonc3ff5382010-12-15 22:14:01 +0000[diff] [blame]1@ RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unknown -show-encoding < %s | FileCheck %s
Owen Anderson6f9cd062010-10-29 19:51:11 +0000[diff] [blame]2
Jim Grosbach32b83a42011-10-18 18:14:55 +0000[diff] [blame]3 vmul.i8 d16, d16, d17
4 vmul.i16 d16, d16, d17
5 vmul.i32 d16, d16, d17
6 vmul.f32 d16, d16, d17
7 vmul.i8 q8, q8, q9
8 vmul.i16 q8, q8, q9
9 vmul.i32 q8, q8, q9
10 vmul.f32 q8, q8, q9
11 vmul.p8 d16, d16, d17
12 vmul.p8 q8, q8, q9
13 vmul.i16 d18, d8, d0[3]
14
Jim Grosbache9ee1092011-12-08 20:42:35 +0000[diff] [blame]15 vmul.i8 d16, d17
16 vmul.i16 d16, d17
17 vmul.i32 d16, d17
18 vmul.f32 d16, d17
19 vmul.i8 q8, q9
20 vmul.i16 q8, q9
21 vmul.i32 q8, q9
22 vmul.f32 q8, q9
23 vmul.p8 d16, d17
24 vmul.p8 q8, q9
25
Jim Grosbach32b83a42011-10-18 18:14:55 +0000[diff] [blame]26@ CHECK: vmul.i8 d16, d16, d17 @ encoding: [0xb1,0x09,0x40,0xf2]
27@ CHECK: vmul.i16 d16, d16, d17 @ encoding: [0xb1,0x09,0x50,0xf2]
28@ CHECK: vmul.i32 d16, d16, d17 @ encoding: [0xb1,0x09,0x60,0xf2]
29@ CHECK: vmul.f32 d16, d16, d17 @ encoding: [0xb1,0x0d,0x40,0xf3]
30@ CHECK: vmul.i8 q8, q8, q9 @ encoding: [0xf2,0x09,0x40,0xf2]
31@ CHECK: vmul.i16 q8, q8, q9 @ encoding: [0xf2,0x09,0x50,0xf2]
32@ CHECK: vmul.i32 q8, q8, q9 @ encoding: [0xf2,0x09,0x60,0xf2]
33@ CHECK: vmul.f32 q8, q8, q9 @ encoding: [0xf2,0x0d,0x40,0xf3]
34@ CHECK: vmul.p8 d16, d16, d17 @ encoding: [0xb1,0x09,0x40,0xf3]
35@ CHECK: vmul.p8 q8, q8, q9 @ encoding: [0xf2,0x09,0x40,0xf3]
36@ CHECK: vmul.i16 d18, d8, d0[3] @ encoding: [0x68,0x28,0xd8,0xf2]
Jim Grosbach610aa622011-10-04 20:42:35 +0000[diff] [blame]37
Jim Grosbache9ee1092011-12-08 20:42:35 +0000[diff] [blame]38@ CHECK: vmul.i8 d16, d16, d17 @ encoding: [0xb1,0x09,0x40,0xf2]
39@ CHECK: vmul.i16 d16, d16, d17 @ encoding: [0xb1,0x09,0x50,0xf2]
40@ CHECK: vmul.i32 d16, d16, d17 @ encoding: [0xb1,0x09,0x60,0xf2]
41@ CHECK: vmul.f32 d16, d16, d17 @ encoding: [0xb1,0x0d,0x40,0xf3]
42@ CHECK: vmul.i8 q8, q8, q9 @ encoding: [0xf2,0x09,0x40,0xf2]
43@ CHECK: vmul.i16 q8, q8, q9 @ encoding: [0xf2,0x09,0x50,0xf2]
44@ CHECK: vmul.i32 q8, q8, q9 @ encoding: [0xf2,0x09,0x60,0xf2]
45@ CHECK: vmul.f32 q8, q8, q9 @ encoding: [0xf2,0x0d,0x40,0xf3]
46@ CHECK: vmul.p8 d16, d16, d17 @ encoding: [0xb1,0x09,0x40,0xf3]
47@ CHECK: vmul.p8 q8, q8, q9 @ encoding: [0xf2,0x09,0x40,0xf3]
48
Jim Grosbach610aa622011-10-04 20:42:35 +0000[diff] [blame]49
Jim Grosbach32b83a42011-10-18 18:14:55 +0000[diff] [blame]50 vqdmulh.s16 d16, d16, d17
51 vqdmulh.s32 d16, d16, d17
52 vqdmulh.s16 q8, q8, q9
53 vqdmulh.s32 q8, q8, q9
Jim Grosbach4b0844e2011-12-13 20:40:37 +0000[diff] [blame]54 vqdmulh.s16 d16, d17
55 vqdmulh.s32 d16, d17
56 vqdmulh.s16 q8, q9
57 vqdmulh.s32 q8, q9
Jim Grosbach32b83a42011-10-18 18:14:55 +0000[diff] [blame]58 vqdmulh.s16 d11, d2, d3[0]
Jim Grosbach610aa622011-10-04 20:42:35 +0000[diff] [blame]59
Jim Grosbach32b83a42011-10-18 18:14:55 +0000[diff] [blame]60@ CHECK: vqdmulh.s16 d16, d16, d17 @ encoding: [0xa1,0x0b,0x50,0xf2]
61@ CHECK: vqdmulh.s32 d16, d16, d17 @ encoding: [0xa1,0x0b,0x60,0xf2]
62@ CHECK: vqdmulh.s16 q8, q8, q9 @ encoding: [0xe2,0x0b,0x50,0xf2]
63@ CHECK: vqdmulh.s32 q8, q8, q9 @ encoding: [0xe2,0x0b,0x60,0xf2]
Jim Grosbach4b0844e2011-12-13 20:40:37 +0000[diff] [blame]64@ CHECK: vqdmulh.s16 d16, d16, d17 @ encoding: [0xa1,0x0b,0x50,0xf2]
65@ CHECK: vqdmulh.s32 d16, d16, d17 @ encoding: [0xa1,0x0b,0x60,0xf2]
66@ CHECK: vqdmulh.s16 q8, q8, q9 @ encoding: [0xe2,0x0b,0x50,0xf2]
67@ CHECK: vqdmulh.s32 q8, q8, q9 @ encoding: [0xe2,0x0b,0x60,0xf2]
Jim Grosbach32b83a42011-10-18 18:14:55 +0000[diff] [blame]68@ CHECK: vqdmulh.s16 d11, d2, d3[0] @ encoding: [0x43,0xbc,0x92,0xf2]
Jim Grosbach610aa622011-10-04 20:42:35 +0000[diff] [blame]69
70
Jim Grosbach32b83a42011-10-18 18:14:55 +0000[diff] [blame]71 vqrdmulh.s16 d16, d16, d17
72 vqrdmulh.s32 d16, d16, d17
73 vqrdmulh.s16 q8, q8, q9
74 vqrdmulh.s32 q8, q8, q9
Jim Grosbach610aa622011-10-04 20:42:35 +0000[diff] [blame]75
Jim Grosbach32b83a42011-10-18 18:14:55 +0000[diff] [blame]76@ CHECK: vqrdmulh.s16 d16, d16, d17 @ encoding: [0xa1,0x0b,0x50,0xf3]
77@ CHECK: vqrdmulh.s32 d16, d16, d17 @ encoding: [0xa1,0x0b,0x60,0xf3]
78@ CHECK: vqrdmulh.s16 q8, q8, q9 @ encoding: [0xe2,0x0b,0x50,0xf3]
79@ CHECK: vqrdmulh.s32 q8, q8, q9 @ encoding: [0xe2,0x0b,0x60,0xf3]
Jim Grosbach610aa622011-10-04 20:42:35 +0000[diff] [blame]80
81
Jim Grosbach32b83a42011-10-18 18:14:55 +0000[diff] [blame]82 vmull.s8 q8, d16, d17
83 vmull.s16 q8, d16, d17
84 vmull.s32 q8, d16, d17
85 vmull.u8 q8, d16, d17
86 vmull.u16 q8, d16, d17
87 vmull.u32 q8, d16, d17
88 vmull.p8 q8, d16, d17
Jim Grosbach610aa622011-10-04 20:42:35 +0000[diff] [blame]89
Jim Grosbach32b83a42011-10-18 18:14:55 +0000[diff] [blame]90@ CHECK: vmull.s8 q8, d16, d17 @ encoding: [0xa1,0x0c,0xc0,0xf2]
91@ CHECK: vmull.s16 q8, d16, d17 @ encoding: [0xa1,0x0c,0xd0,0xf2]
92@ CHECK: vmull.s32 q8, d16, d17 @ encoding: [0xa1,0x0c,0xe0,0xf2]
93@ CHECK: vmull.u8 q8, d16, d17 @ encoding: [0xa1,0x0c,0xc0,0xf3]
94@ CHECK: vmull.u16 q8, d16, d17 @ encoding: [0xa1,0x0c,0xd0,0xf3]
95@ CHECK: vmull.u32 q8, d16, d17 @ encoding: [0xa1,0x0c,0xe0,0xf3]
96@ CHECK: vmull.p8 q8, d16, d17 @ encoding: [0xa1,0x0e,0xc0,0xf2]
Jim Grosbach610aa622011-10-04 20:42:35 +0000[diff] [blame]97
98
Jim Grosbach32b83a42011-10-18 18:14:55 +0000[diff] [blame]99 vqdmull.s16 q8, d16, d17
100 vqdmull.s32 q8, d16, d17
Jim Grosbach610aa622011-10-04 20:42:35 +0000[diff] [blame]101
Jim Grosbach32b83a42011-10-18 18:14:55 +0000[diff] [blame]102@ CHECK: vqdmull.s16 q8, d16, d17 @ encoding: [0xa1,0x0d,0xd0,0xf2]
103@ CHECK: vqdmull.s32 q8, d16, d17 @ encoding: [0xa1,0x0d,0xe0,0xf2]
Jim Grosbachfdf9e152011-12-05 20:29:59 +0000[diff] [blame]104
105
106 vmul.i16 d0, d4[2]
107 vmul.s16 d1, d7[3]
108 vmul.u16 d2, d1[1]
109 vmul.i32 d3, d2[0]
110 vmul.s32 d4, d3[1]
111 vmul.u32 d5, d4[0]
112 vmul.f32 d6, d5[1]
113
114 vmul.i16 q0, d4[2]
115 vmul.s16 q1, d7[3]
116 vmul.u16 q2, d1[1]
117 vmul.i32 q3, d2[0]
118 vmul.s32 q4, d3[1]
119 vmul.u32 q5, d4[0]
120 vmul.f32 q6, d5[1]
121
122 vmul.i16 d9, d0, d4[2]
123 vmul.s16 d8, d1, d7[3]
124 vmul.u16 d7, d2, d1[1]
125 vmul.i32 d6, d3, d2[0]
126 vmul.s32 d5, d4, d3[1]
127 vmul.u32 d4, d5, d4[0]
128 vmul.f32 d3, d6, d5[1]
129
130 vmul.i16 q9, q0, d4[2]
131 vmul.s16 q8, q1, d7[3]
132 vmul.u16 q7, q2, d1[1]
133 vmul.i32 q6, q3, d2[0]
134 vmul.s32 q5, q4, d3[1]
135 vmul.u32 q4, q5, d4[0]
136 vmul.f32 q3, q6, d5[1]
137
138@ CHECK: vmul.i16 d0, d0, d4[2] @ encoding: [0x64,0x08,0x90,0xf2]
139@ CHECK: vmul.i16 d1, d1, d7[3] @ encoding: [0x6f,0x18,0x91,0xf2]
140@ CHECK: vmul.i16 d2, d2, d1[1] @ encoding: [0x49,0x28,0x92,0xf2]
141@ CHECK: vmul.i32 d3, d3, d2[0] @ encoding: [0x42,0x38,0xa3,0xf2]
142@ CHECK: vmul.i32 d4, d4, d3[1] @ encoding: [0x63,0x48,0xa4,0xf2]
143@ CHECK: vmul.i32 d5, d5, d4[0] @ encoding: [0x44,0x58,0xa5,0xf2]
144@ CHECK: vmul.f32 d6, d6, d5[1] @ encoding: [0x65,0x69,0xa6,0xf2]
145
146@ CHECK: vmul.i16 q0, q0, d4[2] @ encoding: [0x64,0x08,0x90,0xf3]
147@ CHECK: vmul.i16 q1, q1, d7[3] @ encoding: [0x6f,0x28,0x92,0xf3]
148@ CHECK: vmul.i16 q2, q2, d1[1] @ encoding: [0x49,0x48,0x94,0xf3]
149@ CHECK: vmul.i32 q3, q3, d2[0] @ encoding: [0x42,0x68,0xa6,0xf3]
150@ CHECK: vmul.i32 q4, q4, d3[1] @ encoding: [0x63,0x88,0xa8,0xf3]
151@ CHECK: vmul.i32 q5, q5, d4[0] @ encoding: [0x44,0xa8,0xaa,0xf3]
152@ CHECK: vmul.f32 q6, q6, d5[1] @ encoding: [0x65,0xc9,0xac,0xf3]
153
154@ CHECK: vmul.i16 d9, d0, d4[2] @ encoding: [0x64,0x98,0x90,0xf2]
155@ CHECK: vmul.i16 d8, d1, d7[3] @ encoding: [0x6f,0x88,0x91,0xf2]
156@ CHECK: vmul.i16 d7, d2, d1[1] @ encoding: [0x49,0x78,0x92,0xf2]
157@ CHECK: vmul.i32 d6, d3, d2[0] @ encoding: [0x42,0x68,0xa3,0xf2]
158@ CHECK: vmul.i32 d5, d4, d3[1] @ encoding: [0x63,0x58,0xa4,0xf2]
159@ CHECK: vmul.i32 d4, d5, d4[0] @ encoding: [0x44,0x48,0xa5,0xf2]
160@ CHECK: vmul.f32 d3, d6, d5[1] @ encoding: [0x65,0x39,0xa6,0xf2]
161
162@ CHECK: vmul.i16 q9, q0, d4[2] @ encoding: [0x64,0x28,0xd0,0xf3]
163@ CHECK: vmul.i16 q8, q1, d7[3] @ encoding: [0x6f,0x08,0xd2,0xf3]
164@ CHECK: vmul.i16 q7, q2, d1[1] @ encoding: [0x49,0xe8,0x94,0xf3]
165@ CHECK: vmul.i32 q6, q3, d2[0] @ encoding: [0x42,0xc8,0xa6,0xf3]
166@ CHECK: vmul.i32 q5, q4, d3[1] @ encoding: [0x63,0xa8,0xa8,0xf3]
167@ CHECK: vmul.i32 q4, q5, d4[0] @ encoding: [0x44,0x88,0xaa,0xf3]
168@ CHECK: vmul.f32 q3, q6, d5[1] @ encoding: [0x65,0x69,0xac,0xf3]