Tom Stellard | c54731a | 2013-07-23 23:55:03 +0000 | [diff] [blame] | 1 | ; RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s --check-prefix=R600-CHECK |
Tom Stellard | 70f13db | 2013-10-10 17:11:46 +0000 | [diff] [blame] | 2 | ; RUN: llc < %s -march=r600 -mcpu=SI -verify-machineinstrs | FileCheck %s --check-prefix=SI-CHECK |
Tom Stellard | 75aadc2 | 2012-12-11 21:25:42 +0000 | [diff] [blame] | 3 | |
Tom Stellard | c54731a | 2013-07-23 23:55:03 +0000 | [diff] [blame] | 4 | ; DAGCombiner will transform: |
| 5 | ; (fabs (f32 bitcast (i32 a))) => (f32 bitcast (and (i32 a), 0x7FFFFFFF)) |
| 6 | ; unless isFabsFree returns true |
Tom Stellard | 75aadc2 | 2012-12-11 21:25:42 +0000 | [diff] [blame] | 7 | |
Tom Stellard | 175e7a8 | 2013-11-27 21:23:39 +0000 | [diff] [blame] | 8 | ; R600-CHECK-LABEL: @fabs_free |
Tom Stellard | c54731a | 2013-07-23 23:55:03 +0000 | [diff] [blame] | 9 | ; R600-CHECK-NOT: AND |
| 10 | ; R600-CHECK: |PV.{{[XYZW]}}| |
Tom Stellard | 175e7a8 | 2013-11-27 21:23:39 +0000 | [diff] [blame] | 11 | ; SI-CHECK-LABEL: @fabs_free |
Michel Danzer | 624b02a | 2014-02-04 07:12:38 +0000 | [diff] [blame] | 12 | ; SI-CHECK: V_AND_B32 |
Tom Stellard | c54731a | 2013-07-23 23:55:03 +0000 | [diff] [blame] | 13 | |
| 14 | define void @fabs_free(float addrspace(1)* %out, i32 %in) { |
| 15 | entry: |
| 16 | %0 = bitcast i32 %in to float |
| 17 | %1 = call float @fabs(float %0) |
| 18 | store float %1, float addrspace(1)* %out |
| 19 | ret void |
Tom Stellard | 75aadc2 | 2012-12-11 21:25:42 +0000 | [diff] [blame] | 20 | } |
| 21 | |
Tom Stellard | 175e7a8 | 2013-11-27 21:23:39 +0000 | [diff] [blame] | 22 | ; R600-CHECK-LABEL: @fabs_v2 |
| 23 | ; R600-CHECK: |{{(PV|T[0-9])\.[XYZW]}}| |
| 24 | ; R600-CHECK: |{{(PV|T[0-9])\.[XYZW]}}| |
| 25 | ; SI-CHECK-LABEL: @fabs_v2 |
Michel Danzer | 624b02a | 2014-02-04 07:12:38 +0000 | [diff] [blame] | 26 | ; SI-CHECK: V_AND_B32 |
| 27 | ; SI-CHECK: V_AND_B32 |
Tom Stellard | 175e7a8 | 2013-11-27 21:23:39 +0000 | [diff] [blame] | 28 | define void @fabs_v2(<2 x float> addrspace(1)* %out, <2 x float> %in) { |
| 29 | entry: |
| 30 | %0 = call <2 x float> @llvm.fabs.v2f32(<2 x float> %in) |
| 31 | store <2 x float> %0, <2 x float> addrspace(1)* %out |
| 32 | ret void |
| 33 | } |
| 34 | |
| 35 | ; R600-CHECK-LABEL: @fabs_v4 |
| 36 | ; R600-CHECK: |{{(PV|T[0-9])\.[XYZW]}}| |
| 37 | ; R600-CHECK: |{{(PV|T[0-9])\.[XYZW]}}| |
| 38 | ; R600-CHECK: |{{(PV|T[0-9])\.[XYZW]}}| |
| 39 | ; R600-CHECK: |{{(PV|T[0-9])\.[XYZW]}}| |
| 40 | ; SI-CHECK-LABEL: @fabs_v4 |
Michel Danzer | 624b02a | 2014-02-04 07:12:38 +0000 | [diff] [blame] | 41 | ; SI-CHECK: V_AND_B32 |
| 42 | ; SI-CHECK: V_AND_B32 |
| 43 | ; SI-CHECK: V_AND_B32 |
| 44 | ; SI-CHECK: V_AND_B32 |
Tom Stellard | 175e7a8 | 2013-11-27 21:23:39 +0000 | [diff] [blame] | 45 | define void @fabs_v4(<4 x float> addrspace(1)* %out, <4 x float> %in) { |
| 46 | entry: |
| 47 | %0 = call <4 x float> @llvm.fabs.v4f32(<4 x float> %in) |
| 48 | store <4 x float> %0, <4 x float> addrspace(1)* %out |
| 49 | ret void |
| 50 | } |
| 51 | |
Vincent Lejeune | 29c0c21 | 2014-05-10 19:18:39 +0000 | [diff] [blame] | 52 | ; SI-CHECK-LABEL: @fabs_fold |
| 53 | ; SI-CHECK-NOT: V_AND_B32_e32 |
| 54 | ; SI-CHECK: V_MUL_F32_e64 v{{[0-9]+}}, s{{[0-9]+}}, |v{{[0-9]+}}| |
| 55 | define void @fabs_fold(float addrspace(1)* %out, float %in0, float %in1) { |
| 56 | entry: |
| 57 | %0 = call float @fabs(float %in0) |
| 58 | %1 = fmul float %0, %in1 |
| 59 | store float %1, float addrspace(1)* %out |
| 60 | ret void |
| 61 | } |
| 62 | |
Tom Stellard | 75aadc2 | 2012-12-11 21:25:42 +0000 | [diff] [blame] | 63 | declare float @fabs(float ) readnone |
Tom Stellard | 175e7a8 | 2013-11-27 21:23:39 +0000 | [diff] [blame] | 64 | declare <2 x float> @llvm.fabs.v2f32(<2 x float> ) readnone |
| 65 | declare <4 x float> @llvm.fabs.v4f32(<4 x float> ) readnone |