blob: 7b08ad67220bf0d520018becc37250a581716ce9 [file] [log] [blame]
Juergen Ributzka5b6234d2013-11-30 03:07:16 +00001; RUN: llc -march=x86-64 -mcpu=corei7-avx -enable-unsafe-fp-math < %s | FileCheck %s
Owen Andersoncc61f872012-08-30 23:35:16 +00002
Stephen Lin764d8d32013-07-12 14:54:12 +00003; CHECK-LABEL: test1
Owen Andersoncc61f872012-08-30 23:35:16 +00004define float @test1(float %a) {
Owen Andersond1545e32012-08-30 23:51:20 +00005; CHECK-NOT: addss
6; CHECK: mulss
7; CHECK-NOT: addss
Owen Andersoncc61f872012-08-30 23:35:16 +00008; CHECK: ret
9 %t1 = fadd float %a, %a
10 %r = fadd float %t1, %t1
11 ret float %r
12}
13
Stephen Lin764d8d32013-07-12 14:54:12 +000014; CHECK-LABEL: test2
Owen Andersoncc61f872012-08-30 23:35:16 +000015define float @test2(float %a) {
Owen Andersond1545e32012-08-30 23:51:20 +000016; CHECK-NOT: addss
17; CHECK: mulss
18; CHECK-NOT: addss
Owen Andersoncc61f872012-08-30 23:35:16 +000019; CHECK: ret
20 %t1 = fmul float 4.0, %a
21 %t2 = fadd float %a, %a
22 %r = fadd float %t1, %t2
23 ret float %r
24}
25
Stephen Lin764d8d32013-07-12 14:54:12 +000026; CHECK-LABEL: test3
Owen Andersoncc61f872012-08-30 23:35:16 +000027define float @test3(float %a) {
Owen Andersond1545e32012-08-30 23:51:20 +000028; CHECK-NOT: addss
Stephen Line31f2d22013-06-14 18:17:35 +000029; CHECK: mulss
30; CHECK-NOT: addss
31; CHECK: ret
32 %t1 = fmul float %a, 4.0
33 %t2 = fadd float %a, %a
34 %r = fadd float %t1, %t2
35 ret float %r
36}
37
Stephen Lin764d8d32013-07-12 14:54:12 +000038; CHECK-LABEL: test4
Stephen Line31f2d22013-06-14 18:17:35 +000039define float @test4(float %a) {
40; CHECK-NOT: addss
41; CHECK: mulss
42; CHECK-NOT: addss
43; CHECK: ret
44 %t1 = fadd float %a, %a
45 %t2 = fmul float 4.0, %a
46 %r = fadd float %t1, %t2
47 ret float %r
48}
49
Stephen Lin764d8d32013-07-12 14:54:12 +000050; CHECK-LABEL: test5
Stephen Line31f2d22013-06-14 18:17:35 +000051define float @test5(float %a) {
52; CHECK-NOT: addss
53; CHECK: mulss
54; CHECK-NOT: addss
55; CHECK: ret
56 %t1 = fadd float %a, %a
57 %t2 = fmul float %a, 4.0
58 %r = fadd float %t1, %t2
59 ret float %r
60}
61
Stephen Lin764d8d32013-07-12 14:54:12 +000062; CHECK-LABEL: test6
Stephen Line31f2d22013-06-14 18:17:35 +000063define float @test6(float %a) {
64; CHECK-NOT: addss
Owen Andersond1545e32012-08-30 23:51:20 +000065; CHECK: xorps
66; CHECK-NOT: addss
Owen Andersoncc61f872012-08-30 23:35:16 +000067; CHECK: ret
68 %t1 = fmul float 2.0, %a
69 %t2 = fadd float %a, %a
70 %r = fsub float %t1, %t2
71 ret float %r
72}
73
Stephen Lin764d8d32013-07-12 14:54:12 +000074; CHECK-LABEL: test7
Stephen Line31f2d22013-06-14 18:17:35 +000075define float @test7(float %a) {
76; CHECK-NOT: addss
77; CHECK: xorps
78; CHECK-NOT: addss
79; CHECK: ret
80 %t1 = fmul float %a, 2.0
81 %t2 = fadd float %a, %a
82 %r = fsub float %t1, %t2
83 ret float %r
84}
85
Stephen Lin764d8d32013-07-12 14:54:12 +000086; CHECK-LABEL: test8
Stephen Line31f2d22013-06-14 18:17:35 +000087define float @test8(float %a) {
Owen Andersonb351c8d2012-11-01 02:00:53 +000088; CHECK-NOT: fma
Benjamin Kramer01b75cc2013-03-09 18:25:40 +000089; CHECK-NOT: mul
Owen Andersonb351c8d2012-11-01 02:00:53 +000090; CHECK-NOT: add
91; CHECK: ret
92 %t1 = fmul float %a, 0.0
93 %t2 = fadd float %a, %t1
94 ret float %t2
95}
96
Stephen Lin764d8d32013-07-12 14:54:12 +000097; CHECK-LABEL: test9
Stephen Line31f2d22013-06-14 18:17:35 +000098define float @test9(float %a) {
99; CHECK-NOT: fma
100; CHECK-NOT: mul
101; CHECK-NOT: add
102; CHECK: ret
103 %t1 = fmul float 0.0, %a
104 %t2 = fadd float %t1, %a
105 ret float %t2
106}
107
Stephen Lin764d8d32013-07-12 14:54:12 +0000108; CHECK-LABEL: test10
Stephen Line31f2d22013-06-14 18:17:35 +0000109define float @test10(float %a) {
110; CHECK-NOT: add
111; CHECK: vxorps
112; CHECK: ret
113 %t1 = fsub float -0.0, %a
114 %t2 = fadd float %a, %t1
115 ret float %t2
116}
117
Stephen Lin764d8d32013-07-12 14:54:12 +0000118; CHECK-LABEL: test11
Stephen Line31f2d22013-06-14 18:17:35 +0000119define float @test11(float %a) {
Owen Andersonb351c8d2012-11-01 02:00:53 +0000120; CHECK-NOT: add
121; CHECK: vxorps
122; CHECK: ret
123 %t1 = fsub float -0.0, %a
124 %t2 = fadd float %a, %t1
125 ret float %t2
126}