blob: 5d0be38217825580fa08fb5981859ec9343e4554 [file] [log] [blame]
Matt Arsenaulte57206d2016-05-25 18:07:36 +00001; RUN: llc -march=amdgcn -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
Marek Olsak75170772015-01-27 17:27:15 +00002; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
Tom Stellard20ee94f2013-08-14 22:22:09 +00003
4; This test just checks that the compiler doesn't crash.
Matt Arsenault2acc7a42014-06-11 19:31:13 +00005
Tom Stellard79243d92014-10-01 17:15:17 +00006; FUNC-LABEL: {{^}}v32i8_to_v8i32:
Yaxun Liu0124b542018-02-13 18:00:25 +00007define amdgpu_ps float @v32i8_to_v8i32(<32 x i8> addrspace(4)* inreg) #0 {
Tom Stellard20ee94f2013-08-14 22:22:09 +00008entry:
Yaxun Liu0124b542018-02-13 18:00:25 +00009 %1 = load <32 x i8>, <32 x i8> addrspace(4)* %0
Tom Stellard20ee94f2013-08-14 22:22:09 +000010 %2 = bitcast <32 x i8> %1 to <8 x i32>
11 %3 = extractelement <8 x i32> %2, i32 1
12 %4 = icmp ne i32 %3, 0
13 %5 = select i1 %4, float 0.0, float 1.0
Matt Arsenault3ea06332017-02-22 00:02:21 +000014 ret float %5
Tom Stellard20ee94f2013-08-14 22:22:09 +000015}
16
Tom Stellard79243d92014-10-01 17:15:17 +000017; FUNC-LABEL: {{^}}i8ptr_v16i8ptr:
Tom Stellard326d6ec2014-11-05 14:50:53 +000018; SI: s_endpgm
Matt Arsenault3dbeefa2017-03-21 21:39:51 +000019define amdgpu_kernel void @i8ptr_v16i8ptr(<16 x i8> addrspace(1)* %out, i8 addrspace(1)* %in) {
Tom Stellard6c7a7e82014-02-13 23:34:12 +000020entry:
21 %0 = bitcast i8 addrspace(1)* %in to <16 x i8> addrspace(1)*
David Blaikiea79ac142015-02-27 21:17:42 +000022 %1 = load <16 x i8>, <16 x i8> addrspace(1)* %0
Tom Stellard6c7a7e82014-02-13 23:34:12 +000023 store <16 x i8> %1, <16 x i8> addrspace(1)* %out
24 ret void
25}
Matt Arsenault064c2062014-06-11 17:40:32 +000026
Matt Arsenault3dbeefa2017-03-21 21:39:51 +000027define amdgpu_kernel void @f32_to_v2i16(<2 x i16> addrspace(1)* %out, float addrspace(1)* %in) nounwind {
David Blaikiea79ac142015-02-27 21:17:42 +000028 %load = load float, float addrspace(1)* %in, align 4
Matt Arsenaulteb522e62017-02-27 22:15:25 +000029 %fadd32 = fadd float %load, 1.0
30 %bc = bitcast float %fadd32 to <2 x i16>
31 %add.bitcast = add <2 x i16> %bc, <i16 2, i16 2>
32 store <2 x i16> %add.bitcast, <2 x i16> addrspace(1)* %out
Matt Arsenault064c2062014-06-11 17:40:32 +000033 ret void
34}
35
Matt Arsenault3dbeefa2017-03-21 21:39:51 +000036define amdgpu_kernel void @v2i16_to_f32(float addrspace(1)* %out, <2 x i16> addrspace(1)* %in) nounwind {
David Blaikiea79ac142015-02-27 21:17:42 +000037 %load = load <2 x i16>, <2 x i16> addrspace(1)* %in, align 4
Matt Arsenaulteb522e62017-02-27 22:15:25 +000038 %add.v2i16 = add <2 x i16> %load, <i16 2, i16 2>
39 %bc = bitcast <2 x i16> %add.v2i16 to float
40 %fadd.bitcast = fadd float %bc, 1.0
41 store float %fadd.bitcast, float addrspace(1)* %out
42 ret void
43}
44
Matt Arsenault3dbeefa2017-03-21 21:39:51 +000045define amdgpu_kernel void @f32_to_v2f16(<2 x half> addrspace(1)* %out, float addrspace(1)* %in) nounwind {
Matt Arsenaulteb522e62017-02-27 22:15:25 +000046 %load = load float, float addrspace(1)* %in, align 4
47 %fadd32 = fadd float %load, 1.0
48 %bc = bitcast float %fadd32 to <2 x half>
49 %add.bitcast = fadd <2 x half> %bc, <half 2.0, half 2.0>
50 store <2 x half> %add.bitcast, <2 x half> addrspace(1)* %out
51 ret void
52}
53
Matt Arsenault3dbeefa2017-03-21 21:39:51 +000054define amdgpu_kernel void @v2f16_to_f32(float addrspace(1)* %out, <2 x half> addrspace(1)* %in) nounwind {
Matt Arsenaulteb522e62017-02-27 22:15:25 +000055 %load = load <2 x half>, <2 x half> addrspace(1)* %in, align 4
56 %add.v2f16 = fadd <2 x half> %load, <half 2.0, half 2.0>
57 %bc = bitcast <2 x half> %add.v2f16 to float
58 %fadd.bitcast = fadd float %bc, 1.0
59 store float %fadd.bitcast, float addrspace(1)* %out
Matt Arsenault064c2062014-06-11 17:40:32 +000060 ret void
61}
Matt Arsenault364a6742014-06-11 17:50:44 +000062
Matt Arsenault3dbeefa2017-03-21 21:39:51 +000063define amdgpu_kernel void @v4i8_to_i32(i32 addrspace(1)* %out, <4 x i8> addrspace(1)* %in) nounwind {
David Blaikiea79ac142015-02-27 21:17:42 +000064 %load = load <4 x i8>, <4 x i8> addrspace(1)* %in, align 4
Matt Arsenault364a6742014-06-11 17:50:44 +000065 %bc = bitcast <4 x i8> %load to i32
66 store i32 %bc, i32 addrspace(1)* %out, align 4
67 ret void
68}
69
Matt Arsenault3dbeefa2017-03-21 21:39:51 +000070define amdgpu_kernel void @i32_to_v4i8(<4 x i8> addrspace(1)* %out, i32 addrspace(1)* %in) nounwind {
David Blaikiea79ac142015-02-27 21:17:42 +000071 %load = load i32, i32 addrspace(1)* %in, align 4
Matt Arsenault364a6742014-06-11 17:50:44 +000072 %bc = bitcast i32 %load to <4 x i8>
73 store <4 x i8> %bc, <4 x i8> addrspace(1)* %out, align 4
74 ret void
75}
Matt Arsenault2acc7a42014-06-11 19:31:13 +000076
Tom Stellard79243d92014-10-01 17:15:17 +000077; FUNC-LABEL: {{^}}bitcast_v2i32_to_f64:
Tom Stellard326d6ec2014-11-05 14:50:53 +000078; SI: s_endpgm
Matt Arsenault3dbeefa2017-03-21 21:39:51 +000079define amdgpu_kernel void @bitcast_v2i32_to_f64(double addrspace(1)* %out, <2 x i32> addrspace(1)* %in) {
David Blaikiea79ac142015-02-27 21:17:42 +000080 %val = load <2 x i32>, <2 x i32> addrspace(1)* %in, align 8
Matt Arsenault2acc7a42014-06-11 19:31:13 +000081 %add = add <2 x i32> %val, <i32 4, i32 9>
82 %bc = bitcast <2 x i32> %add to double
Matt Arsenaulteb522e62017-02-27 22:15:25 +000083 %fadd.bc = fadd double %bc, 1.0
84 store double %fadd.bc, double addrspace(1)* %out, align 8
Matt Arsenault2acc7a42014-06-11 19:31:13 +000085 ret void
86}
87
Tom Stellard79243d92014-10-01 17:15:17 +000088; FUNC-LABEL: {{^}}bitcast_f64_to_v2i32:
Tom Stellard326d6ec2014-11-05 14:50:53 +000089; SI: s_endpgm
Matt Arsenault3dbeefa2017-03-21 21:39:51 +000090define amdgpu_kernel void @bitcast_f64_to_v2i32(<2 x i32> addrspace(1)* %out, double addrspace(1)* %in) {
David Blaikiea79ac142015-02-27 21:17:42 +000091 %val = load double, double addrspace(1)* %in, align 8
Matt Arsenault2acc7a42014-06-11 19:31:13 +000092 %add = fadd double %val, 4.0
93 %bc = bitcast double %add to <2 x i32>
94 store <2 x i32> %bc, <2 x i32> addrspace(1)* %out, align 8
95 ret void
96}
Matt Arsenaulte57206d2016-05-25 18:07:36 +000097
98; FUNC-LABEL: {{^}}bitcast_v2i64_to_v2f64:
Matt Arsenault3dbeefa2017-03-21 21:39:51 +000099define amdgpu_kernel void @bitcast_v2i64_to_v2f64(i32 %cond, <2 x double> addrspace(1)* %out, <2 x i64> %value) {
Matt Arsenaulte57206d2016-05-25 18:07:36 +0000100entry:
101 %cmp0 = icmp eq i32 %cond, 0
102 br i1 %cmp0, label %if, label %end
103
104if:
105 %cast = bitcast <2 x i64> %value to <2 x double>
106 br label %end
107
108end:
109 %phi = phi <2 x double> [zeroinitializer, %entry], [%cast, %if]
110 store <2 x double> %phi, <2 x double> addrspace(1)* %out
111 ret void
112}
113
114; FUNC-LABEL: {{^}}bitcast_v2f64_to_v2i64:
Matt Arsenault3dbeefa2017-03-21 21:39:51 +0000115define amdgpu_kernel void @bitcast_v2f64_to_v2i64(i32 %cond, <2 x i64> addrspace(1)* %out, <2 x double> %value) {
Matt Arsenaulte57206d2016-05-25 18:07:36 +0000116entry:
117 %cmp0 = icmp eq i32 %cond, 0
118 br i1 %cmp0, label %if, label %end
119
120if:
121 %cast = bitcast <2 x double> %value to <2 x i64>
122 br label %end
123
124end:
125 %phi = phi <2 x i64> [zeroinitializer, %entry], [%cast, %if]
126 store <2 x i64> %phi, <2 x i64> addrspace(1)* %out
127 ret void
128}