Blame - llvm/lib/Target/X86/X86SchedSkylakeClient.td - toolchain/llvm-project

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Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	1	//=- X86SchedSkylake.td - X86 Skylake Client Scheduling ------- tablegen --=//
				2	//
				3	// The LLVM Compiler Infrastructure
				4	//
				5	// This file is distributed under the University of Illinois Open Source
				6	// License. See LICENSE.TXT for details.
				7	//
				8	//===----------------------------------------------------------------------===//
				9	//
				10	// This file defines the machine model for Skylake Client to support
				11	// instruction scheduling and other instruction cost heuristics.
				12	//
				13	//===----------------------------------------------------------------------===//
				14
				15	def SkylakeClientModel : SchedMachineModel {
				16	// All x86 instructions are modeled as a single micro-op, and SKylake can
				17	// decode 6 instructions per cycle.
				18	let IssueWidth = 6;
				19	let MicroOpBufferSize = 224; // Based on the reorder buffer.
				20	let LoadLatency = 5;
				21	let MispredictPenalty = 14;
				22
				23	// Based on the LSD (loop-stream detector) queue size and benchmarking data.
				24	let LoopMicroOpBufferSize = 50;
				25
				26	// This flag is set to allow the scheduler to assign a default model to
				27	// unrecognized opcodes.
				28	let CompleteModel = 0;
				29	}
				30
				31	let SchedModel = SkylakeClientModel in {
				32
				33	// Skylake Client can issue micro-ops to 8 different ports in one cycle.
				34
				35	// Ports 0, 1, 5, and 6 handle all computation.
				36	// Port 4 gets the data half of stores. Store data can be available later than
				37	// the store address, but since we don't model the latency of stores, we can
				38	// ignore that.
				39	// Ports 2 and 3 are identical. They handle loads and the address half of
				40	// stores. Port 7 can handle address calculations.
				41	def SKLPort0 : ProcResource<1>;
				42	def SKLPort1 : ProcResource<1>;
				43	def SKLPort2 : ProcResource<1>;
				44	def SKLPort3 : ProcResource<1>;
				45	def SKLPort4 : ProcResource<1>;
				46	def SKLPort5 : ProcResource<1>;
				47	def SKLPort6 : ProcResource<1>;
				48	def SKLPort7 : ProcResource<1>;
				49
				50	// Many micro-ops are capable of issuing on multiple ports.
				51	def SKLPort01 : ProcResGroup<[SKLPort0, SKLPort1]>;
				52	def SKLPort23 : ProcResGroup<[SKLPort2, SKLPort3]>;
				53	def SKLPort237 : ProcResGroup<[SKLPort2, SKLPort3, SKLPort7]>;
				54	def SKLPort04 : ProcResGroup<[SKLPort0, SKLPort4]>;
				55	def SKLPort05 : ProcResGroup<[SKLPort0, SKLPort5]>;
				56	def SKLPort06 : ProcResGroup<[SKLPort0, SKLPort6]>;
				57	def SKLPort15 : ProcResGroup<[SKLPort1, SKLPort5]>;
				58	def SKLPort16 : ProcResGroup<[SKLPort1, SKLPort6]>;
				59	def SKLPort56 : ProcResGroup<[SKLPort5, SKLPort6]>;
				60	def SKLPort015 : ProcResGroup<[SKLPort0, SKLPort1, SKLPort5]>;
				61	def SKLPort056 : ProcResGroup<[SKLPort0, SKLPort5, SKLPort6]>;
				62	def SKLPort0156: ProcResGroup<[SKLPort0, SKLPort1, SKLPort5, SKLPort6]>;
				63
				64	// 60 Entry Unified Scheduler
				65	def SKLPortAny : ProcResGroup<[SKLPort0, SKLPort1, SKLPort2, SKLPort3, SKLPort4,
				66	SKLPort5, SKLPort6, SKLPort7]> {
				67	let BufferSize=60;
				68	}
				69
				70	// Loads are 5 cycles, so ReadAfterLd registers needn't be available until 5
				71	// cycles after the memory operand.
				72	def : ReadAdvance<ReadAfterLd, 5>;
				73
				74	// Many SchedWrites are defined in pairs with and without a folded load.
				75	// Instructions with folded loads are usually micro-fused, so they only appear
				76	// as two micro-ops when queued in the reservation station.
				77	// This multiclass defines the resource usage for variants with and without
				78	// folded loads.
				79	multiclass SKLWriteResPair<X86FoldableSchedWrite SchedRW,
Simon Pilgrim	30c38c3	2018-03-19 14:46:07 +0000	[diff] [blame]	80	list<ProcResourceKind> ExePorts,
				81	int Lat, list<int> Res = [1], int UOps = 1> {
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	82	// Register variant is using a single cycle on ExePort.
Simon Pilgrim	30c38c3	2018-03-19 14:46:07 +0000	[diff] [blame]	83	def : WriteRes<SchedRW, ExePorts> {
				84	let Latency = Lat;
				85	let ResourceCycles = Res;
				86	let NumMicroOps = UOps;
				87	}
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	88
				89	// Memory variant also uses a cycle on port 2/3 and adds 5 cycles to the
				90	// latency.
Simon Pilgrim	30c38c3	2018-03-19 14:46:07 +0000	[diff] [blame]	91	def : WriteRes<SchedRW.Folded, !listconcat([SKLPort23], ExePorts)> {
				92	let Latency = !add(Lat, 5);
				93	let ResourceCycles = !listconcat([1], Res);
				94	let NumMicroOps = UOps;
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	95	}
				96	}
				97
				98	// A folded store needs a cycle on port 4 for the store data, but it does not
				99	// need an extra port 2/3 cycle to recompute the address.
				100	def : WriteRes<WriteRMW, [SKLPort4]>;
				101
				102	// Arithmetic.
Simon Pilgrim	30c38c3	2018-03-19 14:46:07 +0000	[diff] [blame]	103	defm : SKLWriteResPair<WriteALU, [SKLPort0156], 1>; // Simple integer ALU op.
				104	defm : SKLWriteResPair<WriteIMul, [SKLPort1], 3>; // Integer multiplication.
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	105	def : WriteRes<WriteIMulH, []> { let Latency = 3; } // Integer multiplication, high part.
				106	def SKLDivider : ProcResource<1>; // Integer division issued on port 0.
				107	def : WriteRes<WriteIDiv, [SKLPort0, SKLDivider]> { // Integer division.
				108	let Latency = 25;
				109	let ResourceCycles = [1, 10];
				110	}
				111	def : WriteRes<WriteIDivLd, [SKLPort23, SKLPort0, SKLDivider]> {
				112	let Latency = 29;
				113	let ResourceCycles = [1, 1, 10];
				114	}
				115
				116	def : WriteRes<WriteLEA, [SKLPort15]>; // LEA instructions can't fold loads.
				117
				118	// Integer shifts and rotates.
Simon Pilgrim	30c38c3	2018-03-19 14:46:07 +0000	[diff] [blame]	119	defm : SKLWriteResPair<WriteShift, [SKLPort06], 1>;
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	120
				121	// Loads, stores, and moves, not folded with other operations.
				122	def : WriteRes<WriteLoad, [SKLPort23]> { let Latency = 5; }
				123	def : WriteRes<WriteStore, [SKLPort237, SKLPort4]>;
				124	def : WriteRes<WriteMove, [SKLPort0156]>;
				125
				126	// Idioms that clear a register, like xorps %xmm0, %xmm0.
				127	// These can often bypass execution ports completely.
				128	def : WriteRes<WriteZero, []>;
				129
				130	// Branches don't produce values, so they have no latency, but they still
				131	// consume resources. Indirect branches can fold loads.
Simon Pilgrim	30c38c3	2018-03-19 14:46:07 +0000	[diff] [blame]	132	defm : SKLWriteResPair<WriteJump, [SKLPort06], 1>;
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	133
				134	// Floating point. This covers both scalar and vector operations.
Simon Pilgrim	fb7aa57	2018-03-15 14:45:30 +0000	[diff] [blame]	135	def : WriteRes<WriteFLoad, [SKLPort23]> { let Latency = 6; }
				136	def : WriteRes<WriteFStore, [SKLPort237, SKLPort4]>;
				137	def : WriteRes<WriteFMove, [SKLPort015]>;
				138
Simon Pilgrim	30c38c3	2018-03-19 14:46:07 +0000	[diff] [blame]	139	defm : SKLWriteResPair<WriteFAdd, [SKLPort1], 3>; // Floating point add/sub/compare.
				140	defm : SKLWriteResPair<WriteFMul, [SKLPort0], 5>; // Floating point multiplication.
				141	defm : SKLWriteResPair<WriteFDiv, [SKLPort0], 12>; // 10-14 cycles. // Floating point division.
				142	defm : SKLWriteResPair<WriteFSqrt, [SKLPort0], 15>; // Floating point square root.
				143	defm : SKLWriteResPair<WriteFRcp, [SKLPort0], 5>; // Floating point reciprocal estimate.
				144	defm : SKLWriteResPair<WriteFRsqrt, [SKLPort0], 5>; // Floating point reciprocal square root estimate.
				145	defm : SKLWriteResPair<WriteFMA, [SKLPort01], 4>; // Fused Multiply Add.
				146	defm : SKLWriteResPair<WriteFShuffle, [SKLPort5], 1>; // Floating point vector shuffles.
				147	defm : SKLWriteResPair<WriteFBlend, [SKLPort015], 1>; // Floating point vector blends.
				148	defm : SKLWriteResPair<WriteFVarBlend, [SKLPort5], 2, [2]>; // Fp vector variable blends.
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	149
				150	// FMA Scheduling helper class.
				151	// class FMASC { X86FoldableSchedWrite Sched = WriteFAdd; }
				152
				153	// Vector integer operations.
Simon Pilgrim	fb7aa57	2018-03-15 14:45:30 +0000	[diff] [blame]	154	def : WriteRes<WriteVecLoad, [SKLPort23]> { let Latency = 6; }
				155	def : WriteRes<WriteVecStore, [SKLPort237, SKLPort4]>;
				156	def : WriteRes<WriteVecMove, [SKLPort015]>;
				157
Simon Pilgrim	30c38c3	2018-03-19 14:46:07 +0000	[diff] [blame]	158	defm : SKLWriteResPair<WriteVecALU, [SKLPort15], 1>; // Vector integer ALU op, no logicals.
				159	defm : SKLWriteResPair<WriteVecShift, [SKLPort0], 1>; // Vector integer shifts.
				160	defm : SKLWriteResPair<WriteVecIMul, [SKLPort0], 5>; // Vector integer multiply.
				161	defm : SKLWriteResPair<WriteShuffle, [SKLPort5], 1>; // Vector shuffles.
				162	defm : SKLWriteResPair<WriteBlend, [SKLPort15], 1>; // Vector blends.
				163	defm : SKLWriteResPair<WriteVarBlend, [SKLPort5], 2, [2]>; // Vector variable blends.
				164	defm : SKLWriteResPair<WriteMPSAD, [SKLPort0, SKLPort5], 6, [1, 2]>; // Vector MPSAD.
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	165
				166	// Vector bitwise operations.
				167	// These are often used on both floating point and integer vectors.
Simon Pilgrim	30c38c3	2018-03-19 14:46:07 +0000	[diff] [blame]	168	defm : SKLWriteResPair<WriteVecLogic, [SKLPort015], 1>; // Vector and/or/xor.
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	169
				170	// Conversion between integer and float.
Simon Pilgrim	30c38c3	2018-03-19 14:46:07 +0000	[diff] [blame]	171	defm : SKLWriteResPair<WriteCvtF2I, [SKLPort1], 3>; // Float -> Integer.
				172	defm : SKLWriteResPair<WriteCvtI2F, [SKLPort1], 4>; // Integer -> Float.
				173	defm : SKLWriteResPair<WriteCvtF2F, [SKLPort1], 3>; // Float -> Float size conversion.
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	174
				175	// Strings instructions.
				176	// Packed Compare Implicit Length Strings, Return Mask
				177	// String instructions.
				178	def : WriteRes<WritePCmpIStrM, [SKLPort0]> {
				179	let Latency = 10;
				180	let ResourceCycles = [3];
				181	}
				182	def : WriteRes<WritePCmpIStrMLd, [SKLPort0, SKLPort23]> {
				183	let Latency = 10;
				184	let ResourceCycles = [3, 1];
				185	}
				186	// Packed Compare Explicit Length Strings, Return Mask
				187	def : WriteRes<WritePCmpEStrM, [SKLPort0, SKLPort16, SKLPort5]> {
				188	let Latency = 10;
				189	let ResourceCycles = [3, 2, 4];
				190	}
				191	def : WriteRes<WritePCmpEStrMLd, [SKLPort05, SKLPort16, SKLPort23]> {
				192	let Latency = 10;
				193	let ResourceCycles = [6, 2, 1];
				194	}
				195	// Packed Compare Implicit Length Strings, Return Index
				196	def : WriteRes<WritePCmpIStrI, [SKLPort0]> {
				197	let Latency = 11;
				198	let ResourceCycles = [3];
				199	}
				200	def : WriteRes<WritePCmpIStrILd, [SKLPort0, SKLPort23]> {
				201	let Latency = 11;
				202	let ResourceCycles = [3, 1];
				203	}
				204	// Packed Compare Explicit Length Strings, Return Index
				205	def : WriteRes<WritePCmpEStrI, [SKLPort05, SKLPort16]> {
				206	let Latency = 11;
				207	let ResourceCycles = [6, 2];
				208	}
				209	def : WriteRes<WritePCmpEStrILd, [SKLPort0, SKLPort16, SKLPort5, SKLPort23]> {
				210	let Latency = 11;
				211	let ResourceCycles = [3, 2, 2, 1];
				212	}
				213
				214	// AES instructions.
				215	def : WriteRes<WriteAESDecEnc, [SKLPort5]> { // Decryption, encryption.
				216	let Latency = 7;
				217	let ResourceCycles = [1];
				218	}
				219	def : WriteRes<WriteAESDecEncLd, [SKLPort5, SKLPort23]> {
				220	let Latency = 7;
				221	let ResourceCycles = [1, 1];
				222	}
				223	def : WriteRes<WriteAESIMC, [SKLPort5]> { // InvMixColumn.
				224	let Latency = 14;
				225	let ResourceCycles = [2];
				226	}
				227	def : WriteRes<WriteAESIMCLd, [SKLPort5, SKLPort23]> {
				228	let Latency = 14;
				229	let ResourceCycles = [2, 1];
				230	}
				231	def : WriteRes<WriteAESKeyGen, [SKLPort0, SKLPort5]> { // Key Generation.
				232	let Latency = 10;
				233	let ResourceCycles = [2, 8];
				234	}
				235	def : WriteRes<WriteAESKeyGenLd, [SKLPort0, SKLPort5, SKLPort23]> {
				236	let Latency = 10;
				237	let ResourceCycles = [2, 7, 1];
				238	}
				239
				240	// Carry-less multiplication instructions.
				241	def : WriteRes<WriteCLMul, [SKLPort0, SKLPort5]> {
				242	let Latency = 7;
				243	let ResourceCycles = [2, 1];
				244	}
				245	def : WriteRes<WriteCLMulLd, [SKLPort0, SKLPort5, SKLPort23]> {
				246	let Latency = 7;
				247	let ResourceCycles = [2, 1, 1];
				248	}
				249
				250	// Catch-all for expensive system instructions.
				251	def : WriteRes<WriteSystem, [SKLPort0156]> { let Latency = 100; } // def WriteSystem : SchedWrite;
				252
				253	// AVX2.
Simon Pilgrim	30c38c3	2018-03-19 14:46:07 +0000	[diff] [blame]	254	defm : SKLWriteResPair<WriteFShuffle256, [SKLPort5], 3>; // Fp 256-bit width vector shuffles.
				255	defm : SKLWriteResPair<WriteShuffle256, [SKLPort5], 3>; // 256-bit width vector shuffles.
				256	defm : SKLWriteResPair<WriteVarVecShift, [SKLPort0, SKLPort5], 2, [2, 1]>; // Variable vector shifts.
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	257
				258	// Old microcoded instructions that nobody use.
				259	def : WriteRes<WriteMicrocoded, [SKLPort0156]> { let Latency = 100; } // def WriteMicrocoded : SchedWrite;
				260
				261	// Fence instructions.
				262	def : WriteRes<WriteFence, [SKLPort23, SKLPort4]>;
				263
				264	// Nop, not very useful expect it provides a model for nops!
				265	def : WriteRes<WriteNop, []>;
				266
				267	////////////////////////////////////////////////////////////////////////////////
				268	// Horizontal add/sub instructions.
				269	////////////////////////////////////////////////////////////////////////////////
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	270
Simon Pilgrim	30c38c3	2018-03-19 14:46:07 +0000	[diff] [blame]	271	defm : SKLWriteResPair<WriteFHAdd, [SKLPort1], 3>;
				272	defm : SKLWriteResPair<WritePHAdd, [SKLPort15], 1>;
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	273
				274	// Remaining instrs.
				275
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	276	def SKLWriteResGroup1 : SchedWriteRes<[SKLPort0]> {
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	277	let Latency = 1;
				278	let NumMicroOps = 1;
				279	let ResourceCycles = [1];
				280	}
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	281	def: InstRW<[SKLWriteResGroup1], (instregex "MMX_PADDSBirr")>;
				282	def: InstRW<[SKLWriteResGroup1], (instregex "MMX_PADDSWirr")>;
				283	def: InstRW<[SKLWriteResGroup1], (instregex "MMX_PADDUSBirr")>;
				284	def: InstRW<[SKLWriteResGroup1], (instregex "MMX_PADDUSWirr")>;
				285	def: InstRW<[SKLWriteResGroup1], (instregex "MMX_PAVGBirr")>;
				286	def: InstRW<[SKLWriteResGroup1], (instregex "MMX_PAVGWirr")>;
				287	def: InstRW<[SKLWriteResGroup1], (instregex "MMX_PCMPEQBirr")>;
				288	def: InstRW<[SKLWriteResGroup1], (instregex "MMX_PCMPEQDirr")>;
				289	def: InstRW<[SKLWriteResGroup1], (instregex "MMX_PCMPEQWirr")>;
				290	def: InstRW<[SKLWriteResGroup1], (instregex "MMX_PCMPGTBirr")>;
				291	def: InstRW<[SKLWriteResGroup1], (instregex "MMX_PCMPGTDirr")>;
				292	def: InstRW<[SKLWriteResGroup1], (instregex "MMX_PCMPGTWirr")>;
				293	def: InstRW<[SKLWriteResGroup1], (instregex "MMX_PMAXSWirr")>;
				294	def: InstRW<[SKLWriteResGroup1], (instregex "MMX_PMAXUBirr")>;
				295	def: InstRW<[SKLWriteResGroup1], (instregex "MMX_PMINSWirr")>;
				296	def: InstRW<[SKLWriteResGroup1], (instregex "MMX_PMINUBirr")>;
				297	def: InstRW<[SKLWriteResGroup1], (instregex "MMX_PSLLDri")>;
				298	def: InstRW<[SKLWriteResGroup1], (instregex "MMX_PSLLDrr")>;
				299	def: InstRW<[SKLWriteResGroup1], (instregex "MMX_PSLLQri")>;
				300	def: InstRW<[SKLWriteResGroup1], (instregex "MMX_PSLLQrr")>;
				301	def: InstRW<[SKLWriteResGroup1], (instregex "MMX_PSLLWri")>;
				302	def: InstRW<[SKLWriteResGroup1], (instregex "MMX_PSLLWrr")>;
				303	def: InstRW<[SKLWriteResGroup1], (instregex "MMX_PSRADri")>;
				304	def: InstRW<[SKLWriteResGroup1], (instregex "MMX_PSRADrr")>;
				305	def: InstRW<[SKLWriteResGroup1], (instregex "MMX_PSRAWri")>;
				306	def: InstRW<[SKLWriteResGroup1], (instregex "MMX_PSRAWrr")>;
				307	def: InstRW<[SKLWriteResGroup1], (instregex "MMX_PSRLDri")>;
				308	def: InstRW<[SKLWriteResGroup1], (instregex "MMX_PSRLDrr")>;
				309	def: InstRW<[SKLWriteResGroup1], (instregex "MMX_PSRLQri")>;
				310	def: InstRW<[SKLWriteResGroup1], (instregex "MMX_PSRLQrr")>;
				311	def: InstRW<[SKLWriteResGroup1], (instregex "MMX_PSRLWri")>;
				312	def: InstRW<[SKLWriteResGroup1], (instregex "MMX_PSRLWrr")>;
				313	def: InstRW<[SKLWriteResGroup1], (instregex "MMX_PSUBSBirr")>;
				314	def: InstRW<[SKLWriteResGroup1], (instregex "MMX_PSUBSWirr")>;
				315	def: InstRW<[SKLWriteResGroup1], (instregex "MMX_PSUBUSBirr")>;
				316	def: InstRW<[SKLWriteResGroup1], (instregex "MMX_PSUBUSWirr")>;
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	317
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	318	def SKLWriteResGroup3 : SchedWriteRes<[SKLPort5]> {
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	319	let Latency = 1;
				320	let NumMicroOps = 1;
				321	let ResourceCycles = [1];
				322	}
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	323	def: InstRW<[SKLWriteResGroup3], (instregex "COMP_FST0r")>;
				324	def: InstRW<[SKLWriteResGroup3], (instregex "COM_FST0r")>;
				325	def: InstRW<[SKLWriteResGroup3], (instregex "INSERTPSrr")>;
				326	def: InstRW<[SKLWriteResGroup3], (instregex "MMX_MOVD64rr")>;
				327	def: InstRW<[SKLWriteResGroup3], (instregex "MMX_MOVD64to64rr")>;
Craig Topper	dbddac0	2018-01-25 04:45:30 +0000	[diff] [blame]	328	def: InstRW<[SKLWriteResGroup3], (instregex "MMX_PALIGNRrri")>;
				329	def: InstRW<[SKLWriteResGroup3], (instregex "MMX_PSHUFBrr")>;
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	330	def: InstRW<[SKLWriteResGroup3], (instregex "MMX_PSHUFWri")>;
				331	def: InstRW<[SKLWriteResGroup3], (instregex "MMX_PUNPCKHBWirr")>;
				332	def: InstRW<[SKLWriteResGroup3], (instregex "MMX_PUNPCKHDQirr")>;
				333	def: InstRW<[SKLWriteResGroup3], (instregex "MMX_PUNPCKHWDirr")>;
				334	def: InstRW<[SKLWriteResGroup3], (instregex "MMX_PUNPCKLBWirr")>;
				335	def: InstRW<[SKLWriteResGroup3], (instregex "MMX_PUNPCKLDQirr")>;
				336	def: InstRW<[SKLWriteResGroup3], (instregex "MMX_PUNPCKLWDirr")>;
				337	def: InstRW<[SKLWriteResGroup3], (instregex "MOV64toPQIrr")>;
				338	def: InstRW<[SKLWriteResGroup3], (instregex "MOVDDUPrr")>;
				339	def: InstRW<[SKLWriteResGroup3], (instregex "MOVDI2PDIrr")>;
				340	def: InstRW<[SKLWriteResGroup3], (instregex "MOVHLPSrr")>;
				341	def: InstRW<[SKLWriteResGroup3], (instregex "MOVLHPSrr")>;
Craig Topper	23cc866	2018-01-24 17:58:42 +0000	[diff] [blame]	342	def: InstRW<[SKLWriteResGroup3], (instregex "MOVSDrr")>;
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	343	def: InstRW<[SKLWriteResGroup3], (instregex "MOVSHDUPrr")>;
				344	def: InstRW<[SKLWriteResGroup3], (instregex "MOVSLDUPrr")>;
Craig Topper	23cc866	2018-01-24 17:58:42 +0000	[diff] [blame]	345	def: InstRW<[SKLWriteResGroup3], (instregex "MOVUPDrr")>;
				346	def: InstRW<[SKLWriteResGroup3], (instregex "MOVUPSrr")>;
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	347	def: InstRW<[SKLWriteResGroup3], (instregex "PACKSSDWrr")>;
				348	def: InstRW<[SKLWriteResGroup3], (instregex "PACKSSWBrr")>;
				349	def: InstRW<[SKLWriteResGroup3], (instregex "PACKUSDWrr")>;
				350	def: InstRW<[SKLWriteResGroup3], (instregex "PACKUSWBrr")>;
				351	def: InstRW<[SKLWriteResGroup3], (instregex "PALIGNRrri")>;
				352	def: InstRW<[SKLWriteResGroup3], (instregex "PBLENDWrri")>;
				353	def: InstRW<[SKLWriteResGroup3], (instregex "PMOVSXBDrr")>;
				354	def: InstRW<[SKLWriteResGroup3], (instregex "PMOVSXBQrr")>;
				355	def: InstRW<[SKLWriteResGroup3], (instregex "PMOVSXBWrr")>;
				356	def: InstRW<[SKLWriteResGroup3], (instregex "PMOVSXDQrr")>;
				357	def: InstRW<[SKLWriteResGroup3], (instregex "PMOVSXWDrr")>;
				358	def: InstRW<[SKLWriteResGroup3], (instregex "PMOVSXWQrr")>;
				359	def: InstRW<[SKLWriteResGroup3], (instregex "PMOVZXBDrr")>;
				360	def: InstRW<[SKLWriteResGroup3], (instregex "PMOVZXBQrr")>;
				361	def: InstRW<[SKLWriteResGroup3], (instregex "PMOVZXBWrr")>;
				362	def: InstRW<[SKLWriteResGroup3], (instregex "PMOVZXDQrr")>;
				363	def: InstRW<[SKLWriteResGroup3], (instregex "PMOVZXWDrr")>;
				364	def: InstRW<[SKLWriteResGroup3], (instregex "PMOVZXWQrr")>;
				365	def: InstRW<[SKLWriteResGroup3], (instregex "PSHUFBrr")>;
				366	def: InstRW<[SKLWriteResGroup3], (instregex "PSHUFDri")>;
				367	def: InstRW<[SKLWriteResGroup3], (instregex "PSHUFHWri")>;
				368	def: InstRW<[SKLWriteResGroup3], (instregex "PSHUFLWri")>;
				369	def: InstRW<[SKLWriteResGroup3], (instregex "PSLLDQri")>;
				370	def: InstRW<[SKLWriteResGroup3], (instregex "PSRLDQri")>;
				371	def: InstRW<[SKLWriteResGroup3], (instregex "PUNPCKHBWrr")>;
				372	def: InstRW<[SKLWriteResGroup3], (instregex "PUNPCKHDQrr")>;
				373	def: InstRW<[SKLWriteResGroup3], (instregex "PUNPCKHQDQrr")>;
				374	def: InstRW<[SKLWriteResGroup3], (instregex "PUNPCKHWDrr")>;
				375	def: InstRW<[SKLWriteResGroup3], (instregex "PUNPCKLBWrr")>;
				376	def: InstRW<[SKLWriteResGroup3], (instregex "PUNPCKLDQrr")>;
				377	def: InstRW<[SKLWriteResGroup3], (instregex "PUNPCKLQDQrr")>;
				378	def: InstRW<[SKLWriteResGroup3], (instregex "PUNPCKLWDrr")>;
				379	def: InstRW<[SKLWriteResGroup3], (instregex "SHUFPDrri")>;
				380	def: InstRW<[SKLWriteResGroup3], (instregex "SHUFPSrri")>;
				381	def: InstRW<[SKLWriteResGroup3], (instregex "UCOM_FPr")>;
				382	def: InstRW<[SKLWriteResGroup3], (instregex "UCOM_Fr")>;
				383	def: InstRW<[SKLWriteResGroup3], (instregex "UNPCKHPDrr")>;
				384	def: InstRW<[SKLWriteResGroup3], (instregex "UNPCKHPSrr")>;
				385	def: InstRW<[SKLWriteResGroup3], (instregex "UNPCKLPDrr")>;
				386	def: InstRW<[SKLWriteResGroup3], (instregex "UNPCKLPSrr")>;
				387	def: InstRW<[SKLWriteResGroup3], (instregex "VBROADCASTSSrr")>;
				388	def: InstRW<[SKLWriteResGroup3], (instregex "VINSERTPSrr")>;
				389	def: InstRW<[SKLWriteResGroup3], (instregex "VMOV64toPQIrr")>;
				390	def: InstRW<[SKLWriteResGroup3], (instregex "VMOVDDUPYrr")>;
				391	def: InstRW<[SKLWriteResGroup3], (instregex "VMOVDDUPrr")>;
				392	def: InstRW<[SKLWriteResGroup3], (instregex "VMOVDI2PDIrr")>;
				393	def: InstRW<[SKLWriteResGroup3], (instregex "VMOVHLPSrr")>;
				394	def: InstRW<[SKLWriteResGroup3], (instregex "VMOVLHPSrr")>;
Craig Topper	23cc866	2018-01-24 17:58:42 +0000	[diff] [blame]	395	def: InstRW<[SKLWriteResGroup3], (instregex "VMOVSDrr")>;
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	396	def: InstRW<[SKLWriteResGroup3], (instregex "VMOVSHDUPYrr")>;
				397	def: InstRW<[SKLWriteResGroup3], (instregex "VMOVSHDUPrr")>;
				398	def: InstRW<[SKLWriteResGroup3], (instregex "VMOVSLDUPYrr")>;
				399	def: InstRW<[SKLWriteResGroup3], (instregex "VMOVSLDUPrr")>;
Craig Topper	23cc866	2018-01-24 17:58:42 +0000	[diff] [blame]	400	def: InstRW<[SKLWriteResGroup3], (instregex "VMOVUPDYrr")>;
				401	def: InstRW<[SKLWriteResGroup3], (instregex "VMOVUPDrr")>;
				402	def: InstRW<[SKLWriteResGroup3], (instregex "VMOVUPSYrr")>;
				403	def: InstRW<[SKLWriteResGroup3], (instregex "VMOVUPSrr")>;
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	404	def: InstRW<[SKLWriteResGroup3], (instregex "VPACKSSDWYrr")>;
				405	def: InstRW<[SKLWriteResGroup3], (instregex "VPACKSSDWrr")>;
				406	def: InstRW<[SKLWriteResGroup3], (instregex "VPACKSSWBYrr")>;
				407	def: InstRW<[SKLWriteResGroup3], (instregex "VPACKSSWBrr")>;
				408	def: InstRW<[SKLWriteResGroup3], (instregex "VPACKUSDWYrr")>;
				409	def: InstRW<[SKLWriteResGroup3], (instregex "VPACKUSDWrr")>;
				410	def: InstRW<[SKLWriteResGroup3], (instregex "VPACKUSWBYrr")>;
				411	def: InstRW<[SKLWriteResGroup3], (instregex "VPACKUSWBrr")>;
				412	def: InstRW<[SKLWriteResGroup3], (instregex "VPALIGNRYrri")>;
				413	def: InstRW<[SKLWriteResGroup3], (instregex "VPALIGNRrri")>;
				414	def: InstRW<[SKLWriteResGroup3], (instregex "VPBLENDWYrri")>;
				415	def: InstRW<[SKLWriteResGroup3], (instregex "VPBLENDWrri")>;
				416	def: InstRW<[SKLWriteResGroup3], (instregex "VPBROADCASTDrr")>;
				417	def: InstRW<[SKLWriteResGroup3], (instregex "VPBROADCASTQrr")>;
				418	def: InstRW<[SKLWriteResGroup3], (instregex "VPERMILPDYri")>;
				419	def: InstRW<[SKLWriteResGroup3], (instregex "VPERMILPDYrr")>;
				420	def: InstRW<[SKLWriteResGroup3], (instregex "VPERMILPDri")>;
				421	def: InstRW<[SKLWriteResGroup3], (instregex "VPERMILPDrr")>;
				422	def: InstRW<[SKLWriteResGroup3], (instregex "VPERMILPSYri")>;
				423	def: InstRW<[SKLWriteResGroup3], (instregex "VPERMILPSYrr")>;
				424	def: InstRW<[SKLWriteResGroup3], (instregex "VPERMILPSri")>;
				425	def: InstRW<[SKLWriteResGroup3], (instregex "VPERMILPSrr")>;
				426	def: InstRW<[SKLWriteResGroup3], (instregex "VPMOVSXBDrr")>;
				427	def: InstRW<[SKLWriteResGroup3], (instregex "VPMOVSXBQrr")>;
				428	def: InstRW<[SKLWriteResGroup3], (instregex "VPMOVSXBWrr")>;
				429	def: InstRW<[SKLWriteResGroup3], (instregex "VPMOVSXDQrr")>;
				430	def: InstRW<[SKLWriteResGroup3], (instregex "VPMOVSXWDrr")>;
				431	def: InstRW<[SKLWriteResGroup3], (instregex "VPMOVSXWQrr")>;
				432	def: InstRW<[SKLWriteResGroup3], (instregex "VPMOVZXBDrr")>;
				433	def: InstRW<[SKLWriteResGroup3], (instregex "VPMOVZXBQrr")>;
				434	def: InstRW<[SKLWriteResGroup3], (instregex "VPMOVZXBWrr")>;
				435	def: InstRW<[SKLWriteResGroup3], (instregex "VPMOVZXDQrr")>;
				436	def: InstRW<[SKLWriteResGroup3], (instregex "VPMOVZXWDrr")>;
				437	def: InstRW<[SKLWriteResGroup3], (instregex "VPMOVZXWQrr")>;
				438	def: InstRW<[SKLWriteResGroup3], (instregex "VPSHUFBYrr")>;
				439	def: InstRW<[SKLWriteResGroup3], (instregex "VPSHUFBrr")>;
				440	def: InstRW<[SKLWriteResGroup3], (instregex "VPSHUFDYri")>;
				441	def: InstRW<[SKLWriteResGroup3], (instregex "VPSHUFDri")>;
				442	def: InstRW<[SKLWriteResGroup3], (instregex "VPSHUFHWYri")>;
				443	def: InstRW<[SKLWriteResGroup3], (instregex "VPSHUFHWri")>;
				444	def: InstRW<[SKLWriteResGroup3], (instregex "VPSHUFLWYri")>;
				445	def: InstRW<[SKLWriteResGroup3], (instregex "VPSHUFLWri")>;
				446	def: InstRW<[SKLWriteResGroup3], (instregex "VPSLLDQYri")>;
				447	def: InstRW<[SKLWriteResGroup3], (instregex "VPSLLDQri")>;
				448	def: InstRW<[SKLWriteResGroup3], (instregex "VPSRLDQYri")>;
				449	def: InstRW<[SKLWriteResGroup3], (instregex "VPSRLDQri")>;
				450	def: InstRW<[SKLWriteResGroup3], (instregex "VPUNPCKHBWYrr")>;
				451	def: InstRW<[SKLWriteResGroup3], (instregex "VPUNPCKHBWrr")>;
				452	def: InstRW<[SKLWriteResGroup3], (instregex "VPUNPCKHDQYrr")>;
				453	def: InstRW<[SKLWriteResGroup3], (instregex "VPUNPCKHDQrr")>;
				454	def: InstRW<[SKLWriteResGroup3], (instregex "VPUNPCKHQDQYrr")>;
				455	def: InstRW<[SKLWriteResGroup3], (instregex "VPUNPCKHQDQrr")>;
				456	def: InstRW<[SKLWriteResGroup3], (instregex "VPUNPCKHWDYrr")>;
				457	def: InstRW<[SKLWriteResGroup3], (instregex "VPUNPCKHWDrr")>;
				458	def: InstRW<[SKLWriteResGroup3], (instregex "VPUNPCKLBWYrr")>;
				459	def: InstRW<[SKLWriteResGroup3], (instregex "VPUNPCKLBWrr")>;
				460	def: InstRW<[SKLWriteResGroup3], (instregex "VPUNPCKLDQYrr")>;
				461	def: InstRW<[SKLWriteResGroup3], (instregex "VPUNPCKLDQrr")>;
				462	def: InstRW<[SKLWriteResGroup3], (instregex "VPUNPCKLQDQYrr")>;
				463	def: InstRW<[SKLWriteResGroup3], (instregex "VPUNPCKLQDQrr")>;
				464	def: InstRW<[SKLWriteResGroup3], (instregex "VPUNPCKLWDYrr")>;
				465	def: InstRW<[SKLWriteResGroup3], (instregex "VPUNPCKLWDrr")>;
				466	def: InstRW<[SKLWriteResGroup3], (instregex "VSHUFPDYrri")>;
				467	def: InstRW<[SKLWriteResGroup3], (instregex "VSHUFPDrri")>;
				468	def: InstRW<[SKLWriteResGroup3], (instregex "VSHUFPSYrri")>;
				469	def: InstRW<[SKLWriteResGroup3], (instregex "VSHUFPSrri")>;
				470	def: InstRW<[SKLWriteResGroup3], (instregex "VUNPCKHPDYrr")>;
				471	def: InstRW<[SKLWriteResGroup3], (instregex "VUNPCKHPDrr")>;
				472	def: InstRW<[SKLWriteResGroup3], (instregex "VUNPCKHPSYrr")>;
				473	def: InstRW<[SKLWriteResGroup3], (instregex "VUNPCKHPSrr")>;
				474	def: InstRW<[SKLWriteResGroup3], (instregex "VUNPCKLPDYrr")>;
				475	def: InstRW<[SKLWriteResGroup3], (instregex "VUNPCKLPDrr")>;
				476	def: InstRW<[SKLWriteResGroup3], (instregex "VUNPCKLPSYrr")>;
				477	def: InstRW<[SKLWriteResGroup3], (instregex "VUNPCKLPSrr")>;
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	478
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	479	def SKLWriteResGroup4 : SchedWriteRes<[SKLPort6]> {
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	480	let Latency = 1;
				481	let NumMicroOps = 1;
				482	let ResourceCycles = [1];
				483	}
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	484	def: InstRW<[SKLWriteResGroup4], (instregex "JMP(16\|32\|64)r")>;
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	485
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	486	def SKLWriteResGroup5 : SchedWriteRes<[SKLPort01]> {
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	487	let Latency = 1;
				488	let NumMicroOps = 1;
				489	let ResourceCycles = [1];
				490	}
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	491	def: InstRW<[SKLWriteResGroup5], (instregex "PABSBrr")>;
				492	def: InstRW<[SKLWriteResGroup5], (instregex "PABSDrr")>;
				493	def: InstRW<[SKLWriteResGroup5], (instregex "PABSWrr")>;
				494	def: InstRW<[SKLWriteResGroup5], (instregex "PADDSBrr")>;
				495	def: InstRW<[SKLWriteResGroup5], (instregex "PADDSWrr")>;
				496	def: InstRW<[SKLWriteResGroup5], (instregex "PADDUSBrr")>;
				497	def: InstRW<[SKLWriteResGroup5], (instregex "PADDUSWrr")>;
				498	def: InstRW<[SKLWriteResGroup5], (instregex "PAVGBrr")>;
				499	def: InstRW<[SKLWriteResGroup5], (instregex "PAVGWrr")>;
				500	def: InstRW<[SKLWriteResGroup5], (instregex "PCMPEQBrr")>;
				501	def: InstRW<[SKLWriteResGroup5], (instregex "PCMPEQDrr")>;
				502	def: InstRW<[SKLWriteResGroup5], (instregex "PCMPEQQrr")>;
				503	def: InstRW<[SKLWriteResGroup5], (instregex "PCMPEQWrr")>;
				504	def: InstRW<[SKLWriteResGroup5], (instregex "PCMPGTBrr")>;
				505	def: InstRW<[SKLWriteResGroup5], (instregex "PCMPGTDrr")>;
				506	def: InstRW<[SKLWriteResGroup5], (instregex "PCMPGTWrr")>;
				507	def: InstRW<[SKLWriteResGroup5], (instregex "PMAXSBrr")>;
				508	def: InstRW<[SKLWriteResGroup5], (instregex "PMAXSDrr")>;
				509	def: InstRW<[SKLWriteResGroup5], (instregex "PMAXSWrr")>;
				510	def: InstRW<[SKLWriteResGroup5], (instregex "PMAXUBrr")>;
				511	def: InstRW<[SKLWriteResGroup5], (instregex "PMAXUDrr")>;
				512	def: InstRW<[SKLWriteResGroup5], (instregex "PMAXUWrr")>;
				513	def: InstRW<[SKLWriteResGroup5], (instregex "PMINSBrr")>;
				514	def: InstRW<[SKLWriteResGroup5], (instregex "PMINSDrr")>;
				515	def: InstRW<[SKLWriteResGroup5], (instregex "PMINSWrr")>;
				516	def: InstRW<[SKLWriteResGroup5], (instregex "PMINUBrr")>;
				517	def: InstRW<[SKLWriteResGroup5], (instregex "PMINUDrr")>;
				518	def: InstRW<[SKLWriteResGroup5], (instregex "PMINUWrr")>;
Craig Topper	dbddac0	2018-01-25 04:45:30 +0000	[diff] [blame]	519	def: InstRW<[SKLWriteResGroup5], (instregex "PSIGNBrr")>;
				520	def: InstRW<[SKLWriteResGroup5], (instregex "PSIGNDrr")>;
				521	def: InstRW<[SKLWriteResGroup5], (instregex "PSIGNWrr")>;
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	522	def: InstRW<[SKLWriteResGroup5], (instregex "PSLLDri")>;
				523	def: InstRW<[SKLWriteResGroup5], (instregex "PSLLQri")>;
				524	def: InstRW<[SKLWriteResGroup5], (instregex "PSLLWri")>;
				525	def: InstRW<[SKLWriteResGroup5], (instregex "PSRADri")>;
				526	def: InstRW<[SKLWriteResGroup5], (instregex "PSRAWri")>;
				527	def: InstRW<[SKLWriteResGroup5], (instregex "PSRLDri")>;
				528	def: InstRW<[SKLWriteResGroup5], (instregex "PSRLQri")>;
				529	def: InstRW<[SKLWriteResGroup5], (instregex "PSRLWri")>;
				530	def: InstRW<[SKLWriteResGroup5], (instregex "PSUBSBrr")>;
				531	def: InstRW<[SKLWriteResGroup5], (instregex "PSUBSWrr")>;
				532	def: InstRW<[SKLWriteResGroup5], (instregex "PSUBUSBrr")>;
				533	def: InstRW<[SKLWriteResGroup5], (instregex "PSUBUSWrr")>;
				534	def: InstRW<[SKLWriteResGroup5], (instregex "VPABSBYrr")>;
				535	def: InstRW<[SKLWriteResGroup5], (instregex "VPABSBrr")>;
				536	def: InstRW<[SKLWriteResGroup5], (instregex "VPABSDYrr")>;
				537	def: InstRW<[SKLWriteResGroup5], (instregex "VPABSDrr")>;
				538	def: InstRW<[SKLWriteResGroup5], (instregex "VPABSWYrr")>;
				539	def: InstRW<[SKLWriteResGroup5], (instregex "VPABSWrr")>;
				540	def: InstRW<[SKLWriteResGroup5], (instregex "VPADDSBYrr")>;
				541	def: InstRW<[SKLWriteResGroup5], (instregex "VPADDSBrr")>;
				542	def: InstRW<[SKLWriteResGroup5], (instregex "VPADDSWYrr")>;
				543	def: InstRW<[SKLWriteResGroup5], (instregex "VPADDSWrr")>;
				544	def: InstRW<[SKLWriteResGroup5], (instregex "VPADDUSBYrr")>;
				545	def: InstRW<[SKLWriteResGroup5], (instregex "VPADDUSBrr")>;
				546	def: InstRW<[SKLWriteResGroup5], (instregex "VPADDUSWYrr")>;
				547	def: InstRW<[SKLWriteResGroup5], (instregex "VPADDUSWrr")>;
				548	def: InstRW<[SKLWriteResGroup5], (instregex "VPAVGBYrr")>;
				549	def: InstRW<[SKLWriteResGroup5], (instregex "VPAVGBrr")>;
				550	def: InstRW<[SKLWriteResGroup5], (instregex "VPAVGWYrr")>;
				551	def: InstRW<[SKLWriteResGroup5], (instregex "VPAVGWrr")>;
				552	def: InstRW<[SKLWriteResGroup5], (instregex "VPCMPEQBYrr")>;
				553	def: InstRW<[SKLWriteResGroup5], (instregex "VPCMPEQBrr")>;
				554	def: InstRW<[SKLWriteResGroup5], (instregex "VPCMPEQDYrr")>;
				555	def: InstRW<[SKLWriteResGroup5], (instregex "VPCMPEQDrr")>;
				556	def: InstRW<[SKLWriteResGroup5], (instregex "VPCMPEQQYrr")>;
				557	def: InstRW<[SKLWriteResGroup5], (instregex "VPCMPEQQrr")>;
				558	def: InstRW<[SKLWriteResGroup5], (instregex "VPCMPEQWYrr")>;
				559	def: InstRW<[SKLWriteResGroup5], (instregex "VPCMPEQWrr")>;
				560	def: InstRW<[SKLWriteResGroup5], (instregex "VPCMPGTBYrr")>;
				561	def: InstRW<[SKLWriteResGroup5], (instregex "VPCMPGTBrr")>;
				562	def: InstRW<[SKLWriteResGroup5], (instregex "VPCMPGTDYrr")>;
				563	def: InstRW<[SKLWriteResGroup5], (instregex "VPCMPGTDrr")>;
				564	def: InstRW<[SKLWriteResGroup5], (instregex "VPCMPGTWYrr")>;
				565	def: InstRW<[SKLWriteResGroup5], (instregex "VPCMPGTWrr")>;
				566	def: InstRW<[SKLWriteResGroup5], (instregex "VPMAXSBYrr")>;
				567	def: InstRW<[SKLWriteResGroup5], (instregex "VPMAXSBrr")>;
				568	def: InstRW<[SKLWriteResGroup5], (instregex "VPMAXSDYrr")>;
				569	def: InstRW<[SKLWriteResGroup5], (instregex "VPMAXSDrr")>;
				570	def: InstRW<[SKLWriteResGroup5], (instregex "VPMAXSWYrr")>;
				571	def: InstRW<[SKLWriteResGroup5], (instregex "VPMAXSWrr")>;
				572	def: InstRW<[SKLWriteResGroup5], (instregex "VPMAXUBYrr")>;
				573	def: InstRW<[SKLWriteResGroup5], (instregex "VPMAXUBrr")>;
				574	def: InstRW<[SKLWriteResGroup5], (instregex "VPMAXUDYrr")>;
				575	def: InstRW<[SKLWriteResGroup5], (instregex "VPMAXUDrr")>;
				576	def: InstRW<[SKLWriteResGroup5], (instregex "VPMAXUWYrr")>;
				577	def: InstRW<[SKLWriteResGroup5], (instregex "VPMAXUWrr")>;
				578	def: InstRW<[SKLWriteResGroup5], (instregex "VPMINSBYrr")>;
				579	def: InstRW<[SKLWriteResGroup5], (instregex "VPMINSBrr")>;
				580	def: InstRW<[SKLWriteResGroup5], (instregex "VPMINSDYrr")>;
				581	def: InstRW<[SKLWriteResGroup5], (instregex "VPMINSDrr")>;
				582	def: InstRW<[SKLWriteResGroup5], (instregex "VPMINSWYrr")>;
				583	def: InstRW<[SKLWriteResGroup5], (instregex "VPMINSWrr")>;
				584	def: InstRW<[SKLWriteResGroup5], (instregex "VPMINUBYrr")>;
				585	def: InstRW<[SKLWriteResGroup5], (instregex "VPMINUBrr")>;
				586	def: InstRW<[SKLWriteResGroup5], (instregex "VPMINUDYrr")>;
				587	def: InstRW<[SKLWriteResGroup5], (instregex "VPMINUDrr")>;
				588	def: InstRW<[SKLWriteResGroup5], (instregex "VPMINUWYrr")>;
				589	def: InstRW<[SKLWriteResGroup5], (instregex "VPMINUWrr")>;
Craig Topper	dbddac0	2018-01-25 04:45:30 +0000	[diff] [blame]	590	def: InstRW<[SKLWriteResGroup5], (instregex "VPSIGNBYrr")>;
				591	def: InstRW<[SKLWriteResGroup5], (instregex "VPSIGNBrr")>;
				592	def: InstRW<[SKLWriteResGroup5], (instregex "VPSIGNDYrr")>;
				593	def: InstRW<[SKLWriteResGroup5], (instregex "VPSIGNDrr")>;
				594	def: InstRW<[SKLWriteResGroup5], (instregex "VPSIGNWYrr")>;
				595	def: InstRW<[SKLWriteResGroup5], (instregex "VPSIGNWrr")>;
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	596	def: InstRW<[SKLWriteResGroup5], (instregex "VPSLLDYri")>;
				597	def: InstRW<[SKLWriteResGroup5], (instregex "VPSLLDri")>;
				598	def: InstRW<[SKLWriteResGroup5], (instregex "VPSLLQYri")>;
				599	def: InstRW<[SKLWriteResGroup5], (instregex "VPSLLQri")>;
				600	def: InstRW<[SKLWriteResGroup5], (instregex "VPSLLVDYrr")>;
				601	def: InstRW<[SKLWriteResGroup5], (instregex "VPSLLVDrr")>;
				602	def: InstRW<[SKLWriteResGroup5], (instregex "VPSLLVQYrr")>;
				603	def: InstRW<[SKLWriteResGroup5], (instregex "VPSLLVQrr")>;
				604	def: InstRW<[SKLWriteResGroup5], (instregex "VPSLLWYri")>;
				605	def: InstRW<[SKLWriteResGroup5], (instregex "VPSLLWri")>;
				606	def: InstRW<[SKLWriteResGroup5], (instregex "VPSRADYri")>;
				607	def: InstRW<[SKLWriteResGroup5], (instregex "VPSRADri")>;
				608	def: InstRW<[SKLWriteResGroup5], (instregex "VPSRAVDYrr")>;
				609	def: InstRW<[SKLWriteResGroup5], (instregex "VPSRAVDrr")>;
				610	def: InstRW<[SKLWriteResGroup5], (instregex "VPSRAWYri")>;
				611	def: InstRW<[SKLWriteResGroup5], (instregex "VPSRAWri")>;
				612	def: InstRW<[SKLWriteResGroup5], (instregex "VPSRLDYri")>;
				613	def: InstRW<[SKLWriteResGroup5], (instregex "VPSRLDri")>;
				614	def: InstRW<[SKLWriteResGroup5], (instregex "VPSRLQYri")>;
				615	def: InstRW<[SKLWriteResGroup5], (instregex "VPSRLQri")>;
				616	def: InstRW<[SKLWriteResGroup5], (instregex "VPSRLVDYrr")>;
				617	def: InstRW<[SKLWriteResGroup5], (instregex "VPSRLVDrr")>;
				618	def: InstRW<[SKLWriteResGroup5], (instregex "VPSRLVQYrr")>;
				619	def: InstRW<[SKLWriteResGroup5], (instregex "VPSRLVQrr")>;
				620	def: InstRW<[SKLWriteResGroup5], (instregex "VPSRLWYri")>;
				621	def: InstRW<[SKLWriteResGroup5], (instregex "VPSRLWri")>;
				622	def: InstRW<[SKLWriteResGroup5], (instregex "VPSUBSBYrr")>;
				623	def: InstRW<[SKLWriteResGroup5], (instregex "VPSUBSBrr")>;
				624	def: InstRW<[SKLWriteResGroup5], (instregex "VPSUBSWYrr")>;
				625	def: InstRW<[SKLWriteResGroup5], (instregex "VPSUBSWrr")>;
				626	def: InstRW<[SKLWriteResGroup5], (instregex "VPSUBUSBYrr")>;
				627	def: InstRW<[SKLWriteResGroup5], (instregex "VPSUBUSBrr")>;
				628	def: InstRW<[SKLWriteResGroup5], (instregex "VPSUBUSWYrr")>;
				629	def: InstRW<[SKLWriteResGroup5], (instregex "VPSUBUSWrr")>;
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	630
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	631	def SKLWriteResGroup6 : SchedWriteRes<[SKLPort05]> {
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	632	let Latency = 1;
				633	let NumMicroOps = 1;
				634	let ResourceCycles = [1];
				635	}
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	636	def: InstRW<[SKLWriteResGroup6], (instregex "FINCSTP")>;
				637	def: InstRW<[SKLWriteResGroup6], (instregex "FNOP")>;
Craig Topper	23cc866	2018-01-24 17:58:42 +0000	[diff] [blame]	638	def: InstRW<[SKLWriteResGroup6], (instregex "MMX_MOVQ64rr")>;
Craig Topper	dbddac0	2018-01-25 04:45:30 +0000	[diff] [blame]	639	def: InstRW<[SKLWriteResGroup6], (instregex "MMX_PABSBrr")>;
				640	def: InstRW<[SKLWriteResGroup6], (instregex "MMX_PABSDrr")>;
				641	def: InstRW<[SKLWriteResGroup6], (instregex "MMX_PABSWrr")>;
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	642	def: InstRW<[SKLWriteResGroup6], (instregex "MMX_PADDBirr")>;
				643	def: InstRW<[SKLWriteResGroup6], (instregex "MMX_PADDDirr")>;
				644	def: InstRW<[SKLWriteResGroup6], (instregex "MMX_PADDQirr")>;
				645	def: InstRW<[SKLWriteResGroup6], (instregex "MMX_PADDWirr")>;
				646	def: InstRW<[SKLWriteResGroup6], (instregex "MMX_PANDNirr")>;
				647	def: InstRW<[SKLWriteResGroup6], (instregex "MMX_PANDirr")>;
				648	def: InstRW<[SKLWriteResGroup6], (instregex "MMX_PORirr")>;
Craig Topper	dbddac0	2018-01-25 04:45:30 +0000	[diff] [blame]	649	def: InstRW<[SKLWriteResGroup6], (instregex "MMX_PSIGNBrr")>;
				650	def: InstRW<[SKLWriteResGroup6], (instregex "MMX_PSIGNDrr")>;
				651	def: InstRW<[SKLWriteResGroup6], (instregex "MMX_PSIGNWrr")>;
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	652	def: InstRW<[SKLWriteResGroup6], (instregex "MMX_PSUBBirr")>;
				653	def: InstRW<[SKLWriteResGroup6], (instregex "MMX_PSUBDirr")>;
				654	def: InstRW<[SKLWriteResGroup6], (instregex "MMX_PSUBQirr")>;
				655	def: InstRW<[SKLWriteResGroup6], (instregex "MMX_PSUBWirr")>;
				656	def: InstRW<[SKLWriteResGroup6], (instregex "MMX_PXORirr")>;
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	657
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	658	def SKLWriteResGroup7 : SchedWriteRes<[SKLPort06]> {
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	659	let Latency = 1;
				660	let NumMicroOps = 1;
				661	let ResourceCycles = [1];
				662	}
Craig Topper	1a88c50	2017-12-10 09:14:39 +0000	[diff] [blame]	663	def: InstRW<[SKLWriteResGroup7], (instregex "ADC(16\|32\|64)ri")>;
Craig Topper	d10ceff	2018-03-19 04:21:40 +0000	[diff] [blame]	664	def: InstRW<[SKLWriteResGroup7], (instregex "ADC(16\|32\|64)i")>;
Craig Topper	13a1650	2018-03-19 00:56:09 +0000	[diff] [blame]	665	def: InstRW<[SKLWriteResGroup7], (instregex "ADC(8\|16\|32\|64)rr")>;
Craig Topper	a42a2ba	2017-12-16 18:35:31 +0000	[diff] [blame]	666	def: InstRW<[SKLWriteResGroup7], (instregex "ADCX(32\|64)rr")>;
				667	def: InstRW<[SKLWriteResGroup7], (instregex "ADOX(32\|64)rr")>;
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	668	def: InstRW<[SKLWriteResGroup7], (instregex "BT(16\|32\|64)ri8")>;
				669	def: InstRW<[SKLWriteResGroup7], (instregex "BT(16\|32\|64)rr")>;
				670	def: InstRW<[SKLWriteResGroup7], (instregex "BTC(16\|32\|64)ri8")>;
				671	def: InstRW<[SKLWriteResGroup7], (instregex "BTC(16\|32\|64)rr")>;
				672	def: InstRW<[SKLWriteResGroup7], (instregex "BTR(16\|32\|64)ri8")>;
				673	def: InstRW<[SKLWriteResGroup7], (instregex "BTR(16\|32\|64)rr")>;
				674	def: InstRW<[SKLWriteResGroup7], (instregex "BTS(16\|32\|64)ri8")>;
				675	def: InstRW<[SKLWriteResGroup7], (instregex "BTS(16\|32\|64)rr")>;
				676	def: InstRW<[SKLWriteResGroup7], (instregex "CDQ")>;
				677	def: InstRW<[SKLWriteResGroup7], (instregex "CLAC")>;
Craig Topper	f4cd908	2018-01-19 05:47:32 +0000	[diff] [blame]	678	def: InstRW<[SKLWriteResGroup7], (instregex "CMOV(AE\|B\|E\|G\|GE\|L\|LE\|NE\|NO\|NP\|NS\|O\|P\|S)(16\|32\|64)rr")>;
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	679	def: InstRW<[SKLWriteResGroup7], (instregex "CQO")>;
Craig Topper	f4cd908	2018-01-19 05:47:32 +0000	[diff] [blame]	680	def: InstRW<[SKLWriteResGroup7], (instregex "J(A\|AE\|B\|BE\|E\|G\|GE\|L\|LE\|NE\|NO\|NP\|NS\|O\|P\|S)_1")>;
				681	def: InstRW<[SKLWriteResGroup7], (instregex "J(A\|AE\|B\|BE\|E\|G\|GE\|L\|LE\|NE\|NO\|NP\|NS\|O\|P\|S)_4")>;
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	682	def: InstRW<[SKLWriteResGroup7], (instregex "JMP_1")>;
				683	def: InstRW<[SKLWriteResGroup7], (instregex "JMP_4")>;
Craig Topper	a42a2ba	2017-12-16 18:35:31 +0000	[diff] [blame]	684	def: InstRW<[SKLWriteResGroup7], (instregex "RORX(32\|64)ri")>;
Craig Topper	13a1650	2018-03-19 00:56:09 +0000	[diff] [blame]	685	def: InstRW<[SKLWriteResGroup7], (instregex "SAR(8\|16\|32\|64)r1")>;
				686	def: InstRW<[SKLWriteResGroup7], (instregex "SAR(8\|16\|32\|64)ri")>;
Craig Topper	a42a2ba	2017-12-16 18:35:31 +0000	[diff] [blame]	687	def: InstRW<[SKLWriteResGroup7], (instregex "SARX(32\|64)rr")>;
Craig Topper	1a88c50	2017-12-10 09:14:39 +0000	[diff] [blame]	688	def: InstRW<[SKLWriteResGroup7], (instregex "SBB(16\|32\|64)ri")>;
Craig Topper	d10ceff	2018-03-19 04:21:40 +0000	[diff] [blame]	689	def: InstRW<[SKLWriteResGroup7], (instregex "SBB(16\|32\|64)i")>;
Craig Topper	13a1650	2018-03-19 00:56:09 +0000	[diff] [blame]	690	def: InstRW<[SKLWriteResGroup7], (instregex "SBB(8\|16\|32\|64)rr")>;
Craig Topper	f4cd908	2018-01-19 05:47:32 +0000	[diff] [blame]	691	def: InstRW<[SKLWriteResGroup7], (instregex "SET(AE\|B\|E\|G\|GE\|L\|LE\|NE\|NO\|NP\|NS\|O\|P\|S)r")>;
Craig Topper	13a1650	2018-03-19 00:56:09 +0000	[diff] [blame]	692	def: InstRW<[SKLWriteResGroup7], (instregex "SHL(8\|16\|32\|64)r1")>;
				693	def: InstRW<[SKLWriteResGroup7], (instregex "SHL(8\|16\|32\|64)ri")>;
Craig Topper	a42a2ba	2017-12-16 18:35:31 +0000	[diff] [blame]	694	def: InstRW<[SKLWriteResGroup7], (instregex "SHLX(32\|64)rr")>;
Craig Topper	13a1650	2018-03-19 00:56:09 +0000	[diff] [blame]	695	def: InstRW<[SKLWriteResGroup7], (instregex "SHR(8\|16\|32\|64)r1")>;
				696	def: InstRW<[SKLWriteResGroup7], (instregex "SHR(8\|16\|32\|64)ri")>;
Craig Topper	a42a2ba	2017-12-16 18:35:31 +0000	[diff] [blame]	697	def: InstRW<[SKLWriteResGroup7], (instregex "SHRX(32\|64)rr")>;
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	698	def: InstRW<[SKLWriteResGroup7], (instregex "STAC")>;
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	699
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	700	def SKLWriteResGroup8 : SchedWriteRes<[SKLPort15]> {
				701	let Latency = 1;
				702	let NumMicroOps = 1;
				703	let ResourceCycles = [1];
				704	}
Craig Topper	a42a2ba	2017-12-16 18:35:31 +0000	[diff] [blame]	705	def: InstRW<[SKLWriteResGroup8], (instregex "ANDN(32\|64)rr")>;
				706	def: InstRW<[SKLWriteResGroup8], (instregex "BLSI(32\|64)rr")>;
				707	def: InstRW<[SKLWriteResGroup8], (instregex "BLSMSK(32\|64)rr")>;
				708	def: InstRW<[SKLWriteResGroup8], (instregex "BLSR(32\|64)rr")>;
				709	def: InstRW<[SKLWriteResGroup8], (instregex "BZHI(32\|64)rr")>;
Craig Topper	28e5538	2017-12-10 09:14:42 +0000	[diff] [blame]	710	def: InstRW<[SKLWriteResGroup8], (instregex "LEA(16\|32\|64)(_32)?r")>;
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	711
				712	def SKLWriteResGroup9 : SchedWriteRes<[SKLPort015]> {
				713	let Latency = 1;
				714	let NumMicroOps = 1;
				715	let ResourceCycles = [1];
				716	}
				717	def: InstRW<[SKLWriteResGroup9], (instregex "ANDNPDrr")>;
				718	def: InstRW<[SKLWriteResGroup9], (instregex "ANDNPSrr")>;
				719	def: InstRW<[SKLWriteResGroup9], (instregex "ANDPDrr")>;
				720	def: InstRW<[SKLWriteResGroup9], (instregex "ANDPSrr")>;
				721	def: InstRW<[SKLWriteResGroup9], (instregex "BLENDPDrri")>;
				722	def: InstRW<[SKLWriteResGroup9], (instregex "BLENDPSrri")>;
Craig Topper	23cc866	2018-01-24 17:58:42 +0000	[diff] [blame]	723	def: InstRW<[SKLWriteResGroup9], (instregex "MOVAPDrr")>;
				724	def: InstRW<[SKLWriteResGroup9], (instregex "MOVAPSrr")>;
				725	def: InstRW<[SKLWriteResGroup9], (instregex "MOVDQArr")>;
				726	def: InstRW<[SKLWriteResGroup9], (instregex "MOVDQUrr")>;
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	727	def: InstRW<[SKLWriteResGroup9], (instregex "MOVPQI2QIrr")>;
Craig Topper	23cc866	2018-01-24 17:58:42 +0000	[diff] [blame]	728	def: InstRW<[SKLWriteResGroup9], (instregex "MOVSSrr")>;
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	729	def: InstRW<[SKLWriteResGroup9], (instregex "ORPDrr")>;
				730	def: InstRW<[SKLWriteResGroup9], (instregex "ORPSrr")>;
				731	def: InstRW<[SKLWriteResGroup9], (instregex "PADDBrr")>;
				732	def: InstRW<[SKLWriteResGroup9], (instregex "PADDDrr")>;
				733	def: InstRW<[SKLWriteResGroup9], (instregex "PADDQrr")>;
				734	def: InstRW<[SKLWriteResGroup9], (instregex "PADDWrr")>;
				735	def: InstRW<[SKLWriteResGroup9], (instregex "PANDNrr")>;
				736	def: InstRW<[SKLWriteResGroup9], (instregex "PANDrr")>;
				737	def: InstRW<[SKLWriteResGroup9], (instregex "PORrr")>;
				738	def: InstRW<[SKLWriteResGroup9], (instregex "PSUBBrr")>;
				739	def: InstRW<[SKLWriteResGroup9], (instregex "PSUBDrr")>;
				740	def: InstRW<[SKLWriteResGroup9], (instregex "PSUBQrr")>;
				741	def: InstRW<[SKLWriteResGroup9], (instregex "PSUBWrr")>;
				742	def: InstRW<[SKLWriteResGroup9], (instregex "PXORrr")>;
				743	def: InstRW<[SKLWriteResGroup9], (instregex "VANDNPDYrr")>;
				744	def: InstRW<[SKLWriteResGroup9], (instregex "VANDNPDrr")>;
				745	def: InstRW<[SKLWriteResGroup9], (instregex "VANDNPSYrr")>;
				746	def: InstRW<[SKLWriteResGroup9], (instregex "VANDNPSrr")>;
				747	def: InstRW<[SKLWriteResGroup9], (instregex "VANDPDYrr")>;
				748	def: InstRW<[SKLWriteResGroup9], (instregex "VANDPDrr")>;
				749	def: InstRW<[SKLWriteResGroup9], (instregex "VANDPSYrr")>;
				750	def: InstRW<[SKLWriteResGroup9], (instregex "VANDPSrr")>;
				751	def: InstRW<[SKLWriteResGroup9], (instregex "VBLENDPDYrri")>;
				752	def: InstRW<[SKLWriteResGroup9], (instregex "VBLENDPDrri")>;
				753	def: InstRW<[SKLWriteResGroup9], (instregex "VBLENDPSYrri")>;
				754	def: InstRW<[SKLWriteResGroup9], (instregex "VBLENDPSrri")>;
Craig Topper	23cc866	2018-01-24 17:58:42 +0000	[diff] [blame]	755	def: InstRW<[SKLWriteResGroup9], (instregex "VMOVAPDYrr")>;
				756	def: InstRW<[SKLWriteResGroup9], (instregex "VMOVAPDrr")>;
				757	def: InstRW<[SKLWriteResGroup9], (instregex "VMOVAPSYrr")>;
				758	def: InstRW<[SKLWriteResGroup9], (instregex "VMOVAPSrr")>;
				759	def: InstRW<[SKLWriteResGroup9], (instregex "VMOVDQAYrr")>;
				760	def: InstRW<[SKLWriteResGroup9], (instregex "VMOVDQArr")>;
				761	def: InstRW<[SKLWriteResGroup9], (instregex "VMOVDQUYrr")>;
				762	def: InstRW<[SKLWriteResGroup9], (instregex "VMOVDQUrr")>;
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	763	def: InstRW<[SKLWriteResGroup9], (instregex "VMOVPQI2QIrr")>;
Craig Topper	23cc866	2018-01-24 17:58:42 +0000	[diff] [blame]	764	def: InstRW<[SKLWriteResGroup9], (instregex "VMOVSSrr")>;
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	765	def: InstRW<[SKLWriteResGroup9], (instregex "VMOVZPQILo2PQIrr")>;
				766	def: InstRW<[SKLWriteResGroup9], (instregex "VORPDYrr")>;
				767	def: InstRW<[SKLWriteResGroup9], (instregex "VORPDrr")>;
				768	def: InstRW<[SKLWriteResGroup9], (instregex "VORPSYrr")>;
				769	def: InstRW<[SKLWriteResGroup9], (instregex "VORPSrr")>;
				770	def: InstRW<[SKLWriteResGroup9], (instregex "VPADDBYrr")>;
				771	def: InstRW<[SKLWriteResGroup9], (instregex "VPADDBrr")>;
				772	def: InstRW<[SKLWriteResGroup9], (instregex "VPADDDYrr")>;
				773	def: InstRW<[SKLWriteResGroup9], (instregex "VPADDDrr")>;
				774	def: InstRW<[SKLWriteResGroup9], (instregex "VPADDQYrr")>;
				775	def: InstRW<[SKLWriteResGroup9], (instregex "VPADDQrr")>;
				776	def: InstRW<[SKLWriteResGroup9], (instregex "VPADDWYrr")>;
				777	def: InstRW<[SKLWriteResGroup9], (instregex "VPADDWrr")>;
				778	def: InstRW<[SKLWriteResGroup9], (instregex "VPANDNYrr")>;
				779	def: InstRW<[SKLWriteResGroup9], (instregex "VPANDNrr")>;
				780	def: InstRW<[SKLWriteResGroup9], (instregex "VPANDYrr")>;
				781	def: InstRW<[SKLWriteResGroup9], (instregex "VPANDrr")>;
				782	def: InstRW<[SKLWriteResGroup9], (instregex "VPBLENDDYrri")>;
				783	def: InstRW<[SKLWriteResGroup9], (instregex "VPBLENDDrri")>;
				784	def: InstRW<[SKLWriteResGroup9], (instregex "VPORYrr")>;
				785	def: InstRW<[SKLWriteResGroup9], (instregex "VPORrr")>;
				786	def: InstRW<[SKLWriteResGroup9], (instregex "VPSUBBYrr")>;
				787	def: InstRW<[SKLWriteResGroup9], (instregex "VPSUBBrr")>;
				788	def: InstRW<[SKLWriteResGroup9], (instregex "VPSUBDYrr")>;
				789	def: InstRW<[SKLWriteResGroup9], (instregex "VPSUBDrr")>;
				790	def: InstRW<[SKLWriteResGroup9], (instregex "VPSUBQYrr")>;
				791	def: InstRW<[SKLWriteResGroup9], (instregex "VPSUBQrr")>;
				792	def: InstRW<[SKLWriteResGroup9], (instregex "VPSUBWYrr")>;
				793	def: InstRW<[SKLWriteResGroup9], (instregex "VPSUBWrr")>;
				794	def: InstRW<[SKLWriteResGroup9], (instregex "VPXORYrr")>;
				795	def: InstRW<[SKLWriteResGroup9], (instregex "VPXORrr")>;
				796	def: InstRW<[SKLWriteResGroup9], (instregex "VXORPDYrr")>;
				797	def: InstRW<[SKLWriteResGroup9], (instregex "VXORPDrr")>;
				798	def: InstRW<[SKLWriteResGroup9], (instregex "VXORPSYrr")>;
				799	def: InstRW<[SKLWriteResGroup9], (instregex "VXORPSrr")>;
				800	def: InstRW<[SKLWriteResGroup9], (instregex "XORPDrr")>;
				801	def: InstRW<[SKLWriteResGroup9], (instregex "XORPSrr")>;
				802
				803	def SKLWriteResGroup10 : SchedWriteRes<[SKLPort0156]> {
				804	let Latency = 1;
				805	let NumMicroOps = 1;
				806	let ResourceCycles = [1];
				807	}
Craig Topper	13a1650	2018-03-19 00:56:09 +0000	[diff] [blame]	808	def: InstRW<[SKLWriteResGroup10], (instregex "ADD(8\|16\|32\|64)ri")>;
				809	def: InstRW<[SKLWriteResGroup10], (instregex "ADD(8\|16\|32\|64)rr")>;
Craig Topper	d10ceff	2018-03-19 04:21:40 +0000	[diff] [blame]	810	def: InstRW<[SKLWriteResGroup10], (instregex "ADD(8\|16\|32\|64)i")>;
Craig Topper	13a1650	2018-03-19 00:56:09 +0000	[diff] [blame]	811	def: InstRW<[SKLWriteResGroup10], (instregex "AND(8\|16\|32\|64)ri")>;
				812	def: InstRW<[SKLWriteResGroup10], (instregex "AND(8\|16\|32\|64)rr")>;
Craig Topper	d10ceff	2018-03-19 04:21:40 +0000	[diff] [blame]	813	def: InstRW<[SKLWriteResGroup10], (instregex "AND(8\|16\|32\|64)i")>;
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	814	def: InstRW<[SKLWriteResGroup10], (instregex "CBW")>;
				815	def: InstRW<[SKLWriteResGroup10], (instregex "CLC")>;
				816	def: InstRW<[SKLWriteResGroup10], (instregex "CMC")>;
Craig Topper	13a1650	2018-03-19 00:56:09 +0000	[diff] [blame]	817	def: InstRW<[SKLWriteResGroup10], (instregex "CMP(8\|16\|32\|64)ri")>;
				818	def: InstRW<[SKLWriteResGroup10], (instregex "CMP(8\|16\|32\|64)rr")>;
Craig Topper	d10ceff	2018-03-19 04:21:40 +0000	[diff] [blame]	819	def: InstRW<[SKLWriteResGroup10], (instregex "CMP(8\|16\|32\|64)i")>;
Craig Topper	2d451e7	2018-03-18 08:38:06 +0000	[diff] [blame]	820	def: InstRW<[SKLWriteResGroup10], (instrs CWDE)>;
Craig Topper	13a1650	2018-03-19 00:56:09 +0000	[diff] [blame]	821	def: InstRW<[SKLWriteResGroup10], (instregex "DEC(8\|16\|32\|64)r")>;
				822	def: InstRW<[SKLWriteResGroup10], (instregex "INC(8\|16\|32\|64)r")>;
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	823	def: InstRW<[SKLWriteResGroup10], (instregex "LAHF")>;
Craig Topper	13a1650	2018-03-19 00:56:09 +0000	[diff] [blame]	824	def: InstRW<[SKLWriteResGroup10], (instregex "MOV(8\|16\|32\|64)rr")>;
Craig Topper	645e531	2018-03-19 17:46:59 +0000	[diff] [blame]	825	def: InstRW<[SKLWriteResGroup10], (instregex "MOV(8\|16\|32\|64)ri")>;
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	826	def: InstRW<[SKLWriteResGroup10], (instregex "MOVSX(16\|32\|64)rr16")>;
				827	def: InstRW<[SKLWriteResGroup10], (instregex "MOVSX(16\|32\|64)rr32")>;
				828	def: InstRW<[SKLWriteResGroup10], (instregex "MOVSX(16\|32\|64)rr8")>;
				829	def: InstRW<[SKLWriteResGroup10], (instregex "MOVZX(16\|32\|64)rr16")>;
				830	def: InstRW<[SKLWriteResGroup10], (instregex "MOVZX(16\|32\|64)rr8")>;
Craig Topper	13a1650	2018-03-19 00:56:09 +0000	[diff] [blame]	831	def: InstRW<[SKLWriteResGroup10], (instregex "NEG(8\|16\|32\|64)r")>;
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	832	def: InstRW<[SKLWriteResGroup10], (instregex "NOOP")>;
Craig Topper	13a1650	2018-03-19 00:56:09 +0000	[diff] [blame]	833	def: InstRW<[SKLWriteResGroup10], (instregex "NOT(8\|16\|32\|64)r")>;
				834	def: InstRW<[SKLWriteResGroup10], (instregex "OR(8\|16\|32\|64)ri")>;
				835	def: InstRW<[SKLWriteResGroup10], (instregex "OR(8\|16\|32\|64)rr")>;
Craig Topper	d10ceff	2018-03-19 04:21:40 +0000	[diff] [blame]	836	def: InstRW<[SKLWriteResGroup10], (instregex "OR(8\|16\|32\|64)i")>;
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	837	def: InstRW<[SKLWriteResGroup10], (instregex "SAHF")>;
				838	def: InstRW<[SKLWriteResGroup10], (instregex "SGDT64m")>;
				839	def: InstRW<[SKLWriteResGroup10], (instregex "SIDT64m")>;
				840	def: InstRW<[SKLWriteResGroup10], (instregex "SLDT64m")>;
				841	def: InstRW<[SKLWriteResGroup10], (instregex "SMSW16m")>;
				842	def: InstRW<[SKLWriteResGroup10], (instregex "STC")>;
				843	def: InstRW<[SKLWriteResGroup10], (instregex "STRm")>;
Craig Topper	13a1650	2018-03-19 00:56:09 +0000	[diff] [blame]	844	def: InstRW<[SKLWriteResGroup10], (instregex "SUB(8\|16\|32\|64)ri")>;
				845	def: InstRW<[SKLWriteResGroup10], (instregex "SUB(8\|16\|32\|64)rr")>;
Craig Topper	d10ceff	2018-03-19 04:21:40 +0000	[diff] [blame]	846	def: InstRW<[SKLWriteResGroup10], (instregex "SUB(8\|16\|32\|64)i")>;
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	847	def: InstRW<[SKLWriteResGroup10], (instregex "SYSCALL")>;
Craig Topper	13a1650	2018-03-19 00:56:09 +0000	[diff] [blame]	848	def: InstRW<[SKLWriteResGroup10], (instregex "TEST(8\|16\|32\|64)rr")>;
Craig Topper	836cfb3	2018-03-19 17:58:41 +0000	[diff] [blame]	849	def: InstRW<[SKLWriteResGroup10], (instregex "TEST(8\|16\|32\|64)i")>;
				850	def: InstRW<[SKLWriteResGroup10], (instregex "TEST(8\|16\|32\|64)ri")>;
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	851	def: InstRW<[SKLWriteResGroup10], (instregex "XCHG(16\|32\|64)rr")>;
Craig Topper	13a1650	2018-03-19 00:56:09 +0000	[diff] [blame]	852	def: InstRW<[SKLWriteResGroup10], (instregex "XOR(8\|16\|32\|64)ri")>;
				853	def: InstRW<[SKLWriteResGroup10], (instregex "XOR(8\|16\|32\|64)rr")>;
Craig Topper	d10ceff	2018-03-19 04:21:40 +0000	[diff] [blame]	854	def: InstRW<[SKLWriteResGroup10], (instregex "XOR(8\|16\|32\|64)i")>;
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	855
				856	def SKLWriteResGroup11 : SchedWriteRes<[SKLPort4,SKLPort237]> {
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	857	let Latency = 1;
				858	let NumMicroOps = 2;
				859	let ResourceCycles = [1,1];
				860	}
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	861	def: InstRW<[SKLWriteResGroup11], (instregex "FBSTPm")>;
				862	def: InstRW<[SKLWriteResGroup11], (instregex "MMX_MOVD64from64rm")>;
				863	def: InstRW<[SKLWriteResGroup11], (instregex "MMX_MOVD64mr")>;
				864	def: InstRW<[SKLWriteResGroup11], (instregex "MMX_MOVNTQmr")>;
				865	def: InstRW<[SKLWriteResGroup11], (instregex "MMX_MOVQ64mr")>;
Craig Topper	13a1650	2018-03-19 00:56:09 +0000	[diff] [blame]	866	def: InstRW<[SKLWriteResGroup11], (instregex "MOV(8\|16\|32\|64)mr")>;
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	867	def: InstRW<[SKLWriteResGroup11], (instregex "MOV8mi")>;
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	868	def: InstRW<[SKLWriteResGroup11], (instregex "MOVAPDmr")>;
				869	def: InstRW<[SKLWriteResGroup11], (instregex "MOVAPSmr")>;
				870	def: InstRW<[SKLWriteResGroup11], (instregex "MOVDQAmr")>;
				871	def: InstRW<[SKLWriteResGroup11], (instregex "MOVDQUmr")>;
				872	def: InstRW<[SKLWriteResGroup11], (instregex "MOVHPDmr")>;
				873	def: InstRW<[SKLWriteResGroup11], (instregex "MOVHPSmr")>;
				874	def: InstRW<[SKLWriteResGroup11], (instregex "MOVLPDmr")>;
				875	def: InstRW<[SKLWriteResGroup11], (instregex "MOVLPSmr")>;
				876	def: InstRW<[SKLWriteResGroup11], (instregex "MOVNTDQmr")>;
				877	def: InstRW<[SKLWriteResGroup11], (instregex "MOVNTI_64mr")>;
				878	def: InstRW<[SKLWriteResGroup11], (instregex "MOVNTImr")>;
				879	def: InstRW<[SKLWriteResGroup11], (instregex "MOVNTPDmr")>;
				880	def: InstRW<[SKLWriteResGroup11], (instregex "MOVNTPSmr")>;
				881	def: InstRW<[SKLWriteResGroup11], (instregex "MOVPDI2DImr")>;
				882	def: InstRW<[SKLWriteResGroup11], (instregex "MOVPQI2QImr")>;
				883	def: InstRW<[SKLWriteResGroup11], (instregex "MOVPQIto64mr")>;
Craig Topper	90c9c15	2017-12-10 09:14:44 +0000	[diff] [blame]	884	def: InstRW<[SKLWriteResGroup11], (instregex "MOVSDmr")>;
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	885	def: InstRW<[SKLWriteResGroup11], (instregex "MOVSSmr")>;
				886	def: InstRW<[SKLWriteResGroup11], (instregex "MOVUPDmr")>;
				887	def: InstRW<[SKLWriteResGroup11], (instregex "MOVUPSmr")>;
				888	def: InstRW<[SKLWriteResGroup11], (instregex "ST_FP32m")>;
				889	def: InstRW<[SKLWriteResGroup11], (instregex "ST_FP64m")>;
				890	def: InstRW<[SKLWriteResGroup11], (instregex "ST_FP80m")>;
				891	def: InstRW<[SKLWriteResGroup11], (instregex "VEXTRACTF128mr")>;
				892	def: InstRW<[SKLWriteResGroup11], (instregex "VEXTRACTI128mr")>;
				893	def: InstRW<[SKLWriteResGroup11], (instregex "VMOVAPDYmr")>;
				894	def: InstRW<[SKLWriteResGroup11], (instregex "VMOVAPDmr")>;
				895	def: InstRW<[SKLWriteResGroup11], (instregex "VMOVAPSYmr")>;
				896	def: InstRW<[SKLWriteResGroup11], (instregex "VMOVAPSmr")>;
				897	def: InstRW<[SKLWriteResGroup11], (instregex "VMOVDQAYmr")>;
				898	def: InstRW<[SKLWriteResGroup11], (instregex "VMOVDQAmr")>;
				899	def: InstRW<[SKLWriteResGroup11], (instregex "VMOVDQUYmr")>;
				900	def: InstRW<[SKLWriteResGroup11], (instregex "VMOVDQUmr")>;
				901	def: InstRW<[SKLWriteResGroup11], (instregex "VMOVHPDmr")>;
				902	def: InstRW<[SKLWriteResGroup11], (instregex "VMOVHPSmr")>;
				903	def: InstRW<[SKLWriteResGroup11], (instregex "VMOVLPDmr")>;
				904	def: InstRW<[SKLWriteResGroup11], (instregex "VMOVLPSmr")>;
				905	def: InstRW<[SKLWriteResGroup11], (instregex "VMOVNTDQYmr")>;
				906	def: InstRW<[SKLWriteResGroup11], (instregex "VMOVNTDQmr")>;
				907	def: InstRW<[SKLWriteResGroup11], (instregex "VMOVNTPDYmr")>;
				908	def: InstRW<[SKLWriteResGroup11], (instregex "VMOVNTPDmr")>;
				909	def: InstRW<[SKLWriteResGroup11], (instregex "VMOVNTPSYmr")>;
				910	def: InstRW<[SKLWriteResGroup11], (instregex "VMOVNTPSmr")>;
				911	def: InstRW<[SKLWriteResGroup11], (instregex "VMOVPDI2DImr")>;
				912	def: InstRW<[SKLWriteResGroup11], (instregex "VMOVPQI2QImr")>;
				913	def: InstRW<[SKLWriteResGroup11], (instregex "VMOVPQIto64mr")>;
				914	def: InstRW<[SKLWriteResGroup11], (instregex "VMOVSDmr")>;
				915	def: InstRW<[SKLWriteResGroup11], (instregex "VMOVSSmr")>;
				916	def: InstRW<[SKLWriteResGroup11], (instregex "VMOVUPDYmr")>;
				917	def: InstRW<[SKLWriteResGroup11], (instregex "VMOVUPDmr")>;
				918	def: InstRW<[SKLWriteResGroup11], (instregex "VMOVUPSYmr")>;
				919	def: InstRW<[SKLWriteResGroup11], (instregex "VMOVUPSmr")>;
				920	def: InstRW<[SKLWriteResGroup11], (instregex "VMPTRSTm")>;
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	921
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	922	def SKLWriteResGroup12 : SchedWriteRes<[SKLPort0]> {
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	923	let Latency = 2;
				924	let NumMicroOps = 1;
				925	let ResourceCycles = [1];
				926	}
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	927	def: InstRW<[SKLWriteResGroup12], (instregex "COMISDrr")>;
				928	def: InstRW<[SKLWriteResGroup12], (instregex "COMISSrr")>;
				929	def: InstRW<[SKLWriteResGroup12], (instregex "MMX_MOVD64from64rr")>;
				930	def: InstRW<[SKLWriteResGroup12], (instregex "MMX_MOVD64grr")>;
				931	def: InstRW<[SKLWriteResGroup12], (instregex "MMX_PMOVMSKBrr")>;
				932	def: InstRW<[SKLWriteResGroup12], (instregex "MOVMSKPDrr")>;
				933	def: InstRW<[SKLWriteResGroup12], (instregex "MOVMSKPSrr")>;
				934	def: InstRW<[SKLWriteResGroup12], (instregex "MOVPDI2DIrr")>;
				935	def: InstRW<[SKLWriteResGroup12], (instregex "MOVPQIto64rr")>;
				936	def: InstRW<[SKLWriteResGroup12], (instregex "PMOVMSKBrr")>;
				937	def: InstRW<[SKLWriteResGroup12], (instregex "UCOMISDrr")>;
				938	def: InstRW<[SKLWriteResGroup12], (instregex "UCOMISSrr")>;
				939	def: InstRW<[SKLWriteResGroup12], (instregex "VCOMISDrr")>;
				940	def: InstRW<[SKLWriteResGroup12], (instregex "VCOMISSrr")>;
				941	def: InstRW<[SKLWriteResGroup12], (instregex "VMOVMSKPDYrr")>;
				942	def: InstRW<[SKLWriteResGroup12], (instregex "VMOVMSKPDrr")>;
				943	def: InstRW<[SKLWriteResGroup12], (instregex "VMOVMSKPSYrr")>;
				944	def: InstRW<[SKLWriteResGroup12], (instregex "VMOVMSKPSrr")>;
				945	def: InstRW<[SKLWriteResGroup12], (instregex "VMOVPDI2DIrr")>;
				946	def: InstRW<[SKLWriteResGroup12], (instregex "VMOVPQIto64rr")>;
				947	def: InstRW<[SKLWriteResGroup12], (instregex "VPMOVMSKBYrr")>;
				948	def: InstRW<[SKLWriteResGroup12], (instregex "VPMOVMSKBrr")>;
				949	def: InstRW<[SKLWriteResGroup12], (instregex "VTESTPDYrr")>;
				950	def: InstRW<[SKLWriteResGroup12], (instregex "VTESTPDrr")>;
				951	def: InstRW<[SKLWriteResGroup12], (instregex "VTESTPSYrr")>;
				952	def: InstRW<[SKLWriteResGroup12], (instregex "VTESTPSrr")>;
				953	def: InstRW<[SKLWriteResGroup12], (instregex "VUCOMISDrr")>;
				954	def: InstRW<[SKLWriteResGroup12], (instregex "VUCOMISSrr")>;
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	955
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	956	def SKLWriteResGroup13 : SchedWriteRes<[SKLPort5]> {
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	957	let Latency = 2;
				958	let NumMicroOps = 2;
				959	let ResourceCycles = [2];
				960	}
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	961	def: InstRW<[SKLWriteResGroup13], (instregex "MMX_MOVQ2DQrr")>;
Craig Topper	b85b484	2018-01-24 17:58:51 +0000	[diff] [blame]	962	def: InstRW<[SKLWriteResGroup13], (instregex "MMX_PINSRWrr")>;
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	963	def: InstRW<[SKLWriteResGroup13], (instregex "PINSRBrr")>;
				964	def: InstRW<[SKLWriteResGroup13], (instregex "PINSRDrr")>;
				965	def: InstRW<[SKLWriteResGroup13], (instregex "PINSRQrr")>;
Craig Topper	b85b484	2018-01-24 17:58:51 +0000	[diff] [blame]	966	def: InstRW<[SKLWriteResGroup13], (instregex "PINSRWrr")>;
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	967	def: InstRW<[SKLWriteResGroup13], (instregex "VPINSRBrr")>;
				968	def: InstRW<[SKLWriteResGroup13], (instregex "VPINSRDrr")>;
				969	def: InstRW<[SKLWriteResGroup13], (instregex "VPINSRQrr")>;
Craig Topper	b85b484	2018-01-24 17:58:51 +0000	[diff] [blame]	970	def: InstRW<[SKLWriteResGroup13], (instregex "VPINSRWrr")>;
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	971
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	972	def SKLWriteResGroup14 : SchedWriteRes<[SKLPort05]> {
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	973	let Latency = 2;
				974	let NumMicroOps = 2;
				975	let ResourceCycles = [2];
				976	}
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	977	def: InstRW<[SKLWriteResGroup14], (instregex "FDECSTP")>;
				978	def: InstRW<[SKLWriteResGroup14], (instregex "MMX_MOVDQ2Qrr")>;
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	979
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	980	def SKLWriteResGroup15 : SchedWriteRes<[SKLPort06]> {
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	981	let Latency = 2;
				982	let NumMicroOps = 2;
				983	let ResourceCycles = [2];
				984	}
Craig Topper	f4cd908	2018-01-19 05:47:32 +0000	[diff] [blame]	985	def: InstRW<[SKLWriteResGroup15], (instregex "CMOV(A\|BE)(16\|32\|64)rr")>;
Craig Topper	13a1650	2018-03-19 00:56:09 +0000	[diff] [blame]	986	def: InstRW<[SKLWriteResGroup15], (instregex "ROL(8\|16\|32\|64)r1")>;
				987	def: InstRW<[SKLWriteResGroup15], (instregex "ROL(8\|16\|32\|64)ri")>;
				988	def: InstRW<[SKLWriteResGroup15], (instregex "ROR(8\|16\|32\|64)r1")>;
				989	def: InstRW<[SKLWriteResGroup15], (instregex "ROR(8\|16\|32\|64)ri")>;
Craig Topper	f4cd908	2018-01-19 05:47:32 +0000	[diff] [blame]	990	def: InstRW<[SKLWriteResGroup15], (instregex "SET(A\|BE)r")>;
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	991
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	992	def SKLWriteResGroup16 : SchedWriteRes<[SKLPort015]> {
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	993	let Latency = 2;
				994	let NumMicroOps = 2;
				995	let ResourceCycles = [2];
				996	}
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	997	def: InstRW<[SKLWriteResGroup16], (instregex "BLENDVPDrr0")>;
				998	def: InstRW<[SKLWriteResGroup16], (instregex "BLENDVPSrr0")>;
				999	def: InstRW<[SKLWriteResGroup16], (instregex "PBLENDVBrr0")>;
				1000	def: InstRW<[SKLWriteResGroup16], (instregex "VBLENDVPDYrr")>;
				1001	def: InstRW<[SKLWriteResGroup16], (instregex "VBLENDVPDrr")>;
				1002	def: InstRW<[SKLWriteResGroup16], (instregex "VBLENDVPSYrr")>;
				1003	def: InstRW<[SKLWriteResGroup16], (instregex "VBLENDVPSrr")>;
				1004	def: InstRW<[SKLWriteResGroup16], (instregex "VPBLENDVBYrr")>;
				1005	def: InstRW<[SKLWriteResGroup16], (instregex "VPBLENDVBrr")>;
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	1006
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	1007	def SKLWriteResGroup17 : SchedWriteRes<[SKLPort0156]> {
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	1008	let Latency = 2;
				1009	let NumMicroOps = 2;
				1010	let ResourceCycles = [2];
				1011	}
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	1012	def: InstRW<[SKLWriteResGroup17], (instregex "LFENCE")>;
				1013	def: InstRW<[SKLWriteResGroup17], (instregex "WAIT")>;
				1014	def: InstRW<[SKLWriteResGroup17], (instregex "XGETBV")>;
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	1015
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	1016	def SKLWriteResGroup18 : SchedWriteRes<[SKLPort0,SKLPort237]> {
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	1017	let Latency = 2;
				1018	let NumMicroOps = 2;
				1019	let ResourceCycles = [1,1];
				1020	}
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	1021	def: InstRW<[SKLWriteResGroup18], (instregex "VMASKMOVPDYmr")>;
				1022	def: InstRW<[SKLWriteResGroup18], (instregex "VMASKMOVPDmr")>;
				1023	def: InstRW<[SKLWriteResGroup18], (instregex "VMASKMOVPSYmr")>;
				1024	def: InstRW<[SKLWriteResGroup18], (instregex "VMASKMOVPSmr")>;
				1025	def: InstRW<[SKLWriteResGroup18], (instregex "VPMASKMOVDYmr")>;
				1026	def: InstRW<[SKLWriteResGroup18], (instregex "VPMASKMOVDmr")>;
				1027	def: InstRW<[SKLWriteResGroup18], (instregex "VPMASKMOVQYmr")>;
				1028	def: InstRW<[SKLWriteResGroup18], (instregex "VPMASKMOVQmr")>;
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	1029
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	1030	def SKLWriteResGroup19 : SchedWriteRes<[SKLPort5,SKLPort01]> {
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	1031	let Latency = 2;
				1032	let NumMicroOps = 2;
				1033	let ResourceCycles = [1,1];
				1034	}
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	1035	def: InstRW<[SKLWriteResGroup19], (instregex "PSLLDrr")>;
				1036	def: InstRW<[SKLWriteResGroup19], (instregex "PSLLQrr")>;
				1037	def: InstRW<[SKLWriteResGroup19], (instregex "PSLLWrr")>;
				1038	def: InstRW<[SKLWriteResGroup19], (instregex "PSRADrr")>;
				1039	def: InstRW<[SKLWriteResGroup19], (instregex "PSRAWrr")>;
				1040	def: InstRW<[SKLWriteResGroup19], (instregex "PSRLDrr")>;
				1041	def: InstRW<[SKLWriteResGroup19], (instregex "PSRLQrr")>;
				1042	def: InstRW<[SKLWriteResGroup19], (instregex "PSRLWrr")>;
				1043	def: InstRW<[SKLWriteResGroup19], (instregex "VPSLLDrr")>;
				1044	def: InstRW<[SKLWriteResGroup19], (instregex "VPSLLQrr")>;
				1045	def: InstRW<[SKLWriteResGroup19], (instregex "VPSLLWrr")>;
				1046	def: InstRW<[SKLWriteResGroup19], (instregex "VPSRADrr")>;
				1047	def: InstRW<[SKLWriteResGroup19], (instregex "VPSRAWrr")>;
				1048	def: InstRW<[SKLWriteResGroup19], (instregex "VPSRLDrr")>;
				1049	def: InstRW<[SKLWriteResGroup19], (instregex "VPSRLQrr")>;
				1050	def: InstRW<[SKLWriteResGroup19], (instregex "VPSRLWrr")>;
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	1051
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	1052	def SKLWriteResGroup20 : SchedWriteRes<[SKLPort6,SKLPort0156]> {
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	1053	let Latency = 2;
				1054	let NumMicroOps = 2;
				1055	let ResourceCycles = [1,1];
				1056	}
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	1057	def: InstRW<[SKLWriteResGroup20], (instregex "CLFLUSH")>;
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	1058
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	1059	def SKLWriteResGroup21 : SchedWriteRes<[SKLPort237,SKLPort0156]> {
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	1060	let Latency = 2;
				1061	let NumMicroOps = 2;
				1062	let ResourceCycles = [1,1];
				1063	}
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	1064	def: InstRW<[SKLWriteResGroup21], (instregex "SFENCE")>;
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	1065
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	1066	def SKLWriteResGroup22 : SchedWriteRes<[SKLPort06,SKLPort15]> {
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	1067	let Latency = 2;
				1068	let NumMicroOps = 2;
				1069	let ResourceCycles = [1,1];
				1070	}
Craig Topper	a42a2ba	2017-12-16 18:35:31 +0000	[diff] [blame]	1071	def: InstRW<[SKLWriteResGroup22], (instregex "BEXTR(32\|64)rr")>;
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	1072	def: InstRW<[SKLWriteResGroup22], (instregex "BSWAP(16\|32\|64)r")>;
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	1073
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	1074	def SKLWriteResGroup23 : SchedWriteRes<[SKLPort06,SKLPort0156]> {
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	1075	let Latency = 2;
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	1076	let NumMicroOps = 2;
				1077	let ResourceCycles = [1,1];
				1078	}
				1079	def: InstRW<[SKLWriteResGroup23], (instregex "ADC8i8")>;
				1080	def: InstRW<[SKLWriteResGroup23], (instregex "ADC8ri")>;
Craig Topper	2d451e7	2018-03-18 08:38:06 +0000	[diff] [blame]	1081	def: InstRW<[SKLWriteResGroup23], (instrs CWD)>;
Craig Topper	b4c7873	2018-03-19 19:00:32 +0000	[diff] [blame]	1082	def: InstRW<[SKLWriteResGroup23], (instrs JCXZ, JECXZ, JRCXZ)>;
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	1083	def: InstRW<[SKLWriteResGroup23], (instregex "SBB8i8")>;
				1084	def: InstRW<[SKLWriteResGroup23], (instregex "SBB8ri")>;
				1085
				1086	def SKLWriteResGroup24 : SchedWriteRes<[SKLPort4,SKLPort5,SKLPort237]> {
				1087	let Latency = 2;
				1088	let NumMicroOps = 3;
				1089	let ResourceCycles = [1,1,1];
				1090	}
				1091	def: InstRW<[SKLWriteResGroup24], (instregex "EXTRACTPSmr")>;
				1092	def: InstRW<[SKLWriteResGroup24], (instregex "PEXTRBmr")>;
				1093	def: InstRW<[SKLWriteResGroup24], (instregex "PEXTRDmr")>;
				1094	def: InstRW<[SKLWriteResGroup24], (instregex "PEXTRQmr")>;
				1095	def: InstRW<[SKLWriteResGroup24], (instregex "PEXTRWmr")>;
				1096	def: InstRW<[SKLWriteResGroup24], (instregex "STMXCSR")>;
				1097	def: InstRW<[SKLWriteResGroup24], (instregex "VEXTRACTPSmr")>;
				1098	def: InstRW<[SKLWriteResGroup24], (instregex "VPEXTRBmr")>;
				1099	def: InstRW<[SKLWriteResGroup24], (instregex "VPEXTRDmr")>;
				1100	def: InstRW<[SKLWriteResGroup24], (instregex "VPEXTRQmr")>;
				1101	def: InstRW<[SKLWriteResGroup24], (instregex "VPEXTRWmr")>;
				1102	def: InstRW<[SKLWriteResGroup24], (instregex "VSTMXCSR")>;
				1103
				1104	def SKLWriteResGroup25 : SchedWriteRes<[SKLPort4,SKLPort6,SKLPort237]> {
				1105	let Latency = 2;
				1106	let NumMicroOps = 3;
				1107	let ResourceCycles = [1,1,1];
				1108	}
				1109	def: InstRW<[SKLWriteResGroup25], (instregex "FNSTCW16m")>;
				1110
				1111	def SKLWriteResGroup26 : SchedWriteRes<[SKLPort4,SKLPort237,SKLPort06]> {
				1112	let Latency = 2;
				1113	let NumMicroOps = 3;
				1114	let ResourceCycles = [1,1,1];
				1115	}
Craig Topper	f4cd908	2018-01-19 05:47:32 +0000	[diff] [blame]	1116	def: InstRW<[SKLWriteResGroup26], (instregex "SET(AE\|B\|E\|G\|GE\|L\|LE\|NE\|NO\|NP\|NS\|O\|P\|S)m")>;
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	1117
				1118	def SKLWriteResGroup27 : SchedWriteRes<[SKLPort4,SKLPort237,SKLPort15]> {
				1119	let Latency = 2;
				1120	let NumMicroOps = 3;
				1121	let ResourceCycles = [1,1,1];
				1122	}
				1123	def: InstRW<[SKLWriteResGroup27], (instregex "MOVBE(16\|32\|64)mr")>;
				1124
				1125	def SKLWriteResGroup28 : SchedWriteRes<[SKLPort4,SKLPort237,SKLPort0156]> {
				1126	let Latency = 2;
				1127	let NumMicroOps = 3;
				1128	let ResourceCycles = [1,1,1];
				1129	}
Craig Topper	2d451e7	2018-03-18 08:38:06 +0000	[diff] [blame]	1130	def: InstRW<[SKLWriteResGroup28], (instrs PUSH16r, PUSH32r, PUSH64r)>;
				1131	def: InstRW<[SKLWriteResGroup28], (instregex "PUSH(16\|32\|64)rmr")>;
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	1132	def: InstRW<[SKLWriteResGroup28], (instregex "PUSH64i8")>;
				1133	def: InstRW<[SKLWriteResGroup28], (instregex "STOSB")>;
				1134	def: InstRW<[SKLWriteResGroup28], (instregex "STOSL")>;
				1135	def: InstRW<[SKLWriteResGroup28], (instregex "STOSQ")>;
				1136	def: InstRW<[SKLWriteResGroup28], (instregex "STOSW")>;
				1137
				1138	def SKLWriteResGroup29 : SchedWriteRes<[SKLPort1]> {
				1139	let Latency = 3;
				1140	let NumMicroOps = 1;
				1141	let ResourceCycles = [1];
				1142	}
				1143	def: InstRW<[SKLWriteResGroup29], (instregex "BSF(16\|32\|64)rr")>;
				1144	def: InstRW<[SKLWriteResGroup29], (instregex "BSR(16\|32\|64)rr")>;
Clement Courbet	327fac4	2018-03-07 08:14:02 +0000	[diff] [blame]	1145	def: InstRW<[SKLWriteResGroup29], (instrs IMUL16rr, IMUL32rr, IMUL32rri, IMUL32rri8, IMUL64rr, IMUL64rri32, IMUL64rri8)>;
Craig Topper	b369cdb	2018-01-25 06:57:42 +0000	[diff] [blame]	1146	def: InstRW<[SKLWriteResGroup29], (instrs IMUL8r)>;
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	1147	def: InstRW<[SKLWriteResGroup29], (instregex "LZCNT(16\|32\|64)rr")>;
Craig Topper	b369cdb	2018-01-25 06:57:42 +0000	[diff] [blame]	1148	def: InstRW<[SKLWriteResGroup29], (instrs MUL8r)>;
Craig Topper	a42a2ba	2017-12-16 18:35:31 +0000	[diff] [blame]	1149	def: InstRW<[SKLWriteResGroup29], (instregex "PDEP(32\|64)rr")>;
				1150	def: InstRW<[SKLWriteResGroup29], (instregex "PEXT(32\|64)rr")>;
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	1151	def: InstRW<[SKLWriteResGroup29], (instregex "POPCNT(16\|32\|64)rr")>;
				1152	def: InstRW<[SKLWriteResGroup29], (instregex "SHLD(16\|32\|64)rri8")>;
				1153	def: InstRW<[SKLWriteResGroup29], (instregex "SHRD(16\|32\|64)rri8")>;
				1154	def: InstRW<[SKLWriteResGroup29], (instregex "TZCNT(16\|32\|64)rr")>;
				1155
Clement Courbet	327fac4	2018-03-07 08:14:02 +0000	[diff] [blame]	1156	def SKLWriteResGroup29_16i : SchedWriteRes<[SKLPort1, SKLPort0156]> {
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	1157	let Latency = 3;
				1158	let NumMicroOps = 2;
				1159	let ResourceCycles = [1,1];
				1160	}
Clement Courbet	327fac4	2018-03-07 08:14:02 +0000	[diff] [blame]	1161	def: InstRW<[SKLWriteResGroup29_16i], (instrs IMUL16rri, IMUL16rri8)>;
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	1162
				1163	def SKLWriteResGroup30 : SchedWriteRes<[SKLPort5]> {
				1164	let Latency = 3;
				1165	let NumMicroOps = 1;
				1166	let ResourceCycles = [1];
				1167	}
				1168	def: InstRW<[SKLWriteResGroup30], (instregex "ADD_FPrST0")>;
				1169	def: InstRW<[SKLWriteResGroup30], (instregex "ADD_FST0r")>;
				1170	def: InstRW<[SKLWriteResGroup30], (instregex "ADD_FrST0")>;
				1171	def: InstRW<[SKLWriteResGroup30], (instregex "MMX_PSADBWirr")>;
				1172	def: InstRW<[SKLWriteResGroup30], (instregex "PCMPGTQrr")>;
				1173	def: InstRW<[SKLWriteResGroup30], (instregex "PSADBWrr")>;
				1174	def: InstRW<[SKLWriteResGroup30], (instregex "SUBR_FPrST0")>;
				1175	def: InstRW<[SKLWriteResGroup30], (instregex "SUBR_FST0r")>;
				1176	def: InstRW<[SKLWriteResGroup30], (instregex "SUBR_FrST0")>;
				1177	def: InstRW<[SKLWriteResGroup30], (instregex "SUB_FPrST0")>;
				1178	def: InstRW<[SKLWriteResGroup30], (instregex "SUB_FST0r")>;
				1179	def: InstRW<[SKLWriteResGroup30], (instregex "SUB_FrST0")>;
				1180	def: InstRW<[SKLWriteResGroup30], (instregex "VBROADCASTSDYrr")>;
				1181	def: InstRW<[SKLWriteResGroup30], (instregex "VBROADCASTSSYrr")>;
				1182	def: InstRW<[SKLWriteResGroup30], (instregex "VEXTRACTF128rr")>;
				1183	def: InstRW<[SKLWriteResGroup30], (instregex "VEXTRACTI128rr")>;
				1184	def: InstRW<[SKLWriteResGroup30], (instregex "VINSERTF128rr")>;
				1185	def: InstRW<[SKLWriteResGroup30], (instregex "VINSERTI128rr")>;
				1186	def: InstRW<[SKLWriteResGroup30], (instregex "VPBROADCASTBYrr")>;
				1187	def: InstRW<[SKLWriteResGroup30], (instregex "VPBROADCASTBrr")>;
				1188	def: InstRW<[SKLWriteResGroup30], (instregex "VPBROADCASTDYrr")>;
				1189	def: InstRW<[SKLWriteResGroup30], (instregex "VPBROADCASTQYrr")>;
				1190	def: InstRW<[SKLWriteResGroup30], (instregex "VPBROADCASTWYrr")>;
				1191	def: InstRW<[SKLWriteResGroup30], (instregex "VPBROADCASTWrr")>;
				1192	def: InstRW<[SKLWriteResGroup30], (instregex "VPCMPGTQYrr")>;
				1193	def: InstRW<[SKLWriteResGroup30], (instregex "VPCMPGTQrr")>;
				1194	def: InstRW<[SKLWriteResGroup30], (instregex "VPERM2F128rr")>;
				1195	def: InstRW<[SKLWriteResGroup30], (instregex "VPERM2I128rr")>;
				1196	def: InstRW<[SKLWriteResGroup30], (instregex "VPERMDYrr")>;
				1197	def: InstRW<[SKLWriteResGroup30], (instregex "VPERMPDYri")>;
				1198	def: InstRW<[SKLWriteResGroup30], (instregex "VPERMPSYrr")>;
				1199	def: InstRW<[SKLWriteResGroup30], (instregex "VPERMQYri")>;
				1200	def: InstRW<[SKLWriteResGroup30], (instregex "VPMOVSXBDYrr")>;
				1201	def: InstRW<[SKLWriteResGroup30], (instregex "VPMOVSXBQYrr")>;
				1202	def: InstRW<[SKLWriteResGroup30], (instregex "VPMOVSXBWYrr")>;
				1203	def: InstRW<[SKLWriteResGroup30], (instregex "VPMOVSXDQYrr")>;
				1204	def: InstRW<[SKLWriteResGroup30], (instregex "VPMOVSXWDYrr")>;
				1205	def: InstRW<[SKLWriteResGroup30], (instregex "VPMOVSXWQYrr")>;
				1206	def: InstRW<[SKLWriteResGroup30], (instregex "VPMOVZXBDYrr")>;
				1207	def: InstRW<[SKLWriteResGroup30], (instregex "VPMOVZXBQYrr")>;
				1208	def: InstRW<[SKLWriteResGroup30], (instregex "VPMOVZXBWYrr")>;
				1209	def: InstRW<[SKLWriteResGroup30], (instregex "VPMOVZXDQYrr")>;
				1210	def: InstRW<[SKLWriteResGroup30], (instregex "VPMOVZXWDYrr")>;
				1211	def: InstRW<[SKLWriteResGroup30], (instregex "VPMOVZXWQYrr")>;
				1212	def: InstRW<[SKLWriteResGroup30], (instregex "VPSADBWYrr")>;
				1213	def: InstRW<[SKLWriteResGroup30], (instregex "VPSADBWrr")>;
				1214
				1215	def SKLWriteResGroup31 : SchedWriteRes<[SKLPort0,SKLPort5]> {
				1216	let Latency = 3;
				1217	let NumMicroOps = 2;
				1218	let ResourceCycles = [1,1];
				1219	}
				1220	def: InstRW<[SKLWriteResGroup31], (instregex "EXTRACTPSrr")>;
Craig Topper	b85b484	2018-01-24 17:58:51 +0000	[diff] [blame]	1221	def: InstRW<[SKLWriteResGroup31], (instregex "MMX_PEXTRWrr")>;
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	1222	def: InstRW<[SKLWriteResGroup31], (instregex "PEXTRBrr")>;
				1223	def: InstRW<[SKLWriteResGroup31], (instregex "PEXTRDrr")>;
				1224	def: InstRW<[SKLWriteResGroup31], (instregex "PEXTRQrr")>;
Craig Topper	b85b484	2018-01-24 17:58:51 +0000	[diff] [blame]	1225	def: InstRW<[SKLWriteResGroup31], (instregex "PEXTRWrr")>;
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	1226	def: InstRW<[SKLWriteResGroup31], (instregex "PTESTrr")>;
				1227	def: InstRW<[SKLWriteResGroup31], (instregex "VEXTRACTPSrr")>;
				1228	def: InstRW<[SKLWriteResGroup31], (instregex "VPEXTRBrr")>;
				1229	def: InstRW<[SKLWriteResGroup31], (instregex "VPEXTRDrr")>;
				1230	def: InstRW<[SKLWriteResGroup31], (instregex "VPEXTRQrr")>;
Craig Topper	b85b484	2018-01-24 17:58:51 +0000	[diff] [blame]	1231	def: InstRW<[SKLWriteResGroup31], (instregex "VPEXTRWrr")>;
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	1232	def: InstRW<[SKLWriteResGroup31], (instregex "VPTESTYrr")>;
				1233	def: InstRW<[SKLWriteResGroup31], (instregex "VPTESTrr")>;
				1234
				1235	def SKLWriteResGroup32 : SchedWriteRes<[SKLPort0,SKLPort0156]> {
				1236	let Latency = 3;
				1237	let NumMicroOps = 2;
				1238	let ResourceCycles = [1,1];
				1239	}
				1240	def: InstRW<[SKLWriteResGroup32], (instregex "FNSTSW16r")>;
				1241
				1242	def SKLWriteResGroup33 : SchedWriteRes<[SKLPort06]> {
				1243	let Latency = 3;
				1244	let NumMicroOps = 3;
				1245	let ResourceCycles = [3];
				1246	}
Craig Topper	13a1650	2018-03-19 00:56:09 +0000	[diff] [blame]	1247	def: InstRW<[SKLWriteResGroup33], (instregex "ROL(8\|16\|32\|64)rCL")>;
				1248	def: InstRW<[SKLWriteResGroup33], (instregex "ROR(8\|16\|32\|64)rCL")>;
				1249	def: InstRW<[SKLWriteResGroup33], (instregex "SAR(8\|16\|32\|64)rCL")>;
				1250	def: InstRW<[SKLWriteResGroup33], (instregex "SHL(8\|16\|32\|64)rCL")>;
				1251	def: InstRW<[SKLWriteResGroup33], (instregex "SHR(8\|16\|32\|64)rCL")>;
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	1252
				1253	def SKLWriteResGroup34 : SchedWriteRes<[SKLPort0156]> {
				1254	let Latency = 3;
				1255	let NumMicroOps = 3;
				1256	let ResourceCycles = [3];
				1257	}
Craig Topper	13a1650	2018-03-19 00:56:09 +0000	[diff] [blame]	1258	def: InstRW<[SKLWriteResGroup34], (instregex "XADD(8\|16\|32\|64)rr")>;
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	1259	def: InstRW<[SKLWriteResGroup34], (instregex "XCHG8rr")>;
				1260
				1261	def SKLWriteResGroup35 : SchedWriteRes<[SKLPort0,SKLPort5]> {
				1262	let Latency = 3;
				1263	let NumMicroOps = 3;
				1264	let ResourceCycles = [1,2];
				1265	}
Craig Topper	dbddac0	2018-01-25 04:45:30 +0000	[diff] [blame]	1266	def: InstRW<[SKLWriteResGroup35], (instregex "MMX_PHADDSWrr")>;
				1267	def: InstRW<[SKLWriteResGroup35], (instregex "MMX_PHSUBSWrr")>;
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	1268
				1269	def SKLWriteResGroup36 : SchedWriteRes<[SKLPort5,SKLPort01]> {
				1270	let Latency = 3;
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	1271	let NumMicroOps = 3;
				1272	let ResourceCycles = [2,1];
				1273	}
Craig Topper	dbddac0	2018-01-25 04:45:30 +0000	[diff] [blame]	1274	def: InstRW<[SKLWriteResGroup36], (instregex "PHADDSWrr")>;
				1275	def: InstRW<[SKLWriteResGroup36], (instregex "PHSUBSWrr")>;
				1276	def: InstRW<[SKLWriteResGroup36], (instregex "VPHADDSWrr")>;
				1277	def: InstRW<[SKLWriteResGroup36], (instregex "VPHADDSWYrr")>;
				1278	def: InstRW<[SKLWriteResGroup36], (instregex "VPHSUBSWrr")>;
				1279	def: InstRW<[SKLWriteResGroup36], (instregex "VPHSUBSWYrr")>;
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	1280
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	1281	def SKLWriteResGroup37 : SchedWriteRes<[SKLPort5,SKLPort05]> {
				1282	let Latency = 3;
				1283	let NumMicroOps = 3;
				1284	let ResourceCycles = [2,1];
				1285	}
Craig Topper	066e737	2018-01-25 04:45:32 +0000	[diff] [blame]	1286	def: InstRW<[SKLWriteResGroup37], (instregex "MMX_PHADDDrr")>;
Craig Topper	dbddac0	2018-01-25 04:45:30 +0000	[diff] [blame]	1287	def: InstRW<[SKLWriteResGroup37], (instregex "MMX_PHADDWrr")>;
Craig Topper	dbddac0	2018-01-25 04:45:30 +0000	[diff] [blame]	1288	def: InstRW<[SKLWriteResGroup37], (instregex "MMX_PHSUBDrr")>;
				1289	def: InstRW<[SKLWriteResGroup37], (instregex "MMX_PHSUBWrr")>;
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	1290
				1291	def SKLWriteResGroup38 : SchedWriteRes<[SKLPort5,SKLPort015]> {
				1292	let Latency = 3;
				1293	let NumMicroOps = 3;
				1294	let ResourceCycles = [2,1];
				1295	}
				1296	def: InstRW<[SKLWriteResGroup38], (instregex "PHADDDrr")>;
				1297	def: InstRW<[SKLWriteResGroup38], (instregex "PHADDWrr")>;
				1298	def: InstRW<[SKLWriteResGroup38], (instregex "PHSUBDrr")>;
				1299	def: InstRW<[SKLWriteResGroup38], (instregex "PHSUBWrr")>;
				1300	def: InstRW<[SKLWriteResGroup38], (instregex "VPHADDDYrr")>;
				1301	def: InstRW<[SKLWriteResGroup38], (instregex "VPHADDDrr")>;
				1302	def: InstRW<[SKLWriteResGroup38], (instregex "VPHADDWYrr")>;
				1303	def: InstRW<[SKLWriteResGroup38], (instregex "VPHADDWrr")>;
				1304	def: InstRW<[SKLWriteResGroup38], (instregex "VPHSUBDYrr")>;
				1305	def: InstRW<[SKLWriteResGroup38], (instregex "VPHSUBDrr")>;
				1306	def: InstRW<[SKLWriteResGroup38], (instregex "VPHSUBWYrr")>;
				1307	def: InstRW<[SKLWriteResGroup38], (instregex "VPHSUBWrr")>;
				1308
				1309	def SKLWriteResGroup39 : SchedWriteRes<[SKLPort5,SKLPort0156]> {
				1310	let Latency = 3;
				1311	let NumMicroOps = 3;
				1312	let ResourceCycles = [2,1];
				1313	}
				1314	def: InstRW<[SKLWriteResGroup39], (instregex "MMX_PACKSSDWirr")>;
				1315	def: InstRW<[SKLWriteResGroup39], (instregex "MMX_PACKSSWBirr")>;
				1316	def: InstRW<[SKLWriteResGroup39], (instregex "MMX_PACKUSWBirr")>;
				1317
				1318	def SKLWriteResGroup40 : SchedWriteRes<[SKLPort6,SKLPort0156]> {
				1319	let Latency = 3;
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	1320	let NumMicroOps = 3;
				1321	let ResourceCycles = [1,2];
				1322	}
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	1323	def: InstRW<[SKLWriteResGroup40], (instregex "CLD")>;
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	1324
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	1325	def SKLWriteResGroup41 : SchedWriteRes<[SKLPort237,SKLPort0156]> {
				1326	let Latency = 3;
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	1327	let NumMicroOps = 3;
				1328	let ResourceCycles = [1,2];
				1329	}
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	1330	def: InstRW<[SKLWriteResGroup41], (instregex "MFENCE")>;
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	1331
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	1332	def SKLWriteResGroup42 : SchedWriteRes<[SKLPort06,SKLPort0156]> {
				1333	let Latency = 3;
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	1334	let NumMicroOps = 3;
				1335	let ResourceCycles = [1,2];
				1336	}
Craig Topper	13a1650	2018-03-19 00:56:09 +0000	[diff] [blame]	1337	def: InstRW<[SKLWriteResGroup42], (instregex "RCL(8\|16\|32\|64)r1")>;
				1338	def: InstRW<[SKLWriteResGroup42], (instregex "RCL(8\|16\|32\|64)ri")>;
				1339	def: InstRW<[SKLWriteResGroup42], (instregex "RCR(8\|16\|32\|64)r1")>;
				1340	def: InstRW<[SKLWriteResGroup42], (instregex "RCR(8\|16\|32\|64)ri")>;
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	1341
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	1342	def SKLWriteResGroup43 : SchedWriteRes<[SKLPort0,SKLPort4,SKLPort237]> {
				1343	let Latency = 3;
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	1344	let NumMicroOps = 3;
				1345	let ResourceCycles = [1,1,1];
				1346	}
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	1347	def: InstRW<[SKLWriteResGroup43], (instregex "FNSTSWm")>;
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	1348
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	1349	def SKLWriteResGroup44 : SchedWriteRes<[SKLPort4,SKLPort237,SKLPort06]> {
				1350	let Latency = 3;
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	1351	let NumMicroOps = 4;
				1352	let ResourceCycles = [1,1,2];
				1353	}
Craig Topper	f4cd908	2018-01-19 05:47:32 +0000	[diff] [blame]	1354	def: InstRW<[SKLWriteResGroup44], (instregex "SET(A\|BE)m")>;
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	1355
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	1356	def SKLWriteResGroup45 : SchedWriteRes<[SKLPort4,SKLPort6,SKLPort237,SKLPort0156]> {
				1357	let Latency = 3;
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	1358	let NumMicroOps = 4;
				1359	let ResourceCycles = [1,1,1,1];
				1360	}
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	1361	def: InstRW<[SKLWriteResGroup45], (instregex "CALL(16\|32\|64)r")>;
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	1362
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	1363	def SKLWriteResGroup46 : SchedWriteRes<[SKLPort4,SKLPort237,SKLPort06,SKLPort0156]> {
				1364	let Latency = 3;
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	1365	let NumMicroOps = 4;
				1366	let ResourceCycles = [1,1,1,1];
				1367	}
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	1368	def: InstRW<[SKLWriteResGroup46], (instregex "CALL64pcrel32")>;
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	1369
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	1370	def SKLWriteResGroup47 : SchedWriteRes<[SKLPort0]> {
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	1371	let Latency = 4;
				1372	let NumMicroOps = 1;
				1373	let ResourceCycles = [1];
				1374	}
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	1375	def: InstRW<[SKLWriteResGroup47], (instregex "AESDECLASTrr")>;
				1376	def: InstRW<[SKLWriteResGroup47], (instregex "AESDECrr")>;
				1377	def: InstRW<[SKLWriteResGroup47], (instregex "AESENCLASTrr")>;
				1378	def: InstRW<[SKLWriteResGroup47], (instregex "AESENCrr")>;
Craig Topper	dbddac0	2018-01-25 04:45:30 +0000	[diff] [blame]	1379	def: InstRW<[SKLWriteResGroup47], (instregex "MMX_PMADDUBSWrr")>;
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	1380	def: InstRW<[SKLWriteResGroup47], (instregex "MMX_PMADDWDirr")>;
Craig Topper	dbddac0	2018-01-25 04:45:30 +0000	[diff] [blame]	1381	def: InstRW<[SKLWriteResGroup47], (instregex "MMX_PMULHRSWrr")>;
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	1382	def: InstRW<[SKLWriteResGroup47], (instregex "MMX_PMULHUWirr")>;
				1383	def: InstRW<[SKLWriteResGroup47], (instregex "MMX_PMULHWirr")>;
				1384	def: InstRW<[SKLWriteResGroup47], (instregex "MMX_PMULLWirr")>;
				1385	def: InstRW<[SKLWriteResGroup47], (instregex "MMX_PMULUDQirr")>;
				1386	def: InstRW<[SKLWriteResGroup47], (instregex "MUL_FPrST0")>;
				1387	def: InstRW<[SKLWriteResGroup47], (instregex "MUL_FST0r")>;
				1388	def: InstRW<[SKLWriteResGroup47], (instregex "MUL_FrST0")>;
				1389	def: InstRW<[SKLWriteResGroup47], (instregex "RCPPSr")>;
				1390	def: InstRW<[SKLWriteResGroup47], (instregex "RCPSSr")>;
				1391	def: InstRW<[SKLWriteResGroup47], (instregex "RSQRTPSr")>;
				1392	def: InstRW<[SKLWriteResGroup47], (instregex "RSQRTSSr")>;
				1393	def: InstRW<[SKLWriteResGroup47], (instregex "VAESDECLASTrr")>;
				1394	def: InstRW<[SKLWriteResGroup47], (instregex "VAESDECrr")>;
				1395	def: InstRW<[SKLWriteResGroup47], (instregex "VAESENCLASTrr")>;
				1396	def: InstRW<[SKLWriteResGroup47], (instregex "VAESENCrr")>;
				1397	def: InstRW<[SKLWriteResGroup47], (instregex "VRCPPSYr")>;
				1398	def: InstRW<[SKLWriteResGroup47], (instregex "VRCPPSr")>;
				1399	def: InstRW<[SKLWriteResGroup47], (instregex "VRCPSSr")>;
				1400	def: InstRW<[SKLWriteResGroup47], (instregex "VRSQRTPSYr")>;
				1401	def: InstRW<[SKLWriteResGroup47], (instregex "VRSQRTPSr")>;
				1402	def: InstRW<[SKLWriteResGroup47], (instregex "VRSQRTSSr")>;
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	1403
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	1404	def SKLWriteResGroup48 : SchedWriteRes<[SKLPort01]> {
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	1405	let Latency = 4;
				1406	let NumMicroOps = 1;
				1407	let ResourceCycles = [1];
				1408	}
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	1409	def: InstRW<[SKLWriteResGroup48], (instregex "ADDPDrr")>;
				1410	def: InstRW<[SKLWriteResGroup48], (instregex "ADDPSrr")>;
				1411	def: InstRW<[SKLWriteResGroup48], (instregex "ADDSDrr")>;
				1412	def: InstRW<[SKLWriteResGroup48], (instregex "ADDSSrr")>;
				1413	def: InstRW<[SKLWriteResGroup48], (instregex "ADDSUBPDrr")>;
				1414	def: InstRW<[SKLWriteResGroup48], (instregex "ADDSUBPSrr")>;
				1415	def: InstRW<[SKLWriteResGroup48], (instregex "MULPDrr")>;
				1416	def: InstRW<[SKLWriteResGroup48], (instregex "MULPSrr")>;
				1417	def: InstRW<[SKLWriteResGroup48], (instregex "MULSDrr")>;
				1418	def: InstRW<[SKLWriteResGroup48], (instregex "MULSSrr")>;
				1419	def: InstRW<[SKLWriteResGroup48], (instregex "SUBPDrr")>;
				1420	def: InstRW<[SKLWriteResGroup48], (instregex "SUBPSrr")>;
				1421	def: InstRW<[SKLWriteResGroup48], (instregex "SUBSDrr")>;
				1422	def: InstRW<[SKLWriteResGroup48], (instregex "SUBSSrr")>;
				1423	def: InstRW<[SKLWriteResGroup48], (instregex "VADDPDYrr")>;
				1424	def: InstRW<[SKLWriteResGroup48], (instregex "VADDPDrr")>;
				1425	def: InstRW<[SKLWriteResGroup48], (instregex "VADDPSYrr")>;
				1426	def: InstRW<[SKLWriteResGroup48], (instregex "VADDPSrr")>;
				1427	def: InstRW<[SKLWriteResGroup48], (instregex "VADDSDrr")>;
				1428	def: InstRW<[SKLWriteResGroup48], (instregex "VADDSSrr")>;
				1429	def: InstRW<[SKLWriteResGroup48], (instregex "VADDSUBPDYrr")>;
				1430	def: InstRW<[SKLWriteResGroup48], (instregex "VADDSUBPDrr")>;
				1431	def: InstRW<[SKLWriteResGroup48], (instregex "VADDSUBPSYrr")>;
				1432	def: InstRW<[SKLWriteResGroup48], (instregex "VADDSUBPSrr")>;
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	1433	def: InstRW<[SKLWriteResGroup48], (instregex "VMULPDYrr")>;
				1434	def: InstRW<[SKLWriteResGroup48], (instregex "VMULPDrr")>;
				1435	def: InstRW<[SKLWriteResGroup48], (instregex "VMULPSYrr")>;
				1436	def: InstRW<[SKLWriteResGroup48], (instregex "VMULPSrr")>;
				1437	def: InstRW<[SKLWriteResGroup48], (instregex "VMULSDrr")>;
				1438	def: InstRW<[SKLWriteResGroup48], (instregex "VMULSSrr")>;
				1439	def: InstRW<[SKLWriteResGroup48], (instregex "VSUBPDYrr")>;
				1440	def: InstRW<[SKLWriteResGroup48], (instregex "VSUBPDrr")>;
				1441	def: InstRW<[SKLWriteResGroup48], (instregex "VSUBPSYrr")>;
				1442	def: InstRW<[SKLWriteResGroup48], (instregex "VSUBPSrr")>;
				1443	def: InstRW<[SKLWriteResGroup48], (instregex "VSUBSDrr")>;
				1444	def: InstRW<[SKLWriteResGroup48], (instregex "VSUBSSrr")>;
Craig Topper	f82867c	2017-12-13 23:11:30 +0000	[diff] [blame]	1445	def: InstRW<[SKLWriteResGroup48],
				1446	(instregex
				1447	"VF(N)?M(ADD\|SUB\|ADDSUB\|SUBADD)(132\|213\|231)P(D\|S)(Y)?r",
				1448	"VF(N)?M(ADD\|SUB)(132\|213\|231)S(D\|S)r")>;
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	1449
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	1450	def SKLWriteResGroup49 : SchedWriteRes<[SKLPort015]> {
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	1451	let Latency = 4;
				1452	let NumMicroOps = 1;
				1453	let ResourceCycles = [1];
				1454	}
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	1455	def: InstRW<[SKLWriteResGroup49], (instregex "CMPPDrri")>;
				1456	def: InstRW<[SKLWriteResGroup49], (instregex "CMPPSrri")>;
Craig Topper	6c65910	2017-12-10 09:14:37 +0000	[diff] [blame]	1457	def: InstRW<[SKLWriteResGroup49], (instregex "CMPSDrr")>;
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	1458	def: InstRW<[SKLWriteResGroup49], (instregex "CMPSSrr")>;
				1459	def: InstRW<[SKLWriteResGroup49], (instregex "CVTDQ2PSrr")>;
				1460	def: InstRW<[SKLWriteResGroup49], (instregex "CVTPS2DQrr")>;
				1461	def: InstRW<[SKLWriteResGroup49], (instregex "CVTTPS2DQrr")>;
Craig Topper	5ffe801	2017-12-10 01:24:05 +0000	[diff] [blame]	1462	def: InstRW<[SKLWriteResGroup49], (instregex "MAX(C?)PDrr")>;
				1463	def: InstRW<[SKLWriteResGroup49], (instregex "MAX(C?)PSrr")>;
				1464	def: InstRW<[SKLWriteResGroup49], (instregex "MAX(C?)SDrr")>;
				1465	def: InstRW<[SKLWriteResGroup49], (instregex "MAX(C?)SSrr")>;
				1466	def: InstRW<[SKLWriteResGroup49], (instregex "MIN(C?)PDrr")>;
				1467	def: InstRW<[SKLWriteResGroup49], (instregex "MIN(C?)PSrr")>;
				1468	def: InstRW<[SKLWriteResGroup49], (instregex "MIN(C?)SDrr")>;
				1469	def: InstRW<[SKLWriteResGroup49], (instregex "MIN(C?)SSrr")>;
Craig Topper	dbddac0	2018-01-25 04:45:30 +0000	[diff] [blame]	1470	def: InstRW<[SKLWriteResGroup49], (instregex "PHMINPOSUWrr")>;
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	1471	def: InstRW<[SKLWriteResGroup49], (instregex "PMADDUBSWrr")>;
				1472	def: InstRW<[SKLWriteResGroup49], (instregex "PMADDWDrr")>;
				1473	def: InstRW<[SKLWriteResGroup49], (instregex "PMULDQrr")>;
				1474	def: InstRW<[SKLWriteResGroup49], (instregex "PMULHRSWrr")>;
				1475	def: InstRW<[SKLWriteResGroup49], (instregex "PMULHUWrr")>;
				1476	def: InstRW<[SKLWriteResGroup49], (instregex "PMULHWrr")>;
				1477	def: InstRW<[SKLWriteResGroup49], (instregex "PMULLWrr")>;
				1478	def: InstRW<[SKLWriteResGroup49], (instregex "PMULUDQrr")>;
				1479	def: InstRW<[SKLWriteResGroup49], (instregex "VCMPPDYrri")>;
				1480	def: InstRW<[SKLWriteResGroup49], (instregex "VCMPPDrri")>;
				1481	def: InstRW<[SKLWriteResGroup49], (instregex "VCMPPSYrri")>;
				1482	def: InstRW<[SKLWriteResGroup49], (instregex "VCMPPSrri")>;
				1483	def: InstRW<[SKLWriteResGroup49], (instregex "VCMPSDrr")>;
				1484	def: InstRW<[SKLWriteResGroup49], (instregex "VCMPSSrr")>;
				1485	def: InstRW<[SKLWriteResGroup49], (instregex "VCVTDQ2PSYrr")>;
				1486	def: InstRW<[SKLWriteResGroup49], (instregex "VCVTDQ2PSrr")>;
				1487	def: InstRW<[SKLWriteResGroup49], (instregex "VCVTPS2DQYrr")>;
				1488	def: InstRW<[SKLWriteResGroup49], (instregex "VCVTPS2DQrr")>;
				1489	def: InstRW<[SKLWriteResGroup49], (instregex "VCVTTPS2DQYrr")>;
				1490	def: InstRW<[SKLWriteResGroup49], (instregex "VCVTTPS2DQrr")>;
Craig Topper	5ffe801	2017-12-10 01:24:05 +0000	[diff] [blame]	1491	def: InstRW<[SKLWriteResGroup49], (instregex "VMAX(C?)PDYrr")>;
				1492	def: InstRW<[SKLWriteResGroup49], (instregex "VMAX(C?)PDrr")>;
				1493	def: InstRW<[SKLWriteResGroup49], (instregex "VMAX(C?)PSYrr")>;
				1494	def: InstRW<[SKLWriteResGroup49], (instregex "VMAX(C?)PSrr")>;
				1495	def: InstRW<[SKLWriteResGroup49], (instregex "VMAX(C?)SDrr")>;
				1496	def: InstRW<[SKLWriteResGroup49], (instregex "VMAX(C?)SSrr")>;
				1497	def: InstRW<[SKLWriteResGroup49], (instregex "VMIN(C?)PDYrr")>;
				1498	def: InstRW<[SKLWriteResGroup49], (instregex "VMIN(C?)PDrr")>;
				1499	def: InstRW<[SKLWriteResGroup49], (instregex "VMIN(C?)PSYrr")>;
				1500	def: InstRW<[SKLWriteResGroup49], (instregex "VMIN(C?)PSrr")>;
				1501	def: InstRW<[SKLWriteResGroup49], (instregex "VMIN(C?)SDrr")>;
				1502	def: InstRW<[SKLWriteResGroup49], (instregex "VMIN(C?)SSrr")>;
Craig Topper	dbddac0	2018-01-25 04:45:30 +0000	[diff] [blame]	1503	def: InstRW<[SKLWriteResGroup49], (instregex "VPHMINPOSUWrr")>;
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	1504	def: InstRW<[SKLWriteResGroup49], (instregex "VPMADDUBSWYrr")>;
				1505	def: InstRW<[SKLWriteResGroup49], (instregex "VPMADDUBSWrr")>;
				1506	def: InstRW<[SKLWriteResGroup49], (instregex "VPMADDWDYrr")>;
				1507	def: InstRW<[SKLWriteResGroup49], (instregex "VPMADDWDrr")>;
				1508	def: InstRW<[SKLWriteResGroup49], (instregex "VPMULDQYrr")>;
				1509	def: InstRW<[SKLWriteResGroup49], (instregex "VPMULDQrr")>;
				1510	def: InstRW<[SKLWriteResGroup49], (instregex "VPMULHRSWYrr")>;
				1511	def: InstRW<[SKLWriteResGroup49], (instregex "VPMULHRSWrr")>;
				1512	def: InstRW<[SKLWriteResGroup49], (instregex "VPMULHUWYrr")>;
				1513	def: InstRW<[SKLWriteResGroup49], (instregex "VPMULHUWrr")>;
				1514	def: InstRW<[SKLWriteResGroup49], (instregex "VPMULHWYrr")>;
				1515	def: InstRW<[SKLWriteResGroup49], (instregex "VPMULHWrr")>;
				1516	def: InstRW<[SKLWriteResGroup49], (instregex "VPMULLWYrr")>;
				1517	def: InstRW<[SKLWriteResGroup49], (instregex "VPMULLWrr")>;
				1518	def: InstRW<[SKLWriteResGroup49], (instregex "VPMULUDQYrr")>;
				1519	def: InstRW<[SKLWriteResGroup49], (instregex "VPMULUDQrr")>;
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	1520
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	1521	def SKLWriteResGroup50 : SchedWriteRes<[SKLPort5]> {
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	1522	let Latency = 4;
				1523	let NumMicroOps = 2;
				1524	let ResourceCycles = [2];
				1525	}
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	1526	def: InstRW<[SKLWriteResGroup50], (instregex "MPSADBWrri")>;
				1527	def: InstRW<[SKLWriteResGroup50], (instregex "VMPSADBWYrri")>;
				1528	def: InstRW<[SKLWriteResGroup50], (instregex "VMPSADBWrri")>;
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	1529
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	1530	def SKLWriteResGroup51 : SchedWriteRes<[SKLPort1,SKLPort5]> {
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	1531	let Latency = 4;
				1532	let NumMicroOps = 2;
				1533	let ResourceCycles = [1,1];
				1534	}
Craig Topper	b369cdb	2018-01-25 06:57:42 +0000	[diff] [blame]	1535	def: InstRW<[SKLWriteResGroup51], (instrs IMUL64r)>;
				1536	def: InstRW<[SKLWriteResGroup51], (instrs MUL64r)>;
				1537	def: InstRW<[SKLWriteResGroup51], (instrs MULX64rr)>;
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	1538
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	1539	def SKLWriteResGroup51_16 : SchedWriteRes<[SKLPort1,SKLPort06,SKLPort0156]> {
				1540	let Latency = 4;
				1541	let NumMicroOps = 4;
				1542	}
Craig Topper	b369cdb	2018-01-25 06:57:42 +0000	[diff] [blame]	1543	def: InstRW<[SKLWriteResGroup51_16], (instrs IMUL16r)>;
				1544	def: InstRW<[SKLWriteResGroup51_16], (instrs MUL16r)>;
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	1545
				1546	def SKLWriteResGroup52 : SchedWriteRes<[SKLPort5,SKLPort01]> {
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	1547	let Latency = 4;
				1548	let NumMicroOps = 2;
				1549	let ResourceCycles = [1,1];
				1550	}
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	1551	def: InstRW<[SKLWriteResGroup52], (instregex "VPSLLDYrr")>;
				1552	def: InstRW<[SKLWriteResGroup52], (instregex "VPSLLQYrr")>;
				1553	def: InstRW<[SKLWriteResGroup52], (instregex "VPSLLWYrr")>;
				1554	def: InstRW<[SKLWriteResGroup52], (instregex "VPSRADYrr")>;
				1555	def: InstRW<[SKLWriteResGroup52], (instregex "VPSRAWYrr")>;
				1556	def: InstRW<[SKLWriteResGroup52], (instregex "VPSRLDYrr")>;
				1557	def: InstRW<[SKLWriteResGroup52], (instregex "VPSRLQYrr")>;
				1558	def: InstRW<[SKLWriteResGroup52], (instregex "VPSRLWYrr")>;
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	1559
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	1560	def SKLWriteResGroup53 : SchedWriteRes<[SKLPort4,SKLPort5,SKLPort237]> {
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	1561	let Latency = 4;
				1562	let NumMicroOps = 3;
				1563	let ResourceCycles = [1,1,1];
				1564	}
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	1565	def: InstRW<[SKLWriteResGroup53], (instregex "ISTT_FP16m")>;
				1566	def: InstRW<[SKLWriteResGroup53], (instregex "ISTT_FP32m")>;
				1567	def: InstRW<[SKLWriteResGroup53], (instregex "ISTT_FP64m")>;
				1568	def: InstRW<[SKLWriteResGroup53], (instregex "IST_F16m")>;
				1569	def: InstRW<[SKLWriteResGroup53], (instregex "IST_F32m")>;
				1570	def: InstRW<[SKLWriteResGroup53], (instregex "IST_FP16m")>;
				1571	def: InstRW<[SKLWriteResGroup53], (instregex "IST_FP32m")>;
				1572	def: InstRW<[SKLWriteResGroup53], (instregex "IST_FP64m")>;
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	1573
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	1574	def SKLWriteResGroup54 : SchedWriteRes<[SKLPort0156]> {
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	1575	let Latency = 4;
				1576	let NumMicroOps = 4;
				1577	let ResourceCycles = [4];
				1578	}
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	1579	def: InstRW<[SKLWriteResGroup54], (instregex "FNCLEX")>;
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	1580
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	1581	def SKLWriteResGroup55 : SchedWriteRes<[SKLPort6,SKLPort0156]> {
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	1582	let Latency = 4;
				1583	let NumMicroOps = 4;
				1584	let ResourceCycles = [1,3];
				1585	}
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	1586	def: InstRW<[SKLWriteResGroup55], (instregex "PAUSE")>;
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	1587
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	1588	def SKLWriteResGroup56 : SchedWriteRes<[SKLPort015,SKLPort0156]> {
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	1589	let Latency = 4;
				1590	let NumMicroOps = 4;
				1591	let ResourceCycles = [1,3];
				1592	}
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	1593	def: InstRW<[SKLWriteResGroup56], (instregex "VZEROUPPER")>;
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	1594
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	1595	def SKLWriteResGroup57 : SchedWriteRes<[SKLPort1,SKLPort6,SKLPort0156]> {
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	1596	let Latency = 4;
				1597	let NumMicroOps = 4;
				1598	let ResourceCycles = [1,1,2];
				1599	}
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	1600	def: InstRW<[SKLWriteResGroup57], (instregex "LAR(16\|32\|64)rr")>;
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	1601
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	1602	def SKLWriteResGroup58 : SchedWriteRes<[SKLPort23]> {
				1603	let Latency = 5;
				1604	let NumMicroOps = 1;
				1605	let ResourceCycles = [1];
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	1606	}
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	1607	def: InstRW<[SKLWriteResGroup58], (instregex "MMX_MOVD64rm")>;
				1608	def: InstRW<[SKLWriteResGroup58], (instregex "MMX_MOVD64to64rm")>;
				1609	def: InstRW<[SKLWriteResGroup58], (instregex "MMX_MOVQ64rm")>;
Craig Topper	13a1650	2018-03-19 00:56:09 +0000	[diff] [blame]	1610	def: InstRW<[SKLWriteResGroup58], (instregex "MOV(8\|16\|32\|64)rm")>;
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	1611	def: InstRW<[SKLWriteResGroup58], (instregex "MOV64toPQIrm")>;
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	1612	def: InstRW<[SKLWriteResGroup58], (instregex "MOVDDUPrm")>;
				1613	def: InstRW<[SKLWriteResGroup58], (instregex "MOVDI2PDIrm")>;
Craig Topper	90c9c15	2017-12-10 09:14:44 +0000	[diff] [blame]	1614	def: InstRW<[SKLWriteResGroup58], (instregex "MOVQI2PQIrm")>;
				1615	def: InstRW<[SKLWriteResGroup58], (instregex "MOVSDrm")>;
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	1616	def: InstRW<[SKLWriteResGroup58], (instregex "MOVSSrm")>;
				1617	def: InstRW<[SKLWriteResGroup58], (instregex "MOVSX(16\|32\|64)rm16")>;
				1618	def: InstRW<[SKLWriteResGroup58], (instregex "MOVSX(16\|32\|64)rm32")>;
				1619	def: InstRW<[SKLWriteResGroup58], (instregex "MOVSX(16\|32\|64)rm8")>;
				1620	def: InstRW<[SKLWriteResGroup58], (instregex "MOVZX(16\|32\|64)rm16")>;
				1621	def: InstRW<[SKLWriteResGroup58], (instregex "MOVZX(16\|32\|64)rm8")>;
				1622	def: InstRW<[SKLWriteResGroup58], (instregex "PREFETCHNTA")>;
				1623	def: InstRW<[SKLWriteResGroup58], (instregex "PREFETCHT0")>;
				1624	def: InstRW<[SKLWriteResGroup58], (instregex "PREFETCHT1")>;
				1625	def: InstRW<[SKLWriteResGroup58], (instregex "PREFETCHT2")>;
				1626	def: InstRW<[SKLWriteResGroup58], (instregex "VMOV64toPQIrm")>;
				1627	def: InstRW<[SKLWriteResGroup58], (instregex "VMOVDDUPrm")>;
				1628	def: InstRW<[SKLWriteResGroup58], (instregex "VMOVDI2PDIrm")>;
				1629	def: InstRW<[SKLWriteResGroup58], (instregex "VMOVQI2PQIrm")>;
				1630	def: InstRW<[SKLWriteResGroup58], (instregex "VMOVSDrm")>;
				1631	def: InstRW<[SKLWriteResGroup58], (instregex "VMOVSSrm")>;
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	1632
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	1633	def SKLWriteResGroup59 : SchedWriteRes<[SKLPort0,SKLPort5]> {
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	1634	let Latency = 5;
				1635	let NumMicroOps = 2;
				1636	let ResourceCycles = [1,1];
				1637	}
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	1638	def: InstRW<[SKLWriteResGroup59], (instregex "CVTDQ2PDrr")>;
				1639	def: InstRW<[SKLWriteResGroup59], (instregex "MMX_CVTPI2PDirr")>;
				1640	def: InstRW<[SKLWriteResGroup59], (instregex "VCVTDQ2PDrr")>;
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	1641
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	1642	def SKLWriteResGroup60 : SchedWriteRes<[SKLPort5,SKLPort015]> {
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	1643	let Latency = 5;
				1644	let NumMicroOps = 2;
				1645	let ResourceCycles = [1,1];
				1646	}
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	1647	def: InstRW<[SKLWriteResGroup60], (instregex "CVTPD2DQrr")>;
				1648	def: InstRW<[SKLWriteResGroup60], (instregex "CVTPD2PSrr")>;
				1649	def: InstRW<[SKLWriteResGroup60], (instregex "CVTPS2PDrr")>;
				1650	def: InstRW<[SKLWriteResGroup60], (instregex "CVTSD2SSrr")>;
Craig Topper	a0be5a0	2017-12-10 19:47:56 +0000	[diff] [blame]	1651	def: InstRW<[SKLWriteResGroup60], (instregex "CVTSI642SDrr")>;
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	1652	def: InstRW<[SKLWriteResGroup60], (instregex "CVTSI2SDrr")>;
				1653	def: InstRW<[SKLWriteResGroup60], (instregex "CVTSI2SSrr")>;
				1654	def: InstRW<[SKLWriteResGroup60], (instregex "CVTSS2SDrr")>;
				1655	def: InstRW<[SKLWriteResGroup60], (instregex "CVTTPD2DQrr")>;
				1656	def: InstRW<[SKLWriteResGroup60], (instregex "MMX_CVTPD2PIirr")>;
				1657	def: InstRW<[SKLWriteResGroup60], (instregex "MMX_CVTPS2PIirr")>;
				1658	def: InstRW<[SKLWriteResGroup60], (instregex "MMX_CVTTPD2PIirr")>;
				1659	def: InstRW<[SKLWriteResGroup60], (instregex "MMX_CVTTPS2PIirr")>;
				1660	def: InstRW<[SKLWriteResGroup60], (instregex "VCVTPD2DQrr")>;
				1661	def: InstRW<[SKLWriteResGroup60], (instregex "VCVTPD2PSrr")>;
				1662	def: InstRW<[SKLWriteResGroup60], (instregex "VCVTPH2PSrr")>;
				1663	def: InstRW<[SKLWriteResGroup60], (instregex "VCVTPS2PDrr")>;
				1664	def: InstRW<[SKLWriteResGroup60], (instregex "VCVTPS2PHrr")>;
				1665	def: InstRW<[SKLWriteResGroup60], (instregex "VCVTSD2SSrr")>;
Craig Topper	a0be5a0	2017-12-10 19:47:56 +0000	[diff] [blame]	1666	def: InstRW<[SKLWriteResGroup60], (instregex "VCVTSI642SDrr")>;
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	1667	def: InstRW<[SKLWriteResGroup60], (instregex "VCVTSI2SDrr")>;
				1668	def: InstRW<[SKLWriteResGroup60], (instregex "VCVTSI2SSrr")>;
				1669	def: InstRW<[SKLWriteResGroup60], (instregex "VCVTSS2SDrr")>;
				1670	def: InstRW<[SKLWriteResGroup60], (instregex "VCVTTPD2DQrr")>;
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	1671
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	1672	def SKLWriteResGroup61 : SchedWriteRes<[SKLPort1,SKLPort6,SKLPort06]> {
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	1673	let Latency = 5;
				1674	let NumMicroOps = 3;
				1675	let ResourceCycles = [1,1,1];
				1676	}
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	1677	def: InstRW<[SKLWriteResGroup61], (instregex "STR(16\|32\|64)r")>;
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	1678
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	1679	def SKLWriteResGroup62 : SchedWriteRes<[SKLPort1,SKLPort06,SKLPort0156]> {
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	1680	let Latency = 5;
				1681	let NumMicroOps = 3;
				1682	let ResourceCycles = [1,1,1];
				1683	}
Craig Topper	b369cdb	2018-01-25 06:57:42 +0000	[diff] [blame]	1684	def: InstRW<[SKLWriteResGroup62], (instrs IMUL32r)>;
				1685	def: InstRW<[SKLWriteResGroup62], (instrs MUL32r)>;
				1686	def: InstRW<[SKLWriteResGroup62], (instrs MULX32rr)>;
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	1687
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	1688	def SKLWriteResGroup63 : SchedWriteRes<[SKLPort06,SKLPort0156]> {
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	1689	let Latency = 5;
				1690	let NumMicroOps = 5;
				1691	let ResourceCycles = [1,4];
				1692	}
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	1693	def: InstRW<[SKLWriteResGroup63], (instregex "XSETBV")>;
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	1694
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	1695	def SKLWriteResGroup64 : SchedWriteRes<[SKLPort06,SKLPort0156]> {
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	1696	let Latency = 5;
				1697	let NumMicroOps = 5;
				1698	let ResourceCycles = [2,3];
				1699	}
Craig Topper	13a1650	2018-03-19 00:56:09 +0000	[diff] [blame]	1700	def: InstRW<[SKLWriteResGroup64], (instregex "CMPXCHG(8\|16\|32\|64)rr")>;
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	1701
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	1702	def SKLWriteResGroup65 : SchedWriteRes<[SKLPort4,SKLPort237,SKLPort0156]> {
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	1703	let Latency = 5;
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	1704	let NumMicroOps = 6;
				1705	let ResourceCycles = [1,1,4];
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	1706	}
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	1707	def: InstRW<[SKLWriteResGroup65], (instregex "PUSHF16")>;
				1708	def: InstRW<[SKLWriteResGroup65], (instregex "PUSHF64")>;
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	1709
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	1710	def SKLWriteResGroup66 : SchedWriteRes<[SKLPort5]> {
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	1711	let Latency = 6;
				1712	let NumMicroOps = 1;
				1713	let ResourceCycles = [1];
				1714	}
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	1715	def: InstRW<[SKLWriteResGroup66], (instregex "PCLMULQDQrr")>;
				1716	def: InstRW<[SKLWriteResGroup66], (instregex "VPCLMULQDQrr")>;
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	1717
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	1718	def SKLWriteResGroup67 : SchedWriteRes<[SKLPort23]> {
				1719	let Latency = 6;
				1720	let NumMicroOps = 1;
				1721	let ResourceCycles = [1];
				1722	}
				1723	def: InstRW<[SKLWriteResGroup67], (instregex "LDDQUrm")>;
				1724	def: InstRW<[SKLWriteResGroup67], (instregex "MOVAPDrm")>;
				1725	def: InstRW<[SKLWriteResGroup67], (instregex "MOVAPSrm")>;
				1726	def: InstRW<[SKLWriteResGroup67], (instregex "MOVDQArm")>;
				1727	def: InstRW<[SKLWriteResGroup67], (instregex "MOVDQUrm")>;
				1728	def: InstRW<[SKLWriteResGroup67], (instregex "MOVNTDQArm")>;
				1729	def: InstRW<[SKLWriteResGroup67], (instregex "MOVSHDUPrm")>;
				1730	def: InstRW<[SKLWriteResGroup67], (instregex "MOVSLDUPrm")>;
				1731	def: InstRW<[SKLWriteResGroup67], (instregex "MOVUPDrm")>;
				1732	def: InstRW<[SKLWriteResGroup67], (instregex "MOVUPSrm")>;
				1733	def: InstRW<[SKLWriteResGroup67], (instregex "VBROADCASTSSrm")>;
				1734	def: InstRW<[SKLWriteResGroup67], (instregex "VLDDQUrm")>;
				1735	def: InstRW<[SKLWriteResGroup67], (instregex "VMOVAPDrm")>;
				1736	def: InstRW<[SKLWriteResGroup67], (instregex "VMOVAPSrm")>;
				1737	def: InstRW<[SKLWriteResGroup67], (instregex "VMOVDQArm")>;
				1738	def: InstRW<[SKLWriteResGroup67], (instregex "VMOVDQUrm")>;
				1739	def: InstRW<[SKLWriteResGroup67], (instregex "VMOVNTDQArm")>;
				1740	def: InstRW<[SKLWriteResGroup67], (instregex "VMOVSHDUPrm")>;
				1741	def: InstRW<[SKLWriteResGroup67], (instregex "VMOVSLDUPrm")>;
				1742	def: InstRW<[SKLWriteResGroup67], (instregex "VMOVUPDrm")>;
				1743	def: InstRW<[SKLWriteResGroup67], (instregex "VMOVUPSrm")>;
				1744	def: InstRW<[SKLWriteResGroup67], (instregex "VPBROADCASTDrm")>;
				1745	def: InstRW<[SKLWriteResGroup67], (instregex "VPBROADCASTQrm")>;
				1746
				1747	def SKLWriteResGroup68 : SchedWriteRes<[SKLPort0]> {
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	1748	let Latency = 6;
				1749	let NumMicroOps = 2;
				1750	let ResourceCycles = [2];
				1751	}
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	1752	def: InstRW<[SKLWriteResGroup68], (instregex "MMX_CVTPI2PSirr")>;
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	1753
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	1754	def SKLWriteResGroup69 : SchedWriteRes<[SKLPort0,SKLPort23]> {
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	1755	let Latency = 6;
				1756	let NumMicroOps = 2;
				1757	let ResourceCycles = [1,1];
				1758	}
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	1759	def: InstRW<[SKLWriteResGroup69], (instregex "MMX_PADDSBirm")>;
				1760	def: InstRW<[SKLWriteResGroup69], (instregex "MMX_PADDSWirm")>;
				1761	def: InstRW<[SKLWriteResGroup69], (instregex "MMX_PADDUSBirm")>;
				1762	def: InstRW<[SKLWriteResGroup69], (instregex "MMX_PADDUSWirm")>;
				1763	def: InstRW<[SKLWriteResGroup69], (instregex "MMX_PAVGBirm")>;
				1764	def: InstRW<[SKLWriteResGroup69], (instregex "MMX_PAVGWirm")>;
				1765	def: InstRW<[SKLWriteResGroup69], (instregex "MMX_PCMPEQBirm")>;
				1766	def: InstRW<[SKLWriteResGroup69], (instregex "MMX_PCMPEQDirm")>;
				1767	def: InstRW<[SKLWriteResGroup69], (instregex "MMX_PCMPEQWirm")>;
				1768	def: InstRW<[SKLWriteResGroup69], (instregex "MMX_PCMPGTBirm")>;
				1769	def: InstRW<[SKLWriteResGroup69], (instregex "MMX_PCMPGTDirm")>;
				1770	def: InstRW<[SKLWriteResGroup69], (instregex "MMX_PCMPGTWirm")>;
				1771	def: InstRW<[SKLWriteResGroup69], (instregex "MMX_PMAXSWirm")>;
				1772	def: InstRW<[SKLWriteResGroup69], (instregex "MMX_PMAXUBirm")>;
				1773	def: InstRW<[SKLWriteResGroup69], (instregex "MMX_PMINSWirm")>;
				1774	def: InstRW<[SKLWriteResGroup69], (instregex "MMX_PMINUBirm")>;
				1775	def: InstRW<[SKLWriteResGroup69], (instregex "MMX_PSLLDrm")>;
				1776	def: InstRW<[SKLWriteResGroup69], (instregex "MMX_PSLLQrm")>;
				1777	def: InstRW<[SKLWriteResGroup69], (instregex "MMX_PSLLWrm")>;
				1778	def: InstRW<[SKLWriteResGroup69], (instregex "MMX_PSRADrm")>;
				1779	def: InstRW<[SKLWriteResGroup69], (instregex "MMX_PSRAWrm")>;
				1780	def: InstRW<[SKLWriteResGroup69], (instregex "MMX_PSRLDrm")>;
				1781	def: InstRW<[SKLWriteResGroup69], (instregex "MMX_PSRLQrm")>;
				1782	def: InstRW<[SKLWriteResGroup69], (instregex "MMX_PSRLWrm")>;
				1783	def: InstRW<[SKLWriteResGroup69], (instregex "MMX_PSUBSBirm")>;
				1784	def: InstRW<[SKLWriteResGroup69], (instregex "MMX_PSUBSWirm")>;
				1785	def: InstRW<[SKLWriteResGroup69], (instregex "MMX_PSUBUSBirm")>;
				1786	def: InstRW<[SKLWriteResGroup69], (instregex "MMX_PSUBUSWirm")>;
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	1787
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	1788	def SKLWriteResGroup70 : SchedWriteRes<[SKLPort0,SKLPort015]> {
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	1789	let Latency = 6;
				1790	let NumMicroOps = 2;
				1791	let ResourceCycles = [1,1];
				1792	}
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	1793	def: InstRW<[SKLWriteResGroup70], (instregex "CVTSD2SI64rr")>;
				1794	def: InstRW<[SKLWriteResGroup70], (instregex "CVTSD2SIrr")>;
				1795	def: InstRW<[SKLWriteResGroup70], (instregex "CVTSS2SI64rr")>;
				1796	def: InstRW<[SKLWriteResGroup70], (instregex "CVTSS2SIrr")>;
				1797	def: InstRW<[SKLWriteResGroup70], (instregex "CVTTSD2SI64rr")>;
				1798	def: InstRW<[SKLWriteResGroup70], (instregex "CVTTSD2SIrr")>;
				1799	def: InstRW<[SKLWriteResGroup70], (instregex "VCVTSD2SI64rr")>;
				1800	def: InstRW<[SKLWriteResGroup70], (instregex "VCVTSD2SIrr")>;
				1801	def: InstRW<[SKLWriteResGroup70], (instregex "VCVTSS2SI64rr")>;
				1802	def: InstRW<[SKLWriteResGroup70], (instregex "VCVTSS2SIrr")>;
				1803	def: InstRW<[SKLWriteResGroup70], (instregex "VCVTTSD2SI64rr")>;
				1804	def: InstRW<[SKLWriteResGroup70], (instregex "VCVTTSD2SIrr")>;
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	1805
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	1806	def SKLWriteResGroup71 : SchedWriteRes<[SKLPort5,SKLPort23]> {
				1807	let Latency = 6;
				1808	let NumMicroOps = 2;
				1809	let ResourceCycles = [1,1];
				1810	}
Craig Topper	dbddac0	2018-01-25 04:45:30 +0000	[diff] [blame]	1811	def: InstRW<[SKLWriteResGroup71], (instregex "MMX_PALIGNRrmi")>;
Craig Topper	b85b484	2018-01-24 17:58:51 +0000	[diff] [blame]	1812	def: InstRW<[SKLWriteResGroup71], (instregex "MMX_PINSRWrm")>;
Craig Topper	dbddac0	2018-01-25 04:45:30 +0000	[diff] [blame]	1813	def: InstRW<[SKLWriteResGroup71], (instregex "MMX_PSHUFBrm")>;
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	1814	def: InstRW<[SKLWriteResGroup71], (instregex "MMX_PSHUFWmi")>;
				1815	def: InstRW<[SKLWriteResGroup71], (instregex "MMX_PUNPCKHBWirm")>;
				1816	def: InstRW<[SKLWriteResGroup71], (instregex "MMX_PUNPCKHDQirm")>;
				1817	def: InstRW<[SKLWriteResGroup71], (instregex "MMX_PUNPCKHWDirm")>;
				1818	def: InstRW<[SKLWriteResGroup71], (instregex "MMX_PUNPCKLBWirm")>;
				1819	def: InstRW<[SKLWriteResGroup71], (instregex "MMX_PUNPCKLDQirm")>;
				1820	def: InstRW<[SKLWriteResGroup71], (instregex "MMX_PUNPCKLWDirm")>;
				1821	def: InstRW<[SKLWriteResGroup71], (instregex "MOVHPDrm")>;
				1822	def: InstRW<[SKLWriteResGroup71], (instregex "MOVHPSrm")>;
				1823	def: InstRW<[SKLWriteResGroup71], (instregex "MOVLPDrm")>;
				1824	def: InstRW<[SKLWriteResGroup71], (instregex "MOVLPSrm")>;
				1825	def: InstRW<[SKLWriteResGroup71], (instregex "PINSRBrm")>;
				1826	def: InstRW<[SKLWriteResGroup71], (instregex "PINSRDrm")>;
				1827	def: InstRW<[SKLWriteResGroup71], (instregex "PINSRQrm")>;
Craig Topper	b85b484	2018-01-24 17:58:51 +0000	[diff] [blame]	1828	def: InstRW<[SKLWriteResGroup71], (instregex "PINSRWrm")>;
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	1829	def: InstRW<[SKLWriteResGroup71], (instregex "PMOVSXBDrm")>;
				1830	def: InstRW<[SKLWriteResGroup71], (instregex "PMOVSXBQrm")>;
				1831	def: InstRW<[SKLWriteResGroup71], (instregex "PMOVSXBWrm")>;
				1832	def: InstRW<[SKLWriteResGroup71], (instregex "PMOVSXDQrm")>;
				1833	def: InstRW<[SKLWriteResGroup71], (instregex "PMOVSXWDrm")>;
				1834	def: InstRW<[SKLWriteResGroup71], (instregex "PMOVSXWQrm")>;
				1835	def: InstRW<[SKLWriteResGroup71], (instregex "PMOVZXBDrm")>;
				1836	def: InstRW<[SKLWriteResGroup71], (instregex "PMOVZXBQrm")>;
				1837	def: InstRW<[SKLWriteResGroup71], (instregex "PMOVZXBWrm")>;
				1838	def: InstRW<[SKLWriteResGroup71], (instregex "PMOVZXDQrm")>;
				1839	def: InstRW<[SKLWriteResGroup71], (instregex "PMOVZXWDrm")>;
				1840	def: InstRW<[SKLWriteResGroup71], (instregex "PMOVZXWQrm")>;
				1841	def: InstRW<[SKLWriteResGroup71], (instregex "VMOVHPDrm")>;
				1842	def: InstRW<[SKLWriteResGroup71], (instregex "VMOVHPSrm")>;
				1843	def: InstRW<[SKLWriteResGroup71], (instregex "VMOVLPDrm")>;
				1844	def: InstRW<[SKLWriteResGroup71], (instregex "VMOVLPSrm")>;
				1845	def: InstRW<[SKLWriteResGroup71], (instregex "VPINSRBrm")>;
				1846	def: InstRW<[SKLWriteResGroup71], (instregex "VPINSRDrm")>;
				1847	def: InstRW<[SKLWriteResGroup71], (instregex "VPINSRQrm")>;
Craig Topper	b85b484	2018-01-24 17:58:51 +0000	[diff] [blame]	1848	def: InstRW<[SKLWriteResGroup71], (instregex "VPINSRWrm")>;
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	1849	def: InstRW<[SKLWriteResGroup71], (instregex "VPMOVSXBDrm")>;
				1850	def: InstRW<[SKLWriteResGroup71], (instregex "VPMOVSXBQrm")>;
				1851	def: InstRW<[SKLWriteResGroup71], (instregex "VPMOVSXBWrm")>;
				1852	def: InstRW<[SKLWriteResGroup71], (instregex "VPMOVSXDQrm")>;
				1853	def: InstRW<[SKLWriteResGroup71], (instregex "VPMOVSXWDrm")>;
				1854	def: InstRW<[SKLWriteResGroup71], (instregex "VPMOVSXWQrm")>;
				1855	def: InstRW<[SKLWriteResGroup71], (instregex "VPMOVZXBDrm")>;
				1856	def: InstRW<[SKLWriteResGroup71], (instregex "VPMOVZXBQrm")>;
				1857	def: InstRW<[SKLWriteResGroup71], (instregex "VPMOVZXBWrm")>;
				1858	def: InstRW<[SKLWriteResGroup71], (instregex "VPMOVZXDQrm")>;
				1859	def: InstRW<[SKLWriteResGroup71], (instregex "VPMOVZXWDrm")>;
				1860	def: InstRW<[SKLWriteResGroup71], (instregex "VPMOVZXWQrm")>;
				1861
				1862	def SKLWriteResGroup72 : SchedWriteRes<[SKLPort6,SKLPort23]> {
				1863	let Latency = 6;
				1864	let NumMicroOps = 2;
				1865	let ResourceCycles = [1,1];
				1866	}
				1867	def: InstRW<[SKLWriteResGroup72], (instregex "FARJMP64")>;
				1868	def: InstRW<[SKLWriteResGroup72], (instregex "JMP(16\|32\|64)m")>;
				1869
				1870	def SKLWriteResGroup73 : SchedWriteRes<[SKLPort23,SKLPort05]> {
				1871	let Latency = 6;
				1872	let NumMicroOps = 2;
				1873	let ResourceCycles = [1,1];
				1874	}
Craig Topper	dbddac0	2018-01-25 04:45:30 +0000	[diff] [blame]	1875	def: InstRW<[SKLWriteResGroup73], (instregex "MMX_PABSBrm")>;
				1876	def: InstRW<[SKLWriteResGroup73], (instregex "MMX_PABSDrm")>;
				1877	def: InstRW<[SKLWriteResGroup73], (instregex "MMX_PABSWrm")>;
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	1878	def: InstRW<[SKLWriteResGroup73], (instregex "MMX_PADDBirm")>;
				1879	def: InstRW<[SKLWriteResGroup73], (instregex "MMX_PADDDirm")>;
				1880	def: InstRW<[SKLWriteResGroup73], (instregex "MMX_PADDQirm")>;
				1881	def: InstRW<[SKLWriteResGroup73], (instregex "MMX_PADDWirm")>;
				1882	def: InstRW<[SKLWriteResGroup73], (instregex "MMX_PANDNirm")>;
				1883	def: InstRW<[SKLWriteResGroup73], (instregex "MMX_PANDirm")>;
				1884	def: InstRW<[SKLWriteResGroup73], (instregex "MMX_PORirm")>;
Craig Topper	dbddac0	2018-01-25 04:45:30 +0000	[diff] [blame]	1885	def: InstRW<[SKLWriteResGroup73], (instregex "MMX_PSIGNBrm")>;
				1886	def: InstRW<[SKLWriteResGroup73], (instregex "MMX_PSIGNDrm")>;
				1887	def: InstRW<[SKLWriteResGroup73], (instregex "MMX_PSIGNWrm")>;
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	1888	def: InstRW<[SKLWriteResGroup73], (instregex "MMX_PSUBBirm")>;
				1889	def: InstRW<[SKLWriteResGroup73], (instregex "MMX_PSUBDirm")>;
				1890	def: InstRW<[SKLWriteResGroup73], (instregex "MMX_PSUBQirm")>;
				1891	def: InstRW<[SKLWriteResGroup73], (instregex "MMX_PSUBWirm")>;
				1892	def: InstRW<[SKLWriteResGroup73], (instregex "MMX_PXORirm")>;
				1893
				1894	def SKLWriteResGroup74 : SchedWriteRes<[SKLPort23,SKLPort06]> {
				1895	let Latency = 6;
				1896	let NumMicroOps = 2;
				1897	let ResourceCycles = [1,1];
				1898	}
Craig Topper	13a1650	2018-03-19 00:56:09 +0000	[diff] [blame]	1899	def: InstRW<[SKLWriteResGroup74], (instregex "ADC(8\|16\|32\|64)rm")>;
Craig Topper	a42a2ba	2017-12-16 18:35:31 +0000	[diff] [blame]	1900	def: InstRW<[SKLWriteResGroup74], (instregex "ADCX(32\|64)rm")>;
				1901	def: InstRW<[SKLWriteResGroup74], (instregex "ADOX(32\|64)rm")>;
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	1902	def: InstRW<[SKLWriteResGroup74], (instregex "BT(16\|32\|64)mi8")>;
Craig Topper	f4cd908	2018-01-19 05:47:32 +0000	[diff] [blame]	1903	def: InstRW<[SKLWriteResGroup74], (instregex "CMOV(AE\|B\|E\|G\|GE\|L\|LE\|NE\|NO\|NP\|NS\|O\|P\|S)(16\|32\|64)rm")>;
Craig Topper	9b60dcb	2018-03-19 00:56:11 +0000	[diff] [blame]	1904	def: InstRW<[SKLWriteResGroup74], (instregex "RORX(32\|64)mi")>;
				1905	def: InstRW<[SKLWriteResGroup74], (instregex "SARX(32\|64)rm")>;
Craig Topper	13a1650	2018-03-19 00:56:09 +0000	[diff] [blame]	1906	def: InstRW<[SKLWriteResGroup74], (instregex "SBB(8\|16\|32\|64)rm")>;
Craig Topper	9b60dcb	2018-03-19 00:56:11 +0000	[diff] [blame]	1907	def: InstRW<[SKLWriteResGroup74], (instregex "SHLX(32\|64)rm")>;
				1908	def: InstRW<[SKLWriteResGroup74], (instregex "SHRX(32\|64)rm")>;
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	1909
				1910	def SKLWriteResGroup75 : SchedWriteRes<[SKLPort23,SKLPort15]> {
				1911	let Latency = 6;
				1912	let NumMicroOps = 2;
				1913	let ResourceCycles = [1,1];
				1914	}
Craig Topper	a42a2ba	2017-12-16 18:35:31 +0000	[diff] [blame]	1915	def: InstRW<[SKLWriteResGroup75], (instregex "ANDN(32\|64)rm")>;
				1916	def: InstRW<[SKLWriteResGroup75], (instregex "BLSI(32\|64)rm")>;
				1917	def: InstRW<[SKLWriteResGroup75], (instregex "BLSMSK(32\|64)rm")>;
				1918	def: InstRW<[SKLWriteResGroup75], (instregex "BLSR(32\|64)rm")>;
				1919	def: InstRW<[SKLWriteResGroup75], (instregex "BZHI(32\|64)rm")>;
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	1920	def: InstRW<[SKLWriteResGroup75], (instregex "MOVBE(16\|32\|64)rm")>;
				1921
				1922	def SKLWriteResGroup76 : SchedWriteRes<[SKLPort23,SKLPort0156]> {
				1923	let Latency = 6;
				1924	let NumMicroOps = 2;
				1925	let ResourceCycles = [1,1];
				1926	}
Craig Topper	13a1650	2018-03-19 00:56:09 +0000	[diff] [blame]	1927	def: InstRW<[SKLWriteResGroup76], (instregex "ADD(8\|16\|32\|64)rm")>;
				1928	def: InstRW<[SKLWriteResGroup76], (instregex "AND(8\|16\|32\|64)rm")>;
				1929	def: InstRW<[SKLWriteResGroup76], (instregex "CMP(8\|16\|32\|64)mi")>;
				1930	def: InstRW<[SKLWriteResGroup76], (instregex "CMP(8\|16\|32\|64)mr")>;
				1931	def: InstRW<[SKLWriteResGroup76], (instregex "CMP(8\|16\|32\|64)rm")>;
				1932	def: InstRW<[SKLWriteResGroup76], (instregex "OR(8\|16\|32\|64)rm")>;
Craig Topper	2d451e7	2018-03-18 08:38:06 +0000	[diff] [blame]	1933	def: InstRW<[SKLWriteResGroup76], (instrs POP16r, POP32r, POP64r)>;
				1934	def: InstRW<[SKLWriteResGroup76], (instregex "POP(16\|32\|64)rmr")>;
Craig Topper	13a1650	2018-03-19 00:56:09 +0000	[diff] [blame]	1935	def: InstRW<[SKLWriteResGroup76], (instregex "SUB(8\|16\|32\|64)rm")>;
				1936	def: InstRW<[SKLWriteResGroup76], (instregex "TEST(8\|16\|32\|64)mr")>;
Craig Topper	3e94626	2018-03-20 03:02:03 +0000	[diff] [blame]	1937	def: InstRW<[SKLWriteResGroup76], (instregex "TEST(8\|16\|32\|64)mi")>;
Craig Topper	13a1650	2018-03-19 00:56:09 +0000	[diff] [blame]	1938	def: InstRW<[SKLWriteResGroup76], (instregex "XOR(8\|16\|32\|64)rm")>;
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	1939
				1940	def SKLWriteResGroup77 : SchedWriteRes<[SKLPort5,SKLPort01]> {
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	1941	let Latency = 6;
				1942	let NumMicroOps = 3;
				1943	let ResourceCycles = [2,1];
				1944	}
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	1945	def: InstRW<[SKLWriteResGroup77], (instregex "HADDPDrr")>;
				1946	def: InstRW<[SKLWriteResGroup77], (instregex "HADDPSrr")>;
				1947	def: InstRW<[SKLWriteResGroup77], (instregex "HSUBPDrr")>;
				1948	def: InstRW<[SKLWriteResGroup77], (instregex "HSUBPSrr")>;
				1949	def: InstRW<[SKLWriteResGroup77], (instregex "VHADDPDYrr")>;
				1950	def: InstRW<[SKLWriteResGroup77], (instregex "VHADDPDrr")>;
				1951	def: InstRW<[SKLWriteResGroup77], (instregex "VHADDPSYrr")>;
				1952	def: InstRW<[SKLWriteResGroup77], (instregex "VHADDPSrr")>;
				1953	def: InstRW<[SKLWriteResGroup77], (instregex "VHSUBPDYrr")>;
				1954	def: InstRW<[SKLWriteResGroup77], (instregex "VHSUBPDrr")>;
				1955	def: InstRW<[SKLWriteResGroup77], (instregex "VHSUBPSYrr")>;
				1956	def: InstRW<[SKLWriteResGroup77], (instregex "VHSUBPSrr")>;
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	1957
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	1958	def SKLWriteResGroup78 : SchedWriteRes<[SKLPort5,SKLPort015]> {
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	1959	let Latency = 6;
				1960	let NumMicroOps = 3;
				1961	let ResourceCycles = [2,1];
				1962	}
Craig Topper	a0be5a0	2017-12-10 19:47:56 +0000	[diff] [blame]	1963	def: InstRW<[SKLWriteResGroup78], (instregex "CVTSI642SSrr")>;
				1964	def: InstRW<[SKLWriteResGroup78], (instregex "VCVTSI642SSrr")>;
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	1965
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	1966	def SKLWriteResGroup79 : SchedWriteRes<[SKLPort1,SKLPort06,SKLPort0156]> {
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	1967	let Latency = 6;
				1968	let NumMicroOps = 4;
				1969	let ResourceCycles = [1,2,1];
				1970	}
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	1971	def: InstRW<[SKLWriteResGroup79], (instregex "SHLD(16\|32\|64)rrCL")>;
				1972	def: InstRW<[SKLWriteResGroup79], (instregex "SHRD(16\|32\|64)rrCL")>;
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	1973
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	1974	def SKLWriteResGroup80 : SchedWriteRes<[SKLPort1,SKLPort6,SKLPort06,SKLPort0156]> {
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	1975	let Latency = 6;
				1976	let NumMicroOps = 4;
				1977	let ResourceCycles = [1,1,1,1];
				1978	}
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	1979	def: InstRW<[SKLWriteResGroup80], (instregex "SLDT(16\|32\|64)r")>;
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	1980
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	1981	def SKLWriteResGroup81 : SchedWriteRes<[SKLPort4,SKLPort5,SKLPort237,SKLPort015]> {
				1982	let Latency = 6;
				1983	let NumMicroOps = 4;
				1984	let ResourceCycles = [1,1,1,1];
				1985	}
				1986	def: InstRW<[SKLWriteResGroup81], (instregex "VCVTPS2PHmr")>;
				1987
				1988	def SKLWriteResGroup82 : SchedWriteRes<[SKLPort4,SKLPort23,SKLPort237,SKLPort06]> {
				1989	let Latency = 6;
				1990	let NumMicroOps = 4;
				1991	let ResourceCycles = [1,1,1,1];
				1992	}
				1993	def: InstRW<[SKLWriteResGroup82], (instregex "BTC(16\|32\|64)mi8")>;
				1994	def: InstRW<[SKLWriteResGroup82], (instregex "BTR(16\|32\|64)mi8")>;
				1995	def: InstRW<[SKLWriteResGroup82], (instregex "BTS(16\|32\|64)mi8")>;
Craig Topper	13a1650	2018-03-19 00:56:09 +0000	[diff] [blame]	1996	def: InstRW<[SKLWriteResGroup82], (instregex "SAR(8\|16\|32\|64)m1")>;
				1997	def: InstRW<[SKLWriteResGroup82], (instregex "SAR(8\|16\|32\|64)mi")>;
				1998	def: InstRW<[SKLWriteResGroup82], (instregex "SHL(8\|16\|32\|64)m1")>;
				1999	def: InstRW<[SKLWriteResGroup82], (instregex "SHL(8\|16\|32\|64)mi")>;
				2000	def: InstRW<[SKLWriteResGroup82], (instregex "SHR(8\|16\|32\|64)m1")>;
				2001	def: InstRW<[SKLWriteResGroup82], (instregex "SHR(8\|16\|32\|64)mi")>;
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	2002
				2003	def SKLWriteResGroup83 : SchedWriteRes<[SKLPort4,SKLPort23,SKLPort237,SKLPort0156]> {
				2004	let Latency = 6;
				2005	let NumMicroOps = 4;
				2006	let ResourceCycles = [1,1,1,1];
				2007	}
Craig Topper	13a1650	2018-03-19 00:56:09 +0000	[diff] [blame]	2008	def: InstRW<[SKLWriteResGroup83], (instregex "ADD(8\|16\|32\|64)mi")>;
				2009	def: InstRW<[SKLWriteResGroup83], (instregex "ADD(8\|16\|32\|64)mr")>;
				2010	def: InstRW<[SKLWriteResGroup83], (instregex "AND(8\|16\|32\|64)mi")>;
				2011	def: InstRW<[SKLWriteResGroup83], (instregex "AND(8\|16\|32\|64)mr")>;
				2012	def: InstRW<[SKLWriteResGroup83], (instregex "DEC(8\|16\|32\|64)m")>;
				2013	def: InstRW<[SKLWriteResGroup83], (instregex "INC(8\|16\|32\|64)m")>;
				2014	def: InstRW<[SKLWriteResGroup83], (instregex "NEG(8\|16\|32\|64)m")>;
				2015	def: InstRW<[SKLWriteResGroup83], (instregex "NOT(8\|16\|32\|64)m")>;
				2016	def: InstRW<[SKLWriteResGroup83], (instregex "OR(8\|16\|32\|64)mi")>;
				2017	def: InstRW<[SKLWriteResGroup83], (instregex "OR(8\|16\|32\|64)mr")>;
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	2018	def: InstRW<[SKLWriteResGroup83], (instregex "POP(16\|32\|64)rmm")>;
				2019	def: InstRW<[SKLWriteResGroup83], (instregex "PUSH(16\|32\|64)rmm")>;
Craig Topper	13a1650	2018-03-19 00:56:09 +0000	[diff] [blame]	2020	def: InstRW<[SKLWriteResGroup83], (instregex "SUB(8\|16\|32\|64)mi")>;
				2021	def: InstRW<[SKLWriteResGroup83], (instregex "SUB(8\|16\|32\|64)mr")>;
				2022	def: InstRW<[SKLWriteResGroup83], (instregex "XOR(8\|16\|32\|64)mi")>;
				2023	def: InstRW<[SKLWriteResGroup83], (instregex "XOR(8\|16\|32\|64)mr")>;
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	2024
				2025	def SKLWriteResGroup84 : SchedWriteRes<[SKLPort6,SKLPort0156]> {
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	2026	let Latency = 6;
				2027	let NumMicroOps = 6;
				2028	let ResourceCycles = [1,5];
				2029	}
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	2030	def: InstRW<[SKLWriteResGroup84], (instregex "STD")>;
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	2031
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	2032	def SKLWriteResGroup85 : SchedWriteRes<[SKLPort23]> {
				2033	let Latency = 7;
				2034	let NumMicroOps = 1;
				2035	let ResourceCycles = [1];
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	2036	}
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	2037	def: InstRW<[SKLWriteResGroup85], (instregex "LD_F32m")>;
				2038	def: InstRW<[SKLWriteResGroup85], (instregex "LD_F64m")>;
				2039	def: InstRW<[SKLWriteResGroup85], (instregex "LD_F80m")>;
				2040	def: InstRW<[SKLWriteResGroup85], (instregex "VBROADCASTF128")>;
				2041	def: InstRW<[SKLWriteResGroup85], (instregex "VBROADCASTI128")>;
				2042	def: InstRW<[SKLWriteResGroup85], (instregex "VBROADCASTSDYrm")>;
				2043	def: InstRW<[SKLWriteResGroup85], (instregex "VBROADCASTSSYrm")>;
				2044	def: InstRW<[SKLWriteResGroup85], (instregex "VLDDQUYrm")>;
				2045	def: InstRW<[SKLWriteResGroup85], (instregex "VMOVAPDYrm")>;
				2046	def: InstRW<[SKLWriteResGroup85], (instregex "VMOVAPSYrm")>;
				2047	def: InstRW<[SKLWriteResGroup85], (instregex "VMOVDDUPYrm")>;
				2048	def: InstRW<[SKLWriteResGroup85], (instregex "VMOVDQAYrm")>;
				2049	def: InstRW<[SKLWriteResGroup85], (instregex "VMOVDQUYrm")>;
				2050	def: InstRW<[SKLWriteResGroup85], (instregex "VMOVNTDQAYrm")>;
				2051	def: InstRW<[SKLWriteResGroup85], (instregex "VMOVSHDUPYrm")>;
				2052	def: InstRW<[SKLWriteResGroup85], (instregex "VMOVSLDUPYrm")>;
				2053	def: InstRW<[SKLWriteResGroup85], (instregex "VMOVUPDYrm")>;
				2054	def: InstRW<[SKLWriteResGroup85], (instregex "VMOVUPSYrm")>;
				2055	def: InstRW<[SKLWriteResGroup85], (instregex "VPBROADCASTDYrm")>;
				2056	def: InstRW<[SKLWriteResGroup85], (instregex "VPBROADCASTQYrm")>;
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	2057
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	2058	def SKLWriteResGroup86 : SchedWriteRes<[SKLPort0,SKLPort5]> {
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	2059	let Latency = 7;
				2060	let NumMicroOps = 2;
				2061	let ResourceCycles = [1,1];
				2062	}
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	2063	def: InstRW<[SKLWriteResGroup86], (instregex "VCVTDQ2PDYrr")>;
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	2064
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	2065	def SKLWriteResGroup87 : SchedWriteRes<[SKLPort0,SKLPort23]> {
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	2066	let Latency = 7;
				2067	let NumMicroOps = 2;
				2068	let ResourceCycles = [1,1];
				2069	}
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	2070	def: InstRW<[SKLWriteResGroup87], (instregex "COMISDrm")>;
				2071	def: InstRW<[SKLWriteResGroup87], (instregex "COMISSrm")>;
				2072	def: InstRW<[SKLWriteResGroup87], (instregex "UCOMISDrm")>;
				2073	def: InstRW<[SKLWriteResGroup87], (instregex "UCOMISSrm")>;
				2074	def: InstRW<[SKLWriteResGroup87], (instregex "VCOMISDrm")>;
				2075	def: InstRW<[SKLWriteResGroup87], (instregex "VCOMISSrm")>;
				2076	def: InstRW<[SKLWriteResGroup87], (instregex "VUCOMISDrm")>;
				2077	def: InstRW<[SKLWriteResGroup87], (instregex "VUCOMISSrm")>;
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	2078
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	2079	def SKLWriteResGroup88 : SchedWriteRes<[SKLPort5,SKLPort23]> {
				2080	let Latency = 7;
				2081	let NumMicroOps = 2;
				2082	let ResourceCycles = [1,1];
				2083	}
				2084	def: InstRW<[SKLWriteResGroup88], (instregex "INSERTPSrm")>;
				2085	def: InstRW<[SKLWriteResGroup88], (instregex "PACKSSDWrm")>;
				2086	def: InstRW<[SKLWriteResGroup88], (instregex "PACKSSWBrm")>;
				2087	def: InstRW<[SKLWriteResGroup88], (instregex "PACKUSDWrm")>;
				2088	def: InstRW<[SKLWriteResGroup88], (instregex "PACKUSWBrm")>;
				2089	def: InstRW<[SKLWriteResGroup88], (instregex "PALIGNRrmi")>;
				2090	def: InstRW<[SKLWriteResGroup88], (instregex "PBLENDWrmi")>;
				2091	def: InstRW<[SKLWriteResGroup88], (instregex "PSHUFBrm")>;
				2092	def: InstRW<[SKLWriteResGroup88], (instregex "PSHUFDmi")>;
				2093	def: InstRW<[SKLWriteResGroup88], (instregex "PSHUFHWmi")>;
				2094	def: InstRW<[SKLWriteResGroup88], (instregex "PSHUFLWmi")>;
				2095	def: InstRW<[SKLWriteResGroup88], (instregex "PUNPCKHBWrm")>;
				2096	def: InstRW<[SKLWriteResGroup88], (instregex "PUNPCKHDQrm")>;
				2097	def: InstRW<[SKLWriteResGroup88], (instregex "PUNPCKHQDQrm")>;
				2098	def: InstRW<[SKLWriteResGroup88], (instregex "PUNPCKHWDrm")>;
				2099	def: InstRW<[SKLWriteResGroup88], (instregex "PUNPCKLBWrm")>;
				2100	def: InstRW<[SKLWriteResGroup88], (instregex "PUNPCKLDQrm")>;
				2101	def: InstRW<[SKLWriteResGroup88], (instregex "PUNPCKLQDQrm")>;
				2102	def: InstRW<[SKLWriteResGroup88], (instregex "PUNPCKLWDrm")>;
				2103	def: InstRW<[SKLWriteResGroup88], (instregex "SHUFPDrmi")>;
				2104	def: InstRW<[SKLWriteResGroup88], (instregex "SHUFPSrmi")>;
				2105	def: InstRW<[SKLWriteResGroup88], (instregex "UNPCKHPDrm")>;
				2106	def: InstRW<[SKLWriteResGroup88], (instregex "UNPCKHPSrm")>;
				2107	def: InstRW<[SKLWriteResGroup88], (instregex "UNPCKLPDrm")>;
				2108	def: InstRW<[SKLWriteResGroup88], (instregex "UNPCKLPSrm")>;
				2109	def: InstRW<[SKLWriteResGroup88], (instregex "VINSERTPSrm")>;
				2110	def: InstRW<[SKLWriteResGroup88], (instregex "VPACKSSDWrm")>;
				2111	def: InstRW<[SKLWriteResGroup88], (instregex "VPACKSSWBrm")>;
				2112	def: InstRW<[SKLWriteResGroup88], (instregex "VPACKUSDWrm")>;
				2113	def: InstRW<[SKLWriteResGroup88], (instregex "VPACKUSWBrm")>;
				2114	def: InstRW<[SKLWriteResGroup88], (instregex "VPALIGNRrmi")>;
				2115	def: InstRW<[SKLWriteResGroup88], (instregex "VPBLENDWrmi")>;
				2116	def: InstRW<[SKLWriteResGroup88], (instregex "VPBROADCASTBrm")>;
				2117	def: InstRW<[SKLWriteResGroup88], (instregex "VPBROADCASTWrm")>;
				2118	def: InstRW<[SKLWriteResGroup88], (instregex "VPERMILPDmi")>;
				2119	def: InstRW<[SKLWriteResGroup88], (instregex "VPERMILPDrm")>;
				2120	def: InstRW<[SKLWriteResGroup88], (instregex "VPERMILPSmi")>;
				2121	def: InstRW<[SKLWriteResGroup88], (instregex "VPERMILPSrm")>;
				2122	def: InstRW<[SKLWriteResGroup88], (instregex "VPSHUFBrm")>;
				2123	def: InstRW<[SKLWriteResGroup88], (instregex "VPSHUFDmi")>;
				2124	def: InstRW<[SKLWriteResGroup88], (instregex "VPSHUFHWmi")>;
				2125	def: InstRW<[SKLWriteResGroup88], (instregex "VPSHUFLWmi")>;
				2126	def: InstRW<[SKLWriteResGroup88], (instregex "VPUNPCKHBWrm")>;
				2127	def: InstRW<[SKLWriteResGroup88], (instregex "VPUNPCKHDQrm")>;
				2128	def: InstRW<[SKLWriteResGroup88], (instregex "VPUNPCKHQDQrm")>;
				2129	def: InstRW<[SKLWriteResGroup88], (instregex "VPUNPCKHWDrm")>;
				2130	def: InstRW<[SKLWriteResGroup88], (instregex "VPUNPCKLBWrm")>;
				2131	def: InstRW<[SKLWriteResGroup88], (instregex "VPUNPCKLDQrm")>;
				2132	def: InstRW<[SKLWriteResGroup88], (instregex "VPUNPCKLQDQrm")>;
				2133	def: InstRW<[SKLWriteResGroup88], (instregex "VPUNPCKLWDrm")>;
				2134	def: InstRW<[SKLWriteResGroup88], (instregex "VSHUFPDrmi")>;
				2135	def: InstRW<[SKLWriteResGroup88], (instregex "VSHUFPSrmi")>;
				2136	def: InstRW<[SKLWriteResGroup88], (instregex "VUNPCKHPDrm")>;
				2137	def: InstRW<[SKLWriteResGroup88], (instregex "VUNPCKHPSrm")>;
				2138	def: InstRW<[SKLWriteResGroup88], (instregex "VUNPCKLPDrm")>;
				2139	def: InstRW<[SKLWriteResGroup88], (instregex "VUNPCKLPSrm")>;
				2140
				2141	def SKLWriteResGroup89 : SchedWriteRes<[SKLPort5,SKLPort015]> {
				2142	let Latency = 7;
				2143	let NumMicroOps = 2;
				2144	let ResourceCycles = [1,1];
				2145	}
				2146	def: InstRW<[SKLWriteResGroup89], (instregex "VCVTPD2DQYrr")>;
				2147	def: InstRW<[SKLWriteResGroup89], (instregex "VCVTPD2PSYrr")>;
				2148	def: InstRW<[SKLWriteResGroup89], (instregex "VCVTPH2PSYrr")>;
				2149	def: InstRW<[SKLWriteResGroup89], (instregex "VCVTPS2PDYrr")>;
				2150	def: InstRW<[SKLWriteResGroup89], (instregex "VCVTPS2PHYrr")>;
				2151	def: InstRW<[SKLWriteResGroup89], (instregex "VCVTTPD2DQYrr")>;
				2152
				2153	def SKLWriteResGroup90 : SchedWriteRes<[SKLPort01,SKLPort23]> {
				2154	let Latency = 7;
				2155	let NumMicroOps = 2;
				2156	let ResourceCycles = [1,1];
				2157	}
				2158	def: InstRW<[SKLWriteResGroup90], (instregex "PABSBrm")>;
				2159	def: InstRW<[SKLWriteResGroup90], (instregex "PABSDrm")>;
				2160	def: InstRW<[SKLWriteResGroup90], (instregex "PABSWrm")>;
				2161	def: InstRW<[SKLWriteResGroup90], (instregex "PADDSBrm")>;
				2162	def: InstRW<[SKLWriteResGroup90], (instregex "PADDSWrm")>;
				2163	def: InstRW<[SKLWriteResGroup90], (instregex "PADDUSBrm")>;
				2164	def: InstRW<[SKLWriteResGroup90], (instregex "PADDUSWrm")>;
				2165	def: InstRW<[SKLWriteResGroup90], (instregex "PAVGBrm")>;
				2166	def: InstRW<[SKLWriteResGroup90], (instregex "PAVGWrm")>;
				2167	def: InstRW<[SKLWriteResGroup90], (instregex "PCMPEQBrm")>;
				2168	def: InstRW<[SKLWriteResGroup90], (instregex "PCMPEQDrm")>;
				2169	def: InstRW<[SKLWriteResGroup90], (instregex "PCMPEQQrm")>;
				2170	def: InstRW<[SKLWriteResGroup90], (instregex "PCMPEQWrm")>;
				2171	def: InstRW<[SKLWriteResGroup90], (instregex "PCMPGTBrm")>;
				2172	def: InstRW<[SKLWriteResGroup90], (instregex "PCMPGTDrm")>;
				2173	def: InstRW<[SKLWriteResGroup90], (instregex "PCMPGTWrm")>;
				2174	def: InstRW<[SKLWriteResGroup90], (instregex "PMAXSBrm")>;
				2175	def: InstRW<[SKLWriteResGroup90], (instregex "PMAXSDrm")>;
				2176	def: InstRW<[SKLWriteResGroup90], (instregex "PMAXSWrm")>;
				2177	def: InstRW<[SKLWriteResGroup90], (instregex "PMAXUBrm")>;
				2178	def: InstRW<[SKLWriteResGroup90], (instregex "PMAXUDrm")>;
				2179	def: InstRW<[SKLWriteResGroup90], (instregex "PMAXUWrm")>;
				2180	def: InstRW<[SKLWriteResGroup90], (instregex "PMINSBrm")>;
				2181	def: InstRW<[SKLWriteResGroup90], (instregex "PMINSDrm")>;
				2182	def: InstRW<[SKLWriteResGroup90], (instregex "PMINSWrm")>;
				2183	def: InstRW<[SKLWriteResGroup90], (instregex "PMINUBrm")>;
				2184	def: InstRW<[SKLWriteResGroup90], (instregex "PMINUDrm")>;
				2185	def: InstRW<[SKLWriteResGroup90], (instregex "PMINUWrm")>;
Craig Topper	dbddac0	2018-01-25 04:45:30 +0000	[diff] [blame]	2186	def: InstRW<[SKLWriteResGroup90], (instregex "PSIGNBrm")>;
				2187	def: InstRW<[SKLWriteResGroup90], (instregex "PSIGNDrm")>;
				2188	def: InstRW<[SKLWriteResGroup90], (instregex "PSIGNWrm")>;
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	2189	def: InstRW<[SKLWriteResGroup90], (instregex "PSLLDrm")>;
				2190	def: InstRW<[SKLWriteResGroup90], (instregex "PSLLQrm")>;
				2191	def: InstRW<[SKLWriteResGroup90], (instregex "PSLLWrm")>;
				2192	def: InstRW<[SKLWriteResGroup90], (instregex "PSRADrm")>;
				2193	def: InstRW<[SKLWriteResGroup90], (instregex "PSRAWrm")>;
				2194	def: InstRW<[SKLWriteResGroup90], (instregex "PSRLDrm")>;
				2195	def: InstRW<[SKLWriteResGroup90], (instregex "PSRLQrm")>;
				2196	def: InstRW<[SKLWriteResGroup90], (instregex "PSRLWrm")>;
				2197	def: InstRW<[SKLWriteResGroup90], (instregex "PSUBSBrm")>;
				2198	def: InstRW<[SKLWriteResGroup90], (instregex "PSUBSWrm")>;
				2199	def: InstRW<[SKLWriteResGroup90], (instregex "PSUBUSBrm")>;
				2200	def: InstRW<[SKLWriteResGroup90], (instregex "PSUBUSWrm")>;
				2201	def: InstRW<[SKLWriteResGroup90], (instregex "VPABSBrm")>;
				2202	def: InstRW<[SKLWriteResGroup90], (instregex "VPABSDrm")>;
				2203	def: InstRW<[SKLWriteResGroup90], (instregex "VPABSWrm")>;
				2204	def: InstRW<[SKLWriteResGroup90], (instregex "VPADDSBrm")>;
				2205	def: InstRW<[SKLWriteResGroup90], (instregex "VPADDSWrm")>;
				2206	def: InstRW<[SKLWriteResGroup90], (instregex "VPADDUSBrm")>;
				2207	def: InstRW<[SKLWriteResGroup90], (instregex "VPADDUSWrm")>;
				2208	def: InstRW<[SKLWriteResGroup90], (instregex "VPAVGBrm")>;
				2209	def: InstRW<[SKLWriteResGroup90], (instregex "VPAVGWrm")>;
				2210	def: InstRW<[SKLWriteResGroup90], (instregex "VPCMPEQBrm")>;
				2211	def: InstRW<[SKLWriteResGroup90], (instregex "VPCMPEQDrm")>;
				2212	def: InstRW<[SKLWriteResGroup90], (instregex "VPCMPEQQrm")>;
				2213	def: InstRW<[SKLWriteResGroup90], (instregex "VPCMPEQWrm")>;
				2214	def: InstRW<[SKLWriteResGroup90], (instregex "VPCMPGTBrm")>;
				2215	def: InstRW<[SKLWriteResGroup90], (instregex "VPCMPGTDrm")>;
				2216	def: InstRW<[SKLWriteResGroup90], (instregex "VPCMPGTWrm")>;
				2217	def: InstRW<[SKLWriteResGroup90], (instregex "VPMAXSBrm")>;
				2218	def: InstRW<[SKLWriteResGroup90], (instregex "VPMAXSDrm")>;
				2219	def: InstRW<[SKLWriteResGroup90], (instregex "VPMAXSWrm")>;
				2220	def: InstRW<[SKLWriteResGroup90], (instregex "VPMAXUBrm")>;
				2221	def: InstRW<[SKLWriteResGroup90], (instregex "VPMAXUDrm")>;
				2222	def: InstRW<[SKLWriteResGroup90], (instregex "VPMAXUWrm")>;
				2223	def: InstRW<[SKLWriteResGroup90], (instregex "VPMINSBrm")>;
				2224	def: InstRW<[SKLWriteResGroup90], (instregex "VPMINSDrm")>;
				2225	def: InstRW<[SKLWriteResGroup90], (instregex "VPMINSWrm")>;
				2226	def: InstRW<[SKLWriteResGroup90], (instregex "VPMINUBrm")>;
				2227	def: InstRW<[SKLWriteResGroup90], (instregex "VPMINUDrm")>;
				2228	def: InstRW<[SKLWriteResGroup90], (instregex "VPMINUWrm")>;
Craig Topper	dbddac0	2018-01-25 04:45:30 +0000	[diff] [blame]	2229	def: InstRW<[SKLWriteResGroup90], (instregex "VPSIGNBrm")>;
				2230	def: InstRW<[SKLWriteResGroup90], (instregex "VPSIGNDrm")>;
				2231	def: InstRW<[SKLWriteResGroup90], (instregex "VPSIGNWrm")>;
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	2232	def: InstRW<[SKLWriteResGroup90], (instregex "VPSLLDrm")>;
				2233	def: InstRW<[SKLWriteResGroup90], (instregex "VPSLLQrm")>;
				2234	def: InstRW<[SKLWriteResGroup90], (instregex "VPSLLVDrm")>;
				2235	def: InstRW<[SKLWriteResGroup90], (instregex "VPSLLVQrm")>;
				2236	def: InstRW<[SKLWriteResGroup90], (instregex "VPSLLWrm")>;
				2237	def: InstRW<[SKLWriteResGroup90], (instregex "VPSRADrm")>;
				2238	def: InstRW<[SKLWriteResGroup90], (instregex "VPSRAVDrm")>;
				2239	def: InstRW<[SKLWriteResGroup90], (instregex "VPSRAWrm")>;
				2240	def: InstRW<[SKLWriteResGroup90], (instregex "VPSRLDrm")>;
				2241	def: InstRW<[SKLWriteResGroup90], (instregex "VPSRLQrm")>;
				2242	def: InstRW<[SKLWriteResGroup90], (instregex "VPSRLVDrm")>;
				2243	def: InstRW<[SKLWriteResGroup90], (instregex "VPSRLVQrm")>;
				2244	def: InstRW<[SKLWriteResGroup90], (instregex "VPSRLWrm")>;
				2245	def: InstRW<[SKLWriteResGroup90], (instregex "VPSUBSBrm")>;
				2246	def: InstRW<[SKLWriteResGroup90], (instregex "VPSUBSWrm")>;
				2247	def: InstRW<[SKLWriteResGroup90], (instregex "VPSUBUSBrm")>;
				2248	def: InstRW<[SKLWriteResGroup90], (instregex "VPSUBUSWrm")>;
				2249
				2250	def SKLWriteResGroup91 : SchedWriteRes<[SKLPort23,SKLPort015]> {
				2251	let Latency = 7;
				2252	let NumMicroOps = 2;
				2253	let ResourceCycles = [1,1];
				2254	}
				2255	def: InstRW<[SKLWriteResGroup91], (instregex "ANDNPDrm")>;
				2256	def: InstRW<[SKLWriteResGroup91], (instregex "ANDNPSrm")>;
				2257	def: InstRW<[SKLWriteResGroup91], (instregex "ANDPDrm")>;
				2258	def: InstRW<[SKLWriteResGroup91], (instregex "ANDPSrm")>;
				2259	def: InstRW<[SKLWriteResGroup91], (instregex "BLENDPDrmi")>;
				2260	def: InstRW<[SKLWriteResGroup91], (instregex "BLENDPSrmi")>;
				2261	def: InstRW<[SKLWriteResGroup91], (instregex "ORPDrm")>;
				2262	def: InstRW<[SKLWriteResGroup91], (instregex "ORPSrm")>;
				2263	def: InstRW<[SKLWriteResGroup91], (instregex "PADDBrm")>;
				2264	def: InstRW<[SKLWriteResGroup91], (instregex "PADDDrm")>;
				2265	def: InstRW<[SKLWriteResGroup91], (instregex "PADDQrm")>;
				2266	def: InstRW<[SKLWriteResGroup91], (instregex "PADDWrm")>;
				2267	def: InstRW<[SKLWriteResGroup91], (instregex "PANDNrm")>;
				2268	def: InstRW<[SKLWriteResGroup91], (instregex "PANDrm")>;
				2269	def: InstRW<[SKLWriteResGroup91], (instregex "PORrm")>;
				2270	def: InstRW<[SKLWriteResGroup91], (instregex "PSUBBrm")>;
				2271	def: InstRW<[SKLWriteResGroup91], (instregex "PSUBDrm")>;
				2272	def: InstRW<[SKLWriteResGroup91], (instregex "PSUBQrm")>;
				2273	def: InstRW<[SKLWriteResGroup91], (instregex "PSUBWrm")>;
				2274	def: InstRW<[SKLWriteResGroup91], (instregex "PXORrm")>;
				2275	def: InstRW<[SKLWriteResGroup91], (instregex "VANDNPDrm")>;
				2276	def: InstRW<[SKLWriteResGroup91], (instregex "VANDNPSrm")>;
				2277	def: InstRW<[SKLWriteResGroup91], (instregex "VANDPDrm")>;
				2278	def: InstRW<[SKLWriteResGroup91], (instregex "VANDPSrm")>;
				2279	def: InstRW<[SKLWriteResGroup91], (instregex "VBLENDPDrmi")>;
				2280	def: InstRW<[SKLWriteResGroup91], (instregex "VBLENDPSrmi")>;
				2281	def: InstRW<[SKLWriteResGroup91], (instregex "VINSERTF128rm")>;
				2282	def: InstRW<[SKLWriteResGroup91], (instregex "VINSERTI128rm")>;
				2283	def: InstRW<[SKLWriteResGroup91], (instregex "VMASKMOVPDrm")>;
				2284	def: InstRW<[SKLWriteResGroup91], (instregex "VMASKMOVPSrm")>;
				2285	def: InstRW<[SKLWriteResGroup91], (instregex "VORPDrm")>;
				2286	def: InstRW<[SKLWriteResGroup91], (instregex "VORPSrm")>;
				2287	def: InstRW<[SKLWriteResGroup91], (instregex "VPADDBrm")>;
				2288	def: InstRW<[SKLWriteResGroup91], (instregex "VPADDDrm")>;
				2289	def: InstRW<[SKLWriteResGroup91], (instregex "VPADDQrm")>;
				2290	def: InstRW<[SKLWriteResGroup91], (instregex "VPADDWrm")>;
				2291	def: InstRW<[SKLWriteResGroup91], (instregex "VPANDNrm")>;
				2292	def: InstRW<[SKLWriteResGroup91], (instregex "VPANDrm")>;
				2293	def: InstRW<[SKLWriteResGroup91], (instregex "VPBLENDDrmi")>;
				2294	def: InstRW<[SKLWriteResGroup91], (instregex "VPMASKMOVDrm")>;
				2295	def: InstRW<[SKLWriteResGroup91], (instregex "VPMASKMOVQrm")>;
				2296	def: InstRW<[SKLWriteResGroup91], (instregex "VPORrm")>;
				2297	def: InstRW<[SKLWriteResGroup91], (instregex "VPSUBBrm")>;
				2298	def: InstRW<[SKLWriteResGroup91], (instregex "VPSUBDrm")>;
				2299	def: InstRW<[SKLWriteResGroup91], (instregex "VPSUBQrm")>;
				2300	def: InstRW<[SKLWriteResGroup91], (instregex "VPSUBWrm")>;
				2301	def: InstRW<[SKLWriteResGroup91], (instregex "VPXORrm")>;
				2302	def: InstRW<[SKLWriteResGroup91], (instregex "VXORPDrm")>;
				2303	def: InstRW<[SKLWriteResGroup91], (instregex "VXORPSrm")>;
				2304	def: InstRW<[SKLWriteResGroup91], (instregex "XORPDrm")>;
				2305	def: InstRW<[SKLWriteResGroup91], (instregex "XORPSrm")>;
				2306
				2307	def SKLWriteResGroup92 : SchedWriteRes<[SKLPort5,SKLPort23]> {
				2308	let Latency = 7;
				2309	let NumMicroOps = 3;
				2310	let ResourceCycles = [2,1];
				2311	}
				2312	def: InstRW<[SKLWriteResGroup92], (instregex "MMX_PACKSSDWirm")>;
				2313	def: InstRW<[SKLWriteResGroup92], (instregex "MMX_PACKSSWBirm")>;
				2314	def: InstRW<[SKLWriteResGroup92], (instregex "MMX_PACKUSWBirm")>;
				2315
				2316	def SKLWriteResGroup93 : SchedWriteRes<[SKLPort23,SKLPort06]> {
				2317	let Latency = 7;
				2318	let NumMicroOps = 3;
				2319	let ResourceCycles = [1,2];
				2320	}
Craig Topper	f4cd908	2018-01-19 05:47:32 +0000	[diff] [blame]	2321	def: InstRW<[SKLWriteResGroup93], (instregex "CMOV(A\|BE)(16\|32\|64)rm")>;
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	2322
				2323	def SKLWriteResGroup94 : SchedWriteRes<[SKLPort23,SKLPort0156]> {
				2324	let Latency = 7;
				2325	let NumMicroOps = 3;
				2326	let ResourceCycles = [1,2];
				2327	}
				2328	def: InstRW<[SKLWriteResGroup94], (instregex "LEAVE64")>;
				2329	def: InstRW<[SKLWriteResGroup94], (instregex "SCASB")>;
				2330	def: InstRW<[SKLWriteResGroup94], (instregex "SCASL")>;
				2331	def: InstRW<[SKLWriteResGroup94], (instregex "SCASQ")>;
				2332	def: InstRW<[SKLWriteResGroup94], (instregex "SCASW")>;
				2333
				2334	def SKLWriteResGroup95 : SchedWriteRes<[SKLPort0,SKLPort5,SKLPort015]> {
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	2335	let Latency = 7;
				2336	let NumMicroOps = 3;
				2337	let ResourceCycles = [1,1,1];
				2338	}
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	2339	def: InstRW<[SKLWriteResGroup95], (instregex "CVTTSS2SI64rr")>;
				2340	def: InstRW<[SKLWriteResGroup95], (instregex "CVTTSS2SIrr")>;
				2341	def: InstRW<[SKLWriteResGroup95], (instregex "VCVTTSS2SI64rr")>;
				2342	def: InstRW<[SKLWriteResGroup95], (instregex "VCVTTSS2SIrr")>;
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	2343
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	2344	def SKLWriteResGroup96 : SchedWriteRes<[SKLPort0,SKLPort23,SKLPort05]> {
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	2345	let Latency = 7;
				2346	let NumMicroOps = 3;
				2347	let ResourceCycles = [1,1,1];
				2348	}
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	2349	def: InstRW<[SKLWriteResGroup96], (instregex "FLDCW16m")>;
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	2350
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	2351	def SKLWriteResGroup97 : SchedWriteRes<[SKLPort0,SKLPort23,SKLPort0156]> {
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	2352	let Latency = 7;
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	2353	let NumMicroOps = 3;
				2354	let ResourceCycles = [1,1,1];
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	2355	}
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	2356	def: InstRW<[SKLWriteResGroup97], (instregex "LDMXCSR")>;
				2357	def: InstRW<[SKLWriteResGroup97], (instregex "VLDMXCSR")>;
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	2358
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	2359	def SKLWriteResGroup98 : SchedWriteRes<[SKLPort6,SKLPort23,SKLPort0156]> {
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	2360	let Latency = 7;
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	2361	let NumMicroOps = 3;
				2362	let ResourceCycles = [1,1,1];
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	2363	}
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	2364	def: InstRW<[SKLWriteResGroup98], (instregex "LRETQ")>;
				2365	def: InstRW<[SKLWriteResGroup98], (instregex "RETQ")>;
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	2366
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	2367	def SKLWriteResGroup99 : SchedWriteRes<[SKLPort23,SKLPort06,SKLPort15]> {
				2368	let Latency = 7;
				2369	let NumMicroOps = 3;
				2370	let ResourceCycles = [1,1,1];
				2371	}
Craig Topper	a42a2ba	2017-12-16 18:35:31 +0000	[diff] [blame]	2372	def: InstRW<[SKLWriteResGroup99], (instregex "BEXTR(32\|64)rm")>;
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	2373
				2374	def SKLWriteResGroup100 : SchedWriteRes<[SKLPort4,SKLPort23,SKLPort237,SKLPort06]> {
				2375	let Latency = 7;
				2376	let NumMicroOps = 5;
				2377	let ResourceCycles = [1,1,1,2];
				2378	}
Craig Topper	13a1650	2018-03-19 00:56:09 +0000	[diff] [blame]	2379	def: InstRW<[SKLWriteResGroup100], (instregex "ROL(8\|16\|32\|64)m1")>;
				2380	def: InstRW<[SKLWriteResGroup100], (instregex "ROL(8\|16\|32\|64)mi")>;
				2381	def: InstRW<[SKLWriteResGroup100], (instregex "ROR(8\|16\|32\|64)m1")>;
				2382	def: InstRW<[SKLWriteResGroup100], (instregex "ROR(8\|16\|32\|64)mi")>;
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	2383
				2384	def SKLWriteResGroup101 : SchedWriteRes<[SKLPort4,SKLPort23,SKLPort237,SKLPort0156]> {
				2385	let Latency = 7;
				2386	let NumMicroOps = 5;
				2387	let ResourceCycles = [1,1,1,2];
				2388	}
Craig Topper	13a1650	2018-03-19 00:56:09 +0000	[diff] [blame]	2389	def: InstRW<[SKLWriteResGroup101], (instregex "XADD(8\|16\|32\|64)rm")>;
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	2390
				2391	def SKLWriteResGroup102 : SchedWriteRes<[SKLPort4,SKLPort6,SKLPort23,SKLPort237,SKLPort0156]> {
				2392	let Latency = 7;
				2393	let NumMicroOps = 5;
				2394	let ResourceCycles = [1,1,1,1,1];
				2395	}
				2396	def: InstRW<[SKLWriteResGroup102], (instregex "CALL(16\|32\|64)m")>;
				2397	def: InstRW<[SKLWriteResGroup102], (instregex "FARCALL64")>;
				2398
				2399	def SKLWriteResGroup103 : SchedWriteRes<[SKLPort6,SKLPort06,SKLPort15,SKLPort0156]> {
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	2400	let Latency = 7;
				2401	let NumMicroOps = 7;
				2402	let ResourceCycles = [1,3,1,2];
				2403	}
Craig Topper	2d451e7	2018-03-18 08:38:06 +0000	[diff] [blame]	2404	def: InstRW<[SKLWriteResGroup103], (instrs LOOP)>;
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	2405
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	2406	def SKLWriteResGroup104 : SchedWriteRes<[SKLPort0]> {
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	2407	let Latency = 8;
				2408	let NumMicroOps = 2;
				2409	let ResourceCycles = [2];
				2410	}
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	2411	def: InstRW<[SKLWriteResGroup104], (instregex "AESIMCrr")>;
				2412	def: InstRW<[SKLWriteResGroup104], (instregex "VAESIMCrr")>;
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	2413
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	2414	def SKLWriteResGroup105 : SchedWriteRes<[SKLPort015]> {
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	2415	let Latency = 8;
				2416	let NumMicroOps = 2;
				2417	let ResourceCycles = [2];
				2418	}
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	2419	def: InstRW<[SKLWriteResGroup105], (instregex "PMULLDrr")>;
				2420	def: InstRW<[SKLWriteResGroup105], (instregex "ROUNDPDr")>;
				2421	def: InstRW<[SKLWriteResGroup105], (instregex "ROUNDPSr")>;
				2422	def: InstRW<[SKLWriteResGroup105], (instregex "ROUNDSDr")>;
				2423	def: InstRW<[SKLWriteResGroup105], (instregex "ROUNDSSr")>;
				2424	def: InstRW<[SKLWriteResGroup105], (instregex "VPMULLDYrr")>;
				2425	def: InstRW<[SKLWriteResGroup105], (instregex "VPMULLDrr")>;
				2426	def: InstRW<[SKLWriteResGroup105], (instregex "VROUNDPDr")>;
				2427	def: InstRW<[SKLWriteResGroup105], (instregex "VROUNDPSr")>;
				2428	def: InstRW<[SKLWriteResGroup105], (instregex "VROUNDSDr")>;
				2429	def: InstRW<[SKLWriteResGroup105], (instregex "VROUNDSSr")>;
				2430	def: InstRW<[SKLWriteResGroup105], (instregex "VROUNDYPDr")>;
				2431	def: InstRW<[SKLWriteResGroup105], (instregex "VROUNDYPSr")>;
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	2432
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	2433	def SKLWriteResGroup106 : SchedWriteRes<[SKLPort0,SKLPort23]> {
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	2434	let Latency = 8;
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	2435	let NumMicroOps = 2;
				2436	let ResourceCycles = [1,1];
				2437	}
				2438	def: InstRW<[SKLWriteResGroup106], (instregex "VTESTPDrm")>;
				2439	def: InstRW<[SKLWriteResGroup106], (instregex "VTESTPSrm")>;
				2440
				2441	def SKLWriteResGroup107 : SchedWriteRes<[SKLPort1,SKLPort23]> {
				2442	let Latency = 8;
				2443	let NumMicroOps = 2;
				2444	let ResourceCycles = [1,1];
				2445	}
				2446	def: InstRW<[SKLWriteResGroup107], (instregex "BSF(16\|32\|64)rm")>;
				2447	def: InstRW<[SKLWriteResGroup107], (instregex "BSR(16\|32\|64)rm")>;
Craig Topper	b369cdb	2018-01-25 06:57:42 +0000	[diff] [blame]	2448	def: InstRW<[SKLWriteResGroup107], (instrs IMUL64m)>;
				2449	def: InstRW<[SKLWriteResGroup107], (instrs IMUL32rm, IMUL32rmi, IMUL32rmi8, IMUL64rm, IMUL64rmi32, IMUL64rmi8)>;
				2450	def: InstRW<[SKLWriteResGroup107], (instrs IMUL8m)>;
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	2451	def: InstRW<[SKLWriteResGroup107], (instregex "LZCNT(16\|32\|64)rm")>;
Craig Topper	2d451e7	2018-03-18 08:38:06 +0000	[diff] [blame]	2452	def: InstRW<[SKLWriteResGroup107], (instrs MUL64m)>;
Craig Topper	13a1650	2018-03-19 00:56:09 +0000	[diff] [blame]	2453	def: InstRW<[SKLWriteResGroup107], (instrs MUL8m)>;
Craig Topper	a42a2ba	2017-12-16 18:35:31 +0000	[diff] [blame]	2454	def: InstRW<[SKLWriteResGroup107], (instregex "PDEP(32\|64)rm")>;
				2455	def: InstRW<[SKLWriteResGroup107], (instregex "PEXT(32\|64)rm")>;
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	2456	def: InstRW<[SKLWriteResGroup107], (instregex "POPCNT(16\|32\|64)rm")>;
				2457	def: InstRW<[SKLWriteResGroup107], (instregex "TZCNT(16\|32\|64)rm")>;
				2458
				2459	def SKLWriteResGroup107_16 : SchedWriteRes<[SKLPort1, SKLPort0156, SKLPort23]> {
Craig Topper	b369cdb	2018-01-25 06:57:42 +0000	[diff] [blame]	2460	let Latency = 8;
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	2461	let NumMicroOps = 3;
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	2462	let ResourceCycles = [1,1,1];
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	2463	}
Craig Topper	b369cdb	2018-01-25 06:57:42 +0000	[diff] [blame]	2464	def: InstRW<[SKLWriteResGroup107_16], (instrs IMUL16rm, IMUL16rmi, IMUL16rmi8)>;
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	2465
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	2466	def SKLWriteResGroup107_16_2 : SchedWriteRes<[SKLPort1, SKLPort0156, SKLPort23]> {
Craig Topper	b369cdb	2018-01-25 06:57:42 +0000	[diff] [blame]	2467	let Latency = 8;
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	2468	let NumMicroOps = 5;
				2469	}
Craig Topper	b369cdb	2018-01-25 06:57:42 +0000	[diff] [blame]	2470	def: InstRW<[SKLWriteResGroup107_16_2], (instrs IMUL16m)>;
				2471	def: InstRW<[SKLWriteResGroup107_16_2], (instrs MUL16m)>;
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	2472
				2473	def SKLWriteResGroup107_32 : SchedWriteRes<[SKLPort1, SKLPort0156, SKLPort23]> {
Craig Topper	b369cdb	2018-01-25 06:57:42 +0000	[diff] [blame]	2474	let Latency = 8;
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	2475	let NumMicroOps = 3;
				2476	let ResourceCycles = [1,1,1];
				2477	}
Craig Topper	b369cdb	2018-01-25 06:57:42 +0000	[diff] [blame]	2478	def: InstRW<[SKLWriteResGroup107_32], (instrs IMUL32m)>;
				2479	def: InstRW<[SKLWriteResGroup107_32], (instrs MUL32m)>;
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	2480
				2481	def SKLWriteResGroup108 : SchedWriteRes<[SKLPort5,SKLPort23]> {
				2482	let Latency = 8;
				2483	let NumMicroOps = 2;
				2484	let ResourceCycles = [1,1];
				2485	}
				2486	def: InstRW<[SKLWriteResGroup108], (instregex "FCOM32m")>;
				2487	def: InstRW<[SKLWriteResGroup108], (instregex "FCOM64m")>;
				2488	def: InstRW<[SKLWriteResGroup108], (instregex "FCOMP32m")>;
				2489	def: InstRW<[SKLWriteResGroup108], (instregex "FCOMP64m")>;
				2490	def: InstRW<[SKLWriteResGroup108], (instregex "MMX_PSADBWirm")>;
				2491	def: InstRW<[SKLWriteResGroup108], (instregex "VPACKSSDWYrm")>;
				2492	def: InstRW<[SKLWriteResGroup108], (instregex "VPACKSSWBYrm")>;
				2493	def: InstRW<[SKLWriteResGroup108], (instregex "VPACKUSDWYrm")>;
				2494	def: InstRW<[SKLWriteResGroup108], (instregex "VPACKUSWBYrm")>;
				2495	def: InstRW<[SKLWriteResGroup108], (instregex "VPALIGNRYrmi")>;
				2496	def: InstRW<[SKLWriteResGroup108], (instregex "VPBLENDWYrmi")>;
				2497	def: InstRW<[SKLWriteResGroup108], (instregex "VPBROADCASTBYrm")>;
				2498	def: InstRW<[SKLWriteResGroup108], (instregex "VPBROADCASTWYrm")>;
				2499	def: InstRW<[SKLWriteResGroup108], (instregex "VPERMILPDYmi")>;
				2500	def: InstRW<[SKLWriteResGroup108], (instregex "VPERMILPDYrm")>;
				2501	def: InstRW<[SKLWriteResGroup108], (instregex "VPERMILPSYmi")>;
				2502	def: InstRW<[SKLWriteResGroup108], (instregex "VPERMILPSYrm")>;
				2503	def: InstRW<[SKLWriteResGroup108], (instregex "VPMOVSXBDYrm")>;
				2504	def: InstRW<[SKLWriteResGroup108], (instregex "VPMOVSXBQYrm")>;
				2505	def: InstRW<[SKLWriteResGroup108], (instregex "VPMOVSXWQYrm")>;
				2506	def: InstRW<[SKLWriteResGroup108], (instregex "VPSHUFBYrm")>;
				2507	def: InstRW<[SKLWriteResGroup108], (instregex "VPSHUFDYmi")>;
				2508	def: InstRW<[SKLWriteResGroup108], (instregex "VPSHUFHWYmi")>;
				2509	def: InstRW<[SKLWriteResGroup108], (instregex "VPSHUFLWYmi")>;
				2510	def: InstRW<[SKLWriteResGroup108], (instregex "VPUNPCKHBWYrm")>;
				2511	def: InstRW<[SKLWriteResGroup108], (instregex "VPUNPCKHDQYrm")>;
				2512	def: InstRW<[SKLWriteResGroup108], (instregex "VPUNPCKHQDQYrm")>;
				2513	def: InstRW<[SKLWriteResGroup108], (instregex "VPUNPCKHWDYrm")>;
				2514	def: InstRW<[SKLWriteResGroup108], (instregex "VPUNPCKLBWYrm")>;
				2515	def: InstRW<[SKLWriteResGroup108], (instregex "VPUNPCKLDQYrm")>;
				2516	def: InstRW<[SKLWriteResGroup108], (instregex "VPUNPCKLQDQYrm")>;
				2517	def: InstRW<[SKLWriteResGroup108], (instregex "VPUNPCKLWDYrm")>;
				2518	def: InstRW<[SKLWriteResGroup108], (instregex "VSHUFPDYrmi")>;
				2519	def: InstRW<[SKLWriteResGroup108], (instregex "VSHUFPSYrmi")>;
				2520	def: InstRW<[SKLWriteResGroup108], (instregex "VUNPCKHPDYrm")>;
				2521	def: InstRW<[SKLWriteResGroup108], (instregex "VUNPCKHPSYrm")>;
				2522	def: InstRW<[SKLWriteResGroup108], (instregex "VUNPCKLPDYrm")>;
				2523	def: InstRW<[SKLWriteResGroup108], (instregex "VUNPCKLPSYrm")>;
				2524
				2525	def SKLWriteResGroup109 : SchedWriteRes<[SKLPort01,SKLPort23]> {
				2526	let Latency = 8;
				2527	let NumMicroOps = 2;
				2528	let ResourceCycles = [1,1];
				2529	}
				2530	def: InstRW<[SKLWriteResGroup109], (instregex "VPABSBYrm")>;
				2531	def: InstRW<[SKLWriteResGroup109], (instregex "VPABSDYrm")>;
				2532	def: InstRW<[SKLWriteResGroup109], (instregex "VPABSWYrm")>;
				2533	def: InstRW<[SKLWriteResGroup109], (instregex "VPADDSBYrm")>;
				2534	def: InstRW<[SKLWriteResGroup109], (instregex "VPADDSWYrm")>;
				2535	def: InstRW<[SKLWriteResGroup109], (instregex "VPADDUSBYrm")>;
				2536	def: InstRW<[SKLWriteResGroup109], (instregex "VPADDUSWYrm")>;
				2537	def: InstRW<[SKLWriteResGroup109], (instregex "VPAVGBYrm")>;
				2538	def: InstRW<[SKLWriteResGroup109], (instregex "VPAVGWYrm")>;
				2539	def: InstRW<[SKLWriteResGroup109], (instregex "VPCMPEQBYrm")>;
				2540	def: InstRW<[SKLWriteResGroup109], (instregex "VPCMPEQDYrm")>;
				2541	def: InstRW<[SKLWriteResGroup109], (instregex "VPCMPEQQYrm")>;
				2542	def: InstRW<[SKLWriteResGroup109], (instregex "VPCMPEQWYrm")>;
				2543	def: InstRW<[SKLWriteResGroup109], (instregex "VPCMPGTBYrm")>;
				2544	def: InstRW<[SKLWriteResGroup109], (instregex "VPCMPGTDYrm")>;
				2545	def: InstRW<[SKLWriteResGroup109], (instregex "VPCMPGTWYrm")>;
				2546	def: InstRW<[SKLWriteResGroup109], (instregex "VPMAXSBYrm")>;
				2547	def: InstRW<[SKLWriteResGroup109], (instregex "VPMAXSDYrm")>;
				2548	def: InstRW<[SKLWriteResGroup109], (instregex "VPMAXSWYrm")>;
				2549	def: InstRW<[SKLWriteResGroup109], (instregex "VPMAXUBYrm")>;
				2550	def: InstRW<[SKLWriteResGroup109], (instregex "VPMAXUDYrm")>;
				2551	def: InstRW<[SKLWriteResGroup109], (instregex "VPMAXUWYrm")>;
				2552	def: InstRW<[SKLWriteResGroup109], (instregex "VPMINSBYrm")>;
				2553	def: InstRW<[SKLWriteResGroup109], (instregex "VPMINSDYrm")>;
				2554	def: InstRW<[SKLWriteResGroup109], (instregex "VPMINSWYrm")>;
				2555	def: InstRW<[SKLWriteResGroup109], (instregex "VPMINUBYrm")>;
				2556	def: InstRW<[SKLWriteResGroup109], (instregex "VPMINUDYrm")>;
				2557	def: InstRW<[SKLWriteResGroup109], (instregex "VPMINUWYrm")>;
Craig Topper	dbddac0	2018-01-25 04:45:30 +0000	[diff] [blame]	2558	def: InstRW<[SKLWriteResGroup109], (instregex "VPSIGNBYrm")>;
				2559	def: InstRW<[SKLWriteResGroup109], (instregex "VPSIGNDYrm")>;
				2560	def: InstRW<[SKLWriteResGroup109], (instregex "VPSIGNWYrm")>;
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	2561	def: InstRW<[SKLWriteResGroup109], (instregex "VPSLLDYrm")>;
				2562	def: InstRW<[SKLWriteResGroup109], (instregex "VPSLLQYrm")>;
				2563	def: InstRW<[SKLWriteResGroup109], (instregex "VPSLLVDYrm")>;
				2564	def: InstRW<[SKLWriteResGroup109], (instregex "VPSLLVQYrm")>;
				2565	def: InstRW<[SKLWriteResGroup109], (instregex "VPSLLWYrm")>;
				2566	def: InstRW<[SKLWriteResGroup109], (instregex "VPSRADYrm")>;
				2567	def: InstRW<[SKLWriteResGroup109], (instregex "VPSRAVDYrm")>;
				2568	def: InstRW<[SKLWriteResGroup109], (instregex "VPSRAWYrm")>;
				2569	def: InstRW<[SKLWriteResGroup109], (instregex "VPSRLDYrm")>;
				2570	def: InstRW<[SKLWriteResGroup109], (instregex "VPSRLQYrm")>;
				2571	def: InstRW<[SKLWriteResGroup109], (instregex "VPSRLVDYrm")>;
				2572	def: InstRW<[SKLWriteResGroup109], (instregex "VPSRLVQYrm")>;
				2573	def: InstRW<[SKLWriteResGroup109], (instregex "VPSRLWYrm")>;
				2574	def: InstRW<[SKLWriteResGroup109], (instregex "VPSUBSBYrm")>;
				2575	def: InstRW<[SKLWriteResGroup109], (instregex "VPSUBSWYrm")>;
				2576	def: InstRW<[SKLWriteResGroup109], (instregex "VPSUBUSBYrm")>;
				2577	def: InstRW<[SKLWriteResGroup109], (instregex "VPSUBUSWYrm")>;
				2578
				2579	def SKLWriteResGroup110 : SchedWriteRes<[SKLPort23,SKLPort015]> {
				2580	let Latency = 8;
				2581	let NumMicroOps = 2;
				2582	let ResourceCycles = [1,1];
				2583	}
				2584	def: InstRW<[SKLWriteResGroup110], (instregex "VANDNPDYrm")>;
				2585	def: InstRW<[SKLWriteResGroup110], (instregex "VANDNPSYrm")>;
				2586	def: InstRW<[SKLWriteResGroup110], (instregex "VANDPDYrm")>;
				2587	def: InstRW<[SKLWriteResGroup110], (instregex "VANDPSYrm")>;
				2588	def: InstRW<[SKLWriteResGroup110], (instregex "VBLENDPDYrmi")>;
				2589	def: InstRW<[SKLWriteResGroup110], (instregex "VBLENDPSYrmi")>;
				2590	def: InstRW<[SKLWriteResGroup110], (instregex "VMASKMOVPDYrm")>;
				2591	def: InstRW<[SKLWriteResGroup110], (instregex "VMASKMOVPSYrm")>;
				2592	def: InstRW<[SKLWriteResGroup110], (instregex "VORPDYrm")>;
				2593	def: InstRW<[SKLWriteResGroup110], (instregex "VORPSYrm")>;
				2594	def: InstRW<[SKLWriteResGroup110], (instregex "VPADDBYrm")>;
				2595	def: InstRW<[SKLWriteResGroup110], (instregex "VPADDDYrm")>;
				2596	def: InstRW<[SKLWriteResGroup110], (instregex "VPADDQYrm")>;
				2597	def: InstRW<[SKLWriteResGroup110], (instregex "VPADDWYrm")>;
				2598	def: InstRW<[SKLWriteResGroup110], (instregex "VPANDNYrm")>;
				2599	def: InstRW<[SKLWriteResGroup110], (instregex "VPANDYrm")>;
				2600	def: InstRW<[SKLWriteResGroup110], (instregex "VPBLENDDYrmi")>;
				2601	def: InstRW<[SKLWriteResGroup110], (instregex "VPMASKMOVDYrm")>;
				2602	def: InstRW<[SKLWriteResGroup110], (instregex "VPMASKMOVQYrm")>;
				2603	def: InstRW<[SKLWriteResGroup110], (instregex "VPORYrm")>;
				2604	def: InstRW<[SKLWriteResGroup110], (instregex "VPSUBBYrm")>;
				2605	def: InstRW<[SKLWriteResGroup110], (instregex "VPSUBDYrm")>;
				2606	def: InstRW<[SKLWriteResGroup110], (instregex "VPSUBQYrm")>;
				2607	def: InstRW<[SKLWriteResGroup110], (instregex "VPSUBWYrm")>;
				2608	def: InstRW<[SKLWriteResGroup110], (instregex "VPXORYrm")>;
				2609	def: InstRW<[SKLWriteResGroup110], (instregex "VXORPDYrm")>;
				2610	def: InstRW<[SKLWriteResGroup110], (instregex "VXORPSYrm")>;
				2611
				2612	def SKLWriteResGroup111 : SchedWriteRes<[SKLPort23,SKLPort015]> {
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	2613	let Latency = 8;
				2614	let NumMicroOps = 3;
				2615	let ResourceCycles = [1,2];
				2616	}
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	2617	def: InstRW<[SKLWriteResGroup111], (instregex "BLENDVPDrm0")>;
				2618	def: InstRW<[SKLWriteResGroup111], (instregex "BLENDVPSrm0")>;
				2619	def: InstRW<[SKLWriteResGroup111], (instregex "PBLENDVBrm0")>;
				2620	def: InstRW<[SKLWriteResGroup111], (instregex "VBLENDVPDrm")>;
				2621	def: InstRW<[SKLWriteResGroup111], (instregex "VBLENDVPSrm")>;
				2622	def: InstRW<[SKLWriteResGroup111], (instregex "VPBLENDVBYrm")>;
				2623	def: InstRW<[SKLWriteResGroup111], (instregex "VPBLENDVBrm")>;
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	2624
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	2625	def SKLWriteResGroup112 : SchedWriteRes<[SKLPort0,SKLPort5,SKLPort23]> {
				2626	let Latency = 8;
				2627	let NumMicroOps = 4;
				2628	let ResourceCycles = [1,2,1];
				2629	}
Craig Topper	dbddac0	2018-01-25 04:45:30 +0000	[diff] [blame]	2630	def: InstRW<[SKLWriteResGroup112], (instregex "MMX_PHADDSWrm")>;
				2631	def: InstRW<[SKLWriteResGroup112], (instregex "MMX_PHSUBSWrm")>;
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	2632
				2633	def SKLWriteResGroup113 : SchedWriteRes<[SKLPort5,SKLPort23,SKLPort05]> {
				2634	let Latency = 8;
				2635	let NumMicroOps = 4;
				2636	let ResourceCycles = [2,1,1];
				2637	}
Craig Topper	066e737	2018-01-25 04:45:32 +0000	[diff] [blame]	2638	def: InstRW<[SKLWriteResGroup113], (instregex "MMX_PHADDDrm")>;
Craig Topper	dbddac0	2018-01-25 04:45:30 +0000	[diff] [blame]	2639	def: InstRW<[SKLWriteResGroup113], (instregex "MMX_PHADDWrm")>;
Craig Topper	dbddac0	2018-01-25 04:45:30 +0000	[diff] [blame]	2640	def: InstRW<[SKLWriteResGroup113], (instregex "MMX_PHSUBDrm")>;
				2641	def: InstRW<[SKLWriteResGroup113], (instregex "MMX_PHSUBWrm")>;
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	2642
				2643	def SKLWriteResGroup114 : SchedWriteRes<[SKLPort4,SKLPort5,SKLPort237,SKLPort015]> {
				2644	let Latency = 8;
				2645	let NumMicroOps = 4;
				2646	let ResourceCycles = [1,1,1,1];
				2647	}
				2648	def: InstRW<[SKLWriteResGroup114], (instregex "VCVTPS2PHYmr")>;
				2649
				2650	def SKLWriteResGroup115 : SchedWriteRes<[SKLPort23,SKLPort237,SKLPort06]> {
				2651	let Latency = 8;
				2652	let NumMicroOps = 5;
				2653	let ResourceCycles = [1,1,3];
				2654	}
Craig Topper	13a1650	2018-03-19 00:56:09 +0000	[diff] [blame]	2655	def: InstRW<[SKLWriteResGroup115], (instregex "ROR(8\|16\|32\|64)mCL")>;
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	2656
				2657	def SKLWriteResGroup116 : SchedWriteRes<[SKLPort23,SKLPort237,SKLPort06,SKLPort0156]> {
				2658	let Latency = 8;
				2659	let NumMicroOps = 5;
				2660	let ResourceCycles = [1,1,1,2];
				2661	}
Craig Topper	13a1650	2018-03-19 00:56:09 +0000	[diff] [blame]	2662	def: InstRW<[SKLWriteResGroup116], (instregex "RCL(8\|16\|32\|64)m1")>;
				2663	def: InstRW<[SKLWriteResGroup116], (instregex "RCL(8\|16\|32\|64)mi")>;
				2664	def: InstRW<[SKLWriteResGroup116], (instregex "RCR(8\|16\|32\|64)m1")>;
				2665	def: InstRW<[SKLWriteResGroup116], (instregex "RCR(8\|16\|32\|64)mi")>;
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	2666
				2667	def SKLWriteResGroup117 : SchedWriteRes<[SKLPort4,SKLPort23,SKLPort237,SKLPort06]> {
				2668	let Latency = 8;
				2669	let NumMicroOps = 6;
				2670	let ResourceCycles = [1,1,1,3];
				2671	}
Craig Topper	13a1650	2018-03-19 00:56:09 +0000	[diff] [blame]	2672	def: InstRW<[SKLWriteResGroup117], (instregex "ROL(8\|16\|32\|64)mCL")>;
				2673	def: InstRW<[SKLWriteResGroup117], (instregex "SAR(8\|16\|32\|64)mCL")>;
				2674	def: InstRW<[SKLWriteResGroup117], (instregex "SHL(8\|16\|32\|64)mCL")>;
				2675	def: InstRW<[SKLWriteResGroup117], (instregex "SHR(8\|16\|32\|64)mCL")>;
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	2676
				2677	def SKLWriteResGroup118 : SchedWriteRes<[SKLPort4,SKLPort23,SKLPort237,SKLPort0156]> {
				2678	let Latency = 8;
				2679	let NumMicroOps = 6;
				2680	let ResourceCycles = [1,1,1,3];
				2681	}
Craig Topper	13a1650	2018-03-19 00:56:09 +0000	[diff] [blame]	2682	def: InstRW<[SKLWriteResGroup118], (instregex "ADC(8\|16\|32\|64)mi")>;
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	2683
				2684	def SKLWriteResGroup119 : SchedWriteRes<[SKLPort4,SKLPort23,SKLPort237,SKLPort06,SKLPort0156]> {
				2685	let Latency = 8;
				2686	let NumMicroOps = 6;
				2687	let ResourceCycles = [1,1,1,2,1];
				2688	}
Craig Topper	13a1650	2018-03-19 00:56:09 +0000	[diff] [blame]	2689	def: InstRW<[SKLWriteResGroup119], (instregex "ADC(8\|16\|32\|64)mr")>;
				2690	def: InstRW<[SKLWriteResGroup119], (instregex "CMPXCHG(8\|16\|32\|64)rm")>;
				2691	def: InstRW<[SKLWriteResGroup119], (instregex "SBB(8\|16\|32\|64)mi")>;
				2692	def: InstRW<[SKLWriteResGroup119], (instregex "SBB(8\|16\|32\|64)mr")>;
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	2693
				2694	def SKLWriteResGroup120 : SchedWriteRes<[SKLPort0,SKLPort23]> {
				2695	let Latency = 9;
				2696	let NumMicroOps = 2;
				2697	let ResourceCycles = [1,1];
				2698	}
				2699	def: InstRW<[SKLWriteResGroup120], (instregex "MMX_CVTPI2PSirm")>;
Craig Topper	dbddac0	2018-01-25 04:45:30 +0000	[diff] [blame]	2700	def: InstRW<[SKLWriteResGroup120], (instregex "MMX_PMADDUBSWrm")>;
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	2701	def: InstRW<[SKLWriteResGroup120], (instregex "MMX_PMADDWDirm")>;
Craig Topper	dbddac0	2018-01-25 04:45:30 +0000	[diff] [blame]	2702	def: InstRW<[SKLWriteResGroup120], (instregex "MMX_PMULHRSWrm")>;
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	2703	def: InstRW<[SKLWriteResGroup120], (instregex "MMX_PMULHUWirm")>;
				2704	def: InstRW<[SKLWriteResGroup120], (instregex "MMX_PMULHWirm")>;
				2705	def: InstRW<[SKLWriteResGroup120], (instregex "MMX_PMULLWirm")>;
				2706	def: InstRW<[SKLWriteResGroup120], (instregex "MMX_PMULUDQirm")>;
				2707	def: InstRW<[SKLWriteResGroup120], (instregex "RCPSSm")>;
				2708	def: InstRW<[SKLWriteResGroup120], (instregex "RSQRTSSm")>;
				2709	def: InstRW<[SKLWriteResGroup120], (instregex "VRCPSSm")>;
				2710	def: InstRW<[SKLWriteResGroup120], (instregex "VRSQRTSSm")>;
				2711	def: InstRW<[SKLWriteResGroup120], (instregex "VTESTPDYrm")>;
				2712	def: InstRW<[SKLWriteResGroup120], (instregex "VTESTPSYrm")>;
				2713
				2714	def SKLWriteResGroup121 : SchedWriteRes<[SKLPort5,SKLPort23]> {
				2715	let Latency = 9;
				2716	let NumMicroOps = 2;
				2717	let ResourceCycles = [1,1];
				2718	}
				2719	def: InstRW<[SKLWriteResGroup121], (instregex "PCMPGTQrm")>;
				2720	def: InstRW<[SKLWriteResGroup121], (instregex "PSADBWrm")>;
				2721	def: InstRW<[SKLWriteResGroup121], (instregex "VPCMPGTQrm")>;
				2722	def: InstRW<[SKLWriteResGroup121], (instregex "VPMOVSXBWYrm")>;
				2723	def: InstRW<[SKLWriteResGroup121], (instregex "VPMOVSXDQYrm")>;
				2724	def: InstRW<[SKLWriteResGroup121], (instregex "VPMOVSXWDYrm")>;
				2725	def: InstRW<[SKLWriteResGroup121], (instregex "VPMOVZXWDYrm")>;
				2726	def: InstRW<[SKLWriteResGroup121], (instregex "VPSADBWrm")>;
				2727
				2728	def SKLWriteResGroup122 : SchedWriteRes<[SKLPort01,SKLPort23]> {
				2729	let Latency = 9;
				2730	let NumMicroOps = 2;
				2731	let ResourceCycles = [1,1];
				2732	}
				2733	def: InstRW<[SKLWriteResGroup122], (instregex "ADDSDrm")>;
				2734	def: InstRW<[SKLWriteResGroup122], (instregex "ADDSSrm")>;
				2735	def: InstRW<[SKLWriteResGroup122], (instregex "MULSDrm")>;
				2736	def: InstRW<[SKLWriteResGroup122], (instregex "MULSSrm")>;
				2737	def: InstRW<[SKLWriteResGroup122], (instregex "SUBSDrm")>;
				2738	def: InstRW<[SKLWriteResGroup122], (instregex "SUBSSrm")>;
				2739	def: InstRW<[SKLWriteResGroup122], (instregex "VADDSDrm")>;
				2740	def: InstRW<[SKLWriteResGroup122], (instregex "VADDSSrm")>;
Craig Topper	f82867c	2017-12-13 23:11:30 +0000	[diff] [blame]	2741	def: InstRW<[SKLWriteResGroup122],
				2742	(instregex "VF(N)?M(ADD\|SUB)(132\|213\|231)S(D\|S)m")>;
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	2743	def: InstRW<[SKLWriteResGroup122], (instregex "VMULSDrm")>;
				2744	def: InstRW<[SKLWriteResGroup122], (instregex "VMULSSrm")>;
				2745	def: InstRW<[SKLWriteResGroup122], (instregex "VSUBSDrm")>;
				2746	def: InstRW<[SKLWriteResGroup122], (instregex "VSUBSSrm")>;
				2747
				2748	def SKLWriteResGroup123 : SchedWriteRes<[SKLPort23,SKLPort015]> {
				2749	let Latency = 9;
				2750	let NumMicroOps = 2;
				2751	let ResourceCycles = [1,1];
				2752	}
Craig Topper	6c65910	2017-12-10 09:14:37 +0000	[diff] [blame]	2753	def: InstRW<[SKLWriteResGroup123], (instregex "CMPSDrm")>;
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	2754	def: InstRW<[SKLWriteResGroup123], (instregex "CMPSSrm")>;
				2755	def: InstRW<[SKLWriteResGroup123], (instregex "CVTPS2PDrm")>;
Craig Topper	5ffe801	2017-12-10 01:24:05 +0000	[diff] [blame]	2756	def: InstRW<[SKLWriteResGroup123], (instregex "MAX(C?)SDrm")>;
				2757	def: InstRW<[SKLWriteResGroup123], (instregex "MAX(C?)SSrm")>;
				2758	def: InstRW<[SKLWriteResGroup123], (instregex "MIN(C?)SDrm")>;
				2759	def: InstRW<[SKLWriteResGroup123], (instregex "MIN(C?)SSrm")>;
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	2760	def: InstRW<[SKLWriteResGroup123], (instregex "MMX_CVTPS2PIirm")>;
				2761	def: InstRW<[SKLWriteResGroup123], (instregex "MMX_CVTTPS2PIirm")>;
				2762	def: InstRW<[SKLWriteResGroup123], (instregex "VCMPSDrm")>;
				2763	def: InstRW<[SKLWriteResGroup123], (instregex "VCMPSSrm")>;
				2764	def: InstRW<[SKLWriteResGroup123], (instregex "VCVTPH2PSrm")>;
				2765	def: InstRW<[SKLWriteResGroup123], (instregex "VCVTPS2PDrm")>;
Craig Topper	5ffe801	2017-12-10 01:24:05 +0000	[diff] [blame]	2766	def: InstRW<[SKLWriteResGroup123], (instregex "VMAX(C?)SDrm")>;
				2767	def: InstRW<[SKLWriteResGroup123], (instregex "VMAX(C?)SSrm")>;
				2768	def: InstRW<[SKLWriteResGroup123], (instregex "VMIN(C?)SDrm")>;
				2769	def: InstRW<[SKLWriteResGroup123], (instregex "VMIN(C?)SSrm")>;
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	2770
				2771	def SKLWriteResGroup124 : SchedWriteRes<[SKLPort5,SKLPort015]> {
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	2772	let Latency = 9;
				2773	let NumMicroOps = 3;
				2774	let ResourceCycles = [1,2];
				2775	}
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	2776	def: InstRW<[SKLWriteResGroup124], (instregex "DPPDrri")>;
				2777	def: InstRW<[SKLWriteResGroup124], (instregex "VDPPDrri")>;
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	2778
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	2779	def SKLWriteResGroup125 : SchedWriteRes<[SKLPort23,SKLPort015]> {
				2780	let Latency = 9;
				2781	let NumMicroOps = 3;
				2782	let ResourceCycles = [1,2];
				2783	}
				2784	def: InstRW<[SKLWriteResGroup125], (instregex "VBLENDVPDYrm")>;
				2785	def: InstRW<[SKLWriteResGroup125], (instregex "VBLENDVPSYrm")>;
				2786
				2787	def SKLWriteResGroup126 : SchedWriteRes<[SKLPort0,SKLPort5,SKLPort23]> {
				2788	let Latency = 9;
				2789	let NumMicroOps = 3;
				2790	let ResourceCycles = [1,1,1];
				2791	}
				2792	def: InstRW<[SKLWriteResGroup126], (instregex "PTESTrm")>;
				2793	def: InstRW<[SKLWriteResGroup126], (instregex "VPTESTrm")>;
				2794
				2795	def SKLWriteResGroup127 : SchedWriteRes<[SKLPort1,SKLPort5,SKLPort23]> {
				2796	let Latency = 9;
				2797	let NumMicroOps = 3;
				2798	let ResourceCycles = [1,1,1];
				2799	}
Craig Topper	b369cdb	2018-01-25 06:57:42 +0000	[diff] [blame]	2800	def: InstRW<[SKLWriteResGroup127], (instrs MULX64rm)>;
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	2801
				2802	def SKLWriteResGroup128 : SchedWriteRes<[SKLPort5,SKLPort01,SKLPort23]> {
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	2803	let Latency = 9;
				2804	let NumMicroOps = 4;
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	2805	let ResourceCycles = [2,1,1];
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	2806	}
Craig Topper	dbddac0	2018-01-25 04:45:30 +0000	[diff] [blame]	2807	def: InstRW<[SKLWriteResGroup128], (instregex "PHADDSWrm")>;
				2808	def: InstRW<[SKLWriteResGroup128], (instregex "PHSUBSWrm")>;
				2809	def: InstRW<[SKLWriteResGroup128], (instregex "VPHADDSWrm")>;
				2810	def: InstRW<[SKLWriteResGroup128], (instregex "VPHSUBSWrm")>;
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	2811
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	2812	def SKLWriteResGroup129 : SchedWriteRes<[SKLPort5,SKLPort23,SKLPort015]> {
				2813	let Latency = 9;
				2814	let NumMicroOps = 4;
				2815	let ResourceCycles = [2,1,1];
				2816	}
				2817	def: InstRW<[SKLWriteResGroup129], (instregex "PHADDDrm")>;
				2818	def: InstRW<[SKLWriteResGroup129], (instregex "PHADDWrm")>;
				2819	def: InstRW<[SKLWriteResGroup129], (instregex "PHSUBDrm")>;
				2820	def: InstRW<[SKLWriteResGroup129], (instregex "PHSUBWrm")>;
				2821	def: InstRW<[SKLWriteResGroup129], (instregex "VPHADDDrm")>;
				2822	def: InstRW<[SKLWriteResGroup129], (instregex "VPHADDWrm")>;
				2823	def: InstRW<[SKLWriteResGroup129], (instregex "VPHSUBDrm")>;
				2824	def: InstRW<[SKLWriteResGroup129], (instregex "VPHSUBWrm")>;
				2825
				2826	def SKLWriteResGroup130 : SchedWriteRes<[SKLPort1,SKLPort23,SKLPort237,SKLPort0156]> {
				2827	let Latency = 9;
				2828	let NumMicroOps = 4;
				2829	let ResourceCycles = [1,1,1,1];
				2830	}
				2831	def: InstRW<[SKLWriteResGroup130], (instregex "SHLD(16\|32\|64)mri8")>;
				2832	def: InstRW<[SKLWriteResGroup130], (instregex "SHRD(16\|32\|64)mri8")>;
				2833
				2834	def SKLWriteResGroup131 : SchedWriteRes<[SKLPort1,SKLPort6,SKLPort23,SKLPort0156]> {
				2835	let Latency = 9;
				2836	let NumMicroOps = 5;
				2837	let ResourceCycles = [1,2,1,1];
				2838	}
				2839	def: InstRW<[SKLWriteResGroup131], (instregex "LAR(16\|32\|64)rm")>;
				2840	def: InstRW<[SKLWriteResGroup131], (instregex "LSL(16\|32\|64)rm")>;
				2841
				2842	def SKLWriteResGroup132 : SchedWriteRes<[SKLPort0,SKLPort23]> {
				2843	let Latency = 10;
				2844	let NumMicroOps = 2;
				2845	let ResourceCycles = [1,1];
				2846	}
				2847	def: InstRW<[SKLWriteResGroup132], (instregex "AESDECLASTrm")>;
				2848	def: InstRW<[SKLWriteResGroup132], (instregex "AESDECrm")>;
				2849	def: InstRW<[SKLWriteResGroup132], (instregex "AESENCLASTrm")>;
				2850	def: InstRW<[SKLWriteResGroup132], (instregex "AESENCrm")>;
				2851	def: InstRW<[SKLWriteResGroup132], (instregex "RCPPSm")>;
				2852	def: InstRW<[SKLWriteResGroup132], (instregex "RSQRTPSm")>;
				2853	def: InstRW<[SKLWriteResGroup132], (instregex "VAESDECLASTrm")>;
				2854	def: InstRW<[SKLWriteResGroup132], (instregex "VAESDECrm")>;
				2855	def: InstRW<[SKLWriteResGroup132], (instregex "VAESENCLASTrm")>;
				2856	def: InstRW<[SKLWriteResGroup132], (instregex "VAESENCrm")>;
				2857	def: InstRW<[SKLWriteResGroup132], (instregex "VRCPPSm")>;
				2858	def: InstRW<[SKLWriteResGroup132], (instregex "VRSQRTPSm")>;
				2859
				2860	def SKLWriteResGroup133 : SchedWriteRes<[SKLPort5,SKLPort23]> {
				2861	let Latency = 10;
				2862	let NumMicroOps = 2;
				2863	let ResourceCycles = [1,1];
				2864	}
				2865	def: InstRW<[SKLWriteResGroup133], (instregex "ADD_F32m")>;
				2866	def: InstRW<[SKLWriteResGroup133], (instregex "ADD_F64m")>;
				2867	def: InstRW<[SKLWriteResGroup133], (instregex "ILD_F16m")>;
				2868	def: InstRW<[SKLWriteResGroup133], (instregex "ILD_F32m")>;
				2869	def: InstRW<[SKLWriteResGroup133], (instregex "ILD_F64m")>;
				2870	def: InstRW<[SKLWriteResGroup133], (instregex "SUBR_F32m")>;
				2871	def: InstRW<[SKLWriteResGroup133], (instregex "SUBR_F64m")>;
				2872	def: InstRW<[SKLWriteResGroup133], (instregex "SUB_F32m")>;
				2873	def: InstRW<[SKLWriteResGroup133], (instregex "SUB_F64m")>;
				2874	def: InstRW<[SKLWriteResGroup133], (instregex "VPCMPGTQYrm")>;
				2875	def: InstRW<[SKLWriteResGroup133], (instregex "VPERM2F128rm")>;
				2876	def: InstRW<[SKLWriteResGroup133], (instregex "VPERM2I128rm")>;
				2877	def: InstRW<[SKLWriteResGroup133], (instregex "VPERMDYrm")>;
				2878	def: InstRW<[SKLWriteResGroup133], (instregex "VPERMPDYmi")>;
				2879	def: InstRW<[SKLWriteResGroup133], (instregex "VPERMPSYrm")>;
				2880	def: InstRW<[SKLWriteResGroup133], (instregex "VPERMQYmi")>;
				2881	def: InstRW<[SKLWriteResGroup133], (instregex "VPMOVZXBDYrm")>;
				2882	def: InstRW<[SKLWriteResGroup133], (instregex "VPMOVZXBQYrm")>;
				2883	def: InstRW<[SKLWriteResGroup133], (instregex "VPMOVZXBWYrm")>;
				2884	def: InstRW<[SKLWriteResGroup133], (instregex "VPMOVZXDQYrm")>;
				2885	def: InstRW<[SKLWriteResGroup133], (instregex "VPMOVZXWQYrm")>;
				2886	def: InstRW<[SKLWriteResGroup133], (instregex "VPSADBWYrm")>;
				2887
				2888	def SKLWriteResGroup134 : SchedWriteRes<[SKLPort01,SKLPort23]> {
				2889	let Latency = 10;
				2890	let NumMicroOps = 2;
				2891	let ResourceCycles = [1,1];
				2892	}
				2893	def: InstRW<[SKLWriteResGroup134], (instregex "ADDPDrm")>;
				2894	def: InstRW<[SKLWriteResGroup134], (instregex "ADDPSrm")>;
				2895	def: InstRW<[SKLWriteResGroup134], (instregex "ADDSUBPDrm")>;
				2896	def: InstRW<[SKLWriteResGroup134], (instregex "ADDSUBPSrm")>;
				2897	def: InstRW<[SKLWriteResGroup134], (instregex "MULPDrm")>;
				2898	def: InstRW<[SKLWriteResGroup134], (instregex "MULPSrm")>;
				2899	def: InstRW<[SKLWriteResGroup134], (instregex "SUBPDrm")>;
				2900	def: InstRW<[SKLWriteResGroup134], (instregex "SUBPSrm")>;
				2901	def: InstRW<[SKLWriteResGroup134], (instregex "VADDPDrm")>;
				2902	def: InstRW<[SKLWriteResGroup134], (instregex "VADDPSrm")>;
				2903	def: InstRW<[SKLWriteResGroup134], (instregex "VADDSUBPDrm")>;
				2904	def: InstRW<[SKLWriteResGroup134], (instregex "VADDSUBPSrm")>;
Craig Topper	f82867c	2017-12-13 23:11:30 +0000	[diff] [blame]	2905	def: InstRW<[SKLWriteResGroup134],
				2906	(instregex "VF(N)?M(ADD\|SUB\|ADDSUB\|SUBADD)(132\|213\|231)P(D\|S)m")>;
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	2907	def: InstRW<[SKLWriteResGroup134], (instregex "VMULPDrm")>;
				2908	def: InstRW<[SKLWriteResGroup134], (instregex "VMULPSrm")>;
				2909	def: InstRW<[SKLWriteResGroup134], (instregex "VSUBPDrm")>;
				2910	def: InstRW<[SKLWriteResGroup134], (instregex "VSUBPSrm")>;
				2911
				2912	def SKLWriteResGroup135 : SchedWriteRes<[SKLPort23,SKLPort015]> {
				2913	let Latency = 10;
				2914	let NumMicroOps = 2;
				2915	let ResourceCycles = [1,1];
				2916	}
				2917	def: InstRW<[SKLWriteResGroup135], (instregex "CMPPDrmi")>;
				2918	def: InstRW<[SKLWriteResGroup135], (instregex "CMPPSrmi")>;
				2919	def: InstRW<[SKLWriteResGroup135], (instregex "CVTDQ2PSrm")>;
				2920	def: InstRW<[SKLWriteResGroup135], (instregex "CVTPS2DQrm")>;
				2921	def: InstRW<[SKLWriteResGroup135], (instregex "CVTSS2SDrm")>;
				2922	def: InstRW<[SKLWriteResGroup135], (instregex "CVTTPS2DQrm")>;
Craig Topper	5ffe801	2017-12-10 01:24:05 +0000	[diff] [blame]	2923	def: InstRW<[SKLWriteResGroup135], (instregex "MAX(C?)PDrm")>;
				2924	def: InstRW<[SKLWriteResGroup135], (instregex "MAX(C?)PSrm")>;
				2925	def: InstRW<[SKLWriteResGroup135], (instregex "MIN(C?)PDrm")>;
				2926	def: InstRW<[SKLWriteResGroup135], (instregex "MIN(C?)PSrm")>;
Craig Topper	dbddac0	2018-01-25 04:45:30 +0000	[diff] [blame]	2927	def: InstRW<[SKLWriteResGroup135], (instregex "PHMINPOSUWrm")>;
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	2928	def: InstRW<[SKLWriteResGroup135], (instregex "PMADDUBSWrm")>;
				2929	def: InstRW<[SKLWriteResGroup135], (instregex "PMADDWDrm")>;
				2930	def: InstRW<[SKLWriteResGroup135], (instregex "PMULDQrm")>;
				2931	def: InstRW<[SKLWriteResGroup135], (instregex "PMULHRSWrm")>;
				2932	def: InstRW<[SKLWriteResGroup135], (instregex "PMULHUWrm")>;
				2933	def: InstRW<[SKLWriteResGroup135], (instregex "PMULHWrm")>;
				2934	def: InstRW<[SKLWriteResGroup135], (instregex "PMULLWrm")>;
				2935	def: InstRW<[SKLWriteResGroup135], (instregex "PMULUDQrm")>;
				2936	def: InstRW<[SKLWriteResGroup135], (instregex "VCMPPDrmi")>;
				2937	def: InstRW<[SKLWriteResGroup135], (instregex "VCMPPSrmi")>;
				2938	def: InstRW<[SKLWriteResGroup135], (instregex "VCVTDQ2PSrm")>;
				2939	def: InstRW<[SKLWriteResGroup135], (instregex "VCVTPH2PSYrm")>;
				2940	def: InstRW<[SKLWriteResGroup135], (instregex "VCVTPS2DQrm")>;
				2941	def: InstRW<[SKLWriteResGroup135], (instregex "VCVTSS2SDrm")>;
				2942	def: InstRW<[SKLWriteResGroup135], (instregex "VCVTTPS2DQrm")>;
Craig Topper	5ffe801	2017-12-10 01:24:05 +0000	[diff] [blame]	2943	def: InstRW<[SKLWriteResGroup135], (instregex "VMAX(C?)PDrm")>;
				2944	def: InstRW<[SKLWriteResGroup135], (instregex "VMAX(C?)PSrm")>;
				2945	def: InstRW<[SKLWriteResGroup135], (instregex "VMIN(C?)PDrm")>;
				2946	def: InstRW<[SKLWriteResGroup135], (instregex "VMIN(C?)PSrm")>;
Craig Topper	dbddac0	2018-01-25 04:45:30 +0000	[diff] [blame]	2947	def: InstRW<[SKLWriteResGroup135], (instregex "VPHMINPOSUWrm")>;
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	2948	def: InstRW<[SKLWriteResGroup135], (instregex "VPMADDUBSWrm")>;
				2949	def: InstRW<[SKLWriteResGroup135], (instregex "VPMADDWDrm")>;
				2950	def: InstRW<[SKLWriteResGroup135], (instregex "VPMULDQrm")>;
				2951	def: InstRW<[SKLWriteResGroup135], (instregex "VPMULHRSWrm")>;
				2952	def: InstRW<[SKLWriteResGroup135], (instregex "VPMULHUWrm")>;
				2953	def: InstRW<[SKLWriteResGroup135], (instregex "VPMULHWrm")>;
				2954	def: InstRW<[SKLWriteResGroup135], (instregex "VPMULLWrm")>;
				2955	def: InstRW<[SKLWriteResGroup135], (instregex "VPMULUDQrm")>;
				2956
				2957	def SKLWriteResGroup136 : SchedWriteRes<[SKLPort0]> {
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	2958	let Latency = 10;
				2959	let NumMicroOps = 3;
				2960	let ResourceCycles = [3];
				2961	}
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	2962	def: InstRW<[SKLWriteResGroup136], (instregex "PCMPISTRIrr")>;
				2963	def: InstRW<[SKLWriteResGroup136], (instregex "PCMPISTRM128rr")>;
				2964	def: InstRW<[SKLWriteResGroup136], (instregex "VPCMPISTRIrr")>;
				2965	def: InstRW<[SKLWriteResGroup136], (instregex "VPCMPISTRM128rr")>;
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	2966
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	2967	def SKLWriteResGroup137 : SchedWriteRes<[SKLPort5,SKLPort23]> {
				2968	let Latency = 10;
				2969	let NumMicroOps = 3;
				2970	let ResourceCycles = [2,1];
				2971	}
				2972	def: InstRW<[SKLWriteResGroup137], (instregex "MPSADBWrmi")>;
				2973	def: InstRW<[SKLWriteResGroup137], (instregex "VMPSADBWrmi")>;
				2974
				2975	def SKLWriteResGroup138 : SchedWriteRes<[SKLPort0,SKLPort5,SKLPort23]> {
				2976	let Latency = 10;
				2977	let NumMicroOps = 3;
				2978	let ResourceCycles = [1,1,1];
				2979	}
				2980	def: InstRW<[SKLWriteResGroup138], (instregex "MMX_CVTPI2PDirm")>;
				2981	def: InstRW<[SKLWriteResGroup138], (instregex "VPTESTYrm")>;
				2982
				2983	def SKLWriteResGroup139 : SchedWriteRes<[SKLPort5,SKLPort23,SKLPort015]> {
				2984	let Latency = 10;
				2985	let NumMicroOps = 3;
				2986	let ResourceCycles = [1,1,1];
				2987	}
				2988	def: InstRW<[SKLWriteResGroup139], (instregex "CVTSD2SSrm")>;
				2989	def: InstRW<[SKLWriteResGroup139], (instregex "VCVTSD2SSrm")>;
				2990
				2991	def SKLWriteResGroup140 : SchedWriteRes<[SKLPort5,SKLPort01,SKLPort23]> {
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	2992	let Latency = 10;
				2993	let NumMicroOps = 4;
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	2994	let ResourceCycles = [2,1,1];
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	2995	}
Craig Topper	dbddac0	2018-01-25 04:45:30 +0000	[diff] [blame]	2996	def: InstRW<[SKLWriteResGroup140], (instregex "VPHADDSWYrm")>;
				2997	def: InstRW<[SKLWriteResGroup140], (instregex "VPHSUBSWYrm")>;
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	2998
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	2999	def SKLWriteResGroup141 : SchedWriteRes<[SKLPort5,SKLPort23,SKLPort015]> {
				3000	let Latency = 10;
				3001	let NumMicroOps = 4;
				3002	let ResourceCycles = [2,1,1];
				3003	}
				3004	def: InstRW<[SKLWriteResGroup141], (instregex "VPHADDDYrm")>;
				3005	def: InstRW<[SKLWriteResGroup141], (instregex "VPHADDWYrm")>;
				3006	def: InstRW<[SKLWriteResGroup141], (instregex "VPHSUBDYrm")>;
				3007	def: InstRW<[SKLWriteResGroup141], (instregex "VPHSUBWYrm")>;
				3008
				3009	def SKLWriteResGroup142 : SchedWriteRes<[SKLPort1,SKLPort23,SKLPort06,SKLPort0156]> {
				3010	let Latency = 10;
				3011	let NumMicroOps = 4;
				3012	let ResourceCycles = [1,1,1,1];
				3013	}
Craig Topper	b369cdb	2018-01-25 06:57:42 +0000	[diff] [blame]	3014	def: InstRW<[SKLWriteResGroup142], (instrs MULX32rm)>;
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	3015
				3016	def SKLWriteResGroup143 : SchedWriteRes<[SKLPort4,SKLPort6,SKLPort23,SKLPort237,SKLPort06,SKLPort0156]> {
				3017	let Latency = 10;
				3018	let NumMicroOps = 8;
				3019	let ResourceCycles = [1,1,1,1,1,3];
				3020	}
Craig Topper	13a1650	2018-03-19 00:56:09 +0000	[diff] [blame]	3021	def: InstRW<[SKLWriteResGroup143], (instregex "XCHG(8\|16\|32\|64)rm")>;
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	3022
				3023	def SKLWriteResGroup144 : SchedWriteRes<[SKLPort05,SKLPort0156]> {
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	3024	let Latency = 10;
				3025	let NumMicroOps = 10;
				3026	let ResourceCycles = [9,1];
				3027	}
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	3028	def: InstRW<[SKLWriteResGroup144], (instregex "MMX_EMMS")>;
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	3029
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	3030	def SKLWriteResGroup145 : SchedWriteRes<[SKLPort0]> {
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	3031	let Latency = 11;
				3032	let NumMicroOps = 1;
				3033	let ResourceCycles = [1];
				3034	}
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	3035	def: InstRW<[SKLWriteResGroup145], (instregex "DIVPSrr")>;
				3036	def: InstRW<[SKLWriteResGroup145], (instregex "DIVSSrr")>;
				3037	def: InstRW<[SKLWriteResGroup145], (instregex "VDIVPSYrr")>;
				3038	def: InstRW<[SKLWriteResGroup145], (instregex "VDIVPSrr")>;
				3039	def: InstRW<[SKLWriteResGroup145], (instregex "VDIVSSrr")>;
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	3040
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	3041	def SKLWriteResGroup146 : SchedWriteRes<[SKLPort0,SKLPort23]> {
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	3042	let Latency = 11;
				3043	let NumMicroOps = 2;
				3044	let ResourceCycles = [1,1];
				3045	}
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	3046	def: InstRW<[SKLWriteResGroup146], (instregex "MUL_F32m")>;
				3047	def: InstRW<[SKLWriteResGroup146], (instregex "MUL_F64m")>;
				3048	def: InstRW<[SKLWriteResGroup146], (instregex "VRCPPSYm")>;
				3049	def: InstRW<[SKLWriteResGroup146], (instregex "VRSQRTPSYm")>;
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	3050
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	3051	def SKLWriteResGroup147 : SchedWriteRes<[SKLPort01,SKLPort23]> {
				3052	let Latency = 11;
				3053	let NumMicroOps = 2;
				3054	let ResourceCycles = [1,1];
				3055	}
				3056	def: InstRW<[SKLWriteResGroup147], (instregex "VADDPDYrm")>;
				3057	def: InstRW<[SKLWriteResGroup147], (instregex "VADDPSYrm")>;
				3058	def: InstRW<[SKLWriteResGroup147], (instregex "VADDSUBPDYrm")>;
				3059	def: InstRW<[SKLWriteResGroup147], (instregex "VADDSUBPSYrm")>;
Craig Topper	f82867c	2017-12-13 23:11:30 +0000	[diff] [blame]	3060	def: InstRW<[SKLWriteResGroup147],
				3061	(instregex "VF(N)?M(ADD\|SUB\|ADDSUB\|SUBADD)(132\|213\|231)P(D\|S)Ym")>;
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	3062	def: InstRW<[SKLWriteResGroup147], (instregex "VMULPDYrm")>;
				3063	def: InstRW<[SKLWriteResGroup147], (instregex "VMULPSYrm")>;
				3064	def: InstRW<[SKLWriteResGroup147], (instregex "VSUBPDYrm")>;
				3065	def: InstRW<[SKLWriteResGroup147], (instregex "VSUBPSYrm")>;
				3066
				3067	def SKLWriteResGroup148 : SchedWriteRes<[SKLPort23,SKLPort015]> {
				3068	let Latency = 11;
				3069	let NumMicroOps = 2;
				3070	let ResourceCycles = [1,1];
				3071	}
				3072	def: InstRW<[SKLWriteResGroup148], (instregex "VCMPPDYrmi")>;
				3073	def: InstRW<[SKLWriteResGroup148], (instregex "VCMPPSYrmi")>;
				3074	def: InstRW<[SKLWriteResGroup148], (instregex "VCVTDQ2PSYrm")>;
				3075	def: InstRW<[SKLWriteResGroup148], (instregex "VCVTPS2DQYrm")>;
				3076	def: InstRW<[SKLWriteResGroup148], (instregex "VCVTPS2PDYrm")>;
				3077	def: InstRW<[SKLWriteResGroup148], (instregex "VCVTTPS2DQYrm")>;
Craig Topper	5ffe801	2017-12-10 01:24:05 +0000	[diff] [blame]	3078	def: InstRW<[SKLWriteResGroup148], (instregex "VMAX(C?)PDYrm")>;
				3079	def: InstRW<[SKLWriteResGroup148], (instregex "VMAX(C?)PSYrm")>;
				3080	def: InstRW<[SKLWriteResGroup148], (instregex "VMIN(C?)PDYrm")>;
				3081	def: InstRW<[SKLWriteResGroup148], (instregex "VMIN(C?)PSYrm")>;
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	3082	def: InstRW<[SKLWriteResGroup148], (instregex "VPMADDUBSWYrm")>;
				3083	def: InstRW<[SKLWriteResGroup148], (instregex "VPMADDWDYrm")>;
				3084	def: InstRW<[SKLWriteResGroup148], (instregex "VPMULDQYrm")>;
				3085	def: InstRW<[SKLWriteResGroup148], (instregex "VPMULHRSWYrm")>;
				3086	def: InstRW<[SKLWriteResGroup148], (instregex "VPMULHUWYrm")>;
				3087	def: InstRW<[SKLWriteResGroup148], (instregex "VPMULHWYrm")>;
				3088	def: InstRW<[SKLWriteResGroup148], (instregex "VPMULLWYrm")>;
				3089	def: InstRW<[SKLWriteResGroup148], (instregex "VPMULUDQYrm")>;
				3090
				3091	def SKLWriteResGroup149 : SchedWriteRes<[SKLPort5,SKLPort23]> {
				3092	let Latency = 11;
				3093	let NumMicroOps = 3;
				3094	let ResourceCycles = [2,1];
				3095	}
				3096	def: InstRW<[SKLWriteResGroup149], (instregex "FICOM16m")>;
				3097	def: InstRW<[SKLWriteResGroup149], (instregex "FICOM32m")>;
				3098	def: InstRW<[SKLWriteResGroup149], (instregex "FICOMP16m")>;
				3099	def: InstRW<[SKLWriteResGroup149], (instregex "FICOMP32m")>;
				3100	def: InstRW<[SKLWriteResGroup149], (instregex "VMPSADBWYrmi")>;
				3101
				3102	def SKLWriteResGroup150 : SchedWriteRes<[SKLPort0,SKLPort5,SKLPort23]> {
				3103	let Latency = 11;
				3104	let NumMicroOps = 3;
				3105	let ResourceCycles = [1,1,1];
				3106	}
				3107	def: InstRW<[SKLWriteResGroup150], (instregex "CVTDQ2PDrm")>;
				3108	def: InstRW<[SKLWriteResGroup150], (instregex "VCVTDQ2PDrm")>;
				3109
				3110	def SKLWriteResGroup151 : SchedWriteRes<[SKLPort0,SKLPort23,SKLPort015]> {
				3111	let Latency = 11;
				3112	let NumMicroOps = 3;
				3113	let ResourceCycles = [1,1,1];
				3114	}
				3115	def: InstRW<[SKLWriteResGroup151], (instregex "CVTSD2SI64rm")>;
				3116	def: InstRW<[SKLWriteResGroup151], (instregex "CVTSD2SIrm")>;
				3117	def: InstRW<[SKLWriteResGroup151], (instregex "CVTSS2SI64rm")>;
				3118	def: InstRW<[SKLWriteResGroup151], (instregex "CVTSS2SIrm")>;
				3119	def: InstRW<[SKLWriteResGroup151], (instregex "CVTTSD2SI64rm")>;
				3120	def: InstRW<[SKLWriteResGroup151], (instregex "CVTTSD2SIrm")>;
				3121	def: InstRW<[SKLWriteResGroup151], (instregex "CVTTSS2SIrm")>;
				3122	def: InstRW<[SKLWriteResGroup151], (instregex "VCVTSD2SI64rm")>;
				3123	def: InstRW<[SKLWriteResGroup151], (instregex "VCVTSD2SIrm")>;
				3124	def: InstRW<[SKLWriteResGroup151], (instregex "VCVTSS2SI64rm")>;
				3125	def: InstRW<[SKLWriteResGroup151], (instregex "VCVTSS2SIrm")>;
				3126	def: InstRW<[SKLWriteResGroup151], (instregex "VCVTTSD2SI64rm")>;
				3127	def: InstRW<[SKLWriteResGroup151], (instregex "VCVTTSD2SIrm")>;
				3128	def: InstRW<[SKLWriteResGroup151], (instregex "VCVTTSS2SI64rm")>;
				3129	def: InstRW<[SKLWriteResGroup151], (instregex "VCVTTSS2SIrm")>;
				3130
				3131	def SKLWriteResGroup152 : SchedWriteRes<[SKLPort5,SKLPort23,SKLPort015]> {
				3132	let Latency = 11;
				3133	let NumMicroOps = 3;
				3134	let ResourceCycles = [1,1,1];
				3135	}
				3136	def: InstRW<[SKLWriteResGroup152], (instregex "CVTPD2DQrm")>;
				3137	def: InstRW<[SKLWriteResGroup152], (instregex "CVTPD2PSrm")>;
				3138	def: InstRW<[SKLWriteResGroup152], (instregex "CVTTPD2DQrm")>;
				3139	def: InstRW<[SKLWriteResGroup152], (instregex "MMX_CVTPD2PIirm")>;
				3140	def: InstRW<[SKLWriteResGroup152], (instregex "MMX_CVTTPD2PIirm")>;
				3141
				3142	def SKLWriteResGroup153 : SchedWriteRes<[SKLPort1,SKLPort23,SKLPort237,SKLPort06,SKLPort0156]> {
				3143	let Latency = 11;
				3144	let NumMicroOps = 6;
				3145	let ResourceCycles = [1,1,1,2,1];
				3146	}
				3147	def: InstRW<[SKLWriteResGroup153], (instregex "SHLD(16\|32\|64)mrCL")>;
				3148	def: InstRW<[SKLWriteResGroup153], (instregex "SHRD(16\|32\|64)mrCL")>;
				3149
				3150	def SKLWriteResGroup154 : SchedWriteRes<[SKLPort1,SKLPort06,SKLPort0156]> {
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	3151	let Latency = 11;
				3152	let NumMicroOps = 7;
				3153	let ResourceCycles = [2,3,2];
				3154	}
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	3155	def: InstRW<[SKLWriteResGroup154], (instregex "RCL(16\|32\|64)rCL")>;
				3156	def: InstRW<[SKLWriteResGroup154], (instregex "RCR(16\|32\|64)rCL")>;
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	3157
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	3158	def SKLWriteResGroup155 : SchedWriteRes<[SKLPort1,SKLPort06,SKLPort15,SKLPort0156]> {
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	3159	let Latency = 11;
				3160	let NumMicroOps = 9;
				3161	let ResourceCycles = [1,5,1,2];
				3162	}
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	3163	def: InstRW<[SKLWriteResGroup155], (instregex "RCL8rCL")>;
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	3164
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	3165	def SKLWriteResGroup156 : SchedWriteRes<[SKLPort06,SKLPort0156]> {
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	3166	let Latency = 11;
				3167	let NumMicroOps = 11;
				3168	let ResourceCycles = [2,9];
				3169	}
Craig Topper	2d451e7	2018-03-18 08:38:06 +0000	[diff] [blame]	3170	def: InstRW<[SKLWriteResGroup156], (instrs LOOPE)>;
				3171	def: InstRW<[SKLWriteResGroup156], (instrs LOOPNE)>;
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	3172
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	3173	def SKLWriteResGroup157 : SchedWriteRes<[SKLPort0]> {
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	3174	let Latency = 12;
				3175	let NumMicroOps = 1;
				3176	let ResourceCycles = [1];
				3177	}
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	3178	def: InstRW<[SKLWriteResGroup157], (instregex "VSQRTPSYr")>;
				3179	def: InstRW<[SKLWriteResGroup157], (instregex "VSQRTPSr")>;
				3180	def: InstRW<[SKLWriteResGroup157], (instregex "VSQRTSSr")>;
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	3181
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	3182	def SKLWriteResGroup158 : SchedWriteRes<[SKLPort5,SKLPort23]> {
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	3183	let Latency = 12;
				3184	let NumMicroOps = 2;
				3185	let ResourceCycles = [1,1];
				3186	}
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	3187	def: InstRW<[SKLWriteResGroup158], (instregex "PCLMULQDQrm")>;
				3188	def: InstRW<[SKLWriteResGroup158], (instregex "VPCLMULQDQrm")>;
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	3189
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	3190	def SKLWriteResGroup159 : SchedWriteRes<[SKLPort5,SKLPort01,SKLPort23]> {
				3191	let Latency = 12;
				3192	let NumMicroOps = 4;
				3193	let ResourceCycles = [2,1,1];
				3194	}
				3195	def: InstRW<[SKLWriteResGroup159], (instregex "HADDPDrm")>;
				3196	def: InstRW<[SKLWriteResGroup159], (instregex "HADDPSrm")>;
				3197	def: InstRW<[SKLWriteResGroup159], (instregex "HSUBPDrm")>;
				3198	def: InstRW<[SKLWriteResGroup159], (instregex "HSUBPSrm")>;
				3199	def: InstRW<[SKLWriteResGroup159], (instregex "VHADDPDrm")>;
				3200	def: InstRW<[SKLWriteResGroup159], (instregex "VHADDPSrm")>;
				3201	def: InstRW<[SKLWriteResGroup159], (instregex "VHSUBPDrm")>;
				3202	def: InstRW<[SKLWriteResGroup159], (instregex "VHSUBPSrm")>;
				3203
				3204	def SKLWriteResGroup160 : SchedWriteRes<[SKLPort0,SKLPort5,SKLPort23,SKLPort015]> {
				3205	let Latency = 12;
				3206	let NumMicroOps = 4;
				3207	let ResourceCycles = [1,1,1,1];
				3208	}
				3209	def: InstRW<[SKLWriteResGroup160], (instregex "CVTTSS2SI64rm")>;
				3210
				3211	def SKLWriteResGroup161 : SchedWriteRes<[SKLPort0]> {
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	3212	let Latency = 13;
				3213	let NumMicroOps = 1;
				3214	let ResourceCycles = [1];
				3215	}
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	3216	def: InstRW<[SKLWriteResGroup161], (instregex "SQRTPSr")>;
				3217	def: InstRW<[SKLWriteResGroup161], (instregex "SQRTSSr")>;
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	3218
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	3219	def SKLWriteResGroup162 : SchedWriteRes<[SKLPort5,SKLPort23]> {
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	3220	let Latency = 13;
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	3221	let NumMicroOps = 3;
				3222	let ResourceCycles = [2,1];
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	3223	}
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	3224	def: InstRW<[SKLWriteResGroup162], (instregex "ADD_FI16m")>;
				3225	def: InstRW<[SKLWriteResGroup162], (instregex "ADD_FI32m")>;
				3226	def: InstRW<[SKLWriteResGroup162], (instregex "SUBR_FI16m")>;
				3227	def: InstRW<[SKLWriteResGroup162], (instregex "SUBR_FI32m")>;
				3228	def: InstRW<[SKLWriteResGroup162], (instregex "SUB_FI16m")>;
				3229	def: InstRW<[SKLWriteResGroup162], (instregex "SUB_FI32m")>;
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	3230
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	3231	def SKLWriteResGroup163 : SchedWriteRes<[SKLPort0,SKLPort5,SKLPort23]> {
				3232	let Latency = 13;
				3233	let NumMicroOps = 3;
				3234	let ResourceCycles = [1,1,1];
				3235	}
				3236	def: InstRW<[SKLWriteResGroup163], (instregex "VCVTDQ2PDYrm")>;
				3237
				3238	def SKLWriteResGroup164 : SchedWriteRes<[SKLPort5,SKLPort015]> {
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	3239	let Latency = 13;
				3240	let NumMicroOps = 4;
				3241	let ResourceCycles = [1,3];
				3242	}
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	3243	def: InstRW<[SKLWriteResGroup164], (instregex "DPPSrri")>;
				3244	def: InstRW<[SKLWriteResGroup164], (instregex "VDPPSYrri")>;
				3245	def: InstRW<[SKLWriteResGroup164], (instregex "VDPPSrri")>;
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	3246
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	3247	def SKLWriteResGroup165 : SchedWriteRes<[SKLPort5,SKLPort01,SKLPort23]> {
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	3248	let Latency = 13;
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	3249	let NumMicroOps = 4;
				3250	let ResourceCycles = [2,1,1];
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	3251	}
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	3252	def: InstRW<[SKLWriteResGroup165], (instregex "VHADDPDYrm")>;
				3253	def: InstRW<[SKLWriteResGroup165], (instregex "VHADDPSYrm")>;
				3254	def: InstRW<[SKLWriteResGroup165], (instregex "VHSUBPDYrm")>;
				3255	def: InstRW<[SKLWriteResGroup165], (instregex "VHSUBPSYrm")>;
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	3256
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	3257	def SKLWriteResGroup166 : SchedWriteRes<[SKLPort0]> {
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	3258	let Latency = 14;
				3259	let NumMicroOps = 1;
				3260	let ResourceCycles = [1];
				3261	}
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	3262	def: InstRW<[SKLWriteResGroup166], (instregex "DIVPDrr")>;
				3263	def: InstRW<[SKLWriteResGroup166], (instregex "DIVSDrr")>;
				3264	def: InstRW<[SKLWriteResGroup166], (instregex "VDIVPDYrr")>;
				3265	def: InstRW<[SKLWriteResGroup166], (instregex "VDIVPDrr")>;
				3266	def: InstRW<[SKLWriteResGroup166], (instregex "VDIVSDrr")>;
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	3267
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	3268	def SKLWriteResGroup167 : SchedWriteRes<[SKLPort0,SKLPort23]> {
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	3269	let Latency = 14;
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	3270	let NumMicroOps = 3;
				3271	let ResourceCycles = [2,1];
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	3272	}
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	3273	def: InstRW<[SKLWriteResGroup167], (instregex "AESIMCrm")>;
				3274	def: InstRW<[SKLWriteResGroup167], (instregex "VAESIMCrm")>;
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	3275
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	3276	def SKLWriteResGroup168 : SchedWriteRes<[SKLPort23,SKLPort015]> {
				3277	let Latency = 14;
				3278	let NumMicroOps = 3;
				3279	let ResourceCycles = [1,2];
				3280	}
				3281	def: InstRW<[SKLWriteResGroup168], (instregex "PMULLDrm")>;
				3282	def: InstRW<[SKLWriteResGroup168], (instregex "ROUNDPDm")>;
				3283	def: InstRW<[SKLWriteResGroup168], (instregex "ROUNDPSm")>;
				3284	def: InstRW<[SKLWriteResGroup168], (instregex "ROUNDSDm")>;
				3285	def: InstRW<[SKLWriteResGroup168], (instregex "ROUNDSSm")>;
				3286	def: InstRW<[SKLWriteResGroup168], (instregex "VPMULLDrm")>;
				3287	def: InstRW<[SKLWriteResGroup168], (instregex "VROUNDPDm")>;
				3288	def: InstRW<[SKLWriteResGroup168], (instregex "VROUNDPSm")>;
				3289	def: InstRW<[SKLWriteResGroup168], (instregex "VROUNDSDm")>;
				3290	def: InstRW<[SKLWriteResGroup168], (instregex "VROUNDSSm")>;
				3291
				3292	def SKLWriteResGroup169 : SchedWriteRes<[SKLPort0,SKLPort5,SKLPort23]> {
				3293	let Latency = 14;
				3294	let NumMicroOps = 3;
				3295	let ResourceCycles = [1,1,1];
				3296	}
				3297	def: InstRW<[SKLWriteResGroup169], (instregex "MUL_FI16m")>;
				3298	def: InstRW<[SKLWriteResGroup169], (instregex "MUL_FI32m")>;
				3299
				3300	def SKLWriteResGroup170 : SchedWriteRes<[SKLPort1,SKLPort06,SKLPort15,SKLPort0156]> {
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	3301	let Latency = 14;
				3302	let NumMicroOps = 10;
				3303	let ResourceCycles = [2,4,1,3];
				3304	}
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	3305	def: InstRW<[SKLWriteResGroup170], (instregex "RCR8rCL")>;
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	3306
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	3307	def SKLWriteResGroup171 : SchedWriteRes<[SKLPort0]> {
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	3308	let Latency = 15;
				3309	let NumMicroOps = 1;
				3310	let ResourceCycles = [1];
				3311	}
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	3312	def: InstRW<[SKLWriteResGroup171], (instregex "DIVR_FPrST0")>;
				3313	def: InstRW<[SKLWriteResGroup171], (instregex "DIVR_FST0r")>;
				3314	def: InstRW<[SKLWriteResGroup171], (instregex "DIVR_FrST0")>;
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	3315
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	3316	def SKLWriteResGroup172 : SchedWriteRes<[SKLPort23,SKLPort015]> {
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	3317	let Latency = 15;
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	3318	let NumMicroOps = 3;
				3319	let ResourceCycles = [1,2];
				3320	}
				3321	def: InstRW<[SKLWriteResGroup172], (instregex "VPMULLDYrm")>;
				3322	def: InstRW<[SKLWriteResGroup172], (instregex "VROUNDYPDm")>;
				3323	def: InstRW<[SKLWriteResGroup172], (instregex "VROUNDYPSm")>;
				3324
				3325	def SKLWriteResGroup173 : SchedWriteRes<[SKLPort5,SKLPort23,SKLPort015]> {
				3326	let Latency = 15;
				3327	let NumMicroOps = 4;
				3328	let ResourceCycles = [1,1,2];
				3329	}
				3330	def: InstRW<[SKLWriteResGroup173], (instregex "DPPDrmi")>;
				3331	def: InstRW<[SKLWriteResGroup173], (instregex "VDPPDrmi")>;
				3332
				3333	def SKLWriteResGroup174 : SchedWriteRes<[SKLPort1,SKLPort23,SKLPort237,SKLPort06,SKLPort15,SKLPort0156]> {
				3334	let Latency = 15;
				3335	let NumMicroOps = 10;
				3336	let ResourceCycles = [1,1,1,5,1,1];
				3337	}
Craig Topper	13a1650	2018-03-19 00:56:09 +0000	[diff] [blame]	3338	def: InstRW<[SKLWriteResGroup174], (instregex "RCL(8\|16\|32\|64)mCL")>;
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	3339
				3340	def SKLWriteResGroup175 : SchedWriteRes<[SKLPort0,SKLPort23]> {
				3341	let Latency = 16;
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	3342	let NumMicroOps = 2;
				3343	let ResourceCycles = [1,1];
				3344	}
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	3345	def: InstRW<[SKLWriteResGroup175], (instregex "DIVSSrm")>;
				3346	def: InstRW<[SKLWriteResGroup175], (instregex "VDIVSSrm")>;
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	3347
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	3348	def SKLWriteResGroup176 : SchedWriteRes<[SKLPort0,SKLPort23]> {
				3349	let Latency = 16;
				3350	let NumMicroOps = 4;
				3351	let ResourceCycles = [3,1];
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	3352	}
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	3353	def: InstRW<[SKLWriteResGroup176], (instregex "PCMPISTRIrm")>;
				3354	def: InstRW<[SKLWriteResGroup176], (instregex "PCMPISTRM128rm")>;
				3355	def: InstRW<[SKLWriteResGroup176], (instregex "VPCMPISTRIrm")>;
				3356	def: InstRW<[SKLWriteResGroup176], (instregex "VPCMPISTRM128rm")>;
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	3357
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	3358	def SKLWriteResGroup177 : SchedWriteRes<[SKLPort4,SKLPort23,SKLPort237,SKLPort06,SKLPort15,SKLPort0156]> {
				3359	let Latency = 16;
				3360	let NumMicroOps = 14;
				3361	let ResourceCycles = [1,1,1,4,2,5];
				3362	}
				3363	def: InstRW<[SKLWriteResGroup177], (instregex "CMPXCHG8B")>;
				3364
				3365	def SKLWriteResGroup178 : SchedWriteRes<[SKLPort0156]> {
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	3366	let Latency = 16;
				3367	let NumMicroOps = 16;
				3368	let ResourceCycles = [16];
				3369	}
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	3370	def: InstRW<[SKLWriteResGroup178], (instregex "VZEROALL")>;
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	3371
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	3372	def SKLWriteResGroup179 : SchedWriteRes<[SKLPort0,SKLPort23]> {
				3373	let Latency = 17;
				3374	let NumMicroOps = 2;
				3375	let ResourceCycles = [1,1];
				3376	}
				3377	def: InstRW<[SKLWriteResGroup179], (instregex "DIVPSrm")>;
				3378	def: InstRW<[SKLWriteResGroup179], (instregex "VDIVPSrm")>;
				3379	def: InstRW<[SKLWriteResGroup179], (instregex "VSQRTSSm")>;
				3380
				3381	def SKLWriteResGroup180 : SchedWriteRes<[SKLPort0,SKLPort1,SKLPort5,SKLPort6,SKLPort05,SKLPort0156]> {
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	3382	let Latency = 17;
				3383	let NumMicroOps = 15;
				3384	let ResourceCycles = [2,1,2,4,2,4];
				3385	}
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	3386	def: InstRW<[SKLWriteResGroup180], (instregex "XCH_F")>;
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	3387
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	3388	def SKLWriteResGroup181 : SchedWriteRes<[SKLPort0]> {
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	3389	let Latency = 18;
				3390	let NumMicroOps = 1;
				3391	let ResourceCycles = [1];
				3392	}
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	3393	def: InstRW<[SKLWriteResGroup181], (instregex "VSQRTPDYr")>;
				3394	def: InstRW<[SKLWriteResGroup181], (instregex "VSQRTPDr")>;
				3395	def: InstRW<[SKLWriteResGroup181], (instregex "VSQRTSDr")>;
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	3396
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	3397	def SKLWriteResGroup182 : SchedWriteRes<[SKLPort0,SKLPort23]> {
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	3398	let Latency = 18;
				3399	let NumMicroOps = 2;
				3400	let ResourceCycles = [1,1];
				3401	}
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	3402	def: InstRW<[SKLWriteResGroup182], (instregex "SQRTSSm")>;
				3403	def: InstRW<[SKLWriteResGroup182], (instregex "VDIVPSYrm")>;
				3404	def: InstRW<[SKLWriteResGroup182], (instregex "VSQRTPSm")>;
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	3405
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	3406	def SKLWriteResGroup183 : SchedWriteRes<[SKLPort0,SKLPort5,SKLPort0156]> {
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	3407	let Latency = 18;
				3408	let NumMicroOps = 8;
				3409	let ResourceCycles = [4,3,1];
				3410	}
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	3411	def: InstRW<[SKLWriteResGroup183], (instregex "PCMPESTRIrr")>;
				3412	def: InstRW<[SKLWriteResGroup183], (instregex "VPCMPESTRIrr")>;
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	3413
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	3414	def SKLWriteResGroup184 : SchedWriteRes<[SKLPort5,SKLPort6,SKLPort06,SKLPort0156]> {
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	3415	let Latency = 18;
				3416	let NumMicroOps = 8;
				3417	let ResourceCycles = [1,1,1,5];
				3418	}
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	3419	def: InstRW<[SKLWriteResGroup184], (instregex "CPUID")>;
Craig Topper	2d451e7	2018-03-18 08:38:06 +0000	[diff] [blame]	3420	def: InstRW<[SKLWriteResGroup184], (instrs RDTSC)>;
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	3421
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	3422	def SKLWriteResGroup185 : SchedWriteRes<[SKLPort1,SKLPort23,SKLPort237,SKLPort06,SKLPort15,SKLPort0156]> {
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	3423	let Latency = 18;
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	3424	let NumMicroOps = 11;
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	3425	let ResourceCycles = [2,1,1,4,1,2];
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	3426	}
Craig Topper	13a1650	2018-03-19 00:56:09 +0000	[diff] [blame]	3427	def: InstRW<[SKLWriteResGroup185], (instregex "RCR(8\|16\|32\|64)mCL")>;
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	3428
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	3429	def SKLWriteResGroup186 : SchedWriteRes<[SKLPort0,SKLPort23]> {
				3430	let Latency = 19;
				3431	let NumMicroOps = 2;
				3432	let ResourceCycles = [1,1];
				3433	}
				3434	def: InstRW<[SKLWriteResGroup186], (instregex "DIVSDrm")>;
				3435	def: InstRW<[SKLWriteResGroup186], (instregex "SQRTPSm")>;
				3436	def: InstRW<[SKLWriteResGroup186], (instregex "VDIVSDrm")>;
				3437	def: InstRW<[SKLWriteResGroup186], (instregex "VSQRTPSYm")>;
				3438
				3439	def SKLWriteResGroup187 : SchedWriteRes<[SKLPort5,SKLPort23,SKLPort015]> {
				3440	let Latency = 19;
				3441	let NumMicroOps = 5;
				3442	let ResourceCycles = [1,1,3];
				3443	}
				3444	def: InstRW<[SKLWriteResGroup187], (instregex "DPPSrmi")>;
				3445	def: InstRW<[SKLWriteResGroup187], (instregex "VDPPSrmi")>;
				3446
				3447	def SKLWriteResGroup188 : SchedWriteRes<[SKLPort0,SKLPort5,SKLPort015,SKLPort0156]> {
				3448	let Latency = 19;
				3449	let NumMicroOps = 9;
				3450	let ResourceCycles = [4,3,1,1];
				3451	}
				3452	def: InstRW<[SKLWriteResGroup188], (instregex "PCMPESTRM128rr")>;
				3453	def: InstRW<[SKLWriteResGroup188], (instregex "VPCMPESTRM128rr")>;
				3454
				3455	def SKLWriteResGroup189 : SchedWriteRes<[SKLPort0]> {
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	3456	let Latency = 20;
				3457	let NumMicroOps = 1;
				3458	let ResourceCycles = [1];
				3459	}
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	3460	def: InstRW<[SKLWriteResGroup189], (instregex "DIV_FPrST0")>;
				3461	def: InstRW<[SKLWriteResGroup189], (instregex "DIV_FST0r")>;
				3462	def: InstRW<[SKLWriteResGroup189], (instregex "DIV_FrST0")>;
				3463	def: InstRW<[SKLWriteResGroup189], (instregex "SQRTPDr")>;
				3464	def: InstRW<[SKLWriteResGroup189], (instregex "SQRTSDr")>;
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	3465
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	3466	def SKLWriteResGroup190 : SchedWriteRes<[SKLPort0,SKLPort23]> {
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	3467	let Latency = 20;
				3468	let NumMicroOps = 2;
				3469	let ResourceCycles = [1,1];
				3470	}
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	3471	def: InstRW<[SKLWriteResGroup190], (instregex "DIVPDrm")>;
				3472	def: InstRW<[SKLWriteResGroup190], (instregex "VDIVPDrm")>;
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	3473
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	3474	def SKLWriteResGroup191 : SchedWriteRes<[SKLPort5,SKLPort23,SKLPort015]> {
				3475	let Latency = 20;
				3476	let NumMicroOps = 5;
				3477	let ResourceCycles = [1,1,3];
				3478	}
				3479	def: InstRW<[SKLWriteResGroup191], (instregex "VDPPSYrmi")>;
				3480
				3481	def SKLWriteResGroup192 : SchedWriteRes<[SKLPort4,SKLPort5,SKLPort6,SKLPort23,SKLPort237,SKLPort06,SKLPort0156]> {
				3482	let Latency = 20;
				3483	let NumMicroOps = 8;
				3484	let ResourceCycles = [1,1,1,1,1,1,2];
				3485	}
				3486	def: InstRW<[SKLWriteResGroup192], (instregex "INSB")>;
				3487	def: InstRW<[SKLWriteResGroup192], (instregex "INSL")>;
				3488	def: InstRW<[SKLWriteResGroup192], (instregex "INSW")>;
				3489
				3490	def SKLWriteResGroup193 : SchedWriteRes<[SKLPort5,SKLPort6,SKLPort0156]> {
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	3491	let Latency = 20;
				3492	let NumMicroOps = 10;
				3493	let ResourceCycles = [1,2,7];
				3494	}
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	3495	def: InstRW<[SKLWriteResGroup193], (instregex "MWAITrr")>;
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	3496
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	3497	def SKLWriteResGroup194 : SchedWriteRes<[SKLPort0,SKLPort5,SKLPort015]> {
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	3498	let Latency = 20;
				3499	let NumMicroOps = 11;
				3500	let ResourceCycles = [3,6,2];
				3501	}
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	3502	def: InstRW<[SKLWriteResGroup194], (instregex "AESKEYGENASSIST128rr")>;
				3503	def: InstRW<[SKLWriteResGroup194], (instregex "VAESKEYGENASSIST128rr")>;
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	3504
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	3505	def SKLWriteResGroup195 : SchedWriteRes<[SKLPort0,SKLPort23]> {
				3506	let Latency = 21;
				3507	let NumMicroOps = 2;
				3508	let ResourceCycles = [1,1];
				3509	}
				3510	def: InstRW<[SKLWriteResGroup195], (instregex "VDIVPDYrm")>;
				3511
				3512	def SKLWriteResGroup196 : SchedWriteRes<[SKLPort0,SKLPort23]> {
				3513	let Latency = 22;
				3514	let NumMicroOps = 2;
				3515	let ResourceCycles = [1,1];
				3516	}
				3517	def: InstRW<[SKLWriteResGroup196], (instregex "DIV_F32m")>;
				3518	def: InstRW<[SKLWriteResGroup196], (instregex "DIV_F64m")>;
				3519
				3520	def SKLWriteResGroup196_1 : SchedWriteRes<[SKLPort0, SKLPort23, SKLPort5, SKLPort015]> {
				3521	let Latency = 22;
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	3522	let NumMicroOps = 5;
				3523	let ResourceCycles = [1,2,1,1];
				3524	}
Craig Topper	17a3118	2017-12-16 18:35:29 +0000	[diff] [blame]	3525	def: InstRW<[SKLWriteResGroup196_1], (instrs VGATHERDPSrm,
				3526	VGATHERDPDrm,
				3527	VGATHERQPDrm,
				3528	VGATHERQPSrm,
				3529	VPGATHERDDrm,
				3530	VPGATHERDQrm,
				3531	VPGATHERQDrm,
				3532	VPGATHERQQrm)>;
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	3533
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	3534	def SKLWriteResGroup196_2 : SchedWriteRes<[SKLPort0, SKLPort23, SKLPort5, SKLPort015]> {
				3535	let Latency = 25;
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	3536	let NumMicroOps = 5;
				3537	let ResourceCycles = [1,2,1,1];
				3538	}
Craig Topper	17a3118	2017-12-16 18:35:29 +0000	[diff] [blame]	3539	def: InstRW<[SKLWriteResGroup196_2], (instrs VGATHERDPSYrm,
				3540	VGATHERQPDYrm,
				3541	VGATHERQPSYrm,
				3542	VPGATHERDDYrm,
				3543	VPGATHERDQYrm,
				3544	VPGATHERQDYrm,
				3545	VPGATHERQQYrm,
				3546	VGATHERDPDYrm)>;
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	3547
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	3548	def SKLWriteResGroup197 : SchedWriteRes<[SKLPort0,SKLPort23]> {
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	3549	let Latency = 23;
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	3550	let NumMicroOps = 2;
				3551	let ResourceCycles = [1,1];
				3552	}
				3553	def: InstRW<[SKLWriteResGroup197], (instregex "VSQRTSDm")>;
				3554
				3555	def SKLWriteResGroup198 : SchedWriteRes<[SKLPort0,SKLPort4,SKLPort5,SKLPort23,SKLPort237,SKLPort06,SKLPort0156]> {
				3556	let Latency = 23;
				3557	let NumMicroOps = 19;
				3558	let ResourceCycles = [2,1,4,1,1,4,6];
				3559	}
				3560	def: InstRW<[SKLWriteResGroup198], (instregex "CMPXCHG16B")>;
				3561
				3562	def SKLWriteResGroup199 : SchedWriteRes<[SKLPort0,SKLPort23]> {
				3563	let Latency = 24;
				3564	let NumMicroOps = 2;
				3565	let ResourceCycles = [1,1];
				3566	}
				3567	def: InstRW<[SKLWriteResGroup199], (instregex "VSQRTPDm")>;
				3568
				3569	def SKLWriteResGroup200 : SchedWriteRes<[SKLPort0,SKLPort5,SKLPort23,SKLPort0156]> {
				3570	let Latency = 24;
				3571	let NumMicroOps = 9;
				3572	let ResourceCycles = [4,3,1,1];
				3573	}
				3574	def: InstRW<[SKLWriteResGroup200], (instregex "PCMPESTRIrm")>;
				3575	def: InstRW<[SKLWriteResGroup200], (instregex "VPCMPESTRIrm")>;
				3576
				3577	def SKLWriteResGroup201 : SchedWriteRes<[SKLPort0,SKLPort23]> {
				3578	let Latency = 25;
				3579	let NumMicroOps = 2;
				3580	let ResourceCycles = [1,1];
				3581	}
				3582	def: InstRW<[SKLWriteResGroup201], (instregex "SQRTSDm")>;
				3583	def: InstRW<[SKLWriteResGroup201], (instregex "VSQRTPDYm")>;
				3584
				3585	def SKLWriteResGroup202 : SchedWriteRes<[SKLPort0,SKLPort5,SKLPort23]> {
				3586	let Latency = 25;
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	3587	let NumMicroOps = 3;
				3588	let ResourceCycles = [1,1,1];
				3589	}
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	3590	def: InstRW<[SKLWriteResGroup202], (instregex "DIV_FI16m")>;
				3591	def: InstRW<[SKLWriteResGroup202], (instregex "DIV_FI32m")>;
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	3592
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	3593	def SKLWriteResGroup203 : SchedWriteRes<[SKLPort0,SKLPort5,SKLPort23,SKLPort015,SKLPort0156]> {
				3594	let Latency = 25;
				3595	let NumMicroOps = 10;
				3596	let ResourceCycles = [4,3,1,1,1];
				3597	}
				3598	def: InstRW<[SKLWriteResGroup203], (instregex "PCMPESTRM128rm")>;
				3599	def: InstRW<[SKLWriteResGroup203], (instregex "VPCMPESTRM128rm")>;
				3600
				3601	def SKLWriteResGroup204 : SchedWriteRes<[SKLPort0,SKLPort5,SKLPort23,SKLPort015]> {
				3602	let Latency = 25;
				3603	let NumMicroOps = 11;
				3604	let ResourceCycles = [3,6,1,1];
				3605	}
				3606	def: InstRW<[SKLWriteResGroup204], (instregex "AESKEYGENASSIST128rm")>;
				3607	def: InstRW<[SKLWriteResGroup204], (instregex "VAESKEYGENASSIST128rm")>;
				3608
				3609	def SKLWriteResGroup205 : SchedWriteRes<[SKLPort0,SKLPort23]> {
				3610	let Latency = 26;
				3611	let NumMicroOps = 2;
				3612	let ResourceCycles = [1,1];
				3613	}
				3614	def: InstRW<[SKLWriteResGroup205], (instregex "SQRTPDm")>;
				3615
				3616	def SKLWriteResGroup206 : SchedWriteRes<[SKLPort0,SKLPort23]> {
				3617	let Latency = 27;
				3618	let NumMicroOps = 2;
				3619	let ResourceCycles = [1,1];
				3620	}
				3621	def: InstRW<[SKLWriteResGroup206], (instregex "DIVR_F32m")>;
				3622	def: InstRW<[SKLWriteResGroup206], (instregex "DIVR_F64m")>;
				3623
				3624	def SKLWriteResGroup207 : SchedWriteRes<[SKLPort0,SKLPort5,SKLPort23,SKLPort0156]> {
				3625	let Latency = 28;
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	3626	let NumMicroOps = 8;
				3627	let ResourceCycles = [2,4,1,1];
				3628	}
Craig Topper	13a1650	2018-03-19 00:56:09 +0000	[diff] [blame]	3629	def: InstRW<[SKLWriteResGroup207], (instregex "IDIV(8\|16\|32\|64)m")>;
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	3630
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	3631	def SKLWriteResGroup208 : SchedWriteRes<[SKLPort0,SKLPort5,SKLPort23]> {
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	3632	let Latency = 30;
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	3633	let NumMicroOps = 3;
				3634	let ResourceCycles = [1,1,1];
				3635	}
				3636	def: InstRW<[SKLWriteResGroup208], (instregex "DIVR_FI16m")>;
				3637	def: InstRW<[SKLWriteResGroup208], (instregex "DIVR_FI32m")>;
				3638
				3639	def SKLWriteResGroup209 : SchedWriteRes<[SKLPort5,SKLPort6,SKLPort23,SKLPort06,SKLPort0156]> {
				3640	let Latency = 35;
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	3641	let NumMicroOps = 23;
				3642	let ResourceCycles = [1,5,3,4,10];
				3643	}
Craig Topper	13a1650	2018-03-19 00:56:09 +0000	[diff] [blame]	3644	def: InstRW<[SKLWriteResGroup209], (instregex "IN(8\|16\|32)ri")>;
				3645	def: InstRW<[SKLWriteResGroup209], (instregex "IN(8\|16\|32)rr")>;
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	3646
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	3647	def SKLWriteResGroup210 : SchedWriteRes<[SKLPort5,SKLPort6,SKLPort23,SKLPort237,SKLPort06,SKLPort0156]> {
				3648	let Latency = 35;
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	3649	let NumMicroOps = 23;
				3650	let ResourceCycles = [1,5,2,1,4,10];
				3651	}
Craig Topper	13a1650	2018-03-19 00:56:09 +0000	[diff] [blame]	3652	def: InstRW<[SKLWriteResGroup210], (instregex "OUT(8\|16\|32)ir")>;
				3653	def: InstRW<[SKLWriteResGroup210], (instregex "OUT(8\|16\|32)rr")>;
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	3654
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	3655	def SKLWriteResGroup211 : SchedWriteRes<[SKLPort1,SKLPort6,SKLPort23,SKLPort0156]> {
				3656	let Latency = 37;
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	3657	let NumMicroOps = 31;
				3658	let ResourceCycles = [1,8,1,21];
				3659	}
Craig Topper	391c6f9	2017-12-10 01:24:08 +0000	[diff] [blame]	3660	def: InstRW<[SKLWriteResGroup211], (instregex "XRSTOR(64)?")>;
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	3661
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	3662	def SKLWriteResGroup212 : SchedWriteRes<[SKLPort1,SKLPort4,SKLPort5,SKLPort6,SKLPort23,SKLPort237,SKLPort15,SKLPort0156]> {
				3663	let Latency = 40;
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	3664	let NumMicroOps = 18;
				3665	let ResourceCycles = [1,1,2,3,1,1,1,8];
				3666	}
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	3667	def: InstRW<[SKLWriteResGroup212], (instregex "VMCLEARm")>;
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	3668
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	3669	def SKLWriteResGroup213 : SchedWriteRes<[SKLPort4,SKLPort6,SKLPort23,SKLPort237,SKLPort0156]> {
				3670	let Latency = 41;
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	3671	let NumMicroOps = 39;
				3672	let ResourceCycles = [1,10,1,1,26];
				3673	}
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	3674	def: InstRW<[SKLWriteResGroup213], (instregex "XSAVE64")>;
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	3675
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	3676	def SKLWriteResGroup214 : SchedWriteRes<[SKLPort5,SKLPort0156]> {
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	3677	let Latency = 42;
				3678	let NumMicroOps = 22;
				3679	let ResourceCycles = [2,20];
				3680	}
Craig Topper	2d451e7	2018-03-18 08:38:06 +0000	[diff] [blame]	3681	def: InstRW<[SKLWriteResGroup214], (instrs RDTSCP)>;
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	3682
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	3683	def SKLWriteResGroup215 : SchedWriteRes<[SKLPort4,SKLPort6,SKLPort23,SKLPort237,SKLPort0156]> {
				3684	let Latency = 42;
				3685	let NumMicroOps = 40;
				3686	let ResourceCycles = [1,11,1,1,26];
				3687	}
Craig Topper	391c6f9	2017-12-10 01:24:08 +0000	[diff] [blame]	3688	def: InstRW<[SKLWriteResGroup215], (instregex "^XSAVE$", "XSAVEC", "XSAVES")>;
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	3689
				3690	def SKLWriteResGroup216 : SchedWriteRes<[SKLPort4,SKLPort6,SKLPort23,SKLPort237,SKLPort0156]> {
				3691	let Latency = 46;
				3692	let NumMicroOps = 44;
				3693	let ResourceCycles = [1,11,1,1,30];
				3694	}
				3695	def: InstRW<[SKLWriteResGroup216], (instregex "XSAVEOPT")>;
				3696
				3697	def SKLWriteResGroup217 : SchedWriteRes<[SKLPort0,SKLPort23,SKLPort05,SKLPort06,SKLPort0156]> {
				3698	let Latency = 62;
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	3699	let NumMicroOps = 64;
				3700	let ResourceCycles = [2,8,5,10,39];
				3701	}
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	3702	def: InstRW<[SKLWriteResGroup217], (instregex "FLDENVm")>;
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	3703
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	3704	def SKLWriteResGroup218 : SchedWriteRes<[SKLPort0,SKLPort6,SKLPort23,SKLPort05,SKLPort06,SKLPort15,SKLPort0156]> {
				3705	let Latency = 63;
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	3706	let NumMicroOps = 88;
				3707	let ResourceCycles = [4,4,31,1,2,1,45];
				3708	}
Craig Topper	2d451e7	2018-03-18 08:38:06 +0000	[diff] [blame]	3709	def: InstRW<[SKLWriteResGroup218], (instrs FXRSTOR64)>;
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	3710
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	3711	def SKLWriteResGroup219 : SchedWriteRes<[SKLPort0,SKLPort6,SKLPort23,SKLPort05,SKLPort06,SKLPort15,SKLPort0156]> {
				3712	let Latency = 63;
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	3713	let NumMicroOps = 90;
				3714	let ResourceCycles = [4,2,33,1,2,1,47];
				3715	}
Craig Topper	2d451e7	2018-03-18 08:38:06 +0000	[diff] [blame]	3716	def: InstRW<[SKLWriteResGroup219], (instrs FXRSTOR)>;
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	3717
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	3718	def SKLWriteResGroup220 : SchedWriteRes<[SKLPort5,SKLPort05,SKLPort0156]> {
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	3719	let Latency = 75;
				3720	let NumMicroOps = 15;
				3721	let ResourceCycles = [6,3,6];
				3722	}
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	3723	def: InstRW<[SKLWriteResGroup220], (instregex "FNINIT")>;
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	3724
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	3725	def SKLWriteResGroup221 : SchedWriteRes<[SKLPort0,SKLPort1,SKLPort5,SKLPort6,SKLPort05,SKLPort0156]> {
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	3726	let Latency = 76;
				3727	let NumMicroOps = 32;
				3728	let ResourceCycles = [7,2,8,3,1,11];
				3729	}
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	3730	def: InstRW<[SKLWriteResGroup221], (instregex "DIV(16\|32\|64)r")>;
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	3731
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	3732	def SKLWriteResGroup222 : SchedWriteRes<[SKLPort0,SKLPort1,SKLPort5,SKLPort6,SKLPort06,SKLPort0156]> {
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	3733	let Latency = 102;
				3734	let NumMicroOps = 66;
				3735	let ResourceCycles = [4,2,4,8,14,34];
				3736	}
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	3737	def: InstRW<[SKLWriteResGroup222], (instregex "IDIV(16\|32\|64)r")>;
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	3738
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	3739	def SKLWriteResGroup223 : SchedWriteRes<[SKLPort0,SKLPort1,SKLPort4,SKLPort5,SKLPort6,SKLPort237,SKLPort06,SKLPort0156]> {
				3740	let Latency = 106;
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	3741	let NumMicroOps = 100;
				3742	let ResourceCycles = [9,1,11,16,1,11,21,30];
				3743	}
Gadi Haber	1e0f1f4	2017-10-17 06:47:04 +0000	[diff] [blame]	3744	def: InstRW<[SKLWriteResGroup223], (instregex "FSTENVm")>;
Gadi Haber	6f8fbf4	2017-09-19 06:19:27 +0000	[diff] [blame]	3745
				3746	} // SchedModel