Gitiles
Code Review Sign In
gerrit-public.fairphone.software / toolchain / llvm-project / ded02af45e097f6468d9be962b4c630dac00ac38 / . / llvm / test / CodeGen / Mips / fmadd1.ll
blob: bd672ef4b00a7a2549c3b53dc225d733999b1610 [file] [log] [blame]
Daniel Sandersb282f1f2014-04-09 09:56:43 +0000[diff] [blame]1; Check that madd.[ds], msub.[ds], nmadd.[ds], and nmsub.[ds] are supported
2; correctly.
3; The spec for nmadd.[ds], and nmsub.[ds] does not state that they obey the
4; the Has2008 and ABS2008 configuration bits which govern the conformance to
5; IEEE 754 (1985) and IEEE 754 (2008). These instructions are therefore only
6; available when -enable-no-nans-fp-math is given.
7
Daniel Sandersded02af2014-06-12 11:04:18 +0000[diff] [blame^]8; RUN: llc < %s -march=mipsel -mcpu=mips32 -enable-no-nans-fp-math | FileCheck %s -check-prefix=ALL -check-prefix=32 -check-prefix=32-NONAN
9; RUN: llc < %s -march=mipsel -mcpu=mips32r2 -enable-no-nans-fp-math | FileCheck %s -check-prefix=ALL -check-prefix=32R2 -check-prefix=32R2-NONAN
10; RUN: llc < %s -march=mipsel -mcpu=mips32r6 -enable-no-nans-fp-math | FileCheck %s -check-prefix=ALL -check-prefix=32R6 -check-prefix=32R6-NONAN
11; RUN: llc < %s -march=mips64el -mcpu=mips64 -mattr=n64 -enable-no-nans-fp-math | FileCheck %s -check-prefix=ALL -check-prefix=64 -check-prefix=64-NONAN
12; RUN: llc < %s -march=mips64el -mcpu=mips64r2 -mattr=n64 -enable-no-nans-fp-math | FileCheck %s -check-prefix=ALL -check-prefix=64R2 -check-prefix=64R2-NONAN
13; RUN: llc < %s -march=mips64el -mcpu=mips64r6 -mattr=n64 -enable-no-nans-fp-math | FileCheck %s -check-prefix=ALL -check-prefix=64R6 -check-prefix=64R6-NONAN
14; RUN: llc < %s -march=mipsel -mcpu=mips32 | FileCheck %s -check-prefix=ALL -check-prefix=32 -check-prefix=32-NAN
15; RUN: llc < %s -march=mipsel -mcpu=mips32r2 | FileCheck %s -check-prefix=ALL -check-prefix=32R2 -check-prefix=32R2-NAN
16; RUN: llc < %s -march=mipsel -mcpu=mips32r6 | FileCheck %s -check-prefix=ALL -check-prefix=32R6 -check-prefix=32R6-NAN
17; RUN: llc < %s -march=mips64el -mcpu=mips64 -mattr=n64 | FileCheck %s -check-prefix=ALL -check-prefix=64 -check-prefix=64-NAN
18; RUN: llc < %s -march=mips64el -mcpu=mips64r2 -mattr=n64 | FileCheck %s -check-prefix=ALL -check-prefix=64R2 -check-prefix=64R2-NAN
19; RUN: llc < %s -march=mips64el -mcpu=mips64r6 -mattr=n64 | FileCheck %s -check-prefix=ALL -check-prefix=64R6 -check-prefix=64R6-NAN
Akira Hatanaka60f7a8e2012-02-25 00:21:52 +0000[diff] [blame]20
21define float @FOO0float(float %a, float %b, float %c) nounwind readnone {
22entry:
Daniel Sandersded02af2014-06-12 11:04:18 +0000[diff] [blame^]23; ALL-LABEL: FOO0float:
24
25; 32-DAG: mtc1 $6, $[[T0:f[0-9]+]]
26; 32-DAG: mul.s $[[T1:f[0-9]+]], $f12, $f14
27; 32-DAG: add.s $[[T2:f[0-9]+]], $[[T1]], $[[T0]]
28; 32-DAG: mtc1 $zero, $[[T2:f[0-9]+]]
29; 32-DAG: add.s $f0, $[[T1]], $[[T2]]
30
31; 32R2: mtc1 $6, $[[T0:f[0-9]+]]
32; 32R2: madd.s $[[T1:f[0-9]+]], $[[T0]], $f12, $f14
33; 32R2: mtc1 $zero, $[[T2:f[0-9]+]]
34; 32R2: add.s $f0, $[[T1]], $[[T2]]
35
36; 32R6-DAG: mtc1 $6, $[[T0:f[0-9]+]]
37; 32R6-DAG: mul.s $[[T1:f[0-9]+]], $f12, $f14
38; 32R6-DAG: add.s $[[T2:f[0-9]+]], $[[T1]], $[[T0]]
39; 32R6-DAG: mtc1 $zero, $[[T2:f[0-9]+]]
40; 32R6-DAG: add.s $f0, $[[T1]], $[[T2]]
41
42; 64-DAG: mul.s $[[T1:f[0-9]+]], $f12, $f13
43; 64-DAG: add.s $[[T2:f[0-9]+]], $[[T1]], $f14
44; 64-DAG: mtc1 $zero, $[[T2:f[0-9]+]]
45; 64-DAG: add.s $f0, $[[T1]], $[[T2]]
46
47; 64R2: madd.s $[[T0:f[0-9]+]], $f14, $f12, $f13
48; 64R2: mtc1 $zero, $[[T1:f[0-9]+]]
49; 64R2: add.s $f0, $[[T0]], $[[T1]]
50
51; 64R6-DAG: mul.s $[[T0:f[0-9]+]], $f12, $f13
52; 64R6-DAG: add.s $[[T1:f[0-9]+]], $[[T0]], $f14
53; 64R6-DAG: mtc1 $zero, $[[T2:f[0-9]+]]
54; 64R6-DAG: add.s $f0, $[[T1]], $[[T2]]
55
Akira Hatanaka60f7a8e2012-02-25 00:21:52 +0000[diff] [blame]56 %mul = fmul float %a, %b
57 %add = fadd float %mul, %c
58 %add1 = fadd float %add, 0.000000e+00
59 ret float %add1
60}
61
62define float @FOO1float(float %a, float %b, float %c) nounwind readnone {
63entry:
Daniel Sandersded02af2014-06-12 11:04:18 +0000[diff] [blame^]64; ALL-LABEL: FOO1float:
65
66; 32-DAG: mtc1 $6, $[[T0:f[0-9]+]]
67; 32-DAG: mul.s $[[T1:f[0-9]+]], $f12, $f14
68; 32-DAG: sub.s $[[T2:f[0-9]+]], $[[T1]], $[[T0]]
69; 32-DAG: mtc1 $zero, $[[T2:f[0-9]+]]
70; 32-DAG: add.s $f0, $[[T1]], $[[T2]]
71
72; 32R2: mtc1 $6, $[[T0:f[0-9]+]]
73; 32R2: msub.s $[[T1:f[0-9]+]], $[[T0]], $f12, $f14
74; 32R2: mtc1 $zero, $[[T2:f[0-9]+]]
75; 32R2: add.s $f0, $[[T1]], $[[T2]]
76
77; 32R6-DAG: mtc1 $6, $[[T0:f[0-9]+]]
78; 32R6-DAG: mul.s $[[T1:f[0-9]+]], $f12, $f14
79; 32R6-DAG: sub.s $[[T2:f[0-9]+]], $[[T1]], $[[T0]]
80; 32R6-DAG: mtc1 $zero, $[[T2:f[0-9]+]]
81; 32R6-DAG: add.s $f0, $[[T1]], $[[T2]]
82
83; 64-DAG: mul.s $[[T1:f[0-9]+]], $f12, $f13
84; 64-DAG: sub.s $[[T2:f[0-9]+]], $[[T1]], $f14
85; 64-DAG: mtc1 $zero, $[[T2:f[0-9]+]]
86; 64-DAG: add.s $f0, $[[T1]], $[[T2]]
87
88; 64R2: msub.s $[[T0:f[0-9]+]], $f14, $f12, $f13
89; 64R2: mtc1 $zero, $[[T1:f[0-9]+]]
90; 64R2: add.s $f0, $[[T0]], $[[T1]]
91
92; 64R6-DAG: mul.s $[[T0:f[0-9]+]], $f12, $f13
93; 64R6-DAG: sub.s $[[T1:f[0-9]+]], $[[T0]], $f14
94; 64R6-DAG: mtc1 $zero, $[[T2:f[0-9]+]]
95; 64R6-DAG: add.s $f0, $[[T1]], $[[T2]]
96
Akira Hatanaka60f7a8e2012-02-25 00:21:52 +0000[diff] [blame]97 %mul = fmul float %a, %b
98 %sub = fsub float %mul, %c
99 %add = fadd float %sub, 0.000000e+00
100 ret float %add
101}
102
103define float @FOO2float(float %a, float %b, float %c) nounwind readnone {
104entry:
Daniel Sandersded02af2014-06-12 11:04:18 +0000[diff] [blame^]105; ALL-LABEL: FOO2float:
106
107; 32-DAG: mtc1 $6, $[[T0:f[0-9]+]]
108; 32-DAG: mul.s $[[T1:f[0-9]+]], $f12, $f14
109; 32-DAG: add.s $[[T2:f[0-9]+]], $[[T1]], $[[T0]]
110; 32-DAG: mtc1 $zero, $[[T2:f[0-9]+]]
111; 32-DAG: sub.s $f0, $[[T2]], $[[T1]]
112
113; 32R2-NONAN: mtc1 $6, $[[T0:f[0-9]+]]
114; 32R2-NONAN: nmadd.s $f0, $[[T0]], $f12, $f14
115
116; 32R2-NAN: mtc1 $6, $[[T0:f[0-9]+]]
117; 32R2-NAN: madd.s $[[T1:f[0-9]+]], $[[T0]], $f12, $f14
118; 32R2-NAN: mtc1 $zero, $[[T2:f[0-9]+]]
119; 32R2-NAN: sub.s $f0, $[[T2]], $[[T1]]
120
121; 32R6-DAG: mtc1 $6, $[[T0:f[0-9]+]]
122; 32R6-DAG: mul.s $[[T1:f[0-9]+]], $f12, $f14
123; 32R6-DAG: add.s $[[T2:f[0-9]+]], $[[T1]], $[[T0]]
124; 32R6-DAG: mtc1 $zero, $[[T2:f[0-9]+]]
125; 32R6-DAG: sub.s $f0, $[[T2]], $[[T1]]
126
127; 64-DAG: mul.s $[[T1:f[0-9]+]], $f12, $f13
128; 64-DAG: add.s $[[T2:f[0-9]+]], $[[T1]], $f14
129; 64-DAG: mtc1 $zero, $[[T2:f[0-9]+]]
130; 64-DAG: sub.s $f0, $[[T2]], $[[T1]]
131
132; 64R2-NONAN: nmadd.s $f0, $f14, $f12, $f13
133
134; 64R2-NAN: madd.s $[[T0:f[0-9]+]], $f14, $f12, $f13
135; 64R2-NAN: mtc1 $zero, $[[T1:f[0-9]+]]
136; 64R2-NAN: sub.s $f0, $[[T1]], $[[T0]]
137
138; 64R6-DAG: mul.s $[[T1:f[0-9]+]], $f12, $f13
139; 64R6-DAG: add.s $[[T2:f[0-9]+]], $[[T1]], $f14
140; 64R6-DAG: mtc1 $zero, $[[T2:f[0-9]+]]
141; 64R6-DAG: sub.s $f0, $[[T2]], $[[T1]]
142
Akira Hatanaka60f7a8e2012-02-25 00:21:52 +0000[diff] [blame]143 %mul = fmul float %a, %b
144 %add = fadd float %mul, %c
145 %sub = fsub float 0.000000e+00, %add
146 ret float %sub
147}
148
149define float @FOO3float(float %a, float %b, float %c) nounwind readnone {
150entry:
Daniel Sandersded02af2014-06-12 11:04:18 +0000[diff] [blame^]151; ALL-LABEL: FOO3float:
152
153; 32-DAG: mtc1 $6, $[[T0:f[0-9]+]]
154; 32-DAG: mul.s $[[T1:f[0-9]+]], $f12, $f14
155; 32-DAG: sub.s $[[T2:f[0-9]+]], $[[T1]], $[[T0]]
156; 32-DAG: mtc1 $zero, $[[T2:f[0-9]+]]
157; 32-DAG: sub.s $f0, $[[T2]], $[[T1]]
158
159; 32R2-NONAN: mtc1 $6, $[[T0:f[0-9]+]]
160; 32R2-NONAN: nmsub.s $f0, $[[T0]], $f12, $f14
161
162; 32R2-NAN: mtc1 $6, $[[T0:f[0-9]+]]
163; 32R2-NAN: msub.s $[[T1:f[0-9]+]], $[[T0]], $f12, $f14
164; 32R2-NAN: mtc1 $zero, $[[T2:f[0-9]+]]
165; 32R2-NAN: sub.s $f0, $[[T2]], $[[T1]]
166
167; 64-DAG: mul.s $[[T1:f[0-9]+]], $f12, $f13
168; 64-DAG: sub.s $[[T2:f[0-9]+]], $[[T1]], $f14
169; 64-DAG: mtc1 $zero, $[[T2:f[0-9]+]]
170; 64-DAG: sub.s $f0, $[[T2]], $[[T1]]
171
172; 64R2-NAN: msub.s $[[T0:f[0-9]+]], $f14, $f12, $f13
173; 64R2-NAN: mtc1 $zero, $[[T1:f[0-9]+]]
174; 64R2-NAN: sub.s $f0, $[[T1]], $[[T0]]
175
176; 64R6-DAG: mul.s $[[T1:f[0-9]+]], $f12, $f13
177; 64R6-DAG: sub.s $[[T2:f[0-9]+]], $[[T1]], $f14
178; 64R6-DAG: mtc1 $zero, $[[T2:f[0-9]+]]
179; 64R6-DAG: sub.s $f0, $[[T2]], $[[T1]]
180
Akira Hatanaka60f7a8e2012-02-25 00:21:52 +0000[diff] [blame]181 %mul = fmul float %a, %b
182 %sub = fsub float %mul, %c
183 %sub1 = fsub float 0.000000e+00, %sub
184 ret float %sub1
185}
186
187define double @FOO10double(double %a, double %b, double %c) nounwind readnone {
188entry:
Daniel Sandersded02af2014-06-12 11:04:18 +0000[diff] [blame^]189; ALL-LABEL: FOO10double:
190
191; 32-DAG: ldc1 $[[T0:f[0-9]+]], 16($sp)
192; 32-DAG: mul.d $[[T1:f[0-9]+]], $f12, $f14
193; 32-DAG: add.d $[[T2:f[0-9]+]], $[[T1]], $[[T0]]
194; 32-DAG: mtc1 $zero, $[[T2:f[0-9]+]]
195; 32-DAG: add.d $f0, $[[T1]], $[[T2]]
196
197; 32R2: ldc1 $[[T0:f[0-9]+]], 16($sp)
198; 32R2: madd.d $[[T1:f[0-9]+]], $[[T0]], $f12, $f14
199; 32R2: mtc1 $zero, $[[T2:f[02468]+]]
200; 32R2: mtc1 $zero, ${{f[13579]+}}
201; 32R2: add.d $f0, $[[T1]], $[[T2]]
202
203; 32R6-DAG: ldc1 $[[T0:f[0-9]+]], 16($sp)
204; 32R6-DAG: mul.d $[[T1:f[0-9]+]], $f12, $f14
205; 32R6-DAG: add.d $[[T2:f[0-9]+]], $[[T1]], $[[T0]]
206; 32R6-DAG: mtc1 $zero, $[[T2:f[0-9]+]]
207; 32R6-DAG: add.d $f0, $[[T1]], $[[T2]]
208
209; 64-DAG: mul.d $[[T1:f[0-9]+]], $f12, $f13
210; 64-DAG: add.d $[[T2:f[0-9]+]], $[[T1]], $f14
211; 64-DAG: dmtc1 $zero, $[[T2:f[0-9]+]]
212; 64-DAG: add.d $f0, $[[T1]], $[[T2]]
213
214; 64R2: madd.d $[[T0:f[0-9]+]], $f14, $f12, $f13
215; 64R2: mtc1 $zero, $[[T1:f[0-9]+]]
216; 64R2: add.d $f0, $[[T0]], $[[T1]]
217
218; 64R6-DAG: mul.d $[[T1:f[0-9]+]], $f12, $f13
219; 64R6-DAG: add.d $[[T2:f[0-9]+]], $[[T1]], $f14
220; 64R6-DAG: dmtc1 $zero, $[[T2:f[0-9]+]]
221; 64R6-DAG: add.d $f0, $[[T1]], $[[T2]]
222
Akira Hatanaka60f7a8e2012-02-25 00:21:52 +0000[diff] [blame]223 %mul = fmul double %a, %b
224 %add = fadd double %mul, %c
225 %add1 = fadd double %add, 0.000000e+00
226 ret double %add1
227}
228
229define double @FOO11double(double %a, double %b, double %c) nounwind readnone {
230entry:
Daniel Sandersded02af2014-06-12 11:04:18 +0000[diff] [blame^]231; ALL-LABEL: FOO11double:
232
233; 32-DAG: ldc1 $[[T0:f[0-9]+]], 16($sp)
234; 32-DAG: mul.d $[[T1:f[0-9]+]], $f12, $f14
235; 32-DAG: sub.d $[[T2:f[0-9]+]], $[[T1]], $[[T0]]
236; 32-DAG: mtc1 $zero, $[[T2:f[0-9]+]]
237; 32-DAG: add.d $f0, $[[T1]], $[[T2]]
238
239; 32R2: ldc1 $[[T0:f[0-9]+]], 16($sp)
240; 32R2: msub.d $[[T1:f[0-9]+]], $[[T0]], $f12, $f14
241; 32R2: mtc1 $zero, $[[T2:f[02468]+]]
242; 32R2: mtc1 $zero, ${{f[13579]+}}
243; 32R2: add.d $f0, $[[T1]], $[[T2]]
244
245; 32R6-DAG: ldc1 $[[T0:f[0-9]+]], 16($sp)
246; 32R6-DAG: mul.d $[[T1:f[0-9]+]], $f12, $f14
247; 32R6-DAG: sub.d $[[T2:f[0-9]+]], $[[T1]], $[[T0]]
248; 32R6-DAG: mtc1 $zero, $[[T2:f[0-9]+]]
249; 32R6-DAG: add.d $f0, $[[T1]], $[[T2]]
250
251; 64-DAG: mul.d $[[T1:f[0-9]+]], $f12, $f13
252; 64-DAG: sub.d $[[T2:f[0-9]+]], $[[T1]], $f14
253; 64-DAG: dmtc1 $zero, $[[T2:f[0-9]+]]
254; 64-DAG: add.d $f0, $[[T1]], $[[T2]]
255
256; 64R2: msub.d $[[T0:f[0-9]+]], $f14, $f12, $f13
257; 64R2: mtc1 $zero, $[[T1:f[0-9]+]]
258; 64R2: add.d $f0, $[[T0]], $[[T1]]
259
260; 64R6-DAG: mul.d $[[T1:f[0-9]+]], $f12, $f13
261; 64R6-DAG: sub.d $[[T2:f[0-9]+]], $[[T1]], $f14
262; 64R6-DAG: dmtc1 $zero, $[[T2:f[0-9]+]]
263; 64R6-DAG: add.d $f0, $[[T1]], $[[T2]]
264
Akira Hatanaka60f7a8e2012-02-25 00:21:52 +0000[diff] [blame]265 %mul = fmul double %a, %b
266 %sub = fsub double %mul, %c
267 %add = fadd double %sub, 0.000000e+00
268 ret double %add
269}
270
271define double @FOO12double(double %a, double %b, double %c) nounwind readnone {
272entry:
Daniel Sandersded02af2014-06-12 11:04:18 +0000[diff] [blame^]273; ALL-LABEL: FOO12double:
274
275; 32-DAG: ldc1 $[[T0:f[0-9]+]], 16($sp)
276; 32-DAG: mul.d $[[T1:f[0-9]+]], $f12, $f14
277; 32-DAG: add.d $[[T2:f[0-9]+]], $[[T1]], $[[T0]]
278; 32-DAG: mtc1 $zero, $[[T2:f[0-9]+]]
279; 32-DAG: sub.d $f0, $[[T2]], $[[T1]]
280
281; 32R2-NONAN: ldc1 $[[T0:f[0-9]+]], 16($sp)
282; 32R2-NONAN: nmadd.d $f0, $[[T0]], $f12, $f14
283
284; 32R2-NAN: ldc1 $[[T0:f[0-9]+]], 16($sp)
285; 32R2-NAN: madd.d $[[T1:f[0-9]+]], $[[T0]], $f12, $f14
286; 32R2-NAN: mtc1 $zero, $[[T2:f[02468]+]]
287; 32R2-NAN: mtc1 $zero, ${{f[13579]+}}
288; 32R2-NAN: sub.d $f0, $[[T2]], $[[T1]]
289
290; 32R6-DAG: ldc1 $[[T0:f[0-9]+]], 16($sp)
291; 32R6-DAG: mul.d $[[T1:f[0-9]+]], $f12, $f14
292; 32R6-DAG: add.d $[[T2:f[0-9]+]], $[[T1]], $[[T0]]
293; 32R6-DAG: mtc1 $zero, $[[T2:f[0-9]+]]
294; 32R6-DAG: sub.d $f0, $[[T2]], $[[T1]]
295
296; 64-DAG: mul.d $[[T1:f[0-9]+]], $f12, $f13
297; 64-DAG: add.d $[[T2:f[0-9]+]], $[[T1]], $f14
298; 64-DAG: dmtc1 $zero, $[[T2:f[0-9]+]]
299; 64-DAG: sub.d $f0, $[[T2]], $[[T1]]
300
301; 64R2-NONAN: nmadd.d $f0, $f14, $f12, $f13
302
303; 64R2-NAN: madd.d $[[T0:f[0-9]+]], $f14, $f12, $f13
304; 64R2-NAN: mtc1 $zero, $[[T1:f[0-9]+]]
305; 64R2-NAN: sub.d $f0, $[[T1]], $[[T0]]
306
307; 64R6-DAG: mul.d $[[T1:f[0-9]+]], $f12, $f13
308; 64R6-DAG: add.d $[[T2:f[0-9]+]], $[[T1]], $f14
309; 64R6-DAG: dmtc1 $zero, $[[T2:f[0-9]+]]
310; 64R6-DAG: sub.d $f0, $[[T2]], $[[T1]]
311
Akira Hatanaka60f7a8e2012-02-25 00:21:52 +0000[diff] [blame]312 %mul = fmul double %a, %b
313 %add = fadd double %mul, %c
314 %sub = fsub double 0.000000e+00, %add
315 ret double %sub
316}
317
318define double @FOO13double(double %a, double %b, double %c) nounwind readnone {
319entry:
Daniel Sandersded02af2014-06-12 11:04:18 +0000[diff] [blame^]320; ALL-LABEL: FOO13double:
321
322; 32-DAG: ldc1 $[[T0:f[0-9]+]], 16($sp)
323; 32-DAG: mul.d $[[T1:f[0-9]+]], $f12, $f14
324; 32-DAG: sub.d $[[T2:f[0-9]+]], $[[T1]], $[[T0]]
325; 32-DAG: mtc1 $zero, $[[T2:f[0-9]+]]
326; 32-DAG: sub.d $f0, $[[T2]], $[[T1]]
327
328; 32R2-NONAN: ldc1 $[[T0:f[0-9]+]], 16($sp)
329; 32R2-NONAN: nmsub.d $f0, $[[T0]], $f12, $f14
330
331; 32R2-NAN: ldc1 $[[T0:f[0-9]+]], 16($sp)
332; 32R2-NAN: msub.d $[[T1:f[0-9]+]], $[[T0]], $f12, $f14
333; 32R2-NAN: mtc1 $zero, $[[T2:f[02468]+]]
334; 32R2-NAN: mtc1 $zero, ${{f[13579]+}}
335; 32R2-NAN: sub.d $f0, $[[T2]], $[[T1]]
336
337; 32R6-DAG: ldc1 $[[T0:f[0-9]+]], 16($sp)
338; 32R6-DAG: mul.d $[[T1:f[0-9]+]], $f12, $f14
339; 32R6-DAG: sub.d $[[T2:f[0-9]+]], $[[T1]], $[[T0]]
340; 32R6-DAG: mtc1 $zero, $[[T2:f[0-9]+]]
341; 32R6-DAG: sub.d $f0, $[[T2]], $[[T1]]
342
343; 64-DAG: mul.d $[[T1:f[0-9]+]], $f12, $f13
344; 64-DAG: sub.d $[[T2:f[0-9]+]], $[[T1]], $f14
345; 64-DAG: dmtc1 $zero, $[[T2:f[0-9]+]]
346; 64-DAG: sub.d $f0, $[[T2]], $[[T1]]
347
348; 64R2-NONAN: nmsub.d $f0, $f14, $f12, $f13
349
350; 64R2-NAN: msub.d $[[T0:f[0-9]+]], $f14, $f12, $f13
351; 64R2-NAN: mtc1 $zero, $[[T1:f[0-9]+]]
352; 64R2-NAN: sub.d $f0, $[[T1]], $[[T0]]
353
354; 64R6-DAG: mul.d $[[T1:f[0-9]+]], $f12, $f13
355; 64R6-DAG: sub.d $[[T2:f[0-9]+]], $[[T1]], $f14
356; 64R6-DAG: dmtc1 $zero, $[[T2:f[0-9]+]]
357; 64R6-DAG: sub.d $f0, $[[T2]], $[[T1]]
358
Akira Hatanaka60f7a8e2012-02-25 00:21:52 +0000[diff] [blame]359 %mul = fmul double %a, %b
360 %sub = fsub double %mul, %c
361 %sub1 = fsub double 0.000000e+00, %sub
362 ret double %sub1
363}