blob: fd8ca725c4cb632a05b63cc3c0a04e9477134fca [file] [log] [blame]
Jacques Pienaarfcef3e42016-03-28 13:09:54 +00001; RUN: llc < %s | FileCheck %s
2
3; Test that basic 32-bit integer comparison operations assemble as expected.
4
5target datalayout = "E-m:e-p:32:32-i64:64-a:0:32-n32-S64"
6target triple = "lanai"
7
8; CHECK-LABEL: eq_i32:
9; CHECK: sub.f %r{{[0-9]+}}, %r{{[0-9]+}}, %r0
10; CHECK-NEXT: seq
11define i32 @eq_i32(i32 %x, i32 %y) {
12 %a = icmp eq i32 %x, %y
13 %b = zext i1 %a to i32
14 ret i32 %b
15}
16
17; CHECK-LABEL: ne_i32:
18; CHECK: sub.f %r{{[0-9]+}}, %r{{[0-9]+}}, %r0
19; CHECK-NEXT: sne
20define i32 @ne_i32(i32 %x, i32 %y) {
21 %a = icmp ne i32 %x, %y
22 %b = zext i1 %a to i32
23 ret i32 %b
24}
25
26; CHECK-LABEL: slt_i32:
27; CHECK: sub.f %r{{[0-9]+}}, %r{{[0-9]+}}, %r0
28; CHECK-NEXT: slt
29define i32 @slt_i32(i32 %x, i32 %y) {
30 %a = icmp slt i32 %x, %y
31 %b = zext i1 %a to i32
32 ret i32 %b
33}
34
35; CHECK-LABEL: sle_i32:
36; CHECK: sub.f %r{{[0-9]+}}, %r{{[0-9]+}}, %r0
37; CHECK-NEXT: sle
38define i32 @sle_i32(i32 %x, i32 %y) {
39 %a = icmp sle i32 %x, %y
40 %b = zext i1 %a to i32
41 ret i32 %b
42}
43
44; CHECK-LABEL: ult_i32:
45; CHECK: sub.f %r{{[0-9]+}}, %r{{[0-9]+}}, %r0
46; CHECK-NEXT: sult
47define i32 @ult_i32(i32 %x, i32 %y) {
48 %a = icmp ult i32 %x, %y
49 %b = zext i1 %a to i32
50 ret i32 %b
51}
52
53; CHECK-LABEL: ule_i32:
54; CHECK: sub.f %r{{[0-9]+}}, %r{{[0-9]+}}, %r0
55; CHECK-NEXT: sule
56define i32 @ule_i32(i32 %x, i32 %y) {
57 %a = icmp ule i32 %x, %y
58 %b = zext i1 %a to i32
59 ret i32 %b
60}
61
62; CHECK-LABEL: sgt_i32:
63; CHECK: sub.f %r{{[0-9]+}}, %r{{[0-9]+}}, %r0
64; CHECK-NEXT: sgt
65define i32 @sgt_i32(i32 %x, i32 %y) {
66 %a = icmp sgt i32 %x, %y
67 %b = zext i1 %a to i32
68 ret i32 %b
69}
70
71; CHECK-LABEL: sge_i32:
72; CHECK: sub.f %r{{[0-9]+}}, %r{{[0-9]+}}, %r0
73; CHECK-NEXT: sge
74define i32 @sge_i32(i32 %x, i32 %y) {
75 %a = icmp sge i32 %x, %y
76 %b = zext i1 %a to i32
77 ret i32 %b
78}
79
80; CHECK-LABEL: ugt_i32:
81; CHECK: sub.f %r{{[0-9]+}}, %r{{[0-9]+}}, %r0
82; CHECK-NEXT: sugt
83define i32 @ugt_i32(i32 %x, i32 %y) {
84 %a = icmp ugt i32 %x, %y
85 %b = zext i1 %a to i32
86 ret i32 %b
87}
88
89; CHECK-LABEL: uge_i32:
90; CHECK: sub.f %r{{[0-9]+}}, %r{{[0-9]+}}, %r0
91; CHECK-NEXT: suge
92define i32 @uge_i32(i32 %x, i32 %y) {
93 %a = icmp uge i32 %x, %y
94 %b = zext i1 %a to i32
95 ret i32 %b
96}