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gerrit-public.fairphone.software / toolchain / llvm-project / e93c63d468d36e67cb15d183ecc6b8216c87c138 / . / llvm / test / CodeGen / Hexagon / addrmode-indoff.ll
blob: 274add33898b4443aac26ca81505f597de225b1f [file] [log] [blame]
Colin LeMahieub8575b12015-06-13 21:46:39 +0000[diff] [blame]1; RUN: llc -march=hexagon < %s | FileCheck %s
2;
3; Bug 6840. Use absolute+index addressing.
4
5@ga = common global [1024 x i8] zeroinitializer, align 8
Colin LeMahieub8575b12015-06-13 21:46:39 +0000[diff] [blame]6
Krzysztof Parzyszek64e5d7d2017-10-20 19:33:12 +0000[diff] [blame]7; CHECK-LABEL: test0
8; CHECK: memub(r{{[0-9]+}}+##ga)
9define zeroext i8 @test0(i32 %i) nounwind readonly {
Colin LeMahieub8575b12015-06-13 21:46:39 +0000[diff] [blame]10entry:
Krzysztof Parzyszek64e5d7d2017-10-20 19:33:12 +0000[diff] [blame]11 %t = getelementptr inbounds [1024 x i8], [1024 x i8]* @ga, i32 0, i32 %i
12 %0 = load i8, i8* %t, align 1
Colin LeMahieub8575b12015-06-13 21:46:39 +0000[diff] [blame]13 ret i8 %0
14}
15
Krzysztof Parzyszek64e5d7d2017-10-20 19:33:12 +0000[diff] [blame]16; CHECK-LABEL: test1
17; CHECK: memb(r{{[0-9]+}}+##ga)
18define signext i8 @test1(i32 %i) nounwind readonly {
Colin LeMahieub8575b12015-06-13 21:46:39 +0000[diff] [blame]19entry:
Krzysztof Parzyszek64e5d7d2017-10-20 19:33:12 +0000[diff] [blame]20 %t = getelementptr inbounds [1024 x i8], [1024 x i8]* @ga, i32 0, i32 %i
21 %0 = load i8, i8* %t, align 1
Colin LeMahieub8575b12015-06-13 21:46:39 +0000[diff] [blame]22 ret i8 %0
23}
24
Krzysztof Parzyszek64e5d7d2017-10-20 19:33:12 +0000[diff] [blame]25; CHECK-LABEL: test2
26; CHECK: memub(r{{[0-9]+}}<<#1+##ga)
27define zeroext i8 @test2(i32 %i) nounwind readonly {
Colin LeMahieub8575b12015-06-13 21:46:39 +0000[diff] [blame]28entry:
Krzysztof Parzyszek64e5d7d2017-10-20 19:33:12 +0000[diff] [blame]29 %j = shl nsw i32 %i, 1
30 %t = getelementptr inbounds [1024 x i8], [1024 x i8]* @ga, i32 0, i32 %j
31 %0 = load i8, i8* %t, align 1
Colin LeMahieub8575b12015-06-13 21:46:39 +0000[diff] [blame]32 ret i8 %0
33}
34
Krzysztof Parzyszek64e5d7d2017-10-20 19:33:12 +0000[diff] [blame]35; CHECK-LABEL: test3
36; CHECK: memb(r{{[0-9]+}}<<#1+##ga)
37define signext i8 @test3(i32 %i) nounwind readonly {
Colin LeMahieub8575b12015-06-13 21:46:39 +0000[diff] [blame]38entry:
Krzysztof Parzyszek64e5d7d2017-10-20 19:33:12 +0000[diff] [blame]39 %j = shl nsw i32 %i, 1
40 %t = getelementptr inbounds [1024 x i8], [1024 x i8]* @ga, i32 0, i32 %j
41 %0 = load i8, i8* %t, align 1
Colin LeMahieub8575b12015-06-13 21:46:39 +0000[diff] [blame]42 ret i8 %0
43}
44
Krzysztof Parzyszek64e5d7d2017-10-20 19:33:12 +0000[diff] [blame]45; CHECK-LABEL: test4
46; CHECK: memub(r{{[0-9]+}}<<#2+##ga)
47define zeroext i8 @test4(i32 %i) nounwind readonly {
Colin LeMahieub8575b12015-06-13 21:46:39 +0000[diff] [blame]48entry:
Krzysztof Parzyszek64e5d7d2017-10-20 19:33:12 +0000[diff] [blame]49 %j = shl nsw i32 %i, 2
50 %t = getelementptr inbounds [1024 x i8], [1024 x i8]* @ga, i32 0, i32 %j
51 %0 = load i8, i8* %t, align 1
52 ret i8 %0
53}
54
55; CHECK-LABEL: test5
56; CHECK: memb(r{{[0-9]+}}<<#2+##ga)
57define signext i8 @test5(i32 %i) nounwind readonly {
58entry:
59 %j = shl nsw i32 %i, 2
60 %t = getelementptr inbounds [1024 x i8], [1024 x i8]* @ga, i32 0, i32 %j
61 %0 = load i8, i8* %t, align 1
62 ret i8 %0
63}
64
65; CHECK-LABEL: test10
66; CHECK: memb(r{{[0-9]+}}+##ga)
67define void @test10(i32 %i, i8 zeroext %v) nounwind {
68entry:
69 %t = getelementptr inbounds [1024 x i8], [1024 x i8]* @ga, i32 0, i32 %i
70 store i8 %v, i8* %t, align 1
Colin LeMahieub8575b12015-06-13 21:46:39 +0000[diff] [blame]71 ret void
72}
73
Krzysztof Parzyszek64e5d7d2017-10-20 19:33:12 +0000[diff] [blame]74; CHECK-LABEL: test11
75; CHECK: memb(r{{[0-9]+}}<<#1+##ga)
76define void @test11(i32 %i, i8 signext %v) nounwind {
Colin LeMahieub8575b12015-06-13 21:46:39 +0000[diff] [blame]77entry:
Krzysztof Parzyszek64e5d7d2017-10-20 19:33:12 +0000[diff] [blame]78 %j = shl nsw i32 %i, 1
79 %t = getelementptr inbounds [1024 x i8], [1024 x i8]* @ga, i32 0, i32 %j
80 store i8 %v, i8* %t, align 1
Colin LeMahieub8575b12015-06-13 21:46:39 +0000[diff] [blame]81 ret void
82}
83
Krzysztof Parzyszek64e5d7d2017-10-20 19:33:12 +0000[diff] [blame]84; CHECK-LABEL: test12
85; CHECK: memb(r{{[0-9]+}}<<#2+##ga)
86define void @test12(i32 %i, i8 zeroext %v) nounwind {
Colin LeMahieub8575b12015-06-13 21:46:39 +0000[diff] [blame]87entry:
Krzysztof Parzyszek64e5d7d2017-10-20 19:33:12 +0000[diff] [blame]88 %j = shl nsw i32 %i, 2
89 %t = getelementptr inbounds [1024 x i8], [1024 x i8]* @ga, i32 0, i32 %j
90 store i8 %v, i8* %t, align 1
Colin LeMahieub8575b12015-06-13 21:46:39 +0000[diff] [blame]91 ret void
92}