Simon Pilgrim | 5b2fd59 | 2017-02-06 18:57:51 +0000 | [diff] [blame] | 1 | ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py |
Simon Pilgrim | fea153f | 2017-05-06 19:11:59 +0000 | [diff] [blame] | 2 | ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=CHECK --check-prefix=AVX2 |
| 3 | ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefix=CHECK --check-prefix=AVX512 --check-prefix=AVX512F |
| 4 | ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512vl | FileCheck %s --check-prefix=CHECK --check-prefix=AVX512 --check-prefix=AVX512VL |
Simon Pilgrim | 5b2fd59 | 2017-02-06 18:57:51 +0000 | [diff] [blame] | 5 | |
Simon Pilgrim | 5b2fd59 | 2017-02-06 18:57:51 +0000 | [diff] [blame] | 6 | ; fold (abs c1) -> c2 |
| 7 | define <4 x i32> @combine_v4i32_abs_constant() { |
| 8 | ; CHECK-LABEL: combine_v4i32_abs_constant: |
Francis Visoiu Mistrih | 25528d6 | 2017-12-04 17:18:51 +0000 | [diff] [blame] | 9 | ; CHECK: # %bb.0: |
Simon Pilgrim | cf2da96 | 2017-03-14 21:26:58 +0000 | [diff] [blame] | 10 | ; CHECK-NEXT: vmovaps {{.*#+}} xmm0 = [0,1,3,2147483648] |
Simon Pilgrim | 5b2fd59 | 2017-02-06 18:57:51 +0000 | [diff] [blame] | 11 | ; CHECK-NEXT: retq |
| 12 | %1 = call <4 x i32> @llvm.x86.ssse3.pabs.d.128(<4 x i32> <i32 0, i32 -1, i32 3, i32 -2147483648>) |
| 13 | ret <4 x i32> %1 |
| 14 | } |
| 15 | |
| 16 | define <16 x i16> @combine_v16i16_abs_constant() { |
| 17 | ; CHECK-LABEL: combine_v16i16_abs_constant: |
Francis Visoiu Mistrih | 25528d6 | 2017-12-04 17:18:51 +0000 | [diff] [blame] | 18 | ; CHECK: # %bb.0: |
Simon Pilgrim | cf2da96 | 2017-03-14 21:26:58 +0000 | [diff] [blame] | 19 | ; CHECK-NEXT: vmovaps {{.*#+}} ymm0 = [0,1,1,3,3,7,7,255,255,4096,4096,32767,32767,32768,32768,0] |
Simon Pilgrim | 5b2fd59 | 2017-02-06 18:57:51 +0000 | [diff] [blame] | 20 | ; CHECK-NEXT: retq |
| 21 | %1 = call <16 x i16> @llvm.x86.avx2.pabs.w(<16 x i16> <i16 0, i16 1, i16 -1, i16 3, i16 -3, i16 7, i16 -7, i16 255, i16 -255, i16 4096, i16 -4096, i16 32767, i16 -32767, i16 -32768, i16 32768, i16 65536>) |
| 22 | ret <16 x i16> %1 |
| 23 | } |
| 24 | |
| 25 | ; fold (abs (abs x)) -> (abs x) |
Simon Pilgrim | d0649f9 | 2017-10-19 14:59:26 +0000 | [diff] [blame] | 26 | define i32 @combine_i32_abs_abs(i32 %a) { |
| 27 | ; CHECK-LABEL: combine_i32_abs_abs: |
Francis Visoiu Mistrih | 25528d6 | 2017-12-04 17:18:51 +0000 | [diff] [blame] | 28 | ; CHECK: # %bb.0: |
Simon Pilgrim | fdd63d1 | 2017-10-19 15:02:24 +0000 | [diff] [blame] | 29 | ; CHECK-NEXT: movl %edi, %eax |
Simon Pilgrim | d0649f9 | 2017-10-19 14:59:26 +0000 | [diff] [blame] | 30 | ; CHECK-NEXT: negl %eax |
Simon Pilgrim | fdd63d1 | 2017-10-19 15:02:24 +0000 | [diff] [blame] | 31 | ; CHECK-NEXT: cmovll %edi, %eax |
Simon Pilgrim | d0649f9 | 2017-10-19 14:59:26 +0000 | [diff] [blame] | 32 | ; CHECK-NEXT: retq |
| 33 | %n1 = sub i32 zeroinitializer, %a |
| 34 | %b1 = icmp slt i32 %a, zeroinitializer |
| 35 | %a1 = select i1 %b1, i32 %n1, i32 %a |
| 36 | %n2 = sub i32 zeroinitializer, %a1 |
| 37 | %b2 = icmp sgt i32 %a1, zeroinitializer |
| 38 | %a2 = select i1 %b2, i32 %a1, i32 %n2 |
| 39 | ret i32 %a2 |
| 40 | } |
| 41 | |
Simon Pilgrim | 5b2fd59 | 2017-02-06 18:57:51 +0000 | [diff] [blame] | 42 | define <8 x i16> @combine_v8i16_abs_abs(<8 x i16> %a) { |
| 43 | ; CHECK-LABEL: combine_v8i16_abs_abs: |
Francis Visoiu Mistrih | 25528d6 | 2017-12-04 17:18:51 +0000 | [diff] [blame] | 44 | ; CHECK: # %bb.0: |
Simon Pilgrim | 5b2fd59 | 2017-02-06 18:57:51 +0000 | [diff] [blame] | 45 | ; CHECK-NEXT: vpabsw %xmm0, %xmm0 |
Simon Pilgrim | 5b2fd59 | 2017-02-06 18:57:51 +0000 | [diff] [blame] | 46 | ; CHECK-NEXT: retq |
Simon Pilgrim | b4a9eea | 2017-02-07 13:15:09 +0000 | [diff] [blame] | 47 | %a1 = call <8 x i16> @llvm.x86.ssse3.pabs.w.128(<8 x i16> %a) |
Simon Pilgrim | 2c15447 | 2017-05-06 13:44:42 +0000 | [diff] [blame] | 48 | %s2 = ashr <8 x i16> %a1, <i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15> |
| 49 | %a2 = add <8 x i16> %a1, %s2 |
| 50 | %x2 = xor <8 x i16> %a2, %s2 |
| 51 | ret <8 x i16> %x2 |
Simon Pilgrim | 5b2fd59 | 2017-02-06 18:57:51 +0000 | [diff] [blame] | 52 | } |
| 53 | |
| 54 | define <32 x i8> @combine_v32i8_abs_abs(<32 x i8> %a) { |
| 55 | ; CHECK-LABEL: combine_v32i8_abs_abs: |
Francis Visoiu Mistrih | 25528d6 | 2017-12-04 17:18:51 +0000 | [diff] [blame] | 56 | ; CHECK: # %bb.0: |
Simon Pilgrim | 5b2fd59 | 2017-02-06 18:57:51 +0000 | [diff] [blame] | 57 | ; CHECK-NEXT: vpabsb %ymm0, %ymm0 |
Simon Pilgrim | 5b2fd59 | 2017-02-06 18:57:51 +0000 | [diff] [blame] | 58 | ; CHECK-NEXT: retq |
Simon Pilgrim | b4a9eea | 2017-02-07 13:15:09 +0000 | [diff] [blame] | 59 | %n1 = sub <32 x i8> zeroinitializer, %a |
| 60 | %b1 = icmp slt <32 x i8> %a, zeroinitializer |
| 61 | %a1 = select <32 x i1> %b1, <32 x i8> %n1, <32 x i8> %a |
| 62 | %a2 = call <32 x i8> @llvm.x86.avx2.pabs.b(<32 x i8> %a1) |
| 63 | ret <32 x i8> %a2 |
| 64 | } |
| 65 | |
| 66 | define <4 x i64> @combine_v4i64_abs_abs(<4 x i64> %a) { |
Simon Pilgrim | fea153f | 2017-05-06 19:11:59 +0000 | [diff] [blame] | 67 | ; AVX2-LABEL: combine_v4i64_abs_abs: |
Francis Visoiu Mistrih | 25528d6 | 2017-12-04 17:18:51 +0000 | [diff] [blame] | 68 | ; AVX2: # %bb.0: |
Dinar Temirbulatov | aead31a | 2017-07-27 17:47:01 +0000 | [diff] [blame] | 69 | ; AVX2-NEXT: vpxor %xmm1, %xmm1, %xmm1 |
Simon Pilgrim | ca3a63a | 2017-05-09 13:14:40 +0000 | [diff] [blame] | 70 | ; AVX2-NEXT: vpcmpgtq %ymm0, %ymm1, %ymm2 |
| 71 | ; AVX2-NEXT: vpaddq %ymm2, %ymm0, %ymm0 |
| 72 | ; AVX2-NEXT: vpxor %ymm2, %ymm0, %ymm0 |
| 73 | ; AVX2-NEXT: vpcmpgtq %ymm0, %ymm1, %ymm1 |
Simon Pilgrim | fea153f | 2017-05-06 19:11:59 +0000 | [diff] [blame] | 74 | ; AVX2-NEXT: vpaddq %ymm1, %ymm0, %ymm0 |
| 75 | ; AVX2-NEXT: vpxor %ymm1, %ymm0, %ymm0 |
| 76 | ; AVX2-NEXT: retq |
| 77 | ; |
| 78 | ; AVX512F-LABEL: combine_v4i64_abs_abs: |
Francis Visoiu Mistrih | 25528d6 | 2017-12-04 17:18:51 +0000 | [diff] [blame] | 79 | ; AVX512F: # %bb.0: |
Francis Visoiu Mistrih | a8a83d1 | 2017-12-07 10:40:31 +0000 | [diff] [blame] | 80 | ; AVX512F-NEXT: # kill: def %ymm0 killed %ymm0 def %zmm0 |
Simon Pilgrim | fea153f | 2017-05-06 19:11:59 +0000 | [diff] [blame] | 81 | ; AVX512F-NEXT: vpabsq %zmm0, %zmm0 |
Francis Visoiu Mistrih | a8a83d1 | 2017-12-07 10:40:31 +0000 | [diff] [blame] | 82 | ; AVX512F-NEXT: # kill: def %ymm0 killed %ymm0 killed %zmm0 |
Simon Pilgrim | fea153f | 2017-05-06 19:11:59 +0000 | [diff] [blame] | 83 | ; AVX512F-NEXT: retq |
| 84 | ; |
| 85 | ; AVX512VL-LABEL: combine_v4i64_abs_abs: |
Francis Visoiu Mistrih | 25528d6 | 2017-12-04 17:18:51 +0000 | [diff] [blame] | 86 | ; AVX512VL: # %bb.0: |
Simon Pilgrim | fea153f | 2017-05-06 19:11:59 +0000 | [diff] [blame] | 87 | ; AVX512VL-NEXT: vpabsq %ymm0, %ymm0 |
| 88 | ; AVX512VL-NEXT: retq |
Simon Pilgrim | b4a9eea | 2017-02-07 13:15:09 +0000 | [diff] [blame] | 89 | %n1 = sub <4 x i64> zeroinitializer, %a |
| 90 | %b1 = icmp slt <4 x i64> %a, zeroinitializer |
| 91 | %a1 = select <4 x i1> %b1, <4 x i64> %n1, <4 x i64> %a |
| 92 | %n2 = sub <4 x i64> zeroinitializer, %a1 |
| 93 | %b2 = icmp sgt <4 x i64> %a1, zeroinitializer |
| 94 | %a2 = select <4 x i1> %b2, <4 x i64> %a1, <4 x i64> %n2 |
| 95 | ret <4 x i64> %a2 |
Simon Pilgrim | 5b2fd59 | 2017-02-06 18:57:51 +0000 | [diff] [blame] | 96 | } |
| 97 | |
| 98 | ; fold (abs x) -> x iff not-negative |
| 99 | define <16 x i8> @combine_v16i8_abs_constant(<16 x i8> %a) { |
Uriel Korach | 5d5da5f | 2017-09-13 09:02:36 +0000 | [diff] [blame] | 100 | ; AVX2-LABEL: combine_v16i8_abs_constant: |
Francis Visoiu Mistrih | 25528d6 | 2017-12-04 17:18:51 +0000 | [diff] [blame] | 101 | ; AVX2: # %bb.0: |
Uriel Korach | 5d5da5f | 2017-09-13 09:02:36 +0000 | [diff] [blame] | 102 | ; AVX2-NEXT: vandps {{.*}}(%rip), %xmm0, %xmm0 |
| 103 | ; AVX2-NEXT: retq |
| 104 | ; |
| 105 | ; AVX512F-LABEL: combine_v16i8_abs_constant: |
Francis Visoiu Mistrih | 25528d6 | 2017-12-04 17:18:51 +0000 | [diff] [blame] | 106 | ; AVX512F: # %bb.0: |
Uriel Korach | 5d5da5f | 2017-09-13 09:02:36 +0000 | [diff] [blame] | 107 | ; AVX512F-NEXT: vandps {{.*}}(%rip), %xmm0, %xmm0 |
| 108 | ; AVX512F-NEXT: retq |
| 109 | ; |
| 110 | ; AVX512VL-LABEL: combine_v16i8_abs_constant: |
Francis Visoiu Mistrih | 25528d6 | 2017-12-04 17:18:51 +0000 | [diff] [blame] | 111 | ; AVX512VL: # %bb.0: |
Uriel Korach | 5d5da5f | 2017-09-13 09:02:36 +0000 | [diff] [blame] | 112 | ; AVX512VL-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0 |
| 113 | ; AVX512VL-NEXT: retq |
Simon Pilgrim | 5b2fd59 | 2017-02-06 18:57:51 +0000 | [diff] [blame] | 114 | %1 = insertelement <16 x i8> undef, i8 15, i32 0 |
| 115 | %2 = shufflevector <16 x i8> %1, <16 x i8> undef, <16 x i32> zeroinitializer |
| 116 | %3 = and <16 x i8> %a, %2 |
| 117 | %4 = call <16 x i8> @llvm.x86.ssse3.pabs.b.128(<16 x i8> %3) |
| 118 | ret <16 x i8> %4 |
| 119 | } |
| 120 | |
| 121 | define <8 x i32> @combine_v8i32_abs_pos(<8 x i32> %a) { |
| 122 | ; CHECK-LABEL: combine_v8i32_abs_pos: |
Francis Visoiu Mistrih | 25528d6 | 2017-12-04 17:18:51 +0000 | [diff] [blame] | 123 | ; CHECK: # %bb.0: |
Simon Pilgrim | 5b2fd59 | 2017-02-06 18:57:51 +0000 | [diff] [blame] | 124 | ; CHECK-NEXT: vpsrld $1, %ymm0, %ymm0 |
Simon Pilgrim | 5b2fd59 | 2017-02-06 18:57:51 +0000 | [diff] [blame] | 125 | ; CHECK-NEXT: retq |
| 126 | %1 = lshr <8 x i32> %a, <i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1> |
| 127 | %2 = call <8 x i32> @llvm.x86.avx2.pabs.d(<8 x i32> %1) |
| 128 | ret <8 x i32> %2 |
| 129 | } |
| 130 | |
| 131 | declare <16 x i8> @llvm.x86.ssse3.pabs.b.128(<16 x i8>) nounwind readnone |
| 132 | declare <4 x i32> @llvm.x86.ssse3.pabs.d.128(<4 x i32>) nounwind readnone |
| 133 | declare <8 x i16> @llvm.x86.ssse3.pabs.w.128(<8 x i16>) nounwind readnone |
| 134 | |
| 135 | declare <32 x i8> @llvm.x86.avx2.pabs.b(<32 x i8>) nounwind readnone |
| 136 | declare <8 x i32> @llvm.x86.avx2.pabs.d(<8 x i32>) nounwind readnone |
| 137 | declare <16 x i16> @llvm.x86.avx2.pabs.w(<16 x i16>) nounwind readnone |