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Tim Northover3b0846e2014-05-24 12:50:23 +00001//===--- AArch64Subtarget.h - Define Subtarget for the AArch64 -*- C++ -*--===//
2//
3// The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file declares the AArch64 specific subclass of TargetSubtarget.
11//
12//===----------------------------------------------------------------------===//
13
Benjamin Kramera7c40ef2014-08-13 16:26:38 +000014#ifndef LLVM_LIB_TARGET_AARCH64_AARCH64SUBTARGET_H
15#define LLVM_LIB_TARGET_AARCH64_AARCH64SUBTARGET_H
Tim Northover3b0846e2014-05-24 12:50:23 +000016
Eric Christopher29aab7b2014-06-10 17:44:12 +000017#include "AArch64FrameLowering.h"
Eric Christopher841da852014-06-10 23:26:45 +000018#include "AArch64ISelLowering.h"
Benjamin Kramer1f8930e2014-07-25 11:42:14 +000019#include "AArch64InstrInfo.h"
Tim Northover3b0846e2014-05-24 12:50:23 +000020#include "AArch64RegisterInfo.h"
Eric Christopherfcb06ca2014-06-10 18:21:53 +000021#include "AArch64SelectionDAGInfo.h"
Tom Stellardcef0fe42016-04-14 17:45:38 +000022#include "llvm/CodeGen/GlobalISel/GISelAccessor.h"
Eric Christopher6f2a2032014-06-10 18:06:23 +000023#include "llvm/IR/DataLayout.h"
Eric Christopher29aab7b2014-06-10 17:44:12 +000024#include "llvm/Target/TargetSubtargetInfo.h"
Tim Northover3b0846e2014-05-24 12:50:23 +000025#include <string>
26
27#define GET_SUBTARGETINFO_HEADER
28#include "AArch64GenSubtargetInfo.inc"
29
30namespace llvm {
31class GlobalValue;
32class StringRef;
Daniel Sandersa73f1fd2015-06-10 12:11:26 +000033class Triple;
Tim Northover3b0846e2014-05-24 12:50:23 +000034
Ahmed Bougacha5e402ee2016-07-27 14:31:46 +000035class AArch64Subtarget final : public AArch64GenSubtargetInfo {
Matthias Braun651cff42016-06-02 18:03:53 +000036public:
37 enum ARMProcFamilyEnum : uint8_t {
MinSeong Kima7385eb2016-01-05 12:51:59 +000038 Others,
39 CortexA35,
40 CortexA53,
41 CortexA57,
Silviu Barangaaee40fc2016-06-21 15:53:54 +000042 CortexA72,
43 CortexA73,
MinSeong Kima7385eb2016-01-05 12:51:59 +000044 Cyclone,
Chad Rosiercd2be7f2016-02-12 15:51:51 +000045 ExynosM1,
Chad Rosier201fc1e2016-11-15 21:34:12 +000046 Falkor,
Pankaj Gode0aab2e32016-06-20 11:13:31 +000047 Kryo,
Joel Jones28520882017-03-07 19:42:40 +000048 ThunderX2T99,
Joel Jonesab0f3b42017-02-17 18:34:24 +000049 ThunderX,
50 ThunderXT81,
51 ThunderXT83,
52 ThunderXT88
MinSeong Kima7385eb2016-01-05 12:51:59 +000053 };
Tim Northover3b0846e2014-05-24 12:50:23 +000054
Matthias Braun651cff42016-06-02 18:03:53 +000055protected:
Tim Northover3b0846e2014-05-24 12:50:23 +000056 /// ARMProcFamily - ARM processor family: Cortex-A53, Cortex-A57, and others.
Matthias Braun27b66922016-05-27 22:14:09 +000057 ARMProcFamilyEnum ARMProcFamily = Others;
Tim Northover3b0846e2014-05-24 12:50:23 +000058
Matthias Braun27b66922016-05-27 22:14:09 +000059 bool HasV8_1aOps = false;
60 bool HasV8_2aOps = false;
Vladimir Sukharev439328e2015-04-01 14:49:29 +000061
Matthias Braun27b66922016-05-27 22:14:09 +000062 bool HasFPARMv8 = false;
63 bool HasNEON = false;
64 bool HasCrypto = false;
65 bool HasCRC = false;
Joel Jones75818bc2016-11-30 22:25:24 +000066 bool HasLSE = false;
Sjoerd Meijerd906bf12016-06-03 14:03:27 +000067 bool HasRAS = false;
Chad Rosier58fb5f52017-01-16 16:28:43 +000068 bool HasRDM = false;
Matthias Braun27b66922016-05-27 22:14:09 +000069 bool HasPerfMon = false;
70 bool HasFullFP16 = false;
71 bool HasSPE = false;
Balaram Makam2aba753e2017-03-31 18:16:53 +000072 bool HasLSLFast = false;
Tim Northover3b0846e2014-05-24 12:50:23 +000073
74 // HasZeroCycleRegMove - Has zero-cycle register mov instructions.
Matthias Braun27b66922016-05-27 22:14:09 +000075 bool HasZeroCycleRegMove = false;
Tim Northover3b0846e2014-05-24 12:50:23 +000076
77 // HasZeroCycleZeroing - Has zero-cycle zeroing instructions.
Matthias Braun27b66922016-05-27 22:14:09 +000078 bool HasZeroCycleZeroing = false;
Tim Northover3b0846e2014-05-24 12:50:23 +000079
Akira Hatanakaf53b0402015-07-29 14:17:26 +000080 // StrictAlign - Disallow unaligned memory accesses.
Matthias Braun27b66922016-05-27 22:14:09 +000081 bool StrictAlign = false;
Sanne Woudad4658ee2017-03-28 10:02:56 +000082
83 // NegativeImmediates - transform instructions with negative immediates
84 bool NegativeImmediates = true;
85
Matthias Braun651cff42016-06-02 18:03:53 +000086 bool UseAA = false;
87 bool PredictableSelectIsExpensive = false;
88 bool BalanceFPOps = false;
89 bool CustomAsCheapAsMove = false;
90 bool UsePostRAScheduler = false;
91 bool Misaligned128StoreIsSlow = false;
Evandro Menezes7784cac2017-01-24 17:34:31 +000092 bool Paired128IsSlow = false;
Matthias Braun651cff42016-06-02 18:03:53 +000093 bool UseAlternateSExtLoadCVTF32Pattern = false;
Matthias Braun46a52382016-10-04 19:28:21 +000094 bool HasArithmeticBccFusion = false;
95 bool HasArithmeticCbzFusion = false;
Evandro Menezesb21fb292017-02-01 02:54:39 +000096 bool HasFuseAES = false;
Evandro Menezes455382e2017-02-01 02:54:42 +000097 bool HasFuseLiterals = false;
Matthias Braun651cff42016-06-02 18:03:53 +000098 bool DisableLatencySchedHeuristic = false;
Evandro Menezeseff2bd92016-10-24 16:14:58 +000099 bool UseRSqrt = false;
Matthias Braun651cff42016-06-02 18:03:53 +0000100 uint8_t MaxInterleaveFactor = 2;
101 uint8_t VectorInsertExtractBaseCost = 3;
102 uint16_t CacheLineSize = 0;
103 uint16_t PrefetchDistance = 0;
104 uint16_t MinPrefetchStride = 1;
105 unsigned MaxPrefetchIterationsAhead = UINT_MAX;
Evandro Menezesa3a0a602016-06-10 16:00:18 +0000106 unsigned PrefFunctionAlignment = 0;
107 unsigned PrefLoopAlignment = 0;
Evandro Menezese45de8a2016-09-26 15:32:33 +0000108 unsigned MaxJumpTableSize = 0;
Akira Hatanakaf53b0402015-07-29 14:17:26 +0000109
Akira Hatanaka0d4c9ea2015-07-25 00:18:31 +0000110 // ReserveX18 - X18 is not available as a general purpose register.
111 bool ReserveX18;
112
Eric Christopher8b770652015-01-26 19:03:15 +0000113 bool IsLittle;
114
Tim Northover3b0846e2014-05-24 12:50:23 +0000115 /// TargetTriple - What processor and OS we're targeting.
116 Triple TargetTriple;
117
Eric Christopher29aab7b2014-06-10 17:44:12 +0000118 AArch64FrameLowering FrameLowering;
Eric Christopherf63bc642014-06-10 22:57:25 +0000119 AArch64InstrInfo InstrInfo;
Eric Christopherfcb06ca2014-06-10 18:21:53 +0000120 AArch64SelectionDAGInfo TSInfo;
Eric Christopher7c9d4e02014-06-11 00:46:34 +0000121 AArch64TargetLowering TLInfo;
Quentin Colombetc17f7442016-04-06 17:26:03 +0000122 /// Gather the accessor points to GlobalISel-related APIs.
123 /// This is used to avoid ifndefs spreading around while GISel is
124 /// an optional library.
Tom Stellardcef0fe42016-04-14 17:45:38 +0000125 std::unique_ptr<GISelAccessor> GISel;
Quentin Colombetba2a0162016-02-16 19:26:02 +0000126
Daniel Sanderse9fdba32017-04-29 17:30:09 +0000127 bool ForCodeSize;
128
Eric Christopher7c9d4e02014-06-11 00:46:34 +0000129private:
130 /// initializeSubtargetDependencies - Initializes using CPUString and the
131 /// passed in feature string so that we can use initializer lists for
132 /// subtarget initialization.
Matthias Brauna827ed82016-10-03 20:17:02 +0000133 AArch64Subtarget &initializeSubtargetDependencies(StringRef FS,
134 StringRef CPUString);
Eric Christopher29aab7b2014-06-10 17:44:12 +0000135
Matthias Braun651cff42016-06-02 18:03:53 +0000136 /// Initialize properties based on the selected processor family.
137 void initializeProperties();
138
Tim Northover3b0846e2014-05-24 12:50:23 +0000139public:
140 /// This constructor initializes the data members to match that
141 /// of the specified triple.
Daniel Sandersa73f1fd2015-06-10 12:11:26 +0000142 AArch64Subtarget(const Triple &TT, const std::string &CPU,
Eric Christophera0de2532015-03-18 20:37:30 +0000143 const std::string &FS, const TargetMachine &TM,
Daniel Sanderse9fdba32017-04-29 17:30:09 +0000144 bool LittleEndian, bool ForCodeSize);
Tim Northover3b0846e2014-05-24 12:50:23 +0000145
Quentin Colombetc17f7442016-04-06 17:26:03 +0000146 /// This object will take onwership of \p GISelAccessor.
Tom Stellardcef0fe42016-04-14 17:45:38 +0000147 void setGISelAccessor(GISelAccessor &GISel) {
148 this->GISel.reset(&GISel);
Quentin Colombetc17f7442016-04-06 17:26:03 +0000149 }
150
Eric Christopherd9134482014-08-04 21:25:23 +0000151 const AArch64SelectionDAGInfo *getSelectionDAGInfo() const override {
152 return &TSInfo;
153 }
154 const AArch64FrameLowering *getFrameLowering() const override {
Eric Christopher29aab7b2014-06-10 17:44:12 +0000155 return &FrameLowering;
156 }
Eric Christopherd9134482014-08-04 21:25:23 +0000157 const AArch64TargetLowering *getTargetLowering() const override {
Eric Christopher7c9d4e02014-06-11 00:46:34 +0000158 return &TLInfo;
Eric Christopher841da852014-06-10 23:26:45 +0000159 }
Eric Christopherd9134482014-08-04 21:25:23 +0000160 const AArch64InstrInfo *getInstrInfo() const override { return &InstrInfo; }
Eric Christophera0de2532015-03-18 20:37:30 +0000161 const AArch64RegisterInfo *getRegisterInfo() const override {
162 return &getInstrInfo()->getRegisterInfo();
163 }
Quentin Colombetba2a0162016-02-16 19:26:02 +0000164 const CallLowering *getCallLowering() const override;
Ahmed Bougacha6756a2c2016-07-27 14:31:55 +0000165 const InstructionSelector *getInstructionSelector() const override;
Tim Northover69fa84a2016-10-14 22:18:18 +0000166 const LegalizerInfo *getLegalizerInfo() const override;
Quentin Colombetc17f7442016-04-06 17:26:03 +0000167 const RegisterBankInfo *getRegBankInfo() const override;
Eric Christopher09696d32015-03-12 02:04:46 +0000168 const Triple &getTargetTriple() const { return TargetTriple; }
Tim Northover3b0846e2014-05-24 12:50:23 +0000169 bool enableMachineScheduler() const override { return true; }
Matthias Braun39a2afc2015-06-13 03:42:16 +0000170 bool enablePostRAScheduler() const override {
Matthias Braun651cff42016-06-02 18:03:53 +0000171 return UsePostRAScheduler;
172 }
173
174 /// Returns ARM processor family.
175 /// Avoid this function! CPU specifics should be kept local to this class
176 /// and preferably modeled with SubtargetFeatures or properties in
177 /// initializeProperties().
178 ARMProcFamilyEnum getProcFamily() const {
179 return ARMProcFamily;
Chad Rosier486e0872014-09-12 17:40:39 +0000180 }
Tim Northover3b0846e2014-05-24 12:50:23 +0000181
Vladimir Sukharev439328e2015-04-01 14:49:29 +0000182 bool hasV8_1aOps() const { return HasV8_1aOps; }
Oliver Stannard7cc0c4e2015-11-26 15:23:32 +0000183 bool hasV8_2aOps() const { return HasV8_2aOps; }
Vladimir Sukharev439328e2015-04-01 14:49:29 +0000184
Tim Northover3b0846e2014-05-24 12:50:23 +0000185 bool hasZeroCycleRegMove() const { return HasZeroCycleRegMove; }
186
187 bool hasZeroCycleZeroing() const { return HasZeroCycleZeroing; }
188
Akira Hatanakaf53b0402015-07-29 14:17:26 +0000189 bool requiresStrictAlign() const { return StrictAlign; }
190
Dean Michael Berris3234d3a2016-11-17 05:15:37 +0000191 bool isXRaySupported() const override { return true; }
192
Akira Hatanaka0d4c9ea2015-07-25 00:18:31 +0000193 bool isX18Reserved() const { return ReserveX18; }
Tim Northover3b0846e2014-05-24 12:50:23 +0000194 bool hasFPARMv8() const { return HasFPARMv8; }
195 bool hasNEON() const { return HasNEON; }
196 bool hasCrypto() const { return HasCrypto; }
197 bool hasCRC() const { return HasCRC; }
Joel Jones75818bc2016-11-30 22:25:24 +0000198 bool hasLSE() const { return HasLSE; }
Sjoerd Meijerd906bf12016-06-03 14:03:27 +0000199 bool hasRAS() const { return HasRAS; }
Chad Rosier58fb5f52017-01-16 16:28:43 +0000200 bool hasRDM() const { return HasRDM; }
Matthias Braun651cff42016-06-02 18:03:53 +0000201 bool balanceFPOps() const { return BalanceFPOps; }
202 bool predictableSelectIsExpensive() const {
203 return PredictableSelectIsExpensive;
204 }
205 bool hasCustomCheapAsMoveHandling() const { return CustomAsCheapAsMove; }
206 bool isMisaligned128StoreSlow() const { return Misaligned128StoreIsSlow; }
Evandro Menezes7784cac2017-01-24 17:34:31 +0000207 bool isPaired128Slow() const { return Paired128IsSlow; }
Matthias Braun651cff42016-06-02 18:03:53 +0000208 bool useAlternateSExtLoadCVTF32Pattern() const {
209 return UseAlternateSExtLoadCVTF32Pattern;
210 }
Matthias Braun46a52382016-10-04 19:28:21 +0000211 bool hasArithmeticBccFusion() const { return HasArithmeticBccFusion; }
212 bool hasArithmeticCbzFusion() const { return HasArithmeticCbzFusion; }
Evandro Menezesb21fb292017-02-01 02:54:39 +0000213 bool hasFuseAES() const { return HasFuseAES; }
Evandro Menezes455382e2017-02-01 02:54:42 +0000214 bool hasFuseLiterals() const { return HasFuseLiterals; }
Evandro Menezeseff2bd92016-10-24 16:14:58 +0000215 bool useRSqrt() const { return UseRSqrt; }
Matthias Braun651cff42016-06-02 18:03:53 +0000216 unsigned getMaxInterleaveFactor() const { return MaxInterleaveFactor; }
217 unsigned getVectorInsertExtractBaseCost() const {
218 return VectorInsertExtractBaseCost;
219 }
220 unsigned getCacheLineSize() const { return CacheLineSize; }
221 unsigned getPrefetchDistance() const { return PrefetchDistance; }
222 unsigned getMinPrefetchStride() const { return MinPrefetchStride; }
223 unsigned getMaxPrefetchIterationsAhead() const {
224 return MaxPrefetchIterationsAhead;
225 }
Evandro Menezesa3a0a602016-06-10 16:00:18 +0000226 unsigned getPrefFunctionAlignment() const { return PrefFunctionAlignment; }
227 unsigned getPrefLoopAlignment() const { return PrefLoopAlignment; }
Matthias Braun651cff42016-06-02 18:03:53 +0000228
Evandro Menezese45de8a2016-09-26 15:32:33 +0000229 unsigned getMaximumJumpTableSize() const { return MaxJumpTableSize; }
230
Tim Northover339c83e2015-11-10 00:44:23 +0000231 /// CPU has TBI (top byte of addresses is ignored during HW address
232 /// translation) and OS enables it.
233 bool supportsAddressTopByteIgnored() const;
234
Ahmed Bougachab0ff6432015-09-01 16:23:45 +0000235 bool hasPerfMon() const { return HasPerfMon; }
Oliver Stannard7cc0c4e2015-11-26 15:23:32 +0000236 bool hasFullFP16() const { return HasFullFP16; }
Oliver Stannarda34e4702015-12-01 10:48:51 +0000237 bool hasSPE() const { return HasSPE; }
Balaram Makam2aba753e2017-03-31 18:16:53 +0000238 bool hasLSLFast() const { return HasLSLFast; }
Tim Northover3b0846e2014-05-24 12:50:23 +0000239
Eric Christopher8b770652015-01-26 19:03:15 +0000240 bool isLittleEndian() const { return IsLittle; }
Tim Northover3b0846e2014-05-24 12:50:23 +0000241
242 bool isTargetDarwin() const { return TargetTriple.isOSDarwin(); }
Chad Rosierb481bdf2014-08-06 16:56:58 +0000243 bool isTargetIOS() const { return TargetTriple.isiOS(); }
244 bool isTargetLinux() const { return TargetTriple.isOSLinux(); }
245 bool isTargetWindows() const { return TargetTriple.isOSWindows(); }
Evgeniy Stepanov5fe279e2015-10-08 21:21:24 +0000246 bool isTargetAndroid() const { return TargetTriple.isAndroid(); }
Petr Hoseka7d59162017-02-24 03:10:10 +0000247 bool isTargetFuchsia() const { return TargetTriple.isOSFuchsia(); }
Tim Northover3b0846e2014-05-24 12:50:23 +0000248
Chad Rosierb481bdf2014-08-06 16:56:58 +0000249 bool isTargetCOFF() const { return TargetTriple.isOSBinFormatCOFF(); }
Tim Northover3b0846e2014-05-24 12:50:23 +0000250 bool isTargetELF() const { return TargetTriple.isOSBinFormatELF(); }
Tim Northover3b0846e2014-05-24 12:50:23 +0000251 bool isTargetMachO() const { return TargetTriple.isOSBinFormatMachO(); }
252
Matthias Braun651cff42016-06-02 18:03:53 +0000253 bool useAA() const override { return UseAA; }
Chad Rosierc9f94772014-09-08 14:31:49 +0000254
Petr Hosek9eb0a1e2017-04-04 19:51:53 +0000255 bool useSmallAddressing() const {
256 switch (TLInfo.getTargetMachine().getCodeModel()) {
257 case CodeModel::Kernel:
258 // Kernel is currently allowed only for Fuchsia targets,
259 // where it is the same as Small for almost all purposes.
260 case CodeModel::Small:
261 return true;
262 default:
263 return false;
264 }
265 }
266
Daniel Sanderse9fdba32017-04-29 17:30:09 +0000267 bool getForCodeSize() const { return ForCodeSize; }
268
Tim Northover3b0846e2014-05-24 12:50:23 +0000269 /// ParseSubtargetFeatures - Parses features string setting specified
270 /// subtarget options. Definition of function is auto generated by tblgen.
271 void ParseSubtargetFeatures(StringRef CPU, StringRef FS);
272
273 /// ClassifyGlobalReference - Find the target operand flags that describe
274 /// how a global value should be referenced for the current subtarget.
275 unsigned char ClassifyGlobalReference(const GlobalValue *GV,
276 const TargetMachine &TM) const;
277
Tim Northover879a0b22017-04-17 17:27:56 +0000278 unsigned char classifyGlobalFunctionReference(const GlobalValue *GV,
279 const TargetMachine &TM) const;
280
Tim Northover3b0846e2014-05-24 12:50:23 +0000281 /// This function returns the name of a function which has an interface
282 /// like the non-standard bzero function, if such a function exists on
283 /// the current subtarget and it is considered prefereable over
284 /// memset with zero passed as the second argument. Otherwise it
285 /// returns null.
286 const char *getBZeroEntry() const;
287
Duncan P. N. Exon Smith63298722016-07-01 00:23:27 +0000288 void overrideSchedPolicy(MachineSchedPolicy &Policy,
Tim Northover3b0846e2014-05-24 12:50:23 +0000289 unsigned NumRegionInstrs) const override;
290
291 bool enableEarlyIfConversion() const override;
Lang Hames8f31f442014-10-09 18:20:51 +0000292
293 std::unique_ptr<PBQPRAConstraint> getCustomPBQPConstraints() const override;
Tim Northover3b0846e2014-05-24 12:50:23 +0000294};
Alexander Kornienkof00654e2015-06-23 09:49:53 +0000295} // End llvm namespace
Tim Northover3b0846e2014-05-24 12:50:23 +0000296
Benjamin Kramera7c40ef2014-08-13 16:26:38 +0000297#endif