blob: a1c263c876431c2ca418ad9847b3c514438a9a51 [file] [log] [blame]
Tom Stellard45bb48e2015-06-13 03:28:10 +00001set(LLVM_TARGET_DEFINITIONS AMDGPU.td)
2
3tablegen(LLVM AMDGPUGenRegisterInfo.inc -gen-register-info)
4tablegen(LLVM AMDGPUGenInstrInfo.inc -gen-instr-info)
5tablegen(LLVM AMDGPUGenDAGISel.inc -gen-dag-isel)
6tablegen(LLVM AMDGPUGenCallingConv.inc -gen-callingconv)
7tablegen(LLVM AMDGPUGenSubtargetInfo.inc -gen-subtarget)
8tablegen(LLVM AMDGPUGenIntrinsics.inc -gen-tgt-intrinsic)
9tablegen(LLVM AMDGPUGenMCCodeEmitter.inc -gen-emitter)
10tablegen(LLVM AMDGPUGenDFAPacketizer.inc -gen-dfa-packetizer)
11tablegen(LLVM AMDGPUGenAsmWriter.inc -gen-asm-writer)
12tablegen(LLVM AMDGPUGenAsmMatcher.inc -gen-asm-matcher)
Tom Stellarde1818af2016-02-18 03:42:32 +000013tablegen(LLVM AMDGPUGenDisassemblerTables.inc -gen-disassembler)
Matt Arsenault11f74022016-10-06 17:19:11 +000014tablegen(LLVM AMDGPUGenMCPseudoLowering.inc -gen-pseudo-lowering)
Tom Stellardca166212017-01-30 21:56:46 +000015if(LLVM_BUILD_GLOBAL_ISEL)
16 tablegen(LLVM AMDGPUGenRegisterBank.inc -gen-register-bank)
17endif()
Tom Stellard45bb48e2015-06-13 03:28:10 +000018add_public_tablegen_target(AMDGPUCommonTableGen)
19
Tom Stellard000c5af2016-04-14 19:09:28 +000020# List of all GlobalISel files.
21set(GLOBAL_ISEL_FILES
22 AMDGPUCallLowering.cpp
Tom Stellardca166212017-01-30 21:56:46 +000023 AMDGPUInstructionSelector.cpp
24 AMDGPULegalizerInfo.cpp
25 AMDGPURegisterBankInfo.cpp
Tom Stellard000c5af2016-04-14 19:09:28 +000026 )
27
28# Add GlobalISel files to the dependencies if the user wants to build it.
29if(LLVM_BUILD_GLOBAL_ISEL)
30 set(GLOBAL_ISEL_BUILD_FILES ${GLOBAL_ISEL_FILES})
31else()
32 set(GLOBAL_ISEL_BUILD_FILES"")
33 set(LLVM_OPTIONAL_SOURCES LLVMGlobalISel ${GLOBAL_ISEL_FILES})
34endif()
35
36
Tom Stellard45bb48e2015-06-13 03:28:10 +000037add_llvm_target(AMDGPUCodeGen
38 AMDILCFGStructurizer.cpp
39 AMDGPUAlwaysInlinePass.cpp
Matt Arsenault39319482015-11-06 18:01:57 +000040 AMDGPUAnnotateKernelFeatures.cpp
Tom Stellarda6f24c62015-12-15 20:55:55 +000041 AMDGPUAnnotateUniformValues.cpp
Tom Stellard45bb48e2015-06-13 03:28:10 +000042 AMDGPUAsmPrinter.cpp
Matt Arsenault86de4862016-06-24 07:07:55 +000043 AMDGPUCodeGenPrepare.cpp
Tom Stellard45bb48e2015-06-13 03:28:10 +000044 AMDGPUFrameLowering.cpp
Tom Stellardc93fc112015-12-10 02:13:01 +000045 AMDGPUTargetObjectFile.cpp
Tom Stellard45bb48e2015-06-13 03:28:10 +000046 AMDGPUIntrinsicInfo.cpp
47 AMDGPUISelDAGToDAG.cpp
Matt Arsenault0699ef32017-02-09 22:00:42 +000048 AMDGPULowerIntrinsics.cpp
Tom Stellard45bb48e2015-06-13 03:28:10 +000049 AMDGPUMCInstLower.cpp
50 AMDGPUMachineFunction.cpp
Stanislav Mekhanoshin50ea93a2016-12-08 19:46:04 +000051 AMDGPUUnifyMetadata.cpp
Tom Stellardfd253952015-08-07 23:19:30 +000052 AMDGPUOpenCLImageTypeLoweringPass.cpp
Tom Stellard45bb48e2015-06-13 03:28:10 +000053 AMDGPUSubtarget.cpp
54 AMDGPUTargetMachine.cpp
55 AMDGPUTargetTransformInfo.cpp
56 AMDGPUISelLowering.cpp
57 AMDGPUInstrInfo.cpp
58 AMDGPUPromoteAlloca.cpp
59 AMDGPURegisterInfo.cpp
Tom Stellardcb6ba622016-04-30 00:23:06 +000060 GCNHazardRecognizer.cpp
Tom Stellard0d23ebe2016-08-29 19:42:52 +000061 GCNSchedStrategy.cpp
Tom Stellard45bb48e2015-06-13 03:28:10 +000062 R600ClauseMergePass.cpp
63 R600ControlFlowFinalizer.cpp
64 R600EmitClauseMarkers.cpp
65 R600ExpandSpecialInstrs.cpp
Matt Arsenault43e92fe2016-06-24 06:30:11 +000066 R600FrameLowering.cpp
Tom Stellard45bb48e2015-06-13 03:28:10 +000067 R600InstrInfo.cpp
68 R600ISelLowering.cpp
69 R600MachineFunctionInfo.cpp
70 R600MachineScheduler.cpp
71 R600OptimizeVectorRegisters.cpp
72 R600Packetizer.cpp
73 R600RegisterInfo.cpp
Tom Stellard45bb48e2015-06-13 03:28:10 +000074 SIAnnotateControlFlow.cpp
Konstantin Zhuravlyova7919322016-05-10 18:33:41 +000075 SIDebuggerInsertNops.cpp
Tom Stellard45bb48e2015-06-13 03:28:10 +000076 SIFixControlFlowLiveIntervals.cpp
77 SIFixSGPRCopies.cpp
Stanislav Mekhanoshin22a56f22017-01-24 17:46:17 +000078 SIFixVGPRCopies.cpp
Tom Stellard45bb48e2015-06-13 03:28:10 +000079 SIFoldOperands.cpp
Matt Arsenault0c90e952015-11-06 18:17:45 +000080 SIFrameLowering.cpp
Matt Arsenault78fc9da2016-08-22 19:33:16 +000081 SIInsertSkips.cpp
Tom Stellard45bb48e2015-06-13 03:28:10 +000082 SIInsertWaits.cpp
83 SIInstrInfo.cpp
84 SIISelLowering.cpp
85 SILoadStoreOptimizer.cpp
86 SILowerControlFlow.cpp
87 SILowerI1Copies.cpp
88 SIMachineFunctionInfo.cpp
Nicolai Haehnle02c32912016-01-13 16:10:10 +000089 SIMachineScheduler.cpp
Matt Arsenaulte6740752016-09-29 01:44:16 +000090 SIOptimizeExecMasking.cpp
Tom Stellard45bb48e2015-06-13 03:28:10 +000091 SIRegisterInfo.cpp
92 SIShrinkInstructions.cpp
93 SITypeRewriter.cpp
Nicolai Haehnle213e87f2016-03-21 20:28:33 +000094 SIWholeQuadMode.cpp
Tom Stellard000c5af2016-04-14 19:09:28 +000095 ${GLOBAL_ISEL_BUILD_FILES}
Tom Stellard45bb48e2015-06-13 03:28:10 +000096 )
97
98add_subdirectory(AsmParser)
99add_subdirectory(InstPrinter)
Tom Stellarde1818af2016-02-18 03:42:32 +0000100add_subdirectory(Disassembler)
Tom Stellard45bb48e2015-06-13 03:28:10 +0000101add_subdirectory(TargetInfo)
102add_subdirectory(MCTargetDesc)
Tom Stellard347ac792015-06-26 21:15:07 +0000103add_subdirectory(Utils)