blob: 5ffe5afc4dba92359f32ae782dfa71040bf2ba3c [file] [log] [blame]
Chris Lattner101b8cd2002-12-16 16:15:28 +00001//===-- RegAllocLocal.cpp - A BasicBlock generic register allocator -------===//
John Criswell482202a2003-10-20 19:43:21 +00002//
3// The LLVM Compiler Infrastructure
4//
5// This file was developed by the LLVM research group and is distributed under
6// the University of Illinois Open Source License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
Chris Lattner101b8cd2002-12-16 16:15:28 +00009//
10// This register allocator allocates registers to a basic block at a time,
11// attempting to keep values in registers and reusing registers as appropriate.
12//
13//===----------------------------------------------------------------------===//
14
Chris Lattner74e4e9b2003-08-03 21:47:31 +000015#define DEBUG_TYPE "regalloc"
Chris Lattnerbfa53192003-01-13 00:25:40 +000016#include "llvm/CodeGen/Passes.h"
Chris Lattnerb4e41112002-12-28 20:40:43 +000017#include "llvm/CodeGen/MachineFunctionPass.h"
Chris Lattner101b8cd2002-12-16 16:15:28 +000018#include "llvm/CodeGen/MachineInstr.h"
Chris Lattner42714ec2002-12-25 05:05:46 +000019#include "llvm/CodeGen/SSARegMap.h"
Chris Lattnerca4362f2002-12-28 21:08:26 +000020#include "llvm/CodeGen/MachineFrameInfo.h"
Chris Lattnerbfa53192003-01-13 00:25:40 +000021#include "llvm/CodeGen/LiveVariables.h"
Chris Lattnerb4d58d72003-01-14 22:00:31 +000022#include "llvm/Target/TargetInstrInfo.h"
Chris Lattner101b8cd2002-12-16 16:15:28 +000023#include "llvm/Target/TargetMachine.h"
Chris Lattnerd4627092002-12-18 08:14:26 +000024#include "Support/CommandLine.h"
Chris Lattner1007f032003-08-01 22:21:34 +000025#include "Support/Debug.h"
26#include "Support/Statistic.h"
Chris Lattner101b8cd2002-12-16 16:15:28 +000027#include <iostream>
28
Brian Gaeke960707c2003-11-11 22:41:34 +000029namespace llvm {
30
Chris Lattner101b8cd2002-12-16 16:15:28 +000031namespace {
32 Statistic<> NumSpilled ("ra-local", "Number of registers spilled");
33 Statistic<> NumReloaded("ra-local", "Number of registers reloaded");
Chris Lattner9ab7fbe2003-10-24 20:05:58 +000034 cl::opt<bool> DisableKill("disable-kill", cl::Hidden,
Chris Lattnerd4627092002-12-18 08:14:26 +000035 cl::desc("Disable register kill in local-ra"));
Chris Lattner101b8cd2002-12-16 16:15:28 +000036
Chris Lattnerb4e41112002-12-28 20:40:43 +000037 class RA : public MachineFunctionPass {
38 const TargetMachine *TM;
Chris Lattner101b8cd2002-12-16 16:15:28 +000039 MachineFunction *MF;
Chris Lattnerb4e41112002-12-28 20:40:43 +000040 const MRegisterInfo *RegInfo;
Chris Lattnerbfa53192003-01-13 00:25:40 +000041 LiveVariables *LV;
Chris Lattner42714ec2002-12-25 05:05:46 +000042
Chris Lattner815b85e2003-08-04 23:36:39 +000043 // StackSlotForVirtReg - Maps virtual regs to the frame index where these
44 // values are spilled.
Chris Lattnerb4e41112002-12-28 20:40:43 +000045 std::map<unsigned, int> StackSlotForVirtReg;
Chris Lattner101b8cd2002-12-16 16:15:28 +000046
47 // Virt2PhysRegMap - This map contains entries for each virtual register
48 // that is currently available in a physical register.
49 //
50 std::map<unsigned, unsigned> Virt2PhysRegMap;
51
52 // PhysRegsUsed - This map contains entries for each physical register that
53 // currently has a value (ie, it is in Virt2PhysRegMap). The value mapped
54 // to is the virtual register corresponding to the physical register (the
55 // inverse of the Virt2PhysRegMap), or 0. The value is set to 0 if this
56 // register is pinned because it is used by a future instruction.
57 //
58 std::map<unsigned, unsigned> PhysRegsUsed;
59
60 // PhysRegsUseOrder - This contains a list of the physical registers that
61 // currently have a virtual register value in them. This list provides an
62 // ordering of registers, imposing a reallocation order. This list is only
63 // used if all registers are allocated and we have to spill one, in which
64 // case we spill the least recently used register. Entries at the front of
65 // the list are the least recently used registers, entries at the back are
66 // the most recently used.
67 //
68 std::vector<unsigned> PhysRegsUseOrder;
69
Chris Lattnerbfa53192003-01-13 00:25:40 +000070 // VirtRegModified - This bitset contains information about which virtual
71 // registers need to be spilled back to memory when their registers are
72 // scavenged. If a virtual register has simply been rematerialized, there
73 // is no reason to spill it to memory when we need the register back.
Chris Lattnerd4627092002-12-18 08:14:26 +000074 //
Chris Lattnerbfa53192003-01-13 00:25:40 +000075 std::vector<bool> VirtRegModified;
76
77 void markVirtRegModified(unsigned Reg, bool Val = true) {
78 assert(Reg >= MRegisterInfo::FirstVirtualRegister && "Illegal VirtReg!");
79 Reg -= MRegisterInfo::FirstVirtualRegister;
80 if (VirtRegModified.size() <= Reg) VirtRegModified.resize(Reg+1);
81 VirtRegModified[Reg] = Val;
82 }
83
84 bool isVirtRegModified(unsigned Reg) const {
85 assert(Reg >= MRegisterInfo::FirstVirtualRegister && "Illegal VirtReg!");
86 assert(Reg - MRegisterInfo::FirstVirtualRegister < VirtRegModified.size()
87 && "Illegal virtual register!");
88 return VirtRegModified[Reg - MRegisterInfo::FirstVirtualRegister];
89 }
Chris Lattnerd4627092002-12-18 08:14:26 +000090
Chris Lattner101b8cd2002-12-16 16:15:28 +000091 void MarkPhysRegRecentlyUsed(unsigned Reg) {
Chris Lattnerd4627092002-12-18 08:14:26 +000092 assert(!PhysRegsUseOrder.empty() && "No registers used!");
Chris Lattner763729c52002-12-24 00:04:55 +000093 if (PhysRegsUseOrder.back() == Reg) return; // Already most recently used
94
95 for (unsigned i = PhysRegsUseOrder.size(); i != 0; --i)
96 if (areRegsEqual(Reg, PhysRegsUseOrder[i-1])) {
97 unsigned RegMatch = PhysRegsUseOrder[i-1]; // remove from middle
98 PhysRegsUseOrder.erase(PhysRegsUseOrder.begin()+i-1);
99 // Add it to the end of the list
100 PhysRegsUseOrder.push_back(RegMatch);
101 if (RegMatch == Reg)
102 return; // Found an exact match, exit early
103 }
Chris Lattner101b8cd2002-12-16 16:15:28 +0000104 }
105
106 public:
Chris Lattner101b8cd2002-12-16 16:15:28 +0000107 virtual const char *getPassName() const {
108 return "Local Register Allocator";
109 }
110
Chris Lattnerbfa53192003-01-13 00:25:40 +0000111 virtual void getAnalysisUsage(AnalysisUsage &AU) const {
112 if (!DisableKill)
113 AU.addRequired<LiveVariables>();
114 AU.addRequiredID(PHIEliminationID);
Alkis Evlogimenos71390902003-12-18 22:40:24 +0000115 AU.addRequiredID(TwoAddressInstructionPassID);
Chris Lattnerbfa53192003-01-13 00:25:40 +0000116 MachineFunctionPass::getAnalysisUsage(AU);
117 }
118
Chris Lattner101b8cd2002-12-16 16:15:28 +0000119 private:
120 /// runOnMachineFunction - Register allocate the whole function
121 bool runOnMachineFunction(MachineFunction &Fn);
122
123 /// AllocateBasicBlock - Register allocate the specified basic block.
124 void AllocateBasicBlock(MachineBasicBlock &MBB);
125
Chris Lattnerd4627092002-12-18 08:14:26 +0000126
Chris Lattnerd4627092002-12-18 08:14:26 +0000127 /// areRegsEqual - This method returns true if the specified registers are
128 /// related to each other. To do this, it checks to see if they are equal
129 /// or if the first register is in the alias set of the second register.
130 ///
131 bool areRegsEqual(unsigned R1, unsigned R2) const {
132 if (R1 == R2) return true;
Alkis Evlogimenos5f1f3372003-10-08 05:20:08 +0000133 for (const unsigned *AliasSet = RegInfo->getAliasSet(R2);
134 *AliasSet; ++AliasSet) {
135 if (*AliasSet == R1) return true;
136 }
Chris Lattnerd4627092002-12-18 08:14:26 +0000137 return false;
138 }
139
Chris Lattnerb4e41112002-12-28 20:40:43 +0000140 /// getStackSpaceFor - This returns the frame index of the specified virtual
Chris Lattner815b85e2003-08-04 23:36:39 +0000141 /// register on the stack, allocating space if necessary.
Chris Lattnerb4e41112002-12-28 20:40:43 +0000142 int getStackSpaceFor(unsigned VirtReg, const TargetRegisterClass *RC);
Chris Lattner101b8cd2002-12-16 16:15:28 +0000143
Chris Lattner815b85e2003-08-04 23:36:39 +0000144 /// removePhysReg - This method marks the specified physical register as no
145 /// longer being in use.
146 ///
Chris Lattnerd4627092002-12-18 08:14:26 +0000147 void removePhysReg(unsigned PhysReg);
Chris Lattner101b8cd2002-12-16 16:15:28 +0000148
149 /// spillVirtReg - This method spills the value specified by PhysReg into
150 /// the virtual register slot specified by VirtReg. It then updates the RA
151 /// data structures to indicate the fact that PhysReg is now available.
152 ///
153 void spillVirtReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I,
154 unsigned VirtReg, unsigned PhysReg);
155
Chris Lattner0129b862002-12-16 17:44:42 +0000156 /// spillPhysReg - This method spills the specified physical register into
Chris Lattner931947d2003-08-17 18:01:15 +0000157 /// the virtual register slot associated with it. If OnlyVirtRegs is set to
158 /// true, then the request is ignored if the physical register does not
159 /// contain a virtual register.
Chris Lattnerbfa53192003-01-13 00:25:40 +0000160 ///
Chris Lattner0129b862002-12-16 17:44:42 +0000161 void spillPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I,
Chris Lattner931947d2003-08-17 18:01:15 +0000162 unsigned PhysReg, bool OnlyVirtRegs = false);
Chris Lattner0129b862002-12-16 17:44:42 +0000163
Chris Lattnerbfa53192003-01-13 00:25:40 +0000164 /// assignVirtToPhysReg - This method updates local state so that we know
165 /// that PhysReg is the proper container for VirtReg now. The physical
166 /// register must not be used for anything else when this is called.
167 ///
168 void assignVirtToPhysReg(unsigned VirtReg, unsigned PhysReg);
169
170 /// liberatePhysReg - Make sure the specified physical register is available
171 /// for use. If there is currently a value in it, it is either moved out of
172 /// the way or spilled to memory.
173 ///
174 void liberatePhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I,
175 unsigned PhysReg);
Chris Lattner101b8cd2002-12-16 16:15:28 +0000176
Chris Lattner4664bd52002-12-17 02:50:10 +0000177 /// isPhysRegAvailable - Return true if the specified physical register is
178 /// free and available for use. This also includes checking to see if
179 /// aliased registers are all free...
180 ///
Chris Lattnerd4627092002-12-18 08:14:26 +0000181 bool isPhysRegAvailable(unsigned PhysReg) const;
Chris Lattnerbfa53192003-01-13 00:25:40 +0000182
183 /// getFreeReg - Look to see if there is a free register available in the
184 /// specified register class. If not, return 0.
185 ///
186 unsigned getFreeReg(const TargetRegisterClass *RC);
Chris Lattner101b8cd2002-12-16 16:15:28 +0000187
Chris Lattnerbfa53192003-01-13 00:25:40 +0000188 /// getReg - Find a physical register to hold the specified virtual
Chris Lattner101b8cd2002-12-16 16:15:28 +0000189 /// register. If all compatible physical registers are used, this method
190 /// spills the last used virtual register to the stack, and uses that
191 /// register.
192 ///
Chris Lattnerbfa53192003-01-13 00:25:40 +0000193 unsigned getReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I,
194 unsigned VirtReg);
Chris Lattner101b8cd2002-12-16 16:15:28 +0000195
196 /// reloadVirtReg - This method loads the specified virtual register into a
197 /// physical register, returning the physical register chosen. This updates
198 /// the regalloc data structures to reflect the fact that the virtual reg is
199 /// now alive in a physical register, and the previous one isn't.
200 ///
201 unsigned reloadVirtReg(MachineBasicBlock &MBB,
202 MachineBasicBlock::iterator &I, unsigned VirtReg);
Chris Lattner815b85e2003-08-04 23:36:39 +0000203
204 void reloadPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I,
205 unsigned PhysReg);
Chris Lattner101b8cd2002-12-16 16:15:28 +0000206 };
Chris Lattner101b8cd2002-12-16 16:15:28 +0000207}
208
Chris Lattner815b85e2003-08-04 23:36:39 +0000209/// getStackSpaceFor - This allocates space for the specified virtual register
210/// to be held on the stack.
211int RA::getStackSpaceFor(unsigned VirtReg, const TargetRegisterClass *RC) {
212 // Find the location Reg would belong...
213 std::map<unsigned, int>::iterator I =StackSlotForVirtReg.lower_bound(VirtReg);
Chris Lattner101b8cd2002-12-16 16:15:28 +0000214
Chris Lattnerb4e41112002-12-28 20:40:43 +0000215 if (I != StackSlotForVirtReg.end() && I->first == VirtReg)
Chris Lattner101b8cd2002-12-16 16:15:28 +0000216 return I->second; // Already has space allocated?
217
Chris Lattnerb4e41112002-12-28 20:40:43 +0000218 // Allocate a new stack object for this spill location...
Chris Lattnerbfa53192003-01-13 00:25:40 +0000219 int FrameIdx = MF->getFrameInfo()->CreateStackObject(RC);
Chris Lattner101b8cd2002-12-16 16:15:28 +0000220
Chris Lattner101b8cd2002-12-16 16:15:28 +0000221 // Assign the slot...
Chris Lattnerb4e41112002-12-28 20:40:43 +0000222 StackSlotForVirtReg.insert(I, std::make_pair(VirtReg, FrameIdx));
223 return FrameIdx;
Chris Lattner101b8cd2002-12-16 16:15:28 +0000224}
225
Chris Lattner4664bd52002-12-17 02:50:10 +0000226
Chris Lattnerd4627092002-12-18 08:14:26 +0000227/// removePhysReg - This method marks the specified physical register as no
228/// longer being in use.
229///
230void RA::removePhysReg(unsigned PhysReg) {
231 PhysRegsUsed.erase(PhysReg); // PhyReg no longer used
232
233 std::vector<unsigned>::iterator It =
234 std::find(PhysRegsUseOrder.begin(), PhysRegsUseOrder.end(), PhysReg);
Alkis Evlogimenosebbd66c2004-01-13 06:24:30 +0000235 if (It != PhysRegsUseOrder.end())
236 PhysRegsUseOrder.erase(It);
Chris Lattnerd4627092002-12-18 08:14:26 +0000237}
238
Chris Lattnerbfa53192003-01-13 00:25:40 +0000239
Chris Lattner101b8cd2002-12-16 16:15:28 +0000240/// spillVirtReg - This method spills the value specified by PhysReg into the
241/// virtual register slot specified by VirtReg. It then updates the RA data
242/// structures to indicate the fact that PhysReg is now available.
243///
244void RA::spillVirtReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I,
245 unsigned VirtReg, unsigned PhysReg) {
Chris Lattner92a199d2003-08-05 04:13:58 +0000246 if (!VirtReg && DisableKill) return;
247 assert(VirtReg && "Spilling a physical register is illegal!"
Chris Lattner506fa682003-08-05 00:49:09 +0000248 " Must not have appropriate kill for the register or use exists beyond"
249 " the intended one.");
250 DEBUG(std::cerr << " Spilling register " << RegInfo->getName(PhysReg);
251 std::cerr << " containing %reg" << VirtReg;
252 if (!isVirtRegModified(VirtReg))
253 std::cerr << " which has not been modified, so no store necessary!");
Chris Lattner101b8cd2002-12-16 16:15:28 +0000254
Chris Lattner506fa682003-08-05 00:49:09 +0000255 // Otherwise, there is a virtual register corresponding to this physical
256 // register. We only need to spill it into its stack slot if it has been
257 // modified.
258 if (isVirtRegModified(VirtReg)) {
259 const TargetRegisterClass *RC = MF->getSSARegMap()->getRegClass(VirtReg);
260 int FrameIndex = getStackSpaceFor(VirtReg, RC);
261 DEBUG(std::cerr << " to stack slot #" << FrameIndex);
262 RegInfo->storeRegToStackSlot(MBB, I, PhysReg, FrameIndex, RC);
263 ++NumSpilled; // Update statistics
Chris Lattner101b8cd2002-12-16 16:15:28 +0000264 }
Chris Lattner506fa682003-08-05 00:49:09 +0000265 Virt2PhysRegMap.erase(VirtReg); // VirtReg no longer available
Chris Lattner101b8cd2002-12-16 16:15:28 +0000266
Chris Lattner815b85e2003-08-04 23:36:39 +0000267 DEBUG(std::cerr << "\n");
Chris Lattnerd4627092002-12-18 08:14:26 +0000268 removePhysReg(PhysReg);
Chris Lattner101b8cd2002-12-16 16:15:28 +0000269}
270
Chris Lattner4664bd52002-12-17 02:50:10 +0000271
Chris Lattnerbfa53192003-01-13 00:25:40 +0000272/// spillPhysReg - This method spills the specified physical register into the
Chris Lattner931947d2003-08-17 18:01:15 +0000273/// virtual register slot associated with it. If OnlyVirtRegs is set to true,
274/// then the request is ignored if the physical register does not contain a
275/// virtual register.
Chris Lattnerbfa53192003-01-13 00:25:40 +0000276///
277void RA::spillPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I,
Chris Lattner931947d2003-08-17 18:01:15 +0000278 unsigned PhysReg, bool OnlyVirtRegs) {
Chris Lattnerbfa53192003-01-13 00:25:40 +0000279 std::map<unsigned, unsigned>::iterator PI = PhysRegsUsed.find(PhysReg);
280 if (PI != PhysRegsUsed.end()) { // Only spill it if it's used!
Chris Lattner931947d2003-08-17 18:01:15 +0000281 if (PI->second || !OnlyVirtRegs)
282 spillVirtReg(MBB, I, PI->second, PhysReg);
Alkis Evlogimenos5f1f3372003-10-08 05:20:08 +0000283 } else {
Chris Lattnerbfa53192003-01-13 00:25:40 +0000284 // If the selected register aliases any other registers, we must make
285 // sure that one of the aliases isn't alive...
Alkis Evlogimenos5f1f3372003-10-08 05:20:08 +0000286 for (const unsigned *AliasSet = RegInfo->getAliasSet(PhysReg);
287 *AliasSet; ++AliasSet) {
288 PI = PhysRegsUsed.find(*AliasSet);
Chris Lattnerbfa53192003-01-13 00:25:40 +0000289 if (PI != PhysRegsUsed.end()) // Spill aliased register...
Chris Lattner931947d2003-08-17 18:01:15 +0000290 if (PI->second || !OnlyVirtRegs)
Alkis Evlogimenos5f1f3372003-10-08 05:20:08 +0000291 spillVirtReg(MBB, I, PI->second, *AliasSet);
Chris Lattnerbfa53192003-01-13 00:25:40 +0000292 }
293 }
294}
295
296
297/// assignVirtToPhysReg - This method updates local state so that we know
298/// that PhysReg is the proper container for VirtReg now. The physical
299/// register must not be used for anything else when this is called.
300///
301void RA::assignVirtToPhysReg(unsigned VirtReg, unsigned PhysReg) {
302 assert(PhysRegsUsed.find(PhysReg) == PhysRegsUsed.end() &&
303 "Phys reg already assigned!");
304 // Update information to note the fact that this register was just used, and
305 // it holds VirtReg.
306 PhysRegsUsed[PhysReg] = VirtReg;
307 Virt2PhysRegMap[VirtReg] = PhysReg;
308 PhysRegsUseOrder.push_back(PhysReg); // New use of PhysReg
309}
310
311
Chris Lattner4664bd52002-12-17 02:50:10 +0000312/// isPhysRegAvailable - Return true if the specified physical register is free
313/// and available for use. This also includes checking to see if aliased
314/// registers are all free...
315///
316bool RA::isPhysRegAvailable(unsigned PhysReg) const {
317 if (PhysRegsUsed.count(PhysReg)) return false;
318
319 // If the selected register aliases any other allocated registers, it is
320 // not free!
Alkis Evlogimenos5f1f3372003-10-08 05:20:08 +0000321 for (const unsigned *AliasSet = RegInfo->getAliasSet(PhysReg);
322 *AliasSet; ++AliasSet)
323 if (PhysRegsUsed.count(*AliasSet)) // Aliased register in use?
324 return false; // Can't use this reg then.
Chris Lattner4664bd52002-12-17 02:50:10 +0000325 return true;
326}
327
328
Chris Lattnerbfa53192003-01-13 00:25:40 +0000329/// getFreeReg - Look to see if there is a free register available in the
330/// specified register class. If not, return 0.
Chris Lattner101b8cd2002-12-16 16:15:28 +0000331///
Chris Lattnerbfa53192003-01-13 00:25:40 +0000332unsigned RA::getFreeReg(const TargetRegisterClass *RC) {
Chris Lattnerb4e41112002-12-28 20:40:43 +0000333 // Get iterators defining the range of registers that are valid to allocate in
334 // this class, which also specifies the preferred allocation order.
335 TargetRegisterClass::iterator RI = RC->allocation_order_begin(*MF);
336 TargetRegisterClass::iterator RE = RC->allocation_order_end(*MF);
Chris Lattner4664bd52002-12-17 02:50:10 +0000337
Chris Lattnerbfa53192003-01-13 00:25:40 +0000338 for (; RI != RE; ++RI)
339 if (isPhysRegAvailable(*RI)) { // Is reg unused?
340 assert(*RI != 0 && "Cannot use register!");
341 return *RI; // Found an unused register!
342 }
343 return 0;
344}
345
346
347/// liberatePhysReg - Make sure the specified physical register is available for
348/// use. If there is currently a value in it, it is either moved out of the way
349/// or spilled to memory.
350///
351void RA::liberatePhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I,
352 unsigned PhysReg) {
353 // FIXME: This code checks to see if a register is available, but it really
354 // wants to know if a reg is available BEFORE the instruction executes. If
355 // called after killed operands are freed, it runs the risk of reallocating a
356 // used operand...
357#if 0
358 if (isPhysRegAvailable(PhysReg)) return; // Already available...
359
360 // Check to see if the register is directly used, not indirectly used through
361 // aliases. If aliased registers are the ones actually used, we cannot be
362 // sure that we will be able to save the whole thing if we do a reg-reg copy.
363 std::map<unsigned, unsigned>::iterator PRUI = PhysRegsUsed.find(PhysReg);
364 if (PRUI != PhysRegsUsed.end()) {
365 unsigned VirtReg = PRUI->second; // The virtual register held...
366
367 // Check to see if there is a compatible register available. If so, we can
368 // move the value into the new register...
369 //
370 const TargetRegisterClass *RC = RegInfo->getRegClass(PhysReg);
371 if (unsigned NewReg = getFreeReg(RC)) {
372 // Emit the code to copy the value...
373 RegInfo->copyRegToReg(MBB, I, NewReg, PhysReg, RC);
374
375 // Update our internal state to indicate that PhysReg is available and Reg
376 // isn't.
377 Virt2PhysRegMap.erase(VirtReg);
378 removePhysReg(PhysReg); // Free the physreg
379
380 // Move reference over to new register...
381 assignVirtToPhysReg(VirtReg, NewReg);
382 return;
Chris Lattner4664bd52002-12-17 02:50:10 +0000383 }
Chris Lattner101b8cd2002-12-16 16:15:28 +0000384 }
Chris Lattnerbfa53192003-01-13 00:25:40 +0000385#endif
386 spillPhysReg(MBB, I, PhysReg);
387}
388
389
390/// getReg - Find a physical register to hold the specified virtual
391/// register. If all compatible physical registers are used, this method spills
392/// the last used virtual register to the stack, and uses that register.
393///
394unsigned RA::getReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I,
395 unsigned VirtReg) {
396 const TargetRegisterClass *RC = MF->getSSARegMap()->getRegClass(VirtReg);
397
398 // First check to see if we have a free register of the requested type...
399 unsigned PhysReg = getFreeReg(RC);
Chris Lattner101b8cd2002-12-16 16:15:28 +0000400
Chris Lattner4664bd52002-12-17 02:50:10 +0000401 // If we didn't find an unused register, scavenge one now!
Chris Lattner101b8cd2002-12-16 16:15:28 +0000402 if (PhysReg == 0) {
Chris Lattner0129b862002-12-16 17:44:42 +0000403 assert(!PhysRegsUseOrder.empty() && "No allocated registers??");
Chris Lattner4664bd52002-12-17 02:50:10 +0000404
405 // Loop over all of the preallocated registers from the least recently used
406 // to the most recently used. When we find one that is capable of holding
407 // our register, use it.
408 for (unsigned i = 0; PhysReg == 0; ++i) {
Chris Lattner101b8cd2002-12-16 16:15:28 +0000409 assert(i != PhysRegsUseOrder.size() &&
410 "Couldn't find a register of the appropriate class!");
Chris Lattner4664bd52002-12-17 02:50:10 +0000411
412 unsigned R = PhysRegsUseOrder[i];
Chris Lattnere6235442003-08-23 23:49:42 +0000413
414 // We can only use this register if it holds a virtual register (ie, it
415 // can be spilled). Do not use it if it is an explicitly allocated
416 // physical register!
417 assert(PhysRegsUsed.count(R) &&
418 "PhysReg in PhysRegsUseOrder, but is not allocated?");
419 if (PhysRegsUsed[R]) {
420 // If the current register is compatible, use it.
421 if (RegInfo->getRegClass(R) == RC) {
422 PhysReg = R;
423 break;
424 } else {
425 // If one of the registers aliased to the current register is
426 // compatible, use it.
Alkis Evlogimenos5f1f3372003-10-08 05:20:08 +0000427 for (const unsigned *AliasSet = RegInfo->getAliasSet(R);
428 *AliasSet; ++AliasSet) {
429 if (RegInfo->getRegClass(*AliasSet) == RC) {
430 PhysReg = *AliasSet; // Take an aliased register
431 break;
432 }
433 }
Chris Lattnere6235442003-08-23 23:49:42 +0000434 }
Chris Lattner4664bd52002-12-17 02:50:10 +0000435 }
Chris Lattner101b8cd2002-12-16 16:15:28 +0000436 }
437
Chris Lattner4664bd52002-12-17 02:50:10 +0000438 assert(PhysReg && "Physical register not assigned!?!?");
439
Chris Lattner101b8cd2002-12-16 16:15:28 +0000440 // At this point PhysRegsUseOrder[i] is the least recently used register of
441 // compatible register class. Spill it to memory and reap its remains.
Chris Lattner0129b862002-12-16 17:44:42 +0000442 spillPhysReg(MBB, I, PhysReg);
Chris Lattner101b8cd2002-12-16 16:15:28 +0000443 }
444
445 // Now that we know which register we need to assign this to, do it now!
Chris Lattnerbfa53192003-01-13 00:25:40 +0000446 assignVirtToPhysReg(VirtReg, PhysReg);
Chris Lattner101b8cd2002-12-16 16:15:28 +0000447 return PhysReg;
448}
449
Chris Lattner4664bd52002-12-17 02:50:10 +0000450
Chris Lattner101b8cd2002-12-16 16:15:28 +0000451/// reloadVirtReg - This method loads the specified virtual register into a
452/// physical register, returning the physical register chosen. This updates the
453/// regalloc data structures to reflect the fact that the virtual reg is now
454/// alive in a physical register, and the previous one isn't.
455///
456unsigned RA::reloadVirtReg(MachineBasicBlock &MBB,
457 MachineBasicBlock::iterator &I,
458 unsigned VirtReg) {
459 std::map<unsigned, unsigned>::iterator It = Virt2PhysRegMap.find(VirtReg);
460 if (It != Virt2PhysRegMap.end()) {
461 MarkPhysRegRecentlyUsed(It->second);
462 return It->second; // Already have this value available!
463 }
464
Chris Lattnerbfa53192003-01-13 00:25:40 +0000465 unsigned PhysReg = getReg(MBB, I, VirtReg);
Chris Lattner101b8cd2002-12-16 16:15:28 +0000466
Chris Lattner42714ec2002-12-25 05:05:46 +0000467 const TargetRegisterClass *RC = MF->getSSARegMap()->getRegClass(VirtReg);
Chris Lattnerb4e41112002-12-28 20:40:43 +0000468 int FrameIndex = getStackSpaceFor(VirtReg, RC);
Chris Lattner101b8cd2002-12-16 16:15:28 +0000469
Chris Lattnerbfa53192003-01-13 00:25:40 +0000470 markVirtRegModified(VirtReg, false); // Note that this reg was just reloaded
471
Chris Lattner815b85e2003-08-04 23:36:39 +0000472 DEBUG(std::cerr << " Reloading %reg" << VirtReg << " into "
473 << RegInfo->getName(PhysReg) << "\n");
474
Chris Lattner101b8cd2002-12-16 16:15:28 +0000475 // Add move instruction(s)
Chris Lattnerb4e41112002-12-28 20:40:43 +0000476 RegInfo->loadRegFromStackSlot(MBB, I, PhysReg, FrameIndex, RC);
Chris Lattner101b8cd2002-12-16 16:15:28 +0000477 ++NumReloaded; // Update statistics
478 return PhysReg;
479}
480
Chris Lattner815b85e2003-08-04 23:36:39 +0000481
482
Chris Lattner101b8cd2002-12-16 16:15:28 +0000483void RA::AllocateBasicBlock(MachineBasicBlock &MBB) {
484 // loop over each instruction
485 MachineBasicBlock::iterator I = MBB.begin();
486 for (; I != MBB.end(); ++I) {
487 MachineInstr *MI = *I;
Chris Lattnerb4d58d72003-01-14 22:00:31 +0000488 const TargetInstrDescriptor &TID = TM->getInstrInfo().get(MI->getOpcode());
Chris Lattner815b85e2003-08-04 23:36:39 +0000489 DEBUG(std::cerr << "\nStarting RegAlloc of: " << *MI;
490 std::cerr << " Regs have values: ";
491 for (std::map<unsigned, unsigned>::const_iterator
492 I = PhysRegsUsed.begin(), E = PhysRegsUsed.end(); I != E; ++I)
493 std::cerr << "[" << RegInfo->getName(I->first)
494 << ",%reg" << I->second << "] ";
495 std::cerr << "\n");
Chris Lattner101b8cd2002-12-16 16:15:28 +0000496
Chris Lattner4664bd52002-12-17 02:50:10 +0000497 // Loop over the implicit uses, making sure that they are at the head of the
498 // use order list, so they don't get reallocated.
Alkis Evlogimenos5f1f3372003-10-08 05:20:08 +0000499 for (const unsigned *ImplicitUses = TID.ImplicitUses;
500 *ImplicitUses; ++ImplicitUses)
501 MarkPhysRegRecentlyUsed(*ImplicitUses);
Chris Lattner101b8cd2002-12-16 16:15:28 +0000502
Brian Gaeke91e16e72003-08-15 21:19:25 +0000503 // Get the used operands into registers. This has the potential to spill
Chris Lattner815b85e2003-08-04 23:36:39 +0000504 // incoming values if we are out of registers. Note that we completely
505 // ignore physical register uses here. We assume that if an explicit
506 // physical register is referenced by the instruction, that it is guaranteed
507 // to be live-in, or the input is badly hosed.
Chris Lattner101b8cd2002-12-16 16:15:28 +0000508 //
509 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i)
Alkis Evlogimenosaaba4632003-12-14 13:24:17 +0000510 if (MI->getOperand(i).isUse() &&
511 !MI->getOperand(i).isDef() &&
512 MI->getOperand(i).isVirtualRegister()){
Chris Lattner101b8cd2002-12-16 16:15:28 +0000513 unsigned VirtSrcReg = MI->getOperand(i).getAllocatedRegNum();
514 unsigned PhysSrcReg = reloadVirtReg(MBB, I, VirtSrcReg);
515 MI->SetMachineOperandReg(i, PhysSrcReg); // Assign the input register
516 }
517
Chris Lattnerbfa53192003-01-13 00:25:40 +0000518 if (!DisableKill) {
519 // If this instruction is the last user of anything in registers, kill the
520 // value, freeing the register being used, so it doesn't need to be
521 // spilled to memory.
522 //
523 for (LiveVariables::killed_iterator KI = LV->killed_begin(MI),
Chris Lattner5a78ee82003-05-12 03:54:14 +0000524 KE = LV->killed_end(MI); KI != KE; ++KI) {
Chris Lattnerbfa53192003-01-13 00:25:40 +0000525 unsigned VirtReg = KI->second;
Chris Lattner5a78ee82003-05-12 03:54:14 +0000526 unsigned PhysReg = VirtReg;
527 if (VirtReg >= MRegisterInfo::FirstVirtualRegister) {
528 std::map<unsigned, unsigned>::iterator I =
529 Virt2PhysRegMap.find(VirtReg);
530 assert(I != Virt2PhysRegMap.end());
531 PhysReg = I->second;
532 Virt2PhysRegMap.erase(I);
533 }
Chris Lattnerbfa53192003-01-13 00:25:40 +0000534
Chris Lattner5a78ee82003-05-12 03:54:14 +0000535 if (PhysReg) {
Chris Lattner815b85e2003-08-04 23:36:39 +0000536 DEBUG(std::cerr << " Last use of " << RegInfo->getName(PhysReg)
537 << "[%reg" << VirtReg <<"], removing it from live set\n");
Chris Lattner506fa682003-08-05 00:49:09 +0000538 removePhysReg(PhysReg);
Chris Lattner5a78ee82003-05-12 03:54:14 +0000539 }
Chris Lattnerbfa53192003-01-13 00:25:40 +0000540 }
541 }
542
543 // Loop over all of the operands of the instruction, spilling registers that
544 // are defined, and marking explicit destinations in the PhysRegsUsed map.
545 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i)
Alkis Evlogimenosaaba4632003-12-14 13:24:17 +0000546 if (MI->getOperand(i).isDef() &&
Chris Lattnerbfa53192003-01-13 00:25:40 +0000547 MI->getOperand(i).isPhysicalRegister()) {
548 unsigned Reg = MI->getOperand(i).getAllocatedRegNum();
Chris Lattner931947d2003-08-17 18:01:15 +0000549 spillPhysReg(MBB, I, Reg, true); // Spill any existing value in the reg
Chris Lattnerbfa53192003-01-13 00:25:40 +0000550 PhysRegsUsed[Reg] = 0; // It is free and reserved now
551 PhysRegsUseOrder.push_back(Reg);
Alkis Evlogimenosebbd66c2004-01-13 06:24:30 +0000552 for (const unsigned *AliasSet = RegInfo->getAliasSet(Reg);
553 *AliasSet; ++AliasSet) {
554 PhysRegsUseOrder.push_back(*AliasSet);
555 PhysRegsUsed[*AliasSet] = 0; // It is free and reserved now
556 }
Chris Lattnerbfa53192003-01-13 00:25:40 +0000557 }
558
559 // Loop over the implicit defs, spilling them as well.
Alkis Evlogimenos9bced942003-12-13 01:20:58 +0000560 for (const unsigned *ImplicitDefs = TID.ImplicitDefs;
561 *ImplicitDefs; ++ImplicitDefs) {
562 unsigned Reg = *ImplicitDefs;
563 spillPhysReg(MBB, I, Reg);
564 PhysRegsUseOrder.push_back(Reg);
565 PhysRegsUsed[Reg] = 0; // It is free and reserved now
Alkis Evlogimenosebbd66c2004-01-13 06:24:30 +0000566 for (const unsigned *AliasSet = RegInfo->getAliasSet(Reg);
567 *AliasSet; ++AliasSet) {
568 PhysRegsUseOrder.push_back(*AliasSet);
569 PhysRegsUsed[*AliasSet] = 0; // It is free and reserved now
570 }
Alkis Evlogimenos9bced942003-12-13 01:20:58 +0000571 }
Chris Lattnerbfa53192003-01-13 00:25:40 +0000572
Chris Lattner101b8cd2002-12-16 16:15:28 +0000573 // Okay, we have allocated all of the source operands and spilled any values
574 // that would be destroyed by defs of this instruction. Loop over the
Chris Lattnerbfa53192003-01-13 00:25:40 +0000575 // implicit defs and assign them to a register, spilling incoming values if
576 // we need to scavenge a register.
Chris Lattnerd4627092002-12-18 08:14:26 +0000577 //
Chris Lattner101b8cd2002-12-16 16:15:28 +0000578 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i)
Alkis Evlogimenosaaba4632003-12-14 13:24:17 +0000579 if (MI->getOperand(i).isDef() &&
580 MI->getOperand(i).isVirtualRegister()) {
Chris Lattner101b8cd2002-12-16 16:15:28 +0000581 unsigned DestVirtReg = MI->getOperand(i).getAllocatedRegNum();
582 unsigned DestPhysReg;
583
Alkis Evlogimenosc17d57b2003-12-18 13:08:52 +0000584 // If DestVirtReg already has a value, use it.
Chris Lattner5a78ee82003-05-12 03:54:14 +0000585 std::map<unsigned, unsigned>::iterator DestI =
586 Virt2PhysRegMap.find(DestVirtReg);
587 if (DestI != Virt2PhysRegMap.end()) {
Alkis Evlogimenosc17d57b2003-12-18 13:08:52 +0000588 DestPhysReg = DestI->second;
Chris Lattner5a78ee82003-05-12 03:54:14 +0000589 }
Alkis Evlogimenosc17d57b2003-12-18 13:08:52 +0000590 else {
Chris Lattnerbfa53192003-01-13 00:25:40 +0000591 DestPhysReg = getReg(MBB, I, DestVirtReg);
Chris Lattner101b8cd2002-12-16 16:15:28 +0000592 }
Chris Lattner5a78ee82003-05-12 03:54:14 +0000593 markVirtRegModified(DestVirtReg);
Chris Lattner101b8cd2002-12-16 16:15:28 +0000594 MI->SetMachineOperandReg(i, DestPhysReg); // Assign the output register
595 }
Chris Lattnerd4627092002-12-18 08:14:26 +0000596
597 if (!DisableKill) {
Chris Lattnerbfa53192003-01-13 00:25:40 +0000598 // If this instruction defines any registers that are immediately dead,
599 // kill them now.
600 //
601 for (LiveVariables::killed_iterator KI = LV->dead_begin(MI),
Chris Lattner5a78ee82003-05-12 03:54:14 +0000602 KE = LV->dead_end(MI); KI != KE; ++KI) {
Chris Lattnerbfa53192003-01-13 00:25:40 +0000603 unsigned VirtReg = KI->second;
Chris Lattner5a78ee82003-05-12 03:54:14 +0000604 unsigned PhysReg = VirtReg;
605 if (VirtReg >= MRegisterInfo::FirstVirtualRegister) {
606 std::map<unsigned, unsigned>::iterator I =
607 Virt2PhysRegMap.find(VirtReg);
608 assert(I != Virt2PhysRegMap.end());
609 PhysReg = I->second;
610 Virt2PhysRegMap.erase(I);
611 }
Chris Lattnerbfa53192003-01-13 00:25:40 +0000612
Chris Lattner5a78ee82003-05-12 03:54:14 +0000613 if (PhysReg) {
Chris Lattner815b85e2003-08-04 23:36:39 +0000614 DEBUG(std::cerr << " Register " << RegInfo->getName(PhysReg)
615 << " [%reg" << VirtReg
616 << "] is never used, removing it frame live list\n");
Chris Lattner5a78ee82003-05-12 03:54:14 +0000617 removePhysReg(PhysReg);
618 }
Chris Lattnerd4627092002-12-18 08:14:26 +0000619 }
620 }
Chris Lattner101b8cd2002-12-16 16:15:28 +0000621 }
622
623 // Rewind the iterator to point to the first flow control instruction...
Chris Lattnerb4d58d72003-01-14 22:00:31 +0000624 const TargetInstrInfo &TII = TM->getInstrInfo();
Chris Lattner176866c2003-01-16 18:06:43 +0000625 I = MBB.end();
Chris Lattnerb4d58d72003-01-14 22:00:31 +0000626 while (I != MBB.begin() && TII.isTerminatorInstr((*(I-1))->getOpcode()))
Chris Lattner101b8cd2002-12-16 16:15:28 +0000627 --I;
Chris Lattner101b8cd2002-12-16 16:15:28 +0000628
629 // Spill all physical registers holding virtual registers now.
630 while (!PhysRegsUsed.empty())
Chris Lattner92a199d2003-08-05 04:13:58 +0000631 if (unsigned VirtReg = PhysRegsUsed.begin()->second)
632 spillVirtReg(MBB, I, VirtReg, PhysRegsUsed.begin()->first);
633 else
634 removePhysReg(PhysRegsUsed.begin()->first);
Chris Lattner101b8cd2002-12-16 16:15:28 +0000635
Chris Lattnerbfa53192003-01-13 00:25:40 +0000636 for (std::map<unsigned, unsigned>::iterator I = Virt2PhysRegMap.begin(),
Chris Lattner5a78ee82003-05-12 03:54:14 +0000637 E = Virt2PhysRegMap.end(); I != E; ++I)
Chris Lattnerbfa53192003-01-13 00:25:40 +0000638 std::cerr << "Register still mapped: " << I->first << " -> "
Chris Lattner5a78ee82003-05-12 03:54:14 +0000639 << I->second << "\n";
Chris Lattnerbfa53192003-01-13 00:25:40 +0000640
Chris Lattner101b8cd2002-12-16 16:15:28 +0000641 assert(Virt2PhysRegMap.empty() && "Virtual registers still in phys regs?");
Chris Lattner931947d2003-08-17 18:01:15 +0000642
643 // Clear any physical register which appear live at the end of the basic
644 // block, but which do not hold any virtual registers. e.g., the stack
645 // pointer.
646 PhysRegsUseOrder.clear();
Chris Lattner101b8cd2002-12-16 16:15:28 +0000647}
648
Chris Lattner0ea32b82002-12-17 03:16:10 +0000649
Chris Lattner101b8cd2002-12-16 16:15:28 +0000650/// runOnMachineFunction - Register allocate the whole function
651///
652bool RA::runOnMachineFunction(MachineFunction &Fn) {
653 DEBUG(std::cerr << "Machine Function " << "\n");
654 MF = &Fn;
Chris Lattnerb4e41112002-12-28 20:40:43 +0000655 TM = &Fn.getTarget();
656 RegInfo = TM->getRegisterInfo();
Chris Lattner101b8cd2002-12-16 16:15:28 +0000657
Chris Lattnerd4627092002-12-18 08:14:26 +0000658 if (!DisableKill)
Chris Lattnerbfa53192003-01-13 00:25:40 +0000659 LV = &getAnalysis<LiveVariables>();
Chris Lattnerd4627092002-12-18 08:14:26 +0000660
Chris Lattner101b8cd2002-12-16 16:15:28 +0000661 // Loop over all of the basic blocks, eliminating virtual register references
662 for (MachineFunction::iterator MBB = Fn.begin(), MBBe = Fn.end();
663 MBB != MBBe; ++MBB)
664 AllocateBasicBlock(*MBB);
665
Chris Lattnerb4e41112002-12-28 20:40:43 +0000666 StackSlotForVirtReg.clear();
Chris Lattnerbfa53192003-01-13 00:25:40 +0000667 VirtRegModified.clear();
Chris Lattner101b8cd2002-12-16 16:15:28 +0000668 return true;
669}
670
Brian Gaeke89207942003-08-13 18:18:15 +0000671FunctionPass *createLocalRegisterAllocator() {
Chris Lattnerb4e41112002-12-28 20:40:43 +0000672 return new RA();
Chris Lattner101b8cd2002-12-16 16:15:28 +0000673}
Brian Gaeke960707c2003-11-11 22:41:34 +0000674
675} // End llvm namespace