Gitiles
Code Review Sign In
gerrit-public.fairphone.software / toolchain / llvm-project / ed2f6149f3d1fe1f4fcfa9015889c719530af4c2 / . / llvm / test / CodeGen / R600 / store.ll
blob: d233c73b805891531cda00b207aee2cce025b1f7 [file] [log] [blame]
Tom Stellard754f80f2013-04-05 23:31:51 +0000[diff] [blame]1; RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck --check-prefix=EG-CHECK %s
Tom Stellard6aa0d552013-06-14 22:12:24 +0000[diff] [blame]2; RUN: llc < %s -march=r600 -mcpu=cayman | FileCheck --check-prefix=CM-CHECK %s
Tom Stellard754f80f2013-04-05 23:31:51 +0000[diff] [blame]3; RUN: llc < %s -march=r600 -mcpu=verde | FileCheck --check-prefix=SI-CHECK %s
4
Tom Stellard5a6b0d82013-04-19 02:10:53 +0000[diff] [blame]5; floating-point store
6; EG-CHECK: @store_f32
Tom Stellard754f80f2013-04-05 23:31:51 +0000[diff] [blame]7; EG-CHECK: RAT_WRITE_CACHELESS_32_eg T{{[0-9]+\.X, T[0-9]+\.X}}, 1
Tom Stellard6aa0d552013-06-14 22:12:24 +0000[diff] [blame]8; CM-CHECK: @store_f32
9; CM-CHECK: EXPORT_RAT_INST_STORE_DWORD T{{[0-9]+\.X, T[0-9]+\.X}}
Tom Stellard5a6b0d82013-04-19 02:10:53 +0000[diff] [blame]10; SI-CHECK: @store_f32
Tom Stellard754f80f2013-04-05 23:31:51 +0000[diff] [blame]11; SI-CHECK: BUFFER_STORE_DWORD
12
Tom Stellard5a6b0d82013-04-19 02:10:53 +0000[diff] [blame]13define void @store_f32(float addrspace(1)* %out, float %in) {
Tom Stellard754f80f2013-04-05 23:31:51 +0000[diff] [blame]14 store float %in, float addrspace(1)* %out
15 ret void
16}
Tom Stellard0125f2a2013-06-25 02:39:35 +0000[diff] [blame]17
Tom Stellarded2f6142013-07-18 21:43:42 +0000[diff] [blame^]18; vec2 floating-point stores
19; EG-CHECK: @store_v2f32
20; EG-CHECK: RAT_WRITE_CACHELESS_32_eg
21; EG-CHECK-NEXT: RAT_WRITE_CACHELESS_32_eg
22; CM-CHECK: @store_v2f32
23; CM-CHECK: EXPORT_RAT_INST_STORE_DWORD
24; CM-CHECK-NEXT: EXPORT_RAT_INST_STORE_DWORD
25; SI-CHECK: @store_v2f32
26; SI-CHECK: BUFFER_STORE_DWORDX2
27
28define void @store_v2f32(<2 x float> addrspace(1)* %out, float %a, float %b) {
29entry:
30 %0 = insertelement <2 x float> <float 0.0, float 0.0>, float %a, i32 0
31 %1 = insertelement <2 x float> %0, float %b, i32 0
32 store <2 x float> %1, <2 x float> addrspace(1)* %out
33 ret void
34}
35
Tom Stellard0125f2a2013-06-25 02:39:35 +0000[diff] [blame]36; The stores in this function are combined by the optimizer to create a
37; 64-bit store with 32-bit alignment. This is legal for SI and the legalizer
38; should not try to split the 64-bit store back into 2 32-bit stores.
39;
40; Evergreen / Northern Islands don't support 64-bit stores yet, so there should
41; be two 32-bit stores.
42
43; EG-CHECK: @vecload2
44; EG-CHECK: RAT_WRITE_CACHELESS_32_eg
45; EG-CHECK: RAT_WRITE_CACHELESS_32_eg
46; CM-CHECK: @vecload2
47; CM-CHECK: EXPORT_RAT_INST_STORE_DWORD
48; CM-CHECK: EXPORT_RAT_INST_STORE_DWORD
49; SI-CHECK: @vecload2
50; SI-CHECK: BUFFER_STORE_DWORDX2
51define void @vecload2(i32 addrspace(1)* nocapture %out, i32 addrspace(2)* nocapture %mem) #0 {
52entry:
53 %0 = load i32 addrspace(2)* %mem, align 4, !tbaa !5
54 %arrayidx1.i = getelementptr inbounds i32 addrspace(2)* %mem, i64 1
55 %1 = load i32 addrspace(2)* %arrayidx1.i, align 4, !tbaa !5
56 store i32 %0, i32 addrspace(1)* %out, align 4, !tbaa !5
57 %arrayidx1 = getelementptr inbounds i32 addrspace(1)* %out, i64 1
58 store i32 %1, i32 addrspace(1)* %arrayidx1, align 4, !tbaa !5
59 ret void
60}
61
62attributes #0 = { nounwind "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-frame-pointer-elim-non-leaf"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" }
63
64!5 = metadata !{metadata !"int", metadata !6}
65!6 = metadata !{metadata !"omnipotent char", metadata !7}
66!7 = metadata !{metadata !"Simple C/C++ TBAA"}