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Ulrich Weigand9e3577f2013-05-06 16:17:29 +00001; Test 128-bit addition in which the second operand is constant.
2;
Richard Sandifordfac8b102013-07-19 16:37:00 +00003; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z10 | FileCheck %s
Ulrich Weigand9e3577f2013-05-06 16:17:29 +00004
5; Check additions of 1. The XOR ensures that we don't instead load the
6; constant into a register and use memory addition.
7define void @f1(i128 *%aptr) {
Stephen Lind24ab202013-07-14 06:24:09 +00008; CHECK-LABEL: f1:
Ulrich Weigand9e3577f2013-05-06 16:17:29 +00009; CHECK: algfi {{%r[0-5]}}, 1
Richard Sandiford094e6092013-10-28 13:53:37 +000010; CHECK: alcg
Ulrich Weigand9e3577f2013-05-06 16:17:29 +000011; CHECK: br %r14
12 %a = load i128 *%aptr
13 %xor = xor i128 %a, 128
14 %add = add i128 %xor, 1
15 store i128 %add, i128 *%aptr
16 ret void
17}
18
19; Check the high end of the ALGFI range.
20define void @f2(i128 *%aptr) {
Stephen Lind24ab202013-07-14 06:24:09 +000021; CHECK-LABEL: f2:
Ulrich Weigand9e3577f2013-05-06 16:17:29 +000022; CHECK: algfi {{%r[0-5]}}, 4294967295
Richard Sandiford094e6092013-10-28 13:53:37 +000023; CHECK: alcg
Ulrich Weigand9e3577f2013-05-06 16:17:29 +000024; CHECK: br %r14
25 %a = load i128 *%aptr
26 %xor = xor i128 %a, 128
27 %add = add i128 %xor, 4294967295
28 store i128 %add, i128 *%aptr
29 ret void
30}
31
32; Check the next value up, which must use register addition.
33define void @f3(i128 *%aptr) {
Stephen Lind24ab202013-07-14 06:24:09 +000034; CHECK-LABEL: f3:
Ulrich Weigand9e3577f2013-05-06 16:17:29 +000035; CHECK: algr
Richard Sandiford094e6092013-10-28 13:53:37 +000036; CHECK: alcg
Ulrich Weigand9e3577f2013-05-06 16:17:29 +000037; CHECK: br %r14
38 %a = load i128 *%aptr
39 %xor = xor i128 %a, 128
40 %add = add i128 %xor, 4294967296
41 store i128 %add, i128 *%aptr
42 ret void
43}
44
45; Check addition of -1, which must also use register addition.
46define void @f4(i128 *%aptr) {
Stephen Lind24ab202013-07-14 06:24:09 +000047; CHECK-LABEL: f4:
Ulrich Weigand9e3577f2013-05-06 16:17:29 +000048; CHECK: algr
Richard Sandiford094e6092013-10-28 13:53:37 +000049; CHECK: alcg
Ulrich Weigand9e3577f2013-05-06 16:17:29 +000050; CHECK: br %r14
51 %a = load i128 *%aptr
52 %xor = xor i128 %a, 128
53 %add = add i128 %xor, -1
54 store i128 %add, i128 *%aptr
55 ret void
56}