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gerrit-public.fairphone.software / toolchain / llvm-project / f16fe0f2057100a2b0d61f967508ebf36d486af4 / . / llvm / test / CodeGen / AArch64 / minmax-of-minmax.ll
blob: 0bdffa6b16f46597b38951cadc6156cf03748707 [file] [log] [blame]
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple=aarch64-unknown-unknown | FileCheck %s
3
4; There are 4 commuted variants (abbc/abcb/bcab/bcba) *
Sanjay Patel24e6a8b2018-01-02 21:04:08 +0000[diff] [blame]5; 4 predicate variants ([*][lg][te]) *
Sanjay Patelf16fe0f2018-01-10 23:31:42 +0000[diff] [blame^]6; 4 min/max flavors (smin/smax/umin/umax) *
7; 2 notted variants
8; = 128 tests
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]9
10define <4 x i32> @smin_ab_bc(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
11; CHECK-LABEL: smin_ab_bc:
12; CHECK: // %bb.0:
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]13; CHECK-NEXT: smin v0.4s, v0.4s, v1.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]14; CHECK-NEXT: smin v1.4s, v1.4s, v2.4s
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]15; CHECK-NEXT: smin v0.4s, v0.4s, v1.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]16; CHECK-NEXT: ret
17 %cmp_ab = icmp slt <4 x i32> %a, %b
18 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
19 %cmp_bc = icmp slt <4 x i32> %b, %c
20 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
21 %cmp_ac = icmp slt <4 x i32> %a, %c
22 %r = select <4 x i1> %cmp_ac, <4 x i32> %min_ab, <4 x i32> %min_bc
23 ret <4 x i32> %r
24}
25
26define <4 x i32> @smin_ab_cb(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
27; CHECK-LABEL: smin_ab_cb:
28; CHECK: // %bb.0:
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]29; CHECK-NEXT: smin v0.4s, v0.4s, v1.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]30; CHECK-NEXT: smin v1.4s, v2.4s, v1.4s
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]31; CHECK-NEXT: smin v0.4s, v0.4s, v1.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]32; CHECK-NEXT: ret
33 %cmp_ab = icmp slt <4 x i32> %a, %b
34 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
35 %cmp_cb = icmp slt <4 x i32> %c, %b
36 %min_cb = select <4 x i1> %cmp_cb, <4 x i32> %c, <4 x i32> %b
37 %cmp_ac = icmp slt <4 x i32> %a, %c
38 %r = select <4 x i1> %cmp_ac, <4 x i32> %min_ab, <4 x i32> %min_cb
39 ret <4 x i32> %r
40}
41
42define <4 x i32> @smin_bc_ab(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
43; CHECK-LABEL: smin_bc_ab:
44; CHECK: // %bb.0:
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]45; CHECK-NEXT: smin v2.4s, v1.4s, v2.4s
46; CHECK-NEXT: smin v0.4s, v0.4s, v1.4s
47; CHECK-NEXT: smin v0.4s, v2.4s, v0.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]48; CHECK-NEXT: ret
49 %cmp_bc = icmp slt <4 x i32> %b, %c
50 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
51 %cmp_ab = icmp slt <4 x i32> %a, %b
52 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
53 %cmp_ca = icmp slt <4 x i32> %c, %a
54 %r = select <4 x i1> %cmp_ca, <4 x i32> %min_bc, <4 x i32> %min_ab
55 ret <4 x i32> %r
56}
57
58define <4 x i32> @smin_bc_ba(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
59; CHECK-LABEL: smin_bc_ba:
60; CHECK: // %bb.0:
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]61; CHECK-NEXT: smin v2.4s, v1.4s, v2.4s
62; CHECK-NEXT: smin v0.4s, v1.4s, v0.4s
63; CHECK-NEXT: smin v0.4s, v2.4s, v0.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]64; CHECK-NEXT: ret
65 %cmp_bc = icmp slt <4 x i32> %b, %c
66 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
67 %cmp_ba = icmp slt <4 x i32> %b, %a
68 %min_ba = select <4 x i1> %cmp_ba, <4 x i32> %b, <4 x i32> %a
69 %cmp_ca = icmp slt <4 x i32> %c, %a
70 %r = select <4 x i1> %cmp_ca, <4 x i32> %min_bc, <4 x i32> %min_ba
71 ret <4 x i32> %r
72}
73
74define <4 x i32> @smin_ab_bc_swap_pred(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
75; CHECK-LABEL: smin_ab_bc_swap_pred:
76; CHECK: // %bb.0:
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]77; CHECK-NEXT: smin v0.4s, v0.4s, v1.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]78; CHECK-NEXT: smin v1.4s, v1.4s, v2.4s
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]79; CHECK-NEXT: smin v0.4s, v0.4s, v1.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]80; CHECK-NEXT: ret
81 %cmp_ab = icmp slt <4 x i32> %a, %b
82 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
83 %cmp_bc = icmp slt <4 x i32> %b, %c
84 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
85 %cmp_ac = icmp sgt <4 x i32> %c, %a
86 %r = select <4 x i1> %cmp_ac, <4 x i32> %min_ab, <4 x i32> %min_bc
87 ret <4 x i32> %r
88}
89
90define <4 x i32> @smin_ab_cb_swap_pred(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
91; CHECK-LABEL: smin_ab_cb_swap_pred:
92; CHECK: // %bb.0:
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]93; CHECK-NEXT: smin v0.4s, v0.4s, v1.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]94; CHECK-NEXT: smin v1.4s, v2.4s, v1.4s
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]95; CHECK-NEXT: smin v0.4s, v0.4s, v1.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]96; CHECK-NEXT: ret
97 %cmp_ab = icmp slt <4 x i32> %a, %b
98 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
99 %cmp_cb = icmp slt <4 x i32> %c, %b
100 %min_cb = select <4 x i1> %cmp_cb, <4 x i32> %c, <4 x i32> %b
101 %cmp_ac = icmp sgt <4 x i32> %c, %a
102 %r = select <4 x i1> %cmp_ac, <4 x i32> %min_ab, <4 x i32> %min_cb
103 ret <4 x i32> %r
104}
105
106define <4 x i32> @smin_bc_ab_swap_pred(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
107; CHECK-LABEL: smin_bc_ab_swap_pred:
108; CHECK: // %bb.0:
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]109; CHECK-NEXT: smin v2.4s, v1.4s, v2.4s
110; CHECK-NEXT: smin v0.4s, v0.4s, v1.4s
111; CHECK-NEXT: smin v0.4s, v2.4s, v0.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]112; CHECK-NEXT: ret
113 %cmp_bc = icmp slt <4 x i32> %b, %c
114 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
115 %cmp_ab = icmp slt <4 x i32> %a, %b
116 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
117 %cmp_ca = icmp sgt <4 x i32> %a, %c
118 %r = select <4 x i1> %cmp_ca, <4 x i32> %min_bc, <4 x i32> %min_ab
119 ret <4 x i32> %r
120}
121
122define <4 x i32> @smin_bc_ba_swap_pred(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
123; CHECK-LABEL: smin_bc_ba_swap_pred:
124; CHECK: // %bb.0:
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]125; CHECK-NEXT: smin v2.4s, v1.4s, v2.4s
126; CHECK-NEXT: smin v0.4s, v1.4s, v0.4s
127; CHECK-NEXT: smin v0.4s, v2.4s, v0.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]128; CHECK-NEXT: ret
129 %cmp_bc = icmp slt <4 x i32> %b, %c
130 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
131 %cmp_ba = icmp slt <4 x i32> %b, %a
132 %min_ba = select <4 x i1> %cmp_ba, <4 x i32> %b, <4 x i32> %a
133 %cmp_ca = icmp sgt <4 x i32> %a, %c
134 %r = select <4 x i1> %cmp_ca, <4 x i32> %min_bc, <4 x i32> %min_ba
135 ret <4 x i32> %r
136}
137
138define <4 x i32> @smin_ab_bc_eq_pred(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
139; CHECK-LABEL: smin_ab_bc_eq_pred:
140; CHECK: // %bb.0:
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]141; CHECK-NEXT: smin v0.4s, v0.4s, v1.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]142; CHECK-NEXT: smin v1.4s, v1.4s, v2.4s
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]143; CHECK-NEXT: smin v0.4s, v0.4s, v1.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]144; CHECK-NEXT: ret
145 %cmp_ab = icmp slt <4 x i32> %a, %b
146 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
147 %cmp_bc = icmp slt <4 x i32> %b, %c
148 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
149 %cmp_ac = icmp sle <4 x i32> %a, %c
150 %r = select <4 x i1> %cmp_ac, <4 x i32> %min_ab, <4 x i32> %min_bc
151 ret <4 x i32> %r
152}
153
154define <4 x i32> @smin_ab_cb_eq_pred(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
155; CHECK-LABEL: smin_ab_cb_eq_pred:
156; CHECK: // %bb.0:
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]157; CHECK-NEXT: smin v0.4s, v0.4s, v1.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]158; CHECK-NEXT: smin v1.4s, v2.4s, v1.4s
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]159; CHECK-NEXT: smin v0.4s, v0.4s, v1.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]160; CHECK-NEXT: ret
161 %cmp_ab = icmp slt <4 x i32> %a, %b
162 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
163 %cmp_cb = icmp slt <4 x i32> %c, %b
164 %min_cb = select <4 x i1> %cmp_cb, <4 x i32> %c, <4 x i32> %b
165 %cmp_ac = icmp sle <4 x i32> %a, %c
166 %r = select <4 x i1> %cmp_ac, <4 x i32> %min_ab, <4 x i32> %min_cb
167 ret <4 x i32> %r
168}
169
170define <4 x i32> @smin_bc_ab_eq_pred(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
171; CHECK-LABEL: smin_bc_ab_eq_pred:
172; CHECK: // %bb.0:
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]173; CHECK-NEXT: smin v2.4s, v1.4s, v2.4s
174; CHECK-NEXT: smin v0.4s, v0.4s, v1.4s
175; CHECK-NEXT: smin v0.4s, v2.4s, v0.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]176; CHECK-NEXT: ret
177 %cmp_bc = icmp slt <4 x i32> %b, %c
178 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
179 %cmp_ab = icmp slt <4 x i32> %a, %b
180 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
181 %cmp_ca = icmp sle <4 x i32> %c, %a
182 %r = select <4 x i1> %cmp_ca, <4 x i32> %min_bc, <4 x i32> %min_ab
183 ret <4 x i32> %r
184}
185
186define <4 x i32> @smin_bc_ba_eq_pred(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
187; CHECK-LABEL: smin_bc_ba_eq_pred:
188; CHECK: // %bb.0:
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]189; CHECK-NEXT: smin v2.4s, v1.4s, v2.4s
190; CHECK-NEXT: smin v0.4s, v1.4s, v0.4s
191; CHECK-NEXT: smin v0.4s, v2.4s, v0.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]192; CHECK-NEXT: ret
193 %cmp_bc = icmp slt <4 x i32> %b, %c
194 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
195 %cmp_ba = icmp slt <4 x i32> %b, %a
196 %min_ba = select <4 x i1> %cmp_ba, <4 x i32> %b, <4 x i32> %a
197 %cmp_ca = icmp sle <4 x i32> %c, %a
198 %r = select <4 x i1> %cmp_ca, <4 x i32> %min_bc, <4 x i32> %min_ba
199 ret <4 x i32> %r
200}
201
202define <4 x i32> @smin_ab_bc_eq_swap_pred(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
203; CHECK-LABEL: smin_ab_bc_eq_swap_pred:
204; CHECK: // %bb.0:
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]205; CHECK-NEXT: smin v0.4s, v0.4s, v1.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]206; CHECK-NEXT: smin v1.4s, v1.4s, v2.4s
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]207; CHECK-NEXT: smin v0.4s, v0.4s, v1.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]208; CHECK-NEXT: ret
209 %cmp_ab = icmp slt <4 x i32> %a, %b
210 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
211 %cmp_bc = icmp slt <4 x i32> %b, %c
212 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
213 %cmp_ac = icmp sge <4 x i32> %c, %a
214 %r = select <4 x i1> %cmp_ac, <4 x i32> %min_ab, <4 x i32> %min_bc
215 ret <4 x i32> %r
216}
217
218define <4 x i32> @smin_ab_cb_eq_swap_pred(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
219; CHECK-LABEL: smin_ab_cb_eq_swap_pred:
220; CHECK: // %bb.0:
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]221; CHECK-NEXT: smin v0.4s, v0.4s, v1.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]222; CHECK-NEXT: smin v1.4s, v2.4s, v1.4s
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]223; CHECK-NEXT: smin v0.4s, v0.4s, v1.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]224; CHECK-NEXT: ret
225 %cmp_ab = icmp slt <4 x i32> %a, %b
226 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
227 %cmp_cb = icmp slt <4 x i32> %c, %b
228 %min_cb = select <4 x i1> %cmp_cb, <4 x i32> %c, <4 x i32> %b
229 %cmp_ac = icmp sge <4 x i32> %c, %a
230 %r = select <4 x i1> %cmp_ac, <4 x i32> %min_ab, <4 x i32> %min_cb
231 ret <4 x i32> %r
232}
233
234define <4 x i32> @smin_bc_ab_eq_swap_pred(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
235; CHECK-LABEL: smin_bc_ab_eq_swap_pred:
236; CHECK: // %bb.0:
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]237; CHECK-NEXT: smin v2.4s, v1.4s, v2.4s
238; CHECK-NEXT: smin v0.4s, v0.4s, v1.4s
239; CHECK-NEXT: smin v0.4s, v2.4s, v0.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]240; CHECK-NEXT: ret
241 %cmp_bc = icmp slt <4 x i32> %b, %c
242 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
243 %cmp_ab = icmp slt <4 x i32> %a, %b
244 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
245 %cmp_ca = icmp sge <4 x i32> %a, %c
246 %r = select <4 x i1> %cmp_ca, <4 x i32> %min_bc, <4 x i32> %min_ab
247 ret <4 x i32> %r
248}
249
250define <4 x i32> @smin_bc_ba_eq_swap_pred(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
251; CHECK-LABEL: smin_bc_ba_eq_swap_pred:
252; CHECK: // %bb.0:
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]253; CHECK-NEXT: smin v2.4s, v1.4s, v2.4s
254; CHECK-NEXT: smin v0.4s, v1.4s, v0.4s
255; CHECK-NEXT: smin v0.4s, v2.4s, v0.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]256; CHECK-NEXT: ret
257 %cmp_bc = icmp slt <4 x i32> %b, %c
258 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
259 %cmp_ba = icmp slt <4 x i32> %b, %a
260 %min_ba = select <4 x i1> %cmp_ba, <4 x i32> %b, <4 x i32> %a
261 %cmp_ca = icmp sge <4 x i32> %a, %c
262 %r = select <4 x i1> %cmp_ca, <4 x i32> %min_bc, <4 x i32> %min_ba
263 ret <4 x i32> %r
264}
265
266define <4 x i32> @smax_ab_bc(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
267; CHECK-LABEL: smax_ab_bc:
268; CHECK: // %bb.0:
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]269; CHECK-NEXT: smax v0.4s, v0.4s, v1.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]270; CHECK-NEXT: smax v1.4s, v1.4s, v2.4s
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]271; CHECK-NEXT: smax v0.4s, v0.4s, v1.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]272; CHECK-NEXT: ret
273 %cmp_ab = icmp sgt <4 x i32> %a, %b
274 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
275 %cmp_bc = icmp sgt <4 x i32> %b, %c
276 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
277 %cmp_ac = icmp sgt <4 x i32> %a, %c
278 %r = select <4 x i1> %cmp_ac, <4 x i32> %min_ab, <4 x i32> %min_bc
279 ret <4 x i32> %r
280}
281
282define <4 x i32> @smax_ab_cb(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
283; CHECK-LABEL: smax_ab_cb:
284; CHECK: // %bb.0:
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]285; CHECK-NEXT: smax v0.4s, v0.4s, v1.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]286; CHECK-NEXT: smax v1.4s, v2.4s, v1.4s
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]287; CHECK-NEXT: smax v0.4s, v0.4s, v1.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]288; CHECK-NEXT: ret
289 %cmp_ab = icmp sgt <4 x i32> %a, %b
290 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
291 %cmp_cb = icmp sgt <4 x i32> %c, %b
292 %min_cb = select <4 x i1> %cmp_cb, <4 x i32> %c, <4 x i32> %b
293 %cmp_ac = icmp sgt <4 x i32> %a, %c
294 %r = select <4 x i1> %cmp_ac, <4 x i32> %min_ab, <4 x i32> %min_cb
295 ret <4 x i32> %r
296}
297
298define <4 x i32> @smax_bc_ab(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
299; CHECK-LABEL: smax_bc_ab:
300; CHECK: // %bb.0:
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]301; CHECK-NEXT: smax v2.4s, v1.4s, v2.4s
302; CHECK-NEXT: smax v0.4s, v0.4s, v1.4s
303; CHECK-NEXT: smax v0.4s, v2.4s, v0.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]304; CHECK-NEXT: ret
305 %cmp_bc = icmp sgt <4 x i32> %b, %c
306 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
307 %cmp_ab = icmp sgt <4 x i32> %a, %b
308 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
309 %cmp_ca = icmp sgt <4 x i32> %c, %a
310 %r = select <4 x i1> %cmp_ca, <4 x i32> %min_bc, <4 x i32> %min_ab
311 ret <4 x i32> %r
312}
313
314define <4 x i32> @smax_bc_ba(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
315; CHECK-LABEL: smax_bc_ba:
316; CHECK: // %bb.0:
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]317; CHECK-NEXT: smax v2.4s, v1.4s, v2.4s
318; CHECK-NEXT: smax v0.4s, v1.4s, v0.4s
319; CHECK-NEXT: smax v0.4s, v2.4s, v0.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]320; CHECK-NEXT: ret
321 %cmp_bc = icmp sgt <4 x i32> %b, %c
322 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
323 %cmp_ba = icmp sgt <4 x i32> %b, %a
324 %min_ba = select <4 x i1> %cmp_ba, <4 x i32> %b, <4 x i32> %a
325 %cmp_ca = icmp sgt <4 x i32> %c, %a
326 %r = select <4 x i1> %cmp_ca, <4 x i32> %min_bc, <4 x i32> %min_ba
327 ret <4 x i32> %r
328}
329
330define <4 x i32> @smax_ab_bc_swap_pred(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
331; CHECK-LABEL: smax_ab_bc_swap_pred:
332; CHECK: // %bb.0:
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]333; CHECK-NEXT: smax v0.4s, v0.4s, v1.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]334; CHECK-NEXT: smax v1.4s, v1.4s, v2.4s
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]335; CHECK-NEXT: smax v0.4s, v0.4s, v1.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]336; CHECK-NEXT: ret
337 %cmp_ab = icmp sgt <4 x i32> %a, %b
338 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
339 %cmp_bc = icmp sgt <4 x i32> %b, %c
340 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
341 %cmp_ac = icmp slt <4 x i32> %c, %a
342 %r = select <4 x i1> %cmp_ac, <4 x i32> %min_ab, <4 x i32> %min_bc
343 ret <4 x i32> %r
344}
345
346define <4 x i32> @smax_ab_cb_swap_pred(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
347; CHECK-LABEL: smax_ab_cb_swap_pred:
348; CHECK: // %bb.0:
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]349; CHECK-NEXT: smax v0.4s, v0.4s, v1.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]350; CHECK-NEXT: smax v1.4s, v2.4s, v1.4s
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]351; CHECK-NEXT: smax v0.4s, v0.4s, v1.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]352; CHECK-NEXT: ret
353 %cmp_ab = icmp sgt <4 x i32> %a, %b
354 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
355 %cmp_cb = icmp sgt <4 x i32> %c, %b
356 %min_cb = select <4 x i1> %cmp_cb, <4 x i32> %c, <4 x i32> %b
357 %cmp_ac = icmp slt <4 x i32> %c, %a
358 %r = select <4 x i1> %cmp_ac, <4 x i32> %min_ab, <4 x i32> %min_cb
359 ret <4 x i32> %r
360}
361
362define <4 x i32> @smax_bc_ab_swap_pred(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
363; CHECK-LABEL: smax_bc_ab_swap_pred:
364; CHECK: // %bb.0:
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]365; CHECK-NEXT: smax v2.4s, v1.4s, v2.4s
366; CHECK-NEXT: smax v0.4s, v0.4s, v1.4s
367; CHECK-NEXT: smax v0.4s, v2.4s, v0.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]368; CHECK-NEXT: ret
369 %cmp_bc = icmp sgt <4 x i32> %b, %c
370 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
371 %cmp_ab = icmp sgt <4 x i32> %a, %b
372 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
373 %cmp_ca = icmp slt <4 x i32> %a, %c
374 %r = select <4 x i1> %cmp_ca, <4 x i32> %min_bc, <4 x i32> %min_ab
375 ret <4 x i32> %r
376}
377
378define <4 x i32> @smax_bc_ba_swap_pred(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
379; CHECK-LABEL: smax_bc_ba_swap_pred:
380; CHECK: // %bb.0:
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]381; CHECK-NEXT: smax v2.4s, v1.4s, v2.4s
382; CHECK-NEXT: smax v0.4s, v1.4s, v0.4s
383; CHECK-NEXT: smax v0.4s, v2.4s, v0.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]384; CHECK-NEXT: ret
385 %cmp_bc = icmp sgt <4 x i32> %b, %c
386 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
387 %cmp_ba = icmp sgt <4 x i32> %b, %a
388 %min_ba = select <4 x i1> %cmp_ba, <4 x i32> %b, <4 x i32> %a
389 %cmp_ca = icmp slt <4 x i32> %a, %c
390 %r = select <4 x i1> %cmp_ca, <4 x i32> %min_bc, <4 x i32> %min_ba
391 ret <4 x i32> %r
392}
393
394define <4 x i32> @smax_ab_bc_eq_pred(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
395; CHECK-LABEL: smax_ab_bc_eq_pred:
396; CHECK: // %bb.0:
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]397; CHECK-NEXT: smax v0.4s, v0.4s, v1.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]398; CHECK-NEXT: smax v1.4s, v1.4s, v2.4s
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]399; CHECK-NEXT: smax v0.4s, v0.4s, v1.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]400; CHECK-NEXT: ret
401 %cmp_ab = icmp sgt <4 x i32> %a, %b
402 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
403 %cmp_bc = icmp sgt <4 x i32> %b, %c
404 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
405 %cmp_ac = icmp sge <4 x i32> %a, %c
406 %r = select <4 x i1> %cmp_ac, <4 x i32> %min_ab, <4 x i32> %min_bc
407 ret <4 x i32> %r
408}
409
410define <4 x i32> @smax_ab_cb_eq_pred(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
411; CHECK-LABEL: smax_ab_cb_eq_pred:
412; CHECK: // %bb.0:
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]413; CHECK-NEXT: smax v0.4s, v0.4s, v1.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]414; CHECK-NEXT: smax v1.4s, v2.4s, v1.4s
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]415; CHECK-NEXT: smax v0.4s, v0.4s, v1.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]416; CHECK-NEXT: ret
417 %cmp_ab = icmp sgt <4 x i32> %a, %b
418 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
419 %cmp_cb = icmp sgt <4 x i32> %c, %b
420 %min_cb = select <4 x i1> %cmp_cb, <4 x i32> %c, <4 x i32> %b
421 %cmp_ac = icmp sge <4 x i32> %a, %c
422 %r = select <4 x i1> %cmp_ac, <4 x i32> %min_ab, <4 x i32> %min_cb
423 ret <4 x i32> %r
424}
425
426define <4 x i32> @smax_bc_ab_eq_pred(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
427; CHECK-LABEL: smax_bc_ab_eq_pred:
428; CHECK: // %bb.0:
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]429; CHECK-NEXT: smax v2.4s, v1.4s, v2.4s
430; CHECK-NEXT: smax v0.4s, v0.4s, v1.4s
431; CHECK-NEXT: smax v0.4s, v2.4s, v0.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]432; CHECK-NEXT: ret
433 %cmp_bc = icmp sgt <4 x i32> %b, %c
434 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
435 %cmp_ab = icmp sgt <4 x i32> %a, %b
436 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
437 %cmp_ca = icmp sge <4 x i32> %c, %a
438 %r = select <4 x i1> %cmp_ca, <4 x i32> %min_bc, <4 x i32> %min_ab
439 ret <4 x i32> %r
440}
441
442define <4 x i32> @smax_bc_ba_eq_pred(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
443; CHECK-LABEL: smax_bc_ba_eq_pred:
444; CHECK: // %bb.0:
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]445; CHECK-NEXT: smax v2.4s, v1.4s, v2.4s
446; CHECK-NEXT: smax v0.4s, v1.4s, v0.4s
447; CHECK-NEXT: smax v0.4s, v2.4s, v0.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]448; CHECK-NEXT: ret
449 %cmp_bc = icmp sgt <4 x i32> %b, %c
450 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
451 %cmp_ba = icmp sgt <4 x i32> %b, %a
452 %min_ba = select <4 x i1> %cmp_ba, <4 x i32> %b, <4 x i32> %a
453 %cmp_ca = icmp sge <4 x i32> %c, %a
454 %r = select <4 x i1> %cmp_ca, <4 x i32> %min_bc, <4 x i32> %min_ba
455 ret <4 x i32> %r
456}
457
458define <4 x i32> @smax_ab_bc_eq_swap_pred(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
459; CHECK-LABEL: smax_ab_bc_eq_swap_pred:
460; CHECK: // %bb.0:
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]461; CHECK-NEXT: smax v0.4s, v0.4s, v1.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]462; CHECK-NEXT: smax v1.4s, v1.4s, v2.4s
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]463; CHECK-NEXT: smax v0.4s, v0.4s, v1.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]464; CHECK-NEXT: ret
465 %cmp_ab = icmp sgt <4 x i32> %a, %b
466 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
467 %cmp_bc = icmp sgt <4 x i32> %b, %c
468 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
469 %cmp_ac = icmp sle <4 x i32> %c, %a
470 %r = select <4 x i1> %cmp_ac, <4 x i32> %min_ab, <4 x i32> %min_bc
471 ret <4 x i32> %r
472}
473
474define <4 x i32> @smax_ab_cb_eq_swap_pred(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
475; CHECK-LABEL: smax_ab_cb_eq_swap_pred:
476; CHECK: // %bb.0:
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]477; CHECK-NEXT: smax v0.4s, v0.4s, v1.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]478; CHECK-NEXT: smax v1.4s, v2.4s, v1.4s
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]479; CHECK-NEXT: smax v0.4s, v0.4s, v1.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]480; CHECK-NEXT: ret
481 %cmp_ab = icmp sgt <4 x i32> %a, %b
482 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
483 %cmp_cb = icmp sgt <4 x i32> %c, %b
484 %min_cb = select <4 x i1> %cmp_cb, <4 x i32> %c, <4 x i32> %b
485 %cmp_ac = icmp sle <4 x i32> %c, %a
486 %r = select <4 x i1> %cmp_ac, <4 x i32> %min_ab, <4 x i32> %min_cb
487 ret <4 x i32> %r
488}
489
490define <4 x i32> @smax_bc_ab_eq_swap_pred(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
491; CHECK-LABEL: smax_bc_ab_eq_swap_pred:
492; CHECK: // %bb.0:
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]493; CHECK-NEXT: smax v2.4s, v1.4s, v2.4s
494; CHECK-NEXT: smax v0.4s, v0.4s, v1.4s
495; CHECK-NEXT: smax v0.4s, v2.4s, v0.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]496; CHECK-NEXT: ret
497 %cmp_bc = icmp sgt <4 x i32> %b, %c
498 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
499 %cmp_ab = icmp sgt <4 x i32> %a, %b
500 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
501 %cmp_ca = icmp sle <4 x i32> %a, %c
502 %r = select <4 x i1> %cmp_ca, <4 x i32> %min_bc, <4 x i32> %min_ab
503 ret <4 x i32> %r
504}
505
506define <4 x i32> @smax_bc_ba_eq_swap_pred(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
507; CHECK-LABEL: smax_bc_ba_eq_swap_pred:
508; CHECK: // %bb.0:
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]509; CHECK-NEXT: smax v2.4s, v1.4s, v2.4s
510; CHECK-NEXT: smax v0.4s, v1.4s, v0.4s
511; CHECK-NEXT: smax v0.4s, v2.4s, v0.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]512; CHECK-NEXT: ret
513 %cmp_bc = icmp sgt <4 x i32> %b, %c
514 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
515 %cmp_ba = icmp sgt <4 x i32> %b, %a
516 %min_ba = select <4 x i1> %cmp_ba, <4 x i32> %b, <4 x i32> %a
517 %cmp_ca = icmp sle <4 x i32> %a, %c
518 %r = select <4 x i1> %cmp_ca, <4 x i32> %min_bc, <4 x i32> %min_ba
519 ret <4 x i32> %r
520}
521
522define <4 x i32> @umin_ab_bc(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
523; CHECK-LABEL: umin_ab_bc:
524; CHECK: // %bb.0:
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]525; CHECK-NEXT: umin v0.4s, v0.4s, v1.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]526; CHECK-NEXT: umin v1.4s, v1.4s, v2.4s
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]527; CHECK-NEXT: umin v0.4s, v0.4s, v1.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]528; CHECK-NEXT: ret
529 %cmp_ab = icmp ult <4 x i32> %a, %b
530 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
531 %cmp_bc = icmp ult <4 x i32> %b, %c
532 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
533 %cmp_ac = icmp ult <4 x i32> %a, %c
534 %r = select <4 x i1> %cmp_ac, <4 x i32> %min_ab, <4 x i32> %min_bc
535 ret <4 x i32> %r
536}
537
538define <4 x i32> @umin_ab_cb(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
539; CHECK-LABEL: umin_ab_cb:
540; CHECK: // %bb.0:
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]541; CHECK-NEXT: umin v0.4s, v0.4s, v1.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]542; CHECK-NEXT: umin v1.4s, v2.4s, v1.4s
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]543; CHECK-NEXT: umin v0.4s, v0.4s, v1.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]544; CHECK-NEXT: ret
545 %cmp_ab = icmp ult <4 x i32> %a, %b
546 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
547 %cmp_cb = icmp ult <4 x i32> %c, %b
548 %min_cb = select <4 x i1> %cmp_cb, <4 x i32> %c, <4 x i32> %b
549 %cmp_ac = icmp ult <4 x i32> %a, %c
550 %r = select <4 x i1> %cmp_ac, <4 x i32> %min_ab, <4 x i32> %min_cb
551 ret <4 x i32> %r
552}
553
554define <4 x i32> @umin_bc_ab(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
555; CHECK-LABEL: umin_bc_ab:
556; CHECK: // %bb.0:
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]557; CHECK-NEXT: umin v2.4s, v1.4s, v2.4s
558; CHECK-NEXT: umin v0.4s, v0.4s, v1.4s
559; CHECK-NEXT: umin v0.4s, v2.4s, v0.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]560; CHECK-NEXT: ret
561 %cmp_bc = icmp ult <4 x i32> %b, %c
562 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
563 %cmp_ab = icmp ult <4 x i32> %a, %b
564 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
565 %cmp_ca = icmp ult <4 x i32> %c, %a
566 %r = select <4 x i1> %cmp_ca, <4 x i32> %min_bc, <4 x i32> %min_ab
567 ret <4 x i32> %r
568}
569
570define <4 x i32> @umin_bc_ba(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
571; CHECK-LABEL: umin_bc_ba:
572; CHECK: // %bb.0:
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]573; CHECK-NEXT: umin v2.4s, v1.4s, v2.4s
574; CHECK-NEXT: umin v0.4s, v1.4s, v0.4s
575; CHECK-NEXT: umin v0.4s, v2.4s, v0.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]576; CHECK-NEXT: ret
577 %cmp_bc = icmp ult <4 x i32> %b, %c
578 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
579 %cmp_ba = icmp ult <4 x i32> %b, %a
580 %min_ba = select <4 x i1> %cmp_ba, <4 x i32> %b, <4 x i32> %a
581 %cmp_ca = icmp ult <4 x i32> %c, %a
582 %r = select <4 x i1> %cmp_ca, <4 x i32> %min_bc, <4 x i32> %min_ba
583 ret <4 x i32> %r
584}
585
586define <4 x i32> @umin_ab_bc_swap_pred(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
587; CHECK-LABEL: umin_ab_bc_swap_pred:
588; CHECK: // %bb.0:
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]589; CHECK-NEXT: umin v0.4s, v0.4s, v1.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]590; CHECK-NEXT: umin v1.4s, v1.4s, v2.4s
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]591; CHECK-NEXT: umin v0.4s, v0.4s, v1.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]592; CHECK-NEXT: ret
593 %cmp_ab = icmp ult <4 x i32> %a, %b
594 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
595 %cmp_bc = icmp ult <4 x i32> %b, %c
596 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
597 %cmp_ac = icmp ugt <4 x i32> %c, %a
598 %r = select <4 x i1> %cmp_ac, <4 x i32> %min_ab, <4 x i32> %min_bc
599 ret <4 x i32> %r
600}
601
602define <4 x i32> @umin_ab_cb_swap_pred(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
603; CHECK-LABEL: umin_ab_cb_swap_pred:
604; CHECK: // %bb.0:
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]605; CHECK-NEXT: umin v0.4s, v0.4s, v1.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]606; CHECK-NEXT: umin v1.4s, v2.4s, v1.4s
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]607; CHECK-NEXT: umin v0.4s, v0.4s, v1.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]608; CHECK-NEXT: ret
609 %cmp_ab = icmp ult <4 x i32> %a, %b
610 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
611 %cmp_cb = icmp ult <4 x i32> %c, %b
612 %min_cb = select <4 x i1> %cmp_cb, <4 x i32> %c, <4 x i32> %b
613 %cmp_ac = icmp ugt <4 x i32> %c, %a
614 %r = select <4 x i1> %cmp_ac, <4 x i32> %min_ab, <4 x i32> %min_cb
615 ret <4 x i32> %r
616}
617
618define <4 x i32> @umin_bc_ab_swap_pred(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
619; CHECK-LABEL: umin_bc_ab_swap_pred:
620; CHECK: // %bb.0:
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]621; CHECK-NEXT: umin v2.4s, v1.4s, v2.4s
622; CHECK-NEXT: umin v0.4s, v0.4s, v1.4s
623; CHECK-NEXT: umin v0.4s, v2.4s, v0.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]624; CHECK-NEXT: ret
625 %cmp_bc = icmp ult <4 x i32> %b, %c
626 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
627 %cmp_ab = icmp ult <4 x i32> %a, %b
628 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
629 %cmp_ca = icmp ugt <4 x i32> %a, %c
630 %r = select <4 x i1> %cmp_ca, <4 x i32> %min_bc, <4 x i32> %min_ab
631 ret <4 x i32> %r
632}
633
634define <4 x i32> @umin_bc_ba_swap_pred(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
635; CHECK-LABEL: umin_bc_ba_swap_pred:
636; CHECK: // %bb.0:
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]637; CHECK-NEXT: umin v2.4s, v1.4s, v2.4s
638; CHECK-NEXT: umin v0.4s, v1.4s, v0.4s
639; CHECK-NEXT: umin v0.4s, v2.4s, v0.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]640; CHECK-NEXT: ret
641 %cmp_bc = icmp ult <4 x i32> %b, %c
642 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
643 %cmp_ba = icmp ult <4 x i32> %b, %a
644 %min_ba = select <4 x i1> %cmp_ba, <4 x i32> %b, <4 x i32> %a
645 %cmp_ca = icmp ugt <4 x i32> %a, %c
646 %r = select <4 x i1> %cmp_ca, <4 x i32> %min_bc, <4 x i32> %min_ba
647 ret <4 x i32> %r
648}
649
650define <4 x i32> @umin_ab_bc_eq_pred(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
651; CHECK-LABEL: umin_ab_bc_eq_pred:
652; CHECK: // %bb.0:
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]653; CHECK-NEXT: umin v0.4s, v0.4s, v1.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]654; CHECK-NEXT: umin v1.4s, v1.4s, v2.4s
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]655; CHECK-NEXT: umin v0.4s, v0.4s, v1.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]656; CHECK-NEXT: ret
657 %cmp_ab = icmp ult <4 x i32> %a, %b
658 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
659 %cmp_bc = icmp ult <4 x i32> %b, %c
660 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
661 %cmp_ac = icmp ule <4 x i32> %a, %c
662 %r = select <4 x i1> %cmp_ac, <4 x i32> %min_ab, <4 x i32> %min_bc
663 ret <4 x i32> %r
664}
665
666define <4 x i32> @umin_ab_cb_eq_pred(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
667; CHECK-LABEL: umin_ab_cb_eq_pred:
668; CHECK: // %bb.0:
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]669; CHECK-NEXT: umin v0.4s, v0.4s, v1.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]670; CHECK-NEXT: umin v1.4s, v2.4s, v1.4s
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]671; CHECK-NEXT: umin v0.4s, v0.4s, v1.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]672; CHECK-NEXT: ret
673 %cmp_ab = icmp ult <4 x i32> %a, %b
674 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
675 %cmp_cb = icmp ult <4 x i32> %c, %b
676 %min_cb = select <4 x i1> %cmp_cb, <4 x i32> %c, <4 x i32> %b
677 %cmp_ac = icmp ule <4 x i32> %a, %c
678 %r = select <4 x i1> %cmp_ac, <4 x i32> %min_ab, <4 x i32> %min_cb
679 ret <4 x i32> %r
680}
681
682define <4 x i32> @umin_bc_ab_eq_pred(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
683; CHECK-LABEL: umin_bc_ab_eq_pred:
684; CHECK: // %bb.0:
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]685; CHECK-NEXT: umin v2.4s, v1.4s, v2.4s
686; CHECK-NEXT: umin v0.4s, v0.4s, v1.4s
687; CHECK-NEXT: umin v0.4s, v2.4s, v0.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]688; CHECK-NEXT: ret
689 %cmp_bc = icmp ult <4 x i32> %b, %c
690 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
691 %cmp_ab = icmp ult <4 x i32> %a, %b
692 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
693 %cmp_ca = icmp ule <4 x i32> %c, %a
694 %r = select <4 x i1> %cmp_ca, <4 x i32> %min_bc, <4 x i32> %min_ab
695 ret <4 x i32> %r
696}
697
698define <4 x i32> @umin_bc_ba_eq_pred(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
699; CHECK-LABEL: umin_bc_ba_eq_pred:
700; CHECK: // %bb.0:
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]701; CHECK-NEXT: umin v2.4s, v1.4s, v2.4s
702; CHECK-NEXT: umin v0.4s, v1.4s, v0.4s
703; CHECK-NEXT: umin v0.4s, v2.4s, v0.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]704; CHECK-NEXT: ret
705 %cmp_bc = icmp ult <4 x i32> %b, %c
706 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
707 %cmp_ba = icmp ult <4 x i32> %b, %a
708 %min_ba = select <4 x i1> %cmp_ba, <4 x i32> %b, <4 x i32> %a
709 %cmp_ca = icmp ule <4 x i32> %c, %a
710 %r = select <4 x i1> %cmp_ca, <4 x i32> %min_bc, <4 x i32> %min_ba
711 ret <4 x i32> %r
712}
713
714define <4 x i32> @umin_ab_bc_eq_swap_pred(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
715; CHECK-LABEL: umin_ab_bc_eq_swap_pred:
716; CHECK: // %bb.0:
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]717; CHECK-NEXT: umin v0.4s, v0.4s, v1.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]718; CHECK-NEXT: umin v1.4s, v1.4s, v2.4s
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]719; CHECK-NEXT: umin v0.4s, v0.4s, v1.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]720; CHECK-NEXT: ret
721 %cmp_ab = icmp ult <4 x i32> %a, %b
722 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
723 %cmp_bc = icmp ult <4 x i32> %b, %c
724 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
725 %cmp_ac = icmp uge <4 x i32> %c, %a
726 %r = select <4 x i1> %cmp_ac, <4 x i32> %min_ab, <4 x i32> %min_bc
727 ret <4 x i32> %r
728}
729
730define <4 x i32> @umin_ab_cb_eq_swap_pred(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
731; CHECK-LABEL: umin_ab_cb_eq_swap_pred:
732; CHECK: // %bb.0:
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]733; CHECK-NEXT: umin v0.4s, v0.4s, v1.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]734; CHECK-NEXT: umin v1.4s, v2.4s, v1.4s
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]735; CHECK-NEXT: umin v0.4s, v0.4s, v1.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]736; CHECK-NEXT: ret
737 %cmp_ab = icmp ult <4 x i32> %a, %b
738 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
739 %cmp_cb = icmp ult <4 x i32> %c, %b
740 %min_cb = select <4 x i1> %cmp_cb, <4 x i32> %c, <4 x i32> %b
741 %cmp_ac = icmp uge <4 x i32> %c, %a
742 %r = select <4 x i1> %cmp_ac, <4 x i32> %min_ab, <4 x i32> %min_cb
743 ret <4 x i32> %r
744}
745
746define <4 x i32> @umin_bc_ab_eq_swap_pred(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
747; CHECK-LABEL: umin_bc_ab_eq_swap_pred:
748; CHECK: // %bb.0:
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]749; CHECK-NEXT: umin v2.4s, v1.4s, v2.4s
750; CHECK-NEXT: umin v0.4s, v0.4s, v1.4s
751; CHECK-NEXT: umin v0.4s, v2.4s, v0.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]752; CHECK-NEXT: ret
753 %cmp_bc = icmp ult <4 x i32> %b, %c
754 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
755 %cmp_ab = icmp ult <4 x i32> %a, %b
756 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
757 %cmp_ca = icmp uge <4 x i32> %a, %c
758 %r = select <4 x i1> %cmp_ca, <4 x i32> %min_bc, <4 x i32> %min_ab
759 ret <4 x i32> %r
760}
761
762define <4 x i32> @umin_bc_ba_eq_swap_pred(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
763; CHECK-LABEL: umin_bc_ba_eq_swap_pred:
764; CHECK: // %bb.0:
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]765; CHECK-NEXT: umin v2.4s, v1.4s, v2.4s
766; CHECK-NEXT: umin v0.4s, v1.4s, v0.4s
767; CHECK-NEXT: umin v0.4s, v2.4s, v0.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]768; CHECK-NEXT: ret
769 %cmp_bc = icmp ult <4 x i32> %b, %c
770 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
771 %cmp_ba = icmp ult <4 x i32> %b, %a
772 %min_ba = select <4 x i1> %cmp_ba, <4 x i32> %b, <4 x i32> %a
773 %cmp_ca = icmp uge <4 x i32> %a, %c
774 %r = select <4 x i1> %cmp_ca, <4 x i32> %min_bc, <4 x i32> %min_ba
775 ret <4 x i32> %r
776}
777
778define <4 x i32> @umax_ab_bc(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
779; CHECK-LABEL: umax_ab_bc:
780; CHECK: // %bb.0:
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]781; CHECK-NEXT: umax v0.4s, v0.4s, v1.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]782; CHECK-NEXT: umax v1.4s, v1.4s, v2.4s
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]783; CHECK-NEXT: umax v0.4s, v0.4s, v1.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]784; CHECK-NEXT: ret
785 %cmp_ab = icmp ugt <4 x i32> %a, %b
786 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
787 %cmp_bc = icmp ugt <4 x i32> %b, %c
788 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
789 %cmp_ac = icmp ugt <4 x i32> %a, %c
790 %r = select <4 x i1> %cmp_ac, <4 x i32> %min_ab, <4 x i32> %min_bc
791 ret <4 x i32> %r
792}
793
794define <4 x i32> @umax_ab_cb(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
795; CHECK-LABEL: umax_ab_cb:
796; CHECK: // %bb.0:
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]797; CHECK-NEXT: umax v0.4s, v0.4s, v1.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]798; CHECK-NEXT: umax v1.4s, v2.4s, v1.4s
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]799; CHECK-NEXT: umax v0.4s, v0.4s, v1.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]800; CHECK-NEXT: ret
801 %cmp_ab = icmp ugt <4 x i32> %a, %b
802 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
803 %cmp_cb = icmp ugt <4 x i32> %c, %b
804 %min_cb = select <4 x i1> %cmp_cb, <4 x i32> %c, <4 x i32> %b
805 %cmp_ac = icmp ugt <4 x i32> %a, %c
806 %r = select <4 x i1> %cmp_ac, <4 x i32> %min_ab, <4 x i32> %min_cb
807 ret <4 x i32> %r
808}
809
810define <4 x i32> @umax_bc_ab(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
811; CHECK-LABEL: umax_bc_ab:
812; CHECK: // %bb.0:
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]813; CHECK-NEXT: umax v2.4s, v1.4s, v2.4s
814; CHECK-NEXT: umax v0.4s, v0.4s, v1.4s
815; CHECK-NEXT: umax v0.4s, v2.4s, v0.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]816; CHECK-NEXT: ret
817 %cmp_bc = icmp ugt <4 x i32> %b, %c
818 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
819 %cmp_ab = icmp ugt <4 x i32> %a, %b
820 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
821 %cmp_ca = icmp ugt <4 x i32> %c, %a
822 %r = select <4 x i1> %cmp_ca, <4 x i32> %min_bc, <4 x i32> %min_ab
823 ret <4 x i32> %r
824}
825
826define <4 x i32> @umax_bc_ba(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
827; CHECK-LABEL: umax_bc_ba:
828; CHECK: // %bb.0:
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]829; CHECK-NEXT: umax v2.4s, v1.4s, v2.4s
830; CHECK-NEXT: umax v0.4s, v1.4s, v0.4s
831; CHECK-NEXT: umax v0.4s, v2.4s, v0.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]832; CHECK-NEXT: ret
833 %cmp_bc = icmp ugt <4 x i32> %b, %c
834 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
835 %cmp_ba = icmp ugt <4 x i32> %b, %a
836 %min_ba = select <4 x i1> %cmp_ba, <4 x i32> %b, <4 x i32> %a
837 %cmp_ca = icmp ugt <4 x i32> %c, %a
838 %r = select <4 x i1> %cmp_ca, <4 x i32> %min_bc, <4 x i32> %min_ba
839 ret <4 x i32> %r
840}
841
842define <4 x i32> @umax_ab_bc_swap_pred(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
843; CHECK-LABEL: umax_ab_bc_swap_pred:
844; CHECK: // %bb.0:
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]845; CHECK-NEXT: umax v0.4s, v0.4s, v1.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]846; CHECK-NEXT: umax v1.4s, v1.4s, v2.4s
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]847; CHECK-NEXT: umax v0.4s, v0.4s, v1.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]848; CHECK-NEXT: ret
849 %cmp_ab = icmp ugt <4 x i32> %a, %b
850 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
851 %cmp_bc = icmp ugt <4 x i32> %b, %c
852 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
853 %cmp_ac = icmp ult <4 x i32> %c, %a
854 %r = select <4 x i1> %cmp_ac, <4 x i32> %min_ab, <4 x i32> %min_bc
855 ret <4 x i32> %r
856}
857
858define <4 x i32> @umax_ab_cb_swap_pred(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
859; CHECK-LABEL: umax_ab_cb_swap_pred:
860; CHECK: // %bb.0:
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]861; CHECK-NEXT: umax v0.4s, v0.4s, v1.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]862; CHECK-NEXT: umax v1.4s, v2.4s, v1.4s
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]863; CHECK-NEXT: umax v0.4s, v0.4s, v1.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]864; CHECK-NEXT: ret
865 %cmp_ab = icmp ugt <4 x i32> %a, %b
866 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
867 %cmp_cb = icmp ugt <4 x i32> %c, %b
868 %min_cb = select <4 x i1> %cmp_cb, <4 x i32> %c, <4 x i32> %b
869 %cmp_ac = icmp ult <4 x i32> %c, %a
870 %r = select <4 x i1> %cmp_ac, <4 x i32> %min_ab, <4 x i32> %min_cb
871 ret <4 x i32> %r
872}
873
874define <4 x i32> @umax_bc_ab_swap_pred(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
875; CHECK-LABEL: umax_bc_ab_swap_pred:
876; CHECK: // %bb.0:
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]877; CHECK-NEXT: umax v2.4s, v1.4s, v2.4s
878; CHECK-NEXT: umax v0.4s, v0.4s, v1.4s
879; CHECK-NEXT: umax v0.4s, v2.4s, v0.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]880; CHECK-NEXT: ret
881 %cmp_bc = icmp ugt <4 x i32> %b, %c
882 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
883 %cmp_ab = icmp ugt <4 x i32> %a, %b
884 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
885 %cmp_ca = icmp ult <4 x i32> %a, %c
886 %r = select <4 x i1> %cmp_ca, <4 x i32> %min_bc, <4 x i32> %min_ab
887 ret <4 x i32> %r
888}
889
890define <4 x i32> @umax_bc_ba_swap_pred(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
891; CHECK-LABEL: umax_bc_ba_swap_pred:
892; CHECK: // %bb.0:
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]893; CHECK-NEXT: umax v2.4s, v1.4s, v2.4s
894; CHECK-NEXT: umax v0.4s, v1.4s, v0.4s
895; CHECK-NEXT: umax v0.4s, v2.4s, v0.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]896; CHECK-NEXT: ret
897 %cmp_bc = icmp ugt <4 x i32> %b, %c
898 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
899 %cmp_ba = icmp ugt <4 x i32> %b, %a
900 %min_ba = select <4 x i1> %cmp_ba, <4 x i32> %b, <4 x i32> %a
901 %cmp_ca = icmp ult <4 x i32> %a, %c
902 %r = select <4 x i1> %cmp_ca, <4 x i32> %min_bc, <4 x i32> %min_ba
903 ret <4 x i32> %r
904}
905
906define <4 x i32> @umax_ab_bc_eq_pred(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
907; CHECK-LABEL: umax_ab_bc_eq_pred:
908; CHECK: // %bb.0:
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]909; CHECK-NEXT: umax v0.4s, v0.4s, v1.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]910; CHECK-NEXT: umax v1.4s, v1.4s, v2.4s
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]911; CHECK-NEXT: umax v0.4s, v0.4s, v1.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]912; CHECK-NEXT: ret
913 %cmp_ab = icmp ugt <4 x i32> %a, %b
914 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
915 %cmp_bc = icmp ugt <4 x i32> %b, %c
916 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
917 %cmp_ac = icmp uge <4 x i32> %a, %c
918 %r = select <4 x i1> %cmp_ac, <4 x i32> %min_ab, <4 x i32> %min_bc
919 ret <4 x i32> %r
920}
921
922define <4 x i32> @umax_ab_cb_eq_pred(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
923; CHECK-LABEL: umax_ab_cb_eq_pred:
924; CHECK: // %bb.0:
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]925; CHECK-NEXT: umax v0.4s, v0.4s, v1.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]926; CHECK-NEXT: umax v1.4s, v2.4s, v1.4s
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]927; CHECK-NEXT: umax v0.4s, v0.4s, v1.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]928; CHECK-NEXT: ret
929 %cmp_ab = icmp ugt <4 x i32> %a, %b
930 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
931 %cmp_cb = icmp ugt <4 x i32> %c, %b
932 %min_cb = select <4 x i1> %cmp_cb, <4 x i32> %c, <4 x i32> %b
933 %cmp_ac = icmp uge <4 x i32> %a, %c
934 %r = select <4 x i1> %cmp_ac, <4 x i32> %min_ab, <4 x i32> %min_cb
935 ret <4 x i32> %r
936}
937
938define <4 x i32> @umax_bc_ab_eq_pred(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
939; CHECK-LABEL: umax_bc_ab_eq_pred:
940; CHECK: // %bb.0:
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]941; CHECK-NEXT: umax v2.4s, v1.4s, v2.4s
942; CHECK-NEXT: umax v0.4s, v0.4s, v1.4s
943; CHECK-NEXT: umax v0.4s, v2.4s, v0.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]944; CHECK-NEXT: ret
945 %cmp_bc = icmp ugt <4 x i32> %b, %c
946 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
947 %cmp_ab = icmp ugt <4 x i32> %a, %b
948 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
949 %cmp_ca = icmp uge <4 x i32> %c, %a
950 %r = select <4 x i1> %cmp_ca, <4 x i32> %min_bc, <4 x i32> %min_ab
951 ret <4 x i32> %r
952}
953
954define <4 x i32> @umax_bc_ba_eq_pred(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
955; CHECK-LABEL: umax_bc_ba_eq_pred:
956; CHECK: // %bb.0:
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]957; CHECK-NEXT: umax v2.4s, v1.4s, v2.4s
958; CHECK-NEXT: umax v0.4s, v1.4s, v0.4s
959; CHECK-NEXT: umax v0.4s, v2.4s, v0.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]960; CHECK-NEXT: ret
961 %cmp_bc = icmp ugt <4 x i32> %b, %c
962 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
963 %cmp_ba = icmp ugt <4 x i32> %b, %a
964 %min_ba = select <4 x i1> %cmp_ba, <4 x i32> %b, <4 x i32> %a
965 %cmp_ca = icmp uge <4 x i32> %c, %a
966 %r = select <4 x i1> %cmp_ca, <4 x i32> %min_bc, <4 x i32> %min_ba
967 ret <4 x i32> %r
968}
969
970define <4 x i32> @umax_ab_bc_eq_swap_pred(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
971; CHECK-LABEL: umax_ab_bc_eq_swap_pred:
972; CHECK: // %bb.0:
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]973; CHECK-NEXT: umax v0.4s, v0.4s, v1.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]974; CHECK-NEXT: umax v1.4s, v1.4s, v2.4s
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]975; CHECK-NEXT: umax v0.4s, v0.4s, v1.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]976; CHECK-NEXT: ret
977 %cmp_ab = icmp ugt <4 x i32> %a, %b
978 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
979 %cmp_bc = icmp ugt <4 x i32> %b, %c
980 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
981 %cmp_ac = icmp ule <4 x i32> %c, %a
982 %r = select <4 x i1> %cmp_ac, <4 x i32> %min_ab, <4 x i32> %min_bc
983 ret <4 x i32> %r
984}
985
986define <4 x i32> @umax_ab_cb_eq_swap_pred(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
987; CHECK-LABEL: umax_ab_cb_eq_swap_pred:
988; CHECK: // %bb.0:
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]989; CHECK-NEXT: umax v0.4s, v0.4s, v1.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]990; CHECK-NEXT: umax v1.4s, v2.4s, v1.4s
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]991; CHECK-NEXT: umax v0.4s, v0.4s, v1.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]992; CHECK-NEXT: ret
993 %cmp_ab = icmp ugt <4 x i32> %a, %b
994 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
995 %cmp_cb = icmp ugt <4 x i32> %c, %b
996 %min_cb = select <4 x i1> %cmp_cb, <4 x i32> %c, <4 x i32> %b
997 %cmp_ac = icmp ule <4 x i32> %c, %a
998 %r = select <4 x i1> %cmp_ac, <4 x i32> %min_ab, <4 x i32> %min_cb
999 ret <4 x i32> %r
1000}
1001
1002define <4 x i32> @umax_bc_ab_eq_swap_pred(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
1003; CHECK-LABEL: umax_bc_ab_eq_swap_pred:
1004; CHECK: // %bb.0:
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]1005; CHECK-NEXT: umax v2.4s, v1.4s, v2.4s
1006; CHECK-NEXT: umax v0.4s, v0.4s, v1.4s
1007; CHECK-NEXT: umax v0.4s, v2.4s, v0.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]1008; CHECK-NEXT: ret
1009 %cmp_bc = icmp ugt <4 x i32> %b, %c
1010 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
1011 %cmp_ab = icmp ugt <4 x i32> %a, %b
1012 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
1013 %cmp_ca = icmp ule <4 x i32> %a, %c
1014 %r = select <4 x i1> %cmp_ca, <4 x i32> %min_bc, <4 x i32> %min_ab
1015 ret <4 x i32> %r
1016}
1017
1018define <4 x i32> @umax_bc_ba_eq_swap_pred(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
1019; CHECK-LABEL: umax_bc_ba_eq_swap_pred:
1020; CHECK: // %bb.0:
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]1021; CHECK-NEXT: umax v2.4s, v1.4s, v2.4s
1022; CHECK-NEXT: umax v0.4s, v1.4s, v0.4s
1023; CHECK-NEXT: umax v0.4s, v2.4s, v0.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]1024; CHECK-NEXT: ret
1025 %cmp_bc = icmp ugt <4 x i32> %b, %c
1026 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
1027 %cmp_ba = icmp ugt <4 x i32> %b, %a
1028 %min_ba = select <4 x i1> %cmp_ba, <4 x i32> %b, <4 x i32> %a
1029 %cmp_ca = icmp ule <4 x i32> %a, %c
1030 %r = select <4 x i1> %cmp_ca, <4 x i32> %min_bc, <4 x i32> %min_ba
1031 ret <4 x i32> %r
1032}
1033
Sanjay Patelf16fe0f2018-01-10 23:31:42 +0000[diff] [blame^]1034define <4 x i32> @notted_smin_ab_bc(<4 x i32> %x, <4 x i32> %y, <4 x i32> %z) {
1035; CHECK-LABEL: notted_smin_ab_bc:
1036; CHECK: // %bb.0:
1037; CHECK-NEXT: mvn v3.16b, v0.16b
1038; CHECK-NEXT: mvn v1.16b, v1.16b
1039; CHECK-NEXT: mvn v4.16b, v2.16b
1040; CHECK-NEXT: smin v3.4s, v3.4s, v1.4s
1041; CHECK-NEXT: smin v1.4s, v1.4s, v4.4s
1042; CHECK-NEXT: cmgt v0.4s, v0.4s, v2.4s
1043; CHECK-NEXT: bsl v0.16b, v3.16b, v1.16b
1044; CHECK-NEXT: ret
1045 %a = xor <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1>
1046 %b = xor <4 x i32> %y, <i32 -1, i32 -1, i32 -1, i32 -1>
1047 %c = xor <4 x i32> %z, <i32 -1, i32 -1, i32 -1, i32 -1>
1048 %cmp_ab = icmp slt <4 x i32> %a, %b
1049 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
1050 %cmp_bc = icmp slt <4 x i32> %b, %c
1051 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
1052 %cmp_ac = icmp slt <4 x i32> %z, %x
1053 %r = select <4 x i1> %cmp_ac, <4 x i32> %min_ab, <4 x i32> %min_bc
1054 ret <4 x i32> %r
1055}
1056
1057define <4 x i32> @notted_smin_ab_cb(<4 x i32> %x, <4 x i32> %y, <4 x i32> %z) {
1058; CHECK-LABEL: notted_smin_ab_cb:
1059; CHECK: // %bb.0:
1060; CHECK-NEXT: mvn v3.16b, v0.16b
1061; CHECK-NEXT: mvn v1.16b, v1.16b
1062; CHECK-NEXT: mvn v4.16b, v2.16b
1063; CHECK-NEXT: smin v3.4s, v3.4s, v1.4s
1064; CHECK-NEXT: smin v1.4s, v4.4s, v1.4s
1065; CHECK-NEXT: cmgt v0.4s, v0.4s, v2.4s
1066; CHECK-NEXT: bsl v0.16b, v3.16b, v1.16b
1067; CHECK-NEXT: ret
1068 %a = xor <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1>
1069 %b = xor <4 x i32> %y, <i32 -1, i32 -1, i32 -1, i32 -1>
1070 %c = xor <4 x i32> %z, <i32 -1, i32 -1, i32 -1, i32 -1>
1071 %cmp_ab = icmp slt <4 x i32> %a, %b
1072 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
1073 %cmp_cb = icmp slt <4 x i32> %c, %b
1074 %min_cb = select <4 x i1> %cmp_cb, <4 x i32> %c, <4 x i32> %b
1075 %cmp_ac = icmp slt <4 x i32> %z, %x
1076 %r = select <4 x i1> %cmp_ac, <4 x i32> %min_ab, <4 x i32> %min_cb
1077 ret <4 x i32> %r
1078}
1079
1080define <4 x i32> @notted_smin_bc_ab(<4 x i32> %x, <4 x i32> %y, <4 x i32> %z) {
1081; CHECK-LABEL: notted_smin_bc_ab:
1082; CHECK: // %bb.0:
1083; CHECK-NEXT: mvn v3.16b, v0.16b
1084; CHECK-NEXT: mvn v1.16b, v1.16b
1085; CHECK-NEXT: mvn v4.16b, v2.16b
1086; CHECK-NEXT: smin v4.4s, v1.4s, v4.4s
1087; CHECK-NEXT: smin v1.4s, v3.4s, v1.4s
1088; CHECK-NEXT: cmgt v0.4s, v2.4s, v0.4s
1089; CHECK-NEXT: bsl v0.16b, v4.16b, v1.16b
1090; CHECK-NEXT: ret
1091 %a = xor <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1>
1092 %b = xor <4 x i32> %y, <i32 -1, i32 -1, i32 -1, i32 -1>
1093 %c = xor <4 x i32> %z, <i32 -1, i32 -1, i32 -1, i32 -1>
1094 %cmp_bc = icmp slt <4 x i32> %b, %c
1095 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
1096 %cmp_ab = icmp slt <4 x i32> %a, %b
1097 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
1098 %cmp_ca = icmp slt <4 x i32> %x, %z
1099 %r = select <4 x i1> %cmp_ca, <4 x i32> %min_bc, <4 x i32> %min_ab
1100 ret <4 x i32> %r
1101}
1102
1103define <4 x i32> @notted_smin_bc_ba(<4 x i32> %x, <4 x i32> %y, <4 x i32> %z) {
1104; CHECK-LABEL: notted_smin_bc_ba:
1105; CHECK: // %bb.0:
1106; CHECK-NEXT: mvn v3.16b, v0.16b
1107; CHECK-NEXT: mvn v1.16b, v1.16b
1108; CHECK-NEXT: mvn v4.16b, v2.16b
1109; CHECK-NEXT: smin v4.4s, v1.4s, v4.4s
1110; CHECK-NEXT: smin v1.4s, v1.4s, v3.4s
1111; CHECK-NEXT: cmgt v0.4s, v2.4s, v0.4s
1112; CHECK-NEXT: bsl v0.16b, v4.16b, v1.16b
1113; CHECK-NEXT: ret
1114 %a = xor <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1>
1115 %b = xor <4 x i32> %y, <i32 -1, i32 -1, i32 -1, i32 -1>
1116 %c = xor <4 x i32> %z, <i32 -1, i32 -1, i32 -1, i32 -1>
1117 %cmp_bc = icmp slt <4 x i32> %b, %c
1118 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
1119 %cmp_ba = icmp slt <4 x i32> %b, %a
1120 %min_ba = select <4 x i1> %cmp_ba, <4 x i32> %b, <4 x i32> %a
1121 %cmp_ca = icmp slt <4 x i32> %x, %z
1122 %r = select <4 x i1> %cmp_ca, <4 x i32> %min_bc, <4 x i32> %min_ba
1123 ret <4 x i32> %r
1124}
1125
1126define <4 x i32> @notted_smin_ab_bc_swap_pred(<4 x i32> %x, <4 x i32> %y, <4 x i32> %z) {
1127; CHECK-LABEL: notted_smin_ab_bc_swap_pred:
1128; CHECK: // %bb.0:
1129; CHECK-NEXT: mvn v3.16b, v0.16b
1130; CHECK-NEXT: mvn v1.16b, v1.16b
1131; CHECK-NEXT: mvn v4.16b, v2.16b
1132; CHECK-NEXT: smin v3.4s, v3.4s, v1.4s
1133; CHECK-NEXT: smin v1.4s, v1.4s, v4.4s
1134; CHECK-NEXT: cmgt v0.4s, v0.4s, v2.4s
1135; CHECK-NEXT: bsl v0.16b, v3.16b, v1.16b
1136; CHECK-NEXT: ret
1137 %a = xor <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1>
1138 %b = xor <4 x i32> %y, <i32 -1, i32 -1, i32 -1, i32 -1>
1139 %c = xor <4 x i32> %z, <i32 -1, i32 -1, i32 -1, i32 -1>
1140 %cmp_ab = icmp slt <4 x i32> %a, %b
1141 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
1142 %cmp_bc = icmp slt <4 x i32> %b, %c
1143 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
1144 %cmp_ac = icmp sgt <4 x i32> %x, %z
1145 %r = select <4 x i1> %cmp_ac, <4 x i32> %min_ab, <4 x i32> %min_bc
1146 ret <4 x i32> %r
1147}
1148
1149define <4 x i32> @notted_smin_ab_cb_swap_pred(<4 x i32> %x, <4 x i32> %y, <4 x i32> %z) {
1150; CHECK-LABEL: notted_smin_ab_cb_swap_pred:
1151; CHECK: // %bb.0:
1152; CHECK-NEXT: mvn v3.16b, v0.16b
1153; CHECK-NEXT: mvn v1.16b, v1.16b
1154; CHECK-NEXT: mvn v4.16b, v2.16b
1155; CHECK-NEXT: smin v3.4s, v3.4s, v1.4s
1156; CHECK-NEXT: smin v1.4s, v4.4s, v1.4s
1157; CHECK-NEXT: cmgt v0.4s, v0.4s, v2.4s
1158; CHECK-NEXT: bsl v0.16b, v3.16b, v1.16b
1159; CHECK-NEXT: ret
1160 %a = xor <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1>
1161 %b = xor <4 x i32> %y, <i32 -1, i32 -1, i32 -1, i32 -1>
1162 %c = xor <4 x i32> %z, <i32 -1, i32 -1, i32 -1, i32 -1>
1163 %cmp_ab = icmp slt <4 x i32> %a, %b
1164 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
1165 %cmp_cb = icmp slt <4 x i32> %c, %b
1166 %min_cb = select <4 x i1> %cmp_cb, <4 x i32> %c, <4 x i32> %b
1167 %cmp_ac = icmp sgt <4 x i32> %x, %z
1168 %r = select <4 x i1> %cmp_ac, <4 x i32> %min_ab, <4 x i32> %min_cb
1169 ret <4 x i32> %r
1170}
1171
1172define <4 x i32> @notted_smin_bc_ab_swap_pred(<4 x i32> %x, <4 x i32> %y, <4 x i32> %z) {
1173; CHECK-LABEL: notted_smin_bc_ab_swap_pred:
1174; CHECK: // %bb.0:
1175; CHECK-NEXT: mvn v3.16b, v0.16b
1176; CHECK-NEXT: mvn v1.16b, v1.16b
1177; CHECK-NEXT: mvn v4.16b, v2.16b
1178; CHECK-NEXT: smin v4.4s, v1.4s, v4.4s
1179; CHECK-NEXT: smin v1.4s, v3.4s, v1.4s
1180; CHECK-NEXT: cmgt v0.4s, v2.4s, v0.4s
1181; CHECK-NEXT: bsl v0.16b, v4.16b, v1.16b
1182; CHECK-NEXT: ret
1183 %a = xor <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1>
1184 %b = xor <4 x i32> %y, <i32 -1, i32 -1, i32 -1, i32 -1>
1185 %c = xor <4 x i32> %z, <i32 -1, i32 -1, i32 -1, i32 -1>
1186 %cmp_bc = icmp slt <4 x i32> %b, %c
1187 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
1188 %cmp_ab = icmp slt <4 x i32> %a, %b
1189 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
1190 %cmp_ca = icmp sgt <4 x i32> %z, %x
1191 %r = select <4 x i1> %cmp_ca, <4 x i32> %min_bc, <4 x i32> %min_ab
1192 ret <4 x i32> %r
1193}
1194
1195define <4 x i32> @notted_smin_bc_ba_swap_pred(<4 x i32> %x, <4 x i32> %y, <4 x i32> %z) {
1196; CHECK-LABEL: notted_smin_bc_ba_swap_pred:
1197; CHECK: // %bb.0:
1198; CHECK-NEXT: mvn v3.16b, v0.16b
1199; CHECK-NEXT: mvn v1.16b, v1.16b
1200; CHECK-NEXT: mvn v4.16b, v2.16b
1201; CHECK-NEXT: smin v4.4s, v1.4s, v4.4s
1202; CHECK-NEXT: smin v1.4s, v1.4s, v3.4s
1203; CHECK-NEXT: cmgt v0.4s, v2.4s, v0.4s
1204; CHECK-NEXT: bsl v0.16b, v4.16b, v1.16b
1205; CHECK-NEXT: ret
1206 %a = xor <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1>
1207 %b = xor <4 x i32> %y, <i32 -1, i32 -1, i32 -1, i32 -1>
1208 %c = xor <4 x i32> %z, <i32 -1, i32 -1, i32 -1, i32 -1>
1209 %cmp_bc = icmp slt <4 x i32> %b, %c
1210 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
1211 %cmp_ba = icmp slt <4 x i32> %b, %a
1212 %min_ba = select <4 x i1> %cmp_ba, <4 x i32> %b, <4 x i32> %a
1213 %cmp_ca = icmp sgt <4 x i32> %z, %x
1214 %r = select <4 x i1> %cmp_ca, <4 x i32> %min_bc, <4 x i32> %min_ba
1215 ret <4 x i32> %r
1216}
1217
1218define <4 x i32> @notted_smin_ab_bc_eq_pred(<4 x i32> %x, <4 x i32> %y, <4 x i32> %z) {
1219; CHECK-LABEL: notted_smin_ab_bc_eq_pred:
1220; CHECK: // %bb.0:
1221; CHECK-NEXT: mvn v3.16b, v0.16b
1222; CHECK-NEXT: mvn v1.16b, v1.16b
1223; CHECK-NEXT: mvn v4.16b, v2.16b
1224; CHECK-NEXT: smin v3.4s, v3.4s, v1.4s
1225; CHECK-NEXT: smin v1.4s, v1.4s, v4.4s
1226; CHECK-NEXT: cmge v0.4s, v0.4s, v2.4s
1227; CHECK-NEXT: bsl v0.16b, v3.16b, v1.16b
1228; CHECK-NEXT: ret
1229 %a = xor <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1>
1230 %b = xor <4 x i32> %y, <i32 -1, i32 -1, i32 -1, i32 -1>
1231 %c = xor <4 x i32> %z, <i32 -1, i32 -1, i32 -1, i32 -1>
1232 %cmp_ab = icmp slt <4 x i32> %a, %b
1233 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
1234 %cmp_bc = icmp slt <4 x i32> %b, %c
1235 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
1236 %cmp_ac = icmp sle <4 x i32> %z, %x
1237 %r = select <4 x i1> %cmp_ac, <4 x i32> %min_ab, <4 x i32> %min_bc
1238 ret <4 x i32> %r
1239}
1240
1241define <4 x i32> @notted_smin_ab_cb_eq_pred(<4 x i32> %x, <4 x i32> %y, <4 x i32> %z) {
1242; CHECK-LABEL: notted_smin_ab_cb_eq_pred:
1243; CHECK: // %bb.0:
1244; CHECK-NEXT: mvn v3.16b, v0.16b
1245; CHECK-NEXT: mvn v1.16b, v1.16b
1246; CHECK-NEXT: mvn v4.16b, v2.16b
1247; CHECK-NEXT: smin v3.4s, v3.4s, v1.4s
1248; CHECK-NEXT: smin v1.4s, v4.4s, v1.4s
1249; CHECK-NEXT: cmge v0.4s, v0.4s, v2.4s
1250; CHECK-NEXT: bsl v0.16b, v3.16b, v1.16b
1251; CHECK-NEXT: ret
1252 %a = xor <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1>
1253 %b = xor <4 x i32> %y, <i32 -1, i32 -1, i32 -1, i32 -1>
1254 %c = xor <4 x i32> %z, <i32 -1, i32 -1, i32 -1, i32 -1>
1255 %cmp_ab = icmp slt <4 x i32> %a, %b
1256 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
1257 %cmp_cb = icmp slt <4 x i32> %c, %b
1258 %min_cb = select <4 x i1> %cmp_cb, <4 x i32> %c, <4 x i32> %b
1259 %cmp_ac = icmp sle <4 x i32> %z, %x
1260 %r = select <4 x i1> %cmp_ac, <4 x i32> %min_ab, <4 x i32> %min_cb
1261 ret <4 x i32> %r
1262}
1263
1264define <4 x i32> @notted_smin_bc_ab_eq_pred(<4 x i32> %x, <4 x i32> %y, <4 x i32> %z) {
1265; CHECK-LABEL: notted_smin_bc_ab_eq_pred:
1266; CHECK: // %bb.0:
1267; CHECK-NEXT: mvn v3.16b, v0.16b
1268; CHECK-NEXT: mvn v1.16b, v1.16b
1269; CHECK-NEXT: mvn v4.16b, v2.16b
1270; CHECK-NEXT: smin v4.4s, v1.4s, v4.4s
1271; CHECK-NEXT: smin v1.4s, v3.4s, v1.4s
1272; CHECK-NEXT: cmge v0.4s, v2.4s, v0.4s
1273; CHECK-NEXT: bsl v0.16b, v4.16b, v1.16b
1274; CHECK-NEXT: ret
1275 %a = xor <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1>
1276 %b = xor <4 x i32> %y, <i32 -1, i32 -1, i32 -1, i32 -1>
1277 %c = xor <4 x i32> %z, <i32 -1, i32 -1, i32 -1, i32 -1>
1278 %cmp_bc = icmp slt <4 x i32> %b, %c
1279 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
1280 %cmp_ab = icmp slt <4 x i32> %a, %b
1281 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
1282 %cmp_ca = icmp sle <4 x i32> %x, %z
1283 %r = select <4 x i1> %cmp_ca, <4 x i32> %min_bc, <4 x i32> %min_ab
1284 ret <4 x i32> %r
1285}
1286
1287define <4 x i32> @notted_smin_bc_ba_eq_pred(<4 x i32> %x, <4 x i32> %y, <4 x i32> %z) {
1288; CHECK-LABEL: notted_smin_bc_ba_eq_pred:
1289; CHECK: // %bb.0:
1290; CHECK-NEXT: mvn v3.16b, v0.16b
1291; CHECK-NEXT: mvn v1.16b, v1.16b
1292; CHECK-NEXT: mvn v4.16b, v2.16b
1293; CHECK-NEXT: smin v4.4s, v1.4s, v4.4s
1294; CHECK-NEXT: smin v1.4s, v1.4s, v3.4s
1295; CHECK-NEXT: cmge v0.4s, v2.4s, v0.4s
1296; CHECK-NEXT: bsl v0.16b, v4.16b, v1.16b
1297; CHECK-NEXT: ret
1298 %a = xor <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1>
1299 %b = xor <4 x i32> %y, <i32 -1, i32 -1, i32 -1, i32 -1>
1300 %c = xor <4 x i32> %z, <i32 -1, i32 -1, i32 -1, i32 -1>
1301 %cmp_bc = icmp slt <4 x i32> %b, %c
1302 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
1303 %cmp_ba = icmp slt <4 x i32> %b, %a
1304 %min_ba = select <4 x i1> %cmp_ba, <4 x i32> %b, <4 x i32> %a
1305 %cmp_ca = icmp sle <4 x i32> %x, %z
1306 %r = select <4 x i1> %cmp_ca, <4 x i32> %min_bc, <4 x i32> %min_ba
1307 ret <4 x i32> %r
1308}
1309
1310define <4 x i32> @notted_smin_ab_bc_eq_swap_pred(<4 x i32> %x, <4 x i32> %y, <4 x i32> %z) {
1311; CHECK-LABEL: notted_smin_ab_bc_eq_swap_pred:
1312; CHECK: // %bb.0:
1313; CHECK-NEXT: mvn v3.16b, v0.16b
1314; CHECK-NEXT: mvn v1.16b, v1.16b
1315; CHECK-NEXT: mvn v4.16b, v2.16b
1316; CHECK-NEXT: smin v3.4s, v3.4s, v1.4s
1317; CHECK-NEXT: smin v1.4s, v1.4s, v4.4s
1318; CHECK-NEXT: cmge v0.4s, v0.4s, v2.4s
1319; CHECK-NEXT: bsl v0.16b, v3.16b, v1.16b
1320; CHECK-NEXT: ret
1321 %a = xor <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1>
1322 %b = xor <4 x i32> %y, <i32 -1, i32 -1, i32 -1, i32 -1>
1323 %c = xor <4 x i32> %z, <i32 -1, i32 -1, i32 -1, i32 -1>
1324 %cmp_ab = icmp slt <4 x i32> %a, %b
1325 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
1326 %cmp_bc = icmp slt <4 x i32> %b, %c
1327 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
1328 %cmp_ac = icmp sge <4 x i32> %x, %z
1329 %r = select <4 x i1> %cmp_ac, <4 x i32> %min_ab, <4 x i32> %min_bc
1330 ret <4 x i32> %r
1331}
1332
1333define <4 x i32> @notted_smin_ab_cb_eq_swap_pred(<4 x i32> %x, <4 x i32> %y, <4 x i32> %z) {
1334; CHECK-LABEL: notted_smin_ab_cb_eq_swap_pred:
1335; CHECK: // %bb.0:
1336; CHECK-NEXT: mvn v3.16b, v0.16b
1337; CHECK-NEXT: mvn v1.16b, v1.16b
1338; CHECK-NEXT: mvn v4.16b, v2.16b
1339; CHECK-NEXT: smin v3.4s, v3.4s, v1.4s
1340; CHECK-NEXT: smin v1.4s, v4.4s, v1.4s
1341; CHECK-NEXT: cmge v0.4s, v0.4s, v2.4s
1342; CHECK-NEXT: bsl v0.16b, v3.16b, v1.16b
1343; CHECK-NEXT: ret
1344 %a = xor <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1>
1345 %b = xor <4 x i32> %y, <i32 -1, i32 -1, i32 -1, i32 -1>
1346 %c = xor <4 x i32> %z, <i32 -1, i32 -1, i32 -1, i32 -1>
1347 %cmp_ab = icmp slt <4 x i32> %a, %b
1348 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
1349 %cmp_cb = icmp slt <4 x i32> %c, %b
1350 %min_cb = select <4 x i1> %cmp_cb, <4 x i32> %c, <4 x i32> %b
1351 %cmp_ac = icmp sge <4 x i32> %x, %z
1352 %r = select <4 x i1> %cmp_ac, <4 x i32> %min_ab, <4 x i32> %min_cb
1353 ret <4 x i32> %r
1354}
1355
1356define <4 x i32> @notted_smin_bc_ab_eq_swap_pred(<4 x i32> %x, <4 x i32> %y, <4 x i32> %z) {
1357; CHECK-LABEL: notted_smin_bc_ab_eq_swap_pred:
1358; CHECK: // %bb.0:
1359; CHECK-NEXT: mvn v3.16b, v0.16b
1360; CHECK-NEXT: mvn v1.16b, v1.16b
1361; CHECK-NEXT: mvn v4.16b, v2.16b
1362; CHECK-NEXT: smin v4.4s, v1.4s, v4.4s
1363; CHECK-NEXT: smin v1.4s, v3.4s, v1.4s
1364; CHECK-NEXT: cmge v0.4s, v2.4s, v0.4s
1365; CHECK-NEXT: bsl v0.16b, v4.16b, v1.16b
1366; CHECK-NEXT: ret
1367 %a = xor <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1>
1368 %b = xor <4 x i32> %y, <i32 -1, i32 -1, i32 -1, i32 -1>
1369 %c = xor <4 x i32> %z, <i32 -1, i32 -1, i32 -1, i32 -1>
1370 %cmp_bc = icmp slt <4 x i32> %b, %c
1371 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
1372 %cmp_ab = icmp slt <4 x i32> %a, %b
1373 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
1374 %cmp_ca = icmp sge <4 x i32> %z, %x
1375 %r = select <4 x i1> %cmp_ca, <4 x i32> %min_bc, <4 x i32> %min_ab
1376 ret <4 x i32> %r
1377}
1378
1379define <4 x i32> @notted_smin_bc_ba_eq_swap_pred(<4 x i32> %x, <4 x i32> %y, <4 x i32> %z) {
1380; CHECK-LABEL: notted_smin_bc_ba_eq_swap_pred:
1381; CHECK: // %bb.0:
1382; CHECK-NEXT: mvn v3.16b, v0.16b
1383; CHECK-NEXT: mvn v1.16b, v1.16b
1384; CHECK-NEXT: mvn v4.16b, v2.16b
1385; CHECK-NEXT: smin v4.4s, v1.4s, v4.4s
1386; CHECK-NEXT: smin v1.4s, v1.4s, v3.4s
1387; CHECK-NEXT: cmge v0.4s, v2.4s, v0.4s
1388; CHECK-NEXT: bsl v0.16b, v4.16b, v1.16b
1389; CHECK-NEXT: ret
1390 %a = xor <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1>
1391 %b = xor <4 x i32> %y, <i32 -1, i32 -1, i32 -1, i32 -1>
1392 %c = xor <4 x i32> %z, <i32 -1, i32 -1, i32 -1, i32 -1>
1393 %cmp_bc = icmp slt <4 x i32> %b, %c
1394 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
1395 %cmp_ba = icmp slt <4 x i32> %b, %a
1396 %min_ba = select <4 x i1> %cmp_ba, <4 x i32> %b, <4 x i32> %a
1397 %cmp_ca = icmp sge <4 x i32> %z, %x
1398 %r = select <4 x i1> %cmp_ca, <4 x i32> %min_bc, <4 x i32> %min_ba
1399 ret <4 x i32> %r
1400}
1401
1402define <4 x i32> @notted_smax_ab_bc(<4 x i32> %x, <4 x i32> %y, <4 x i32> %z) {
1403; CHECK-LABEL: notted_smax_ab_bc:
1404; CHECK: // %bb.0:
1405; CHECK-NEXT: mvn v3.16b, v0.16b
1406; CHECK-NEXT: mvn v1.16b, v1.16b
1407; CHECK-NEXT: mvn v4.16b, v2.16b
1408; CHECK-NEXT: smax v3.4s, v3.4s, v1.4s
1409; CHECK-NEXT: smax v1.4s, v1.4s, v4.4s
1410; CHECK-NEXT: cmgt v0.4s, v2.4s, v0.4s
1411; CHECK-NEXT: bsl v0.16b, v3.16b, v1.16b
1412; CHECK-NEXT: ret
1413 %a = xor <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1>
1414 %b = xor <4 x i32> %y, <i32 -1, i32 -1, i32 -1, i32 -1>
1415 %c = xor <4 x i32> %z, <i32 -1, i32 -1, i32 -1, i32 -1>
1416 %cmp_ab = icmp sgt <4 x i32> %a, %b
1417 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
1418 %cmp_bc = icmp sgt <4 x i32> %b, %c
1419 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
1420 %cmp_ac = icmp sgt <4 x i32> %z, %x
1421 %r = select <4 x i1> %cmp_ac, <4 x i32> %min_ab, <4 x i32> %min_bc
1422 ret <4 x i32> %r
1423}
1424
1425define <4 x i32> @notted_smax_ab_cb(<4 x i32> %x, <4 x i32> %y, <4 x i32> %z) {
1426; CHECK-LABEL: notted_smax_ab_cb:
1427; CHECK: // %bb.0:
1428; CHECK-NEXT: mvn v3.16b, v0.16b
1429; CHECK-NEXT: mvn v1.16b, v1.16b
1430; CHECK-NEXT: mvn v4.16b, v2.16b
1431; CHECK-NEXT: smax v3.4s, v3.4s, v1.4s
1432; CHECK-NEXT: smax v1.4s, v4.4s, v1.4s
1433; CHECK-NEXT: cmgt v0.4s, v2.4s, v0.4s
1434; CHECK-NEXT: bsl v0.16b, v3.16b, v1.16b
1435; CHECK-NEXT: ret
1436 %a = xor <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1>
1437 %b = xor <4 x i32> %y, <i32 -1, i32 -1, i32 -1, i32 -1>
1438 %c = xor <4 x i32> %z, <i32 -1, i32 -1, i32 -1, i32 -1>
1439 %cmp_ab = icmp sgt <4 x i32> %a, %b
1440 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
1441 %cmp_cb = icmp sgt <4 x i32> %c, %b
1442 %min_cb = select <4 x i1> %cmp_cb, <4 x i32> %c, <4 x i32> %b
1443 %cmp_ac = icmp sgt <4 x i32> %z, %x
1444 %r = select <4 x i1> %cmp_ac, <4 x i32> %min_ab, <4 x i32> %min_cb
1445 ret <4 x i32> %r
1446}
1447
1448define <4 x i32> @notted_smax_bc_ab(<4 x i32> %x, <4 x i32> %y, <4 x i32> %z) {
1449; CHECK-LABEL: notted_smax_bc_ab:
1450; CHECK: // %bb.0:
1451; CHECK-NEXT: mvn v3.16b, v0.16b
1452; CHECK-NEXT: mvn v1.16b, v1.16b
1453; CHECK-NEXT: mvn v4.16b, v2.16b
1454; CHECK-NEXT: smax v4.4s, v1.4s, v4.4s
1455; CHECK-NEXT: smax v1.4s, v3.4s, v1.4s
1456; CHECK-NEXT: cmgt v0.4s, v0.4s, v2.4s
1457; CHECK-NEXT: bsl v0.16b, v4.16b, v1.16b
1458; CHECK-NEXT: ret
1459 %a = xor <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1>
1460 %b = xor <4 x i32> %y, <i32 -1, i32 -1, i32 -1, i32 -1>
1461 %c = xor <4 x i32> %z, <i32 -1, i32 -1, i32 -1, i32 -1>
1462 %cmp_bc = icmp sgt <4 x i32> %b, %c
1463 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
1464 %cmp_ab = icmp sgt <4 x i32> %a, %b
1465 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
1466 %cmp_ca = icmp sgt <4 x i32> %x, %z
1467 %r = select <4 x i1> %cmp_ca, <4 x i32> %min_bc, <4 x i32> %min_ab
1468 ret <4 x i32> %r
1469}
1470
1471define <4 x i32> @notted_smax_bc_ba(<4 x i32> %x, <4 x i32> %y, <4 x i32> %z) {
1472; CHECK-LABEL: notted_smax_bc_ba:
1473; CHECK: // %bb.0:
1474; CHECK-NEXT: mvn v3.16b, v0.16b
1475; CHECK-NEXT: mvn v1.16b, v1.16b
1476; CHECK-NEXT: mvn v4.16b, v2.16b
1477; CHECK-NEXT: smax v4.4s, v1.4s, v4.4s
1478; CHECK-NEXT: smax v1.4s, v1.4s, v3.4s
1479; CHECK-NEXT: cmgt v0.4s, v0.4s, v2.4s
1480; CHECK-NEXT: bsl v0.16b, v4.16b, v1.16b
1481; CHECK-NEXT: ret
1482 %a = xor <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1>
1483 %b = xor <4 x i32> %y, <i32 -1, i32 -1, i32 -1, i32 -1>
1484 %c = xor <4 x i32> %z, <i32 -1, i32 -1, i32 -1, i32 -1>
1485 %cmp_bc = icmp sgt <4 x i32> %b, %c
1486 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
1487 %cmp_ba = icmp sgt <4 x i32> %b, %a
1488 %min_ba = select <4 x i1> %cmp_ba, <4 x i32> %b, <4 x i32> %a
1489 %cmp_ca = icmp sgt <4 x i32> %x, %z
1490 %r = select <4 x i1> %cmp_ca, <4 x i32> %min_bc, <4 x i32> %min_ba
1491 ret <4 x i32> %r
1492}
1493
1494define <4 x i32> @notted_smax_ab_bc_swap_pred(<4 x i32> %x, <4 x i32> %y, <4 x i32> %z) {
1495; CHECK-LABEL: notted_smax_ab_bc_swap_pred:
1496; CHECK: // %bb.0:
1497; CHECK-NEXT: mvn v3.16b, v0.16b
1498; CHECK-NEXT: mvn v1.16b, v1.16b
1499; CHECK-NEXT: mvn v4.16b, v2.16b
1500; CHECK-NEXT: smax v3.4s, v3.4s, v1.4s
1501; CHECK-NEXT: smax v1.4s, v1.4s, v4.4s
1502; CHECK-NEXT: cmgt v0.4s, v2.4s, v0.4s
1503; CHECK-NEXT: bsl v0.16b, v3.16b, v1.16b
1504; CHECK-NEXT: ret
1505 %a = xor <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1>
1506 %b = xor <4 x i32> %y, <i32 -1, i32 -1, i32 -1, i32 -1>
1507 %c = xor <4 x i32> %z, <i32 -1, i32 -1, i32 -1, i32 -1>
1508 %cmp_ab = icmp sgt <4 x i32> %a, %b
1509 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
1510 %cmp_bc = icmp sgt <4 x i32> %b, %c
1511 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
1512 %cmp_ac = icmp slt <4 x i32> %x, %z
1513 %r = select <4 x i1> %cmp_ac, <4 x i32> %min_ab, <4 x i32> %min_bc
1514 ret <4 x i32> %r
1515}
1516
1517define <4 x i32> @notted_smax_ab_cb_swap_pred(<4 x i32> %x, <4 x i32> %y, <4 x i32> %z) {
1518; CHECK-LABEL: notted_smax_ab_cb_swap_pred:
1519; CHECK: // %bb.0:
1520; CHECK-NEXT: mvn v3.16b, v0.16b
1521; CHECK-NEXT: mvn v1.16b, v1.16b
1522; CHECK-NEXT: mvn v4.16b, v2.16b
1523; CHECK-NEXT: smax v3.4s, v3.4s, v1.4s
1524; CHECK-NEXT: smax v1.4s, v4.4s, v1.4s
1525; CHECK-NEXT: cmgt v0.4s, v2.4s, v0.4s
1526; CHECK-NEXT: bsl v0.16b, v3.16b, v1.16b
1527; CHECK-NEXT: ret
1528 %a = xor <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1>
1529 %b = xor <4 x i32> %y, <i32 -1, i32 -1, i32 -1, i32 -1>
1530 %c = xor <4 x i32> %z, <i32 -1, i32 -1, i32 -1, i32 -1>
1531 %cmp_ab = icmp sgt <4 x i32> %a, %b
1532 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
1533 %cmp_cb = icmp sgt <4 x i32> %c, %b
1534 %min_cb = select <4 x i1> %cmp_cb, <4 x i32> %c, <4 x i32> %b
1535 %cmp_ac = icmp slt <4 x i32> %x, %z
1536 %r = select <4 x i1> %cmp_ac, <4 x i32> %min_ab, <4 x i32> %min_cb
1537 ret <4 x i32> %r
1538}
1539
1540define <4 x i32> @notted_smax_bc_ab_swap_pred(<4 x i32> %x, <4 x i32> %y, <4 x i32> %z) {
1541; CHECK-LABEL: notted_smax_bc_ab_swap_pred:
1542; CHECK: // %bb.0:
1543; CHECK-NEXT: mvn v3.16b, v0.16b
1544; CHECK-NEXT: mvn v1.16b, v1.16b
1545; CHECK-NEXT: mvn v4.16b, v2.16b
1546; CHECK-NEXT: smax v4.4s, v1.4s, v4.4s
1547; CHECK-NEXT: smax v1.4s, v3.4s, v1.4s
1548; CHECK-NEXT: cmgt v0.4s, v0.4s, v2.4s
1549; CHECK-NEXT: bsl v0.16b, v4.16b, v1.16b
1550; CHECK-NEXT: ret
1551 %a = xor <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1>
1552 %b = xor <4 x i32> %y, <i32 -1, i32 -1, i32 -1, i32 -1>
1553 %c = xor <4 x i32> %z, <i32 -1, i32 -1, i32 -1, i32 -1>
1554 %cmp_bc = icmp sgt <4 x i32> %b, %c
1555 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
1556 %cmp_ab = icmp sgt <4 x i32> %a, %b
1557 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
1558 %cmp_ca = icmp slt <4 x i32> %z, %x
1559 %r = select <4 x i1> %cmp_ca, <4 x i32> %min_bc, <4 x i32> %min_ab
1560 ret <4 x i32> %r
1561}
1562
1563define <4 x i32> @notted_smax_bc_ba_swap_pred(<4 x i32> %x, <4 x i32> %y, <4 x i32> %z) {
1564; CHECK-LABEL: notted_smax_bc_ba_swap_pred:
1565; CHECK: // %bb.0:
1566; CHECK-NEXT: mvn v3.16b, v0.16b
1567; CHECK-NEXT: mvn v1.16b, v1.16b
1568; CHECK-NEXT: mvn v4.16b, v2.16b
1569; CHECK-NEXT: smax v4.4s, v1.4s, v4.4s
1570; CHECK-NEXT: smax v1.4s, v1.4s, v3.4s
1571; CHECK-NEXT: cmgt v0.4s, v0.4s, v2.4s
1572; CHECK-NEXT: bsl v0.16b, v4.16b, v1.16b
1573; CHECK-NEXT: ret
1574 %a = xor <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1>
1575 %b = xor <4 x i32> %y, <i32 -1, i32 -1, i32 -1, i32 -1>
1576 %c = xor <4 x i32> %z, <i32 -1, i32 -1, i32 -1, i32 -1>
1577 %cmp_bc = icmp sgt <4 x i32> %b, %c
1578 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
1579 %cmp_ba = icmp sgt <4 x i32> %b, %a
1580 %min_ba = select <4 x i1> %cmp_ba, <4 x i32> %b, <4 x i32> %a
1581 %cmp_ca = icmp slt <4 x i32> %z, %x
1582 %r = select <4 x i1> %cmp_ca, <4 x i32> %min_bc, <4 x i32> %min_ba
1583 ret <4 x i32> %r
1584}
1585
1586define <4 x i32> @notted_smax_ab_bc_eq_pred(<4 x i32> %x, <4 x i32> %y, <4 x i32> %z) {
1587; CHECK-LABEL: notted_smax_ab_bc_eq_pred:
1588; CHECK: // %bb.0:
1589; CHECK-NEXT: mvn v3.16b, v0.16b
1590; CHECK-NEXT: mvn v1.16b, v1.16b
1591; CHECK-NEXT: mvn v4.16b, v2.16b
1592; CHECK-NEXT: smax v3.4s, v3.4s, v1.4s
1593; CHECK-NEXT: smax v1.4s, v1.4s, v4.4s
1594; CHECK-NEXT: cmge v0.4s, v2.4s, v0.4s
1595; CHECK-NEXT: bsl v0.16b, v3.16b, v1.16b
1596; CHECK-NEXT: ret
1597 %a = xor <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1>
1598 %b = xor <4 x i32> %y, <i32 -1, i32 -1, i32 -1, i32 -1>
1599 %c = xor <4 x i32> %z, <i32 -1, i32 -1, i32 -1, i32 -1>
1600 %cmp_ab = icmp sgt <4 x i32> %a, %b
1601 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
1602 %cmp_bc = icmp sgt <4 x i32> %b, %c
1603 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
1604 %cmp_ac = icmp sge <4 x i32> %z, %x
1605 %r = select <4 x i1> %cmp_ac, <4 x i32> %min_ab, <4 x i32> %min_bc
1606 ret <4 x i32> %r
1607}
1608
1609define <4 x i32> @notted_smax_ab_cb_eq_pred(<4 x i32> %x, <4 x i32> %y, <4 x i32> %z) {
1610; CHECK-LABEL: notted_smax_ab_cb_eq_pred:
1611; CHECK: // %bb.0:
1612; CHECK-NEXT: mvn v3.16b, v0.16b
1613; CHECK-NEXT: mvn v1.16b, v1.16b
1614; CHECK-NEXT: mvn v4.16b, v2.16b
1615; CHECK-NEXT: smax v3.4s, v3.4s, v1.4s
1616; CHECK-NEXT: smax v1.4s, v4.4s, v1.4s
1617; CHECK-NEXT: cmge v0.4s, v2.4s, v0.4s
1618; CHECK-NEXT: bsl v0.16b, v3.16b, v1.16b
1619; CHECK-NEXT: ret
1620 %a = xor <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1>
1621 %b = xor <4 x i32> %y, <i32 -1, i32 -1, i32 -1, i32 -1>
1622 %c = xor <4 x i32> %z, <i32 -1, i32 -1, i32 -1, i32 -1>
1623 %cmp_ab = icmp sgt <4 x i32> %a, %b
1624 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
1625 %cmp_cb = icmp sgt <4 x i32> %c, %b
1626 %min_cb = select <4 x i1> %cmp_cb, <4 x i32> %c, <4 x i32> %b
1627 %cmp_ac = icmp sge <4 x i32> %z, %x
1628 %r = select <4 x i1> %cmp_ac, <4 x i32> %min_ab, <4 x i32> %min_cb
1629 ret <4 x i32> %r
1630}
1631
1632define <4 x i32> @notted_smax_bc_ab_eq_pred(<4 x i32> %x, <4 x i32> %y, <4 x i32> %z) {
1633; CHECK-LABEL: notted_smax_bc_ab_eq_pred:
1634; CHECK: // %bb.0:
1635; CHECK-NEXT: mvn v3.16b, v0.16b
1636; CHECK-NEXT: mvn v1.16b, v1.16b
1637; CHECK-NEXT: mvn v4.16b, v2.16b
1638; CHECK-NEXT: smax v4.4s, v1.4s, v4.4s
1639; CHECK-NEXT: smax v1.4s, v3.4s, v1.4s
1640; CHECK-NEXT: cmge v0.4s, v0.4s, v2.4s
1641; CHECK-NEXT: bsl v0.16b, v4.16b, v1.16b
1642; CHECK-NEXT: ret
1643 %a = xor <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1>
1644 %b = xor <4 x i32> %y, <i32 -1, i32 -1, i32 -1, i32 -1>
1645 %c = xor <4 x i32> %z, <i32 -1, i32 -1, i32 -1, i32 -1>
1646 %cmp_bc = icmp sgt <4 x i32> %b, %c
1647 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
1648 %cmp_ab = icmp sgt <4 x i32> %a, %b
1649 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
1650 %cmp_ca = icmp sge <4 x i32> %x, %z
1651 %r = select <4 x i1> %cmp_ca, <4 x i32> %min_bc, <4 x i32> %min_ab
1652 ret <4 x i32> %r
1653}
1654
1655define <4 x i32> @notted_smax_bc_ba_eq_pred(<4 x i32> %x, <4 x i32> %y, <4 x i32> %z) {
1656; CHECK-LABEL: notted_smax_bc_ba_eq_pred:
1657; CHECK: // %bb.0:
1658; CHECK-NEXT: mvn v3.16b, v0.16b
1659; CHECK-NEXT: mvn v1.16b, v1.16b
1660; CHECK-NEXT: mvn v4.16b, v2.16b
1661; CHECK-NEXT: smax v4.4s, v1.4s, v4.4s
1662; CHECK-NEXT: smax v1.4s, v1.4s, v3.4s
1663; CHECK-NEXT: cmge v0.4s, v0.4s, v2.4s
1664; CHECK-NEXT: bsl v0.16b, v4.16b, v1.16b
1665; CHECK-NEXT: ret
1666 %a = xor <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1>
1667 %b = xor <4 x i32> %y, <i32 -1, i32 -1, i32 -1, i32 -1>
1668 %c = xor <4 x i32> %z, <i32 -1, i32 -1, i32 -1, i32 -1>
1669 %cmp_bc = icmp sgt <4 x i32> %b, %c
1670 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
1671 %cmp_ba = icmp sgt <4 x i32> %b, %a
1672 %min_ba = select <4 x i1> %cmp_ba, <4 x i32> %b, <4 x i32> %a
1673 %cmp_ca = icmp sge <4 x i32> %x, %z
1674 %r = select <4 x i1> %cmp_ca, <4 x i32> %min_bc, <4 x i32> %min_ba
1675 ret <4 x i32> %r
1676}
1677
1678define <4 x i32> @notted_smax_ab_bc_eq_swap_pred(<4 x i32> %x, <4 x i32> %y, <4 x i32> %z) {
1679; CHECK-LABEL: notted_smax_ab_bc_eq_swap_pred:
1680; CHECK: // %bb.0:
1681; CHECK-NEXT: mvn v3.16b, v0.16b
1682; CHECK-NEXT: mvn v1.16b, v1.16b
1683; CHECK-NEXT: mvn v4.16b, v2.16b
1684; CHECK-NEXT: smax v3.4s, v3.4s, v1.4s
1685; CHECK-NEXT: smax v1.4s, v1.4s, v4.4s
1686; CHECK-NEXT: cmge v0.4s, v2.4s, v0.4s
1687; CHECK-NEXT: bsl v0.16b, v3.16b, v1.16b
1688; CHECK-NEXT: ret
1689 %a = xor <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1>
1690 %b = xor <4 x i32> %y, <i32 -1, i32 -1, i32 -1, i32 -1>
1691 %c = xor <4 x i32> %z, <i32 -1, i32 -1, i32 -1, i32 -1>
1692 %cmp_ab = icmp sgt <4 x i32> %a, %b
1693 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
1694 %cmp_bc = icmp sgt <4 x i32> %b, %c
1695 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
1696 %cmp_ac = icmp sle <4 x i32> %x, %z
1697 %r = select <4 x i1> %cmp_ac, <4 x i32> %min_ab, <4 x i32> %min_bc
1698 ret <4 x i32> %r
1699}
1700
1701define <4 x i32> @notted_smax_ab_cb_eq_swap_pred(<4 x i32> %x, <4 x i32> %y, <4 x i32> %z) {
1702; CHECK-LABEL: notted_smax_ab_cb_eq_swap_pred:
1703; CHECK: // %bb.0:
1704; CHECK-NEXT: mvn v3.16b, v0.16b
1705; CHECK-NEXT: mvn v1.16b, v1.16b
1706; CHECK-NEXT: mvn v4.16b, v2.16b
1707; CHECK-NEXT: smax v3.4s, v3.4s, v1.4s
1708; CHECK-NEXT: smax v1.4s, v4.4s, v1.4s
1709; CHECK-NEXT: cmge v0.4s, v2.4s, v0.4s
1710; CHECK-NEXT: bsl v0.16b, v3.16b, v1.16b
1711; CHECK-NEXT: ret
1712 %a = xor <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1>
1713 %b = xor <4 x i32> %y, <i32 -1, i32 -1, i32 -1, i32 -1>
1714 %c = xor <4 x i32> %z, <i32 -1, i32 -1, i32 -1, i32 -1>
1715 %cmp_ab = icmp sgt <4 x i32> %a, %b
1716 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
1717 %cmp_cb = icmp sgt <4 x i32> %c, %b
1718 %min_cb = select <4 x i1> %cmp_cb, <4 x i32> %c, <4 x i32> %b
1719 %cmp_ac = icmp sle <4 x i32> %x, %z
1720 %r = select <4 x i1> %cmp_ac, <4 x i32> %min_ab, <4 x i32> %min_cb
1721 ret <4 x i32> %r
1722}
1723
1724define <4 x i32> @notted_smax_bc_ab_eq_swap_pred(<4 x i32> %x, <4 x i32> %y, <4 x i32> %z) {
1725; CHECK-LABEL: notted_smax_bc_ab_eq_swap_pred:
1726; CHECK: // %bb.0:
1727; CHECK-NEXT: mvn v3.16b, v0.16b
1728; CHECK-NEXT: mvn v1.16b, v1.16b
1729; CHECK-NEXT: mvn v4.16b, v2.16b
1730; CHECK-NEXT: smax v4.4s, v1.4s, v4.4s
1731; CHECK-NEXT: smax v1.4s, v3.4s, v1.4s
1732; CHECK-NEXT: cmge v0.4s, v0.4s, v2.4s
1733; CHECK-NEXT: bsl v0.16b, v4.16b, v1.16b
1734; CHECK-NEXT: ret
1735 %a = xor <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1>
1736 %b = xor <4 x i32> %y, <i32 -1, i32 -1, i32 -1, i32 -1>
1737 %c = xor <4 x i32> %z, <i32 -1, i32 -1, i32 -1, i32 -1>
1738 %cmp_bc = icmp sgt <4 x i32> %b, %c
1739 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
1740 %cmp_ab = icmp sgt <4 x i32> %a, %b
1741 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
1742 %cmp_ca = icmp sle <4 x i32> %z, %x
1743 %r = select <4 x i1> %cmp_ca, <4 x i32> %min_bc, <4 x i32> %min_ab
1744 ret <4 x i32> %r
1745}
1746
1747define <4 x i32> @notted_smax_bc_ba_eq_swap_pred(<4 x i32> %x, <4 x i32> %y, <4 x i32> %z) {
1748; CHECK-LABEL: notted_smax_bc_ba_eq_swap_pred:
1749; CHECK: // %bb.0:
1750; CHECK-NEXT: mvn v3.16b, v0.16b
1751; CHECK-NEXT: mvn v1.16b, v1.16b
1752; CHECK-NEXT: mvn v4.16b, v2.16b
1753; CHECK-NEXT: smax v4.4s, v1.4s, v4.4s
1754; CHECK-NEXT: smax v1.4s, v1.4s, v3.4s
1755; CHECK-NEXT: cmge v0.4s, v0.4s, v2.4s
1756; CHECK-NEXT: bsl v0.16b, v4.16b, v1.16b
1757; CHECK-NEXT: ret
1758 %a = xor <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1>
1759 %b = xor <4 x i32> %y, <i32 -1, i32 -1, i32 -1, i32 -1>
1760 %c = xor <4 x i32> %z, <i32 -1, i32 -1, i32 -1, i32 -1>
1761 %cmp_bc = icmp sgt <4 x i32> %b, %c
1762 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
1763 %cmp_ba = icmp sgt <4 x i32> %b, %a
1764 %min_ba = select <4 x i1> %cmp_ba, <4 x i32> %b, <4 x i32> %a
1765 %cmp_ca = icmp sle <4 x i32> %z, %x
1766 %r = select <4 x i1> %cmp_ca, <4 x i32> %min_bc, <4 x i32> %min_ba
1767 ret <4 x i32> %r
1768}
1769
1770define <4 x i32> @notted_umin_ab_bc(<4 x i32> %x, <4 x i32> %y, <4 x i32> %z) {
1771; CHECK-LABEL: notted_umin_ab_bc:
1772; CHECK: // %bb.0:
1773; CHECK-NEXT: mvn v3.16b, v0.16b
1774; CHECK-NEXT: mvn v1.16b, v1.16b
1775; CHECK-NEXT: mvn v4.16b, v2.16b
1776; CHECK-NEXT: umin v3.4s, v3.4s, v1.4s
1777; CHECK-NEXT: umin v1.4s, v1.4s, v4.4s
1778; CHECK-NEXT: cmhi v0.4s, v0.4s, v2.4s
1779; CHECK-NEXT: bsl v0.16b, v3.16b, v1.16b
1780; CHECK-NEXT: ret
1781 %a = xor <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1>
1782 %b = xor <4 x i32> %y, <i32 -1, i32 -1, i32 -1, i32 -1>
1783 %c = xor <4 x i32> %z, <i32 -1, i32 -1, i32 -1, i32 -1>
1784 %cmp_ab = icmp ult <4 x i32> %a, %b
1785 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
1786 %cmp_bc = icmp ult <4 x i32> %b, %c
1787 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
1788 %cmp_ac = icmp ult <4 x i32> %z, %x
1789 %r = select <4 x i1> %cmp_ac, <4 x i32> %min_ab, <4 x i32> %min_bc
1790 ret <4 x i32> %r
1791}
1792
1793define <4 x i32> @notted_umin_ab_cb(<4 x i32> %x, <4 x i32> %y, <4 x i32> %z) {
1794; CHECK-LABEL: notted_umin_ab_cb:
1795; CHECK: // %bb.0:
1796; CHECK-NEXT: mvn v3.16b, v0.16b
1797; CHECK-NEXT: mvn v1.16b, v1.16b
1798; CHECK-NEXT: mvn v4.16b, v2.16b
1799; CHECK-NEXT: umin v3.4s, v3.4s, v1.4s
1800; CHECK-NEXT: umin v1.4s, v4.4s, v1.4s
1801; CHECK-NEXT: cmhi v0.4s, v0.4s, v2.4s
1802; CHECK-NEXT: bsl v0.16b, v3.16b, v1.16b
1803; CHECK-NEXT: ret
1804 %a = xor <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1>
1805 %b = xor <4 x i32> %y, <i32 -1, i32 -1, i32 -1, i32 -1>
1806 %c = xor <4 x i32> %z, <i32 -1, i32 -1, i32 -1, i32 -1>
1807 %cmp_ab = icmp ult <4 x i32> %a, %b
1808 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
1809 %cmp_cb = icmp ult <4 x i32> %c, %b
1810 %min_cb = select <4 x i1> %cmp_cb, <4 x i32> %c, <4 x i32> %b
1811 %cmp_ac = icmp ult <4 x i32> %z, %x
1812 %r = select <4 x i1> %cmp_ac, <4 x i32> %min_ab, <4 x i32> %min_cb
1813 ret <4 x i32> %r
1814}
1815
1816define <4 x i32> @notted_umin_bc_ab(<4 x i32> %x, <4 x i32> %y, <4 x i32> %z) {
1817; CHECK-LABEL: notted_umin_bc_ab:
1818; CHECK: // %bb.0:
1819; CHECK-NEXT: mvn v3.16b, v0.16b
1820; CHECK-NEXT: mvn v1.16b, v1.16b
1821; CHECK-NEXT: mvn v4.16b, v2.16b
1822; CHECK-NEXT: umin v4.4s, v1.4s, v4.4s
1823; CHECK-NEXT: umin v1.4s, v3.4s, v1.4s
1824; CHECK-NEXT: cmhi v0.4s, v2.4s, v0.4s
1825; CHECK-NEXT: bsl v0.16b, v4.16b, v1.16b
1826; CHECK-NEXT: ret
1827 %a = xor <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1>
1828 %b = xor <4 x i32> %y, <i32 -1, i32 -1, i32 -1, i32 -1>
1829 %c = xor <4 x i32> %z, <i32 -1, i32 -1, i32 -1, i32 -1>
1830 %cmp_bc = icmp ult <4 x i32> %b, %c
1831 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
1832 %cmp_ab = icmp ult <4 x i32> %a, %b
1833 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
1834 %cmp_ca = icmp ult <4 x i32> %x, %z
1835 %r = select <4 x i1> %cmp_ca, <4 x i32> %min_bc, <4 x i32> %min_ab
1836 ret <4 x i32> %r
1837}
1838
1839define <4 x i32> @notted_umin_bc_ba(<4 x i32> %x, <4 x i32> %y, <4 x i32> %z) {
1840; CHECK-LABEL: notted_umin_bc_ba:
1841; CHECK: // %bb.0:
1842; CHECK-NEXT: mvn v3.16b, v0.16b
1843; CHECK-NEXT: mvn v1.16b, v1.16b
1844; CHECK-NEXT: mvn v4.16b, v2.16b
1845; CHECK-NEXT: umin v4.4s, v1.4s, v4.4s
1846; CHECK-NEXT: umin v1.4s, v1.4s, v3.4s
1847; CHECK-NEXT: cmhi v0.4s, v2.4s, v0.4s
1848; CHECK-NEXT: bsl v0.16b, v4.16b, v1.16b
1849; CHECK-NEXT: ret
1850 %a = xor <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1>
1851 %b = xor <4 x i32> %y, <i32 -1, i32 -1, i32 -1, i32 -1>
1852 %c = xor <4 x i32> %z, <i32 -1, i32 -1, i32 -1, i32 -1>
1853 %cmp_bc = icmp ult <4 x i32> %b, %c
1854 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
1855 %cmp_ba = icmp ult <4 x i32> %b, %a
1856 %min_ba = select <4 x i1> %cmp_ba, <4 x i32> %b, <4 x i32> %a
1857 %cmp_ca = icmp ult <4 x i32> %x, %z
1858 %r = select <4 x i1> %cmp_ca, <4 x i32> %min_bc, <4 x i32> %min_ba
1859 ret <4 x i32> %r
1860}
1861
1862define <4 x i32> @notted_umin_ab_bc_swap_pred(<4 x i32> %x, <4 x i32> %y, <4 x i32> %z) {
1863; CHECK-LABEL: notted_umin_ab_bc_swap_pred:
1864; CHECK: // %bb.0:
1865; CHECK-NEXT: mvn v3.16b, v0.16b
1866; CHECK-NEXT: mvn v1.16b, v1.16b
1867; CHECK-NEXT: mvn v4.16b, v2.16b
1868; CHECK-NEXT: umin v3.4s, v3.4s, v1.4s
1869; CHECK-NEXT: umin v1.4s, v1.4s, v4.4s
1870; CHECK-NEXT: cmhi v0.4s, v0.4s, v2.4s
1871; CHECK-NEXT: bsl v0.16b, v3.16b, v1.16b
1872; CHECK-NEXT: ret
1873 %a = xor <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1>
1874 %b = xor <4 x i32> %y, <i32 -1, i32 -1, i32 -1, i32 -1>
1875 %c = xor <4 x i32> %z, <i32 -1, i32 -1, i32 -1, i32 -1>
1876 %cmp_ab = icmp ult <4 x i32> %a, %b
1877 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
1878 %cmp_bc = icmp ult <4 x i32> %b, %c
1879 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
1880 %cmp_ac = icmp ugt <4 x i32> %x, %z
1881 %r = select <4 x i1> %cmp_ac, <4 x i32> %min_ab, <4 x i32> %min_bc
1882 ret <4 x i32> %r
1883}
1884
1885define <4 x i32> @notted_umin_ab_cb_swap_pred(<4 x i32> %x, <4 x i32> %y, <4 x i32> %z) {
1886; CHECK-LABEL: notted_umin_ab_cb_swap_pred:
1887; CHECK: // %bb.0:
1888; CHECK-NEXT: mvn v3.16b, v0.16b
1889; CHECK-NEXT: mvn v1.16b, v1.16b
1890; CHECK-NEXT: mvn v4.16b, v2.16b
1891; CHECK-NEXT: umin v3.4s, v3.4s, v1.4s
1892; CHECK-NEXT: umin v1.4s, v4.4s, v1.4s
1893; CHECK-NEXT: cmhi v0.4s, v0.4s, v2.4s
1894; CHECK-NEXT: bsl v0.16b, v3.16b, v1.16b
1895; CHECK-NEXT: ret
1896 %a = xor <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1>
1897 %b = xor <4 x i32> %y, <i32 -1, i32 -1, i32 -1, i32 -1>
1898 %c = xor <4 x i32> %z, <i32 -1, i32 -1, i32 -1, i32 -1>
1899 %cmp_ab = icmp ult <4 x i32> %a, %b
1900 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
1901 %cmp_cb = icmp ult <4 x i32> %c, %b
1902 %min_cb = select <4 x i1> %cmp_cb, <4 x i32> %c, <4 x i32> %b
1903 %cmp_ac = icmp ugt <4 x i32> %x, %z
1904 %r = select <4 x i1> %cmp_ac, <4 x i32> %min_ab, <4 x i32> %min_cb
1905 ret <4 x i32> %r
1906}
1907
1908define <4 x i32> @notted_umin_bc_ab_swap_pred(<4 x i32> %x, <4 x i32> %y, <4 x i32> %z) {
1909; CHECK-LABEL: notted_umin_bc_ab_swap_pred:
1910; CHECK: // %bb.0:
1911; CHECK-NEXT: mvn v3.16b, v0.16b
1912; CHECK-NEXT: mvn v1.16b, v1.16b
1913; CHECK-NEXT: mvn v4.16b, v2.16b
1914; CHECK-NEXT: umin v4.4s, v1.4s, v4.4s
1915; CHECK-NEXT: umin v1.4s, v3.4s, v1.4s
1916; CHECK-NEXT: cmhi v0.4s, v2.4s, v0.4s
1917; CHECK-NEXT: bsl v0.16b, v4.16b, v1.16b
1918; CHECK-NEXT: ret
1919 %a = xor <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1>
1920 %b = xor <4 x i32> %y, <i32 -1, i32 -1, i32 -1, i32 -1>
1921 %c = xor <4 x i32> %z, <i32 -1, i32 -1, i32 -1, i32 -1>
1922 %cmp_bc = icmp ult <4 x i32> %b, %c
1923 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
1924 %cmp_ab = icmp ult <4 x i32> %a, %b
1925 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
1926 %cmp_ca = icmp ugt <4 x i32> %z, %x
1927 %r = select <4 x i1> %cmp_ca, <4 x i32> %min_bc, <4 x i32> %min_ab
1928 ret <4 x i32> %r
1929}
1930
1931define <4 x i32> @notted_umin_bc_ba_swap_pred(<4 x i32> %x, <4 x i32> %y, <4 x i32> %z) {
1932; CHECK-LABEL: notted_umin_bc_ba_swap_pred:
1933; CHECK: // %bb.0:
1934; CHECK-NEXT: mvn v3.16b, v0.16b
1935; CHECK-NEXT: mvn v1.16b, v1.16b
1936; CHECK-NEXT: mvn v4.16b, v2.16b
1937; CHECK-NEXT: umin v4.4s, v1.4s, v4.4s
1938; CHECK-NEXT: umin v1.4s, v1.4s, v3.4s
1939; CHECK-NEXT: cmhi v0.4s, v2.4s, v0.4s
1940; CHECK-NEXT: bsl v0.16b, v4.16b, v1.16b
1941; CHECK-NEXT: ret
1942 %a = xor <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1>
1943 %b = xor <4 x i32> %y, <i32 -1, i32 -1, i32 -1, i32 -1>
1944 %c = xor <4 x i32> %z, <i32 -1, i32 -1, i32 -1, i32 -1>
1945 %cmp_bc = icmp ult <4 x i32> %b, %c
1946 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
1947 %cmp_ba = icmp ult <4 x i32> %b, %a
1948 %min_ba = select <4 x i1> %cmp_ba, <4 x i32> %b, <4 x i32> %a
1949 %cmp_ca = icmp ugt <4 x i32> %z, %x
1950 %r = select <4 x i1> %cmp_ca, <4 x i32> %min_bc, <4 x i32> %min_ba
1951 ret <4 x i32> %r
1952}
1953
1954define <4 x i32> @notted_umin_ab_bc_eq_pred(<4 x i32> %x, <4 x i32> %y, <4 x i32> %z) {
1955; CHECK-LABEL: notted_umin_ab_bc_eq_pred:
1956; CHECK: // %bb.0:
1957; CHECK-NEXT: mvn v3.16b, v0.16b
1958; CHECK-NEXT: mvn v1.16b, v1.16b
1959; CHECK-NEXT: mvn v4.16b, v2.16b
1960; CHECK-NEXT: umin v3.4s, v3.4s, v1.4s
1961; CHECK-NEXT: umin v1.4s, v1.4s, v4.4s
1962; CHECK-NEXT: cmhs v0.4s, v0.4s, v2.4s
1963; CHECK-NEXT: bsl v0.16b, v3.16b, v1.16b
1964; CHECK-NEXT: ret
1965 %a = xor <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1>
1966 %b = xor <4 x i32> %y, <i32 -1, i32 -1, i32 -1, i32 -1>
1967 %c = xor <4 x i32> %z, <i32 -1, i32 -1, i32 -1, i32 -1>
1968 %cmp_ab = icmp ult <4 x i32> %a, %b
1969 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
1970 %cmp_bc = icmp ult <4 x i32> %b, %c
1971 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
1972 %cmp_ac = icmp ule <4 x i32> %z, %x
1973 %r = select <4 x i1> %cmp_ac, <4 x i32> %min_ab, <4 x i32> %min_bc
1974 ret <4 x i32> %r
1975}
1976
1977define <4 x i32> @notted_umin_ab_cb_eq_pred(<4 x i32> %x, <4 x i32> %y, <4 x i32> %z) {
1978; CHECK-LABEL: notted_umin_ab_cb_eq_pred:
1979; CHECK: // %bb.0:
1980; CHECK-NEXT: mvn v3.16b, v0.16b
1981; CHECK-NEXT: mvn v1.16b, v1.16b
1982; CHECK-NEXT: mvn v4.16b, v2.16b
1983; CHECK-NEXT: umin v3.4s, v3.4s, v1.4s
1984; CHECK-NEXT: umin v1.4s, v4.4s, v1.4s
1985; CHECK-NEXT: cmhs v0.4s, v0.4s, v2.4s
1986; CHECK-NEXT: bsl v0.16b, v3.16b, v1.16b
1987; CHECK-NEXT: ret
1988 %a = xor <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1>
1989 %b = xor <4 x i32> %y, <i32 -1, i32 -1, i32 -1, i32 -1>
1990 %c = xor <4 x i32> %z, <i32 -1, i32 -1, i32 -1, i32 -1>
1991 %cmp_ab = icmp ult <4 x i32> %a, %b
1992 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
1993 %cmp_cb = icmp ult <4 x i32> %c, %b
1994 %min_cb = select <4 x i1> %cmp_cb, <4 x i32> %c, <4 x i32> %b
1995 %cmp_ac = icmp ule <4 x i32> %z, %x
1996 %r = select <4 x i1> %cmp_ac, <4 x i32> %min_ab, <4 x i32> %min_cb
1997 ret <4 x i32> %r
1998}
1999
2000define <4 x i32> @notted_umin_bc_ab_eq_pred(<4 x i32> %x, <4 x i32> %y, <4 x i32> %z) {
2001; CHECK-LABEL: notted_umin_bc_ab_eq_pred:
2002; CHECK: // %bb.0:
2003; CHECK-NEXT: mvn v3.16b, v0.16b
2004; CHECK-NEXT: mvn v1.16b, v1.16b
2005; CHECK-NEXT: mvn v4.16b, v2.16b
2006; CHECK-NEXT: umin v4.4s, v1.4s, v4.4s
2007; CHECK-NEXT: umin v1.4s, v3.4s, v1.4s
2008; CHECK-NEXT: cmhs v0.4s, v2.4s, v0.4s
2009; CHECK-NEXT: bsl v0.16b, v4.16b, v1.16b
2010; CHECK-NEXT: ret
2011 %a = xor <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1>
2012 %b = xor <4 x i32> %y, <i32 -1, i32 -1, i32 -1, i32 -1>
2013 %c = xor <4 x i32> %z, <i32 -1, i32 -1, i32 -1, i32 -1>
2014 %cmp_bc = icmp ult <4 x i32> %b, %c
2015 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
2016 %cmp_ab = icmp ult <4 x i32> %a, %b
2017 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
2018 %cmp_ca = icmp ule <4 x i32> %x, %z
2019 %r = select <4 x i1> %cmp_ca, <4 x i32> %min_bc, <4 x i32> %min_ab
2020 ret <4 x i32> %r
2021}
2022
2023define <4 x i32> @notted_umin_bc_ba_eq_pred(<4 x i32> %x, <4 x i32> %y, <4 x i32> %z) {
2024; CHECK-LABEL: notted_umin_bc_ba_eq_pred:
2025; CHECK: // %bb.0:
2026; CHECK-NEXT: mvn v3.16b, v0.16b
2027; CHECK-NEXT: mvn v1.16b, v1.16b
2028; CHECK-NEXT: mvn v4.16b, v2.16b
2029; CHECK-NEXT: umin v4.4s, v1.4s, v4.4s
2030; CHECK-NEXT: umin v1.4s, v1.4s, v3.4s
2031; CHECK-NEXT: cmhs v0.4s, v2.4s, v0.4s
2032; CHECK-NEXT: bsl v0.16b, v4.16b, v1.16b
2033; CHECK-NEXT: ret
2034 %a = xor <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1>
2035 %b = xor <4 x i32> %y, <i32 -1, i32 -1, i32 -1, i32 -1>
2036 %c = xor <4 x i32> %z, <i32 -1, i32 -1, i32 -1, i32 -1>
2037 %cmp_bc = icmp ult <4 x i32> %b, %c
2038 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
2039 %cmp_ba = icmp ult <4 x i32> %b, %a
2040 %min_ba = select <4 x i1> %cmp_ba, <4 x i32> %b, <4 x i32> %a
2041 %cmp_ca = icmp ule <4 x i32> %x, %z
2042 %r = select <4 x i1> %cmp_ca, <4 x i32> %min_bc, <4 x i32> %min_ba
2043 ret <4 x i32> %r
2044}
2045
2046define <4 x i32> @notted_umin_ab_bc_eq_swap_pred(<4 x i32> %x, <4 x i32> %y, <4 x i32> %z) {
2047; CHECK-LABEL: notted_umin_ab_bc_eq_swap_pred:
2048; CHECK: // %bb.0:
2049; CHECK-NEXT: mvn v3.16b, v0.16b
2050; CHECK-NEXT: mvn v1.16b, v1.16b
2051; CHECK-NEXT: mvn v4.16b, v2.16b
2052; CHECK-NEXT: umin v3.4s, v3.4s, v1.4s
2053; CHECK-NEXT: umin v1.4s, v1.4s, v4.4s
2054; CHECK-NEXT: cmhs v0.4s, v0.4s, v2.4s
2055; CHECK-NEXT: bsl v0.16b, v3.16b, v1.16b
2056; CHECK-NEXT: ret
2057 %a = xor <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1>
2058 %b = xor <4 x i32> %y, <i32 -1, i32 -1, i32 -1, i32 -1>
2059 %c = xor <4 x i32> %z, <i32 -1, i32 -1, i32 -1, i32 -1>
2060 %cmp_ab = icmp ult <4 x i32> %a, %b
2061 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
2062 %cmp_bc = icmp ult <4 x i32> %b, %c
2063 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
2064 %cmp_ac = icmp uge <4 x i32> %x, %z
2065 %r = select <4 x i1> %cmp_ac, <4 x i32> %min_ab, <4 x i32> %min_bc
2066 ret <4 x i32> %r
2067}
2068
2069define <4 x i32> @notted_umin_ab_cb_eq_swap_pred(<4 x i32> %x, <4 x i32> %y, <4 x i32> %z) {
2070; CHECK-LABEL: notted_umin_ab_cb_eq_swap_pred:
2071; CHECK: // %bb.0:
2072; CHECK-NEXT: mvn v3.16b, v0.16b
2073; CHECK-NEXT: mvn v1.16b, v1.16b
2074; CHECK-NEXT: mvn v4.16b, v2.16b
2075; CHECK-NEXT: umin v3.4s, v3.4s, v1.4s
2076; CHECK-NEXT: umin v1.4s, v4.4s, v1.4s
2077; CHECK-NEXT: cmhs v0.4s, v0.4s, v2.4s
2078; CHECK-NEXT: bsl v0.16b, v3.16b, v1.16b
2079; CHECK-NEXT: ret
2080 %a = xor <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1>
2081 %b = xor <4 x i32> %y, <i32 -1, i32 -1, i32 -1, i32 -1>
2082 %c = xor <4 x i32> %z, <i32 -1, i32 -1, i32 -1, i32 -1>
2083 %cmp_ab = icmp ult <4 x i32> %a, %b
2084 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
2085 %cmp_cb = icmp ult <4 x i32> %c, %b
2086 %min_cb = select <4 x i1> %cmp_cb, <4 x i32> %c, <4 x i32> %b
2087 %cmp_ac = icmp uge <4 x i32> %x, %z
2088 %r = select <4 x i1> %cmp_ac, <4 x i32> %min_ab, <4 x i32> %min_cb
2089 ret <4 x i32> %r
2090}
2091
2092define <4 x i32> @notted_umin_bc_ab_eq_swap_pred(<4 x i32> %x, <4 x i32> %y, <4 x i32> %z) {
2093; CHECK-LABEL: notted_umin_bc_ab_eq_swap_pred:
2094; CHECK: // %bb.0:
2095; CHECK-NEXT: mvn v3.16b, v0.16b
2096; CHECK-NEXT: mvn v1.16b, v1.16b
2097; CHECK-NEXT: mvn v4.16b, v2.16b
2098; CHECK-NEXT: umin v4.4s, v1.4s, v4.4s
2099; CHECK-NEXT: umin v1.4s, v3.4s, v1.4s
2100; CHECK-NEXT: cmhs v0.4s, v2.4s, v0.4s
2101; CHECK-NEXT: bsl v0.16b, v4.16b, v1.16b
2102; CHECK-NEXT: ret
2103 %a = xor <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1>
2104 %b = xor <4 x i32> %y, <i32 -1, i32 -1, i32 -1, i32 -1>
2105 %c = xor <4 x i32> %z, <i32 -1, i32 -1, i32 -1, i32 -1>
2106 %cmp_bc = icmp ult <4 x i32> %b, %c
2107 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
2108 %cmp_ab = icmp ult <4 x i32> %a, %b
2109 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
2110 %cmp_ca = icmp uge <4 x i32> %z, %x
2111 %r = select <4 x i1> %cmp_ca, <4 x i32> %min_bc, <4 x i32> %min_ab
2112 ret <4 x i32> %r
2113}
2114
2115define <4 x i32> @notted_umin_bc_ba_eq_swap_pred(<4 x i32> %x, <4 x i32> %y, <4 x i32> %z) {
2116; CHECK-LABEL: notted_umin_bc_ba_eq_swap_pred:
2117; CHECK: // %bb.0:
2118; CHECK-NEXT: mvn v3.16b, v0.16b
2119; CHECK-NEXT: mvn v1.16b, v1.16b
2120; CHECK-NEXT: mvn v4.16b, v2.16b
2121; CHECK-NEXT: umin v4.4s, v1.4s, v4.4s
2122; CHECK-NEXT: umin v1.4s, v1.4s, v3.4s
2123; CHECK-NEXT: cmhs v0.4s, v2.4s, v0.4s
2124; CHECK-NEXT: bsl v0.16b, v4.16b, v1.16b
2125; CHECK-NEXT: ret
2126 %a = xor <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1>
2127 %b = xor <4 x i32> %y, <i32 -1, i32 -1, i32 -1, i32 -1>
2128 %c = xor <4 x i32> %z, <i32 -1, i32 -1, i32 -1, i32 -1>
2129 %cmp_bc = icmp ult <4 x i32> %b, %c
2130 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
2131 %cmp_ba = icmp ult <4 x i32> %b, %a
2132 %min_ba = select <4 x i1> %cmp_ba, <4 x i32> %b, <4 x i32> %a
2133 %cmp_ca = icmp uge <4 x i32> %z, %x
2134 %r = select <4 x i1> %cmp_ca, <4 x i32> %min_bc, <4 x i32> %min_ba
2135 ret <4 x i32> %r
2136}
2137
2138define <4 x i32> @notted_umax_ab_bc(<4 x i32> %x, <4 x i32> %y, <4 x i32> %z) {
2139; CHECK-LABEL: notted_umax_ab_bc:
2140; CHECK: // %bb.0:
2141; CHECK-NEXT: mvn v3.16b, v0.16b
2142; CHECK-NEXT: mvn v1.16b, v1.16b
2143; CHECK-NEXT: mvn v4.16b, v2.16b
2144; CHECK-NEXT: umax v3.4s, v3.4s, v1.4s
2145; CHECK-NEXT: umax v1.4s, v1.4s, v4.4s
2146; CHECK-NEXT: cmhi v0.4s, v2.4s, v0.4s
2147; CHECK-NEXT: bsl v0.16b, v3.16b, v1.16b
2148; CHECK-NEXT: ret
2149 %a = xor <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1>
2150 %b = xor <4 x i32> %y, <i32 -1, i32 -1, i32 -1, i32 -1>
2151 %c = xor <4 x i32> %z, <i32 -1, i32 -1, i32 -1, i32 -1>
2152 %cmp_ab = icmp ugt <4 x i32> %a, %b
2153 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
2154 %cmp_bc = icmp ugt <4 x i32> %b, %c
2155 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
2156 %cmp_ac = icmp ugt <4 x i32> %z, %x
2157 %r = select <4 x i1> %cmp_ac, <4 x i32> %min_ab, <4 x i32> %min_bc
2158 ret <4 x i32> %r
2159}
2160
2161define <4 x i32> @notted_umax_ab_cb(<4 x i32> %x, <4 x i32> %y, <4 x i32> %z) {
2162; CHECK-LABEL: notted_umax_ab_cb:
2163; CHECK: // %bb.0:
2164; CHECK-NEXT: mvn v3.16b, v0.16b
2165; CHECK-NEXT: mvn v1.16b, v1.16b
2166; CHECK-NEXT: mvn v4.16b, v2.16b
2167; CHECK-NEXT: umax v3.4s, v3.4s, v1.4s
2168; CHECK-NEXT: umax v1.4s, v4.4s, v1.4s
2169; CHECK-NEXT: cmhi v0.4s, v2.4s, v0.4s
2170; CHECK-NEXT: bsl v0.16b, v3.16b, v1.16b
2171; CHECK-NEXT: ret
2172 %a = xor <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1>
2173 %b = xor <4 x i32> %y, <i32 -1, i32 -1, i32 -1, i32 -1>
2174 %c = xor <4 x i32> %z, <i32 -1, i32 -1, i32 -1, i32 -1>
2175 %cmp_ab = icmp ugt <4 x i32> %a, %b
2176 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
2177 %cmp_cb = icmp ugt <4 x i32> %c, %b
2178 %min_cb = select <4 x i1> %cmp_cb, <4 x i32> %c, <4 x i32> %b
2179 %cmp_ac = icmp ugt <4 x i32> %z, %x
2180 %r = select <4 x i1> %cmp_ac, <4 x i32> %min_ab, <4 x i32> %min_cb
2181 ret <4 x i32> %r
2182}
2183
2184define <4 x i32> @notted_umax_bc_ab(<4 x i32> %x, <4 x i32> %y, <4 x i32> %z) {
2185; CHECK-LABEL: notted_umax_bc_ab:
2186; CHECK: // %bb.0:
2187; CHECK-NEXT: mvn v3.16b, v0.16b
2188; CHECK-NEXT: mvn v1.16b, v1.16b
2189; CHECK-NEXT: mvn v4.16b, v2.16b
2190; CHECK-NEXT: umax v4.4s, v1.4s, v4.4s
2191; CHECK-NEXT: umax v1.4s, v3.4s, v1.4s
2192; CHECK-NEXT: cmhi v0.4s, v0.4s, v2.4s
2193; CHECK-NEXT: bsl v0.16b, v4.16b, v1.16b
2194; CHECK-NEXT: ret
2195 %a = xor <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1>
2196 %b = xor <4 x i32> %y, <i32 -1, i32 -1, i32 -1, i32 -1>
2197 %c = xor <4 x i32> %z, <i32 -1, i32 -1, i32 -1, i32 -1>
2198 %cmp_bc = icmp ugt <4 x i32> %b, %c
2199 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
2200 %cmp_ab = icmp ugt <4 x i32> %a, %b
2201 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
2202 %cmp_ca = icmp ugt <4 x i32> %x, %z
2203 %r = select <4 x i1> %cmp_ca, <4 x i32> %min_bc, <4 x i32> %min_ab
2204 ret <4 x i32> %r
2205}
2206
2207define <4 x i32> @notted_umax_bc_ba(<4 x i32> %x, <4 x i32> %y, <4 x i32> %z) {
2208; CHECK-LABEL: notted_umax_bc_ba:
2209; CHECK: // %bb.0:
2210; CHECK-NEXT: mvn v3.16b, v0.16b
2211; CHECK-NEXT: mvn v1.16b, v1.16b
2212; CHECK-NEXT: mvn v4.16b, v2.16b
2213; CHECK-NEXT: umax v4.4s, v1.4s, v4.4s
2214; CHECK-NEXT: umax v1.4s, v1.4s, v3.4s
2215; CHECK-NEXT: cmhi v0.4s, v0.4s, v2.4s
2216; CHECK-NEXT: bsl v0.16b, v4.16b, v1.16b
2217; CHECK-NEXT: ret
2218 %a = xor <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1>
2219 %b = xor <4 x i32> %y, <i32 -1, i32 -1, i32 -1, i32 -1>
2220 %c = xor <4 x i32> %z, <i32 -1, i32 -1, i32 -1, i32 -1>
2221 %cmp_bc = icmp ugt <4 x i32> %b, %c
2222 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
2223 %cmp_ba = icmp ugt <4 x i32> %b, %a
2224 %min_ba = select <4 x i1> %cmp_ba, <4 x i32> %b, <4 x i32> %a
2225 %cmp_ca = icmp ugt <4 x i32> %x, %z
2226 %r = select <4 x i1> %cmp_ca, <4 x i32> %min_bc, <4 x i32> %min_ba
2227 ret <4 x i32> %r
2228}
2229
2230define <4 x i32> @notted_umax_ab_bc_swap_pred(<4 x i32> %x, <4 x i32> %y, <4 x i32> %z) {
2231; CHECK-LABEL: notted_umax_ab_bc_swap_pred:
2232; CHECK: // %bb.0:
2233; CHECK-NEXT: mvn v3.16b, v0.16b
2234; CHECK-NEXT: mvn v1.16b, v1.16b
2235; CHECK-NEXT: mvn v4.16b, v2.16b
2236; CHECK-NEXT: umax v3.4s, v3.4s, v1.4s
2237; CHECK-NEXT: umax v1.4s, v1.4s, v4.4s
2238; CHECK-NEXT: cmhi v0.4s, v2.4s, v0.4s
2239; CHECK-NEXT: bsl v0.16b, v3.16b, v1.16b
2240; CHECK-NEXT: ret
2241 %a = xor <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1>
2242 %b = xor <4 x i32> %y, <i32 -1, i32 -1, i32 -1, i32 -1>
2243 %c = xor <4 x i32> %z, <i32 -1, i32 -1, i32 -1, i32 -1>
2244 %cmp_ab = icmp ugt <4 x i32> %a, %b
2245 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
2246 %cmp_bc = icmp ugt <4 x i32> %b, %c
2247 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
2248 %cmp_ac = icmp ult <4 x i32> %x, %z
2249 %r = select <4 x i1> %cmp_ac, <4 x i32> %min_ab, <4 x i32> %min_bc
2250 ret <4 x i32> %r
2251}
2252
2253define <4 x i32> @notted_umax_ab_cb_swap_pred(<4 x i32> %x, <4 x i32> %y, <4 x i32> %z) {
2254; CHECK-LABEL: notted_umax_ab_cb_swap_pred:
2255; CHECK: // %bb.0:
2256; CHECK-NEXT: mvn v3.16b, v0.16b
2257; CHECK-NEXT: mvn v1.16b, v1.16b
2258; CHECK-NEXT: mvn v4.16b, v2.16b
2259; CHECK-NEXT: umax v3.4s, v3.4s, v1.4s
2260; CHECK-NEXT: umax v1.4s, v4.4s, v1.4s
2261; CHECK-NEXT: cmhi v0.4s, v2.4s, v0.4s
2262; CHECK-NEXT: bsl v0.16b, v3.16b, v1.16b
2263; CHECK-NEXT: ret
2264 %a = xor <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1>
2265 %b = xor <4 x i32> %y, <i32 -1, i32 -1, i32 -1, i32 -1>
2266 %c = xor <4 x i32> %z, <i32 -1, i32 -1, i32 -1, i32 -1>
2267 %cmp_ab = icmp ugt <4 x i32> %a, %b
2268 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
2269 %cmp_cb = icmp ugt <4 x i32> %c, %b
2270 %min_cb = select <4 x i1> %cmp_cb, <4 x i32> %c, <4 x i32> %b
2271 %cmp_ac = icmp ult <4 x i32> %x, %z
2272 %r = select <4 x i1> %cmp_ac, <4 x i32> %min_ab, <4 x i32> %min_cb
2273 ret <4 x i32> %r
2274}
2275
2276define <4 x i32> @notted_umax_bc_ab_swap_pred(<4 x i32> %x, <4 x i32> %y, <4 x i32> %z) {
2277; CHECK-LABEL: notted_umax_bc_ab_swap_pred:
2278; CHECK: // %bb.0:
2279; CHECK-NEXT: mvn v3.16b, v0.16b
2280; CHECK-NEXT: mvn v1.16b, v1.16b
2281; CHECK-NEXT: mvn v4.16b, v2.16b
2282; CHECK-NEXT: umax v4.4s, v1.4s, v4.4s
2283; CHECK-NEXT: umax v1.4s, v3.4s, v1.4s
2284; CHECK-NEXT: cmhi v0.4s, v0.4s, v2.4s
2285; CHECK-NEXT: bsl v0.16b, v4.16b, v1.16b
2286; CHECK-NEXT: ret
2287 %a = xor <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1>
2288 %b = xor <4 x i32> %y, <i32 -1, i32 -1, i32 -1, i32 -1>
2289 %c = xor <4 x i32> %z, <i32 -1, i32 -1, i32 -1, i32 -1>
2290 %cmp_bc = icmp ugt <4 x i32> %b, %c
2291 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
2292 %cmp_ab = icmp ugt <4 x i32> %a, %b
2293 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
2294 %cmp_ca = icmp ult <4 x i32> %z, %x
2295 %r = select <4 x i1> %cmp_ca, <4 x i32> %min_bc, <4 x i32> %min_ab
2296 ret <4 x i32> %r
2297}
2298
2299define <4 x i32> @notted_umax_bc_ba_swap_pred(<4 x i32> %x, <4 x i32> %y, <4 x i32> %z) {
2300; CHECK-LABEL: notted_umax_bc_ba_swap_pred:
2301; CHECK: // %bb.0:
2302; CHECK-NEXT: mvn v3.16b, v0.16b
2303; CHECK-NEXT: mvn v1.16b, v1.16b
2304; CHECK-NEXT: mvn v4.16b, v2.16b
2305; CHECK-NEXT: umax v4.4s, v1.4s, v4.4s
2306; CHECK-NEXT: umax v1.4s, v1.4s, v3.4s
2307; CHECK-NEXT: cmhi v0.4s, v0.4s, v2.4s
2308; CHECK-NEXT: bsl v0.16b, v4.16b, v1.16b
2309; CHECK-NEXT: ret
2310 %a = xor <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1>
2311 %b = xor <4 x i32> %y, <i32 -1, i32 -1, i32 -1, i32 -1>
2312 %c = xor <4 x i32> %z, <i32 -1, i32 -1, i32 -1, i32 -1>
2313 %cmp_bc = icmp ugt <4 x i32> %b, %c
2314 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
2315 %cmp_ba = icmp ugt <4 x i32> %b, %a
2316 %min_ba = select <4 x i1> %cmp_ba, <4 x i32> %b, <4 x i32> %a
2317 %cmp_ca = icmp ult <4 x i32> %z, %x
2318 %r = select <4 x i1> %cmp_ca, <4 x i32> %min_bc, <4 x i32> %min_ba
2319 ret <4 x i32> %r
2320}
2321
2322define <4 x i32> @notted_umax_ab_bc_eq_pred(<4 x i32> %x, <4 x i32> %y, <4 x i32> %z) {
2323; CHECK-LABEL: notted_umax_ab_bc_eq_pred:
2324; CHECK: // %bb.0:
2325; CHECK-NEXT: mvn v3.16b, v0.16b
2326; CHECK-NEXT: mvn v1.16b, v1.16b
2327; CHECK-NEXT: mvn v4.16b, v2.16b
2328; CHECK-NEXT: umax v3.4s, v3.4s, v1.4s
2329; CHECK-NEXT: umax v1.4s, v1.4s, v4.4s
2330; CHECK-NEXT: cmhs v0.4s, v2.4s, v0.4s
2331; CHECK-NEXT: bsl v0.16b, v3.16b, v1.16b
2332; CHECK-NEXT: ret
2333 %a = xor <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1>
2334 %b = xor <4 x i32> %y, <i32 -1, i32 -1, i32 -1, i32 -1>
2335 %c = xor <4 x i32> %z, <i32 -1, i32 -1, i32 -1, i32 -1>
2336 %cmp_ab = icmp ugt <4 x i32> %a, %b
2337 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
2338 %cmp_bc = icmp ugt <4 x i32> %b, %c
2339 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
2340 %cmp_ac = icmp uge <4 x i32> %z, %x
2341 %r = select <4 x i1> %cmp_ac, <4 x i32> %min_ab, <4 x i32> %min_bc
2342 ret <4 x i32> %r
2343}
2344
2345define <4 x i32> @notted_umax_ab_cb_eq_pred(<4 x i32> %x, <4 x i32> %y, <4 x i32> %z) {
2346; CHECK-LABEL: notted_umax_ab_cb_eq_pred:
2347; CHECK: // %bb.0:
2348; CHECK-NEXT: mvn v3.16b, v0.16b
2349; CHECK-NEXT: mvn v1.16b, v1.16b
2350; CHECK-NEXT: mvn v4.16b, v2.16b
2351; CHECK-NEXT: umax v3.4s, v3.4s, v1.4s
2352; CHECK-NEXT: umax v1.4s, v4.4s, v1.4s
2353; CHECK-NEXT: cmhs v0.4s, v2.4s, v0.4s
2354; CHECK-NEXT: bsl v0.16b, v3.16b, v1.16b
2355; CHECK-NEXT: ret
2356 %a = xor <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1>
2357 %b = xor <4 x i32> %y, <i32 -1, i32 -1, i32 -1, i32 -1>
2358 %c = xor <4 x i32> %z, <i32 -1, i32 -1, i32 -1, i32 -1>
2359 %cmp_ab = icmp ugt <4 x i32> %a, %b
2360 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
2361 %cmp_cb = icmp ugt <4 x i32> %c, %b
2362 %min_cb = select <4 x i1> %cmp_cb, <4 x i32> %c, <4 x i32> %b
2363 %cmp_ac = icmp uge <4 x i32> %z, %x
2364 %r = select <4 x i1> %cmp_ac, <4 x i32> %min_ab, <4 x i32> %min_cb
2365 ret <4 x i32> %r
2366}
2367
2368define <4 x i32> @notted_umax_bc_ab_eq_pred(<4 x i32> %x, <4 x i32> %y, <4 x i32> %z) {
2369; CHECK-LABEL: notted_umax_bc_ab_eq_pred:
2370; CHECK: // %bb.0:
2371; CHECK-NEXT: mvn v3.16b, v0.16b
2372; CHECK-NEXT: mvn v1.16b, v1.16b
2373; CHECK-NEXT: mvn v4.16b, v2.16b
2374; CHECK-NEXT: umax v4.4s, v1.4s, v4.4s
2375; CHECK-NEXT: umax v1.4s, v3.4s, v1.4s
2376; CHECK-NEXT: cmhs v0.4s, v0.4s, v2.4s
2377; CHECK-NEXT: bsl v0.16b, v4.16b, v1.16b
2378; CHECK-NEXT: ret
2379 %a = xor <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1>
2380 %b = xor <4 x i32> %y, <i32 -1, i32 -1, i32 -1, i32 -1>
2381 %c = xor <4 x i32> %z, <i32 -1, i32 -1, i32 -1, i32 -1>
2382 %cmp_bc = icmp ugt <4 x i32> %b, %c
2383 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
2384 %cmp_ab = icmp ugt <4 x i32> %a, %b
2385 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
2386 %cmp_ca = icmp uge <4 x i32> %x, %z
2387 %r = select <4 x i1> %cmp_ca, <4 x i32> %min_bc, <4 x i32> %min_ab
2388 ret <4 x i32> %r
2389}
2390
2391define <4 x i32> @notted_umax_bc_ba_eq_pred(<4 x i32> %x, <4 x i32> %y, <4 x i32> %z) {
2392; CHECK-LABEL: notted_umax_bc_ba_eq_pred:
2393; CHECK: // %bb.0:
2394; CHECK-NEXT: mvn v3.16b, v0.16b
2395; CHECK-NEXT: mvn v1.16b, v1.16b
2396; CHECK-NEXT: mvn v4.16b, v2.16b
2397; CHECK-NEXT: umax v4.4s, v1.4s, v4.4s
2398; CHECK-NEXT: umax v1.4s, v1.4s, v3.4s
2399; CHECK-NEXT: cmhs v0.4s, v0.4s, v2.4s
2400; CHECK-NEXT: bsl v0.16b, v4.16b, v1.16b
2401; CHECK-NEXT: ret
2402 %a = xor <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1>
2403 %b = xor <4 x i32> %y, <i32 -1, i32 -1, i32 -1, i32 -1>
2404 %c = xor <4 x i32> %z, <i32 -1, i32 -1, i32 -1, i32 -1>
2405 %cmp_bc = icmp ugt <4 x i32> %b, %c
2406 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
2407 %cmp_ba = icmp ugt <4 x i32> %b, %a
2408 %min_ba = select <4 x i1> %cmp_ba, <4 x i32> %b, <4 x i32> %a
2409 %cmp_ca = icmp uge <4 x i32> %x, %z
2410 %r = select <4 x i1> %cmp_ca, <4 x i32> %min_bc, <4 x i32> %min_ba
2411 ret <4 x i32> %r
2412}
2413
2414define <4 x i32> @notted_umax_ab_bc_eq_swap_pred(<4 x i32> %x, <4 x i32> %y, <4 x i32> %z) {
2415; CHECK-LABEL: notted_umax_ab_bc_eq_swap_pred:
2416; CHECK: // %bb.0:
2417; CHECK-NEXT: mvn v3.16b, v0.16b
2418; CHECK-NEXT: mvn v1.16b, v1.16b
2419; CHECK-NEXT: mvn v4.16b, v2.16b
2420; CHECK-NEXT: umax v3.4s, v3.4s, v1.4s
2421; CHECK-NEXT: umax v1.4s, v1.4s, v4.4s
2422; CHECK-NEXT: cmhs v0.4s, v2.4s, v0.4s
2423; CHECK-NEXT: bsl v0.16b, v3.16b, v1.16b
2424; CHECK-NEXT: ret
2425 %a = xor <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1>
2426 %b = xor <4 x i32> %y, <i32 -1, i32 -1, i32 -1, i32 -1>
2427 %c = xor <4 x i32> %z, <i32 -1, i32 -1, i32 -1, i32 -1>
2428 %cmp_ab = icmp ugt <4 x i32> %a, %b
2429 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
2430 %cmp_bc = icmp ugt <4 x i32> %b, %c
2431 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
2432 %cmp_ac = icmp ule <4 x i32> %x, %z
2433 %r = select <4 x i1> %cmp_ac, <4 x i32> %min_ab, <4 x i32> %min_bc
2434 ret <4 x i32> %r
2435}
2436
2437define <4 x i32> @notted_umax_ab_cb_eq_swap_pred(<4 x i32> %x, <4 x i32> %y, <4 x i32> %z) {
2438; CHECK-LABEL: notted_umax_ab_cb_eq_swap_pred:
2439; CHECK: // %bb.0:
2440; CHECK-NEXT: mvn v3.16b, v0.16b
2441; CHECK-NEXT: mvn v1.16b, v1.16b
2442; CHECK-NEXT: mvn v4.16b, v2.16b
2443; CHECK-NEXT: umax v3.4s, v3.4s, v1.4s
2444; CHECK-NEXT: umax v1.4s, v4.4s, v1.4s
2445; CHECK-NEXT: cmhs v0.4s, v2.4s, v0.4s
2446; CHECK-NEXT: bsl v0.16b, v3.16b, v1.16b
2447; CHECK-NEXT: ret
2448 %a = xor <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1>
2449 %b = xor <4 x i32> %y, <i32 -1, i32 -1, i32 -1, i32 -1>
2450 %c = xor <4 x i32> %z, <i32 -1, i32 -1, i32 -1, i32 -1>
2451 %cmp_ab = icmp ugt <4 x i32> %a, %b
2452 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
2453 %cmp_cb = icmp ugt <4 x i32> %c, %b
2454 %min_cb = select <4 x i1> %cmp_cb, <4 x i32> %c, <4 x i32> %b
2455 %cmp_ac = icmp ule <4 x i32> %x, %z
2456 %r = select <4 x i1> %cmp_ac, <4 x i32> %min_ab, <4 x i32> %min_cb
2457 ret <4 x i32> %r
2458}
2459
2460define <4 x i32> @notted_umax_bc_ab_eq_swap_pred(<4 x i32> %x, <4 x i32> %y, <4 x i32> %z) {
2461; CHECK-LABEL: notted_umax_bc_ab_eq_swap_pred:
2462; CHECK: // %bb.0:
2463; CHECK-NEXT: mvn v3.16b, v0.16b
2464; CHECK-NEXT: mvn v1.16b, v1.16b
2465; CHECK-NEXT: mvn v4.16b, v2.16b
2466; CHECK-NEXT: umax v4.4s, v1.4s, v4.4s
2467; CHECK-NEXT: umax v1.4s, v3.4s, v1.4s
2468; CHECK-NEXT: cmhs v0.4s, v0.4s, v2.4s
2469; CHECK-NEXT: bsl v0.16b, v4.16b, v1.16b
2470; CHECK-NEXT: ret
2471 %a = xor <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1>
2472 %b = xor <4 x i32> %y, <i32 -1, i32 -1, i32 -1, i32 -1>
2473 %c = xor <4 x i32> %z, <i32 -1, i32 -1, i32 -1, i32 -1>
2474 %cmp_bc = icmp ugt <4 x i32> %b, %c
2475 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
2476 %cmp_ab = icmp ugt <4 x i32> %a, %b
2477 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
2478 %cmp_ca = icmp ule <4 x i32> %z, %x
2479 %r = select <4 x i1> %cmp_ca, <4 x i32> %min_bc, <4 x i32> %min_ab
2480 ret <4 x i32> %r
2481}
2482
2483define <4 x i32> @notted_umax_bc_ba_eq_swap_pred(<4 x i32> %x, <4 x i32> %y, <4 x i32> %z) {
2484; CHECK-LABEL: notted_umax_bc_ba_eq_swap_pred:
2485; CHECK: // %bb.0:
2486; CHECK-NEXT: mvn v3.16b, v0.16b
2487; CHECK-NEXT: mvn v1.16b, v1.16b
2488; CHECK-NEXT: mvn v4.16b, v2.16b
2489; CHECK-NEXT: umax v4.4s, v1.4s, v4.4s
2490; CHECK-NEXT: umax v1.4s, v1.4s, v3.4s
2491; CHECK-NEXT: cmhs v0.4s, v0.4s, v2.4s
2492; CHECK-NEXT: bsl v0.16b, v4.16b, v1.16b
2493; CHECK-NEXT: ret
2494 %a = xor <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1>
2495 %b = xor <4 x i32> %y, <i32 -1, i32 -1, i32 -1, i32 -1>
2496 %c = xor <4 x i32> %z, <i32 -1, i32 -1, i32 -1, i32 -1>
2497 %cmp_bc = icmp ugt <4 x i32> %b, %c
2498 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
2499 %cmp_ba = icmp ugt <4 x i32> %b, %a
2500 %min_ba = select <4 x i1> %cmp_ba, <4 x i32> %b, <4 x i32> %a
2501 %cmp_ca = icmp ule <4 x i32> %z, %x
2502 %r = select <4 x i1> %cmp_ca, <4 x i32> %min_bc, <4 x i32> %min_ba
2503 ret <4 x i32> %r
2504}
2505